1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
38 #include "libbfd.h" /* for bfd_default_set_arch_mach */
39 #include "coff/internal.h" /* for libcoff.h */
40 #include "libcoff.h" /* for xcoff_data */
41 #include "coff/xcoff.h"
46 #include "solib-svr4.h"
49 /* If the kernel has to deliver a signal, it pushes a sigcontext
50 structure on the stack and then calls the signal handler, passing
51 the address of the sigcontext in an argument register. Usually
52 the signal handler doesn't save this register, so we have to
53 access the sigcontext structure via an offset from the signal handler
55 The following constants were determined by experimentation on AIX 3.2. */
56 #define SIG_FRAME_PC_OFFSET 96
57 #define SIG_FRAME_LR_OFFSET 108
58 #define SIG_FRAME_FP_OFFSET 284
60 /* To be used by skip_prologue. */
62 struct rs6000_framedata
64 int offset
; /* total size of frame --- the distance
65 by which we decrement sp to allocate
67 int saved_gpr
; /* smallest # of saved gpr */
68 int saved_fpr
; /* smallest # of saved fpr */
69 int saved_vr
; /* smallest # of saved vr */
70 int alloca_reg
; /* alloca register number (frame ptr) */
71 char frameless
; /* true if frameless functions. */
72 char nosavedpc
; /* true if pc not saved. */
73 int gpr_offset
; /* offset of saved gprs from prev sp */
74 int fpr_offset
; /* offset of saved fprs from prev sp */
75 int vr_offset
; /* offset of saved vrs from prev sp */
76 int lr_offset
; /* offset of saved lr */
77 int cr_offset
; /* offset of saved cr */
78 int vrsave_offset
; /* offset of saved vrsave register */
81 /* Description of a single register. */
85 char *name
; /* name of register */
86 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
87 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
88 unsigned char fpr
; /* whether register is floating-point */
89 unsigned char pseudo
; /* whether register is pseudo */
92 /* Breakpoint shadows for the single step instructions will be kept here. */
94 static struct sstep_breaks
96 /* Address, or 0 if this is not in use. */
98 /* Shadow contents. */
103 /* Hook for determining the TOC address when calling functions in the
104 inferior under AIX. The initialization code in rs6000-nat.c sets
105 this hook to point to find_toc_address. */
107 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
109 /* Hook to set the current architecture when starting a child process.
110 rs6000-nat.c sets this. */
112 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
114 /* Static function prototypes */
116 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
118 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
119 struct rs6000_framedata
*);
120 static void frame_get_saved_regs (struct frame_info
* fi
,
121 struct rs6000_framedata
* fdatap
);
122 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
124 /* Read a LEN-byte address from debugged memory address MEMADDR. */
127 read_memory_addr (CORE_ADDR memaddr
, int len
)
129 return read_memory_unsigned_integer (memaddr
, len
);
133 rs6000_skip_prologue (CORE_ADDR pc
)
135 struct rs6000_framedata frame
;
136 pc
= skip_prologue (pc
, 0, &frame
);
141 /* Fill in fi->saved_regs */
143 struct frame_extra_info
145 /* Functions calling alloca() change the value of the stack
146 pointer. We need to use initial stack pointer (which is saved in
147 r31 by gcc) in such cases. If a compiler emits traceback table,
148 then we should use the alloca register specified in traceback
150 CORE_ADDR initial_sp
; /* initial stack pointer. */
154 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
156 fi
->extra_info
= (struct frame_extra_info
*)
157 frame_obstack_alloc (sizeof (struct frame_extra_info
));
158 fi
->extra_info
->initial_sp
= 0;
159 if (fi
->next
!= (CORE_ADDR
) 0
160 && fi
->pc
< TEXT_SEGMENT_BASE
)
161 /* We're in get_prev_frame */
162 /* and this is a special signal frame. */
163 /* (fi->pc will be some low address in the kernel, */
164 /* to which the signal handler returns). */
165 fi
->signal_handler_caller
= 1;
168 /* Put here the code to store, into a struct frame_saved_regs,
169 the addresses of the saved registers of frame described by FRAME_INFO.
170 This includes special registers such as pc and fp saved in special
171 ways in the stack frame. sp is even more special:
172 the address we return for it IS the sp for the next frame. */
174 /* In this implementation for RS/6000, we do *not* save sp. I am
175 not sure if it will be needed. The following function takes care of gpr's
179 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
181 frame_get_saved_regs (fi
, NULL
);
185 rs6000_frame_args_address (struct frame_info
*fi
)
187 if (fi
->extra_info
->initial_sp
!= 0)
188 return fi
->extra_info
->initial_sp
;
190 return frame_initial_stack_address (fi
);
193 /* Immediately after a function call, return the saved pc.
194 Can't go through the frames for this because on some machines
195 the new frame is not set up until the new function executes
196 some instructions. */
199 rs6000_saved_pc_after_call (struct frame_info
*fi
)
201 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
204 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
207 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
214 absolute
= (int) ((instr
>> 1) & 1);
219 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
223 dest
= pc
+ immediate
;
227 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
231 dest
= pc
+ immediate
;
235 ext_op
= (instr
>> 1) & 0x3ff;
237 if (ext_op
== 16) /* br conditional register */
239 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
241 /* If we are about to return from a signal handler, dest is
242 something like 0x3c90. The current frame is a signal handler
243 caller frame, upon completion of the sigreturn system call
244 execution will return to the saved PC in the frame. */
245 if (dest
< TEXT_SEGMENT_BASE
)
247 struct frame_info
*fi
;
249 fi
= get_current_frame ();
251 dest
= read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
,
252 gdbarch_tdep (current_gdbarch
)->wordsize
);
256 else if (ext_op
== 528) /* br cond to count reg */
258 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
260 /* If we are about to execute a system call, dest is something
261 like 0x22fc or 0x3b00. Upon completion the system call
262 will return to the address in the link register. */
263 if (dest
< TEXT_SEGMENT_BASE
)
264 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
273 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
277 /* Sequence of bytes for breakpoint instruction. */
279 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
280 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
282 const static unsigned char *
283 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
285 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
286 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
288 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
289 return big_breakpoint
;
291 return little_breakpoint
;
295 /* AIX does not support PT_STEP. Simulate it. */
298 rs6000_software_single_step (enum target_signal signal
,
299 int insert_breakpoints_p
)
303 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
309 if (insert_breakpoints_p
)
314 insn
= read_memory_integer (loc
, 4);
316 breaks
[0] = loc
+ breakp_sz
;
318 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
320 /* Don't put two breakpoints on the same address. */
321 if (breaks
[1] == breaks
[0])
324 stepBreaks
[1].address
= 0;
326 for (ii
= 0; ii
< 2; ++ii
)
329 /* ignore invalid breakpoint. */
330 if (breaks
[ii
] == -1)
332 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
333 stepBreaks
[ii
].address
= breaks
[ii
];
340 /* remove step breakpoints. */
341 for (ii
= 0; ii
< 2; ++ii
)
342 if (stepBreaks
[ii
].address
!= 0)
343 target_remove_breakpoint (stepBreaks
[ii
].address
,
344 stepBreaks
[ii
].data
);
346 errno
= 0; /* FIXME, don't ignore errors! */
347 /* What errors? {read,write}_memory call error(). */
351 /* return pc value after skipping a function prologue and also return
352 information about a function frame.
354 in struct rs6000_framedata fdata:
355 - frameless is TRUE, if function does not have a frame.
356 - nosavedpc is TRUE, if function does not save %pc value in its frame.
357 - offset is the initial size of this stack frame --- the amount by
358 which we decrement the sp to allocate the frame.
359 - saved_gpr is the number of the first saved gpr.
360 - saved_fpr is the number of the first saved fpr.
361 - saved_vr is the number of the first saved vr.
362 - alloca_reg is the number of the register used for alloca() handling.
364 - gpr_offset is the offset of the first saved gpr from the previous frame.
365 - fpr_offset is the offset of the first saved fpr from the previous frame.
366 - vr_offset is the offset of the first saved vr from the previous frame.
367 - lr_offset is the offset of the saved lr
368 - cr_offset is the offset of the saved cr
369 - vrsave_offset is the offset of the saved vrsave register
372 #define SIGNED_SHORT(x) \
373 ((sizeof (short) == 2) \
374 ? ((int)(short)(x)) \
375 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
377 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
379 /* Limit the number of skipped non-prologue instructions, as the examining
380 of the prologue is expensive. */
381 static int max_skip_non_prologue_insns
= 10;
383 /* Given PC representing the starting address of a function, and
384 LIM_PC which is the (sloppy) limit to which to scan when looking
385 for a prologue, attempt to further refine this limit by using
386 the line data in the symbol table. If successful, a better guess
387 on where the prologue ends is returned, otherwise the previous
388 value of lim_pc is returned. */
390 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
392 struct symtab_and_line prologue_sal
;
394 prologue_sal
= find_pc_line (pc
, 0);
395 if (prologue_sal
.line
!= 0)
398 CORE_ADDR addr
= prologue_sal
.end
;
400 /* Handle the case in which compiler's optimizer/scheduler
401 has moved instructions into the prologue. We scan ahead
402 in the function looking for address ranges whose corresponding
403 line number is less than or equal to the first one that we
404 found for the function. (It can be less than when the
405 scheduler puts a body instruction before the first prologue
407 for (i
= 2 * max_skip_non_prologue_insns
;
408 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
411 struct symtab_and_line sal
;
413 sal
= find_pc_line (addr
, 0);
416 if (sal
.line
<= prologue_sal
.line
417 && sal
.symtab
== prologue_sal
.symtab
)
424 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
425 lim_pc
= prologue_sal
.end
;
432 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
434 CORE_ADDR orig_pc
= pc
;
435 CORE_ADDR last_prologue_pc
= pc
;
436 CORE_ADDR li_found_pc
= 0;
440 long vr_saved_offset
= 0;
447 int minimal_toc_loaded
= 0;
448 int prev_insn_was_prologue_insn
= 1;
449 int num_skip_non_prologue_insns
= 0;
451 /* Attempt to find the end of the prologue when no limit is specified.
452 Note that refine_prologue_limit() has been written so that it may
453 be used to "refine" the limits of non-zero PC values too, but this
454 is only safe if we 1) trust the line information provided by the
455 compiler and 2) iterate enough to actually find the end of the
458 It may become a good idea at some point (for both performance and
459 accuracy) to unconditionally call refine_prologue_limit(). But,
460 until we can make a clear determination that this is beneficial,
461 we'll play it safe and only use it to obtain a limit when none
462 has been specified. */
464 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
466 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
467 fdata
->saved_gpr
= -1;
468 fdata
->saved_fpr
= -1;
469 fdata
->saved_vr
= -1;
470 fdata
->alloca_reg
= -1;
471 fdata
->frameless
= 1;
472 fdata
->nosavedpc
= 1;
476 /* Sometimes it isn't clear if an instruction is a prologue
477 instruction or not. When we encounter one of these ambiguous
478 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
479 Otherwise, we'll assume that it really is a prologue instruction. */
480 if (prev_insn_was_prologue_insn
)
481 last_prologue_pc
= pc
;
483 /* Stop scanning if we've hit the limit. */
484 if (lim_pc
!= 0 && pc
>= lim_pc
)
487 prev_insn_was_prologue_insn
= 1;
489 /* Fetch the instruction and convert it to an integer. */
490 if (target_read_memory (pc
, buf
, 4))
492 op
= extract_signed_integer (buf
, 4);
494 if ((op
& 0xfc1fffff) == 0x7c0802a6)
496 lr_reg
= (op
& 0x03e00000) | 0x90010000;
500 else if ((op
& 0xfc1fffff) == 0x7c000026)
502 cr_reg
= (op
& 0x03e00000) | 0x90010000;
506 else if ((op
& 0xfc1f0000) == 0xd8010000)
507 { /* stfd Rx,NUM(r1) */
508 reg
= GET_SRC_REG (op
);
509 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
511 fdata
->saved_fpr
= reg
;
512 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
517 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
518 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
519 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
520 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
523 reg
= GET_SRC_REG (op
);
524 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
526 fdata
->saved_gpr
= reg
;
527 if ((op
& 0xfc1f0003) == 0xf8010000)
529 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
534 else if ((op
& 0xffff0000) == 0x60000000)
537 /* Allow nops in the prologue, but do not consider them to
538 be part of the prologue unless followed by other prologue
540 prev_insn_was_prologue_insn
= 0;
544 else if ((op
& 0xffff0000) == 0x3c000000)
545 { /* addis 0,0,NUM, used
547 fdata
->offset
= (op
& 0x0000ffff) << 16;
548 fdata
->frameless
= 0;
552 else if ((op
& 0xffff0000) == 0x60000000)
553 { /* ori 0,0,NUM, 2nd ha
554 lf of >= 32k frames */
555 fdata
->offset
|= (op
& 0x0000ffff);
556 fdata
->frameless
= 0;
560 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
563 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
564 fdata
->nosavedpc
= 0;
569 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
572 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
577 else if (op
== 0x48000005)
583 else if (op
== 0x48000004)
588 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
589 in V.4 -mminimal-toc */
590 (op
& 0xffff0000) == 0x3bde0000)
591 { /* addi 30,30,foo@l */
595 else if ((op
& 0xfc000001) == 0x48000001)
599 fdata
->frameless
= 0;
600 /* Don't skip over the subroutine call if it is not within
601 the first three instructions of the prologue. */
602 if ((pc
- orig_pc
) > 8)
605 op
= read_memory_integer (pc
+ 4, 4);
607 /* At this point, make sure this is not a trampoline
608 function (a function that simply calls another functions,
609 and nothing else). If the next is not a nop, this branch
610 was part of the function prologue. */
612 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
613 break; /* don't skip over
617 /* update stack pointer */
619 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
620 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
622 fdata
->frameless
= 0;
623 if ((op
& 0xffff0003) == 0xf8210001)
625 fdata
->offset
= SIGNED_SHORT (op
);
626 offset
= fdata
->offset
;
630 else if (op
== 0x7c21016e)
632 fdata
->frameless
= 0;
633 offset
= fdata
->offset
;
636 /* Load up minimal toc pointer */
638 else if ((op
>> 22) == 0x20f
639 && !minimal_toc_loaded
)
640 { /* l r31,... or l r30,... */
641 minimal_toc_loaded
= 1;
644 /* move parameters from argument registers to local variable
647 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
648 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
649 (((op
>> 21) & 31) <= 10) &&
650 (((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
654 /* store parameters in stack */
656 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
657 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
658 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
662 /* store parameters in stack via frame pointer */
665 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
666 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
667 (op
& 0xfc1f0000) == 0xfc1f0000))
668 { /* frsp, fp?,NUM(r1) */
671 /* Set up frame pointer */
673 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
676 fdata
->frameless
= 0;
678 fdata
->alloca_reg
= 31;
681 /* Another way to set up the frame pointer. */
683 else if ((op
& 0xfc1fffff) == 0x38010000)
684 { /* addi rX, r1, 0x0 */
685 fdata
->frameless
= 0;
687 fdata
->alloca_reg
= (op
& ~0x38010000) >> 21;
690 /* AltiVec related instructions. */
691 /* Store the vrsave register (spr 256) in another register for
692 later manipulation, or load a register into the vrsave
693 register. 2 instructions are used: mfvrsave and
694 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
695 and mtspr SPR256, Rn. */
696 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
697 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
698 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
700 vrsave_reg
= GET_SRC_REG (op
);
703 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
707 /* Store the register where vrsave was saved to onto the stack:
708 rS is the register where vrsave was stored in a previous
710 /* 100100 sssss 00001 dddddddd dddddddd */
711 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
713 if (vrsave_reg
== GET_SRC_REG (op
))
715 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
720 /* Compute the new value of vrsave, by modifying the register
721 where vrsave was saved to. */
722 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
723 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
727 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
728 in a pair of insns to save the vector registers on the
730 /* 001110 00000 00000 iiii iiii iiii iiii */
731 else if ((op
& 0xffff0000) == 0x38000000) /* li r0, SIMM */
734 vr_saved_offset
= SIGNED_SHORT (op
);
736 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
737 /* 011111 sssss 11111 00000 00111001110 */
738 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
740 if (pc
== (li_found_pc
+ 4))
742 vr_reg
= GET_SRC_REG (op
);
743 /* If this is the first vector reg to be saved, or if
744 it has a lower number than others previously seen,
745 reupdate the frame info. */
746 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
748 fdata
->saved_vr
= vr_reg
;
749 fdata
->vr_offset
= vr_saved_offset
+ offset
;
751 vr_saved_offset
= -1;
756 /* End AltiVec related instructions. */
759 /* Not a recognized prologue instruction.
760 Handle optimizer code motions into the prologue by continuing
761 the search if we have no valid frame yet or if the return
762 address is not yet saved in the frame. */
763 if (fdata
->frameless
== 0
764 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
767 if (op
== 0x4e800020 /* blr */
768 || op
== 0x4e800420) /* bctr */
769 /* Do not scan past epilogue in frameless functions or
772 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
773 /* Never skip branches. */
776 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
777 /* Do not scan too many insns, scanning insns is expensive with
781 /* Continue scanning. */
782 prev_insn_was_prologue_insn
= 0;
788 /* I have problems with skipping over __main() that I need to address
789 * sometime. Previously, I used to use misc_function_vector which
790 * didn't work as well as I wanted to be. -MGO */
792 /* If the first thing after skipping a prolog is a branch to a function,
793 this might be a call to an initializer in main(), introduced by gcc2.
794 We'd like to skip over it as well. Fortunately, xlc does some extra
795 work before calling a function right after a prologue, thus we can
796 single out such gcc2 behaviour. */
799 if ((op
& 0xfc000001) == 0x48000001)
800 { /* bl foo, an initializer function? */
801 op
= read_memory_integer (pc
+ 4, 4);
803 if (op
== 0x4def7b82)
804 { /* cror 0xf, 0xf, 0xf (nop) */
806 /* Check and see if we are in main. If so, skip over this
807 initializer function as well. */
809 tmp
= find_pc_misc_function (pc
);
810 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
816 fdata
->offset
= -fdata
->offset
;
817 return last_prologue_pc
;
821 /*************************************************************************
822 Support for creating pushing a dummy frame into the stack, and popping
824 *************************************************************************/
827 /* Pop the innermost frame, go back to the caller. */
830 rs6000_pop_frame (void)
832 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
833 struct rs6000_framedata fdata
;
834 struct frame_info
*frame
= get_current_frame ();
838 sp
= FRAME_FP (frame
);
840 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
842 generic_pop_dummy_frame ();
843 flush_cached_frames ();
847 /* Make sure that all registers are valid. */
848 read_register_bytes (0, NULL
, REGISTER_BYTES
);
850 /* Figure out previous %pc value. If the function is frameless, it is
851 still in the link register, otherwise walk the frames and retrieve the
852 saved %pc value in the previous frame. */
854 addr
= get_pc_function_start (frame
->pc
);
855 (void) skip_prologue (addr
, frame
->pc
, &fdata
);
857 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
861 prev_sp
= read_memory_addr (sp
, wordsize
);
862 if (fdata
.lr_offset
== 0)
863 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
865 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
867 /* reset %pc value. */
868 write_register (PC_REGNUM
, lr
);
870 /* reset register values if any was saved earlier. */
872 if (fdata
.saved_gpr
!= -1)
874 addr
= prev_sp
+ fdata
.gpr_offset
;
875 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
877 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
)], wordsize
);
882 if (fdata
.saved_fpr
!= -1)
884 addr
= prev_sp
+ fdata
.fpr_offset
;
885 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
887 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
892 write_register (SP_REGNUM
, prev_sp
);
893 target_store_registers (-1);
894 flush_cached_frames ();
897 /* Fixup the call sequence of a dummy function, with the real function
898 address. Its arguments will be passed by gdb. */
901 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
902 int nargs
, struct value
**args
, struct type
*type
,
906 CORE_ADDR target_addr
;
908 if (rs6000_find_toc_address_hook
!= NULL
)
910 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
911 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
916 /* Pass the arguments in either registers, or in the stack. In RS/6000,
917 the first eight words of the argument list (that might be less than
918 eight parameters if some parameters occupy more than one word) are
919 passed in r3..r10 registers. float and double parameters are
920 passed in fpr's, in addition to that. Rest of the parameters if any
921 are passed in user stack. There might be cases in which half of the
922 parameter is copied into registers, the other half is pushed into
925 Stack must be aligned on 64-bit boundaries when synthesizing
928 If the function is returning a structure, then the return address is passed
929 in r3, then the first 7 words of the parameters can be passed in registers,
933 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
934 int struct_return
, CORE_ADDR struct_addr
)
938 int argno
; /* current argument number */
939 int argbytes
; /* current argument byte */
941 int f_argno
= 0; /* current floating point argno */
942 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
944 struct value
*arg
= 0;
949 /* The first eight words of ther arguments are passed in registers.
950 Copy them appropriately.
952 If the function is returning a `struct', then the first word (which
953 will be passed in r3) is used for struct return address. In that
954 case we should advance one word and start from r4 register to copy
957 ii
= struct_return
? 1 : 0;
960 effectively indirect call... gcc does...
962 return_val example( float, int);
965 float in fp0, int in r3
966 offset of stack on overflow 8/16
967 for varargs, must go by type.
969 float in r3&r4, int in r5
970 offset of stack on overflow different
972 return in r3 or f0. If no float, must study how gcc emulates floats;
973 pay attention to arg promotion.
974 User may have to cast\args to handle promotion correctly
975 since gdb won't know if prototype supplied or not.
978 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
980 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
983 type
= check_typedef (VALUE_TYPE (arg
));
984 len
= TYPE_LENGTH (type
);
986 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
989 /* Floating point arguments are passed in fpr's, as well as gpr's.
990 There are 13 fpr's reserved for passing parameters. At this point
991 there is no way we would run out of them. */
995 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
997 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
998 VALUE_CONTENTS (arg
),
1006 /* Argument takes more than one register. */
1007 while (argbytes
< len
)
1009 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1010 memcpy (®isters
[REGISTER_BYTE (ii
+ 3)],
1011 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1012 (len
- argbytes
) > reg_size
1013 ? reg_size
: len
- argbytes
);
1014 ++ii
, argbytes
+= reg_size
;
1017 goto ran_out_of_registers_for_arguments
;
1024 /* Argument can fit in one register. No problem. */
1025 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1026 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1027 memcpy ((char *)®isters
[REGISTER_BYTE (ii
+ 3)] + adj
,
1028 VALUE_CONTENTS (arg
), len
);
1033 ran_out_of_registers_for_arguments
:
1035 saved_sp
= read_sp ();
1037 /* Location for 8 parameters are always reserved. */
1040 /* Another six words for back chain, TOC register, link register, etc. */
1043 /* Stack pointer must be quadword aligned. */
1046 /* If there are more arguments, allocate space for them in
1047 the stack, then push them starting from the ninth one. */
1049 if ((argno
< nargs
) || argbytes
)
1055 space
+= ((len
- argbytes
+ 3) & -4);
1061 for (; jj
< nargs
; ++jj
)
1063 struct value
*val
= args
[jj
];
1064 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1067 /* Add location required for the rest of the parameters. */
1068 space
= (space
+ 15) & -16;
1071 /* This is another instance we need to be concerned about
1072 securing our stack space. If we write anything underneath %sp
1073 (r1), we might conflict with the kernel who thinks he is free
1074 to use this area. So, update %sp first before doing anything
1077 write_register (SP_REGNUM
, sp
);
1079 /* If the last argument copied into the registers didn't fit there
1080 completely, push the rest of it into stack. */
1084 write_memory (sp
+ 24 + (ii
* 4),
1085 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1088 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1091 /* Push the rest of the arguments into stack. */
1092 for (; argno
< nargs
; ++argno
)
1096 type
= check_typedef (VALUE_TYPE (arg
));
1097 len
= TYPE_LENGTH (type
);
1100 /* Float types should be passed in fpr's, as well as in the
1102 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1107 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1109 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1110 VALUE_CONTENTS (arg
),
1115 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1116 ii
+= ((len
+ 3) & -4) / 4;
1120 /* Secure stack areas first, before doing anything else. */
1121 write_register (SP_REGNUM
, sp
);
1123 /* set back chain properly */
1124 store_address (tmp_buffer
, 4, saved_sp
);
1125 write_memory (sp
, tmp_buffer
, 4);
1127 target_store_registers (-1);
1131 /* Function: ppc_push_return_address (pc, sp)
1132 Set up the return address for the inferior function call. */
1135 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1137 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1138 CALL_DUMMY_ADDRESS ());
1142 /* Extract a function return value of type TYPE from raw register array
1143 REGBUF, and copy that return value into VALBUF in virtual format. */
1146 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1149 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1151 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1156 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1157 We need to truncate the return value into float size (4 byte) if
1160 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1162 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1163 TYPE_LENGTH (valtype
));
1166 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1168 memcpy (valbuf
, &ff
, sizeof (float));
1171 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1172 && TYPE_LENGTH (valtype
) == 16
1173 && TYPE_VECTOR (valtype
))
1175 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1176 TYPE_LENGTH (valtype
));
1180 /* return value is copied starting from r3. */
1181 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1182 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1183 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1186 regbuf
+ REGISTER_BYTE (3) + offset
,
1187 TYPE_LENGTH (valtype
));
1191 /* Keep structure return address in this variable.
1192 FIXME: This is a horrid kludge which should not be allowed to continue
1193 living. This only allows a single nested call to a structure-returning
1194 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1196 static CORE_ADDR rs6000_struct_return_address
;
1198 /* Return whether handle_inferior_event() should proceed through code
1199 starting at PC in function NAME when stepping.
1201 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1202 handle memory references that are too distant to fit in instructions
1203 generated by the compiler. For example, if 'foo' in the following
1208 is greater than 32767, the linker might replace the lwz with a branch to
1209 somewhere in @FIX1 that does the load in 2 instructions and then branches
1210 back to where execution should continue.
1212 GDB should silently step over @FIX code, just like AIX dbx does.
1213 Unfortunately, the linker uses the "b" instruction for the branches,
1214 meaning that the link register doesn't get set. Therefore, GDB's usual
1215 step_over_function() mechanism won't work.
1217 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1218 in handle_inferior_event() to skip past @FIX code. */
1221 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1223 return name
&& !strncmp (name
, "@FIX", 4);
1226 /* Skip code that the user doesn't want to see when stepping:
1228 1. Indirect function calls use a piece of trampoline code to do context
1229 switching, i.e. to set the new TOC table. Skip such code if we are on
1230 its first instruction (as when we have single-stepped to here).
1232 2. Skip shared library trampoline code (which is different from
1233 indirect function call trampolines).
1235 3. Skip bigtoc fixup code.
1237 Result is desired PC to step until, or NULL if we are not in
1238 code that should be skipped. */
1241 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1243 register unsigned int ii
, op
;
1245 CORE_ADDR solib_target_pc
;
1246 struct minimal_symbol
*msymbol
;
1248 static unsigned trampoline_code
[] =
1250 0x800b0000, /* l r0,0x0(r11) */
1251 0x90410014, /* st r2,0x14(r1) */
1252 0x7c0903a6, /* mtctr r0 */
1253 0x804b0004, /* l r2,0x4(r11) */
1254 0x816b0008, /* l r11,0x8(r11) */
1255 0x4e800420, /* bctr */
1256 0x4e800020, /* br */
1260 /* Check for bigtoc fixup code. */
1261 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1262 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, SYMBOL_NAME (msymbol
)))
1264 /* Double-check that the third instruction from PC is relative "b". */
1265 op
= read_memory_integer (pc
+ 8, 4);
1266 if ((op
& 0xfc000003) == 0x48000000)
1268 /* Extract bits 6-29 as a signed 24-bit relative word address and
1269 add it to the containing PC. */
1270 rel
= ((int)(op
<< 6) >> 6);
1271 return pc
+ 8 + rel
;
1275 /* If pc is in a shared library trampoline, return its target. */
1276 solib_target_pc
= find_solib_trampoline_target (pc
);
1277 if (solib_target_pc
)
1278 return solib_target_pc
;
1280 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1282 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1283 if (op
!= trampoline_code
[ii
])
1286 ii
= read_register (11); /* r11 holds destination addr */
1287 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1291 /* Determines whether the function FI has a frame on the stack or not. */
1294 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1296 CORE_ADDR func_start
;
1297 struct rs6000_framedata fdata
;
1299 /* Don't even think about framelessness except on the innermost frame
1300 or if the function was interrupted by a signal. */
1301 if (fi
->next
!= NULL
&& !fi
->next
->signal_handler_caller
)
1304 func_start
= get_pc_function_start (fi
->pc
);
1306 /* If we failed to find the start of the function, it is a mistake
1307 to inspect the instructions. */
1311 /* A frame with a zero PC is usually created by dereferencing a NULL
1312 function pointer, normally causing an immediate core dump of the
1313 inferior. Mark function as frameless, as the inferior has no chance
1314 of setting up a stack frame. */
1321 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1322 return fdata
.frameless
;
1325 /* Return the PC saved in a frame. */
1328 rs6000_frame_saved_pc (struct frame_info
*fi
)
1330 CORE_ADDR func_start
;
1331 struct rs6000_framedata fdata
;
1332 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1333 int wordsize
= tdep
->wordsize
;
1335 if (fi
->signal_handler_caller
)
1336 return read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
, wordsize
);
1338 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1339 return generic_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1341 func_start
= get_pc_function_start (fi
->pc
);
1343 /* If we failed to find the start of the function, it is a mistake
1344 to inspect the instructions. */
1348 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1350 if (fdata
.lr_offset
== 0 && fi
->next
!= NULL
)
1352 if (fi
->next
->signal_handler_caller
)
1353 return read_memory_addr (fi
->next
->frame
+ SIG_FRAME_LR_OFFSET
,
1356 return read_memory_addr (FRAME_CHAIN (fi
) + tdep
->lr_frame_offset
,
1360 if (fdata
.lr_offset
== 0)
1361 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1363 return read_memory_addr (FRAME_CHAIN (fi
) + fdata
.lr_offset
, wordsize
);
1366 /* If saved registers of frame FI are not known yet, read and cache them.
1367 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1368 in which case the framedata are read. */
1371 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1373 CORE_ADDR frame_addr
;
1374 struct rs6000_framedata work_fdata
;
1375 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1376 int wordsize
= tdep
->wordsize
;
1383 fdatap
= &work_fdata
;
1384 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, fdatap
);
1387 frame_saved_regs_zalloc (fi
);
1389 /* If there were any saved registers, figure out parent's stack
1391 /* The following is true only if the frame doesn't have a call to
1394 if (fdatap
->saved_fpr
== 0
1395 && fdatap
->saved_gpr
== 0
1396 && fdatap
->saved_vr
== 0
1397 && fdatap
->lr_offset
== 0
1398 && fdatap
->cr_offset
== 0
1399 && fdatap
->vr_offset
== 0)
1402 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1403 address of the current frame. Things might be easier if the
1404 ->frame pointed to the outer-most address of the frame. In the
1405 mean time, the address of the prev frame is used as the base
1406 address of this frame. */
1407 frame_addr
= FRAME_CHAIN (fi
);
1409 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1410 All fpr's from saved_fpr to fp31 are saved. */
1412 if (fdatap
->saved_fpr
>= 0)
1415 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1416 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1418 fi
->saved_regs
[FP0_REGNUM
+ i
] = fpr_addr
;
1423 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1424 All gpr's from saved_gpr to gpr31 are saved. */
1426 if (fdatap
->saved_gpr
>= 0)
1429 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1430 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1432 fi
->saved_regs
[i
] = gpr_addr
;
1433 gpr_addr
+= wordsize
;
1437 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1438 All vr's from saved_vr to vr31 are saved. */
1439 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1441 if (fdatap
->saved_vr
>= 0)
1444 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1445 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1447 fi
->saved_regs
[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1448 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1453 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1455 if (fdatap
->cr_offset
!= 0)
1456 fi
->saved_regs
[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1458 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1460 if (fdatap
->lr_offset
!= 0)
1461 fi
->saved_regs
[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1463 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1465 if (fdatap
->vrsave_offset
!= 0)
1466 fi
->saved_regs
[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1469 /* Return the address of a frame. This is the inital %sp value when the frame
1470 was first allocated. For functions calling alloca(), it might be saved in
1471 an alloca register. */
1474 frame_initial_stack_address (struct frame_info
*fi
)
1477 struct rs6000_framedata fdata
;
1478 struct frame_info
*callee_fi
;
1480 /* If the initial stack pointer (frame address) of this frame is known,
1483 if (fi
->extra_info
->initial_sp
)
1484 return fi
->extra_info
->initial_sp
;
1486 /* Find out if this function is using an alloca register. */
1488 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, &fdata
);
1490 /* If saved registers of this frame are not known yet, read and
1493 if (!fi
->saved_regs
)
1494 frame_get_saved_regs (fi
, &fdata
);
1496 /* If no alloca register used, then fi->frame is the value of the %sp for
1497 this frame, and it is good enough. */
1499 if (fdata
.alloca_reg
< 0)
1501 fi
->extra_info
->initial_sp
= fi
->frame
;
1502 return fi
->extra_info
->initial_sp
;
1505 /* There is an alloca register, use its value, in the current frame,
1506 as the initial stack pointer. */
1508 char *tmpbuf
= alloca (MAX_REGISTER_RAW_SIZE
);
1509 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1511 fi
->extra_info
->initial_sp
1512 = extract_unsigned_integer (tmpbuf
,
1513 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1516 /* NOTE: cagney/2002-04-17: At present the only time
1517 frame_register_read will fail is when the register isn't
1518 available. If that does happen, use the frame. */
1519 fi
->extra_info
->initial_sp
= fi
->frame
;
1521 return fi
->extra_info
->initial_sp
;
1524 /* Describe the pointer in each stack frame to the previous stack frame
1527 /* FRAME_CHAIN takes a frame's nominal address
1528 and produces the frame's chain-pointer. */
1530 /* In the case of the RS/6000, the frame's nominal address
1531 is the address of a 4-byte word containing the calling frame's address. */
1534 rs6000_frame_chain (struct frame_info
*thisframe
)
1536 CORE_ADDR fp
, fpp
, lr
;
1537 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1539 if (PC_IN_CALL_DUMMY (thisframe
->pc
, thisframe
->frame
, thisframe
->frame
))
1540 return thisframe
->frame
; /* dummy frame same as caller's frame */
1542 if (inside_entry_file (thisframe
->pc
) ||
1543 thisframe
->pc
== entry_point_address ())
1546 if (thisframe
->signal_handler_caller
)
1547 fp
= read_memory_addr (thisframe
->frame
+ SIG_FRAME_FP_OFFSET
,
1549 else if (thisframe
->next
!= NULL
1550 && thisframe
->next
->signal_handler_caller
1551 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1552 /* A frameless function interrupted by a signal did not change the
1554 fp
= FRAME_FP (thisframe
);
1556 fp
= read_memory_addr ((thisframe
)->frame
, wordsize
);
1558 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1559 if (lr
== entry_point_address ())
1560 if (fp
!= 0 && (fpp
= read_memory_addr (fp
, wordsize
)) != 0)
1561 if (PC_IN_CALL_DUMMY (lr
, fpp
, fpp
))
1567 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1568 isn't available with that word size, return 0. */
1571 regsize (const struct reg
*reg
, int wordsize
)
1573 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1576 /* Return the name of register number N, or null if no such register exists
1577 in the current architecture. */
1580 rs6000_register_name (int n
)
1582 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1583 const struct reg
*reg
= tdep
->regs
+ n
;
1585 if (!regsize (reg
, tdep
->wordsize
))
1590 /* Index within `registers' of the first byte of the space for
1594 rs6000_register_byte (int n
)
1596 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1599 /* Return the number of bytes of storage in the actual machine representation
1600 for register N if that register is available, else return 0. */
1603 rs6000_register_raw_size (int n
)
1605 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1606 const struct reg
*reg
= tdep
->regs
+ n
;
1607 return regsize (reg
, tdep
->wordsize
);
1610 /* Return the GDB type object for the "standard" data type
1611 of data in register N. */
1613 static struct type
*
1614 rs6000_register_virtual_type (int n
)
1616 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1617 const struct reg
*reg
= tdep
->regs
+ n
;
1620 return builtin_type_double
;
1623 int size
= regsize (reg
, tdep
->wordsize
);
1627 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1628 return builtin_type_vec64
;
1630 return builtin_type_int64
;
1633 return builtin_type_vec128
;
1636 return builtin_type_int32
;
1642 /* For the PowerPC, it appears that the debug info marks float parameters as
1643 floats regardless of whether the function is prototyped, but the actual
1644 values are always passed in as doubles. Tell gdb to always assume that
1645 floats are passed as doubles and then converted in the callee. */
1648 rs6000_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
1653 /* Return whether register N requires conversion when moving from raw format
1656 The register format for RS/6000 floating point registers is always
1657 double, we need a conversion if the memory format is float. */
1660 rs6000_register_convertible (int n
)
1662 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1666 /* Convert data from raw format for register N in buffer FROM
1667 to virtual format with type TYPE in buffer TO. */
1670 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1671 char *from
, char *to
)
1673 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1675 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1676 store_floating (to
, TYPE_LENGTH (type
), val
);
1679 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1682 /* Convert data from virtual format with type TYPE in buffer FROM
1683 to raw format for register N in buffer TO. */
1686 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1687 char *from
, char *to
)
1689 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1691 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1692 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1695 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1699 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1700 int reg_nr
, void *buffer
)
1704 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1705 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1707 if (reg_nr
>= tdep
->ppc_gp0_regnum
1708 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1710 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1712 /* Build the value in the provided buffer. */
1713 /* Read the raw register of which this one is the lower portion. */
1714 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1715 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1717 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1722 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1723 int reg_nr
, const void *buffer
)
1727 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1728 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1730 if (reg_nr
>= tdep
->ppc_gp0_regnum
1731 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1733 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1734 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1735 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1738 /* Let's read the value of the base register into a temporary
1739 buffer, so that overwriting the last four bytes with the new
1740 value of the pseudo will leave the upper 4 bytes unchanged. */
1741 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1743 /* Write as an 8 byte quantity. */
1744 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1745 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1749 /* Convert a dwarf2 register number to a gdb REGNUM. */
1751 e500_dwarf2_reg_to_regnum (int num
)
1754 if (0 <= num
&& num
<= 31)
1755 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1760 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1763 rs6000_stab_reg_to_regnum (int num
)
1769 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1772 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1775 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1778 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1787 /* Store the address of the place in which to copy the structure the
1788 subroutine will return. This is called from call_function.
1790 In RS/6000, struct return addresses are passed as an extra parameter in r3.
1791 In function return, callee is not responsible of returning this address
1792 back. Since gdb needs to find it, we will store in a designated variable
1793 `rs6000_struct_return_address'. */
1796 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1798 write_register (3, addr
);
1799 rs6000_struct_return_address
= addr
;
1802 /* Write into appropriate registers a function return value
1803 of type TYPE, given in virtual format. */
1806 rs6000_store_return_value (struct type
*type
, char *valbuf
)
1808 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1810 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1812 /* Floating point values are returned starting from FPR1 and up.
1813 Say a double_double_double type could be returned in
1814 FPR1/FPR2/FPR3 triple. */
1816 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
1817 TYPE_LENGTH (type
));
1818 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
1820 if (TYPE_LENGTH (type
) == 16
1821 && TYPE_VECTOR (type
))
1822 write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1823 valbuf
, TYPE_LENGTH (type
));
1826 /* Everything else is returned in GPR3 and up. */
1827 write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
1828 valbuf
, TYPE_LENGTH (type
));
1831 /* Extract from an array REGBUF containing the (raw) register state
1832 the address in which a function should return its structure value,
1833 as a CORE_ADDR (or an expression that can be used as one). */
1836 rs6000_extract_struct_value_address (char *regbuf
)
1838 return rs6000_struct_return_address
;
1841 /* Return whether PC is in a dummy function call.
1843 FIXME: This just checks for the end of the stack, which is broken
1844 for things like stepping through gcc nested function stubs. */
1847 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
1849 return sp
< pc
&& pc
< fp
;
1852 /* Hook called when a new child process is started. */
1855 rs6000_create_inferior (int pid
)
1857 if (rs6000_set_host_arch_hook
)
1858 rs6000_set_host_arch_hook (pid
);
1861 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
1863 Usually a function pointer's representation is simply the address
1864 of the function. On the RS/6000 however, a function pointer is
1865 represented by a pointer to a TOC entry. This TOC entry contains
1866 three words, the first word is the address of the function, the
1867 second word is the TOC pointer (r2), and the third word is the
1868 static chain value. Throughout GDB it is currently assumed that a
1869 function pointer contains the address of the function, which is not
1870 easy to fix. In addition, the conversion of a function address to
1871 a function pointer would require allocation of a TOC entry in the
1872 inferior's memory space, with all its drawbacks. To be able to
1873 call C++ virtual methods in the inferior (which are called via
1874 function pointers), find_function_addr uses this function to get the
1875 function address from a function pointer. */
1877 /* Return real function address if ADDR (a function pointer) is in the data
1878 space and is therefore a special function pointer. */
1881 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
1883 struct obj_section
*s
;
1885 s
= find_pc_section (addr
);
1886 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
1889 /* ADDR is in the data space, so it's a special function pointer. */
1890 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
1894 /* Handling the various POWER/PowerPC variants. */
1897 /* The arrays here called registers_MUMBLE hold information about available
1900 For each family of PPC variants, I've tried to isolate out the
1901 common registers and put them up front, so that as long as you get
1902 the general family right, GDB will correctly identify the registers
1903 common to that family. The common register sets are:
1905 For the 60x family: hid0 hid1 iabr dabr pir
1907 For the 505 and 860 family: eie eid nri
1909 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
1910 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1913 Most of these register groups aren't anything formal. I arrived at
1914 them by looking at the registers that occurred in more than one
1917 Note: kevinb/2002-04-30: Support for the fpscr register was added
1918 during April, 2002. Slot 70 is being used for PowerPC and slot 71
1919 for Power. For PowerPC, slot 70 was unused and was already in the
1920 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
1921 slot 70 was being used for "mq", so the next available slot (71)
1922 was chosen. It would have been nice to be able to make the
1923 register numbers the same across processor cores, but this wasn't
1924 possible without either 1) renumbering some registers for some
1925 processors or 2) assigning fpscr to a really high slot that's
1926 larger than any current register number. Doing (1) is bad because
1927 existing stubs would break. Doing (2) is undesirable because it
1928 would introduce a really large gap between fpscr and the rest of
1929 the registers for most processors. */
1931 /* Convenience macros for populating register arrays. */
1933 /* Within another macro, convert S to a string. */
1937 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
1938 and 64 bits on 64-bit systems. */
1939 #define R(name) { STR(name), 4, 8, 0, 0 }
1941 /* Return a struct reg defining register NAME that's 32 bits on all
1943 #define R4(name) { STR(name), 4, 4, 0, 0 }
1945 /* Return a struct reg defining register NAME that's 64 bits on all
1947 #define R8(name) { STR(name), 8, 8, 0, 0 }
1949 /* Return a struct reg defining register NAME that's 128 bits on all
1951 #define R16(name) { STR(name), 16, 16, 0, 0 }
1953 /* Return a struct reg defining floating-point register NAME. */
1954 #define F(name) { STR(name), 8, 8, 1, 0 }
1956 /* Return a struct reg defining a pseudo register NAME. */
1957 #define P(name) { STR(name), 4, 8, 0, 1}
1959 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
1960 systems and that doesn't exist on 64-bit systems. */
1961 #define R32(name) { STR(name), 4, 0, 0, 0 }
1963 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
1964 systems and that doesn't exist on 32-bit systems. */
1965 #define R64(name) { STR(name), 0, 8, 0, 0 }
1967 /* Return a struct reg placeholder for a register that doesn't exist. */
1968 #define R0 { 0, 0, 0, 0, 0 }
1970 /* UISA registers common across all architectures, including POWER. */
1972 #define COMMON_UISA_REGS \
1973 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1974 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1975 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1976 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1977 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
1978 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
1979 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
1980 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
1981 /* 64 */ R(pc), R(ps)
1983 #define COMMON_UISA_NOFP_REGS \
1984 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1985 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1986 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1987 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1988 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1989 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1990 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1991 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
1992 /* 64 */ R(pc), R(ps)
1994 /* UISA-level SPRs for PowerPC. */
1995 #define PPC_UISA_SPRS \
1996 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
1998 /* UISA-level SPRs for PowerPC without floating point support. */
1999 #define PPC_UISA_NOFP_SPRS \
2000 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2002 /* Segment registers, for PowerPC. */
2003 #define PPC_SEGMENT_REGS \
2004 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2005 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2006 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2007 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2009 /* OEA SPRs for PowerPC. */
2010 #define PPC_OEA_SPRS \
2012 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2013 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2014 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2015 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2016 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2017 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2018 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2019 /* 116 */ R4(dec), R(dabr), R4(ear)
2021 /* AltiVec registers. */
2022 #define PPC_ALTIVEC_REGS \
2023 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2024 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2025 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2026 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2027 /*151*/R4(vscr), R4(vrsave)
2029 /* Vectors of hi-lo general purpose registers. */
2030 #define PPC_EV_REGS \
2031 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2032 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2033 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2034 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2036 /* Lower half of the EV registers. */
2037 #define PPC_GPRS_PSEUDO_REGS \
2038 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2039 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2040 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2041 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
2043 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2044 user-level SPR's. */
2045 static const struct reg registers_power
[] =
2048 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2052 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2053 view of the PowerPC. */
2054 static const struct reg registers_powerpc
[] =
2061 /* PowerPC UISA - a PPC processor as viewed by user-level
2062 code, but without floating point registers. */
2063 static const struct reg registers_powerpc_nofp
[] =
2065 COMMON_UISA_NOFP_REGS
,
2069 /* IBM PowerPC 403. */
2070 static const struct reg registers_403
[] =
2076 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2077 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2078 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2079 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2080 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2081 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2084 /* IBM PowerPC 403GC. */
2085 static const struct reg registers_403GC
[] =
2091 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2092 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2093 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2094 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2095 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2096 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2097 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2098 /* 147 */ R(tbhu
), R(tblu
)
2101 /* Motorola PowerPC 505. */
2102 static const struct reg registers_505
[] =
2108 /* 119 */ R(eie
), R(eid
), R(nri
)
2111 /* Motorola PowerPC 860 or 850. */
2112 static const struct reg registers_860
[] =
2118 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2119 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2120 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2121 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2122 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2123 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2124 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2125 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2126 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2127 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2128 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2129 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2132 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2133 for reading and writing RTCU and RTCL. However, how one reads and writes a
2134 register is the stub's problem. */
2135 static const struct reg registers_601
[] =
2141 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2142 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2145 /* Motorola PowerPC 602. */
2146 static const struct reg registers_602
[] =
2152 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2153 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2154 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2157 /* Motorola/IBM PowerPC 603 or 603e. */
2158 static const struct reg registers_603
[] =
2164 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2165 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2166 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2169 /* Motorola PowerPC 604 or 604e. */
2170 static const struct reg registers_604
[] =
2176 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2177 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2178 /* 127 */ R(sia
), R(sda
)
2181 /* Motorola/IBM PowerPC 750 or 740. */
2182 static const struct reg registers_750
[] =
2188 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2189 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2190 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2191 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2192 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2193 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2197 /* Motorola PowerPC 7400. */
2198 static const struct reg registers_7400
[] =
2200 /* gpr0-gpr31, fpr0-fpr31 */
2202 /* ctr, xre, lr, cr */
2207 /* vr0-vr31, vrsave, vscr */
2209 /* FIXME? Add more registers? */
2212 /* Motorola e500. */
2213 static const struct reg registers_e500
[] =
2216 /* cr, lr, ctr, xer, "" */
2221 PPC_GPRS_PSEUDO_REGS
2224 /* Information about a particular processor variant. */
2228 /* Name of this variant. */
2231 /* English description of the variant. */
2234 /* bfd_arch_info.arch corresponding to variant. */
2235 enum bfd_architecture arch
;
2237 /* bfd_arch_info.mach corresponding to variant. */
2240 /* Number of real registers. */
2243 /* Number of pseudo registers. */
2246 /* Number of total registers (the sum of nregs and npregs). */
2249 /* Table of register names; registers[R] is the name of the register
2251 const struct reg
*regs
;
2254 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2257 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2262 for (i
= 0; i
< num_tot_regs
; i
++)
2263 if (!reg_list
[i
].pseudo
)
2270 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2275 for (i
= 0; i
< num_tot_regs
; i
++)
2276 if (reg_list
[i
].pseudo
)
2282 /* Information in this table comes from the following web sites:
2283 IBM: http://www.chips.ibm.com:80/products/embedded/
2284 Motorola: http://www.mot.com/SPS/PowerPC/
2286 I'm sure I've got some of the variant descriptions not quite right.
2287 Please report any inaccuracies you find to GDB's maintainer.
2289 If you add entries to this table, please be sure to allow the new
2290 value as an argument to the --with-cpu flag, in configure.in. */
2292 static struct variant variants
[] =
2295 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2296 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2298 {"power", "POWER user-level", bfd_arch_rs6000
,
2299 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2301 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2302 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2304 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2305 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2307 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2308 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2310 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2311 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2313 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2314 604, -1, -1, tot_num_registers (registers_604
),
2316 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2317 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2319 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2320 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2322 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2323 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2325 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2326 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2328 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2329 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2331 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2332 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2336 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2337 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2339 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2340 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2342 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2343 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2345 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2346 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2348 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2349 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2351 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2352 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2355 /* FIXME: I haven't checked the register sets of the following. */
2356 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2357 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2359 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2360 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2362 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2363 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2366 {0, 0, 0, 0, 0, 0, 0, 0}
2369 /* Initialize the number of registers and pseudo registers in each variant. */
2372 init_variants (void)
2376 for (v
= variants
; v
->name
; v
++)
2379 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2380 if (v
->npregs
== -1)
2381 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2385 /* Return the variant corresponding to architecture ARCH and machine number
2386 MACH. If no such variant exists, return null. */
2388 static const struct variant
*
2389 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2391 const struct variant
*v
;
2393 for (v
= variants
; v
->name
; v
++)
2394 if (arch
== v
->arch
&& mach
== v
->mach
)
2401 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2403 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2404 return print_insn_big_powerpc (memaddr
, info
);
2406 return print_insn_little_powerpc (memaddr
, info
);
2409 /* Initialize the current architecture based on INFO. If possible, re-use an
2410 architecture from ARCHES, which is a list of architectures already created
2411 during this debugging session.
2413 Called e.g. at program startup, when reading a core file, and when reading
2416 static struct gdbarch
*
2417 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2419 struct gdbarch
*gdbarch
;
2420 struct gdbarch_tdep
*tdep
;
2421 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2423 const struct variant
*v
;
2424 enum bfd_architecture arch
;
2428 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2431 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2432 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2434 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2435 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2437 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2440 osabi
= gdbarch_lookup_osabi (info
.abfd
);
2442 /* Check word size. If INFO is from a binary file, infer it from
2443 that, else choose a likely default. */
2444 if (from_xcoff_exec
)
2446 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2451 else if (from_elf_exec
)
2453 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2460 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2461 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2462 info
.bfd_arch_info
->bits_per_byte
;
2467 /* Find a candidate among extant architectures. */
2468 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2470 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2472 /* Word size in the various PowerPC bfd_arch_info structs isn't
2473 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2474 separate word size check. */
2475 tdep
= gdbarch_tdep (arches
->gdbarch
);
2476 if (tdep
&& tdep
->wordsize
== wordsize
&& tdep
->osabi
== osabi
)
2477 return arches
->gdbarch
;
2480 /* None found, create a new architecture from INFO, whose bfd_arch_info
2481 validity depends on the source:
2482 - executable useless
2483 - rs6000_host_arch() good
2485 - "set arch" trust blindly
2486 - GDB startup useless but harmless */
2488 if (!from_xcoff_exec
)
2490 arch
= info
.bfd_arch_info
->arch
;
2491 mach
= info
.bfd_arch_info
->mach
;
2495 arch
= bfd_arch_powerpc
;
2497 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2498 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2500 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2501 tdep
->wordsize
= wordsize
;
2502 tdep
->osabi
= osabi
;
2504 /* For e500 executables, the apuinfo section is of help here. Such
2505 section contains the identifier and revision number of each
2506 Application-specific Processing Unit that is present on the
2507 chip. The content of the section is determined by the assembler
2508 which looks at each instruction and determines which unit (and
2509 which version of it) can execute it. In our case we just look for
2510 the existance of the section. */
2514 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2517 arch
= info
.bfd_arch_info
->arch
;
2518 mach
= bfd_mach_ppc_e500
;
2519 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2520 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2524 gdbarch
= gdbarch_alloc (&info
, tdep
);
2525 power
= arch
== bfd_arch_rs6000
;
2527 /* Initialize the number of real and pseudo registers in each variant. */
2530 /* Choose variant. */
2531 v
= find_variant_by_arch (arch
, mach
);
2535 tdep
->regs
= v
->regs
;
2537 tdep
->ppc_gp0_regnum
= 0;
2538 tdep
->ppc_gplast_regnum
= 31;
2539 tdep
->ppc_toc_regnum
= 2;
2540 tdep
->ppc_ps_regnum
= 65;
2541 tdep
->ppc_cr_regnum
= 66;
2542 tdep
->ppc_lr_regnum
= 67;
2543 tdep
->ppc_ctr_regnum
= 68;
2544 tdep
->ppc_xer_regnum
= 69;
2545 if (v
->mach
== bfd_mach_ppc_601
)
2546 tdep
->ppc_mq_regnum
= 124;
2548 tdep
->ppc_mq_regnum
= 70;
2550 tdep
->ppc_mq_regnum
= -1;
2551 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2553 set_gdbarch_pc_regnum (gdbarch
, 64);
2554 set_gdbarch_sp_regnum (gdbarch
, 1);
2555 set_gdbarch_fp_regnum (gdbarch
, 1);
2557 if (v
->arch
== bfd_arch_powerpc
)
2561 tdep
->ppc_vr0_regnum
= 71;
2562 tdep
->ppc_vrsave_regnum
= 104;
2563 tdep
->ppc_ev0_regnum
= -1;
2564 tdep
->ppc_ev31_regnum
= -1;
2566 case bfd_mach_ppc_7400
:
2567 tdep
->ppc_vr0_regnum
= 119;
2568 tdep
->ppc_vrsave_regnum
= 153;
2569 tdep
->ppc_ev0_regnum
= -1;
2570 tdep
->ppc_ev31_regnum
= -1;
2572 case bfd_mach_ppc_e500
:
2573 tdep
->ppc_gp0_regnum
= 39;
2574 tdep
->ppc_gplast_regnum
= 70;
2575 tdep
->ppc_toc_regnum
= -1;
2576 tdep
->ppc_ps_regnum
= 1;
2577 tdep
->ppc_cr_regnum
= 2;
2578 tdep
->ppc_lr_regnum
= 3;
2579 tdep
->ppc_ctr_regnum
= 4;
2580 tdep
->ppc_xer_regnum
= 5;
2581 tdep
->ppc_ev0_regnum
= 7;
2582 tdep
->ppc_ev31_regnum
= 38;
2583 set_gdbarch_pc_regnum (gdbarch
, 0);
2584 set_gdbarch_sp_regnum (gdbarch
, 40);
2585 set_gdbarch_fp_regnum (gdbarch
, 40);
2586 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2587 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2588 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2591 tdep
->ppc_vr0_regnum
= -1;
2592 tdep
->ppc_vrsave_regnum
= -1;
2593 tdep
->ppc_ev0_regnum
= -1;
2594 tdep
->ppc_ev31_regnum
= -1;
2598 /* Set lr_frame_offset. */
2600 tdep
->lr_frame_offset
= 16;
2602 tdep
->lr_frame_offset
= 4;
2604 tdep
->lr_frame_offset
= 8;
2606 /* Calculate byte offsets in raw register array. */
2607 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2608 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2610 tdep
->regoff
[i
] = off
;
2611 off
+= regsize (v
->regs
+ i
, wordsize
);
2614 /* Select instruction printer. */
2616 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2618 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2620 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2621 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2622 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2623 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2624 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2626 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2627 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2628 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2629 set_gdbarch_register_size (gdbarch
, wordsize
);
2630 set_gdbarch_register_bytes (gdbarch
, off
);
2631 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2632 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2633 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2634 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
2635 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2636 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2638 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2639 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2640 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2641 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2642 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2643 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2644 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2645 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2646 set_gdbarch_char_signed (gdbarch
, 0);
2648 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2649 set_gdbarch_call_dummy_length (gdbarch
, 0);
2650 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2651 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2652 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2653 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2654 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2655 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2656 set_gdbarch_call_dummy_p (gdbarch
, 1);
2657 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2658 set_gdbarch_get_saved_register (gdbarch
, generic_unwind_get_saved_register
);
2659 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2660 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2661 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2662 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2663 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2664 set_gdbarch_coerce_float_to_double (gdbarch
, rs6000_coerce_float_to_double
);
2666 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2667 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2668 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2669 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2671 set_gdbarch_deprecated_extract_return_value (gdbarch
, rs6000_extract_return_value
);
2673 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2674 is correct for the SysV ABI when the wordsize is 8, but I'm also
2675 fairly certain that ppc_sysv_abi_push_arguments() will give even
2676 worse results since it only works for 32-bit code. So, for the moment,
2677 we're better off calling rs6000_push_arguments() since it works for
2678 64-bit code. At some point in the future, this matter needs to be
2680 if (sysv_abi
&& wordsize
== 4)
2681 set_gdbarch_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2683 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2685 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2686 set_gdbarch_store_return_value (gdbarch
, rs6000_store_return_value
);
2687 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2688 set_gdbarch_pop_frame (gdbarch
, rs6000_pop_frame
);
2690 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2691 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2692 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2693 set_gdbarch_function_start_offset (gdbarch
, 0);
2694 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2696 /* Not sure on this. FIXMEmgo */
2697 set_gdbarch_frame_args_skip (gdbarch
, 8);
2700 set_gdbarch_use_struct_convention (gdbarch
,
2701 ppc_sysv_abi_use_struct_convention
);
2703 set_gdbarch_use_struct_convention (gdbarch
,
2704 generic_use_struct_convention
);
2706 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
2708 set_gdbarch_frameless_function_invocation (gdbarch
,
2709 rs6000_frameless_function_invocation
);
2710 set_gdbarch_frame_chain (gdbarch
, rs6000_frame_chain
);
2711 set_gdbarch_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2713 set_gdbarch_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2714 set_gdbarch_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2718 /* Handle RS/6000 function pointers (which are really function
2720 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2721 rs6000_convert_from_func_ptr_addr
);
2723 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2724 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2725 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2727 /* We can't tell how many args there are
2728 now that the C compiler delays popping them. */
2729 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2731 /* Hook in ABI-specific overrides, if they have been registered. */
2732 gdbarch_init_osabi (info
, gdbarch
, osabi
);
2738 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2740 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2745 fprintf_unfiltered (file
, "rs6000_dump_tdep: OS ABI = %s\n",
2746 gdbarch_osabi_name (tdep
->osabi
));
2749 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2752 rs6000_info_powerpc_command (char *args
, int from_tty
)
2754 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2757 /* Initialization code. */
2760 _initialize_rs6000_tdep (void)
2762 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2763 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2765 /* Add root prefix command for "info powerpc" commands */
2766 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2767 "Various POWERPC info specific commands.",
2768 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);