Fix typo in gdb.python/py-objfile.exp
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 2001-2015 Free Software Foundation, Inc.
4
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22
23 #include "defs.h"
24 #include "arch-utils.h"
25 #include "frame.h"
26 #include "inferior.h"
27 #include "infrun.h"
28 #include "symtab.h"
29 #include "target.h"
30 #include "gdbcore.h"
31 #include "gdbcmd.h"
32 #include "objfiles.h"
33 #include "floatformat.h"
34 #include "regcache.h"
35 #include "trad-frame.h"
36 #include "frame-base.h"
37 #include "frame-unwind.h"
38 #include "dwarf2-frame.h"
39 #include "reggroups.h"
40 #include "regset.h"
41 #include "value.h"
42 #include "dis-asm.h"
43 #include "solib-svr4.h"
44 #include "prologue-value.h"
45 #include "linux-tdep.h"
46 #include "s390-linux-tdep.h"
47 #include "auxv.h"
48 #include "xml-syscall.h"
49
50 #include "stap-probe.h"
51 #include "ax.h"
52 #include "ax-gdb.h"
53 #include "user-regs.h"
54 #include "cli/cli-utils.h"
55 #include <ctype.h>
56 #include "elf/common.h"
57 #include "elf/s390.h"
58 #include "elf-bfd.h"
59
60 #include "features/s390-linux32.c"
61 #include "features/s390-linux32v1.c"
62 #include "features/s390-linux32v2.c"
63 #include "features/s390-linux64.c"
64 #include "features/s390-linux64v1.c"
65 #include "features/s390-linux64v2.c"
66 #include "features/s390-te-linux64.c"
67 #include "features/s390-vx-linux64.c"
68 #include "features/s390-tevx-linux64.c"
69 #include "features/s390x-linux64.c"
70 #include "features/s390x-linux64v1.c"
71 #include "features/s390x-linux64v2.c"
72 #include "features/s390x-te-linux64.c"
73 #include "features/s390x-vx-linux64.c"
74 #include "features/s390x-tevx-linux64.c"
75
76 #define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
77 #define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
78
79 enum s390_abi_kind
80 {
81 ABI_LINUX_S390,
82 ABI_LINUX_ZSERIES
83 };
84
85 enum s390_vector_abi_kind
86 {
87 S390_VECTOR_ABI_NONE,
88 S390_VECTOR_ABI_128
89 };
90
91 /* The tdep structure. */
92
93 struct gdbarch_tdep
94 {
95 /* ABI version. */
96 enum s390_abi_kind abi;
97
98 /* Vector ABI. */
99 enum s390_vector_abi_kind vector_abi;
100
101 /* Pseudo register numbers. */
102 int gpr_full_regnum;
103 int pc_regnum;
104 int cc_regnum;
105 int v0_full_regnum;
106
107 int have_linux_v1;
108 int have_linux_v2;
109 int have_tdb;
110 };
111
112
113 /* ABI call-saved register information. */
114
115 static int
116 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
117 {
118 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
119
120 switch (tdep->abi)
121 {
122 case ABI_LINUX_S390:
123 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
124 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
125 || regnum == S390_A0_REGNUM)
126 return 1;
127
128 break;
129
130 case ABI_LINUX_ZSERIES:
131 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
132 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
133 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
134 return 1;
135
136 break;
137 }
138
139 return 0;
140 }
141
142 static int
143 s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
144 {
145 /* The last-break address is read-only. */
146 return regnum == S390_LAST_BREAK_REGNUM;
147 }
148
149 static void
150 s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
151 {
152 struct gdbarch *gdbarch = get_regcache_arch (regcache);
153 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
154
155 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
156
157 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
158 messing with the PC we just installed, if we happen to be within
159 an interrupted system call that the kernel wants to restart.
160
161 Note that after we return from the dummy call, the SYSTEM_CALL and
162 ORIG_R2 registers will be automatically restored, and the kernel
163 continues to restart the system call at this point. */
164 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
165 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
166 }
167
168
169 /* DWARF Register Mapping. */
170
171 static const short s390_dwarf_regmap[] =
172 {
173 /* 0-15: General Purpose Registers. */
174 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
175 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
176 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
177 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
178
179 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
180 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
181 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
182 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
183 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
184
185 /* 32-47: Control Registers (not mapped). */
186 -1, -1, -1, -1, -1, -1, -1, -1,
187 -1, -1, -1, -1, -1, -1, -1, -1,
188
189 /* 48-63: Access Registers. */
190 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
191 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
192 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
193 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
194
195 /* 64-65: Program Status Word. */
196 S390_PSWM_REGNUM,
197 S390_PSWA_REGNUM,
198
199 /* 66-67: Reserved. */
200 -1, -1,
201
202 /* 68-83: Vector Registers 16-31. */
203 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
204 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
205 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
206 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
207
208 /* End of "official" DWARF registers. The remainder of the map is
209 for GDB internal use only. */
210
211 /* GPR Lower Half Access. */
212 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
213 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
214 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
215 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
216 };
217
218 enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
219
220 /* Convert DWARF register number REG to the appropriate register
221 number used by GDB. */
222 static int
223 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
224 {
225 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
226 int gdb_reg = -1;
227
228 /* In a 32-on-64 debug scenario, debug info refers to the full
229 64-bit GPRs. Note that call frame information still refers to
230 the 32-bit lower halves, because s390_adjust_frame_regnum uses
231 special register numbers to access GPRs. */
232 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
233 return tdep->gpr_full_regnum + reg;
234
235 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
236 gdb_reg = s390_dwarf_regmap[reg];
237
238 if (tdep->v0_full_regnum == -1)
239 {
240 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
241 gdb_reg = -1;
242 }
243 else
244 {
245 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
246 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
247 }
248
249 return gdb_reg;
250 }
251
252 /* Translate a .eh_frame register to DWARF register, or adjust a
253 .debug_frame register. */
254 static int
255 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
256 {
257 /* See s390_dwarf_reg_to_regnum for comments. */
258 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
259 }
260
261
262 /* Pseudo registers. */
263
264 static int
265 regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
266 {
267 return (tdep->gpr_full_regnum != -1
268 && regnum >= tdep->gpr_full_regnum
269 && regnum <= tdep->gpr_full_regnum + 15);
270 }
271
272 /* Check whether REGNUM indicates a full vector register (v0-v15).
273 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
274
275 static int
276 regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
277 {
278 return (tdep->v0_full_regnum != -1
279 && regnum >= tdep->v0_full_regnum
280 && regnum <= tdep->v0_full_regnum + 15);
281 }
282
283 /* Return the name of register REGNO. Return the empty string for
284 registers that shouldn't be visible. */
285
286 static const char *
287 s390_register_name (struct gdbarch *gdbarch, int regnum)
288 {
289 if (regnum >= S390_V0_LOWER_REGNUM
290 && regnum <= S390_V15_LOWER_REGNUM)
291 return "";
292 return tdesc_register_name (gdbarch, regnum);
293 }
294
295 static const char *
296 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
297 {
298 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
299
300 if (regnum == tdep->pc_regnum)
301 return "pc";
302
303 if (regnum == tdep->cc_regnum)
304 return "cc";
305
306 if (regnum_is_gpr_full (tdep, regnum))
307 {
308 static const char *full_name[] = {
309 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
310 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
311 };
312 return full_name[regnum - tdep->gpr_full_regnum];
313 }
314
315 if (regnum_is_vxr_full (tdep, regnum))
316 {
317 static const char *full_name[] = {
318 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
319 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
320 };
321 return full_name[regnum - tdep->v0_full_regnum];
322 }
323
324 internal_error (__FILE__, __LINE__, _("invalid regnum"));
325 }
326
327 static struct type *
328 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
329 {
330 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
331
332 if (regnum == tdep->pc_regnum)
333 return builtin_type (gdbarch)->builtin_func_ptr;
334
335 if (regnum == tdep->cc_regnum)
336 return builtin_type (gdbarch)->builtin_int;
337
338 if (regnum_is_gpr_full (tdep, regnum))
339 return builtin_type (gdbarch)->builtin_uint64;
340
341 if (regnum_is_vxr_full (tdep, regnum))
342 return tdesc_find_type (gdbarch, "vec128");
343
344 internal_error (__FILE__, __LINE__, _("invalid regnum"));
345 }
346
347 static enum register_status
348 s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
349 int regnum, gdb_byte *buf)
350 {
351 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
352 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
353 int regsize = register_size (gdbarch, regnum);
354 ULONGEST val;
355
356 if (regnum == tdep->pc_regnum)
357 {
358 enum register_status status;
359
360 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
361 if (status == REG_VALID)
362 {
363 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
364 val &= 0x7fffffff;
365 store_unsigned_integer (buf, regsize, byte_order, val);
366 }
367 return status;
368 }
369
370 if (regnum == tdep->cc_regnum)
371 {
372 enum register_status status;
373
374 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
375 if (status == REG_VALID)
376 {
377 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
378 val = (val >> 12) & 3;
379 else
380 val = (val >> 44) & 3;
381 store_unsigned_integer (buf, regsize, byte_order, val);
382 }
383 return status;
384 }
385
386 if (regnum_is_gpr_full (tdep, regnum))
387 {
388 enum register_status status;
389 ULONGEST val_upper;
390
391 regnum -= tdep->gpr_full_regnum;
392
393 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
394 if (status == REG_VALID)
395 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
396 &val_upper);
397 if (status == REG_VALID)
398 {
399 val |= val_upper << 32;
400 store_unsigned_integer (buf, regsize, byte_order, val);
401 }
402 return status;
403 }
404
405 if (regnum_is_vxr_full (tdep, regnum))
406 {
407 enum register_status status;
408
409 regnum -= tdep->v0_full_regnum;
410
411 status = regcache_raw_read (regcache, S390_F0_REGNUM + regnum, buf);
412 if (status == REG_VALID)
413 status = regcache_raw_read (regcache,
414 S390_V0_LOWER_REGNUM + regnum, buf + 8);
415 return status;
416 }
417
418 internal_error (__FILE__, __LINE__, _("invalid regnum"));
419 }
420
421 static void
422 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
423 int regnum, const gdb_byte *buf)
424 {
425 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
426 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
427 int regsize = register_size (gdbarch, regnum);
428 ULONGEST val, psw;
429
430 if (regnum == tdep->pc_regnum)
431 {
432 val = extract_unsigned_integer (buf, regsize, byte_order);
433 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
434 {
435 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
436 val = (psw & 0x80000000) | (val & 0x7fffffff);
437 }
438 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
439 return;
440 }
441
442 if (regnum == tdep->cc_regnum)
443 {
444 val = extract_unsigned_integer (buf, regsize, byte_order);
445 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
446 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
447 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
448 else
449 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
450 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
451 return;
452 }
453
454 if (regnum_is_gpr_full (tdep, regnum))
455 {
456 regnum -= tdep->gpr_full_regnum;
457 val = extract_unsigned_integer (buf, regsize, byte_order);
458 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
459 val & 0xffffffff);
460 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
461 val >> 32);
462 return;
463 }
464
465 if (regnum_is_vxr_full (tdep, regnum))
466 {
467 regnum -= tdep->v0_full_regnum;
468 regcache_raw_write (regcache, S390_F0_REGNUM + regnum, buf);
469 regcache_raw_write (regcache, S390_V0_LOWER_REGNUM + regnum, buf + 8);
470 return;
471 }
472
473 internal_error (__FILE__, __LINE__, _("invalid regnum"));
474 }
475
476 /* 'float' values are stored in the upper half of floating-point
477 registers, even though we are otherwise a big-endian platform. The
478 same applies to a 'float' value within a vector. */
479
480 static struct value *
481 s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
482 int regnum, struct frame_id frame_id)
483 {
484 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
485 struct value *value = default_value_from_register (gdbarch, type,
486 regnum, frame_id);
487 check_typedef (type);
488
489 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
490 && TYPE_LENGTH (type) < 8)
491 || regnum_is_vxr_full (tdep, regnum)
492 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
493 set_value_offset (value, 0);
494
495 return value;
496 }
497
498 /* Register groups. */
499
500 static int
501 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
502 struct reggroup *group)
503 {
504 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
505
506 /* We usually save/restore the whole PSW, which includes PC and CC.
507 However, some older gdbservers may not support saving/restoring
508 the whole PSW yet, and will return an XML register description
509 excluding those from the save/restore register groups. In those
510 cases, we still need to explicitly save/restore PC and CC in order
511 to push or pop frames. Since this doesn't hurt anything if we
512 already save/restore the whole PSW (it's just redundant), we add
513 PC and CC at this point unconditionally. */
514 if (group == save_reggroup || group == restore_reggroup)
515 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
516
517 if (group == vector_reggroup)
518 return regnum_is_vxr_full (tdep, regnum);
519
520 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
521 return 0;
522
523 return default_register_reggroup_p (gdbarch, regnum, group);
524 }
525
526
527 /* Maps for register sets. */
528
529 static const struct regcache_map_entry s390_gregmap[] =
530 {
531 { 1, S390_PSWM_REGNUM },
532 { 1, S390_PSWA_REGNUM },
533 { 16, S390_R0_REGNUM },
534 { 16, S390_A0_REGNUM },
535 { 1, S390_ORIG_R2_REGNUM },
536 { 0 }
537 };
538
539 static const struct regcache_map_entry s390_fpregmap[] =
540 {
541 { 1, S390_FPC_REGNUM, 8 },
542 { 16, S390_F0_REGNUM, 8 },
543 { 0 }
544 };
545
546 static const struct regcache_map_entry s390_regmap_upper[] =
547 {
548 { 16, S390_R0_UPPER_REGNUM, 4 },
549 { 0 }
550 };
551
552 static const struct regcache_map_entry s390_regmap_last_break[] =
553 {
554 { 1, REGCACHE_MAP_SKIP, 4 },
555 { 1, S390_LAST_BREAK_REGNUM, 4 },
556 { 0 }
557 };
558
559 static const struct regcache_map_entry s390x_regmap_last_break[] =
560 {
561 { 1, S390_LAST_BREAK_REGNUM, 8 },
562 { 0 }
563 };
564
565 static const struct regcache_map_entry s390_regmap_system_call[] =
566 {
567 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
568 { 0 }
569 };
570
571 static const struct regcache_map_entry s390_regmap_tdb[] =
572 {
573 { 1, S390_TDB_DWORD0_REGNUM, 8 },
574 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
575 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
576 { 1, S390_TDB_ATIA_REGNUM, 8 },
577 { 12, REGCACHE_MAP_SKIP, 8 },
578 { 16, S390_TDB_R0_REGNUM, 8 },
579 { 0 }
580 };
581
582 static const struct regcache_map_entry s390_regmap_vxrs_low[] =
583 {
584 { 16, S390_V0_LOWER_REGNUM, 8 },
585 { 0 }
586 };
587
588 static const struct regcache_map_entry s390_regmap_vxrs_high[] =
589 {
590 { 16, S390_V16_REGNUM, 16 },
591 { 0 }
592 };
593
594
595 /* Supply the TDB regset. Like regcache_supply_regset, but invalidate
596 the TDB registers unless the TDB format field is valid. */
597
598 static void
599 s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
600 int regnum, const void *regs, size_t len)
601 {
602 ULONGEST tdw;
603 enum register_status ret;
604 int i;
605
606 regcache_supply_regset (regset, regcache, regnum, regs, len);
607 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
608 if (ret != REG_VALID || (tdw >> 56) != 1)
609 regcache_supply_regset (regset, regcache, regnum, NULL, len);
610 }
611
612 const struct regset s390_gregset = {
613 s390_gregmap,
614 regcache_supply_regset,
615 regcache_collect_regset
616 };
617
618 const struct regset s390_fpregset = {
619 s390_fpregmap,
620 regcache_supply_regset,
621 regcache_collect_regset
622 };
623
624 static const struct regset s390_upper_regset = {
625 s390_regmap_upper,
626 regcache_supply_regset,
627 regcache_collect_regset
628 };
629
630 const struct regset s390_last_break_regset = {
631 s390_regmap_last_break,
632 regcache_supply_regset,
633 regcache_collect_regset
634 };
635
636 const struct regset s390x_last_break_regset = {
637 s390x_regmap_last_break,
638 regcache_supply_regset,
639 regcache_collect_regset
640 };
641
642 const struct regset s390_system_call_regset = {
643 s390_regmap_system_call,
644 regcache_supply_regset,
645 regcache_collect_regset
646 };
647
648 const struct regset s390_tdb_regset = {
649 s390_regmap_tdb,
650 s390_supply_tdb_regset,
651 regcache_collect_regset
652 };
653
654 const struct regset s390_vxrs_low_regset = {
655 s390_regmap_vxrs_low,
656 regcache_supply_regset,
657 regcache_collect_regset
658 };
659
660 const struct regset s390_vxrs_high_regset = {
661 s390_regmap_vxrs_high,
662 regcache_supply_regset,
663 regcache_collect_regset
664 };
665
666 /* Iterate over supported core file register note sections. */
667
668 static void
669 s390_iterate_over_regset_sections (struct gdbarch *gdbarch,
670 iterate_over_regset_sections_cb *cb,
671 void *cb_data,
672 const struct regcache *regcache)
673 {
674 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
675 const int gregset_size = (tdep->abi == ABI_LINUX_S390 ?
676 s390_sizeof_gregset : s390x_sizeof_gregset);
677
678 cb (".reg", gregset_size, &s390_gregset, NULL, cb_data);
679 cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data);
680
681 if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1)
682 cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset,
683 "s390 GPR upper halves", cb_data);
684
685 if (tdep->have_linux_v1)
686 cb (".reg-s390-last-break", 8,
687 (gdbarch_ptr_bit (gdbarch) == 32
688 ? &s390_last_break_regset : &s390x_last_break_regset),
689 "s930 last-break address", cb_data);
690
691 if (tdep->have_linux_v2)
692 cb (".reg-s390-system-call", 4, &s390_system_call_regset,
693 "s390 system-call", cb_data);
694
695 /* If regcache is set, we are in "write" (gcore) mode. In this
696 case, don't iterate over the TDB unless its registers are
697 available. */
698 if (tdep->have_tdb
699 && (regcache == NULL
700 || REG_VALID == regcache_register_status (regcache,
701 S390_TDB_DWORD0_REGNUM)))
702 cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset,
703 "s390 TDB", cb_data);
704
705 if (tdep->v0_full_regnum != -1)
706 {
707 cb (".reg-s390-vxrs-low", 16 * 8, &s390_vxrs_low_regset,
708 "s390 vector registers 0-15 lower half", cb_data);
709 cb (".reg-s390-vxrs-high", 16 * 16, &s390_vxrs_high_regset,
710 "s390 vector registers 16-31", cb_data);
711 }
712 }
713
714 static const struct target_desc *
715 s390_core_read_description (struct gdbarch *gdbarch,
716 struct target_ops *target, bfd *abfd)
717 {
718 asection *section = bfd_get_section_by_name (abfd, ".reg");
719 CORE_ADDR hwcap = 0;
720 int high_gprs, v1, v2, te, vx;
721
722 target_auxv_search (target, AT_HWCAP, &hwcap);
723 if (!section)
724 return NULL;
725
726 high_gprs = (bfd_get_section_by_name (abfd, ".reg-s390-high-gprs")
727 != NULL);
728 v1 = (bfd_get_section_by_name (abfd, ".reg-s390-last-break") != NULL);
729 v2 = (bfd_get_section_by_name (abfd, ".reg-s390-system-call") != NULL);
730 vx = (hwcap & HWCAP_S390_VX);
731 te = (hwcap & HWCAP_S390_TE);
732
733 switch (bfd_section_size (abfd, section))
734 {
735 case s390_sizeof_gregset:
736 if (high_gprs)
737 return (te && vx ? tdesc_s390_tevx_linux64 :
738 vx ? tdesc_s390_vx_linux64 :
739 te ? tdesc_s390_te_linux64 :
740 v2 ? tdesc_s390_linux64v2 :
741 v1 ? tdesc_s390_linux64v1 : tdesc_s390_linux64);
742 else
743 return (v2 ? tdesc_s390_linux32v2 :
744 v1 ? tdesc_s390_linux32v1 : tdesc_s390_linux32);
745
746 case s390x_sizeof_gregset:
747 return (te && vx ? tdesc_s390x_tevx_linux64 :
748 vx ? tdesc_s390x_vx_linux64 :
749 te ? tdesc_s390x_te_linux64 :
750 v2 ? tdesc_s390x_linux64v2 :
751 v1 ? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
752
753 default:
754 return NULL;
755 }
756 }
757
758
759 /* Decoding S/390 instructions. */
760
761 /* Named opcode values for the S/390 instructions we recognize. Some
762 instructions have their opcode split across two fields; those are the
763 op1_* and op2_* enums. */
764 enum
765 {
766 op1_lhi = 0xa7, op2_lhi = 0x08,
767 op1_lghi = 0xa7, op2_lghi = 0x09,
768 op1_lgfi = 0xc0, op2_lgfi = 0x01,
769 op_lr = 0x18,
770 op_lgr = 0xb904,
771 op_l = 0x58,
772 op1_ly = 0xe3, op2_ly = 0x58,
773 op1_lg = 0xe3, op2_lg = 0x04,
774 op_lm = 0x98,
775 op1_lmy = 0xeb, op2_lmy = 0x98,
776 op1_lmg = 0xeb, op2_lmg = 0x04,
777 op_st = 0x50,
778 op1_sty = 0xe3, op2_sty = 0x50,
779 op1_stg = 0xe3, op2_stg = 0x24,
780 op_std = 0x60,
781 op_stm = 0x90,
782 op1_stmy = 0xeb, op2_stmy = 0x90,
783 op1_stmg = 0xeb, op2_stmg = 0x24,
784 op1_aghi = 0xa7, op2_aghi = 0x0b,
785 op1_ahi = 0xa7, op2_ahi = 0x0a,
786 op1_agfi = 0xc2, op2_agfi = 0x08,
787 op1_afi = 0xc2, op2_afi = 0x09,
788 op1_algfi= 0xc2, op2_algfi= 0x0a,
789 op1_alfi = 0xc2, op2_alfi = 0x0b,
790 op_ar = 0x1a,
791 op_agr = 0xb908,
792 op_a = 0x5a,
793 op1_ay = 0xe3, op2_ay = 0x5a,
794 op1_ag = 0xe3, op2_ag = 0x08,
795 op1_slgfi= 0xc2, op2_slgfi= 0x04,
796 op1_slfi = 0xc2, op2_slfi = 0x05,
797 op_sr = 0x1b,
798 op_sgr = 0xb909,
799 op_s = 0x5b,
800 op1_sy = 0xe3, op2_sy = 0x5b,
801 op1_sg = 0xe3, op2_sg = 0x09,
802 op_nr = 0x14,
803 op_ngr = 0xb980,
804 op_la = 0x41,
805 op1_lay = 0xe3, op2_lay = 0x71,
806 op1_larl = 0xc0, op2_larl = 0x00,
807 op_basr = 0x0d,
808 op_bas = 0x4d,
809 op_bcr = 0x07,
810 op_bc = 0x0d,
811 op_bctr = 0x06,
812 op_bctgr = 0xb946,
813 op_bct = 0x46,
814 op1_bctg = 0xe3, op2_bctg = 0x46,
815 op_bxh = 0x86,
816 op1_bxhg = 0xeb, op2_bxhg = 0x44,
817 op_bxle = 0x87,
818 op1_bxleg= 0xeb, op2_bxleg= 0x45,
819 op1_bras = 0xa7, op2_bras = 0x05,
820 op1_brasl= 0xc0, op2_brasl= 0x05,
821 op1_brc = 0xa7, op2_brc = 0x04,
822 op1_brcl = 0xc0, op2_brcl = 0x04,
823 op1_brct = 0xa7, op2_brct = 0x06,
824 op1_brctg= 0xa7, op2_brctg= 0x07,
825 op_brxh = 0x84,
826 op1_brxhg= 0xec, op2_brxhg= 0x44,
827 op_brxle = 0x85,
828 op1_brxlg= 0xec, op2_brxlg= 0x45,
829 op_svc = 0x0a,
830 };
831
832
833 /* Read a single instruction from address AT. */
834
835 #define S390_MAX_INSTR_SIZE 6
836 static int
837 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
838 {
839 static int s390_instrlen[] = { 2, 4, 4, 6 };
840 int instrlen;
841
842 if (target_read_memory (at, &instr[0], 2))
843 return -1;
844 instrlen = s390_instrlen[instr[0] >> 6];
845 if (instrlen > 2)
846 {
847 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
848 return -1;
849 }
850 return instrlen;
851 }
852
853
854 /* The functions below are for recognizing and decoding S/390
855 instructions of various formats. Each of them checks whether INSN
856 is an instruction of the given format, with the specified opcodes.
857 If it is, it sets the remaining arguments to the values of the
858 instruction's fields, and returns a non-zero value; otherwise, it
859 returns zero.
860
861 These functions' arguments appear in the order they appear in the
862 instruction, not in the machine-language form. So, opcodes always
863 come first, even though they're sometimes scattered around the
864 instructions. And displacements appear before base and extension
865 registers, as they do in the assembly syntax, not at the end, as
866 they do in the machine language. */
867 static int
868 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
869 {
870 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
871 {
872 *r1 = (insn[1] >> 4) & 0xf;
873 /* i2 is a 16-bit signed quantity. */
874 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
875 return 1;
876 }
877 else
878 return 0;
879 }
880
881
882 static int
883 is_ril (bfd_byte *insn, int op1, int op2,
884 unsigned int *r1, int *i2)
885 {
886 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
887 {
888 *r1 = (insn[1] >> 4) & 0xf;
889 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
890 no sign extension is necessary, but we don't want to assume
891 that. */
892 *i2 = (((insn[2] << 24)
893 | (insn[3] << 16)
894 | (insn[4] << 8)
895 | (insn[5])) ^ 0x80000000) - 0x80000000;
896 return 1;
897 }
898 else
899 return 0;
900 }
901
902
903 static int
904 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
905 {
906 if (insn[0] == op)
907 {
908 *r1 = (insn[1] >> 4) & 0xf;
909 *r2 = insn[1] & 0xf;
910 return 1;
911 }
912 else
913 return 0;
914 }
915
916
917 static int
918 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
919 {
920 if (((insn[0] << 8) | insn[1]) == op)
921 {
922 /* Yes, insn[3]. insn[2] is unused in RRE format. */
923 *r1 = (insn[3] >> 4) & 0xf;
924 *r2 = insn[3] & 0xf;
925 return 1;
926 }
927 else
928 return 0;
929 }
930
931
932 static int
933 is_rs (bfd_byte *insn, int op,
934 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
935 {
936 if (insn[0] == op)
937 {
938 *r1 = (insn[1] >> 4) & 0xf;
939 *r3 = insn[1] & 0xf;
940 *b2 = (insn[2] >> 4) & 0xf;
941 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
942 return 1;
943 }
944 else
945 return 0;
946 }
947
948
949 static int
950 is_rsy (bfd_byte *insn, int op1, int op2,
951 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
952 {
953 if (insn[0] == op1
954 && insn[5] == op2)
955 {
956 *r1 = (insn[1] >> 4) & 0xf;
957 *r3 = insn[1] & 0xf;
958 *b2 = (insn[2] >> 4) & 0xf;
959 /* The 'long displacement' is a 20-bit signed integer. */
960 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
961 ^ 0x80000) - 0x80000;
962 return 1;
963 }
964 else
965 return 0;
966 }
967
968
969 static int
970 is_rsi (bfd_byte *insn, int op,
971 unsigned int *r1, unsigned int *r3, int *i2)
972 {
973 if (insn[0] == op)
974 {
975 *r1 = (insn[1] >> 4) & 0xf;
976 *r3 = insn[1] & 0xf;
977 /* i2 is a 16-bit signed quantity. */
978 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
979 return 1;
980 }
981 else
982 return 0;
983 }
984
985
986 static int
987 is_rie (bfd_byte *insn, int op1, int op2,
988 unsigned int *r1, unsigned int *r3, int *i2)
989 {
990 if (insn[0] == op1
991 && insn[5] == op2)
992 {
993 *r1 = (insn[1] >> 4) & 0xf;
994 *r3 = insn[1] & 0xf;
995 /* i2 is a 16-bit signed quantity. */
996 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
997 return 1;
998 }
999 else
1000 return 0;
1001 }
1002
1003
1004 static int
1005 is_rx (bfd_byte *insn, int op,
1006 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
1007 {
1008 if (insn[0] == op)
1009 {
1010 *r1 = (insn[1] >> 4) & 0xf;
1011 *x2 = insn[1] & 0xf;
1012 *b2 = (insn[2] >> 4) & 0xf;
1013 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1014 return 1;
1015 }
1016 else
1017 return 0;
1018 }
1019
1020
1021 static int
1022 is_rxy (bfd_byte *insn, int op1, int op2,
1023 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
1024 {
1025 if (insn[0] == op1
1026 && insn[5] == op2)
1027 {
1028 *r1 = (insn[1] >> 4) & 0xf;
1029 *x2 = insn[1] & 0xf;
1030 *b2 = (insn[2] >> 4) & 0xf;
1031 /* The 'long displacement' is a 20-bit signed integer. */
1032 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1033 ^ 0x80000) - 0x80000;
1034 return 1;
1035 }
1036 else
1037 return 0;
1038 }
1039
1040
1041 /* Prologue analysis. */
1042
1043 #define S390_NUM_GPRS 16
1044 #define S390_NUM_FPRS 16
1045
1046 struct s390_prologue_data {
1047
1048 /* The stack. */
1049 struct pv_area *stack;
1050
1051 /* The size and byte-order of a GPR or FPR. */
1052 int gpr_size;
1053 int fpr_size;
1054 enum bfd_endian byte_order;
1055
1056 /* The general-purpose registers. */
1057 pv_t gpr[S390_NUM_GPRS];
1058
1059 /* The floating-point registers. */
1060 pv_t fpr[S390_NUM_FPRS];
1061
1062 /* The offset relative to the CFA where the incoming GPR N was saved
1063 by the function prologue. 0 if not saved or unknown. */
1064 int gpr_slot[S390_NUM_GPRS];
1065
1066 /* Likewise for FPRs. */
1067 int fpr_slot[S390_NUM_FPRS];
1068
1069 /* Nonzero if the backchain was saved. This is assumed to be the
1070 case when the incoming SP is saved at the current SP location. */
1071 int back_chain_saved_p;
1072 };
1073
1074 /* Return the effective address for an X-style instruction, like:
1075
1076 L R1, D2(X2, B2)
1077
1078 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1079 constant; the effective address is the sum of all three. If either
1080 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1081 means that r0 can't be used as either X2 or B2. */
1082 static pv_t
1083 s390_addr (struct s390_prologue_data *data,
1084 int d2, unsigned int x2, unsigned int b2)
1085 {
1086 pv_t result;
1087
1088 result = pv_constant (d2);
1089 if (x2)
1090 result = pv_add (result, data->gpr[x2]);
1091 if (b2)
1092 result = pv_add (result, data->gpr[b2]);
1093
1094 return result;
1095 }
1096
1097 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
1098 static void
1099 s390_store (struct s390_prologue_data *data,
1100 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1101 pv_t value)
1102 {
1103 pv_t addr = s390_addr (data, d2, x2, b2);
1104 pv_t offset;
1105
1106 /* Check whether we are storing the backchain. */
1107 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
1108
1109 if (pv_is_constant (offset) && offset.k == 0)
1110 if (size == data->gpr_size
1111 && pv_is_register_k (value, S390_SP_REGNUM, 0))
1112 {
1113 data->back_chain_saved_p = 1;
1114 return;
1115 }
1116
1117
1118 /* Check whether we are storing a register into the stack. */
1119 if (!pv_area_store_would_trash (data->stack, addr))
1120 pv_area_store (data->stack, addr, size, value);
1121
1122
1123 /* Note: If this is some store we cannot identify, you might think we
1124 should forget our cached values, as any of those might have been hit.
1125
1126 However, we make the assumption that the register save areas are only
1127 ever stored to once in any given function, and we do recognize these
1128 stores. Thus every store we cannot recognize does not hit our data. */
1129 }
1130
1131 /* Do a SIZE-byte load from D2(X2,B2). */
1132 static pv_t
1133 s390_load (struct s390_prologue_data *data,
1134 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
1135
1136 {
1137 pv_t addr = s390_addr (data, d2, x2, b2);
1138
1139 /* If it's a load from an in-line constant pool, then we can
1140 simulate that, under the assumption that the code isn't
1141 going to change between the time the processor actually
1142 executed it creating the current frame, and the time when
1143 we're analyzing the code to unwind past that frame. */
1144 if (pv_is_constant (addr))
1145 {
1146 struct target_section *secp;
1147 secp = target_section_by_addr (&current_target, addr.k);
1148 if (secp != NULL
1149 && (bfd_get_section_flags (secp->the_bfd_section->owner,
1150 secp->the_bfd_section)
1151 & SEC_READONLY))
1152 return pv_constant (read_memory_integer (addr.k, size,
1153 data->byte_order));
1154 }
1155
1156 /* Check whether we are accessing one of our save slots. */
1157 return pv_area_fetch (data->stack, addr, size);
1158 }
1159
1160 /* Function for finding saved registers in a 'struct pv_area'; we pass
1161 this to pv_area_scan.
1162
1163 If VALUE is a saved register, ADDR says it was saved at a constant
1164 offset from the frame base, and SIZE indicates that the whole
1165 register was saved, record its offset in the reg_offset table in
1166 PROLOGUE_UNTYPED. */
1167 static void
1168 s390_check_for_saved (void *data_untyped, pv_t addr,
1169 CORE_ADDR size, pv_t value)
1170 {
1171 struct s390_prologue_data *data = data_untyped;
1172 int i, offset;
1173
1174 if (!pv_is_register (addr, S390_SP_REGNUM))
1175 return;
1176
1177 offset = 16 * data->gpr_size + 32 - addr.k;
1178
1179 /* If we are storing the original value of a register, we want to
1180 record the CFA offset. If the same register is stored multiple
1181 times, the stack slot with the highest address counts. */
1182
1183 for (i = 0; i < S390_NUM_GPRS; i++)
1184 if (size == data->gpr_size
1185 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1186 if (data->gpr_slot[i] == 0
1187 || data->gpr_slot[i] > offset)
1188 {
1189 data->gpr_slot[i] = offset;
1190 return;
1191 }
1192
1193 for (i = 0; i < S390_NUM_FPRS; i++)
1194 if (size == data->fpr_size
1195 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1196 if (data->fpr_slot[i] == 0
1197 || data->fpr_slot[i] > offset)
1198 {
1199 data->fpr_slot[i] = offset;
1200 return;
1201 }
1202 }
1203
1204 /* Analyze the prologue of the function starting at START_PC,
1205 continuing at most until CURRENT_PC. Initialize DATA to
1206 hold all information we find out about the state of the registers
1207 and stack slots. Return the address of the instruction after
1208 the last one that changed the SP, FP, or back chain; or zero
1209 on error. */
1210 static CORE_ADDR
1211 s390_analyze_prologue (struct gdbarch *gdbarch,
1212 CORE_ADDR start_pc,
1213 CORE_ADDR current_pc,
1214 struct s390_prologue_data *data)
1215 {
1216 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1217
1218 /* Our return value:
1219 The address of the instruction after the last one that changed
1220 the SP, FP, or back chain; zero if we got an error trying to
1221 read memory. */
1222 CORE_ADDR result = start_pc;
1223
1224 /* The current PC for our abstract interpretation. */
1225 CORE_ADDR pc;
1226
1227 /* The address of the next instruction after that. */
1228 CORE_ADDR next_pc;
1229
1230 /* Set up everything's initial value. */
1231 {
1232 int i;
1233
1234 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
1235
1236 /* For the purpose of prologue tracking, we consider the GPR size to
1237 be equal to the ABI word size, even if it is actually larger
1238 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1239 data->gpr_size = word_size;
1240 data->fpr_size = 8;
1241 data->byte_order = gdbarch_byte_order (gdbarch);
1242
1243 for (i = 0; i < S390_NUM_GPRS; i++)
1244 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
1245
1246 for (i = 0; i < S390_NUM_FPRS; i++)
1247 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
1248
1249 for (i = 0; i < S390_NUM_GPRS; i++)
1250 data->gpr_slot[i] = 0;
1251
1252 for (i = 0; i < S390_NUM_FPRS; i++)
1253 data->fpr_slot[i] = 0;
1254
1255 data->back_chain_saved_p = 0;
1256 }
1257
1258 /* Start interpreting instructions, until we hit the frame's
1259 current PC or the first branch instruction. */
1260 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
1261 {
1262 bfd_byte insn[S390_MAX_INSTR_SIZE];
1263 int insn_len = s390_readinstruction (insn, pc);
1264
1265 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1266 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1267 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1268
1269 /* Fields for various kinds of instructions. */
1270 unsigned int b2, r1, r2, x2, r3;
1271 int i2, d2;
1272
1273 /* The values of SP and FP before this instruction,
1274 for detecting instructions that change them. */
1275 pv_t pre_insn_sp, pre_insn_fp;
1276 /* Likewise for the flag whether the back chain was saved. */
1277 int pre_insn_back_chain_saved_p;
1278
1279 /* If we got an error trying to read the instruction, report it. */
1280 if (insn_len < 0)
1281 {
1282 result = 0;
1283 break;
1284 }
1285
1286 next_pc = pc + insn_len;
1287
1288 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1289 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1290 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
1291
1292
1293 /* LHI r1, i2 --- load halfword immediate. */
1294 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1295 /* LGFI r1, i2 --- load fullword immediate. */
1296 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1297 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1298 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1299 data->gpr[r1] = pv_constant (i2);
1300
1301 /* LR r1, r2 --- load from register. */
1302 /* LGR r1, r2 --- load from register (64-bit version). */
1303 else if (is_rr (insn32, op_lr, &r1, &r2)
1304 || is_rre (insn64, op_lgr, &r1, &r2))
1305 data->gpr[r1] = data->gpr[r2];
1306
1307 /* L r1, d2(x2, b2) --- load. */
1308 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1309 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1310 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1311 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1312 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1313 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1314
1315 /* ST r1, d2(x2, b2) --- store. */
1316 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1317 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1318 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1319 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1320 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1321 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1322
1323 /* STD r1, d2(x2,b2) --- store floating-point register. */
1324 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
1325 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1326
1327 /* STM r1, r3, d2(b2) --- store multiple. */
1328 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1329 version). */
1330 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1331 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1332 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1333 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
1334 {
1335 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1336 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
1337 }
1338
1339 /* AHI r1, i2 --- add halfword immediate. */
1340 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1341 /* AFI r1, i2 --- add fullword immediate. */
1342 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1343 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1344 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1345 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1346 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1347 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1348
1349 /* ALFI r1, i2 --- add logical immediate. */
1350 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1351 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1352 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1353 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1354 (CORE_ADDR)i2 & 0xffffffff);
1355
1356 /* AR r1, r2 -- add register. */
1357 /* AGR r1, r2 -- add register (64-bit version). */
1358 else if (is_rr (insn32, op_ar, &r1, &r2)
1359 || is_rre (insn64, op_agr, &r1, &r2))
1360 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1361
1362 /* A r1, d2(x2, b2) -- add. */
1363 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1364 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1365 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1366 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1367 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1368 data->gpr[r1] = pv_add (data->gpr[r1],
1369 s390_load (data, d2, x2, b2, data->gpr_size));
1370
1371 /* SLFI r1, i2 --- subtract logical immediate. */
1372 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1373 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1374 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1375 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1376 -((CORE_ADDR)i2 & 0xffffffff));
1377
1378 /* SR r1, r2 -- subtract register. */
1379 /* SGR r1, r2 -- subtract register (64-bit version). */
1380 else if (is_rr (insn32, op_sr, &r1, &r2)
1381 || is_rre (insn64, op_sgr, &r1, &r2))
1382 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1383
1384 /* S r1, d2(x2, b2) -- subtract. */
1385 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1386 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1387 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1388 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1389 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1390 data->gpr[r1] = pv_subtract (data->gpr[r1],
1391 s390_load (data, d2, x2, b2, data->gpr_size));
1392
1393 /* LA r1, d2(x2, b2) --- load address. */
1394 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1395 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1396 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1397 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1398
1399 /* LARL r1, i2 --- load address relative long. */
1400 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1401 data->gpr[r1] = pv_constant (pc + i2 * 2);
1402
1403 /* BASR r1, 0 --- branch and save.
1404 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1405 else if (is_rr (insn, op_basr, &r1, &r2)
1406 && r2 == 0)
1407 data->gpr[r1] = pv_constant (next_pc);
1408
1409 /* BRAS r1, i2 --- branch relative and save. */
1410 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1411 {
1412 data->gpr[r1] = pv_constant (next_pc);
1413 next_pc = pc + i2 * 2;
1414
1415 /* We'd better not interpret any backward branches. We'll
1416 never terminate. */
1417 if (next_pc <= pc)
1418 break;
1419 }
1420
1421 /* Terminate search when hitting any other branch instruction. */
1422 else if (is_rr (insn, op_basr, &r1, &r2)
1423 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1424 || is_rr (insn, op_bcr, &r1, &r2)
1425 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1426 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1427 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1428 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1429 break;
1430
1431 else
1432 {
1433 /* An instruction we don't know how to simulate. The only
1434 safe thing to do would be to set every value we're tracking
1435 to 'unknown'. Instead, we'll be optimistic: we assume that
1436 we *can* interpret every instruction that the compiler uses
1437 to manipulate any of the data we're interested in here --
1438 then we can just ignore anything else. */
1439 }
1440
1441 /* Record the address after the last instruction that changed
1442 the FP, SP, or backlink. Ignore instructions that changed
1443 them back to their original values --- those are probably
1444 restore instructions. (The back chain is never restored,
1445 just popped.) */
1446 {
1447 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1448 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1449
1450 if ((! pv_is_identical (pre_insn_sp, sp)
1451 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1452 && sp.kind != pvk_unknown)
1453 || (! pv_is_identical (pre_insn_fp, fp)
1454 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1455 && fp.kind != pvk_unknown)
1456 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1457 result = next_pc;
1458 }
1459 }
1460
1461 /* Record where all the registers were saved. */
1462 pv_area_scan (data->stack, s390_check_for_saved, data);
1463
1464 free_pv_area (data->stack);
1465 data->stack = NULL;
1466
1467 return result;
1468 }
1469
1470 /* Advance PC across any function entry prologue instructions to reach
1471 some "real" code. */
1472 static CORE_ADDR
1473 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1474 {
1475 struct s390_prologue_data data;
1476 CORE_ADDR skip_pc, func_addr;
1477
1478 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1479 {
1480 CORE_ADDR post_prologue_pc
1481 = skip_prologue_using_sal (gdbarch, func_addr);
1482 if (post_prologue_pc != 0)
1483 return max (pc, post_prologue_pc);
1484 }
1485
1486 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1487 return skip_pc ? skip_pc : pc;
1488 }
1489
1490 /* Implmement the stack_frame_destroyed_p gdbarch method. */
1491 static int
1492 s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1493 {
1494 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1495
1496 /* In frameless functions, there's not frame to destroy and thus
1497 we don't care about the epilogue.
1498
1499 In functions with frame, the epilogue sequence is a pair of
1500 a LM-type instruction that restores (amongst others) the
1501 return register %r14 and the stack pointer %r15, followed
1502 by a branch 'br %r14' --or equivalent-- that effects the
1503 actual return.
1504
1505 In that situation, this function needs to return 'true' in
1506 exactly one case: when pc points to that branch instruction.
1507
1508 Thus we try to disassemble the one instructions immediately
1509 preceding pc and check whether it is an LM-type instruction
1510 modifying the stack pointer.
1511
1512 Note that disassembling backwards is not reliable, so there
1513 is a slight chance of false positives here ... */
1514
1515 bfd_byte insn[6];
1516 unsigned int r1, r3, b2;
1517 int d2;
1518
1519 if (word_size == 4
1520 && !target_read_memory (pc - 4, insn, 4)
1521 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1522 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1523 return 1;
1524
1525 if (word_size == 4
1526 && !target_read_memory (pc - 6, insn, 6)
1527 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1528 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1529 return 1;
1530
1531 if (word_size == 8
1532 && !target_read_memory (pc - 6, insn, 6)
1533 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
1534 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1535 return 1;
1536
1537 return 0;
1538 }
1539
1540 /* Displaced stepping. */
1541
1542 /* Fix up the state of registers and memory after having single-stepped
1543 a displaced instruction. */
1544 static void
1545 s390_displaced_step_fixup (struct gdbarch *gdbarch,
1546 struct displaced_step_closure *closure,
1547 CORE_ADDR from, CORE_ADDR to,
1548 struct regcache *regs)
1549 {
1550 /* Since we use simple_displaced_step_copy_insn, our closure is a
1551 copy of the instruction. */
1552 gdb_byte *insn = (gdb_byte *) closure;
1553 static int s390_instrlen[] = { 2, 4, 4, 6 };
1554 int insnlen = s390_instrlen[insn[0] >> 6];
1555
1556 /* Fields for various kinds of instructions. */
1557 unsigned int b2, r1, r2, x2, r3;
1558 int i2, d2;
1559
1560 /* Get current PC and addressing mode bit. */
1561 CORE_ADDR pc = regcache_read_pc (regs);
1562 ULONGEST amode = 0;
1563
1564 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1565 {
1566 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1567 amode &= 0x80000000;
1568 }
1569
1570 if (debug_displaced)
1571 fprintf_unfiltered (gdb_stdlog,
1572 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1573 paddress (gdbarch, from), paddress (gdbarch, to),
1574 paddress (gdbarch, pc), insnlen, (int) amode);
1575
1576 /* Handle absolute branch and save instructions. */
1577 if (is_rr (insn, op_basr, &r1, &r2)
1578 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1579 {
1580 /* Recompute saved return address in R1. */
1581 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1582 amode | (from + insnlen));
1583 }
1584
1585 /* Handle absolute branch instructions. */
1586 else if (is_rr (insn, op_bcr, &r1, &r2)
1587 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1588 || is_rr (insn, op_bctr, &r1, &r2)
1589 || is_rre (insn, op_bctgr, &r1, &r2)
1590 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1591 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1592 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1593 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1594 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1595 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1596 {
1597 /* Update PC iff branch was *not* taken. */
1598 if (pc == to + insnlen)
1599 regcache_write_pc (regs, from + insnlen);
1600 }
1601
1602 /* Handle PC-relative branch and save instructions. */
1603 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1604 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1605 {
1606 /* Update PC. */
1607 regcache_write_pc (regs, pc - to + from);
1608 /* Recompute saved return address in R1. */
1609 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1610 amode | (from + insnlen));
1611 }
1612
1613 /* Handle PC-relative branch instructions. */
1614 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1615 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1616 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1617 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1618 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1619 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1620 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1621 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1622 {
1623 /* Update PC. */
1624 regcache_write_pc (regs, pc - to + from);
1625 }
1626
1627 /* Handle LOAD ADDRESS RELATIVE LONG. */
1628 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1629 {
1630 /* Update PC. */
1631 regcache_write_pc (regs, from + insnlen);
1632 /* Recompute output address in R1. */
1633 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1634 amode | (from + i2 * 2));
1635 }
1636
1637 /* If we executed a breakpoint instruction, point PC right back at it. */
1638 else if (insn[0] == 0x0 && insn[1] == 0x1)
1639 regcache_write_pc (regs, from);
1640
1641 /* For any other insn, PC points right after the original instruction. */
1642 else
1643 regcache_write_pc (regs, from + insnlen);
1644
1645 if (debug_displaced)
1646 fprintf_unfiltered (gdb_stdlog,
1647 "displaced: (s390) pc is now %s\n",
1648 paddress (gdbarch, regcache_read_pc (regs)));
1649 }
1650
1651
1652 /* Helper routine to unwind pseudo registers. */
1653
1654 static struct value *
1655 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1656 {
1657 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1658 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1659 struct type *type = register_type (gdbarch, regnum);
1660
1661 /* Unwind PC via PSW address. */
1662 if (regnum == tdep->pc_regnum)
1663 {
1664 struct value *val;
1665
1666 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1667 if (!value_optimized_out (val))
1668 {
1669 LONGEST pswa = value_as_long (val);
1670
1671 if (TYPE_LENGTH (type) == 4)
1672 return value_from_pointer (type, pswa & 0x7fffffff);
1673 else
1674 return value_from_pointer (type, pswa);
1675 }
1676 }
1677
1678 /* Unwind CC via PSW mask. */
1679 if (regnum == tdep->cc_regnum)
1680 {
1681 struct value *val;
1682
1683 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1684 if (!value_optimized_out (val))
1685 {
1686 LONGEST pswm = value_as_long (val);
1687
1688 if (TYPE_LENGTH (type) == 4)
1689 return value_from_longest (type, (pswm >> 12) & 3);
1690 else
1691 return value_from_longest (type, (pswm >> 44) & 3);
1692 }
1693 }
1694
1695 /* Unwind full GPRs to show at least the lower halves (as the
1696 upper halves are undefined). */
1697 if (regnum_is_gpr_full (tdep, regnum))
1698 {
1699 int reg = regnum - tdep->gpr_full_regnum;
1700 struct value *val;
1701
1702 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1703 if (!value_optimized_out (val))
1704 return value_cast (type, val);
1705 }
1706
1707 return allocate_optimized_out_value (type);
1708 }
1709
1710 static struct value *
1711 s390_trad_frame_prev_register (struct frame_info *this_frame,
1712 struct trad_frame_saved_reg saved_regs[],
1713 int regnum)
1714 {
1715 if (regnum < S390_NUM_REGS)
1716 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1717 else
1718 return s390_unwind_pseudo_register (this_frame, regnum);
1719 }
1720
1721
1722 /* Normal stack frames. */
1723
1724 struct s390_unwind_cache {
1725
1726 CORE_ADDR func;
1727 CORE_ADDR frame_base;
1728 CORE_ADDR local_base;
1729
1730 struct trad_frame_saved_reg *saved_regs;
1731 };
1732
1733 static int
1734 s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
1735 struct s390_unwind_cache *info)
1736 {
1737 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1738 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1739 struct s390_prologue_data data;
1740 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1741 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1742 int i;
1743 CORE_ADDR cfa;
1744 CORE_ADDR func;
1745 CORE_ADDR result;
1746 ULONGEST reg;
1747 CORE_ADDR prev_sp;
1748 int frame_pointer;
1749 int size;
1750 struct frame_info *next_frame;
1751
1752 /* Try to find the function start address. If we can't find it, we don't
1753 bother searching for it -- with modern compilers this would be mostly
1754 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1755 or else a valid backchain ... */
1756 func = get_frame_func (this_frame);
1757 if (!func)
1758 return 0;
1759
1760 /* Try to analyze the prologue. */
1761 result = s390_analyze_prologue (gdbarch, func,
1762 get_frame_pc (this_frame), &data);
1763 if (!result)
1764 return 0;
1765
1766 /* If this was successful, we should have found the instruction that
1767 sets the stack pointer register to the previous value of the stack
1768 pointer minus the frame size. */
1769 if (!pv_is_register (*sp, S390_SP_REGNUM))
1770 return 0;
1771
1772 /* A frame size of zero at this point can mean either a real
1773 frameless function, or else a failure to find the prologue.
1774 Perform some sanity checks to verify we really have a
1775 frameless function. */
1776 if (sp->k == 0)
1777 {
1778 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1779 size zero. This is only possible if the next frame is a sentinel
1780 frame, a dummy frame, or a signal trampoline frame. */
1781 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1782 needed, instead the code should simpliy rely on its
1783 analysis. */
1784 next_frame = get_next_frame (this_frame);
1785 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1786 next_frame = get_next_frame (next_frame);
1787 if (next_frame
1788 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
1789 return 0;
1790
1791 /* If we really have a frameless function, %r14 must be valid
1792 -- in particular, it must point to a different function. */
1793 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
1794 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1795 if (get_pc_function_start (reg) == func)
1796 {
1797 /* However, there is one case where it *is* valid for %r14
1798 to point to the same function -- if this is a recursive
1799 call, and we have stopped in the prologue *before* the
1800 stack frame was allocated.
1801
1802 Recognize this case by looking ahead a bit ... */
1803
1804 struct s390_prologue_data data2;
1805 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1806
1807 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
1808 && pv_is_register (*sp, S390_SP_REGNUM)
1809 && sp->k != 0))
1810 return 0;
1811 }
1812 }
1813
1814
1815 /* OK, we've found valid prologue data. */
1816 size = -sp->k;
1817
1818 /* If the frame pointer originally also holds the same value
1819 as the stack pointer, we're probably using it. If it holds
1820 some other value -- even a constant offset -- it is most
1821 likely used as temp register. */
1822 if (pv_is_identical (*sp, *fp))
1823 frame_pointer = S390_FRAME_REGNUM;
1824 else
1825 frame_pointer = S390_SP_REGNUM;
1826
1827 /* If we've detected a function with stack frame, we'll still have to
1828 treat it as frameless if we're currently within the function epilog
1829 code at a point where the frame pointer has already been restored.
1830 This can only happen in an innermost frame. */
1831 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1832 instead the code should simpliy rely on its analysis. */
1833 next_frame = get_next_frame (this_frame);
1834 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1835 next_frame = get_next_frame (next_frame);
1836 if (size > 0
1837 && (next_frame == NULL
1838 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
1839 {
1840 /* See the comment in s390_stack_frame_destroyed_p on why this is
1841 not completely reliable ... */
1842 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
1843 {
1844 memset (&data, 0, sizeof (data));
1845 size = 0;
1846 frame_pointer = S390_SP_REGNUM;
1847 }
1848 }
1849
1850 /* Once we know the frame register and the frame size, we can unwind
1851 the current value of the frame register from the next frame, and
1852 add back the frame size to arrive that the previous frame's
1853 stack pointer value. */
1854 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
1855 cfa = prev_sp + 16*word_size + 32;
1856
1857 /* Set up ABI call-saved/call-clobbered registers. */
1858 for (i = 0; i < S390_NUM_REGS; i++)
1859 if (!s390_register_call_saved (gdbarch, i))
1860 trad_frame_set_unknown (info->saved_regs, i);
1861
1862 /* CC is always call-clobbered. */
1863 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
1864
1865 /* Record the addresses of all register spill slots the prologue parser
1866 has recognized. Consider only registers defined as call-saved by the
1867 ABI; for call-clobbered registers the parser may have recognized
1868 spurious stores. */
1869
1870 for (i = 0; i < 16; i++)
1871 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1872 && data.gpr_slot[i] != 0)
1873 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
1874
1875 for (i = 0; i < 16; i++)
1876 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1877 && data.fpr_slot[i] != 0)
1878 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
1879
1880 /* Function return will set PC to %r14. */
1881 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1882
1883 /* In frameless functions, we unwind simply by moving the return
1884 address to the PC. However, if we actually stored to the
1885 save area, use that -- we might only think the function frameless
1886 because we're in the middle of the prologue ... */
1887 if (size == 0
1888 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
1889 {
1890 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
1891 }
1892
1893 /* Another sanity check: unless this is a frameless function,
1894 we should have found spill slots for SP and PC.
1895 If not, we cannot unwind further -- this happens e.g. in
1896 libc's thread_start routine. */
1897 if (size > 0)
1898 {
1899 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
1900 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
1901 prev_sp = -1;
1902 }
1903
1904 /* We use the current value of the frame register as local_base,
1905 and the top of the register save area as frame_base. */
1906 if (prev_sp != -1)
1907 {
1908 info->frame_base = prev_sp + 16*word_size + 32;
1909 info->local_base = prev_sp - size;
1910 }
1911
1912 info->func = func;
1913 return 1;
1914 }
1915
1916 static void
1917 s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
1918 struct s390_unwind_cache *info)
1919 {
1920 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1921 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1922 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1923 CORE_ADDR backchain;
1924 ULONGEST reg;
1925 LONGEST sp;
1926 int i;
1927
1928 /* Set up ABI call-saved/call-clobbered registers. */
1929 for (i = 0; i < S390_NUM_REGS; i++)
1930 if (!s390_register_call_saved (gdbarch, i))
1931 trad_frame_set_unknown (info->saved_regs, i);
1932
1933 /* CC is always call-clobbered. */
1934 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
1935
1936 /* Get the backchain. */
1937 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1938 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
1939
1940 /* A zero backchain terminates the frame chain. As additional
1941 sanity check, let's verify that the spill slot for SP in the
1942 save area pointed to by the backchain in fact links back to
1943 the save area. */
1944 if (backchain != 0
1945 && safe_read_memory_integer (backchain + 15*word_size,
1946 word_size, byte_order, &sp)
1947 && (CORE_ADDR)sp == backchain)
1948 {
1949 /* We don't know which registers were saved, but it will have
1950 to be at least %r14 and %r15. This will allow us to continue
1951 unwinding, but other prev-frame registers may be incorrect ... */
1952 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1953 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1954
1955 /* Function return will set PC to %r14. */
1956 info->saved_regs[S390_PSWA_REGNUM]
1957 = info->saved_regs[S390_RETADDR_REGNUM];
1958
1959 /* We use the current value of the frame register as local_base,
1960 and the top of the register save area as frame_base. */
1961 info->frame_base = backchain + 16*word_size + 32;
1962 info->local_base = reg;
1963 }
1964
1965 info->func = get_frame_pc (this_frame);
1966 }
1967
1968 static struct s390_unwind_cache *
1969 s390_frame_unwind_cache (struct frame_info *this_frame,
1970 void **this_prologue_cache)
1971 {
1972 struct s390_unwind_cache *info;
1973
1974 if (*this_prologue_cache)
1975 return *this_prologue_cache;
1976
1977 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1978 *this_prologue_cache = info;
1979 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1980 info->func = -1;
1981 info->frame_base = -1;
1982 info->local_base = -1;
1983
1984 TRY
1985 {
1986 /* Try to use prologue analysis to fill the unwind cache.
1987 If this fails, fall back to reading the stack backchain. */
1988 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1989 s390_backchain_frame_unwind_cache (this_frame, info);
1990 }
1991 CATCH (ex, RETURN_MASK_ERROR)
1992 {
1993 if (ex.error != NOT_AVAILABLE_ERROR)
1994 throw_exception (ex);
1995 }
1996 END_CATCH
1997
1998 return info;
1999 }
2000
2001 static void
2002 s390_frame_this_id (struct frame_info *this_frame,
2003 void **this_prologue_cache,
2004 struct frame_id *this_id)
2005 {
2006 struct s390_unwind_cache *info
2007 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2008
2009 if (info->frame_base == -1)
2010 return;
2011
2012 *this_id = frame_id_build (info->frame_base, info->func);
2013 }
2014
2015 static struct value *
2016 s390_frame_prev_register (struct frame_info *this_frame,
2017 void **this_prologue_cache, int regnum)
2018 {
2019 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2020 struct s390_unwind_cache *info
2021 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2022
2023 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2024 }
2025
2026 static const struct frame_unwind s390_frame_unwind = {
2027 NORMAL_FRAME,
2028 default_frame_unwind_stop_reason,
2029 s390_frame_this_id,
2030 s390_frame_prev_register,
2031 NULL,
2032 default_frame_sniffer
2033 };
2034
2035
2036 /* Code stubs and their stack frames. For things like PLTs and NULL
2037 function calls (where there is no true frame and the return address
2038 is in the RETADDR register). */
2039
2040 struct s390_stub_unwind_cache
2041 {
2042 CORE_ADDR frame_base;
2043 struct trad_frame_saved_reg *saved_regs;
2044 };
2045
2046 static struct s390_stub_unwind_cache *
2047 s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2048 void **this_prologue_cache)
2049 {
2050 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2051 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2052 struct s390_stub_unwind_cache *info;
2053 ULONGEST reg;
2054
2055 if (*this_prologue_cache)
2056 return *this_prologue_cache;
2057
2058 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2059 *this_prologue_cache = info;
2060 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2061
2062 /* The return address is in register %r14. */
2063 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2064
2065 /* Retrieve stack pointer and determine our frame base. */
2066 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2067 info->frame_base = reg + 16*word_size + 32;
2068
2069 return info;
2070 }
2071
2072 static void
2073 s390_stub_frame_this_id (struct frame_info *this_frame,
2074 void **this_prologue_cache,
2075 struct frame_id *this_id)
2076 {
2077 struct s390_stub_unwind_cache *info
2078 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2079 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2080 }
2081
2082 static struct value *
2083 s390_stub_frame_prev_register (struct frame_info *this_frame,
2084 void **this_prologue_cache, int regnum)
2085 {
2086 struct s390_stub_unwind_cache *info
2087 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2088 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2089 }
2090
2091 static int
2092 s390_stub_frame_sniffer (const struct frame_unwind *self,
2093 struct frame_info *this_frame,
2094 void **this_prologue_cache)
2095 {
2096 CORE_ADDR addr_in_block;
2097 bfd_byte insn[S390_MAX_INSTR_SIZE];
2098
2099 /* If the current PC points to non-readable memory, we assume we
2100 have trapped due to an invalid function pointer call. We handle
2101 the non-existing current function like a PLT stub. */
2102 addr_in_block = get_frame_address_in_block (this_frame);
2103 if (in_plt_section (addr_in_block)
2104 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2105 return 1;
2106 return 0;
2107 }
2108
2109 static const struct frame_unwind s390_stub_frame_unwind = {
2110 NORMAL_FRAME,
2111 default_frame_unwind_stop_reason,
2112 s390_stub_frame_this_id,
2113 s390_stub_frame_prev_register,
2114 NULL,
2115 s390_stub_frame_sniffer
2116 };
2117
2118
2119 /* Signal trampoline stack frames. */
2120
2121 struct s390_sigtramp_unwind_cache {
2122 CORE_ADDR frame_base;
2123 struct trad_frame_saved_reg *saved_regs;
2124 };
2125
2126 static struct s390_sigtramp_unwind_cache *
2127 s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
2128 void **this_prologue_cache)
2129 {
2130 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2131 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2132 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2133 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2134 struct s390_sigtramp_unwind_cache *info;
2135 ULONGEST this_sp, prev_sp;
2136 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
2137 int i;
2138
2139 if (*this_prologue_cache)
2140 return *this_prologue_cache;
2141
2142 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2143 *this_prologue_cache = info;
2144 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2145
2146 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2147 next_ra = get_frame_pc (this_frame);
2148 next_cfa = this_sp + 16*word_size + 32;
2149
2150 /* New-style RT frame:
2151 retcode + alignment (8 bytes)
2152 siginfo (128 bytes)
2153 ucontext (contains sigregs at offset 5 words). */
2154 if (next_ra == next_cfa)
2155 {
2156 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
2157 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2158 upper GPR halves if present. */
2159 sigreg_high_off = 8;
2160 }
2161
2162 /* Old-style RT frame and all non-RT frames:
2163 old signal mask (8 bytes)
2164 pointer to sigregs. */
2165 else
2166 {
2167 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2168 word_size, byte_order);
2169 /* sigregs are followed by signo (4 bytes), then by the
2170 upper GPR halves if present. */
2171 sigreg_high_off = 4;
2172 }
2173
2174 /* The sigregs structure looks like this:
2175 long psw_mask;
2176 long psw_addr;
2177 long gprs[16];
2178 int acrs[16];
2179 int fpc;
2180 int __pad;
2181 double fprs[16]; */
2182
2183 /* PSW mask and address. */
2184 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
2185 sigreg_ptr += word_size;
2186 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
2187 sigreg_ptr += word_size;
2188
2189 /* Then the GPRs. */
2190 for (i = 0; i < 16; i++)
2191 {
2192 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2193 sigreg_ptr += word_size;
2194 }
2195
2196 /* Then the ACRs. */
2197 for (i = 0; i < 16; i++)
2198 {
2199 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2200 sigreg_ptr += 4;
2201 }
2202
2203 /* The floating-point control word. */
2204 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2205 sigreg_ptr += 8;
2206
2207 /* And finally the FPRs. */
2208 for (i = 0; i < 16; i++)
2209 {
2210 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2211 sigreg_ptr += 8;
2212 }
2213
2214 /* If we have them, the GPR upper halves are appended at the end. */
2215 sigreg_ptr += sigreg_high_off;
2216 if (tdep->gpr_full_regnum != -1)
2217 for (i = 0; i < 16; i++)
2218 {
2219 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
2220 sigreg_ptr += 4;
2221 }
2222
2223 /* Restore the previous frame's SP. */
2224 prev_sp = read_memory_unsigned_integer (
2225 info->saved_regs[S390_SP_REGNUM].addr,
2226 word_size, byte_order);
2227
2228 /* Determine our frame base. */
2229 info->frame_base = prev_sp + 16*word_size + 32;
2230
2231 return info;
2232 }
2233
2234 static void
2235 s390_sigtramp_frame_this_id (struct frame_info *this_frame,
2236 void **this_prologue_cache,
2237 struct frame_id *this_id)
2238 {
2239 struct s390_sigtramp_unwind_cache *info
2240 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2241 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2242 }
2243
2244 static struct value *
2245 s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2246 void **this_prologue_cache, int regnum)
2247 {
2248 struct s390_sigtramp_unwind_cache *info
2249 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2250 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2251 }
2252
2253 static int
2254 s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2255 struct frame_info *this_frame,
2256 void **this_prologue_cache)
2257 {
2258 CORE_ADDR pc = get_frame_pc (this_frame);
2259 bfd_byte sigreturn[2];
2260
2261 if (target_read_memory (pc, sigreturn, 2))
2262 return 0;
2263
2264 if (sigreturn[0] != op_svc)
2265 return 0;
2266
2267 if (sigreturn[1] != 119 /* sigreturn */
2268 && sigreturn[1] != 173 /* rt_sigreturn */)
2269 return 0;
2270
2271 return 1;
2272 }
2273
2274 static const struct frame_unwind s390_sigtramp_frame_unwind = {
2275 SIGTRAMP_FRAME,
2276 default_frame_unwind_stop_reason,
2277 s390_sigtramp_frame_this_id,
2278 s390_sigtramp_frame_prev_register,
2279 NULL,
2280 s390_sigtramp_frame_sniffer
2281 };
2282
2283 /* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2284 upon error. */
2285
2286 static LONGEST
2287 s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2288 ptid_t ptid)
2289 {
2290 struct regcache *regs = get_thread_regcache (ptid);
2291 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2292 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2293 ULONGEST pc;
2294 ULONGEST svc_number = -1;
2295 unsigned opcode;
2296
2297 /* Assume that the PC points after the 2-byte SVC instruction. We
2298 don't currently support SVC via EXECUTE. */
2299 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2300 pc -= 2;
2301 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2302 if (opcode != op_svc)
2303 return -1;
2304
2305 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2306 byte_order);
2307 if (svc_number == 0)
2308 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2309
2310 return svc_number;
2311 }
2312
2313
2314 /* Frame base handling. */
2315
2316 static CORE_ADDR
2317 s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2318 {
2319 struct s390_unwind_cache *info
2320 = s390_frame_unwind_cache (this_frame, this_cache);
2321 return info->frame_base;
2322 }
2323
2324 static CORE_ADDR
2325 s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2326 {
2327 struct s390_unwind_cache *info
2328 = s390_frame_unwind_cache (this_frame, this_cache);
2329 return info->local_base;
2330 }
2331
2332 static const struct frame_base s390_frame_base = {
2333 &s390_frame_unwind,
2334 s390_frame_base_address,
2335 s390_local_base_address,
2336 s390_local_base_address
2337 };
2338
2339 static CORE_ADDR
2340 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2341 {
2342 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2343 ULONGEST pc;
2344 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2345 return gdbarch_addr_bits_remove (gdbarch, pc);
2346 }
2347
2348 static CORE_ADDR
2349 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2350 {
2351 ULONGEST sp;
2352 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2353 return gdbarch_addr_bits_remove (gdbarch, sp);
2354 }
2355
2356
2357 /* DWARF-2 frame support. */
2358
2359 static struct value *
2360 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2361 int regnum)
2362 {
2363 return s390_unwind_pseudo_register (this_frame, regnum);
2364 }
2365
2366 static void
2367 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2368 struct dwarf2_frame_state_reg *reg,
2369 struct frame_info *this_frame)
2370 {
2371 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2372
2373 /* The condition code (and thus PSW mask) is call-clobbered. */
2374 if (regnum == S390_PSWM_REGNUM)
2375 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2376
2377 /* The PSW address unwinds to the return address. */
2378 else if (regnum == S390_PSWA_REGNUM)
2379 reg->how = DWARF2_FRAME_REG_RA;
2380
2381 /* Fixed registers are call-saved or call-clobbered
2382 depending on the ABI in use. */
2383 else if (regnum < S390_NUM_REGS)
2384 {
2385 if (s390_register_call_saved (gdbarch, regnum))
2386 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2387 else
2388 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2389 }
2390
2391 /* We install a special function to unwind pseudos. */
2392 else
2393 {
2394 reg->how = DWARF2_FRAME_REG_FN;
2395 reg->loc.fn = s390_dwarf2_prev_register;
2396 }
2397 }
2398
2399
2400 /* Dummy function calls. */
2401
2402 /* Unwrap any single-field structs in TYPE and return the effective
2403 "inner" type. E.g., yield "float" for all these cases:
2404
2405 float x;
2406 struct { float x };
2407 struct { struct { float x; } x; };
2408 struct { struct { struct { float x; } x; } x; };
2409
2410 However, if an inner type is smaller than MIN_SIZE, abort the
2411 unwrapping. */
2412
2413 static struct type *
2414 s390_effective_inner_type (struct type *type, unsigned int min_size)
2415 {
2416 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
2417 && TYPE_NFIELDS (type) == 1)
2418 {
2419 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
2420
2421 if (TYPE_LENGTH (inner) < min_size)
2422 break;
2423 type = inner;
2424 }
2425
2426 return type;
2427 }
2428
2429 /* Return non-zero if TYPE should be passed like "float" or
2430 "double". */
2431
2432 static int
2433 s390_function_arg_float (struct type *type)
2434 {
2435 /* Note that long double as well as complex types are intentionally
2436 excluded. */
2437 if (TYPE_LENGTH (type) > 8)
2438 return 0;
2439
2440 /* A struct containing just a float or double is passed like a float
2441 or double. */
2442 type = s390_effective_inner_type (type, 0);
2443
2444 return (TYPE_CODE (type) == TYPE_CODE_FLT
2445 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
2446 }
2447
2448 /* Return non-zero if TYPE should be passed like a vector. */
2449
2450 static int
2451 s390_function_arg_vector (struct type *type)
2452 {
2453 if (TYPE_LENGTH (type) > 16)
2454 return 0;
2455
2456 /* Structs containing just a vector are passed like a vector. */
2457 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
2458
2459 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
2460 }
2461
2462 /* Determine whether N is a power of two. */
2463
2464 static int
2465 is_power_of_two (unsigned int n)
2466 {
2467 return n && ((n & (n - 1)) == 0);
2468 }
2469
2470 /* For an argument whose type is TYPE and which is not passed like a
2471 float or vector, return non-zero if it should be passed like "int"
2472 or "long long". */
2473
2474 static int
2475 s390_function_arg_integer (struct type *type)
2476 {
2477 enum type_code code = TYPE_CODE (type);
2478
2479 if (TYPE_LENGTH (type) > 8)
2480 return 0;
2481
2482 if (code == TYPE_CODE_INT
2483 || code == TYPE_CODE_ENUM
2484 || code == TYPE_CODE_RANGE
2485 || code == TYPE_CODE_CHAR
2486 || code == TYPE_CODE_BOOL
2487 || code == TYPE_CODE_PTR
2488 || code == TYPE_CODE_REF)
2489 return 1;
2490
2491 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
2492 && is_power_of_two (TYPE_LENGTH (type)));
2493 }
2494
2495 /* Argument passing state: Internal data structure passed to helper
2496 routines of s390_push_dummy_call. */
2497
2498 struct s390_arg_state
2499 {
2500 /* Register cache, or NULL, if we are in "preparation mode". */
2501 struct regcache *regcache;
2502 /* Next available general/floating-point/vector register for
2503 argument passing. */
2504 int gr, fr, vr;
2505 /* Current pointer to copy area (grows downwards). */
2506 CORE_ADDR copy;
2507 /* Current pointer to parameter area (grows upwards). */
2508 CORE_ADDR argp;
2509 };
2510
2511 /* Prepare one argument ARG for a dummy call and update the argument
2512 passing state AS accordingly. If the regcache field in AS is set,
2513 operate in "write mode" and write ARG into the inferior. Otherwise
2514 run "preparation mode" and skip all updates to the inferior. */
2515
2516 static void
2517 s390_handle_arg (struct s390_arg_state *as, struct value *arg,
2518 struct gdbarch_tdep *tdep, int word_size,
2519 enum bfd_endian byte_order, int is_unnamed)
2520 {
2521 struct type *type = check_typedef (value_type (arg));
2522 unsigned int length = TYPE_LENGTH (type);
2523 int write_mode = as->regcache != NULL;
2524
2525 if (s390_function_arg_float (type))
2526 {
2527 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
2528 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
2529 6. */
2530 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2531 {
2532 /* When we store a single-precision value in an FP register,
2533 it occupies the leftmost bits. */
2534 if (write_mode)
2535 regcache_cooked_write_part (as->regcache,
2536 S390_F0_REGNUM + as->fr,
2537 0, length,
2538 value_contents (arg));
2539 as->fr += 2;
2540 }
2541 else
2542 {
2543 /* When we store a single-precision value in a stack slot,
2544 it occupies the rightmost bits. */
2545 as->argp = align_up (as->argp + length, word_size);
2546 if (write_mode)
2547 write_memory (as->argp - length, value_contents (arg),
2548 length);
2549 }
2550 }
2551 else if (tdep->vector_abi == S390_VECTOR_ABI_128
2552 && s390_function_arg_vector (type))
2553 {
2554 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
2555
2556 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
2557 {
2558 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
2559
2560 if (write_mode)
2561 regcache_cooked_write_part (as->regcache, regnum,
2562 0, length,
2563 value_contents (arg));
2564 as->vr++;
2565 }
2566 else
2567 {
2568 if (write_mode)
2569 write_memory (as->argp, value_contents (arg), length);
2570 as->argp = align_up (as->argp + length, word_size);
2571 }
2572 }
2573 else if (s390_function_arg_integer (type) && length <= word_size)
2574 {
2575 /* Initialize it just to avoid a GCC false warning. */
2576 ULONGEST val = 0;
2577
2578 if (write_mode)
2579 {
2580 /* Place value in least significant bits of the register or
2581 memory word and sign- or zero-extend to full word size.
2582 This also applies to a struct or union. */
2583 val = TYPE_UNSIGNED (type)
2584 ? extract_unsigned_integer (value_contents (arg),
2585 length, byte_order)
2586 : extract_signed_integer (value_contents (arg),
2587 length, byte_order);
2588 }
2589
2590 if (as->gr <= 6)
2591 {
2592 if (write_mode)
2593 regcache_cooked_write_unsigned (as->regcache,
2594 S390_R0_REGNUM + as->gr,
2595 val);
2596 as->gr++;
2597 }
2598 else
2599 {
2600 if (write_mode)
2601 write_memory_unsigned_integer (as->argp, word_size,
2602 byte_order, val);
2603 as->argp += word_size;
2604 }
2605 }
2606 else if (s390_function_arg_integer (type) && length == 8)
2607 {
2608 if (as->gr <= 5)
2609 {
2610 if (write_mode)
2611 {
2612 regcache_cooked_write (as->regcache,
2613 S390_R0_REGNUM + as->gr,
2614 value_contents (arg));
2615 regcache_cooked_write (as->regcache,
2616 S390_R0_REGNUM + as->gr + 1,
2617 value_contents (arg) + word_size);
2618 }
2619 as->gr += 2;
2620 }
2621 else
2622 {
2623 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2624 in it, then don't go back and use it again later. */
2625 as->gr = 7;
2626
2627 if (write_mode)
2628 write_memory (as->argp, value_contents (arg), length);
2629 as->argp += length;
2630 }
2631 }
2632 else
2633 {
2634 /* This argument type is never passed in registers. Place the
2635 value in the copy area and pass a pointer to it. Use 8-byte
2636 alignment as a conservative assumption. */
2637 as->copy = align_down (as->copy - length, 8);
2638 if (write_mode)
2639 write_memory (as->copy, value_contents (arg), length);
2640
2641 if (as->gr <= 6)
2642 {
2643 if (write_mode)
2644 regcache_cooked_write_unsigned (as->regcache,
2645 S390_R0_REGNUM + as->gr,
2646 as->copy);
2647 as->gr++;
2648 }
2649 else
2650 {
2651 if (write_mode)
2652 write_memory_unsigned_integer (as->argp, word_size,
2653 byte_order, as->copy);
2654 as->argp += word_size;
2655 }
2656 }
2657 }
2658
2659 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
2660 place to be passed to a function, as specified by the "GNU/Linux
2661 for S/390 ELF Application Binary Interface Supplement".
2662
2663 SP is the current stack pointer. We must put arguments, links,
2664 padding, etc. whereever they belong, and return the new stack
2665 pointer value.
2666
2667 If STRUCT_RETURN is non-zero, then the function we're calling is
2668 going to return a structure by value; STRUCT_ADDR is the address of
2669 a block we've allocated for it on the stack.
2670
2671 Our caller has taken care of any type promotions needed to satisfy
2672 prototypes or the old K&R argument-passing rules. */
2673
2674 static CORE_ADDR
2675 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2676 struct regcache *regcache, CORE_ADDR bp_addr,
2677 int nargs, struct value **args, CORE_ADDR sp,
2678 int struct_return, CORE_ADDR struct_addr)
2679 {
2680 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2681 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2682 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2683 int i;
2684 struct s390_arg_state arg_state, arg_prep;
2685 CORE_ADDR param_area_start, new_sp;
2686 struct type *ftype = check_typedef (value_type (function));
2687
2688 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
2689 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
2690
2691 arg_prep.copy = sp;
2692 arg_prep.gr = struct_return ? 3 : 2;
2693 arg_prep.fr = 0;
2694 arg_prep.vr = 0;
2695 arg_prep.argp = 0;
2696 arg_prep.regcache = NULL;
2697
2698 /* Initialize arg_state for "preparation mode". */
2699 arg_state = arg_prep;
2700
2701 /* Update arg_state.copy with the start of the reference-to-copy area
2702 and arg_state.argp with the size of the parameter area. */
2703 for (i = 0; i < nargs; i++)
2704 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
2705 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
2706
2707 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
2708
2709 /* Allocate the standard frame areas: the register save area, the
2710 word reserved for the compiler, and the back chain pointer. */
2711 new_sp = param_area_start - (16 * word_size + 32);
2712
2713 /* Now we have the final stack pointer. Make sure we didn't
2714 underflow; on 31-bit, this would result in addresses with the
2715 high bit set, which causes confusion elsewhere. Note that if we
2716 error out here, stack and registers remain untouched. */
2717 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
2718 error (_("Stack overflow"));
2719
2720 /* Pass the structure return address in general register 2. */
2721 if (struct_return)
2722 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
2723
2724 /* Initialize arg_state for "write mode". */
2725 arg_state = arg_prep;
2726 arg_state.argp = param_area_start;
2727 arg_state.regcache = regcache;
2728
2729 /* Write all parameters. */
2730 for (i = 0; i < nargs; i++)
2731 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
2732 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
2733
2734 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2735 if (word_size == 4)
2736 {
2737 ULONGEST pswa;
2738 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2739 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2740 }
2741 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2742
2743 /* Store updated stack pointer. */
2744 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
2745
2746 /* We need to return the 'stack part' of the frame ID,
2747 which is actually the top of the register save area. */
2748 return param_area_start;
2749 }
2750
2751 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
2752 dummy frame. The frame ID's base needs to match the TOS value
2753 returned by push_dummy_call, and the PC match the dummy frame's
2754 breakpoint. */
2755 static struct frame_id
2756 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
2757 {
2758 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2759 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2760 sp = gdbarch_addr_bits_remove (gdbarch, sp);
2761
2762 return frame_id_build (sp + 16*word_size + 32,
2763 get_frame_pc (this_frame));
2764 }
2765
2766 static CORE_ADDR
2767 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2768 {
2769 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2770 always be aligned on an eight-byte boundary. */
2771 return (addr & -8);
2772 }
2773
2774
2775 /* Helper for s390_return_value: Set or retrieve a function return
2776 value if it resides in a register. */
2777
2778 static void
2779 s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
2780 struct regcache *regcache,
2781 gdb_byte *out, const gdb_byte *in)
2782 {
2783 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2784 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2785 int length = TYPE_LENGTH (type);
2786 int code = TYPE_CODE (type);
2787
2788 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
2789 {
2790 /* Float-like value: left-aligned in f0. */
2791 if (in != NULL)
2792 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2793 0, length, in);
2794 else
2795 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2796 0, length, out);
2797 }
2798 else if (code == TYPE_CODE_ARRAY)
2799 {
2800 /* Vector: left-aligned in v24. */
2801 if (in != NULL)
2802 regcache_cooked_write_part (regcache, S390_V24_REGNUM,
2803 0, length, in);
2804 else
2805 regcache_cooked_read_part (regcache, S390_V24_REGNUM,
2806 0, length, out);
2807 }
2808 else if (length <= word_size)
2809 {
2810 /* Integer: zero- or sign-extended in r2. */
2811 if (out != NULL)
2812 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2813 word_size - length, length, out);
2814 else if (TYPE_UNSIGNED (type))
2815 regcache_cooked_write_unsigned
2816 (regcache, S390_R2_REGNUM,
2817 extract_unsigned_integer (in, length, byte_order));
2818 else
2819 regcache_cooked_write_signed
2820 (regcache, S390_R2_REGNUM,
2821 extract_signed_integer (in, length, byte_order));
2822 }
2823 else if (length == 2 * word_size)
2824 {
2825 /* Double word: in r2 and r3. */
2826 if (in != NULL)
2827 {
2828 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2829 regcache_cooked_write (regcache, S390_R3_REGNUM,
2830 in + word_size);
2831 }
2832 else
2833 {
2834 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2835 regcache_cooked_read (regcache, S390_R3_REGNUM,
2836 out + word_size);
2837 }
2838 }
2839 else
2840 internal_error (__FILE__, __LINE__, _("invalid return type"));
2841 }
2842
2843
2844 /* Implement the 'return_value' gdbarch method. */
2845
2846 static enum return_value_convention
2847 s390_return_value (struct gdbarch *gdbarch, struct value *function,
2848 struct type *type, struct regcache *regcache,
2849 gdb_byte *out, const gdb_byte *in)
2850 {
2851 enum return_value_convention rvc;
2852
2853 type = check_typedef (type);
2854
2855 switch (TYPE_CODE (type))
2856 {
2857 case TYPE_CODE_STRUCT:
2858 case TYPE_CODE_UNION:
2859 case TYPE_CODE_COMPLEX:
2860 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2861 break;
2862 case TYPE_CODE_ARRAY:
2863 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2864 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2865 ? RETURN_VALUE_REGISTER_CONVENTION
2866 : RETURN_VALUE_STRUCT_CONVENTION;
2867 break;
2868 default:
2869 rvc = TYPE_LENGTH (type) <= 8
2870 ? RETURN_VALUE_REGISTER_CONVENTION
2871 : RETURN_VALUE_STRUCT_CONVENTION;
2872 }
2873
2874 if (in != NULL || out != NULL)
2875 {
2876 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2877 s390_register_return_value (gdbarch, type, regcache, out, in);
2878 else if (in != NULL)
2879 error (_("Cannot set function return value."));
2880 else
2881 error (_("Function return value unknown."));
2882 }
2883
2884 return rvc;
2885 }
2886
2887
2888 /* Breakpoints. */
2889
2890 static const gdb_byte *
2891 s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2892 CORE_ADDR *pcptr, int *lenptr)
2893 {
2894 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
2895
2896 *lenptr = sizeof (breakpoint);
2897 return breakpoint;
2898 }
2899
2900
2901 /* Address handling. */
2902
2903 static CORE_ADDR
2904 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
2905 {
2906 return addr & 0x7fffffff;
2907 }
2908
2909 static int
2910 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2911 {
2912 if (byte_size == 4)
2913 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
2914 else
2915 return 0;
2916 }
2917
2918 static const char *
2919 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2920 {
2921 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
2922 return "mode32";
2923 else
2924 return NULL;
2925 }
2926
2927 static int
2928 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2929 const char *name,
2930 int *type_flags_ptr)
2931 {
2932 if (strcmp (name, "mode32") == 0)
2933 {
2934 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
2935 return 1;
2936 }
2937 else
2938 return 0;
2939 }
2940
2941 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
2942 "-mcmodel=large". */
2943
2944 static char *
2945 s390_gcc_target_options (struct gdbarch *gdbarch)
2946 {
2947 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
2948 }
2949
2950 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
2951 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
2952 always "s390". Note that an s390x compiler supports "-m31" as
2953 well. */
2954
2955 static const char *
2956 s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
2957 {
2958 return "s390x?";
2959 }
2960
2961 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
2962 gdbarch.h. */
2963
2964 static int
2965 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
2966 {
2967 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
2968 or indirection. */
2969 || *s == '%' /* Register access. */
2970 || isdigit (*s)); /* Literal number. */
2971 }
2972
2973 /* Set up gdbarch struct. */
2974
2975 static struct gdbarch *
2976 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2977 {
2978 const struct target_desc *tdesc = info.target_desc;
2979 struct tdesc_arch_data *tdesc_data = NULL;
2980 struct gdbarch *gdbarch;
2981 struct gdbarch_tdep *tdep;
2982 int tdep_abi;
2983 enum s390_vector_abi_kind vector_abi;
2984 int have_upper = 0;
2985 int have_linux_v1 = 0;
2986 int have_linux_v2 = 0;
2987 int have_tdb = 0;
2988 int have_vx = 0;
2989 int first_pseudo_reg, last_pseudo_reg;
2990 static const char *const stap_register_prefixes[] = { "%", NULL };
2991 static const char *const stap_register_indirection_prefixes[] = { "(",
2992 NULL };
2993 static const char *const stap_register_indirection_suffixes[] = { ")",
2994 NULL };
2995
2996 /* Default ABI and register size. */
2997 switch (info.bfd_arch_info->mach)
2998 {
2999 case bfd_mach_s390_31:
3000 tdep_abi = ABI_LINUX_S390;
3001 break;
3002
3003 case bfd_mach_s390_64:
3004 tdep_abi = ABI_LINUX_ZSERIES;
3005 break;
3006
3007 default:
3008 return NULL;
3009 }
3010
3011 /* Use default target description if none provided by the target. */
3012 if (!tdesc_has_registers (tdesc))
3013 {
3014 if (tdep_abi == ABI_LINUX_S390)
3015 tdesc = tdesc_s390_linux32;
3016 else
3017 tdesc = tdesc_s390x_linux64;
3018 }
3019
3020 /* Check any target description for validity. */
3021 if (tdesc_has_registers (tdesc))
3022 {
3023 static const char *const gprs[] = {
3024 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3025 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3026 };
3027 static const char *const fprs[] = {
3028 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3029 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3030 };
3031 static const char *const acrs[] = {
3032 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3033 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3034 };
3035 static const char *const gprs_lower[] = {
3036 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3037 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3038 };
3039 static const char *const gprs_upper[] = {
3040 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3041 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3042 };
3043 static const char *const tdb_regs[] = {
3044 "tdb0", "tac", "tct", "atia",
3045 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
3046 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
3047 };
3048 static const char *const vxrs_low[] = {
3049 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
3050 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
3051 };
3052 static const char *const vxrs_high[] = {
3053 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
3054 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
3055 };
3056 const struct tdesc_feature *feature;
3057 int i, valid_p = 1;
3058
3059 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3060 if (feature == NULL)
3061 return NULL;
3062
3063 tdesc_data = tdesc_data_alloc ();
3064
3065 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3066 S390_PSWM_REGNUM, "pswm");
3067 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3068 S390_PSWA_REGNUM, "pswa");
3069
3070 if (tdesc_unnumbered_register (feature, "r0"))
3071 {
3072 for (i = 0; i < 16; i++)
3073 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3074 S390_R0_REGNUM + i, gprs[i]);
3075 }
3076 else
3077 {
3078 have_upper = 1;
3079
3080 for (i = 0; i < 16; i++)
3081 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3082 S390_R0_REGNUM + i,
3083 gprs_lower[i]);
3084 for (i = 0; i < 16; i++)
3085 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3086 S390_R0_UPPER_REGNUM + i,
3087 gprs_upper[i]);
3088 }
3089
3090 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3091 if (feature == NULL)
3092 {
3093 tdesc_data_cleanup (tdesc_data);
3094 return NULL;
3095 }
3096
3097 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3098 S390_FPC_REGNUM, "fpc");
3099 for (i = 0; i < 16; i++)
3100 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3101 S390_F0_REGNUM + i, fprs[i]);
3102
3103 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3104 if (feature == NULL)
3105 {
3106 tdesc_data_cleanup (tdesc_data);
3107 return NULL;
3108 }
3109
3110 for (i = 0; i < 16; i++)
3111 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3112 S390_A0_REGNUM + i, acrs[i]);
3113
3114 /* Optional GNU/Linux-specific "registers". */
3115 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3116 if (feature)
3117 {
3118 tdesc_numbered_register (feature, tdesc_data,
3119 S390_ORIG_R2_REGNUM, "orig_r2");
3120
3121 if (tdesc_numbered_register (feature, tdesc_data,
3122 S390_LAST_BREAK_REGNUM, "last_break"))
3123 have_linux_v1 = 1;
3124
3125 if (tdesc_numbered_register (feature, tdesc_data,
3126 S390_SYSTEM_CALL_REGNUM, "system_call"))
3127 have_linux_v2 = 1;
3128
3129 if (have_linux_v2 > have_linux_v1)
3130 valid_p = 0;
3131 }
3132
3133 /* Transaction diagnostic block. */
3134 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
3135 if (feature)
3136 {
3137 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
3138 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3139 S390_TDB_DWORD0_REGNUM + i,
3140 tdb_regs[i]);
3141 have_tdb = 1;
3142 }
3143
3144 /* Vector registers. */
3145 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
3146 if (feature)
3147 {
3148 for (i = 0; i < 16; i++)
3149 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3150 S390_V0_LOWER_REGNUM + i,
3151 vxrs_low[i]);
3152 for (i = 0; i < 16; i++)
3153 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3154 S390_V16_REGNUM + i,
3155 vxrs_high[i]);
3156 have_vx = 1;
3157 }
3158
3159 if (!valid_p)
3160 {
3161 tdesc_data_cleanup (tdesc_data);
3162 return NULL;
3163 }
3164 }
3165
3166 /* Determine vector ABI. */
3167 vector_abi = S390_VECTOR_ABI_NONE;
3168 #ifdef HAVE_ELF
3169 if (have_vx
3170 && info.abfd != NULL
3171 && info.abfd->format == bfd_object
3172 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
3173 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
3174 Tag_GNU_S390_ABI_Vector) == 2)
3175 vector_abi = S390_VECTOR_ABI_128;
3176 #endif
3177
3178 /* Find a candidate among extant architectures. */
3179 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3180 arches != NULL;
3181 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3182 {
3183 tdep = gdbarch_tdep (arches->gdbarch);
3184 if (!tdep)
3185 continue;
3186 if (tdep->abi != tdep_abi)
3187 continue;
3188 if (tdep->vector_abi != vector_abi)
3189 continue;
3190 if ((tdep->gpr_full_regnum != -1) != have_upper)
3191 continue;
3192 if (tdesc_data != NULL)
3193 tdesc_data_cleanup (tdesc_data);
3194 return arches->gdbarch;
3195 }
3196
3197 /* Otherwise create a new gdbarch for the specified machine type. */
3198 tdep = XCNEW (struct gdbarch_tdep);
3199 tdep->abi = tdep_abi;
3200 tdep->vector_abi = vector_abi;
3201 tdep->have_linux_v1 = have_linux_v1;
3202 tdep->have_linux_v2 = have_linux_v2;
3203 tdep->have_tdb = have_tdb;
3204 gdbarch = gdbarch_alloc (&info, tdep);
3205
3206 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
3207 set_gdbarch_char_signed (gdbarch, 0);
3208
3209 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3210 We can safely let them default to 128-bit, since the debug info
3211 will give the size of type actually used in each case. */
3212 set_gdbarch_long_double_bit (gdbarch, 128);
3213 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3214
3215 /* Amount PC must be decremented by after a breakpoint. This is
3216 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
3217 always. */
3218 set_gdbarch_decr_pc_after_break (gdbarch, 2);
3219 /* Stack grows downward. */
3220 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
3221 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3222 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
3223 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
3224
3225 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
3226 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
3227 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
3228 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
3229 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
3230 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
3231 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
3232 set_gdbarch_iterate_over_regset_sections (gdbarch,
3233 s390_iterate_over_regset_sections);
3234 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3235 set_gdbarch_write_pc (gdbarch, s390_write_pc);
3236 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3237 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3238 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3239 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3240 set_tdesc_pseudo_register_reggroup_p (gdbarch,
3241 s390_pseudo_register_reggroup_p);
3242 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3243 set_gdbarch_register_name (gdbarch, s390_register_name);
3244
3245 /* Assign pseudo register numbers. */
3246 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3247 last_pseudo_reg = first_pseudo_reg;
3248 tdep->gpr_full_regnum = -1;
3249 if (have_upper)
3250 {
3251 tdep->gpr_full_regnum = last_pseudo_reg;
3252 last_pseudo_reg += 16;
3253 }
3254 tdep->v0_full_regnum = -1;
3255 if (have_vx)
3256 {
3257 tdep->v0_full_regnum = last_pseudo_reg;
3258 last_pseudo_reg += 16;
3259 }
3260 tdep->pc_regnum = last_pseudo_reg++;
3261 tdep->cc_regnum = last_pseudo_reg++;
3262 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3263 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
3264
3265 /* Inferior function calls. */
3266 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
3267 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
3268 set_gdbarch_frame_align (gdbarch, s390_frame_align);
3269 set_gdbarch_return_value (gdbarch, s390_return_value);
3270
3271 /* Syscall handling. */
3272 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
3273
3274 /* Frame handling. */
3275 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
3276 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
3277 dwarf2_append_unwinders (gdbarch);
3278 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
3279 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3280 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3281 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
3282 frame_base_set_default (gdbarch, &s390_frame_base);
3283 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3284 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3285
3286 /* Displaced stepping. */
3287 set_gdbarch_displaced_step_copy_insn (gdbarch,
3288 simple_displaced_step_copy_insn);
3289 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3290 set_gdbarch_displaced_step_free_closure (gdbarch,
3291 simple_displaced_step_free_closure);
3292 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
3293 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3294
3295 /* Note that GNU/Linux is the only OS supported on this
3296 platform. */
3297 linux_init_abi (info, gdbarch);
3298
3299 switch (tdep->abi)
3300 {
3301 case ABI_LINUX_S390:
3302 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
3303 set_solib_svr4_fetch_link_map_offsets
3304 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
3305
3306 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390);
3307 break;
3308
3309 case ABI_LINUX_ZSERIES:
3310 set_gdbarch_long_bit (gdbarch, 64);
3311 set_gdbarch_long_long_bit (gdbarch, 64);
3312 set_gdbarch_ptr_bit (gdbarch, 64);
3313 set_solib_svr4_fetch_link_map_offsets
3314 (gdbarch, svr4_lp64_fetch_link_map_offsets);
3315 set_gdbarch_address_class_type_flags (gdbarch,
3316 s390_address_class_type_flags);
3317 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3318 s390_address_class_type_flags_to_name);
3319 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3320 s390_address_class_name_to_type_flags);
3321 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390X);
3322 break;
3323 }
3324
3325 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3326
3327 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3328
3329 /* Enable TLS support. */
3330 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3331 svr4_fetch_objfile_link_map);
3332
3333 /* SystemTap functions. */
3334 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
3335 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
3336 stap_register_indirection_prefixes);
3337 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
3338 stap_register_indirection_suffixes);
3339 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3340 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
3341 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
3342
3343 return gdbarch;
3344 }
3345
3346
3347 extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3348
3349 void
3350 _initialize_s390_tdep (void)
3351 {
3352 /* Hook us into the gdbarch mechanism. */
3353 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
3354
3355 /* Initialize the GNU/Linux target descriptions. */
3356 initialize_tdesc_s390_linux32 ();
3357 initialize_tdesc_s390_linux32v1 ();
3358 initialize_tdesc_s390_linux32v2 ();
3359 initialize_tdesc_s390_linux64 ();
3360 initialize_tdesc_s390_linux64v1 ();
3361 initialize_tdesc_s390_linux64v2 ();
3362 initialize_tdesc_s390_te_linux64 ();
3363 initialize_tdesc_s390_vx_linux64 ();
3364 initialize_tdesc_s390_tevx_linux64 ();
3365 initialize_tdesc_s390x_linux64 ();
3366 initialize_tdesc_s390x_linux64v1 ();
3367 initialize_tdesc_s390x_linux64v2 ();
3368 initialize_tdesc_s390x_te_linux64 ();
3369 initialize_tdesc_s390x_vx_linux64 ();
3370 initialize_tdesc_s390x_tevx_linux64 ();
3371 }
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