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[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
5
6 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 51 Franklin Street, Fifth Floor,
24 Boston, MA 02110-1301, USA. */
25
26 #include "defs.h"
27 #include "arch-utils.h"
28 #include "frame.h"
29 #include "inferior.h"
30 #include "symtab.h"
31 #include "target.h"
32 #include "gdbcore.h"
33 #include "gdbcmd.h"
34 #include "objfiles.h"
35 #include "floatformat.h"
36 #include "regcache.h"
37 #include "trad-frame.h"
38 #include "frame-base.h"
39 #include "frame-unwind.h"
40 #include "dwarf2-frame.h"
41 #include "reggroups.h"
42 #include "regset.h"
43 #include "value.h"
44 #include "gdb_assert.h"
45 #include "dis-asm.h"
46 #include "solib-svr4.h"
47 #include "prologue-value.h"
48
49 #include "s390-tdep.h"
50
51
52 /* The tdep structure. */
53
54 struct gdbarch_tdep
55 {
56 /* ABI version. */
57 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
58
59 /* Core file register sets. */
60 const struct regset *gregset;
61 int sizeof_gregset;
62
63 const struct regset *fpregset;
64 int sizeof_fpregset;
65 };
66
67
68 /* Register information. */
69
70 struct s390_register_info
71 {
72 char *name;
73 struct type **type;
74 };
75
76 static struct s390_register_info s390_register_info[S390_NUM_TOTAL_REGS] =
77 {
78 /* Program Status Word. */
79 { "pswm", &builtin_type_long },
80 { "pswa", &builtin_type_long },
81
82 /* General Purpose Registers. */
83 { "r0", &builtin_type_long },
84 { "r1", &builtin_type_long },
85 { "r2", &builtin_type_long },
86 { "r3", &builtin_type_long },
87 { "r4", &builtin_type_long },
88 { "r5", &builtin_type_long },
89 { "r6", &builtin_type_long },
90 { "r7", &builtin_type_long },
91 { "r8", &builtin_type_long },
92 { "r9", &builtin_type_long },
93 { "r10", &builtin_type_long },
94 { "r11", &builtin_type_long },
95 { "r12", &builtin_type_long },
96 { "r13", &builtin_type_long },
97 { "r14", &builtin_type_long },
98 { "r15", &builtin_type_long },
99
100 /* Access Registers. */
101 { "acr0", &builtin_type_int },
102 { "acr1", &builtin_type_int },
103 { "acr2", &builtin_type_int },
104 { "acr3", &builtin_type_int },
105 { "acr4", &builtin_type_int },
106 { "acr5", &builtin_type_int },
107 { "acr6", &builtin_type_int },
108 { "acr7", &builtin_type_int },
109 { "acr8", &builtin_type_int },
110 { "acr9", &builtin_type_int },
111 { "acr10", &builtin_type_int },
112 { "acr11", &builtin_type_int },
113 { "acr12", &builtin_type_int },
114 { "acr13", &builtin_type_int },
115 { "acr14", &builtin_type_int },
116 { "acr15", &builtin_type_int },
117
118 /* Floating Point Control Word. */
119 { "fpc", &builtin_type_int },
120
121 /* Floating Point Registers. */
122 { "f0", &builtin_type_double },
123 { "f1", &builtin_type_double },
124 { "f2", &builtin_type_double },
125 { "f3", &builtin_type_double },
126 { "f4", &builtin_type_double },
127 { "f5", &builtin_type_double },
128 { "f6", &builtin_type_double },
129 { "f7", &builtin_type_double },
130 { "f8", &builtin_type_double },
131 { "f9", &builtin_type_double },
132 { "f10", &builtin_type_double },
133 { "f11", &builtin_type_double },
134 { "f12", &builtin_type_double },
135 { "f13", &builtin_type_double },
136 { "f14", &builtin_type_double },
137 { "f15", &builtin_type_double },
138
139 /* Pseudo registers. */
140 { "pc", &builtin_type_void_func_ptr },
141 { "cc", &builtin_type_int },
142 };
143
144 /* Return the name of register REGNUM. */
145 static const char *
146 s390_register_name (int regnum)
147 {
148 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
149 return s390_register_info[regnum].name;
150 }
151
152 /* Return the GDB type object for the "standard" data type of data in
153 register REGNUM. */
154 static struct type *
155 s390_register_type (struct gdbarch *gdbarch, int regnum)
156 {
157 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
158 return *s390_register_info[regnum].type;
159 }
160
161 /* DWARF Register Mapping. */
162
163 static int s390_dwarf_regmap[] =
164 {
165 /* General Purpose Registers. */
166 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
167 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
168 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
169 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
170
171 /* Floating Point Registers. */
172 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
173 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
174 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
175 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
176
177 /* Control Registers (not mapped). */
178 -1, -1, -1, -1, -1, -1, -1, -1,
179 -1, -1, -1, -1, -1, -1, -1, -1,
180
181 /* Access Registers. */
182 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
183 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
184 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
185 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
186
187 /* Program Status Word. */
188 S390_PSWM_REGNUM,
189 S390_PSWA_REGNUM
190 };
191
192 /* Convert DWARF register number REG to the appropriate register
193 number used by GDB. */
194 static int
195 s390_dwarf_reg_to_regnum (int reg)
196 {
197 int regnum = -1;
198
199 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
200 regnum = s390_dwarf_regmap[reg];
201
202 if (regnum == -1)
203 warning (_("Unmapped DWARF Register #%d encountered."), reg);
204
205 return regnum;
206 }
207
208 /* Pseudo registers - PC and condition code. */
209
210 static void
211 s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
212 int regnum, gdb_byte *buf)
213 {
214 ULONGEST val;
215
216 switch (regnum)
217 {
218 case S390_PC_REGNUM:
219 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
220 store_unsigned_integer (buf, 4, val & 0x7fffffff);
221 break;
222
223 case S390_CC_REGNUM:
224 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
225 store_unsigned_integer (buf, 4, (val >> 12) & 3);
226 break;
227
228 default:
229 internal_error (__FILE__, __LINE__, _("invalid regnum"));
230 }
231 }
232
233 static void
234 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
235 int regnum, const gdb_byte *buf)
236 {
237 ULONGEST val, psw;
238
239 switch (regnum)
240 {
241 case S390_PC_REGNUM:
242 val = extract_unsigned_integer (buf, 4);
243 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
244 psw = (psw & 0x80000000) | (val & 0x7fffffff);
245 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw);
246 break;
247
248 case S390_CC_REGNUM:
249 val = extract_unsigned_integer (buf, 4);
250 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
251 psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
252 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
253 break;
254
255 default:
256 internal_error (__FILE__, __LINE__, _("invalid regnum"));
257 }
258 }
259
260 static void
261 s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
262 int regnum, gdb_byte *buf)
263 {
264 ULONGEST val;
265
266 switch (regnum)
267 {
268 case S390_PC_REGNUM:
269 regcache_raw_read (regcache, S390_PSWA_REGNUM, buf);
270 break;
271
272 case S390_CC_REGNUM:
273 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
274 store_unsigned_integer (buf, 4, (val >> 44) & 3);
275 break;
276
277 default:
278 internal_error (__FILE__, __LINE__, _("invalid regnum"));
279 }
280 }
281
282 static void
283 s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
284 int regnum, const gdb_byte *buf)
285 {
286 ULONGEST val, psw;
287
288 switch (regnum)
289 {
290 case S390_PC_REGNUM:
291 regcache_raw_write (regcache, S390_PSWA_REGNUM, buf);
292 break;
293
294 case S390_CC_REGNUM:
295 val = extract_unsigned_integer (buf, 4);
296 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
297 psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
298 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
299 break;
300
301 default:
302 internal_error (__FILE__, __LINE__, _("invalid regnum"));
303 }
304 }
305
306 /* 'float' values are stored in the upper half of floating-point
307 registers, even though we are otherwise a big-endian platform. */
308
309 static int
310 s390_convert_register_p (int regno, struct type *type)
311 {
312 return (regno >= S390_F0_REGNUM && regno <= S390_F15_REGNUM)
313 && TYPE_LENGTH (type) < 8;
314 }
315
316 static void
317 s390_register_to_value (struct frame_info *frame, int regnum,
318 struct type *valtype, gdb_byte *out)
319 {
320 gdb_byte in[8];
321 int len = TYPE_LENGTH (valtype);
322 gdb_assert (len < 8);
323
324 get_frame_register (frame, regnum, in);
325 memcpy (out, in, len);
326 }
327
328 static void
329 s390_value_to_register (struct frame_info *frame, int regnum,
330 struct type *valtype, const gdb_byte *in)
331 {
332 gdb_byte out[8];
333 int len = TYPE_LENGTH (valtype);
334 gdb_assert (len < 8);
335
336 memset (out, 0, 8);
337 memcpy (out, in, len);
338 put_frame_register (frame, regnum, out);
339 }
340
341 /* Register groups. */
342
343 static int
344 s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
345 struct reggroup *group)
346 {
347 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
348
349 /* Registers displayed via 'info regs'. */
350 if (group == general_reggroup)
351 return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
352 || regnum == S390_PC_REGNUM
353 || regnum == S390_CC_REGNUM;
354
355 /* Registers displayed via 'info float'. */
356 if (group == float_reggroup)
357 return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
358 || regnum == S390_FPC_REGNUM;
359
360 /* Registers that need to be saved/restored in order to
361 push or pop frames. */
362 if (group == save_reggroup || group == restore_reggroup)
363 return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM;
364
365 return default_register_reggroup_p (gdbarch, regnum, group);
366 }
367
368
369 /* Core file register sets. */
370
371 int s390_regmap_gregset[S390_NUM_REGS] =
372 {
373 /* Program Status Word. */
374 0x00, 0x04,
375 /* General Purpose Registers. */
376 0x08, 0x0c, 0x10, 0x14,
377 0x18, 0x1c, 0x20, 0x24,
378 0x28, 0x2c, 0x30, 0x34,
379 0x38, 0x3c, 0x40, 0x44,
380 /* Access Registers. */
381 0x48, 0x4c, 0x50, 0x54,
382 0x58, 0x5c, 0x60, 0x64,
383 0x68, 0x6c, 0x70, 0x74,
384 0x78, 0x7c, 0x80, 0x84,
385 /* Floating Point Control Word. */
386 -1,
387 /* Floating Point Registers. */
388 -1, -1, -1, -1, -1, -1, -1, -1,
389 -1, -1, -1, -1, -1, -1, -1, -1,
390 };
391
392 int s390x_regmap_gregset[S390_NUM_REGS] =
393 {
394 0x00, 0x08,
395 /* General Purpose Registers. */
396 0x10, 0x18, 0x20, 0x28,
397 0x30, 0x38, 0x40, 0x48,
398 0x50, 0x58, 0x60, 0x68,
399 0x70, 0x78, 0x80, 0x88,
400 /* Access Registers. */
401 0x90, 0x94, 0x98, 0x9c,
402 0xa0, 0xa4, 0xa8, 0xac,
403 0xb0, 0xb4, 0xb8, 0xbc,
404 0xc0, 0xc4, 0xc8, 0xcc,
405 /* Floating Point Control Word. */
406 -1,
407 /* Floating Point Registers. */
408 -1, -1, -1, -1, -1, -1, -1, -1,
409 -1, -1, -1, -1, -1, -1, -1, -1,
410 };
411
412 int s390_regmap_fpregset[S390_NUM_REGS] =
413 {
414 /* Program Status Word. */
415 -1, -1,
416 /* General Purpose Registers. */
417 -1, -1, -1, -1, -1, -1, -1, -1,
418 -1, -1, -1, -1, -1, -1, -1, -1,
419 /* Access Registers. */
420 -1, -1, -1, -1, -1, -1, -1, -1,
421 -1, -1, -1, -1, -1, -1, -1, -1,
422 /* Floating Point Control Word. */
423 0x00,
424 /* Floating Point Registers. */
425 0x08, 0x10, 0x18, 0x20,
426 0x28, 0x30, 0x38, 0x40,
427 0x48, 0x50, 0x58, 0x60,
428 0x68, 0x70, 0x78, 0x80,
429 };
430
431 /* Supply register REGNUM from the register set REGSET to register cache
432 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
433 static void
434 s390_supply_regset (const struct regset *regset, struct regcache *regcache,
435 int regnum, const void *regs, size_t len)
436 {
437 const int *offset = regset->descr;
438 int i;
439
440 for (i = 0; i < S390_NUM_REGS; i++)
441 {
442 if ((regnum == i || regnum == -1) && offset[i] != -1)
443 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
444 }
445 }
446
447 /* Collect register REGNUM from the register cache REGCACHE and store
448 it in the buffer specified by REGS and LEN as described by the
449 general-purpose register set REGSET. If REGNUM is -1, do this for
450 all registers in REGSET. */
451 static void
452 s390_collect_regset (const struct regset *regset,
453 const struct regcache *regcache,
454 int regnum, void *regs, size_t len)
455 {
456 const int *offset = regset->descr;
457 int i;
458
459 for (i = 0; i < S390_NUM_REGS; i++)
460 {
461 if ((regnum == i || regnum == -1) && offset[i] != -1)
462 regcache_raw_collect (regcache, i, (char *)regs + offset[i]);
463 }
464 }
465
466 static const struct regset s390_gregset = {
467 s390_regmap_gregset,
468 s390_supply_regset,
469 s390_collect_regset
470 };
471
472 static const struct regset s390x_gregset = {
473 s390x_regmap_gregset,
474 s390_supply_regset,
475 s390_collect_regset
476 };
477
478 static const struct regset s390_fpregset = {
479 s390_regmap_fpregset,
480 s390_supply_regset,
481 s390_collect_regset
482 };
483
484 /* Return the appropriate register set for the core section identified
485 by SECT_NAME and SECT_SIZE. */
486 const struct regset *
487 s390_regset_from_core_section (struct gdbarch *gdbarch,
488 const char *sect_name, size_t sect_size)
489 {
490 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
491
492 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
493 return tdep->gregset;
494
495 if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
496 return tdep->fpregset;
497
498 return NULL;
499 }
500
501
502 /* Decoding S/390 instructions. */
503
504 /* Named opcode values for the S/390 instructions we recognize. Some
505 instructions have their opcode split across two fields; those are the
506 op1_* and op2_* enums. */
507 enum
508 {
509 op1_lhi = 0xa7, op2_lhi = 0x08,
510 op1_lghi = 0xa7, op2_lghi = 0x09,
511 op1_lgfi = 0xc0, op2_lgfi = 0x01,
512 op_lr = 0x18,
513 op_lgr = 0xb904,
514 op_l = 0x58,
515 op1_ly = 0xe3, op2_ly = 0x58,
516 op1_lg = 0xe3, op2_lg = 0x04,
517 op_lm = 0x98,
518 op1_lmy = 0xeb, op2_lmy = 0x98,
519 op1_lmg = 0xeb, op2_lmg = 0x04,
520 op_st = 0x50,
521 op1_sty = 0xe3, op2_sty = 0x50,
522 op1_stg = 0xe3, op2_stg = 0x24,
523 op_std = 0x60,
524 op_stm = 0x90,
525 op1_stmy = 0xeb, op2_stmy = 0x90,
526 op1_stmg = 0xeb, op2_stmg = 0x24,
527 op1_aghi = 0xa7, op2_aghi = 0x0b,
528 op1_ahi = 0xa7, op2_ahi = 0x0a,
529 op1_agfi = 0xc2, op2_agfi = 0x08,
530 op1_afi = 0xc2, op2_afi = 0x09,
531 op1_algfi= 0xc2, op2_algfi= 0x0a,
532 op1_alfi = 0xc2, op2_alfi = 0x0b,
533 op_ar = 0x1a,
534 op_agr = 0xb908,
535 op_a = 0x5a,
536 op1_ay = 0xe3, op2_ay = 0x5a,
537 op1_ag = 0xe3, op2_ag = 0x08,
538 op1_slgfi= 0xc2, op2_slgfi= 0x04,
539 op1_slfi = 0xc2, op2_slfi = 0x05,
540 op_sr = 0x1b,
541 op_sgr = 0xb909,
542 op_s = 0x5b,
543 op1_sy = 0xe3, op2_sy = 0x5b,
544 op1_sg = 0xe3, op2_sg = 0x09,
545 op_nr = 0x14,
546 op_ngr = 0xb980,
547 op_la = 0x41,
548 op1_lay = 0xe3, op2_lay = 0x71,
549 op1_larl = 0xc0, op2_larl = 0x00,
550 op_basr = 0x0d,
551 op_bas = 0x4d,
552 op_bcr = 0x07,
553 op_bc = 0x0d,
554 op1_bras = 0xa7, op2_bras = 0x05,
555 op1_brasl= 0xc0, op2_brasl= 0x05,
556 op1_brc = 0xa7, op2_brc = 0x04,
557 op1_brcl = 0xc0, op2_brcl = 0x04,
558 };
559
560
561 /* Read a single instruction from address AT. */
562
563 #define S390_MAX_INSTR_SIZE 6
564 static int
565 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
566 {
567 static int s390_instrlen[] = { 2, 4, 4, 6 };
568 int instrlen;
569
570 if (read_memory_nobpt (at, &instr[0], 2))
571 return -1;
572 instrlen = s390_instrlen[instr[0] >> 6];
573 if (instrlen > 2)
574 {
575 if (read_memory_nobpt (at + 2, &instr[2], instrlen - 2))
576 return -1;
577 }
578 return instrlen;
579 }
580
581
582 /* The functions below are for recognizing and decoding S/390
583 instructions of various formats. Each of them checks whether INSN
584 is an instruction of the given format, with the specified opcodes.
585 If it is, it sets the remaining arguments to the values of the
586 instruction's fields, and returns a non-zero value; otherwise, it
587 returns zero.
588
589 These functions' arguments appear in the order they appear in the
590 instruction, not in the machine-language form. So, opcodes always
591 come first, even though they're sometimes scattered around the
592 instructions. And displacements appear before base and extension
593 registers, as they do in the assembly syntax, not at the end, as
594 they do in the machine language. */
595 static int
596 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
597 {
598 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
599 {
600 *r1 = (insn[1] >> 4) & 0xf;
601 /* i2 is a 16-bit signed quantity. */
602 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
603 return 1;
604 }
605 else
606 return 0;
607 }
608
609
610 static int
611 is_ril (bfd_byte *insn, int op1, int op2,
612 unsigned int *r1, int *i2)
613 {
614 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
615 {
616 *r1 = (insn[1] >> 4) & 0xf;
617 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
618 no sign extension is necessary, but we don't want to assume
619 that. */
620 *i2 = (((insn[2] << 24)
621 | (insn[3] << 16)
622 | (insn[4] << 8)
623 | (insn[5])) ^ 0x80000000) - 0x80000000;
624 return 1;
625 }
626 else
627 return 0;
628 }
629
630
631 static int
632 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
633 {
634 if (insn[0] == op)
635 {
636 *r1 = (insn[1] >> 4) & 0xf;
637 *r2 = insn[1] & 0xf;
638 return 1;
639 }
640 else
641 return 0;
642 }
643
644
645 static int
646 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
647 {
648 if (((insn[0] << 8) | insn[1]) == op)
649 {
650 /* Yes, insn[3]. insn[2] is unused in RRE format. */
651 *r1 = (insn[3] >> 4) & 0xf;
652 *r2 = insn[3] & 0xf;
653 return 1;
654 }
655 else
656 return 0;
657 }
658
659
660 static int
661 is_rs (bfd_byte *insn, int op,
662 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
663 {
664 if (insn[0] == op)
665 {
666 *r1 = (insn[1] >> 4) & 0xf;
667 *r3 = insn[1] & 0xf;
668 *b2 = (insn[2] >> 4) & 0xf;
669 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
670 return 1;
671 }
672 else
673 return 0;
674 }
675
676
677 static int
678 is_rsy (bfd_byte *insn, int op1, int op2,
679 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
680 {
681 if (insn[0] == op1
682 && insn[5] == op2)
683 {
684 *r1 = (insn[1] >> 4) & 0xf;
685 *r3 = insn[1] & 0xf;
686 *b2 = (insn[2] >> 4) & 0xf;
687 /* The 'long displacement' is a 20-bit signed integer. */
688 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
689 ^ 0x80000) - 0x80000;
690 return 1;
691 }
692 else
693 return 0;
694 }
695
696
697 static int
698 is_rx (bfd_byte *insn, int op,
699 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
700 {
701 if (insn[0] == op)
702 {
703 *r1 = (insn[1] >> 4) & 0xf;
704 *x2 = insn[1] & 0xf;
705 *b2 = (insn[2] >> 4) & 0xf;
706 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
707 return 1;
708 }
709 else
710 return 0;
711 }
712
713
714 static int
715 is_rxy (bfd_byte *insn, int op1, int op2,
716 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
717 {
718 if (insn[0] == op1
719 && insn[5] == op2)
720 {
721 *r1 = (insn[1] >> 4) & 0xf;
722 *x2 = insn[1] & 0xf;
723 *b2 = (insn[2] >> 4) & 0xf;
724 /* The 'long displacement' is a 20-bit signed integer. */
725 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
726 ^ 0x80000) - 0x80000;
727 return 1;
728 }
729 else
730 return 0;
731 }
732
733
734 /* Prologue analysis. */
735
736 #define S390_NUM_GPRS 16
737 #define S390_NUM_FPRS 16
738
739 struct s390_prologue_data {
740
741 /* The stack. */
742 struct pv_area *stack;
743
744 /* The size of a GPR or FPR. */
745 int gpr_size;
746 int fpr_size;
747
748 /* The general-purpose registers. */
749 pv_t gpr[S390_NUM_GPRS];
750
751 /* The floating-point registers. */
752 pv_t fpr[S390_NUM_FPRS];
753
754 /* The offset relative to the CFA where the incoming GPR N was saved
755 by the function prologue. 0 if not saved or unknown. */
756 int gpr_slot[S390_NUM_GPRS];
757
758 /* Likewise for FPRs. */
759 int fpr_slot[S390_NUM_FPRS];
760
761 /* Nonzero if the backchain was saved. This is assumed to be the
762 case when the incoming SP is saved at the current SP location. */
763 int back_chain_saved_p;
764 };
765
766 /* Return the effective address for an X-style instruction, like:
767
768 L R1, D2(X2, B2)
769
770 Here, X2 and B2 are registers, and D2 is a signed 20-bit
771 constant; the effective address is the sum of all three. If either
772 X2 or B2 are zero, then it doesn't contribute to the sum --- this
773 means that r0 can't be used as either X2 or B2. */
774 static pv_t
775 s390_addr (struct s390_prologue_data *data,
776 int d2, unsigned int x2, unsigned int b2)
777 {
778 pv_t result;
779
780 result = pv_constant (d2);
781 if (x2)
782 result = pv_add (result, data->gpr[x2]);
783 if (b2)
784 result = pv_add (result, data->gpr[b2]);
785
786 return result;
787 }
788
789 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
790 static void
791 s390_store (struct s390_prologue_data *data,
792 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
793 pv_t value)
794 {
795 pv_t addr = s390_addr (data, d2, x2, b2);
796 pv_t offset;
797
798 /* Check whether we are storing the backchain. */
799 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
800
801 if (pv_is_constant (offset) && offset.k == 0)
802 if (size == data->gpr_size
803 && pv_is_register_k (value, S390_SP_REGNUM, 0))
804 {
805 data->back_chain_saved_p = 1;
806 return;
807 }
808
809
810 /* Check whether we are storing a register into the stack. */
811 if (!pv_area_store_would_trash (data->stack, addr))
812 pv_area_store (data->stack, addr, size, value);
813
814
815 /* Note: If this is some store we cannot identify, you might think we
816 should forget our cached values, as any of those might have been hit.
817
818 However, we make the assumption that the register save areas are only
819 ever stored to once in any given function, and we do recognize these
820 stores. Thus every store we cannot recognize does not hit our data. */
821 }
822
823 /* Do a SIZE-byte load from D2(X2,B2). */
824 static pv_t
825 s390_load (struct s390_prologue_data *data,
826 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
827
828 {
829 pv_t addr = s390_addr (data, d2, x2, b2);
830 pv_t offset;
831
832 /* If it's a load from an in-line constant pool, then we can
833 simulate that, under the assumption that the code isn't
834 going to change between the time the processor actually
835 executed it creating the current frame, and the time when
836 we're analyzing the code to unwind past that frame. */
837 if (pv_is_constant (addr))
838 {
839 struct section_table *secp;
840 secp = target_section_by_addr (&current_target, addr.k);
841 if (secp != NULL
842 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
843 & SEC_READONLY))
844 return pv_constant (read_memory_integer (addr.k, size));
845 }
846
847 /* Check whether we are accessing one of our save slots. */
848 return pv_area_fetch (data->stack, addr, size);
849 }
850
851 /* Function for finding saved registers in a 'struct pv_area'; we pass
852 this to pv_area_scan.
853
854 If VALUE is a saved register, ADDR says it was saved at a constant
855 offset from the frame base, and SIZE indicates that the whole
856 register was saved, record its offset in the reg_offset table in
857 PROLOGUE_UNTYPED. */
858 static void
859 s390_check_for_saved (void *data_untyped, pv_t addr, CORE_ADDR size, pv_t value)
860 {
861 struct s390_prologue_data *data = data_untyped;
862 int i, offset;
863
864 if (!pv_is_register (addr, S390_SP_REGNUM))
865 return;
866
867 offset = 16 * data->gpr_size + 32 - addr.k;
868
869 /* If we are storing the original value of a register, we want to
870 record the CFA offset. If the same register is stored multiple
871 times, the stack slot with the highest address counts. */
872
873 for (i = 0; i < S390_NUM_GPRS; i++)
874 if (size == data->gpr_size
875 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
876 if (data->gpr_slot[i] == 0
877 || data->gpr_slot[i] > offset)
878 {
879 data->gpr_slot[i] = offset;
880 return;
881 }
882
883 for (i = 0; i < S390_NUM_FPRS; i++)
884 if (size == data->fpr_size
885 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
886 if (data->fpr_slot[i] == 0
887 || data->fpr_slot[i] > offset)
888 {
889 data->fpr_slot[i] = offset;
890 return;
891 }
892 }
893
894 /* Analyze the prologue of the function starting at START_PC,
895 continuing at most until CURRENT_PC. Initialize DATA to
896 hold all information we find out about the state of the registers
897 and stack slots. Return the address of the instruction after
898 the last one that changed the SP, FP, or back chain; or zero
899 on error. */
900 static CORE_ADDR
901 s390_analyze_prologue (struct gdbarch *gdbarch,
902 CORE_ADDR start_pc,
903 CORE_ADDR current_pc,
904 struct s390_prologue_data *data)
905 {
906 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
907
908 /* Our return value:
909 The address of the instruction after the last one that changed
910 the SP, FP, or back chain; zero if we got an error trying to
911 read memory. */
912 CORE_ADDR result = start_pc;
913
914 /* The current PC for our abstract interpretation. */
915 CORE_ADDR pc;
916
917 /* The address of the next instruction after that. */
918 CORE_ADDR next_pc;
919
920 /* Set up everything's initial value. */
921 {
922 int i;
923
924 data->stack = make_pv_area (S390_SP_REGNUM);
925
926 /* For the purpose of prologue tracking, we consider the GPR size to
927 be equal to the ABI word size, even if it is actually larger
928 (i.e. when running a 32-bit binary under a 64-bit kernel). */
929 data->gpr_size = word_size;
930 data->fpr_size = 8;
931
932 for (i = 0; i < S390_NUM_GPRS; i++)
933 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
934
935 for (i = 0; i < S390_NUM_FPRS; i++)
936 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
937
938 for (i = 0; i < S390_NUM_GPRS; i++)
939 data->gpr_slot[i] = 0;
940
941 for (i = 0; i < S390_NUM_FPRS; i++)
942 data->fpr_slot[i] = 0;
943
944 data->back_chain_saved_p = 0;
945 }
946
947 /* Start interpreting instructions, until we hit the frame's
948 current PC or the first branch instruction. */
949 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
950 {
951 bfd_byte insn[S390_MAX_INSTR_SIZE];
952 int insn_len = s390_readinstruction (insn, pc);
953
954 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
955 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
956 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
957
958 /* Fields for various kinds of instructions. */
959 unsigned int b2, r1, r2, x2, r3;
960 int i2, d2;
961
962 /* The values of SP and FP before this instruction,
963 for detecting instructions that change them. */
964 pv_t pre_insn_sp, pre_insn_fp;
965 /* Likewise for the flag whether the back chain was saved. */
966 int pre_insn_back_chain_saved_p;
967
968 /* If we got an error trying to read the instruction, report it. */
969 if (insn_len < 0)
970 {
971 result = 0;
972 break;
973 }
974
975 next_pc = pc + insn_len;
976
977 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
978 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
979 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
980
981
982 /* LHI r1, i2 --- load halfword immediate. */
983 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
984 /* LGFI r1, i2 --- load fullword immediate. */
985 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
986 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
987 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
988 data->gpr[r1] = pv_constant (i2);
989
990 /* LR r1, r2 --- load from register. */
991 /* LGR r1, r2 --- load from register (64-bit version). */
992 else if (is_rr (insn32, op_lr, &r1, &r2)
993 || is_rre (insn64, op_lgr, &r1, &r2))
994 data->gpr[r1] = data->gpr[r2];
995
996 /* L r1, d2(x2, b2) --- load. */
997 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
998 /* LG r1, d2(x2, b2) --- load (64-bit version). */
999 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1000 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1001 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1002 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1003
1004 /* ST r1, d2(x2, b2) --- store. */
1005 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1006 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1007 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1008 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1009 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1010 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1011
1012 /* STD r1, d2(x2,b2) --- store floating-point register. */
1013 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
1014 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1015
1016 /* STM r1, r3, d2(b2) --- store multiple. */
1017 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version). */
1018 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1019 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1020 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1021 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
1022 {
1023 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1024 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
1025 }
1026
1027 /* AHI r1, i2 --- add halfword immediate. */
1028 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1029 /* AFI r1, i2 --- add fullword immediate. */
1030 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1031 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1032 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1033 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1034 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1035 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1036
1037 /* ALFI r1, i2 --- add logical immediate. */
1038 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1039 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1040 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1041 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1042 (CORE_ADDR)i2 & 0xffffffff);
1043
1044 /* AR r1, r2 -- add register. */
1045 /* AGR r1, r2 -- add register (64-bit version). */
1046 else if (is_rr (insn32, op_ar, &r1, &r2)
1047 || is_rre (insn64, op_agr, &r1, &r2))
1048 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1049
1050 /* A r1, d2(x2, b2) -- add. */
1051 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1052 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1053 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1054 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1055 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1056 data->gpr[r1] = pv_add (data->gpr[r1],
1057 s390_load (data, d2, x2, b2, data->gpr_size));
1058
1059 /* SLFI r1, i2 --- subtract logical immediate. */
1060 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1061 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1062 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1063 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1064 -((CORE_ADDR)i2 & 0xffffffff));
1065
1066 /* SR r1, r2 -- subtract register. */
1067 /* SGR r1, r2 -- subtract register (64-bit version). */
1068 else if (is_rr (insn32, op_sr, &r1, &r2)
1069 || is_rre (insn64, op_sgr, &r1, &r2))
1070 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1071
1072 /* S r1, d2(x2, b2) -- subtract. */
1073 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1074 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1075 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1076 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1077 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1078 data->gpr[r1] = pv_subtract (data->gpr[r1],
1079 s390_load (data, d2, x2, b2, data->gpr_size));
1080
1081 /* LA r1, d2(x2, b2) --- load address. */
1082 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1083 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1084 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1085 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1086
1087 /* LARL r1, i2 --- load address relative long. */
1088 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1089 data->gpr[r1] = pv_constant (pc + i2 * 2);
1090
1091 /* BASR r1, 0 --- branch and save.
1092 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1093 else if (is_rr (insn, op_basr, &r1, &r2)
1094 && r2 == 0)
1095 data->gpr[r1] = pv_constant (next_pc);
1096
1097 /* BRAS r1, i2 --- branch relative and save. */
1098 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1099 {
1100 data->gpr[r1] = pv_constant (next_pc);
1101 next_pc = pc + i2 * 2;
1102
1103 /* We'd better not interpret any backward branches. We'll
1104 never terminate. */
1105 if (next_pc <= pc)
1106 break;
1107 }
1108
1109 /* Terminate search when hitting any other branch instruction. */
1110 else if (is_rr (insn, op_basr, &r1, &r2)
1111 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1112 || is_rr (insn, op_bcr, &r1, &r2)
1113 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1114 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1115 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1116 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1117 break;
1118
1119 else
1120 /* An instruction we don't know how to simulate. The only
1121 safe thing to do would be to set every value we're tracking
1122 to 'unknown'. Instead, we'll be optimistic: we assume that
1123 we *can* interpret every instruction that the compiler uses
1124 to manipulate any of the data we're interested in here --
1125 then we can just ignore anything else. */
1126 ;
1127
1128 /* Record the address after the last instruction that changed
1129 the FP, SP, or backlink. Ignore instructions that changed
1130 them back to their original values --- those are probably
1131 restore instructions. (The back chain is never restored,
1132 just popped.) */
1133 {
1134 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1135 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1136
1137 if ((! pv_is_identical (pre_insn_sp, sp)
1138 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1139 && sp.kind != pvk_unknown)
1140 || (! pv_is_identical (pre_insn_fp, fp)
1141 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1142 && fp.kind != pvk_unknown)
1143 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1144 result = next_pc;
1145 }
1146 }
1147
1148 /* Record where all the registers were saved. */
1149 pv_area_scan (data->stack, s390_check_for_saved, data);
1150
1151 free_pv_area (data->stack);
1152 data->stack = NULL;
1153
1154 return result;
1155 }
1156
1157 /* Advance PC across any function entry prologue instructions to reach
1158 some "real" code. */
1159 static CORE_ADDR
1160 s390_skip_prologue (CORE_ADDR pc)
1161 {
1162 struct s390_prologue_data data;
1163 CORE_ADDR skip_pc;
1164 skip_pc = s390_analyze_prologue (current_gdbarch, pc, (CORE_ADDR)-1, &data);
1165 return skip_pc ? skip_pc : pc;
1166 }
1167
1168 /* Return true if we are in the functin's epilogue, i.e. after the
1169 instruction that destroyed the function's stack frame. */
1170 static int
1171 s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1172 {
1173 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1174
1175 /* In frameless functions, there's not frame to destroy and thus
1176 we don't care about the epilogue.
1177
1178 In functions with frame, the epilogue sequence is a pair of
1179 a LM-type instruction that restores (amongst others) the
1180 return register %r14 and the stack pointer %r15, followed
1181 by a branch 'br %r14' --or equivalent-- that effects the
1182 actual return.
1183
1184 In that situation, this function needs to return 'true' in
1185 exactly one case: when pc points to that branch instruction.
1186
1187 Thus we try to disassemble the one instructions immediately
1188 preceeding pc and check whether it is an LM-type instruction
1189 modifying the stack pointer.
1190
1191 Note that disassembling backwards is not reliable, so there
1192 is a slight chance of false positives here ... */
1193
1194 bfd_byte insn[6];
1195 unsigned int r1, r3, b2;
1196 int d2;
1197
1198 if (word_size == 4
1199 && !read_memory_nobpt (pc - 4, insn, 4)
1200 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1201 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1202 return 1;
1203
1204 if (word_size == 4
1205 && !read_memory_nobpt (pc - 6, insn, 6)
1206 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1207 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1208 return 1;
1209
1210 if (word_size == 8
1211 && !read_memory_nobpt (pc - 6, insn, 6)
1212 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
1213 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1214 return 1;
1215
1216 return 0;
1217 }
1218
1219
1220 /* Normal stack frames. */
1221
1222 struct s390_unwind_cache {
1223
1224 CORE_ADDR func;
1225 CORE_ADDR frame_base;
1226 CORE_ADDR local_base;
1227
1228 struct trad_frame_saved_reg *saved_regs;
1229 };
1230
1231 static int
1232 s390_prologue_frame_unwind_cache (struct frame_info *next_frame,
1233 struct s390_unwind_cache *info)
1234 {
1235 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1236 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1237 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1238 struct s390_prologue_data data;
1239 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1240 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1241 int i;
1242 CORE_ADDR cfa;
1243 CORE_ADDR func;
1244 CORE_ADDR result;
1245 ULONGEST reg;
1246 CORE_ADDR prev_sp;
1247 int frame_pointer;
1248 int size;
1249
1250 /* Try to find the function start address. If we can't find it, we don't
1251 bother searching for it -- with modern compilers this would be mostly
1252 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1253 or else a valid backchain ... */
1254 func = frame_func_unwind (next_frame);
1255 if (!func)
1256 return 0;
1257
1258 /* Try to analyze the prologue. */
1259 result = s390_analyze_prologue (gdbarch, func,
1260 frame_pc_unwind (next_frame), &data);
1261 if (!result)
1262 return 0;
1263
1264 /* If this was successful, we should have found the instruction that
1265 sets the stack pointer register to the previous value of the stack
1266 pointer minus the frame size. */
1267 if (!pv_is_register (*sp, S390_SP_REGNUM))
1268 return 0;
1269
1270 /* A frame size of zero at this point can mean either a real
1271 frameless function, or else a failure to find the prologue.
1272 Perform some sanity checks to verify we really have a
1273 frameless function. */
1274 if (sp->k == 0)
1275 {
1276 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1277 size zero. This is only possible if the next frame is a sentinel
1278 frame, a dummy frame, or a signal trampoline frame. */
1279 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1280 needed, instead the code should simpliy rely on its
1281 analysis. */
1282 if (get_frame_type (next_frame) == NORMAL_FRAME)
1283 return 0;
1284
1285 /* If we really have a frameless function, %r14 must be valid
1286 -- in particular, it must point to a different function. */
1287 reg = frame_unwind_register_unsigned (next_frame, S390_RETADDR_REGNUM);
1288 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1289 if (get_pc_function_start (reg) == func)
1290 {
1291 /* However, there is one case where it *is* valid for %r14
1292 to point to the same function -- if this is a recursive
1293 call, and we have stopped in the prologue *before* the
1294 stack frame was allocated.
1295
1296 Recognize this case by looking ahead a bit ... */
1297
1298 struct s390_prologue_data data2;
1299 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1300
1301 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
1302 && pv_is_register (*sp, S390_SP_REGNUM)
1303 && sp->k != 0))
1304 return 0;
1305 }
1306 }
1307
1308
1309 /* OK, we've found valid prologue data. */
1310 size = -sp->k;
1311
1312 /* If the frame pointer originally also holds the same value
1313 as the stack pointer, we're probably using it. If it holds
1314 some other value -- even a constant offset -- it is most
1315 likely used as temp register. */
1316 if (pv_is_identical (*sp, *fp))
1317 frame_pointer = S390_FRAME_REGNUM;
1318 else
1319 frame_pointer = S390_SP_REGNUM;
1320
1321 /* If we've detected a function with stack frame, we'll still have to
1322 treat it as frameless if we're currently within the function epilog
1323 code at a point where the frame pointer has already been restored.
1324 This can only happen in an innermost frame. */
1325 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1326 instead the code should simpliy rely on its analysis. */
1327 if (size > 0 && get_frame_type (next_frame) != NORMAL_FRAME)
1328 {
1329 /* See the comment in s390_in_function_epilogue_p on why this is
1330 not completely reliable ... */
1331 if (s390_in_function_epilogue_p (gdbarch, frame_pc_unwind (next_frame)))
1332 {
1333 memset (&data, 0, sizeof (data));
1334 size = 0;
1335 frame_pointer = S390_SP_REGNUM;
1336 }
1337 }
1338
1339 /* Once we know the frame register and the frame size, we can unwind
1340 the current value of the frame register from the next frame, and
1341 add back the frame size to arrive that the previous frame's
1342 stack pointer value. */
1343 prev_sp = frame_unwind_register_unsigned (next_frame, frame_pointer) + size;
1344 cfa = prev_sp + 16*word_size + 32;
1345
1346 /* Record the addresses of all register spill slots the prologue parser
1347 has recognized. Consider only registers defined as call-saved by the
1348 ABI; for call-clobbered registers the parser may have recognized
1349 spurious stores. */
1350
1351 for (i = 6; i <= 15; i++)
1352 if (data.gpr_slot[i] != 0)
1353 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
1354
1355 switch (tdep->abi)
1356 {
1357 case ABI_LINUX_S390:
1358 if (data.fpr_slot[4] != 0)
1359 info->saved_regs[S390_F4_REGNUM].addr = cfa - data.fpr_slot[4];
1360 if (data.fpr_slot[6] != 0)
1361 info->saved_regs[S390_F6_REGNUM].addr = cfa - data.fpr_slot[6];
1362 break;
1363
1364 case ABI_LINUX_ZSERIES:
1365 for (i = 8; i <= 15; i++)
1366 if (data.fpr_slot[i] != 0)
1367 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
1368 break;
1369 }
1370
1371 /* Function return will set PC to %r14. */
1372 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1373
1374 /* In frameless functions, we unwind simply by moving the return
1375 address to the PC. However, if we actually stored to the
1376 save area, use that -- we might only think the function frameless
1377 because we're in the middle of the prologue ... */
1378 if (size == 0
1379 && !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1380 {
1381 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
1382 }
1383
1384 /* Another sanity check: unless this is a frameless function,
1385 we should have found spill slots for SP and PC.
1386 If not, we cannot unwind further -- this happens e.g. in
1387 libc's thread_start routine. */
1388 if (size > 0)
1389 {
1390 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
1391 || !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1392 prev_sp = -1;
1393 }
1394
1395 /* We use the current value of the frame register as local_base,
1396 and the top of the register save area as frame_base. */
1397 if (prev_sp != -1)
1398 {
1399 info->frame_base = prev_sp + 16*word_size + 32;
1400 info->local_base = prev_sp - size;
1401 }
1402
1403 info->func = func;
1404 return 1;
1405 }
1406
1407 static void
1408 s390_backchain_frame_unwind_cache (struct frame_info *next_frame,
1409 struct s390_unwind_cache *info)
1410 {
1411 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1412 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1413 CORE_ADDR backchain;
1414 ULONGEST reg;
1415 LONGEST sp;
1416
1417 /* Get the backchain. */
1418 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1419 backchain = read_memory_unsigned_integer (reg, word_size);
1420
1421 /* A zero backchain terminates the frame chain. As additional
1422 sanity check, let's verify that the spill slot for SP in the
1423 save area pointed to by the backchain in fact links back to
1424 the save area. */
1425 if (backchain != 0
1426 && safe_read_memory_integer (backchain + 15*word_size, word_size, &sp)
1427 && (CORE_ADDR)sp == backchain)
1428 {
1429 /* We don't know which registers were saved, but it will have
1430 to be at least %r14 and %r15. This will allow us to continue
1431 unwinding, but other prev-frame registers may be incorrect ... */
1432 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1433 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1434
1435 /* Function return will set PC to %r14. */
1436 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1437
1438 /* We use the current value of the frame register as local_base,
1439 and the top of the register save area as frame_base. */
1440 info->frame_base = backchain + 16*word_size + 32;
1441 info->local_base = reg;
1442 }
1443
1444 info->func = frame_pc_unwind (next_frame);
1445 }
1446
1447 static struct s390_unwind_cache *
1448 s390_frame_unwind_cache (struct frame_info *next_frame,
1449 void **this_prologue_cache)
1450 {
1451 struct s390_unwind_cache *info;
1452 if (*this_prologue_cache)
1453 return *this_prologue_cache;
1454
1455 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1456 *this_prologue_cache = info;
1457 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1458 info->func = -1;
1459 info->frame_base = -1;
1460 info->local_base = -1;
1461
1462 /* Try to use prologue analysis to fill the unwind cache.
1463 If this fails, fall back to reading the stack backchain. */
1464 if (!s390_prologue_frame_unwind_cache (next_frame, info))
1465 s390_backchain_frame_unwind_cache (next_frame, info);
1466
1467 return info;
1468 }
1469
1470 static void
1471 s390_frame_this_id (struct frame_info *next_frame,
1472 void **this_prologue_cache,
1473 struct frame_id *this_id)
1474 {
1475 struct s390_unwind_cache *info
1476 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
1477
1478 if (info->frame_base == -1)
1479 return;
1480
1481 *this_id = frame_id_build (info->frame_base, info->func);
1482 }
1483
1484 static void
1485 s390_frame_prev_register (struct frame_info *next_frame,
1486 void **this_prologue_cache,
1487 int regnum, int *optimizedp,
1488 enum lval_type *lvalp, CORE_ADDR *addrp,
1489 int *realnump, gdb_byte *bufferp)
1490 {
1491 struct s390_unwind_cache *info
1492 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
1493 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1494 optimizedp, lvalp, addrp, realnump, bufferp);
1495 }
1496
1497 static const struct frame_unwind s390_frame_unwind = {
1498 NORMAL_FRAME,
1499 s390_frame_this_id,
1500 s390_frame_prev_register
1501 };
1502
1503 static const struct frame_unwind *
1504 s390_frame_sniffer (struct frame_info *next_frame)
1505 {
1506 return &s390_frame_unwind;
1507 }
1508
1509
1510 /* Code stubs and their stack frames. For things like PLTs and NULL
1511 function calls (where there is no true frame and the return address
1512 is in the RETADDR register). */
1513
1514 struct s390_stub_unwind_cache
1515 {
1516 CORE_ADDR frame_base;
1517 struct trad_frame_saved_reg *saved_regs;
1518 };
1519
1520 static struct s390_stub_unwind_cache *
1521 s390_stub_frame_unwind_cache (struct frame_info *next_frame,
1522 void **this_prologue_cache)
1523 {
1524 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1525 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1526 struct s390_stub_unwind_cache *info;
1527 ULONGEST reg;
1528
1529 if (*this_prologue_cache)
1530 return *this_prologue_cache;
1531
1532 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
1533 *this_prologue_cache = info;
1534 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1535
1536 /* The return address is in register %r14. */
1537 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
1538
1539 /* Retrieve stack pointer and determine our frame base. */
1540 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1541 info->frame_base = reg + 16*word_size + 32;
1542
1543 return info;
1544 }
1545
1546 static void
1547 s390_stub_frame_this_id (struct frame_info *next_frame,
1548 void **this_prologue_cache,
1549 struct frame_id *this_id)
1550 {
1551 struct s390_stub_unwind_cache *info
1552 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache);
1553 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
1554 }
1555
1556 static void
1557 s390_stub_frame_prev_register (struct frame_info *next_frame,
1558 void **this_prologue_cache,
1559 int regnum, int *optimizedp,
1560 enum lval_type *lvalp, CORE_ADDR *addrp,
1561 int *realnump, gdb_byte *bufferp)
1562 {
1563 struct s390_stub_unwind_cache *info
1564 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache);
1565 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1566 optimizedp, lvalp, addrp, realnump, bufferp);
1567 }
1568
1569 static const struct frame_unwind s390_stub_frame_unwind = {
1570 NORMAL_FRAME,
1571 s390_stub_frame_this_id,
1572 s390_stub_frame_prev_register
1573 };
1574
1575 static const struct frame_unwind *
1576 s390_stub_frame_sniffer (struct frame_info *next_frame)
1577 {
1578 CORE_ADDR pc = frame_pc_unwind (next_frame);
1579 bfd_byte insn[S390_MAX_INSTR_SIZE];
1580
1581 /* If the current PC points to non-readable memory, we assume we
1582 have trapped due to an invalid function pointer call. We handle
1583 the non-existing current function like a PLT stub. */
1584 if (in_plt_section (pc, NULL)
1585 || s390_readinstruction (insn, pc) < 0)
1586 return &s390_stub_frame_unwind;
1587 return NULL;
1588 }
1589
1590
1591 /* Signal trampoline stack frames. */
1592
1593 struct s390_sigtramp_unwind_cache {
1594 CORE_ADDR frame_base;
1595 struct trad_frame_saved_reg *saved_regs;
1596 };
1597
1598 static struct s390_sigtramp_unwind_cache *
1599 s390_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
1600 void **this_prologue_cache)
1601 {
1602 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1603 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1604 struct s390_sigtramp_unwind_cache *info;
1605 ULONGEST this_sp, prev_sp;
1606 CORE_ADDR next_ra, next_cfa, sigreg_ptr;
1607 int i;
1608
1609 if (*this_prologue_cache)
1610 return *this_prologue_cache;
1611
1612 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
1613 *this_prologue_cache = info;
1614 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1615
1616 this_sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1617 next_ra = frame_pc_unwind (next_frame);
1618 next_cfa = this_sp + 16*word_size + 32;
1619
1620 /* New-style RT frame:
1621 retcode + alignment (8 bytes)
1622 siginfo (128 bytes)
1623 ucontext (contains sigregs at offset 5 words) */
1624 if (next_ra == next_cfa)
1625 {
1626 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
1627 }
1628
1629 /* Old-style RT frame and all non-RT frames:
1630 old signal mask (8 bytes)
1631 pointer to sigregs */
1632 else
1633 {
1634 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, word_size);
1635 }
1636
1637 /* The sigregs structure looks like this:
1638 long psw_mask;
1639 long psw_addr;
1640 long gprs[16];
1641 int acrs[16];
1642 int fpc;
1643 int __pad;
1644 double fprs[16]; */
1645
1646 /* Let's ignore the PSW mask, it will not be restored anyway. */
1647 sigreg_ptr += word_size;
1648
1649 /* Next comes the PSW address. */
1650 info->saved_regs[S390_PC_REGNUM].addr = sigreg_ptr;
1651 sigreg_ptr += word_size;
1652
1653 /* Then the GPRs. */
1654 for (i = 0; i < 16; i++)
1655 {
1656 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
1657 sigreg_ptr += word_size;
1658 }
1659
1660 /* Then the ACRs. */
1661 for (i = 0; i < 16; i++)
1662 {
1663 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
1664 sigreg_ptr += 4;
1665 }
1666
1667 /* The floating-point control word. */
1668 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
1669 sigreg_ptr += 8;
1670
1671 /* And finally the FPRs. */
1672 for (i = 0; i < 16; i++)
1673 {
1674 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
1675 sigreg_ptr += 8;
1676 }
1677
1678 /* Restore the previous frame's SP. */
1679 prev_sp = read_memory_unsigned_integer (
1680 info->saved_regs[S390_SP_REGNUM].addr,
1681 word_size);
1682
1683 /* Determine our frame base. */
1684 info->frame_base = prev_sp + 16*word_size + 32;
1685
1686 return info;
1687 }
1688
1689 static void
1690 s390_sigtramp_frame_this_id (struct frame_info *next_frame,
1691 void **this_prologue_cache,
1692 struct frame_id *this_id)
1693 {
1694 struct s390_sigtramp_unwind_cache *info
1695 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
1696 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
1697 }
1698
1699 static void
1700 s390_sigtramp_frame_prev_register (struct frame_info *next_frame,
1701 void **this_prologue_cache,
1702 int regnum, int *optimizedp,
1703 enum lval_type *lvalp, CORE_ADDR *addrp,
1704 int *realnump, gdb_byte *bufferp)
1705 {
1706 struct s390_sigtramp_unwind_cache *info
1707 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
1708 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1709 optimizedp, lvalp, addrp, realnump, bufferp);
1710 }
1711
1712 static const struct frame_unwind s390_sigtramp_frame_unwind = {
1713 SIGTRAMP_FRAME,
1714 s390_sigtramp_frame_this_id,
1715 s390_sigtramp_frame_prev_register
1716 };
1717
1718 static const struct frame_unwind *
1719 s390_sigtramp_frame_sniffer (struct frame_info *next_frame)
1720 {
1721 CORE_ADDR pc = frame_pc_unwind (next_frame);
1722 bfd_byte sigreturn[2];
1723
1724 if (read_memory_nobpt (pc, sigreturn, 2))
1725 return NULL;
1726
1727 if (sigreturn[0] != 0x0a /* svc */)
1728 return NULL;
1729
1730 if (sigreturn[1] != 119 /* sigreturn */
1731 && sigreturn[1] != 173 /* rt_sigreturn */)
1732 return NULL;
1733
1734 return &s390_sigtramp_frame_unwind;
1735 }
1736
1737
1738 /* Frame base handling. */
1739
1740 static CORE_ADDR
1741 s390_frame_base_address (struct frame_info *next_frame, void **this_cache)
1742 {
1743 struct s390_unwind_cache *info
1744 = s390_frame_unwind_cache (next_frame, this_cache);
1745 return info->frame_base;
1746 }
1747
1748 static CORE_ADDR
1749 s390_local_base_address (struct frame_info *next_frame, void **this_cache)
1750 {
1751 struct s390_unwind_cache *info
1752 = s390_frame_unwind_cache (next_frame, this_cache);
1753 return info->local_base;
1754 }
1755
1756 static const struct frame_base s390_frame_base = {
1757 &s390_frame_unwind,
1758 s390_frame_base_address,
1759 s390_local_base_address,
1760 s390_local_base_address
1761 };
1762
1763 static CORE_ADDR
1764 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1765 {
1766 ULONGEST pc;
1767 pc = frame_unwind_register_unsigned (next_frame, S390_PC_REGNUM);
1768 return gdbarch_addr_bits_remove (gdbarch, pc);
1769 }
1770
1771 static CORE_ADDR
1772 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1773 {
1774 ULONGEST sp;
1775 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1776 return gdbarch_addr_bits_remove (gdbarch, sp);
1777 }
1778
1779
1780 /* DWARF-2 frame support. */
1781
1782 static void
1783 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
1784 struct dwarf2_frame_state_reg *reg,
1785 struct frame_info *next_frame)
1786 {
1787 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1788
1789 switch (tdep->abi)
1790 {
1791 case ABI_LINUX_S390:
1792 /* Call-saved registers. */
1793 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1794 || regnum == S390_F4_REGNUM
1795 || regnum == S390_F6_REGNUM)
1796 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
1797
1798 /* Call-clobbered registers. */
1799 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
1800 || (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1801 && regnum != S390_F4_REGNUM && regnum != S390_F6_REGNUM))
1802 reg->how = DWARF2_FRAME_REG_UNDEFINED;
1803
1804 /* The return address column. */
1805 else if (regnum == S390_PC_REGNUM)
1806 reg->how = DWARF2_FRAME_REG_RA;
1807 break;
1808
1809 case ABI_LINUX_ZSERIES:
1810 /* Call-saved registers. */
1811 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1812 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM))
1813 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
1814
1815 /* Call-clobbered registers. */
1816 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
1817 || (regnum >= S390_F0_REGNUM && regnum <= S390_F7_REGNUM))
1818 reg->how = DWARF2_FRAME_REG_UNDEFINED;
1819
1820 /* The return address column. */
1821 else if (regnum == S390_PC_REGNUM)
1822 reg->how = DWARF2_FRAME_REG_RA;
1823 break;
1824 }
1825 }
1826
1827
1828 /* Dummy function calls. */
1829
1830 /* Return non-zero if TYPE is an integer-like type, zero otherwise.
1831 "Integer-like" types are those that should be passed the way
1832 integers are: integers, enums, ranges, characters, and booleans. */
1833 static int
1834 is_integer_like (struct type *type)
1835 {
1836 enum type_code code = TYPE_CODE (type);
1837
1838 return (code == TYPE_CODE_INT
1839 || code == TYPE_CODE_ENUM
1840 || code == TYPE_CODE_RANGE
1841 || code == TYPE_CODE_CHAR
1842 || code == TYPE_CODE_BOOL);
1843 }
1844
1845 /* Return non-zero if TYPE is a pointer-like type, zero otherwise.
1846 "Pointer-like" types are those that should be passed the way
1847 pointers are: pointers and references. */
1848 static int
1849 is_pointer_like (struct type *type)
1850 {
1851 enum type_code code = TYPE_CODE (type);
1852
1853 return (code == TYPE_CODE_PTR
1854 || code == TYPE_CODE_REF);
1855 }
1856
1857
1858 /* Return non-zero if TYPE is a `float singleton' or `double
1859 singleton', zero otherwise.
1860
1861 A `T singleton' is a struct type with one member, whose type is
1862 either T or a `T singleton'. So, the following are all float
1863 singletons:
1864
1865 struct { float x };
1866 struct { struct { float x; } x; };
1867 struct { struct { struct { float x; } x; } x; };
1868
1869 ... and so on.
1870
1871 All such structures are passed as if they were floats or doubles,
1872 as the (revised) ABI says. */
1873 static int
1874 is_float_singleton (struct type *type)
1875 {
1876 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1877 {
1878 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
1879 CHECK_TYPEDEF (singleton_type);
1880
1881 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
1882 || is_float_singleton (singleton_type));
1883 }
1884
1885 return 0;
1886 }
1887
1888
1889 /* Return non-zero if TYPE is a struct-like type, zero otherwise.
1890 "Struct-like" types are those that should be passed as structs are:
1891 structs and unions.
1892
1893 As an odd quirk, not mentioned in the ABI, GCC passes float and
1894 double singletons as if they were a plain float, double, etc. (The
1895 corresponding union types are handled normally.) So we exclude
1896 those types here. *shrug* */
1897 static int
1898 is_struct_like (struct type *type)
1899 {
1900 enum type_code code = TYPE_CODE (type);
1901
1902 return (code == TYPE_CODE_UNION
1903 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
1904 }
1905
1906
1907 /* Return non-zero if TYPE is a float-like type, zero otherwise.
1908 "Float-like" types are those that should be passed as
1909 floating-point values are.
1910
1911 You'd think this would just be floats, doubles, long doubles, etc.
1912 But as an odd quirk, not mentioned in the ABI, GCC passes float and
1913 double singletons as if they were a plain float, double, etc. (The
1914 corresponding union types are handled normally.) So we include
1915 those types here. *shrug* */
1916 static int
1917 is_float_like (struct type *type)
1918 {
1919 return (TYPE_CODE (type) == TYPE_CODE_FLT
1920 || is_float_singleton (type));
1921 }
1922
1923
1924 static int
1925 is_power_of_two (unsigned int n)
1926 {
1927 return ((n & (n - 1)) == 0);
1928 }
1929
1930 /* Return non-zero if TYPE should be passed as a pointer to a copy,
1931 zero otherwise. */
1932 static int
1933 s390_function_arg_pass_by_reference (struct type *type)
1934 {
1935 unsigned length = TYPE_LENGTH (type);
1936 if (length > 8)
1937 return 1;
1938
1939 /* FIXME: All complex and vector types are also returned by reference. */
1940 return is_struct_like (type) && !is_power_of_two (length);
1941 }
1942
1943 /* Return non-zero if TYPE should be passed in a float register
1944 if possible. */
1945 static int
1946 s390_function_arg_float (struct type *type)
1947 {
1948 unsigned length = TYPE_LENGTH (type);
1949 if (length > 8)
1950 return 0;
1951
1952 return is_float_like (type);
1953 }
1954
1955 /* Return non-zero if TYPE should be passed in an integer register
1956 (or a pair of integer registers) if possible. */
1957 static int
1958 s390_function_arg_integer (struct type *type)
1959 {
1960 unsigned length = TYPE_LENGTH (type);
1961 if (length > 8)
1962 return 0;
1963
1964 return is_integer_like (type)
1965 || is_pointer_like (type)
1966 || (is_struct_like (type) && is_power_of_two (length));
1967 }
1968
1969 /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
1970 word as required for the ABI. */
1971 static LONGEST
1972 extend_simple_arg (struct value *arg)
1973 {
1974 struct type *type = value_type (arg);
1975
1976 /* Even structs get passed in the least significant bits of the
1977 register / memory word. It's not really right to extract them as
1978 an integer, but it does take care of the extension. */
1979 if (TYPE_UNSIGNED (type))
1980 return extract_unsigned_integer (value_contents (arg),
1981 TYPE_LENGTH (type));
1982 else
1983 return extract_signed_integer (value_contents (arg),
1984 TYPE_LENGTH (type));
1985 }
1986
1987
1988 /* Return the alignment required by TYPE. */
1989 static int
1990 alignment_of (struct type *type)
1991 {
1992 int alignment;
1993
1994 if (is_integer_like (type)
1995 || is_pointer_like (type)
1996 || TYPE_CODE (type) == TYPE_CODE_FLT)
1997 alignment = TYPE_LENGTH (type);
1998 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1999 || TYPE_CODE (type) == TYPE_CODE_UNION)
2000 {
2001 int i;
2002
2003 alignment = 1;
2004 for (i = 0; i < TYPE_NFIELDS (type); i++)
2005 {
2006 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i));
2007
2008 if (field_alignment > alignment)
2009 alignment = field_alignment;
2010 }
2011 }
2012 else
2013 alignment = 1;
2014
2015 /* Check that everything we ever return is a power of two. Lots of
2016 code doesn't want to deal with aligning things to arbitrary
2017 boundaries. */
2018 gdb_assert ((alignment & (alignment - 1)) == 0);
2019
2020 return alignment;
2021 }
2022
2023
2024 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
2025 place to be passed to a function, as specified by the "GNU/Linux
2026 for S/390 ELF Application Binary Interface Supplement".
2027
2028 SP is the current stack pointer. We must put arguments, links,
2029 padding, etc. whereever they belong, and return the new stack
2030 pointer value.
2031
2032 If STRUCT_RETURN is non-zero, then the function we're calling is
2033 going to return a structure by value; STRUCT_ADDR is the address of
2034 a block we've allocated for it on the stack.
2035
2036 Our caller has taken care of any type promotions needed to satisfy
2037 prototypes or the old K&R argument-passing rules. */
2038 static CORE_ADDR
2039 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2040 struct regcache *regcache, CORE_ADDR bp_addr,
2041 int nargs, struct value **args, CORE_ADDR sp,
2042 int struct_return, CORE_ADDR struct_addr)
2043 {
2044 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2045 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2046 ULONGEST orig_sp;
2047 int i;
2048
2049 /* If the i'th argument is passed as a reference to a copy, then
2050 copy_addr[i] is the address of the copy we made. */
2051 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
2052
2053 /* Build the reference-to-copy area. */
2054 for (i = 0; i < nargs; i++)
2055 {
2056 struct value *arg = args[i];
2057 struct type *type = value_type (arg);
2058 unsigned length = TYPE_LENGTH (type);
2059
2060 if (s390_function_arg_pass_by_reference (type))
2061 {
2062 sp -= length;
2063 sp = align_down (sp, alignment_of (type));
2064 write_memory (sp, value_contents (arg), length);
2065 copy_addr[i] = sp;
2066 }
2067 }
2068
2069 /* Reserve space for the parameter area. As a conservative
2070 simplification, we assume that everything will be passed on the
2071 stack. Since every argument larger than 8 bytes will be
2072 passed by reference, we use this simple upper bound. */
2073 sp -= nargs * 8;
2074
2075 /* After all that, make sure it's still aligned on an eight-byte
2076 boundary. */
2077 sp = align_down (sp, 8);
2078
2079 /* Finally, place the actual parameters, working from SP towards
2080 higher addresses. The code above is supposed to reserve enough
2081 space for this. */
2082 {
2083 int fr = 0;
2084 int gr = 2;
2085 CORE_ADDR starg = sp;
2086
2087 /* A struct is returned using general register 2. */
2088 if (struct_return)
2089 {
2090 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2091 struct_addr);
2092 gr++;
2093 }
2094
2095 for (i = 0; i < nargs; i++)
2096 {
2097 struct value *arg = args[i];
2098 struct type *type = value_type (arg);
2099 unsigned length = TYPE_LENGTH (type);
2100
2101 if (s390_function_arg_pass_by_reference (type))
2102 {
2103 if (gr <= 6)
2104 {
2105 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2106 copy_addr[i]);
2107 gr++;
2108 }
2109 else
2110 {
2111 write_memory_unsigned_integer (starg, word_size, copy_addr[i]);
2112 starg += word_size;
2113 }
2114 }
2115 else if (s390_function_arg_float (type))
2116 {
2117 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2118 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2119 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2120 {
2121 /* When we store a single-precision value in an FP register,
2122 it occupies the leftmost bits. */
2123 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
2124 0, length, value_contents (arg));
2125 fr += 2;
2126 }
2127 else
2128 {
2129 /* When we store a single-precision value in a stack slot,
2130 it occupies the rightmost bits. */
2131 starg = align_up (starg + length, word_size);
2132 write_memory (starg - length, value_contents (arg), length);
2133 }
2134 }
2135 else if (s390_function_arg_integer (type) && length <= word_size)
2136 {
2137 if (gr <= 6)
2138 {
2139 /* Integer arguments are always extended to word size. */
2140 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
2141 extend_simple_arg (arg));
2142 gr++;
2143 }
2144 else
2145 {
2146 /* Integer arguments are always extended to word size. */
2147 write_memory_signed_integer (starg, word_size,
2148 extend_simple_arg (arg));
2149 starg += word_size;
2150 }
2151 }
2152 else if (s390_function_arg_integer (type) && length == 2*word_size)
2153 {
2154 if (gr <= 5)
2155 {
2156 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
2157 value_contents (arg));
2158 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
2159 value_contents (arg) + word_size);
2160 gr += 2;
2161 }
2162 else
2163 {
2164 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2165 in it, then don't go back and use it again later. */
2166 gr = 7;
2167
2168 write_memory (starg, value_contents (arg), length);
2169 starg += length;
2170 }
2171 }
2172 else
2173 internal_error (__FILE__, __LINE__, _("unknown argument type"));
2174 }
2175 }
2176
2177 /* Allocate the standard frame areas: the register save area, the
2178 word reserved for the compiler (which seems kind of meaningless),
2179 and the back chain pointer. */
2180 sp -= 16*word_size + 32;
2181
2182 /* Store return address. */
2183 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2184
2185 /* Store updated stack pointer. */
2186 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
2187
2188 /* We need to return the 'stack part' of the frame ID,
2189 which is actually the top of the register save area. */
2190 return sp + 16*word_size + 32;
2191 }
2192
2193 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
2194 dummy frame. The frame ID's base needs to match the TOS value
2195 returned by push_dummy_call, and the PC match the dummy frame's
2196 breakpoint. */
2197 static struct frame_id
2198 s390_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2199 {
2200 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2201 CORE_ADDR sp = s390_unwind_sp (gdbarch, next_frame);
2202
2203 return frame_id_build (sp + 16*word_size + 32,
2204 frame_pc_unwind (next_frame));
2205 }
2206
2207 static CORE_ADDR
2208 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2209 {
2210 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2211 always be aligned on an eight-byte boundary. */
2212 return (addr & -8);
2213 }
2214
2215
2216 /* Function return value access. */
2217
2218 static enum return_value_convention
2219 s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
2220 {
2221 int length = TYPE_LENGTH (type);
2222 if (length > 8)
2223 return RETURN_VALUE_STRUCT_CONVENTION;
2224
2225 switch (TYPE_CODE (type))
2226 {
2227 case TYPE_CODE_STRUCT:
2228 case TYPE_CODE_UNION:
2229 case TYPE_CODE_ARRAY:
2230 return RETURN_VALUE_STRUCT_CONVENTION;
2231
2232 default:
2233 return RETURN_VALUE_REGISTER_CONVENTION;
2234 }
2235 }
2236
2237 static enum return_value_convention
2238 s390_return_value (struct gdbarch *gdbarch, struct type *type,
2239 struct regcache *regcache, gdb_byte *out,
2240 const gdb_byte *in)
2241 {
2242 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2243 int length = TYPE_LENGTH (type);
2244 enum return_value_convention rvc =
2245 s390_return_value_convention (gdbarch, type);
2246 if (in)
2247 {
2248 switch (rvc)
2249 {
2250 case RETURN_VALUE_REGISTER_CONVENTION:
2251 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2252 {
2253 /* When we store a single-precision value in an FP register,
2254 it occupies the leftmost bits. */
2255 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2256 0, length, in);
2257 }
2258 else if (length <= word_size)
2259 {
2260 /* Integer arguments are always extended to word size. */
2261 if (TYPE_UNSIGNED (type))
2262 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
2263 extract_unsigned_integer (in, length));
2264 else
2265 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
2266 extract_signed_integer (in, length));
2267 }
2268 else if (length == 2*word_size)
2269 {
2270 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2271 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
2272 }
2273 else
2274 internal_error (__FILE__, __LINE__, _("invalid return type"));
2275 break;
2276
2277 case RETURN_VALUE_STRUCT_CONVENTION:
2278 error (_("Cannot set function return value."));
2279 break;
2280 }
2281 }
2282 else if (out)
2283 {
2284 switch (rvc)
2285 {
2286 case RETURN_VALUE_REGISTER_CONVENTION:
2287 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2288 {
2289 /* When we store a single-precision value in an FP register,
2290 it occupies the leftmost bits. */
2291 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2292 0, length, out);
2293 }
2294 else if (length <= word_size)
2295 {
2296 /* Integer arguments occupy the rightmost bits. */
2297 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2298 word_size - length, length, out);
2299 }
2300 else if (length == 2*word_size)
2301 {
2302 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2303 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
2304 }
2305 else
2306 internal_error (__FILE__, __LINE__, _("invalid return type"));
2307 break;
2308
2309 case RETURN_VALUE_STRUCT_CONVENTION:
2310 error (_("Function return value unknown."));
2311 break;
2312 }
2313 }
2314
2315 return rvc;
2316 }
2317
2318
2319 /* Breakpoints. */
2320
2321 static const gdb_byte *
2322 s390_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
2323 {
2324 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
2325
2326 *lenptr = sizeof (breakpoint);
2327 return breakpoint;
2328 }
2329
2330
2331 /* Address handling. */
2332
2333 static CORE_ADDR
2334 s390_addr_bits_remove (CORE_ADDR addr)
2335 {
2336 return addr & 0x7fffffff;
2337 }
2338
2339 static int
2340 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2341 {
2342 if (byte_size == 4)
2343 return TYPE_FLAG_ADDRESS_CLASS_1;
2344 else
2345 return 0;
2346 }
2347
2348 static const char *
2349 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2350 {
2351 if (type_flags & TYPE_FLAG_ADDRESS_CLASS_1)
2352 return "mode32";
2353 else
2354 return NULL;
2355 }
2356
2357 static int
2358 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name,
2359 int *type_flags_ptr)
2360 {
2361 if (strcmp (name, "mode32") == 0)
2362 {
2363 *type_flags_ptr = TYPE_FLAG_ADDRESS_CLASS_1;
2364 return 1;
2365 }
2366 else
2367 return 0;
2368 }
2369
2370 /* Set up gdbarch struct. */
2371
2372 static struct gdbarch *
2373 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2374 {
2375 struct gdbarch *gdbarch;
2376 struct gdbarch_tdep *tdep;
2377
2378 /* First see if there is already a gdbarch that can satisfy the request. */
2379 arches = gdbarch_list_lookup_by_info (arches, &info);
2380 if (arches != NULL)
2381 return arches->gdbarch;
2382
2383 /* None found: is the request for a s390 architecture? */
2384 if (info.bfd_arch_info->arch != bfd_arch_s390)
2385 return NULL; /* No; then it's not for us. */
2386
2387 /* Yes: create a new gdbarch for the specified machine type. */
2388 tdep = XCALLOC (1, struct gdbarch_tdep);
2389 gdbarch = gdbarch_alloc (&info, tdep);
2390
2391 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
2392 set_gdbarch_char_signed (gdbarch, 0);
2393
2394 /* Amount PC must be decremented by after a breakpoint. This is
2395 often the number of bytes returned by BREAKPOINT_FROM_PC but not
2396 always. */
2397 set_gdbarch_decr_pc_after_break (gdbarch, 2);
2398 /* Stack grows downward. */
2399 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2400 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
2401 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
2402 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
2403
2404 set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM);
2405 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
2406 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
2407 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
2408 set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS);
2409 set_gdbarch_register_name (gdbarch, s390_register_name);
2410 set_gdbarch_register_type (gdbarch, s390_register_type);
2411 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2412 set_gdbarch_dwarf_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2413 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2414 set_gdbarch_convert_register_p (gdbarch, s390_convert_register_p);
2415 set_gdbarch_register_to_value (gdbarch, s390_register_to_value);
2416 set_gdbarch_value_to_register (gdbarch, s390_value_to_register);
2417 set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p);
2418 set_gdbarch_regset_from_core_section (gdbarch,
2419 s390_regset_from_core_section);
2420
2421 /* Inferior function calls. */
2422 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
2423 set_gdbarch_unwind_dummy_id (gdbarch, s390_unwind_dummy_id);
2424 set_gdbarch_frame_align (gdbarch, s390_frame_align);
2425 set_gdbarch_return_value (gdbarch, s390_return_value);
2426
2427 /* Frame handling. */
2428 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
2429 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
2430 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
2431 frame_unwind_append_sniffer (gdbarch, s390_stub_frame_sniffer);
2432 frame_unwind_append_sniffer (gdbarch, s390_sigtramp_frame_sniffer);
2433 frame_unwind_append_sniffer (gdbarch, s390_frame_sniffer);
2434 frame_base_set_default (gdbarch, &s390_frame_base);
2435 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
2436 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
2437
2438 switch (info.bfd_arch_info->mach)
2439 {
2440 case bfd_mach_s390_31:
2441 tdep->abi = ABI_LINUX_S390;
2442
2443 tdep->gregset = &s390_gregset;
2444 tdep->sizeof_gregset = s390_sizeof_gregset;
2445 tdep->fpregset = &s390_fpregset;
2446 tdep->sizeof_fpregset = s390_sizeof_fpregset;
2447
2448 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
2449 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
2450 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
2451 set_solib_svr4_fetch_link_map_offsets
2452 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
2453
2454 break;
2455 case bfd_mach_s390_64:
2456 tdep->abi = ABI_LINUX_ZSERIES;
2457
2458 tdep->gregset = &s390x_gregset;
2459 tdep->sizeof_gregset = s390x_sizeof_gregset;
2460 tdep->fpregset = &s390_fpregset;
2461 tdep->sizeof_fpregset = s390_sizeof_fpregset;
2462
2463 set_gdbarch_long_bit (gdbarch, 64);
2464 set_gdbarch_long_long_bit (gdbarch, 64);
2465 set_gdbarch_ptr_bit (gdbarch, 64);
2466 set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read);
2467 set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write);
2468 set_solib_svr4_fetch_link_map_offsets
2469 (gdbarch, svr4_lp64_fetch_link_map_offsets);
2470 set_gdbarch_address_class_type_flags (gdbarch,
2471 s390_address_class_type_flags);
2472 set_gdbarch_address_class_type_flags_to_name (gdbarch,
2473 s390_address_class_type_flags_to_name);
2474 set_gdbarch_address_class_name_to_type_flags (gdbarch,
2475 s390_address_class_name_to_type_flags);
2476 break;
2477 }
2478
2479 set_gdbarch_print_insn (gdbarch, print_insn_s390);
2480
2481 /* Enable TLS support. */
2482 set_gdbarch_fetch_tls_load_module_address (gdbarch,
2483 svr4_fetch_objfile_link_map);
2484
2485 return gdbarch;
2486 }
2487
2488
2489
2490 extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
2491
2492 void
2493 _initialize_s390_tdep (void)
2494 {
2495
2496 /* Hook us into the gdbarch mechanism. */
2497 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
2498 }
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