* linux-nat.c (linux_nat_resume): Add more debugging messages. Do
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright 2001, 2002, 2003, 2004, 2005 Free Software Foundation,
4 Inc.
5
6 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
24 02111-1307, USA. */
25
26 #include "defs.h"
27 #include "arch-utils.h"
28 #include "frame.h"
29 #include "inferior.h"
30 #include "symtab.h"
31 #include "target.h"
32 #include "gdbcore.h"
33 #include "gdbcmd.h"
34 #include "objfiles.h"
35 #include "tm.h"
36 #include "../bfd/bfd.h"
37 #include "floatformat.h"
38 #include "regcache.h"
39 #include "trad-frame.h"
40 #include "frame-base.h"
41 #include "frame-unwind.h"
42 #include "dwarf2-frame.h"
43 #include "reggroups.h"
44 #include "regset.h"
45 #include "value.h"
46 #include "gdb_assert.h"
47 #include "dis-asm.h"
48 #include "solib-svr4.h" /* For struct link_map_offsets. */
49
50 #include "s390-tdep.h"
51
52
53 /* The tdep structure. */
54
55 struct gdbarch_tdep
56 {
57 /* ABI version. */
58 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
59
60 /* Core file register sets. */
61 const struct regset *gregset;
62 int sizeof_gregset;
63
64 const struct regset *fpregset;
65 int sizeof_fpregset;
66 };
67
68
69 /* Register information. */
70
71 struct s390_register_info
72 {
73 char *name;
74 struct type **type;
75 };
76
77 static struct s390_register_info s390_register_info[S390_NUM_TOTAL_REGS] =
78 {
79 /* Program Status Word. */
80 { "pswm", &builtin_type_long },
81 { "pswa", &builtin_type_long },
82
83 /* General Purpose Registers. */
84 { "r0", &builtin_type_long },
85 { "r1", &builtin_type_long },
86 { "r2", &builtin_type_long },
87 { "r3", &builtin_type_long },
88 { "r4", &builtin_type_long },
89 { "r5", &builtin_type_long },
90 { "r6", &builtin_type_long },
91 { "r7", &builtin_type_long },
92 { "r8", &builtin_type_long },
93 { "r9", &builtin_type_long },
94 { "r10", &builtin_type_long },
95 { "r11", &builtin_type_long },
96 { "r12", &builtin_type_long },
97 { "r13", &builtin_type_long },
98 { "r14", &builtin_type_long },
99 { "r15", &builtin_type_long },
100
101 /* Access Registers. */
102 { "acr0", &builtin_type_int },
103 { "acr1", &builtin_type_int },
104 { "acr2", &builtin_type_int },
105 { "acr3", &builtin_type_int },
106 { "acr4", &builtin_type_int },
107 { "acr5", &builtin_type_int },
108 { "acr6", &builtin_type_int },
109 { "acr7", &builtin_type_int },
110 { "acr8", &builtin_type_int },
111 { "acr9", &builtin_type_int },
112 { "acr10", &builtin_type_int },
113 { "acr11", &builtin_type_int },
114 { "acr12", &builtin_type_int },
115 { "acr13", &builtin_type_int },
116 { "acr14", &builtin_type_int },
117 { "acr15", &builtin_type_int },
118
119 /* Floating Point Control Word. */
120 { "fpc", &builtin_type_int },
121
122 /* Floating Point Registers. */
123 { "f0", &builtin_type_double },
124 { "f1", &builtin_type_double },
125 { "f2", &builtin_type_double },
126 { "f3", &builtin_type_double },
127 { "f4", &builtin_type_double },
128 { "f5", &builtin_type_double },
129 { "f6", &builtin_type_double },
130 { "f7", &builtin_type_double },
131 { "f8", &builtin_type_double },
132 { "f9", &builtin_type_double },
133 { "f10", &builtin_type_double },
134 { "f11", &builtin_type_double },
135 { "f12", &builtin_type_double },
136 { "f13", &builtin_type_double },
137 { "f14", &builtin_type_double },
138 { "f15", &builtin_type_double },
139
140 /* Pseudo registers. */
141 { "pc", &builtin_type_void_func_ptr },
142 { "cc", &builtin_type_int },
143 };
144
145 /* Return the name of register REGNUM. */
146 static const char *
147 s390_register_name (int regnum)
148 {
149 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
150 return s390_register_info[regnum].name;
151 }
152
153 /* Return the GDB type object for the "standard" data type of data in
154 register REGNUM. */
155 static struct type *
156 s390_register_type (struct gdbarch *gdbarch, int regnum)
157 {
158 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
159 return *s390_register_info[regnum].type;
160 }
161
162 /* DWARF Register Mapping. */
163
164 static int s390_dwarf_regmap[] =
165 {
166 /* General Purpose Registers. */
167 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
168 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
169 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
170 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
171
172 /* Floating Point Registers. */
173 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
174 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
175 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
176 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
177
178 /* Control Registers (not mapped). */
179 -1, -1, -1, -1, -1, -1, -1, -1,
180 -1, -1, -1, -1, -1, -1, -1, -1,
181
182 /* Access Registers. */
183 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
184 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
185 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
186 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
187
188 /* Program Status Word. */
189 S390_PSWM_REGNUM,
190 S390_PSWA_REGNUM
191 };
192
193 /* Convert DWARF register number REG to the appropriate register
194 number used by GDB. */
195 static int
196 s390_dwarf_reg_to_regnum (int reg)
197 {
198 int regnum = -1;
199
200 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
201 regnum = s390_dwarf_regmap[reg];
202
203 if (regnum == -1)
204 warning (_("Unmapped DWARF Register #%d encountered."), reg);
205
206 return regnum;
207 }
208
209 /* Pseudo registers - PC and condition code. */
210
211 static void
212 s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
213 int regnum, gdb_byte *buf)
214 {
215 ULONGEST val;
216
217 switch (regnum)
218 {
219 case S390_PC_REGNUM:
220 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
221 store_unsigned_integer (buf, 4, val & 0x7fffffff);
222 break;
223
224 case S390_CC_REGNUM:
225 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
226 store_unsigned_integer (buf, 4, (val >> 12) & 3);
227 break;
228
229 default:
230 internal_error (__FILE__, __LINE__, _("invalid regnum"));
231 }
232 }
233
234 static void
235 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
236 int regnum, const gdb_byte *buf)
237 {
238 ULONGEST val, psw;
239
240 switch (regnum)
241 {
242 case S390_PC_REGNUM:
243 val = extract_unsigned_integer (buf, 4);
244 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
245 psw = (psw & 0x80000000) | (val & 0x7fffffff);
246 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw);
247 break;
248
249 case S390_CC_REGNUM:
250 val = extract_unsigned_integer (buf, 4);
251 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
252 psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
253 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
254 break;
255
256 default:
257 internal_error (__FILE__, __LINE__, _("invalid regnum"));
258 }
259 }
260
261 static void
262 s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
263 int regnum, gdb_byte *buf)
264 {
265 ULONGEST val;
266
267 switch (regnum)
268 {
269 case S390_PC_REGNUM:
270 regcache_raw_read (regcache, S390_PSWA_REGNUM, buf);
271 break;
272
273 case S390_CC_REGNUM:
274 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
275 store_unsigned_integer (buf, 4, (val >> 44) & 3);
276 break;
277
278 default:
279 internal_error (__FILE__, __LINE__, _("invalid regnum"));
280 }
281 }
282
283 static void
284 s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
285 int regnum, const gdb_byte *buf)
286 {
287 ULONGEST val, psw;
288
289 switch (regnum)
290 {
291 case S390_PC_REGNUM:
292 regcache_raw_write (regcache, S390_PSWA_REGNUM, buf);
293 break;
294
295 case S390_CC_REGNUM:
296 val = extract_unsigned_integer (buf, 4);
297 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
298 psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
299 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
300 break;
301
302 default:
303 internal_error (__FILE__, __LINE__, _("invalid regnum"));
304 }
305 }
306
307 /* 'float' values are stored in the upper half of floating-point
308 registers, even though we are otherwise a big-endian platform. */
309
310 static int
311 s390_convert_register_p (int regno, struct type *type)
312 {
313 return (regno >= S390_F0_REGNUM && regno <= S390_F15_REGNUM)
314 && TYPE_LENGTH (type) < 8;
315 }
316
317 static void
318 s390_register_to_value (struct frame_info *frame, int regnum,
319 struct type *valtype, gdb_byte *out)
320 {
321 gdb_byte in[8];
322 int len = TYPE_LENGTH (valtype);
323 gdb_assert (len < 8);
324
325 get_frame_register (frame, regnum, in);
326 memcpy (out, in, len);
327 }
328
329 static void
330 s390_value_to_register (struct frame_info *frame, int regnum,
331 struct type *valtype, const gdb_byte *in)
332 {
333 gdb_byte out[8];
334 int len = TYPE_LENGTH (valtype);
335 gdb_assert (len < 8);
336
337 memset (out, 0, 8);
338 memcpy (out, in, len);
339 put_frame_register (frame, regnum, out);
340 }
341
342 /* Register groups. */
343
344 static int
345 s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
346 struct reggroup *group)
347 {
348 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
349
350 /* Registers displayed via 'info regs'. */
351 if (group == general_reggroup)
352 return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
353 || regnum == S390_PC_REGNUM
354 || regnum == S390_CC_REGNUM;
355
356 /* Registers displayed via 'info float'. */
357 if (group == float_reggroup)
358 return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
359 || regnum == S390_FPC_REGNUM;
360
361 /* Registers that need to be saved/restored in order to
362 push or pop frames. */
363 if (group == save_reggroup || group == restore_reggroup)
364 return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM;
365
366 return default_register_reggroup_p (gdbarch, regnum, group);
367 }
368
369
370 /* Core file register sets. */
371
372 int s390_regmap_gregset[S390_NUM_REGS] =
373 {
374 /* Program Status Word. */
375 0x00, 0x04,
376 /* General Purpose Registers. */
377 0x08, 0x0c, 0x10, 0x14,
378 0x18, 0x1c, 0x20, 0x24,
379 0x28, 0x2c, 0x30, 0x34,
380 0x38, 0x3c, 0x40, 0x44,
381 /* Access Registers. */
382 0x48, 0x4c, 0x50, 0x54,
383 0x58, 0x5c, 0x60, 0x64,
384 0x68, 0x6c, 0x70, 0x74,
385 0x78, 0x7c, 0x80, 0x84,
386 /* Floating Point Control Word. */
387 -1,
388 /* Floating Point Registers. */
389 -1, -1, -1, -1, -1, -1, -1, -1,
390 -1, -1, -1, -1, -1, -1, -1, -1,
391 };
392
393 int s390x_regmap_gregset[S390_NUM_REGS] =
394 {
395 0x00, 0x08,
396 /* General Purpose Registers. */
397 0x10, 0x18, 0x20, 0x28,
398 0x30, 0x38, 0x40, 0x48,
399 0x50, 0x58, 0x60, 0x68,
400 0x70, 0x78, 0x80, 0x88,
401 /* Access Registers. */
402 0x90, 0x94, 0x98, 0x9c,
403 0xa0, 0xa4, 0xa8, 0xac,
404 0xb0, 0xb4, 0xb8, 0xbc,
405 0xc0, 0xc4, 0xc8, 0xcc,
406 /* Floating Point Control Word. */
407 -1,
408 /* Floating Point Registers. */
409 -1, -1, -1, -1, -1, -1, -1, -1,
410 -1, -1, -1, -1, -1, -1, -1, -1,
411 };
412
413 int s390_regmap_fpregset[S390_NUM_REGS] =
414 {
415 /* Program Status Word. */
416 -1, -1,
417 /* General Purpose Registers. */
418 -1, -1, -1, -1, -1, -1, -1, -1,
419 -1, -1, -1, -1, -1, -1, -1, -1,
420 /* Access Registers. */
421 -1, -1, -1, -1, -1, -1, -1, -1,
422 -1, -1, -1, -1, -1, -1, -1, -1,
423 /* Floating Point Control Word. */
424 0x00,
425 /* Floating Point Registers. */
426 0x08, 0x10, 0x18, 0x20,
427 0x28, 0x30, 0x38, 0x40,
428 0x48, 0x50, 0x58, 0x60,
429 0x68, 0x70, 0x78, 0x80,
430 };
431
432 /* Supply register REGNUM from the register set REGSET to register cache
433 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
434 static void
435 s390_supply_regset (const struct regset *regset, struct regcache *regcache,
436 int regnum, const void *regs, size_t len)
437 {
438 const int *offset = regset->descr;
439 int i;
440
441 for (i = 0; i < S390_NUM_REGS; i++)
442 {
443 if ((regnum == i || regnum == -1) && offset[i] != -1)
444 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
445 }
446 }
447
448 static const struct regset s390_gregset = {
449 s390_regmap_gregset,
450 s390_supply_regset
451 };
452
453 static const struct regset s390x_gregset = {
454 s390x_regmap_gregset,
455 s390_supply_regset
456 };
457
458 static const struct regset s390_fpregset = {
459 s390_regmap_fpregset,
460 s390_supply_regset
461 };
462
463 /* Return the appropriate register set for the core section identified
464 by SECT_NAME and SECT_SIZE. */
465 const struct regset *
466 s390_regset_from_core_section (struct gdbarch *gdbarch,
467 const char *sect_name, size_t sect_size)
468 {
469 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
470
471 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
472 return tdep->gregset;
473
474 if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
475 return tdep->fpregset;
476
477 return NULL;
478 }
479
480
481 /* Prologue analysis. */
482
483 /* When we analyze a prologue, we're really doing 'abstract
484 interpretation' or 'pseudo-evaluation': running the function's code
485 in simulation, but using conservative approximations of the values
486 it would have when it actually runs. For example, if our function
487 starts with the instruction:
488
489 ahi r1, 42 # add halfword immediate 42 to r1
490
491 we don't know exactly what value will be in r1 after executing this
492 instruction, but we do know it'll be 42 greater than its original
493 value.
494
495 If we then see an instruction like:
496
497 ahi r1, 22 # add halfword immediate 22 to r1
498
499 we still don't know what r1's value is, but again, we can say it is
500 now 64 greater than its original value.
501
502 If the next instruction were:
503
504 lr r2, r1 # set r2 to r1's value
505
506 then we can say that r2's value is now the original value of r1
507 plus 64. And so on.
508
509 Of course, this can only go so far before it gets unreasonable. If
510 we wanted to be able to say anything about the value of r1 after
511 the instruction:
512
513 xr r1, r3 # exclusive-or r1 and r3, place result in r1
514
515 then things would get pretty complex. But remember, we're just
516 doing a conservative approximation; if exclusive-or instructions
517 aren't relevant to prologues, we can just say r1's value is now
518 'unknown'. We can ignore things that are too complex, if that loss
519 of information is acceptable for our application.
520
521 Once you've reached an instruction that you don't know how to
522 simulate, you stop. Now you examine the state of the registers and
523 stack slots you've kept track of. For example:
524
525 - To see how large your stack frame is, just check the value of sp;
526 if it's the original value of sp minus a constant, then that
527 constant is the stack frame's size. If the sp's value has been
528 marked as 'unknown', then that means the prologue has done
529 something too complex for us to track, and we don't know the
530 frame size.
531
532 - To see whether we've saved the SP in the current frame's back
533 chain slot, we just check whether the current value of the back
534 chain stack slot is the original value of the sp.
535
536 Sure, this takes some work. But prologue analyzers aren't
537 quick-and-simple pattern patching to recognize a few fixed prologue
538 forms any more; they're big, hairy functions. Along with inferior
539 function calls, prologue analysis accounts for a substantial
540 portion of the time needed to stabilize a GDB port. So I think
541 it's worthwhile to look for an approach that will be easier to
542 understand and maintain. In the approach used here:
543
544 - It's easier to see that the analyzer is correct: you just see
545 whether the analyzer properly (albiet conservatively) simulates
546 the effect of each instruction.
547
548 - It's easier to extend the analyzer: you can add support for new
549 instructions, and know that you haven't broken anything that
550 wasn't already broken before.
551
552 - It's orthogonal: to gather new information, you don't need to
553 complicate the code for each instruction. As long as your domain
554 of conservative values is already detailed enough to tell you
555 what you need, then all the existing instruction simulations are
556 already gathering the right data for you.
557
558 A 'struct prologue_value' is a conservative approximation of the
559 real value the register or stack slot will have. */
560
561 struct prologue_value {
562
563 /* What sort of value is this? This determines the interpretation
564 of subsequent fields. */
565 enum {
566
567 /* We don't know anything about the value. This is also used for
568 values we could have kept track of, when doing so would have
569 been too complex and we don't want to bother. The bottom of
570 our lattice. */
571 pv_unknown,
572
573 /* A known constant. K is its value. */
574 pv_constant,
575
576 /* The value that register REG originally had *UPON ENTRY TO THE
577 FUNCTION*, plus K. If K is zero, this means, obviously, just
578 the value REG had upon entry to the function. REG is a GDB
579 register number. Before we start interpreting, we initialize
580 every register R to { pv_register, R, 0 }. */
581 pv_register,
582
583 } kind;
584
585 /* The meanings of the following fields depend on 'kind'; see the
586 comments for the specific 'kind' values. */
587 int reg;
588 CORE_ADDR k;
589 };
590
591
592 /* Set V to be unknown. */
593 static void
594 pv_set_to_unknown (struct prologue_value *v)
595 {
596 v->kind = pv_unknown;
597 }
598
599
600 /* Set V to the constant K. */
601 static void
602 pv_set_to_constant (struct prologue_value *v, CORE_ADDR k)
603 {
604 v->kind = pv_constant;
605 v->k = k;
606 }
607
608
609 /* Set V to the original value of register REG, plus K. */
610 static void
611 pv_set_to_register (struct prologue_value *v, int reg, CORE_ADDR k)
612 {
613 v->kind = pv_register;
614 v->reg = reg;
615 v->k = k;
616 }
617
618
619 /* If one of *A and *B is a constant, and the other isn't, swap the
620 pointers as necessary to ensure that *B points to the constant.
621 This can reduce the number of cases we need to analyze in the
622 functions below. */
623 static void
624 pv_constant_last (struct prologue_value **a,
625 struct prologue_value **b)
626 {
627 if ((*a)->kind == pv_constant
628 && (*b)->kind != pv_constant)
629 {
630 struct prologue_value *temp = *a;
631 *a = *b;
632 *b = temp;
633 }
634 }
635
636
637 /* Set SUM to the sum of A and B. SUM, A, and B may point to the same
638 'struct prologue_value' object. */
639 static void
640 pv_add (struct prologue_value *sum,
641 struct prologue_value *a,
642 struct prologue_value *b)
643 {
644 pv_constant_last (&a, &b);
645
646 /* We can handle adding constants to registers, and other constants. */
647 if (b->kind == pv_constant
648 && (a->kind == pv_register
649 || a->kind == pv_constant))
650 {
651 sum->kind = a->kind;
652 sum->reg = a->reg; /* not meaningful if a is pv_constant, but
653 harmless */
654 sum->k = a->k + b->k;
655 }
656
657 /* Anything else we don't know how to add. We don't have a
658 representation for, say, the sum of two registers, or a multiple
659 of a register's value (adding a register to itself). */
660 else
661 sum->kind = pv_unknown;
662 }
663
664
665 /* Add the constant K to V. */
666 static void
667 pv_add_constant (struct prologue_value *v, CORE_ADDR k)
668 {
669 struct prologue_value pv_k;
670
671 /* Rather than thinking of all the cases we can and can't handle,
672 we'll just let pv_add take care of that for us. */
673 pv_set_to_constant (&pv_k, k);
674 pv_add (v, v, &pv_k);
675 }
676
677
678 /* Subtract B from A, and put the result in DIFF.
679
680 This isn't quite the same as negating B and adding it to A, since
681 we don't have a representation for the negation of anything but a
682 constant. For example, we can't negate { pv_register, R1, 10 },
683 but we do know that { pv_register, R1, 10 } minus { pv_register,
684 R1, 5 } is { pv_constant, <ignored>, 5 }.
685
686 This means, for example, that we can subtract two stack addresses;
687 they're both relative to the original SP. Since the frame pointer
688 is set based on the SP, its value will be the original SP plus some
689 constant (probably zero), so we can use its value just fine. */
690 static void
691 pv_subtract (struct prologue_value *diff,
692 struct prologue_value *a,
693 struct prologue_value *b)
694 {
695 pv_constant_last (&a, &b);
696
697 /* We can subtract a constant from another constant, or from a
698 register. */
699 if (b->kind == pv_constant
700 && (a->kind == pv_register
701 || a->kind == pv_constant))
702 {
703 diff->kind = a->kind;
704 diff->reg = a->reg; /* not always meaningful, but harmless */
705 diff->k = a->k - b->k;
706 }
707
708 /* We can subtract a register from itself, yielding a constant. */
709 else if (a->kind == pv_register
710 && b->kind == pv_register
711 && a->reg == b->reg)
712 {
713 diff->kind = pv_constant;
714 diff->k = a->k - b->k;
715 }
716
717 /* We don't know how to subtract anything else. */
718 else
719 diff->kind = pv_unknown;
720 }
721
722
723 /* Set AND to the logical and of A and B. */
724 static void
725 pv_logical_and (struct prologue_value *and,
726 struct prologue_value *a,
727 struct prologue_value *b)
728 {
729 pv_constant_last (&a, &b);
730
731 /* We can 'and' two constants. */
732 if (a->kind == pv_constant
733 && b->kind == pv_constant)
734 {
735 and->kind = pv_constant;
736 and->k = a->k & b->k;
737 }
738
739 /* We can 'and' anything with the constant zero. */
740 else if (b->kind == pv_constant
741 && b->k == 0)
742 {
743 and->kind = pv_constant;
744 and->k = 0;
745 }
746
747 /* We can 'and' anything with ~0. */
748 else if (b->kind == pv_constant
749 && b->k == ~ (CORE_ADDR) 0)
750 *and = *a;
751
752 /* We can 'and' a register with itself. */
753 else if (a->kind == pv_register
754 && b->kind == pv_register
755 && a->reg == b->reg
756 && a->k == b->k)
757 *and = *a;
758
759 /* Otherwise, we don't know. */
760 else
761 pv_set_to_unknown (and);
762 }
763
764
765 /* Return non-zero iff A and B are identical expressions.
766
767 This is not the same as asking if the two values are equal; the
768 result of such a comparison would have to be a pv_boolean, and
769 asking whether two 'unknown' values were equal would give you
770 pv_maybe. Same for comparing, say, { pv_register, R1, 0 } and {
771 pv_register, R2, 0}. Instead, this is asking whether the two
772 representations are the same. */
773 static int
774 pv_is_identical (struct prologue_value *a,
775 struct prologue_value *b)
776 {
777 if (a->kind != b->kind)
778 return 0;
779
780 switch (a->kind)
781 {
782 case pv_unknown:
783 return 1;
784 case pv_constant:
785 return (a->k == b->k);
786 case pv_register:
787 return (a->reg == b->reg && a->k == b->k);
788 default:
789 gdb_assert (0);
790 }
791 }
792
793
794 /* Return non-zero if A is the original value of register number R
795 plus K, zero otherwise. */
796 static int
797 pv_is_register (struct prologue_value *a, int r, CORE_ADDR k)
798 {
799 return (a->kind == pv_register
800 && a->reg == r
801 && a->k == k);
802 }
803
804
805 /* Decoding S/390 instructions. */
806
807 /* Named opcode values for the S/390 instructions we recognize. Some
808 instructions have their opcode split across two fields; those are the
809 op1_* and op2_* enums. */
810 enum
811 {
812 op1_lhi = 0xa7, op2_lhi = 0x08,
813 op1_lghi = 0xa7, op2_lghi = 0x09,
814 op1_lgfi = 0xc0, op2_lgfi = 0x01,
815 op_lr = 0x18,
816 op_lgr = 0xb904,
817 op_l = 0x58,
818 op1_ly = 0xe3, op2_ly = 0x58,
819 op1_lg = 0xe3, op2_lg = 0x04,
820 op_lm = 0x98,
821 op1_lmy = 0xeb, op2_lmy = 0x98,
822 op1_lmg = 0xeb, op2_lmg = 0x04,
823 op_st = 0x50,
824 op1_sty = 0xe3, op2_sty = 0x50,
825 op1_stg = 0xe3, op2_stg = 0x24,
826 op_std = 0x60,
827 op_stm = 0x90,
828 op1_stmy = 0xeb, op2_stmy = 0x90,
829 op1_stmg = 0xeb, op2_stmg = 0x24,
830 op1_aghi = 0xa7, op2_aghi = 0x0b,
831 op1_ahi = 0xa7, op2_ahi = 0x0a,
832 op1_agfi = 0xc2, op2_agfi = 0x08,
833 op1_afi = 0xc2, op2_afi = 0x09,
834 op1_algfi= 0xc2, op2_algfi= 0x0a,
835 op1_alfi = 0xc2, op2_alfi = 0x0b,
836 op_ar = 0x1a,
837 op_agr = 0xb908,
838 op_a = 0x5a,
839 op1_ay = 0xe3, op2_ay = 0x5a,
840 op1_ag = 0xe3, op2_ag = 0x08,
841 op1_slgfi= 0xc2, op2_slgfi= 0x04,
842 op1_slfi = 0xc2, op2_slfi = 0x05,
843 op_sr = 0x1b,
844 op_sgr = 0xb909,
845 op_s = 0x5b,
846 op1_sy = 0xe3, op2_sy = 0x5b,
847 op1_sg = 0xe3, op2_sg = 0x09,
848 op_nr = 0x14,
849 op_ngr = 0xb980,
850 op_la = 0x41,
851 op1_lay = 0xe3, op2_lay = 0x71,
852 op1_larl = 0xc0, op2_larl = 0x00,
853 op_basr = 0x0d,
854 op_bas = 0x4d,
855 op_bcr = 0x07,
856 op_bc = 0x0d,
857 op1_bras = 0xa7, op2_bras = 0x05,
858 op1_brasl= 0xc0, op2_brasl= 0x05,
859 op1_brc = 0xa7, op2_brc = 0x04,
860 op1_brcl = 0xc0, op2_brcl = 0x04,
861 };
862
863
864 /* Read a single instruction from address AT. */
865
866 #define S390_MAX_INSTR_SIZE 6
867 static int
868 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
869 {
870 static int s390_instrlen[] = { 2, 4, 4, 6 };
871 int instrlen;
872
873 if (deprecated_read_memory_nobpt (at, &instr[0], 2))
874 return -1;
875 instrlen = s390_instrlen[instr[0] >> 6];
876 if (instrlen > 2)
877 {
878 if (deprecated_read_memory_nobpt (at + 2, &instr[2], instrlen - 2))
879 return -1;
880 }
881 return instrlen;
882 }
883
884
885 /* The functions below are for recognizing and decoding S/390
886 instructions of various formats. Each of them checks whether INSN
887 is an instruction of the given format, with the specified opcodes.
888 If it is, it sets the remaining arguments to the values of the
889 instruction's fields, and returns a non-zero value; otherwise, it
890 returns zero.
891
892 These functions' arguments appear in the order they appear in the
893 instruction, not in the machine-language form. So, opcodes always
894 come first, even though they're sometimes scattered around the
895 instructions. And displacements appear before base and extension
896 registers, as they do in the assembly syntax, not at the end, as
897 they do in the machine language. */
898 static int
899 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
900 {
901 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
902 {
903 *r1 = (insn[1] >> 4) & 0xf;
904 /* i2 is a 16-bit signed quantity. */
905 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
906 return 1;
907 }
908 else
909 return 0;
910 }
911
912
913 static int
914 is_ril (bfd_byte *insn, int op1, int op2,
915 unsigned int *r1, int *i2)
916 {
917 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
918 {
919 *r1 = (insn[1] >> 4) & 0xf;
920 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
921 no sign extension is necessary, but we don't want to assume
922 that. */
923 *i2 = (((insn[2] << 24)
924 | (insn[3] << 16)
925 | (insn[4] << 8)
926 | (insn[5])) ^ 0x80000000) - 0x80000000;
927 return 1;
928 }
929 else
930 return 0;
931 }
932
933
934 static int
935 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
936 {
937 if (insn[0] == op)
938 {
939 *r1 = (insn[1] >> 4) & 0xf;
940 *r2 = insn[1] & 0xf;
941 return 1;
942 }
943 else
944 return 0;
945 }
946
947
948 static int
949 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
950 {
951 if (((insn[0] << 8) | insn[1]) == op)
952 {
953 /* Yes, insn[3]. insn[2] is unused in RRE format. */
954 *r1 = (insn[3] >> 4) & 0xf;
955 *r2 = insn[3] & 0xf;
956 return 1;
957 }
958 else
959 return 0;
960 }
961
962
963 static int
964 is_rs (bfd_byte *insn, int op,
965 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
966 {
967 if (insn[0] == op)
968 {
969 *r1 = (insn[1] >> 4) & 0xf;
970 *r3 = insn[1] & 0xf;
971 *b2 = (insn[2] >> 4) & 0xf;
972 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
973 return 1;
974 }
975 else
976 return 0;
977 }
978
979
980 static int
981 is_rsy (bfd_byte *insn, int op1, int op2,
982 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
983 {
984 if (insn[0] == op1
985 && insn[5] == op2)
986 {
987 *r1 = (insn[1] >> 4) & 0xf;
988 *r3 = insn[1] & 0xf;
989 *b2 = (insn[2] >> 4) & 0xf;
990 /* The 'long displacement' is a 20-bit signed integer. */
991 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
992 ^ 0x80000) - 0x80000;
993 return 1;
994 }
995 else
996 return 0;
997 }
998
999
1000 static int
1001 is_rx (bfd_byte *insn, int op,
1002 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1003 {
1004 if (insn[0] == op)
1005 {
1006 *r1 = (insn[1] >> 4) & 0xf;
1007 *x2 = insn[1] & 0xf;
1008 *b2 = (insn[2] >> 4) & 0xf;
1009 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1010 return 1;
1011 }
1012 else
1013 return 0;
1014 }
1015
1016
1017 static int
1018 is_rxy (bfd_byte *insn, int op1, int op2,
1019 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1020 {
1021 if (insn[0] == op1
1022 && insn[5] == op2)
1023 {
1024 *r1 = (insn[1] >> 4) & 0xf;
1025 *x2 = insn[1] & 0xf;
1026 *b2 = (insn[2] >> 4) & 0xf;
1027 /* The 'long displacement' is a 20-bit signed integer. */
1028 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1029 ^ 0x80000) - 0x80000;
1030 return 1;
1031 }
1032 else
1033 return 0;
1034 }
1035
1036
1037 /* Set ADDR to the effective address for an X-style instruction, like:
1038
1039 L R1, D2(X2, B2)
1040
1041 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1042 constant; the effective address is the sum of all three. If either
1043 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1044 means that r0 can't be used as either X2 or B2.
1045
1046 GPR is an array of general register values, indexed by GPR number,
1047 not GDB register number. */
1048 static void
1049 compute_x_addr (struct prologue_value *addr,
1050 struct prologue_value *gpr,
1051 int d2, unsigned int x2, unsigned int b2)
1052 {
1053 /* We can't just add stuff directly in addr; it might alias some of
1054 the registers we need to read. */
1055 struct prologue_value result;
1056
1057 pv_set_to_constant (&result, d2);
1058 if (x2)
1059 pv_add (&result, &result, &gpr[x2]);
1060 if (b2)
1061 pv_add (&result, &result, &gpr[b2]);
1062
1063 *addr = result;
1064 }
1065
1066
1067 #define S390_NUM_GPRS 16
1068 #define S390_NUM_FPRS 16
1069
1070 struct s390_prologue_data {
1071
1072 /* The size of a GPR or FPR. */
1073 int gpr_size;
1074 int fpr_size;
1075
1076 /* The general-purpose registers. */
1077 struct prologue_value gpr[S390_NUM_GPRS];
1078
1079 /* The floating-point registers. */
1080 struct prologue_value fpr[S390_NUM_FPRS];
1081
1082 /* The offset relative to the CFA where the incoming GPR N was saved
1083 by the function prologue. 0 if not saved or unknown. */
1084 int gpr_slot[S390_NUM_GPRS];
1085
1086 /* Likewise for FPRs. */
1087 int fpr_slot[S390_NUM_FPRS];
1088
1089 /* Nonzero if the backchain was saved. This is assumed to be the
1090 case when the incoming SP is saved at the current SP location. */
1091 int back_chain_saved_p;
1092 };
1093
1094 /* Do a SIZE-byte store of VALUE to ADDR. */
1095 static void
1096 s390_store (struct prologue_value *addr,
1097 CORE_ADDR size,
1098 struct prologue_value *value,
1099 struct s390_prologue_data *data)
1100 {
1101 struct prologue_value cfa, offset;
1102 int i;
1103
1104 /* Check whether we are storing the backchain. */
1105 pv_subtract (&offset, &data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
1106
1107 if (offset.kind == pv_constant && offset.k == 0)
1108 if (size == data->gpr_size
1109 && pv_is_register (value, S390_SP_REGNUM, 0))
1110 {
1111 data->back_chain_saved_p = 1;
1112 return;
1113 }
1114
1115
1116 /* Check whether we are storing a register into the stack. */
1117 pv_set_to_register (&cfa, S390_SP_REGNUM, 16 * data->gpr_size + 32);
1118 pv_subtract (&offset, &cfa, addr);
1119
1120 if (offset.kind == pv_constant
1121 && offset.k < INT_MAX && offset.k > 0
1122 && offset.k % data->gpr_size == 0)
1123 {
1124 /* If we are storing the original value of a register, we want to
1125 record the CFA offset. If the same register is stored multiple
1126 times, the stack slot with the highest address counts. */
1127
1128 for (i = 0; i < S390_NUM_GPRS; i++)
1129 if (size == data->gpr_size
1130 && pv_is_register (value, S390_R0_REGNUM + i, 0))
1131 if (data->gpr_slot[i] == 0
1132 || data->gpr_slot[i] > offset.k)
1133 {
1134 data->gpr_slot[i] = offset.k;
1135 return;
1136 }
1137
1138 for (i = 0; i < S390_NUM_FPRS; i++)
1139 if (size == data->fpr_size
1140 && pv_is_register (value, S390_F0_REGNUM + i, 0))
1141 if (data->fpr_slot[i] == 0
1142 || data->fpr_slot[i] > offset.k)
1143 {
1144 data->fpr_slot[i] = offset.k;
1145 return;
1146 }
1147 }
1148
1149
1150 /* Note: If this is some store we cannot identify, you might think we
1151 should forget our cached values, as any of those might have been hit.
1152
1153 However, we make the assumption that the register save areas are only
1154 ever stored to once in any given function, and we do recognize these
1155 stores. Thus every store we cannot recognize does not hit our data. */
1156 }
1157
1158 /* Do a SIZE-byte load from ADDR into VALUE. */
1159 static void
1160 s390_load (struct prologue_value *addr,
1161 CORE_ADDR size,
1162 struct prologue_value *value,
1163 struct s390_prologue_data *data)
1164 {
1165 struct prologue_value cfa, offset;
1166 int i;
1167
1168 /* If it's a load from an in-line constant pool, then we can
1169 simulate that, under the assumption that the code isn't
1170 going to change between the time the processor actually
1171 executed it creating the current frame, and the time when
1172 we're analyzing the code to unwind past that frame. */
1173 if (addr->kind == pv_constant)
1174 {
1175 struct section_table *secp;
1176 secp = target_section_by_addr (&current_target, addr->k);
1177 if (secp != NULL
1178 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
1179 & SEC_READONLY))
1180 {
1181 pv_set_to_constant (value, read_memory_integer (addr->k, size));
1182 return;
1183 }
1184 }
1185
1186 /* Check whether we are accessing one of our save slots. */
1187 pv_set_to_register (&cfa, S390_SP_REGNUM, 16 * data->gpr_size + 32);
1188 pv_subtract (&offset, &cfa, addr);
1189
1190 if (offset.kind == pv_constant
1191 && offset.k < INT_MAX && offset.k > 0)
1192 {
1193 for (i = 0; i < S390_NUM_GPRS; i++)
1194 if (offset.k == data->gpr_slot[i])
1195 {
1196 pv_set_to_register (value, S390_R0_REGNUM + i, 0);
1197 return;
1198 }
1199
1200 for (i = 0; i < S390_NUM_FPRS; i++)
1201 if (offset.k == data->fpr_slot[i])
1202 {
1203 pv_set_to_register (value, S390_F0_REGNUM + i, 0);
1204 return;
1205 }
1206 }
1207
1208 /* Otherwise, we don't know the value. */
1209 pv_set_to_unknown (value);
1210 }
1211
1212
1213 /* Analyze the prologue of the function starting at START_PC,
1214 continuing at most until CURRENT_PC. Initialize DATA to
1215 hold all information we find out about the state of the registers
1216 and stack slots. Return the address of the instruction after
1217 the last one that changed the SP, FP, or back chain; or zero
1218 on error. */
1219 static CORE_ADDR
1220 s390_analyze_prologue (struct gdbarch *gdbarch,
1221 CORE_ADDR start_pc,
1222 CORE_ADDR current_pc,
1223 struct s390_prologue_data *data)
1224 {
1225 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1226
1227 /* Our return value:
1228 The address of the instruction after the last one that changed
1229 the SP, FP, or back chain; zero if we got an error trying to
1230 read memory. */
1231 CORE_ADDR result = start_pc;
1232
1233 /* The current PC for our abstract interpretation. */
1234 CORE_ADDR pc;
1235
1236 /* The address of the next instruction after that. */
1237 CORE_ADDR next_pc;
1238
1239 /* Set up everything's initial value. */
1240 {
1241 int i;
1242
1243 /* For the purpose of prologue tracking, we consider the GPR size to
1244 be equal to the ABI word size, even if it is actually larger
1245 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1246 data->gpr_size = word_size;
1247 data->fpr_size = 8;
1248
1249 for (i = 0; i < S390_NUM_GPRS; i++)
1250 pv_set_to_register (&data->gpr[i], S390_R0_REGNUM + i, 0);
1251
1252 for (i = 0; i < S390_NUM_FPRS; i++)
1253 pv_set_to_register (&data->fpr[i], S390_F0_REGNUM + i, 0);
1254
1255 for (i = 0; i < S390_NUM_GPRS; i++)
1256 data->gpr_slot[i] = 0;
1257
1258 for (i = 0; i < S390_NUM_FPRS; i++)
1259 data->fpr_slot[i] = 0;
1260
1261 data->back_chain_saved_p = 0;
1262 }
1263
1264 /* Start interpreting instructions, until we hit the frame's
1265 current PC or the first branch instruction. */
1266 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
1267 {
1268 bfd_byte insn[S390_MAX_INSTR_SIZE];
1269 int insn_len = s390_readinstruction (insn, pc);
1270
1271 /* Fields for various kinds of instructions. */
1272 unsigned int b2, r1, r2, x2, r3;
1273 int i2, d2;
1274
1275 /* The values of SP and FP before this instruction,
1276 for detecting instructions that change them. */
1277 struct prologue_value pre_insn_sp, pre_insn_fp;
1278 /* Likewise for the flag whether the back chain was saved. */
1279 int pre_insn_back_chain_saved_p;
1280
1281 /* If we got an error trying to read the instruction, report it. */
1282 if (insn_len < 0)
1283 {
1284 result = 0;
1285 break;
1286 }
1287
1288 next_pc = pc + insn_len;
1289
1290 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1291 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1292 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
1293
1294 /* LHI r1, i2 --- load halfword immediate */
1295 if (word_size == 4
1296 && is_ri (insn, op1_lhi, op2_lhi, &r1, &i2))
1297 pv_set_to_constant (&data->gpr[r1], i2);
1298
1299 /* LGHI r1, i2 --- load halfword immediate (64-bit version) */
1300 else if (word_size == 8
1301 && is_ri (insn, op1_lghi, op2_lghi, &r1, &i2))
1302 pv_set_to_constant (&data->gpr[r1], i2);
1303
1304 /* LGFI r1, i2 --- load fullword immediate */
1305 else if (is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1306 pv_set_to_constant (&data->gpr[r1], i2);
1307
1308 /* LR r1, r2 --- load from register */
1309 else if (word_size == 4
1310 && is_rr (insn, op_lr, &r1, &r2))
1311 data->gpr[r1] = data->gpr[r2];
1312
1313 /* LGR r1, r2 --- load from register (64-bit version) */
1314 else if (word_size == 8
1315 && is_rre (insn, op_lgr, &r1, &r2))
1316 data->gpr[r1] = data->gpr[r2];
1317
1318 /* L r1, d2(x2, b2) --- load */
1319 else if (word_size == 4
1320 && is_rx (insn, op_l, &r1, &d2, &x2, &b2))
1321 {
1322 struct prologue_value addr;
1323
1324 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1325 s390_load (&addr, 4, &data->gpr[r1], data);
1326 }
1327
1328 /* LY r1, d2(x2, b2) --- load (long-displacement version) */
1329 else if (word_size == 4
1330 && is_rxy (insn, op1_ly, op2_ly, &r1, &d2, &x2, &b2))
1331 {
1332 struct prologue_value addr;
1333
1334 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1335 s390_load (&addr, 4, &data->gpr[r1], data);
1336 }
1337
1338 /* LG r1, d2(x2, b2) --- load (64-bit version) */
1339 else if (word_size == 8
1340 && is_rxy (insn, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1341 {
1342 struct prologue_value addr;
1343
1344 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1345 s390_load (&addr, 8, &data->gpr[r1], data);
1346 }
1347
1348 /* ST r1, d2(x2, b2) --- store */
1349 else if (word_size == 4
1350 && is_rx (insn, op_st, &r1, &d2, &x2, &b2))
1351 {
1352 struct prologue_value addr;
1353
1354 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1355 s390_store (&addr, 4, &data->gpr[r1], data);
1356 }
1357
1358 /* STY r1, d2(x2, b2) --- store (long-displacement version) */
1359 else if (word_size == 4
1360 && is_rxy (insn, op1_sty, op2_sty, &r1, &d2, &x2, &b2))
1361 {
1362 struct prologue_value addr;
1363
1364 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1365 s390_store (&addr, 4, &data->gpr[r1], data);
1366 }
1367
1368 /* STG r1, d2(x2, b2) --- store (64-bit version) */
1369 else if (word_size == 8
1370 && is_rxy (insn, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1371 {
1372 struct prologue_value addr;
1373
1374 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1375 s390_store (&addr, 8, &data->gpr[r1], data);
1376 }
1377
1378 /* STD r1, d2(x2,b2) --- store floating-point register */
1379 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
1380 {
1381 struct prologue_value addr;
1382
1383 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1384 s390_store (&addr, 8, &data->fpr[r1], data);
1385 }
1386
1387 /* STM r1, r3, d2(b2) --- store multiple */
1388 else if (word_size == 4
1389 && is_rs (insn, op_stm, &r1, &r3, &d2, &b2))
1390 {
1391 int regnum;
1392 int offset;
1393 struct prologue_value addr;
1394
1395 for (regnum = r1, offset = 0;
1396 regnum <= r3;
1397 regnum++, offset += 4)
1398 {
1399 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1400 s390_store (&addr, 4, &data->gpr[regnum], data);
1401 }
1402 }
1403
1404 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version) */
1405 else if (word_size == 4
1406 && is_rsy (insn, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2))
1407 {
1408 int regnum;
1409 int offset;
1410 struct prologue_value addr;
1411
1412 for (regnum = r1, offset = 0;
1413 regnum <= r3;
1414 regnum++, offset += 4)
1415 {
1416 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1417 s390_store (&addr, 4, &data->gpr[regnum], data);
1418 }
1419 }
1420
1421 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version) */
1422 else if (word_size == 8
1423 && is_rsy (insn, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
1424 {
1425 int regnum;
1426 int offset;
1427 struct prologue_value addr;
1428
1429 for (regnum = r1, offset = 0;
1430 regnum <= r3;
1431 regnum++, offset += 8)
1432 {
1433 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1434 s390_store (&addr, 8, &data->gpr[regnum], data);
1435 }
1436 }
1437
1438 /* AHI r1, i2 --- add halfword immediate */
1439 else if (word_size == 4
1440 && is_ri (insn, op1_ahi, op2_ahi, &r1, &i2))
1441 pv_add_constant (&data->gpr[r1], i2);
1442
1443 /* AGHI r1, i2 --- add halfword immediate (64-bit version) */
1444 else if (word_size == 8
1445 && is_ri (insn, op1_aghi, op2_aghi, &r1, &i2))
1446 pv_add_constant (&data->gpr[r1], i2);
1447
1448 /* AFI r1, i2 --- add fullword immediate */
1449 else if (word_size == 4
1450 && is_ril (insn, op1_afi, op2_afi, &r1, &i2))
1451 pv_add_constant (&data->gpr[r1], i2);
1452
1453 /* AGFI r1, i2 --- add fullword immediate (64-bit version) */
1454 else if (word_size == 8
1455 && is_ril (insn, op1_agfi, op2_agfi, &r1, &i2))
1456 pv_add_constant (&data->gpr[r1], i2);
1457
1458 /* ALFI r1, i2 --- add logical immediate */
1459 else if (word_size == 4
1460 && is_ril (insn, op1_alfi, op2_alfi, &r1, &i2))
1461 pv_add_constant (&data->gpr[r1], (CORE_ADDR)i2 & 0xffffffff);
1462
1463 /* ALGFI r1, i2 --- add logical immediate (64-bit version) */
1464 else if (word_size == 8
1465 && is_ril (insn, op1_algfi, op2_algfi, &r1, &i2))
1466 pv_add_constant (&data->gpr[r1], (CORE_ADDR)i2 & 0xffffffff);
1467
1468 /* AR r1, r2 -- add register */
1469 else if (word_size == 4
1470 && is_rr (insn, op_ar, &r1, &r2))
1471 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1472
1473 /* AGR r1, r2 -- add register (64-bit version) */
1474 else if (word_size == 8
1475 && is_rre (insn, op_agr, &r1, &r2))
1476 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1477
1478 /* A r1, d2(x2, b2) -- add */
1479 else if (word_size == 4
1480 && is_rx (insn, op_a, &r1, &d2, &x2, &b2))
1481 {
1482 struct prologue_value addr;
1483 struct prologue_value value;
1484
1485 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1486 s390_load (&addr, 4, &value, data);
1487
1488 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1489 }
1490
1491 /* AY r1, d2(x2, b2) -- add (long-displacement version) */
1492 else if (word_size == 4
1493 && is_rxy (insn, op1_ay, op2_ay, &r1, &d2, &x2, &b2))
1494 {
1495 struct prologue_value addr;
1496 struct prologue_value value;
1497
1498 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1499 s390_load (&addr, 4, &value, data);
1500
1501 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1502 }
1503
1504 /* AG r1, d2(x2, b2) -- add (64-bit version) */
1505 else if (word_size == 8
1506 && is_rxy (insn, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1507 {
1508 struct prologue_value addr;
1509 struct prologue_value value;
1510
1511 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1512 s390_load (&addr, 8, &value, data);
1513
1514 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1515 }
1516
1517 /* SLFI r1, i2 --- subtract logical immediate */
1518 else if (word_size == 4
1519 && is_ril (insn, op1_slfi, op2_slfi, &r1, &i2))
1520 pv_add_constant (&data->gpr[r1], -((CORE_ADDR)i2 & 0xffffffff));
1521
1522 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version) */
1523 else if (word_size == 8
1524 && is_ril (insn, op1_slgfi, op2_slgfi, &r1, &i2))
1525 pv_add_constant (&data->gpr[r1], -((CORE_ADDR)i2 & 0xffffffff));
1526
1527 /* SR r1, r2 -- subtract register */
1528 else if (word_size == 4
1529 && is_rr (insn, op_sr, &r1, &r2))
1530 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1531
1532 /* SGR r1, r2 -- subtract register (64-bit version) */
1533 else if (word_size == 8
1534 && is_rre (insn, op_sgr, &r1, &r2))
1535 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1536
1537 /* S r1, d2(x2, b2) -- subtract */
1538 else if (word_size == 4
1539 && is_rx (insn, op_s, &r1, &d2, &x2, &b2))
1540 {
1541 struct prologue_value addr;
1542 struct prologue_value value;
1543
1544 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1545 s390_load (&addr, 4, &value, data);
1546
1547 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1548 }
1549
1550 /* SY r1, d2(x2, b2) -- subtract (long-displacement version) */
1551 else if (word_size == 4
1552 && is_rxy (insn, op1_sy, op2_sy, &r1, &d2, &x2, &b2))
1553 {
1554 struct prologue_value addr;
1555 struct prologue_value value;
1556
1557 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1558 s390_load (&addr, 4, &value, data);
1559
1560 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1561 }
1562
1563 /* SG r1, d2(x2, b2) -- subtract (64-bit version) */
1564 else if (word_size == 8
1565 && is_rxy (insn, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1566 {
1567 struct prologue_value addr;
1568 struct prologue_value value;
1569
1570 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1571 s390_load (&addr, 8, &value, data);
1572
1573 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1574 }
1575
1576 /* NR r1, r2 --- logical and */
1577 else if (word_size == 4
1578 && is_rr (insn, op_nr, &r1, &r2))
1579 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1580
1581 /* NGR r1, r2 >--- logical and (64-bit version) */
1582 else if (word_size == 8
1583 && is_rre (insn, op_ngr, &r1, &r2))
1584 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1585
1586 /* LA r1, d2(x2, b2) --- load address */
1587 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2))
1588 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2);
1589
1590 /* LAY r1, d2(x2, b2) --- load address (long-displacement version) */
1591 else if (is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1592 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2);
1593
1594 /* LARL r1, i2 --- load address relative long */
1595 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1596 pv_set_to_constant (&data->gpr[r1], pc + i2 * 2);
1597
1598 /* BASR r1, 0 --- branch and save
1599 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1600 else if (is_rr (insn, op_basr, &r1, &r2)
1601 && r2 == 0)
1602 pv_set_to_constant (&data->gpr[r1], next_pc);
1603
1604 /* BRAS r1, i2 --- branch relative and save */
1605 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1606 {
1607 pv_set_to_constant (&data->gpr[r1], next_pc);
1608 next_pc = pc + i2 * 2;
1609
1610 /* We'd better not interpret any backward branches. We'll
1611 never terminate. */
1612 if (next_pc <= pc)
1613 break;
1614 }
1615
1616 /* Terminate search when hitting any other branch instruction. */
1617 else if (is_rr (insn, op_basr, &r1, &r2)
1618 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1619 || is_rr (insn, op_bcr, &r1, &r2)
1620 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1621 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1622 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1623 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1624 break;
1625
1626 else
1627 /* An instruction we don't know how to simulate. The only
1628 safe thing to do would be to set every value we're tracking
1629 to 'unknown'. Instead, we'll be optimistic: we assume that
1630 we *can* interpret every instruction that the compiler uses
1631 to manipulate any of the data we're interested in here --
1632 then we can just ignore anything else. */
1633 ;
1634
1635 /* Record the address after the last instruction that changed
1636 the FP, SP, or backlink. Ignore instructions that changed
1637 them back to their original values --- those are probably
1638 restore instructions. (The back chain is never restored,
1639 just popped.) */
1640 {
1641 struct prologue_value *sp = &data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1642 struct prologue_value *fp = &data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1643
1644 if ((! pv_is_identical (&pre_insn_sp, sp)
1645 && ! pv_is_register (sp, S390_SP_REGNUM, 0))
1646 || (! pv_is_identical (&pre_insn_fp, fp)
1647 && ! pv_is_register (fp, S390_FRAME_REGNUM, 0))
1648 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1649 result = next_pc;
1650 }
1651 }
1652
1653 return result;
1654 }
1655
1656 /* Advance PC across any function entry prologue instructions to reach
1657 some "real" code. */
1658 static CORE_ADDR
1659 s390_skip_prologue (CORE_ADDR pc)
1660 {
1661 struct s390_prologue_data data;
1662 CORE_ADDR skip_pc;
1663 skip_pc = s390_analyze_prologue (current_gdbarch, pc, (CORE_ADDR)-1, &data);
1664 return skip_pc ? skip_pc : pc;
1665 }
1666
1667 /* Return true if we are in the functin's epilogue, i.e. after the
1668 instruction that destroyed the function's stack frame. */
1669 static int
1670 s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1671 {
1672 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1673
1674 /* In frameless functions, there's not frame to destroy and thus
1675 we don't care about the epilogue.
1676
1677 In functions with frame, the epilogue sequence is a pair of
1678 a LM-type instruction that restores (amongst others) the
1679 return register %r14 and the stack pointer %r15, followed
1680 by a branch 'br %r14' --or equivalent-- that effects the
1681 actual return.
1682
1683 In that situation, this function needs to return 'true' in
1684 exactly one case: when pc points to that branch instruction.
1685
1686 Thus we try to disassemble the one instructions immediately
1687 preceeding pc and check whether it is an LM-type instruction
1688 modifying the stack pointer.
1689
1690 Note that disassembling backwards is not reliable, so there
1691 is a slight chance of false positives here ... */
1692
1693 bfd_byte insn[6];
1694 unsigned int r1, r3, b2;
1695 int d2;
1696
1697 if (word_size == 4
1698 && !deprecated_read_memory_nobpt (pc - 4, insn, 4)
1699 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1700 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1701 return 1;
1702
1703 if (word_size == 4
1704 && !deprecated_read_memory_nobpt (pc - 6, insn, 6)
1705 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1706 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1707 return 1;
1708
1709 if (word_size == 8
1710 && !deprecated_read_memory_nobpt (pc - 6, insn, 6)
1711 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
1712 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1713 return 1;
1714
1715 return 0;
1716 }
1717
1718
1719 /* Normal stack frames. */
1720
1721 struct s390_unwind_cache {
1722
1723 CORE_ADDR func;
1724 CORE_ADDR frame_base;
1725 CORE_ADDR local_base;
1726
1727 struct trad_frame_saved_reg *saved_regs;
1728 };
1729
1730 static int
1731 s390_prologue_frame_unwind_cache (struct frame_info *next_frame,
1732 struct s390_unwind_cache *info)
1733 {
1734 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1735 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1736 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1737 struct s390_prologue_data data;
1738 struct prologue_value *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1739 struct prologue_value *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1740 int i;
1741 CORE_ADDR cfa;
1742 CORE_ADDR func;
1743 CORE_ADDR result;
1744 ULONGEST reg;
1745 CORE_ADDR prev_sp;
1746 int frame_pointer;
1747 int size;
1748
1749 /* Try to find the function start address. If we can't find it, we don't
1750 bother searching for it -- with modern compilers this would be mostly
1751 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1752 or else a valid backchain ... */
1753 func = frame_func_unwind (next_frame);
1754 if (!func)
1755 return 0;
1756
1757 /* Try to analyze the prologue. */
1758 result = s390_analyze_prologue (gdbarch, func,
1759 frame_pc_unwind (next_frame), &data);
1760 if (!result)
1761 return 0;
1762
1763 /* If this was successful, we should have found the instruction that
1764 sets the stack pointer register to the previous value of the stack
1765 pointer minus the frame size. */
1766 if (sp->kind != pv_register || sp->reg != S390_SP_REGNUM)
1767 return 0;
1768
1769 /* A frame size of zero at this point can mean either a real
1770 frameless function, or else a failure to find the prologue.
1771 Perform some sanity checks to verify we really have a
1772 frameless function. */
1773 if (sp->k == 0)
1774 {
1775 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1776 size zero. This is only possible if the next frame is a sentinel
1777 frame, a dummy frame, or a signal trampoline frame. */
1778 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1779 needed, instead the code should simpliy rely on its
1780 analysis. */
1781 if (get_frame_type (next_frame) == NORMAL_FRAME)
1782 return 0;
1783
1784 /* If we really have a frameless function, %r14 must be valid
1785 -- in particular, it must point to a different function. */
1786 reg = frame_unwind_register_unsigned (next_frame, S390_RETADDR_REGNUM);
1787 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1788 if (get_pc_function_start (reg) == func)
1789 {
1790 /* However, there is one case where it *is* valid for %r14
1791 to point to the same function -- if this is a recursive
1792 call, and we have stopped in the prologue *before* the
1793 stack frame was allocated.
1794
1795 Recognize this case by looking ahead a bit ... */
1796
1797 struct s390_prologue_data data2;
1798 struct prologue_value *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1799
1800 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
1801 && sp->kind == pv_register
1802 && sp->reg == S390_SP_REGNUM
1803 && sp->k != 0))
1804 return 0;
1805 }
1806 }
1807
1808
1809 /* OK, we've found valid prologue data. */
1810 size = -sp->k;
1811
1812 /* If the frame pointer originally also holds the same value
1813 as the stack pointer, we're probably using it. If it holds
1814 some other value -- even a constant offset -- it is most
1815 likely used as temp register. */
1816 if (pv_is_identical (sp, fp))
1817 frame_pointer = S390_FRAME_REGNUM;
1818 else
1819 frame_pointer = S390_SP_REGNUM;
1820
1821 /* If we've detected a function with stack frame, we'll still have to
1822 treat it as frameless if we're currently within the function epilog
1823 code at a point where the frame pointer has already been restored.
1824 This can only happen in an innermost frame. */
1825 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1826 instead the code should simpliy rely on its analysis. */
1827 if (size > 0 && get_frame_type (next_frame) != NORMAL_FRAME)
1828 {
1829 /* See the comment in s390_in_function_epilogue_p on why this is
1830 not completely reliable ... */
1831 if (s390_in_function_epilogue_p (gdbarch, frame_pc_unwind (next_frame)))
1832 {
1833 memset (&data, 0, sizeof (data));
1834 size = 0;
1835 frame_pointer = S390_SP_REGNUM;
1836 }
1837 }
1838
1839 /* Once we know the frame register and the frame size, we can unwind
1840 the current value of the frame register from the next frame, and
1841 add back the frame size to arrive that the previous frame's
1842 stack pointer value. */
1843 prev_sp = frame_unwind_register_unsigned (next_frame, frame_pointer) + size;
1844 cfa = prev_sp + 16*word_size + 32;
1845
1846 /* Record the addresses of all register spill slots the prologue parser
1847 has recognized. Consider only registers defined as call-saved by the
1848 ABI; for call-clobbered registers the parser may have recognized
1849 spurious stores. */
1850
1851 for (i = 6; i <= 15; i++)
1852 if (data.gpr_slot[i] != 0)
1853 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
1854
1855 switch (tdep->abi)
1856 {
1857 case ABI_LINUX_S390:
1858 if (data.fpr_slot[4] != 0)
1859 info->saved_regs[S390_F4_REGNUM].addr = cfa - data.fpr_slot[4];
1860 if (data.fpr_slot[6] != 0)
1861 info->saved_regs[S390_F6_REGNUM].addr = cfa - data.fpr_slot[6];
1862 break;
1863
1864 case ABI_LINUX_ZSERIES:
1865 for (i = 8; i <= 15; i++)
1866 if (data.fpr_slot[i] != 0)
1867 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
1868 break;
1869 }
1870
1871 /* Function return will set PC to %r14. */
1872 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1873
1874 /* In frameless functions, we unwind simply by moving the return
1875 address to the PC. However, if we actually stored to the
1876 save area, use that -- we might only think the function frameless
1877 because we're in the middle of the prologue ... */
1878 if (size == 0
1879 && !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1880 {
1881 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
1882 }
1883
1884 /* Another sanity check: unless this is a frameless function,
1885 we should have found spill slots for SP and PC.
1886 If not, we cannot unwind further -- this happens e.g. in
1887 libc's thread_start routine. */
1888 if (size > 0)
1889 {
1890 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
1891 || !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1892 prev_sp = -1;
1893 }
1894
1895 /* We use the current value of the frame register as local_base,
1896 and the top of the register save area as frame_base. */
1897 if (prev_sp != -1)
1898 {
1899 info->frame_base = prev_sp + 16*word_size + 32;
1900 info->local_base = prev_sp - size;
1901 }
1902
1903 info->func = func;
1904 return 1;
1905 }
1906
1907 static void
1908 s390_backchain_frame_unwind_cache (struct frame_info *next_frame,
1909 struct s390_unwind_cache *info)
1910 {
1911 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1912 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1913 CORE_ADDR backchain;
1914 ULONGEST reg;
1915 LONGEST sp;
1916
1917 /* Get the backchain. */
1918 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1919 backchain = read_memory_unsigned_integer (reg, word_size);
1920
1921 /* A zero backchain terminates the frame chain. As additional
1922 sanity check, let's verify that the spill slot for SP in the
1923 save area pointed to by the backchain in fact links back to
1924 the save area. */
1925 if (backchain != 0
1926 && safe_read_memory_integer (backchain + 15*word_size, word_size, &sp)
1927 && (CORE_ADDR)sp == backchain)
1928 {
1929 /* We don't know which registers were saved, but it will have
1930 to be at least %r14 and %r15. This will allow us to continue
1931 unwinding, but other prev-frame registers may be incorrect ... */
1932 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1933 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1934
1935 /* Function return will set PC to %r14. */
1936 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1937
1938 /* We use the current value of the frame register as local_base,
1939 and the top of the register save area as frame_base. */
1940 info->frame_base = backchain + 16*word_size + 32;
1941 info->local_base = reg;
1942 }
1943
1944 info->func = frame_pc_unwind (next_frame);
1945 }
1946
1947 static struct s390_unwind_cache *
1948 s390_frame_unwind_cache (struct frame_info *next_frame,
1949 void **this_prologue_cache)
1950 {
1951 struct s390_unwind_cache *info;
1952 if (*this_prologue_cache)
1953 return *this_prologue_cache;
1954
1955 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1956 *this_prologue_cache = info;
1957 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1958 info->func = -1;
1959 info->frame_base = -1;
1960 info->local_base = -1;
1961
1962 /* Try to use prologue analysis to fill the unwind cache.
1963 If this fails, fall back to reading the stack backchain. */
1964 if (!s390_prologue_frame_unwind_cache (next_frame, info))
1965 s390_backchain_frame_unwind_cache (next_frame, info);
1966
1967 return info;
1968 }
1969
1970 static void
1971 s390_frame_this_id (struct frame_info *next_frame,
1972 void **this_prologue_cache,
1973 struct frame_id *this_id)
1974 {
1975 struct s390_unwind_cache *info
1976 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
1977
1978 if (info->frame_base == -1)
1979 return;
1980
1981 *this_id = frame_id_build (info->frame_base, info->func);
1982 }
1983
1984 static void
1985 s390_frame_prev_register (struct frame_info *next_frame,
1986 void **this_prologue_cache,
1987 int regnum, int *optimizedp,
1988 enum lval_type *lvalp, CORE_ADDR *addrp,
1989 int *realnump, gdb_byte *bufferp)
1990 {
1991 struct s390_unwind_cache *info
1992 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
1993 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1994 optimizedp, lvalp, addrp, realnump, bufferp);
1995 }
1996
1997 static const struct frame_unwind s390_frame_unwind = {
1998 NORMAL_FRAME,
1999 s390_frame_this_id,
2000 s390_frame_prev_register
2001 };
2002
2003 static const struct frame_unwind *
2004 s390_frame_sniffer (struct frame_info *next_frame)
2005 {
2006 return &s390_frame_unwind;
2007 }
2008
2009
2010 /* Code stubs and their stack frames. For things like PLTs and NULL
2011 function calls (where there is no true frame and the return address
2012 is in the RETADDR register). */
2013
2014 struct s390_stub_unwind_cache
2015 {
2016 CORE_ADDR frame_base;
2017 struct trad_frame_saved_reg *saved_regs;
2018 };
2019
2020 static struct s390_stub_unwind_cache *
2021 s390_stub_frame_unwind_cache (struct frame_info *next_frame,
2022 void **this_prologue_cache)
2023 {
2024 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2025 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2026 struct s390_stub_unwind_cache *info;
2027 ULONGEST reg;
2028
2029 if (*this_prologue_cache)
2030 return *this_prologue_cache;
2031
2032 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2033 *this_prologue_cache = info;
2034 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2035
2036 /* The return address is in register %r14. */
2037 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
2038
2039 /* Retrieve stack pointer and determine our frame base. */
2040 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2041 info->frame_base = reg + 16*word_size + 32;
2042
2043 return info;
2044 }
2045
2046 static void
2047 s390_stub_frame_this_id (struct frame_info *next_frame,
2048 void **this_prologue_cache,
2049 struct frame_id *this_id)
2050 {
2051 struct s390_stub_unwind_cache *info
2052 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache);
2053 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
2054 }
2055
2056 static void
2057 s390_stub_frame_prev_register (struct frame_info *next_frame,
2058 void **this_prologue_cache,
2059 int regnum, int *optimizedp,
2060 enum lval_type *lvalp, CORE_ADDR *addrp,
2061 int *realnump, gdb_byte *bufferp)
2062 {
2063 struct s390_stub_unwind_cache *info
2064 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache);
2065 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
2066 optimizedp, lvalp, addrp, realnump, bufferp);
2067 }
2068
2069 static const struct frame_unwind s390_stub_frame_unwind = {
2070 NORMAL_FRAME,
2071 s390_stub_frame_this_id,
2072 s390_stub_frame_prev_register
2073 };
2074
2075 static const struct frame_unwind *
2076 s390_stub_frame_sniffer (struct frame_info *next_frame)
2077 {
2078 CORE_ADDR pc = frame_pc_unwind (next_frame);
2079 bfd_byte insn[S390_MAX_INSTR_SIZE];
2080
2081 /* If the current PC points to non-readable memory, we assume we
2082 have trapped due to an invalid function pointer call. We handle
2083 the non-existing current function like a PLT stub. */
2084 if (in_plt_section (pc, NULL)
2085 || s390_readinstruction (insn, pc) < 0)
2086 return &s390_stub_frame_unwind;
2087 return NULL;
2088 }
2089
2090
2091 /* Signal trampoline stack frames. */
2092
2093 struct s390_sigtramp_unwind_cache {
2094 CORE_ADDR frame_base;
2095 struct trad_frame_saved_reg *saved_regs;
2096 };
2097
2098 static struct s390_sigtramp_unwind_cache *
2099 s390_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
2100 void **this_prologue_cache)
2101 {
2102 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2103 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2104 struct s390_sigtramp_unwind_cache *info;
2105 ULONGEST this_sp, prev_sp;
2106 CORE_ADDR next_ra, next_cfa, sigreg_ptr;
2107 int i;
2108
2109 if (*this_prologue_cache)
2110 return *this_prologue_cache;
2111
2112 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2113 *this_prologue_cache = info;
2114 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2115
2116 this_sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2117 next_ra = frame_pc_unwind (next_frame);
2118 next_cfa = this_sp + 16*word_size + 32;
2119
2120 /* New-style RT frame:
2121 retcode + alignment (8 bytes)
2122 siginfo (128 bytes)
2123 ucontext (contains sigregs at offset 5 words) */
2124 if (next_ra == next_cfa)
2125 {
2126 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
2127 }
2128
2129 /* Old-style RT frame and all non-RT frames:
2130 old signal mask (8 bytes)
2131 pointer to sigregs */
2132 else
2133 {
2134 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, word_size);
2135 }
2136
2137 /* The sigregs structure looks like this:
2138 long psw_mask;
2139 long psw_addr;
2140 long gprs[16];
2141 int acrs[16];
2142 int fpc;
2143 int __pad;
2144 double fprs[16]; */
2145
2146 /* Let's ignore the PSW mask, it will not be restored anyway. */
2147 sigreg_ptr += word_size;
2148
2149 /* Next comes the PSW address. */
2150 info->saved_regs[S390_PC_REGNUM].addr = sigreg_ptr;
2151 sigreg_ptr += word_size;
2152
2153 /* Then the GPRs. */
2154 for (i = 0; i < 16; i++)
2155 {
2156 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2157 sigreg_ptr += word_size;
2158 }
2159
2160 /* Then the ACRs. */
2161 for (i = 0; i < 16; i++)
2162 {
2163 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2164 sigreg_ptr += 4;
2165 }
2166
2167 /* The floating-point control word. */
2168 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2169 sigreg_ptr += 8;
2170
2171 /* And finally the FPRs. */
2172 for (i = 0; i < 16; i++)
2173 {
2174 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2175 sigreg_ptr += 8;
2176 }
2177
2178 /* Restore the previous frame's SP. */
2179 prev_sp = read_memory_unsigned_integer (
2180 info->saved_regs[S390_SP_REGNUM].addr,
2181 word_size);
2182
2183 /* Determine our frame base. */
2184 info->frame_base = prev_sp + 16*word_size + 32;
2185
2186 return info;
2187 }
2188
2189 static void
2190 s390_sigtramp_frame_this_id (struct frame_info *next_frame,
2191 void **this_prologue_cache,
2192 struct frame_id *this_id)
2193 {
2194 struct s390_sigtramp_unwind_cache *info
2195 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
2196 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
2197 }
2198
2199 static void
2200 s390_sigtramp_frame_prev_register (struct frame_info *next_frame,
2201 void **this_prologue_cache,
2202 int regnum, int *optimizedp,
2203 enum lval_type *lvalp, CORE_ADDR *addrp,
2204 int *realnump, gdb_byte *bufferp)
2205 {
2206 struct s390_sigtramp_unwind_cache *info
2207 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
2208 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
2209 optimizedp, lvalp, addrp, realnump, bufferp);
2210 }
2211
2212 static const struct frame_unwind s390_sigtramp_frame_unwind = {
2213 SIGTRAMP_FRAME,
2214 s390_sigtramp_frame_this_id,
2215 s390_sigtramp_frame_prev_register
2216 };
2217
2218 static const struct frame_unwind *
2219 s390_sigtramp_frame_sniffer (struct frame_info *next_frame)
2220 {
2221 CORE_ADDR pc = frame_pc_unwind (next_frame);
2222 bfd_byte sigreturn[2];
2223
2224 if (deprecated_read_memory_nobpt (pc, sigreturn, 2))
2225 return NULL;
2226
2227 if (sigreturn[0] != 0x0a /* svc */)
2228 return NULL;
2229
2230 if (sigreturn[1] != 119 /* sigreturn */
2231 && sigreturn[1] != 173 /* rt_sigreturn */)
2232 return NULL;
2233
2234 return &s390_sigtramp_frame_unwind;
2235 }
2236
2237
2238 /* Frame base handling. */
2239
2240 static CORE_ADDR
2241 s390_frame_base_address (struct frame_info *next_frame, void **this_cache)
2242 {
2243 struct s390_unwind_cache *info
2244 = s390_frame_unwind_cache (next_frame, this_cache);
2245 return info->frame_base;
2246 }
2247
2248 static CORE_ADDR
2249 s390_local_base_address (struct frame_info *next_frame, void **this_cache)
2250 {
2251 struct s390_unwind_cache *info
2252 = s390_frame_unwind_cache (next_frame, this_cache);
2253 return info->local_base;
2254 }
2255
2256 static const struct frame_base s390_frame_base = {
2257 &s390_frame_unwind,
2258 s390_frame_base_address,
2259 s390_local_base_address,
2260 s390_local_base_address
2261 };
2262
2263 static CORE_ADDR
2264 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2265 {
2266 ULONGEST pc;
2267 pc = frame_unwind_register_unsigned (next_frame, S390_PC_REGNUM);
2268 return gdbarch_addr_bits_remove (gdbarch, pc);
2269 }
2270
2271 static CORE_ADDR
2272 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2273 {
2274 ULONGEST sp;
2275 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2276 return gdbarch_addr_bits_remove (gdbarch, sp);
2277 }
2278
2279
2280 /* DWARF-2 frame support. */
2281
2282 static void
2283 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2284 struct dwarf2_frame_state_reg *reg)
2285 {
2286 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2287
2288 switch (tdep->abi)
2289 {
2290 case ABI_LINUX_S390:
2291 /* Call-saved registers. */
2292 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
2293 || regnum == S390_F4_REGNUM
2294 || regnum == S390_F6_REGNUM)
2295 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2296
2297 /* Call-clobbered registers. */
2298 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
2299 || (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
2300 && regnum != S390_F4_REGNUM && regnum != S390_F6_REGNUM))
2301 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2302
2303 /* The return address column. */
2304 else if (regnum == S390_PC_REGNUM)
2305 reg->how = DWARF2_FRAME_REG_RA;
2306 break;
2307
2308 case ABI_LINUX_ZSERIES:
2309 /* Call-saved registers. */
2310 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
2311 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM))
2312 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2313
2314 /* Call-clobbered registers. */
2315 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
2316 || (regnum >= S390_F0_REGNUM && regnum <= S390_F7_REGNUM))
2317 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2318
2319 /* The return address column. */
2320 else if (regnum == S390_PC_REGNUM)
2321 reg->how = DWARF2_FRAME_REG_RA;
2322 break;
2323 }
2324 }
2325
2326
2327 /* Dummy function calls. */
2328
2329 /* Return non-zero if TYPE is an integer-like type, zero otherwise.
2330 "Integer-like" types are those that should be passed the way
2331 integers are: integers, enums, ranges, characters, and booleans. */
2332 static int
2333 is_integer_like (struct type *type)
2334 {
2335 enum type_code code = TYPE_CODE (type);
2336
2337 return (code == TYPE_CODE_INT
2338 || code == TYPE_CODE_ENUM
2339 || code == TYPE_CODE_RANGE
2340 || code == TYPE_CODE_CHAR
2341 || code == TYPE_CODE_BOOL);
2342 }
2343
2344 /* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2345 "Pointer-like" types are those that should be passed the way
2346 pointers are: pointers and references. */
2347 static int
2348 is_pointer_like (struct type *type)
2349 {
2350 enum type_code code = TYPE_CODE (type);
2351
2352 return (code == TYPE_CODE_PTR
2353 || code == TYPE_CODE_REF);
2354 }
2355
2356
2357 /* Return non-zero if TYPE is a `float singleton' or `double
2358 singleton', zero otherwise.
2359
2360 A `T singleton' is a struct type with one member, whose type is
2361 either T or a `T singleton'. So, the following are all float
2362 singletons:
2363
2364 struct { float x };
2365 struct { struct { float x; } x; };
2366 struct { struct { struct { float x; } x; } x; };
2367
2368 ... and so on.
2369
2370 All such structures are passed as if they were floats or doubles,
2371 as the (revised) ABI says. */
2372 static int
2373 is_float_singleton (struct type *type)
2374 {
2375 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2376 {
2377 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2378 CHECK_TYPEDEF (singleton_type);
2379
2380 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
2381 || is_float_singleton (singleton_type));
2382 }
2383
2384 return 0;
2385 }
2386
2387
2388 /* Return non-zero if TYPE is a struct-like type, zero otherwise.
2389 "Struct-like" types are those that should be passed as structs are:
2390 structs and unions.
2391
2392 As an odd quirk, not mentioned in the ABI, GCC passes float and
2393 double singletons as if they were a plain float, double, etc. (The
2394 corresponding union types are handled normally.) So we exclude
2395 those types here. *shrug* */
2396 static int
2397 is_struct_like (struct type *type)
2398 {
2399 enum type_code code = TYPE_CODE (type);
2400
2401 return (code == TYPE_CODE_UNION
2402 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2403 }
2404
2405
2406 /* Return non-zero if TYPE is a float-like type, zero otherwise.
2407 "Float-like" types are those that should be passed as
2408 floating-point values are.
2409
2410 You'd think this would just be floats, doubles, long doubles, etc.
2411 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2412 double singletons as if they were a plain float, double, etc. (The
2413 corresponding union types are handled normally.) So we include
2414 those types here. *shrug* */
2415 static int
2416 is_float_like (struct type *type)
2417 {
2418 return (TYPE_CODE (type) == TYPE_CODE_FLT
2419 || is_float_singleton (type));
2420 }
2421
2422
2423 static int
2424 is_power_of_two (unsigned int n)
2425 {
2426 return ((n & (n - 1)) == 0);
2427 }
2428
2429 /* Return non-zero if TYPE should be passed as a pointer to a copy,
2430 zero otherwise. */
2431 static int
2432 s390_function_arg_pass_by_reference (struct type *type)
2433 {
2434 unsigned length = TYPE_LENGTH (type);
2435 if (length > 8)
2436 return 1;
2437
2438 /* FIXME: All complex and vector types are also returned by reference. */
2439 return is_struct_like (type) && !is_power_of_two (length);
2440 }
2441
2442 /* Return non-zero if TYPE should be passed in a float register
2443 if possible. */
2444 static int
2445 s390_function_arg_float (struct type *type)
2446 {
2447 unsigned length = TYPE_LENGTH (type);
2448 if (length > 8)
2449 return 0;
2450
2451 return is_float_like (type);
2452 }
2453
2454 /* Return non-zero if TYPE should be passed in an integer register
2455 (or a pair of integer registers) if possible. */
2456 static int
2457 s390_function_arg_integer (struct type *type)
2458 {
2459 unsigned length = TYPE_LENGTH (type);
2460 if (length > 8)
2461 return 0;
2462
2463 return is_integer_like (type)
2464 || is_pointer_like (type)
2465 || (is_struct_like (type) && is_power_of_two (length));
2466 }
2467
2468 /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2469 word as required for the ABI. */
2470 static LONGEST
2471 extend_simple_arg (struct value *arg)
2472 {
2473 struct type *type = value_type (arg);
2474
2475 /* Even structs get passed in the least significant bits of the
2476 register / memory word. It's not really right to extract them as
2477 an integer, but it does take care of the extension. */
2478 if (TYPE_UNSIGNED (type))
2479 return extract_unsigned_integer (value_contents (arg),
2480 TYPE_LENGTH (type));
2481 else
2482 return extract_signed_integer (value_contents (arg),
2483 TYPE_LENGTH (type));
2484 }
2485
2486
2487 /* Return the alignment required by TYPE. */
2488 static int
2489 alignment_of (struct type *type)
2490 {
2491 int alignment;
2492
2493 if (is_integer_like (type)
2494 || is_pointer_like (type)
2495 || TYPE_CODE (type) == TYPE_CODE_FLT)
2496 alignment = TYPE_LENGTH (type);
2497 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2498 || TYPE_CODE (type) == TYPE_CODE_UNION)
2499 {
2500 int i;
2501
2502 alignment = 1;
2503 for (i = 0; i < TYPE_NFIELDS (type); i++)
2504 {
2505 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i));
2506
2507 if (field_alignment > alignment)
2508 alignment = field_alignment;
2509 }
2510 }
2511 else
2512 alignment = 1;
2513
2514 /* Check that everything we ever return is a power of two. Lots of
2515 code doesn't want to deal with aligning things to arbitrary
2516 boundaries. */
2517 gdb_assert ((alignment & (alignment - 1)) == 0);
2518
2519 return alignment;
2520 }
2521
2522
2523 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
2524 place to be passed to a function, as specified by the "GNU/Linux
2525 for S/390 ELF Application Binary Interface Supplement".
2526
2527 SP is the current stack pointer. We must put arguments, links,
2528 padding, etc. whereever they belong, and return the new stack
2529 pointer value.
2530
2531 If STRUCT_RETURN is non-zero, then the function we're calling is
2532 going to return a structure by value; STRUCT_ADDR is the address of
2533 a block we've allocated for it on the stack.
2534
2535 Our caller has taken care of any type promotions needed to satisfy
2536 prototypes or the old K&R argument-passing rules. */
2537 static CORE_ADDR
2538 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2539 struct regcache *regcache, CORE_ADDR bp_addr,
2540 int nargs, struct value **args, CORE_ADDR sp,
2541 int struct_return, CORE_ADDR struct_addr)
2542 {
2543 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2544 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2545 ULONGEST orig_sp;
2546 int i;
2547
2548 /* If the i'th argument is passed as a reference to a copy, then
2549 copy_addr[i] is the address of the copy we made. */
2550 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
2551
2552 /* Build the reference-to-copy area. */
2553 for (i = 0; i < nargs; i++)
2554 {
2555 struct value *arg = args[i];
2556 struct type *type = value_type (arg);
2557 unsigned length = TYPE_LENGTH (type);
2558
2559 if (s390_function_arg_pass_by_reference (type))
2560 {
2561 sp -= length;
2562 sp = align_down (sp, alignment_of (type));
2563 write_memory (sp, value_contents (arg), length);
2564 copy_addr[i] = sp;
2565 }
2566 }
2567
2568 /* Reserve space for the parameter area. As a conservative
2569 simplification, we assume that everything will be passed on the
2570 stack. Since every argument larger than 8 bytes will be
2571 passed by reference, we use this simple upper bound. */
2572 sp -= nargs * 8;
2573
2574 /* After all that, make sure it's still aligned on an eight-byte
2575 boundary. */
2576 sp = align_down (sp, 8);
2577
2578 /* Finally, place the actual parameters, working from SP towards
2579 higher addresses. The code above is supposed to reserve enough
2580 space for this. */
2581 {
2582 int fr = 0;
2583 int gr = 2;
2584 CORE_ADDR starg = sp;
2585
2586 /* A struct is returned using general register 2. */
2587 if (struct_return)
2588 {
2589 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2590 struct_addr);
2591 gr++;
2592 }
2593
2594 for (i = 0; i < nargs; i++)
2595 {
2596 struct value *arg = args[i];
2597 struct type *type = value_type (arg);
2598 unsigned length = TYPE_LENGTH (type);
2599
2600 if (s390_function_arg_pass_by_reference (type))
2601 {
2602 if (gr <= 6)
2603 {
2604 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2605 copy_addr[i]);
2606 gr++;
2607 }
2608 else
2609 {
2610 write_memory_unsigned_integer (starg, word_size, copy_addr[i]);
2611 starg += word_size;
2612 }
2613 }
2614 else if (s390_function_arg_float (type))
2615 {
2616 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2617 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2618 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2619 {
2620 /* When we store a single-precision value in an FP register,
2621 it occupies the leftmost bits. */
2622 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
2623 0, length, value_contents (arg));
2624 fr += 2;
2625 }
2626 else
2627 {
2628 /* When we store a single-precision value in a stack slot,
2629 it occupies the rightmost bits. */
2630 starg = align_up (starg + length, word_size);
2631 write_memory (starg - length, value_contents (arg), length);
2632 }
2633 }
2634 else if (s390_function_arg_integer (type) && length <= word_size)
2635 {
2636 if (gr <= 6)
2637 {
2638 /* Integer arguments are always extended to word size. */
2639 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
2640 extend_simple_arg (arg));
2641 gr++;
2642 }
2643 else
2644 {
2645 /* Integer arguments are always extended to word size. */
2646 write_memory_signed_integer (starg, word_size,
2647 extend_simple_arg (arg));
2648 starg += word_size;
2649 }
2650 }
2651 else if (s390_function_arg_integer (type) && length == 2*word_size)
2652 {
2653 if (gr <= 5)
2654 {
2655 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
2656 value_contents (arg));
2657 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
2658 value_contents (arg) + word_size);
2659 gr += 2;
2660 }
2661 else
2662 {
2663 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2664 in it, then don't go back and use it again later. */
2665 gr = 7;
2666
2667 write_memory (starg, value_contents (arg), length);
2668 starg += length;
2669 }
2670 }
2671 else
2672 internal_error (__FILE__, __LINE__, _("unknown argument type"));
2673 }
2674 }
2675
2676 /* Allocate the standard frame areas: the register save area, the
2677 word reserved for the compiler (which seems kind of meaningless),
2678 and the back chain pointer. */
2679 sp -= 16*word_size + 32;
2680
2681 /* Store return address. */
2682 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2683
2684 /* Store updated stack pointer. */
2685 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
2686
2687 /* We need to return the 'stack part' of the frame ID,
2688 which is actually the top of the register save area. */
2689 return sp + 16*word_size + 32;
2690 }
2691
2692 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
2693 dummy frame. The frame ID's base needs to match the TOS value
2694 returned by push_dummy_call, and the PC match the dummy frame's
2695 breakpoint. */
2696 static struct frame_id
2697 s390_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2698 {
2699 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2700 CORE_ADDR sp = s390_unwind_sp (gdbarch, next_frame);
2701
2702 return frame_id_build (sp + 16*word_size + 32,
2703 frame_pc_unwind (next_frame));
2704 }
2705
2706 static CORE_ADDR
2707 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2708 {
2709 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2710 always be aligned on an eight-byte boundary. */
2711 return (addr & -8);
2712 }
2713
2714
2715 /* Function return value access. */
2716
2717 static enum return_value_convention
2718 s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
2719 {
2720 int length = TYPE_LENGTH (type);
2721 if (length > 8)
2722 return RETURN_VALUE_STRUCT_CONVENTION;
2723
2724 switch (TYPE_CODE (type))
2725 {
2726 case TYPE_CODE_STRUCT:
2727 case TYPE_CODE_UNION:
2728 case TYPE_CODE_ARRAY:
2729 return RETURN_VALUE_STRUCT_CONVENTION;
2730
2731 default:
2732 return RETURN_VALUE_REGISTER_CONVENTION;
2733 }
2734 }
2735
2736 static enum return_value_convention
2737 s390_return_value (struct gdbarch *gdbarch, struct type *type,
2738 struct regcache *regcache, gdb_byte *out,
2739 const gdb_byte *in)
2740 {
2741 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2742 int length = TYPE_LENGTH (type);
2743 enum return_value_convention rvc =
2744 s390_return_value_convention (gdbarch, type);
2745 if (in)
2746 {
2747 switch (rvc)
2748 {
2749 case RETURN_VALUE_REGISTER_CONVENTION:
2750 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2751 {
2752 /* When we store a single-precision value in an FP register,
2753 it occupies the leftmost bits. */
2754 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2755 0, length, in);
2756 }
2757 else if (length <= word_size)
2758 {
2759 /* Integer arguments are always extended to word size. */
2760 if (TYPE_UNSIGNED (type))
2761 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
2762 extract_unsigned_integer (in, length));
2763 else
2764 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
2765 extract_signed_integer (in, length));
2766 }
2767 else if (length == 2*word_size)
2768 {
2769 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2770 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
2771 }
2772 else
2773 internal_error (__FILE__, __LINE__, _("invalid return type"));
2774 break;
2775
2776 case RETURN_VALUE_STRUCT_CONVENTION:
2777 error (_("Cannot set function return value."));
2778 break;
2779 }
2780 }
2781 else if (out)
2782 {
2783 switch (rvc)
2784 {
2785 case RETURN_VALUE_REGISTER_CONVENTION:
2786 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2787 {
2788 /* When we store a single-precision value in an FP register,
2789 it occupies the leftmost bits. */
2790 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2791 0, length, out);
2792 }
2793 else if (length <= word_size)
2794 {
2795 /* Integer arguments occupy the rightmost bits. */
2796 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2797 word_size - length, length, out);
2798 }
2799 else if (length == 2*word_size)
2800 {
2801 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2802 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
2803 }
2804 else
2805 internal_error (__FILE__, __LINE__, _("invalid return type"));
2806 break;
2807
2808 case RETURN_VALUE_STRUCT_CONVENTION:
2809 error (_("Function return value unknown."));
2810 break;
2811 }
2812 }
2813
2814 return rvc;
2815 }
2816
2817
2818 /* Breakpoints. */
2819
2820 static const gdb_byte *
2821 s390_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
2822 {
2823 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
2824
2825 *lenptr = sizeof (breakpoint);
2826 return breakpoint;
2827 }
2828
2829
2830 /* Address handling. */
2831
2832 static CORE_ADDR
2833 s390_addr_bits_remove (CORE_ADDR addr)
2834 {
2835 return addr & 0x7fffffff;
2836 }
2837
2838 static int
2839 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2840 {
2841 if (byte_size == 4)
2842 return TYPE_FLAG_ADDRESS_CLASS_1;
2843 else
2844 return 0;
2845 }
2846
2847 static const char *
2848 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2849 {
2850 if (type_flags & TYPE_FLAG_ADDRESS_CLASS_1)
2851 return "mode32";
2852 else
2853 return NULL;
2854 }
2855
2856 static int
2857 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name,
2858 int *type_flags_ptr)
2859 {
2860 if (strcmp (name, "mode32") == 0)
2861 {
2862 *type_flags_ptr = TYPE_FLAG_ADDRESS_CLASS_1;
2863 return 1;
2864 }
2865 else
2866 return 0;
2867 }
2868
2869
2870 /* Link map offsets. */
2871
2872 static struct link_map_offsets *
2873 s390_svr4_fetch_link_map_offsets (void)
2874 {
2875 static struct link_map_offsets lmo;
2876 static struct link_map_offsets *lmp = NULL;
2877
2878 if (lmp == NULL)
2879 {
2880 lmp = &lmo;
2881
2882 lmo.r_debug_size = 8;
2883
2884 lmo.r_map_offset = 4;
2885 lmo.r_map_size = 4;
2886
2887 lmo.link_map_size = 20;
2888
2889 lmo.l_addr_offset = 0;
2890 lmo.l_addr_size = 4;
2891
2892 lmo.l_name_offset = 4;
2893 lmo.l_name_size = 4;
2894
2895 lmo.l_next_offset = 12;
2896 lmo.l_next_size = 4;
2897
2898 lmo.l_prev_offset = 16;
2899 lmo.l_prev_size = 4;
2900 }
2901
2902 return lmp;
2903 }
2904
2905 static struct link_map_offsets *
2906 s390x_svr4_fetch_link_map_offsets (void)
2907 {
2908 static struct link_map_offsets lmo;
2909 static struct link_map_offsets *lmp = NULL;
2910
2911 if (lmp == NULL)
2912 {
2913 lmp = &lmo;
2914
2915 lmo.r_debug_size = 16; /* All we need. */
2916
2917 lmo.r_map_offset = 8;
2918 lmo.r_map_size = 8;
2919
2920 lmo.link_map_size = 40; /* All we need. */
2921
2922 lmo.l_addr_offset = 0;
2923 lmo.l_addr_size = 8;
2924
2925 lmo.l_name_offset = 8;
2926 lmo.l_name_size = 8;
2927
2928 lmo.l_next_offset = 24;
2929 lmo.l_next_size = 8;
2930
2931 lmo.l_prev_offset = 32;
2932 lmo.l_prev_size = 8;
2933 }
2934
2935 return lmp;
2936 }
2937
2938
2939 /* Set up gdbarch struct. */
2940
2941 static struct gdbarch *
2942 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2943 {
2944 struct gdbarch *gdbarch;
2945 struct gdbarch_tdep *tdep;
2946
2947 /* First see if there is already a gdbarch that can satisfy the request. */
2948 arches = gdbarch_list_lookup_by_info (arches, &info);
2949 if (arches != NULL)
2950 return arches->gdbarch;
2951
2952 /* None found: is the request for a s390 architecture? */
2953 if (info.bfd_arch_info->arch != bfd_arch_s390)
2954 return NULL; /* No; then it's not for us. */
2955
2956 /* Yes: create a new gdbarch for the specified machine type. */
2957 tdep = XCALLOC (1, struct gdbarch_tdep);
2958 gdbarch = gdbarch_alloc (&info, tdep);
2959
2960 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
2961 set_gdbarch_char_signed (gdbarch, 0);
2962
2963 /* Amount PC must be decremented by after a breakpoint. This is
2964 often the number of bytes returned by BREAKPOINT_FROM_PC but not
2965 always. */
2966 set_gdbarch_decr_pc_after_break (gdbarch, 2);
2967 /* Stack grows downward. */
2968 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2969 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
2970 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
2971 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
2972
2973 set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM);
2974 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
2975 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
2976 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
2977 set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS);
2978 set_gdbarch_register_name (gdbarch, s390_register_name);
2979 set_gdbarch_register_type (gdbarch, s390_register_type);
2980 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2981 set_gdbarch_dwarf_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2982 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2983 set_gdbarch_convert_register_p (gdbarch, s390_convert_register_p);
2984 set_gdbarch_register_to_value (gdbarch, s390_register_to_value);
2985 set_gdbarch_value_to_register (gdbarch, s390_value_to_register);
2986 set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p);
2987 set_gdbarch_regset_from_core_section (gdbarch,
2988 s390_regset_from_core_section);
2989
2990 /* Inferior function calls. */
2991 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
2992 set_gdbarch_unwind_dummy_id (gdbarch, s390_unwind_dummy_id);
2993 set_gdbarch_frame_align (gdbarch, s390_frame_align);
2994 set_gdbarch_return_value (gdbarch, s390_return_value);
2995
2996 /* Frame handling. */
2997 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
2998 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
2999 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
3000 frame_unwind_append_sniffer (gdbarch, s390_stub_frame_sniffer);
3001 frame_unwind_append_sniffer (gdbarch, s390_sigtramp_frame_sniffer);
3002 frame_unwind_append_sniffer (gdbarch, s390_frame_sniffer);
3003 frame_base_set_default (gdbarch, &s390_frame_base);
3004 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3005 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3006
3007 switch (info.bfd_arch_info->mach)
3008 {
3009 case bfd_mach_s390_31:
3010 tdep->abi = ABI_LINUX_S390;
3011
3012 tdep->gregset = &s390_gregset;
3013 tdep->sizeof_gregset = s390_sizeof_gregset;
3014 tdep->fpregset = &s390_fpregset;
3015 tdep->sizeof_fpregset = s390_sizeof_fpregset;
3016
3017 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
3018 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3019 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3020 set_solib_svr4_fetch_link_map_offsets (gdbarch,
3021 s390_svr4_fetch_link_map_offsets);
3022
3023 break;
3024 case bfd_mach_s390_64:
3025 tdep->abi = ABI_LINUX_ZSERIES;
3026
3027 tdep->gregset = &s390x_gregset;
3028 tdep->sizeof_gregset = s390x_sizeof_gregset;
3029 tdep->fpregset = &s390_fpregset;
3030 tdep->sizeof_fpregset = s390_sizeof_fpregset;
3031
3032 set_gdbarch_long_bit (gdbarch, 64);
3033 set_gdbarch_long_long_bit (gdbarch, 64);
3034 set_gdbarch_ptr_bit (gdbarch, 64);
3035 set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read);
3036 set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write);
3037 set_solib_svr4_fetch_link_map_offsets (gdbarch,
3038 s390x_svr4_fetch_link_map_offsets);
3039 set_gdbarch_address_class_type_flags (gdbarch,
3040 s390_address_class_type_flags);
3041 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3042 s390_address_class_type_flags_to_name);
3043 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3044 s390_address_class_name_to_type_flags);
3045 break;
3046 }
3047
3048 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3049
3050 /* Enable TLS support. */
3051 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3052 svr4_fetch_objfile_link_map);
3053
3054 return gdbarch;
3055 }
3056
3057
3058
3059 extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3060
3061 void
3062 _initialize_s390_tdep (void)
3063 {
3064
3065 /* Hook us into the gdbarch mechanism. */
3066 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
3067 }
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