include/elf/ChangeLog:
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011 Free Software Foundation, Inc.
5
6 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23
24 #include "defs.h"
25 #include "arch-utils.h"
26 #include "frame.h"
27 #include "inferior.h"
28 #include "symtab.h"
29 #include "target.h"
30 #include "gdbcore.h"
31 #include "gdbcmd.h"
32 #include "objfiles.h"
33 #include "floatformat.h"
34 #include "regcache.h"
35 #include "trad-frame.h"
36 #include "frame-base.h"
37 #include "frame-unwind.h"
38 #include "dwarf2-frame.h"
39 #include "reggroups.h"
40 #include "regset.h"
41 #include "value.h"
42 #include "gdb_assert.h"
43 #include "dis-asm.h"
44 #include "solib-svr4.h"
45 #include "prologue-value.h"
46 #include "linux-tdep.h"
47 #include "s390-tdep.h"
48
49 #include "features/s390-linux32.c"
50 #include "features/s390-linux64.c"
51 #include "features/s390x-linux64.c"
52
53
54 /* The tdep structure. */
55
56 struct gdbarch_tdep
57 {
58 /* ABI version. */
59 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
60
61 /* Pseudo register numbers. */
62 int gpr_full_regnum;
63 int pc_regnum;
64 int cc_regnum;
65
66 /* Core file register sets. */
67 const struct regset *gregset;
68 int sizeof_gregset;
69
70 const struct regset *fpregset;
71 int sizeof_fpregset;
72 };
73
74
75 /* ABI call-saved register information. */
76
77 static int
78 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
79 {
80 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
81
82 switch (tdep->abi)
83 {
84 case ABI_LINUX_S390:
85 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
86 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
87 || regnum == S390_A0_REGNUM)
88 return 1;
89
90 break;
91
92 case ABI_LINUX_ZSERIES:
93 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
94 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
95 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
96 return 1;
97
98 break;
99 }
100
101 return 0;
102 }
103
104
105 /* DWARF Register Mapping. */
106
107 static int s390_dwarf_regmap[] =
108 {
109 /* General Purpose Registers. */
110 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
111 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
112 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
113 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
114
115 /* Floating Point Registers. */
116 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
117 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
118 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
119 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
120
121 /* Control Registers (not mapped). */
122 -1, -1, -1, -1, -1, -1, -1, -1,
123 -1, -1, -1, -1, -1, -1, -1, -1,
124
125 /* Access Registers. */
126 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
127 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
128 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
129 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
130
131 /* Program Status Word. */
132 S390_PSWM_REGNUM,
133 S390_PSWA_REGNUM,
134
135 /* GPR Lower Half Access. */
136 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
137 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
138 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
139 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
140 };
141
142 /* Convert DWARF register number REG to the appropriate register
143 number used by GDB. */
144 static int
145 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
146 {
147 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
148
149 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
150 GPRs. Note that call frame information still refers to the 32-bit
151 lower halves, because s390_adjust_frame_regnum uses register numbers
152 66 .. 81 to access GPRs. */
153 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
154 return tdep->gpr_full_regnum + reg;
155
156 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
157 return s390_dwarf_regmap[reg];
158
159 warning (_("Unmapped DWARF Register #%d encountered."), reg);
160 return -1;
161 }
162
163 /* Translate a .eh_frame register to DWARF register, or adjust a
164 .debug_frame register. */
165 static int
166 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
167 {
168 /* See s390_dwarf_reg_to_regnum for comments. */
169 return (num >= 0 && num < 16)? num + 66 : num;
170 }
171
172
173 /* Pseudo registers. */
174
175 static const char *
176 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
177 {
178 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
179
180 if (regnum == tdep->pc_regnum)
181 return "pc";
182
183 if (regnum == tdep->cc_regnum)
184 return "cc";
185
186 if (tdep->gpr_full_regnum != -1
187 && regnum >= tdep->gpr_full_regnum
188 && regnum < tdep->gpr_full_regnum + 16)
189 {
190 static const char *full_name[] = {
191 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
192 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
193 };
194 return full_name[regnum - tdep->gpr_full_regnum];
195 }
196
197 internal_error (__FILE__, __LINE__, _("invalid regnum"));
198 }
199
200 static struct type *
201 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
202 {
203 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
204
205 if (regnum == tdep->pc_regnum)
206 return builtin_type (gdbarch)->builtin_func_ptr;
207
208 if (regnum == tdep->cc_regnum)
209 return builtin_type (gdbarch)->builtin_int;
210
211 if (tdep->gpr_full_regnum != -1
212 && regnum >= tdep->gpr_full_regnum
213 && regnum < tdep->gpr_full_regnum + 16)
214 return builtin_type (gdbarch)->builtin_uint64;
215
216 internal_error (__FILE__, __LINE__, _("invalid regnum"));
217 }
218
219 static enum register_status
220 s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
221 int regnum, gdb_byte *buf)
222 {
223 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
224 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
225 int regsize = register_size (gdbarch, regnum);
226 ULONGEST val;
227
228 if (regnum == tdep->pc_regnum)
229 {
230 enum register_status status;
231
232 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
233 if (status == REG_VALID)
234 {
235 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
236 val &= 0x7fffffff;
237 store_unsigned_integer (buf, regsize, byte_order, val);
238 }
239 return status;
240 }
241
242 if (regnum == tdep->cc_regnum)
243 {
244 enum register_status status;
245
246 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
247 if (status == REG_VALID)
248 {
249 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
250 val = (val >> 12) & 3;
251 else
252 val = (val >> 44) & 3;
253 store_unsigned_integer (buf, regsize, byte_order, val);
254 }
255 return status;
256 }
257
258 if (tdep->gpr_full_regnum != -1
259 && regnum >= tdep->gpr_full_regnum
260 && regnum < tdep->gpr_full_regnum + 16)
261 {
262 enum register_status status;
263 ULONGEST val_upper;
264
265 regnum -= tdep->gpr_full_regnum;
266
267 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
268 if (status == REG_VALID)
269 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
270 &val_upper);
271 if (status == REG_VALID)
272 {
273 val |= val_upper << 32;
274 store_unsigned_integer (buf, regsize, byte_order, val);
275 }
276 return status;
277 }
278
279 internal_error (__FILE__, __LINE__, _("invalid regnum"));
280 }
281
282 static void
283 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
284 int regnum, const gdb_byte *buf)
285 {
286 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
287 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
288 int regsize = register_size (gdbarch, regnum);
289 ULONGEST val, psw;
290
291 if (regnum == tdep->pc_regnum)
292 {
293 val = extract_unsigned_integer (buf, regsize, byte_order);
294 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
295 {
296 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
297 val = (psw & 0x80000000) | (val & 0x7fffffff);
298 }
299 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
300 return;
301 }
302
303 if (regnum == tdep->cc_regnum)
304 {
305 val = extract_unsigned_integer (buf, regsize, byte_order);
306 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
307 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
308 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
309 else
310 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
311 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
312 return;
313 }
314
315 if (tdep->gpr_full_regnum != -1
316 && regnum >= tdep->gpr_full_regnum
317 && regnum < tdep->gpr_full_regnum + 16)
318 {
319 regnum -= tdep->gpr_full_regnum;
320 val = extract_unsigned_integer (buf, regsize, byte_order);
321 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
322 val & 0xffffffff);
323 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
324 val >> 32);
325 return;
326 }
327
328 internal_error (__FILE__, __LINE__, _("invalid regnum"));
329 }
330
331 /* 'float' values are stored in the upper half of floating-point
332 registers, even though we are otherwise a big-endian platform. */
333
334 static struct value *
335 s390_value_from_register (struct type *type, int regnum,
336 struct frame_info *frame)
337 {
338 struct value *value = default_value_from_register (type, regnum, frame);
339 int len = TYPE_LENGTH (check_typedef (type));
340
341 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8)
342 set_value_offset (value, 0);
343
344 return value;
345 }
346
347 /* Register groups. */
348
349 static int
350 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
351 struct reggroup *group)
352 {
353 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
354
355 /* We usually save/restore the whole PSW, which includes PC and CC.
356 However, some older gdbservers may not support saving/restoring
357 the whole PSW yet, and will return an XML register description
358 excluding those from the save/restore register groups. In those
359 cases, we still need to explicitly save/restore PC and CC in order
360 to push or pop frames. Since this doesn't hurt anything if we
361 already save/restore the whole PSW (it's just redundant), we add
362 PC and CC at this point unconditionally. */
363 if (group == save_reggroup || group == restore_reggroup)
364 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
365
366 return default_register_reggroup_p (gdbarch, regnum, group);
367 }
368
369
370 /* Core file register sets. */
371
372 int s390_regmap_gregset[S390_NUM_REGS] =
373 {
374 /* Program Status Word. */
375 0x00, 0x04,
376 /* General Purpose Registers. */
377 0x08, 0x0c, 0x10, 0x14,
378 0x18, 0x1c, 0x20, 0x24,
379 0x28, 0x2c, 0x30, 0x34,
380 0x38, 0x3c, 0x40, 0x44,
381 /* Access Registers. */
382 0x48, 0x4c, 0x50, 0x54,
383 0x58, 0x5c, 0x60, 0x64,
384 0x68, 0x6c, 0x70, 0x74,
385 0x78, 0x7c, 0x80, 0x84,
386 /* Floating Point Control Word. */
387 -1,
388 /* Floating Point Registers. */
389 -1, -1, -1, -1, -1, -1, -1, -1,
390 -1, -1, -1, -1, -1, -1, -1, -1,
391 /* GPR Uppper Halves. */
392 -1, -1, -1, -1, -1, -1, -1, -1,
393 -1, -1, -1, -1, -1, -1, -1, -1,
394 };
395
396 int s390x_regmap_gregset[S390_NUM_REGS] =
397 {
398 /* Program Status Word. */
399 0x00, 0x08,
400 /* General Purpose Registers. */
401 0x10, 0x18, 0x20, 0x28,
402 0x30, 0x38, 0x40, 0x48,
403 0x50, 0x58, 0x60, 0x68,
404 0x70, 0x78, 0x80, 0x88,
405 /* Access Registers. */
406 0x90, 0x94, 0x98, 0x9c,
407 0xa0, 0xa4, 0xa8, 0xac,
408 0xb0, 0xb4, 0xb8, 0xbc,
409 0xc0, 0xc4, 0xc8, 0xcc,
410 /* Floating Point Control Word. */
411 -1,
412 /* Floating Point Registers. */
413 -1, -1, -1, -1, -1, -1, -1, -1,
414 -1, -1, -1, -1, -1, -1, -1, -1,
415 /* GPR Uppper Halves. */
416 0x10, 0x18, 0x20, 0x28,
417 0x30, 0x38, 0x40, 0x48,
418 0x50, 0x58, 0x60, 0x68,
419 0x70, 0x78, 0x80, 0x88,
420 };
421
422 int s390_regmap_fpregset[S390_NUM_REGS] =
423 {
424 /* Program Status Word. */
425 -1, -1,
426 /* General Purpose Registers. */
427 -1, -1, -1, -1, -1, -1, -1, -1,
428 -1, -1, -1, -1, -1, -1, -1, -1,
429 /* Access Registers. */
430 -1, -1, -1, -1, -1, -1, -1, -1,
431 -1, -1, -1, -1, -1, -1, -1, -1,
432 /* Floating Point Control Word. */
433 0x00,
434 /* Floating Point Registers. */
435 0x08, 0x10, 0x18, 0x20,
436 0x28, 0x30, 0x38, 0x40,
437 0x48, 0x50, 0x58, 0x60,
438 0x68, 0x70, 0x78, 0x80,
439 /* GPR Uppper Halves. */
440 -1, -1, -1, -1, -1, -1, -1, -1,
441 -1, -1, -1, -1, -1, -1, -1, -1,
442 };
443
444 int s390_regmap_upper[S390_NUM_REGS] =
445 {
446 /* Program Status Word. */
447 -1, -1,
448 /* General Purpose Registers. */
449 -1, -1, -1, -1, -1, -1, -1, -1,
450 -1, -1, -1, -1, -1, -1, -1, -1,
451 /* Access Registers. */
452 -1, -1, -1, -1, -1, -1, -1, -1,
453 -1, -1, -1, -1, -1, -1, -1, -1,
454 /* Floating Point Control Word. */
455 -1,
456 /* Floating Point Registers. */
457 -1, -1, -1, -1, -1, -1, -1, -1,
458 -1, -1, -1, -1, -1, -1, -1, -1,
459 /* GPR Uppper Halves. */
460 0x00, 0x04, 0x08, 0x0c,
461 0x10, 0x14, 0x18, 0x1c,
462 0x20, 0x24, 0x28, 0x2c,
463 0x30, 0x34, 0x38, 0x3c,
464 };
465
466 /* Supply register REGNUM from the register set REGSET to register cache
467 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
468 static void
469 s390_supply_regset (const struct regset *regset, struct regcache *regcache,
470 int regnum, const void *regs, size_t len)
471 {
472 const int *offset = regset->descr;
473 int i;
474
475 for (i = 0; i < S390_NUM_REGS; i++)
476 {
477 if ((regnum == i || regnum == -1) && offset[i] != -1)
478 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
479 }
480 }
481
482 /* Collect register REGNUM from the register cache REGCACHE and store
483 it in the buffer specified by REGS and LEN as described by the
484 general-purpose register set REGSET. If REGNUM is -1, do this for
485 all registers in REGSET. */
486 static void
487 s390_collect_regset (const struct regset *regset,
488 const struct regcache *regcache,
489 int regnum, void *regs, size_t len)
490 {
491 const int *offset = regset->descr;
492 int i;
493
494 for (i = 0; i < S390_NUM_REGS; i++)
495 {
496 if ((regnum == i || regnum == -1) && offset[i] != -1)
497 regcache_raw_collect (regcache, i, (char *)regs + offset[i]);
498 }
499 }
500
501 static const struct regset s390_gregset = {
502 s390_regmap_gregset,
503 s390_supply_regset,
504 s390_collect_regset
505 };
506
507 static const struct regset s390x_gregset = {
508 s390x_regmap_gregset,
509 s390_supply_regset,
510 s390_collect_regset
511 };
512
513 static const struct regset s390_fpregset = {
514 s390_regmap_fpregset,
515 s390_supply_regset,
516 s390_collect_regset
517 };
518
519 static const struct regset s390_upper_regset = {
520 s390_regmap_upper,
521 s390_supply_regset,
522 s390_collect_regset
523 };
524
525 static struct core_regset_section s390_upper_regset_sections[] =
526 {
527 { ".reg", s390_sizeof_gregset, "general-purpose" },
528 { ".reg2", s390_sizeof_fpregset, "floating-point" },
529 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
530 { NULL, 0}
531 };
532
533 /* Return the appropriate register set for the core section identified
534 by SECT_NAME and SECT_SIZE. */
535 static const struct regset *
536 s390_regset_from_core_section (struct gdbarch *gdbarch,
537 const char *sect_name, size_t sect_size)
538 {
539 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
540
541 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
542 return tdep->gregset;
543
544 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
545 return tdep->fpregset;
546
547 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
548 return &s390_upper_regset;
549
550 return NULL;
551 }
552
553 static const struct target_desc *
554 s390_core_read_description (struct gdbarch *gdbarch,
555 struct target_ops *target, bfd *abfd)
556 {
557 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
558 asection *section = bfd_get_section_by_name (abfd, ".reg");
559 if (!section)
560 return NULL;
561
562 switch (bfd_section_size (abfd, section))
563 {
564 case s390_sizeof_gregset:
565 return high_gprs? tdesc_s390_linux64 : tdesc_s390_linux32;
566
567 case s390x_sizeof_gregset:
568 return tdesc_s390x_linux64;
569
570 default:
571 return NULL;
572 }
573 }
574
575
576 /* Decoding S/390 instructions. */
577
578 /* Named opcode values for the S/390 instructions we recognize. Some
579 instructions have their opcode split across two fields; those are the
580 op1_* and op2_* enums. */
581 enum
582 {
583 op1_lhi = 0xa7, op2_lhi = 0x08,
584 op1_lghi = 0xa7, op2_lghi = 0x09,
585 op1_lgfi = 0xc0, op2_lgfi = 0x01,
586 op_lr = 0x18,
587 op_lgr = 0xb904,
588 op_l = 0x58,
589 op1_ly = 0xe3, op2_ly = 0x58,
590 op1_lg = 0xe3, op2_lg = 0x04,
591 op_lm = 0x98,
592 op1_lmy = 0xeb, op2_lmy = 0x98,
593 op1_lmg = 0xeb, op2_lmg = 0x04,
594 op_st = 0x50,
595 op1_sty = 0xe3, op2_sty = 0x50,
596 op1_stg = 0xe3, op2_stg = 0x24,
597 op_std = 0x60,
598 op_stm = 0x90,
599 op1_stmy = 0xeb, op2_stmy = 0x90,
600 op1_stmg = 0xeb, op2_stmg = 0x24,
601 op1_aghi = 0xa7, op2_aghi = 0x0b,
602 op1_ahi = 0xa7, op2_ahi = 0x0a,
603 op1_agfi = 0xc2, op2_agfi = 0x08,
604 op1_afi = 0xc2, op2_afi = 0x09,
605 op1_algfi= 0xc2, op2_algfi= 0x0a,
606 op1_alfi = 0xc2, op2_alfi = 0x0b,
607 op_ar = 0x1a,
608 op_agr = 0xb908,
609 op_a = 0x5a,
610 op1_ay = 0xe3, op2_ay = 0x5a,
611 op1_ag = 0xe3, op2_ag = 0x08,
612 op1_slgfi= 0xc2, op2_slgfi= 0x04,
613 op1_slfi = 0xc2, op2_slfi = 0x05,
614 op_sr = 0x1b,
615 op_sgr = 0xb909,
616 op_s = 0x5b,
617 op1_sy = 0xe3, op2_sy = 0x5b,
618 op1_sg = 0xe3, op2_sg = 0x09,
619 op_nr = 0x14,
620 op_ngr = 0xb980,
621 op_la = 0x41,
622 op1_lay = 0xe3, op2_lay = 0x71,
623 op1_larl = 0xc0, op2_larl = 0x00,
624 op_basr = 0x0d,
625 op_bas = 0x4d,
626 op_bcr = 0x07,
627 op_bc = 0x0d,
628 op_bctr = 0x06,
629 op_bctgr = 0xb946,
630 op_bct = 0x46,
631 op1_bctg = 0xe3, op2_bctg = 0x46,
632 op_bxh = 0x86,
633 op1_bxhg = 0xeb, op2_bxhg = 0x44,
634 op_bxle = 0x87,
635 op1_bxleg= 0xeb, op2_bxleg= 0x45,
636 op1_bras = 0xa7, op2_bras = 0x05,
637 op1_brasl= 0xc0, op2_brasl= 0x05,
638 op1_brc = 0xa7, op2_brc = 0x04,
639 op1_brcl = 0xc0, op2_brcl = 0x04,
640 op1_brct = 0xa7, op2_brct = 0x06,
641 op1_brctg= 0xa7, op2_brctg= 0x07,
642 op_brxh = 0x84,
643 op1_brxhg= 0xec, op2_brxhg= 0x44,
644 op_brxle = 0x85,
645 op1_brxlg= 0xec, op2_brxlg= 0x45,
646 };
647
648
649 /* Read a single instruction from address AT. */
650
651 #define S390_MAX_INSTR_SIZE 6
652 static int
653 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
654 {
655 static int s390_instrlen[] = { 2, 4, 4, 6 };
656 int instrlen;
657
658 if (target_read_memory (at, &instr[0], 2))
659 return -1;
660 instrlen = s390_instrlen[instr[0] >> 6];
661 if (instrlen > 2)
662 {
663 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
664 return -1;
665 }
666 return instrlen;
667 }
668
669
670 /* The functions below are for recognizing and decoding S/390
671 instructions of various formats. Each of them checks whether INSN
672 is an instruction of the given format, with the specified opcodes.
673 If it is, it sets the remaining arguments to the values of the
674 instruction's fields, and returns a non-zero value; otherwise, it
675 returns zero.
676
677 These functions' arguments appear in the order they appear in the
678 instruction, not in the machine-language form. So, opcodes always
679 come first, even though they're sometimes scattered around the
680 instructions. And displacements appear before base and extension
681 registers, as they do in the assembly syntax, not at the end, as
682 they do in the machine language. */
683 static int
684 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
685 {
686 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
687 {
688 *r1 = (insn[1] >> 4) & 0xf;
689 /* i2 is a 16-bit signed quantity. */
690 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
691 return 1;
692 }
693 else
694 return 0;
695 }
696
697
698 static int
699 is_ril (bfd_byte *insn, int op1, int op2,
700 unsigned int *r1, int *i2)
701 {
702 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
703 {
704 *r1 = (insn[1] >> 4) & 0xf;
705 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
706 no sign extension is necessary, but we don't want to assume
707 that. */
708 *i2 = (((insn[2] << 24)
709 | (insn[3] << 16)
710 | (insn[4] << 8)
711 | (insn[5])) ^ 0x80000000) - 0x80000000;
712 return 1;
713 }
714 else
715 return 0;
716 }
717
718
719 static int
720 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
721 {
722 if (insn[0] == op)
723 {
724 *r1 = (insn[1] >> 4) & 0xf;
725 *r2 = insn[1] & 0xf;
726 return 1;
727 }
728 else
729 return 0;
730 }
731
732
733 static int
734 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
735 {
736 if (((insn[0] << 8) | insn[1]) == op)
737 {
738 /* Yes, insn[3]. insn[2] is unused in RRE format. */
739 *r1 = (insn[3] >> 4) & 0xf;
740 *r2 = insn[3] & 0xf;
741 return 1;
742 }
743 else
744 return 0;
745 }
746
747
748 static int
749 is_rs (bfd_byte *insn, int op,
750 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
751 {
752 if (insn[0] == op)
753 {
754 *r1 = (insn[1] >> 4) & 0xf;
755 *r3 = insn[1] & 0xf;
756 *b2 = (insn[2] >> 4) & 0xf;
757 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
758 return 1;
759 }
760 else
761 return 0;
762 }
763
764
765 static int
766 is_rsy (bfd_byte *insn, int op1, int op2,
767 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
768 {
769 if (insn[0] == op1
770 && insn[5] == op2)
771 {
772 *r1 = (insn[1] >> 4) & 0xf;
773 *r3 = insn[1] & 0xf;
774 *b2 = (insn[2] >> 4) & 0xf;
775 /* The 'long displacement' is a 20-bit signed integer. */
776 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
777 ^ 0x80000) - 0x80000;
778 return 1;
779 }
780 else
781 return 0;
782 }
783
784
785 static int
786 is_rsi (bfd_byte *insn, int op,
787 unsigned int *r1, unsigned int *r3, int *i2)
788 {
789 if (insn[0] == op)
790 {
791 *r1 = (insn[1] >> 4) & 0xf;
792 *r3 = insn[1] & 0xf;
793 /* i2 is a 16-bit signed quantity. */
794 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
795 return 1;
796 }
797 else
798 return 0;
799 }
800
801
802 static int
803 is_rie (bfd_byte *insn, int op1, int op2,
804 unsigned int *r1, unsigned int *r3, int *i2)
805 {
806 if (insn[0] == op1
807 && insn[5] == op2)
808 {
809 *r1 = (insn[1] >> 4) & 0xf;
810 *r3 = insn[1] & 0xf;
811 /* i2 is a 16-bit signed quantity. */
812 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
813 return 1;
814 }
815 else
816 return 0;
817 }
818
819
820 static int
821 is_rx (bfd_byte *insn, int op,
822 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
823 {
824 if (insn[0] == op)
825 {
826 *r1 = (insn[1] >> 4) & 0xf;
827 *x2 = insn[1] & 0xf;
828 *b2 = (insn[2] >> 4) & 0xf;
829 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
830 return 1;
831 }
832 else
833 return 0;
834 }
835
836
837 static int
838 is_rxy (bfd_byte *insn, int op1, int op2,
839 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
840 {
841 if (insn[0] == op1
842 && insn[5] == op2)
843 {
844 *r1 = (insn[1] >> 4) & 0xf;
845 *x2 = insn[1] & 0xf;
846 *b2 = (insn[2] >> 4) & 0xf;
847 /* The 'long displacement' is a 20-bit signed integer. */
848 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
849 ^ 0x80000) - 0x80000;
850 return 1;
851 }
852 else
853 return 0;
854 }
855
856
857 /* Prologue analysis. */
858
859 #define S390_NUM_GPRS 16
860 #define S390_NUM_FPRS 16
861
862 struct s390_prologue_data {
863
864 /* The stack. */
865 struct pv_area *stack;
866
867 /* The size and byte-order of a GPR or FPR. */
868 int gpr_size;
869 int fpr_size;
870 enum bfd_endian byte_order;
871
872 /* The general-purpose registers. */
873 pv_t gpr[S390_NUM_GPRS];
874
875 /* The floating-point registers. */
876 pv_t fpr[S390_NUM_FPRS];
877
878 /* The offset relative to the CFA where the incoming GPR N was saved
879 by the function prologue. 0 if not saved or unknown. */
880 int gpr_slot[S390_NUM_GPRS];
881
882 /* Likewise for FPRs. */
883 int fpr_slot[S390_NUM_FPRS];
884
885 /* Nonzero if the backchain was saved. This is assumed to be the
886 case when the incoming SP is saved at the current SP location. */
887 int back_chain_saved_p;
888 };
889
890 /* Return the effective address for an X-style instruction, like:
891
892 L R1, D2(X2, B2)
893
894 Here, X2 and B2 are registers, and D2 is a signed 20-bit
895 constant; the effective address is the sum of all three. If either
896 X2 or B2 are zero, then it doesn't contribute to the sum --- this
897 means that r0 can't be used as either X2 or B2. */
898 static pv_t
899 s390_addr (struct s390_prologue_data *data,
900 int d2, unsigned int x2, unsigned int b2)
901 {
902 pv_t result;
903
904 result = pv_constant (d2);
905 if (x2)
906 result = pv_add (result, data->gpr[x2]);
907 if (b2)
908 result = pv_add (result, data->gpr[b2]);
909
910 return result;
911 }
912
913 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
914 static void
915 s390_store (struct s390_prologue_data *data,
916 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
917 pv_t value)
918 {
919 pv_t addr = s390_addr (data, d2, x2, b2);
920 pv_t offset;
921
922 /* Check whether we are storing the backchain. */
923 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
924
925 if (pv_is_constant (offset) && offset.k == 0)
926 if (size == data->gpr_size
927 && pv_is_register_k (value, S390_SP_REGNUM, 0))
928 {
929 data->back_chain_saved_p = 1;
930 return;
931 }
932
933
934 /* Check whether we are storing a register into the stack. */
935 if (!pv_area_store_would_trash (data->stack, addr))
936 pv_area_store (data->stack, addr, size, value);
937
938
939 /* Note: If this is some store we cannot identify, you might think we
940 should forget our cached values, as any of those might have been hit.
941
942 However, we make the assumption that the register save areas are only
943 ever stored to once in any given function, and we do recognize these
944 stores. Thus every store we cannot recognize does not hit our data. */
945 }
946
947 /* Do a SIZE-byte load from D2(X2,B2). */
948 static pv_t
949 s390_load (struct s390_prologue_data *data,
950 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
951
952 {
953 pv_t addr = s390_addr (data, d2, x2, b2);
954 pv_t offset;
955
956 /* If it's a load from an in-line constant pool, then we can
957 simulate that, under the assumption that the code isn't
958 going to change between the time the processor actually
959 executed it creating the current frame, and the time when
960 we're analyzing the code to unwind past that frame. */
961 if (pv_is_constant (addr))
962 {
963 struct target_section *secp;
964 secp = target_section_by_addr (&current_target, addr.k);
965 if (secp != NULL
966 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
967 & SEC_READONLY))
968 return pv_constant (read_memory_integer (addr.k, size,
969 data->byte_order));
970 }
971
972 /* Check whether we are accessing one of our save slots. */
973 return pv_area_fetch (data->stack, addr, size);
974 }
975
976 /* Function for finding saved registers in a 'struct pv_area'; we pass
977 this to pv_area_scan.
978
979 If VALUE is a saved register, ADDR says it was saved at a constant
980 offset from the frame base, and SIZE indicates that the whole
981 register was saved, record its offset in the reg_offset table in
982 PROLOGUE_UNTYPED. */
983 static void
984 s390_check_for_saved (void *data_untyped, pv_t addr,
985 CORE_ADDR size, pv_t value)
986 {
987 struct s390_prologue_data *data = data_untyped;
988 int i, offset;
989
990 if (!pv_is_register (addr, S390_SP_REGNUM))
991 return;
992
993 offset = 16 * data->gpr_size + 32 - addr.k;
994
995 /* If we are storing the original value of a register, we want to
996 record the CFA offset. If the same register is stored multiple
997 times, the stack slot with the highest address counts. */
998
999 for (i = 0; i < S390_NUM_GPRS; i++)
1000 if (size == data->gpr_size
1001 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1002 if (data->gpr_slot[i] == 0
1003 || data->gpr_slot[i] > offset)
1004 {
1005 data->gpr_slot[i] = offset;
1006 return;
1007 }
1008
1009 for (i = 0; i < S390_NUM_FPRS; i++)
1010 if (size == data->fpr_size
1011 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1012 if (data->fpr_slot[i] == 0
1013 || data->fpr_slot[i] > offset)
1014 {
1015 data->fpr_slot[i] = offset;
1016 return;
1017 }
1018 }
1019
1020 /* Analyze the prologue of the function starting at START_PC,
1021 continuing at most until CURRENT_PC. Initialize DATA to
1022 hold all information we find out about the state of the registers
1023 and stack slots. Return the address of the instruction after
1024 the last one that changed the SP, FP, or back chain; or zero
1025 on error. */
1026 static CORE_ADDR
1027 s390_analyze_prologue (struct gdbarch *gdbarch,
1028 CORE_ADDR start_pc,
1029 CORE_ADDR current_pc,
1030 struct s390_prologue_data *data)
1031 {
1032 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1033
1034 /* Our return value:
1035 The address of the instruction after the last one that changed
1036 the SP, FP, or back chain; zero if we got an error trying to
1037 read memory. */
1038 CORE_ADDR result = start_pc;
1039
1040 /* The current PC for our abstract interpretation. */
1041 CORE_ADDR pc;
1042
1043 /* The address of the next instruction after that. */
1044 CORE_ADDR next_pc;
1045
1046 /* Set up everything's initial value. */
1047 {
1048 int i;
1049
1050 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
1051
1052 /* For the purpose of prologue tracking, we consider the GPR size to
1053 be equal to the ABI word size, even if it is actually larger
1054 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1055 data->gpr_size = word_size;
1056 data->fpr_size = 8;
1057 data->byte_order = gdbarch_byte_order (gdbarch);
1058
1059 for (i = 0; i < S390_NUM_GPRS; i++)
1060 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
1061
1062 for (i = 0; i < S390_NUM_FPRS; i++)
1063 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
1064
1065 for (i = 0; i < S390_NUM_GPRS; i++)
1066 data->gpr_slot[i] = 0;
1067
1068 for (i = 0; i < S390_NUM_FPRS; i++)
1069 data->fpr_slot[i] = 0;
1070
1071 data->back_chain_saved_p = 0;
1072 }
1073
1074 /* Start interpreting instructions, until we hit the frame's
1075 current PC or the first branch instruction. */
1076 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
1077 {
1078 bfd_byte insn[S390_MAX_INSTR_SIZE];
1079 int insn_len = s390_readinstruction (insn, pc);
1080
1081 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1082 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1083 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1084
1085 /* Fields for various kinds of instructions. */
1086 unsigned int b2, r1, r2, x2, r3;
1087 int i2, d2;
1088
1089 /* The values of SP and FP before this instruction,
1090 for detecting instructions that change them. */
1091 pv_t pre_insn_sp, pre_insn_fp;
1092 /* Likewise for the flag whether the back chain was saved. */
1093 int pre_insn_back_chain_saved_p;
1094
1095 /* If we got an error trying to read the instruction, report it. */
1096 if (insn_len < 0)
1097 {
1098 result = 0;
1099 break;
1100 }
1101
1102 next_pc = pc + insn_len;
1103
1104 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1105 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1106 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
1107
1108
1109 /* LHI r1, i2 --- load halfword immediate. */
1110 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1111 /* LGFI r1, i2 --- load fullword immediate. */
1112 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1113 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1114 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1115 data->gpr[r1] = pv_constant (i2);
1116
1117 /* LR r1, r2 --- load from register. */
1118 /* LGR r1, r2 --- load from register (64-bit version). */
1119 else if (is_rr (insn32, op_lr, &r1, &r2)
1120 || is_rre (insn64, op_lgr, &r1, &r2))
1121 data->gpr[r1] = data->gpr[r2];
1122
1123 /* L r1, d2(x2, b2) --- load. */
1124 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1125 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1126 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1127 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1128 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1129 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1130
1131 /* ST r1, d2(x2, b2) --- store. */
1132 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1133 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1134 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1135 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1136 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1137 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1138
1139 /* STD r1, d2(x2,b2) --- store floating-point register. */
1140 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
1141 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1142
1143 /* STM r1, r3, d2(b2) --- store multiple. */
1144 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1145 version). */
1146 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1147 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1148 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1149 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
1150 {
1151 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1152 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
1153 }
1154
1155 /* AHI r1, i2 --- add halfword immediate. */
1156 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1157 /* AFI r1, i2 --- add fullword immediate. */
1158 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1159 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1160 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1161 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1162 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1163 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1164
1165 /* ALFI r1, i2 --- add logical immediate. */
1166 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1167 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1168 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1169 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1170 (CORE_ADDR)i2 & 0xffffffff);
1171
1172 /* AR r1, r2 -- add register. */
1173 /* AGR r1, r2 -- add register (64-bit version). */
1174 else if (is_rr (insn32, op_ar, &r1, &r2)
1175 || is_rre (insn64, op_agr, &r1, &r2))
1176 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1177
1178 /* A r1, d2(x2, b2) -- add. */
1179 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1180 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1181 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1182 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1183 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1184 data->gpr[r1] = pv_add (data->gpr[r1],
1185 s390_load (data, d2, x2, b2, data->gpr_size));
1186
1187 /* SLFI r1, i2 --- subtract logical immediate. */
1188 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1189 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1190 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1191 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1192 -((CORE_ADDR)i2 & 0xffffffff));
1193
1194 /* SR r1, r2 -- subtract register. */
1195 /* SGR r1, r2 -- subtract register (64-bit version). */
1196 else if (is_rr (insn32, op_sr, &r1, &r2)
1197 || is_rre (insn64, op_sgr, &r1, &r2))
1198 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1199
1200 /* S r1, d2(x2, b2) -- subtract. */
1201 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1202 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1203 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1204 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1205 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1206 data->gpr[r1] = pv_subtract (data->gpr[r1],
1207 s390_load (data, d2, x2, b2, data->gpr_size));
1208
1209 /* LA r1, d2(x2, b2) --- load address. */
1210 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1211 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1212 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1213 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1214
1215 /* LARL r1, i2 --- load address relative long. */
1216 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1217 data->gpr[r1] = pv_constant (pc + i2 * 2);
1218
1219 /* BASR r1, 0 --- branch and save.
1220 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1221 else if (is_rr (insn, op_basr, &r1, &r2)
1222 && r2 == 0)
1223 data->gpr[r1] = pv_constant (next_pc);
1224
1225 /* BRAS r1, i2 --- branch relative and save. */
1226 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1227 {
1228 data->gpr[r1] = pv_constant (next_pc);
1229 next_pc = pc + i2 * 2;
1230
1231 /* We'd better not interpret any backward branches. We'll
1232 never terminate. */
1233 if (next_pc <= pc)
1234 break;
1235 }
1236
1237 /* Terminate search when hitting any other branch instruction. */
1238 else if (is_rr (insn, op_basr, &r1, &r2)
1239 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1240 || is_rr (insn, op_bcr, &r1, &r2)
1241 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1242 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1243 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1244 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1245 break;
1246
1247 else
1248 /* An instruction we don't know how to simulate. The only
1249 safe thing to do would be to set every value we're tracking
1250 to 'unknown'. Instead, we'll be optimistic: we assume that
1251 we *can* interpret every instruction that the compiler uses
1252 to manipulate any of the data we're interested in here --
1253 then we can just ignore anything else. */
1254 ;
1255
1256 /* Record the address after the last instruction that changed
1257 the FP, SP, or backlink. Ignore instructions that changed
1258 them back to their original values --- those are probably
1259 restore instructions. (The back chain is never restored,
1260 just popped.) */
1261 {
1262 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1263 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1264
1265 if ((! pv_is_identical (pre_insn_sp, sp)
1266 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1267 && sp.kind != pvk_unknown)
1268 || (! pv_is_identical (pre_insn_fp, fp)
1269 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1270 && fp.kind != pvk_unknown)
1271 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1272 result = next_pc;
1273 }
1274 }
1275
1276 /* Record where all the registers were saved. */
1277 pv_area_scan (data->stack, s390_check_for_saved, data);
1278
1279 free_pv_area (data->stack);
1280 data->stack = NULL;
1281
1282 return result;
1283 }
1284
1285 /* Advance PC across any function entry prologue instructions to reach
1286 some "real" code. */
1287 static CORE_ADDR
1288 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1289 {
1290 struct s390_prologue_data data;
1291 CORE_ADDR skip_pc;
1292 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1293 return skip_pc ? skip_pc : pc;
1294 }
1295
1296 /* Return true if we are in the functin's epilogue, i.e. after the
1297 instruction that destroyed the function's stack frame. */
1298 static int
1299 s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1300 {
1301 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1302
1303 /* In frameless functions, there's not frame to destroy and thus
1304 we don't care about the epilogue.
1305
1306 In functions with frame, the epilogue sequence is a pair of
1307 a LM-type instruction that restores (amongst others) the
1308 return register %r14 and the stack pointer %r15, followed
1309 by a branch 'br %r14' --or equivalent-- that effects the
1310 actual return.
1311
1312 In that situation, this function needs to return 'true' in
1313 exactly one case: when pc points to that branch instruction.
1314
1315 Thus we try to disassemble the one instructions immediately
1316 preceding pc and check whether it is an LM-type instruction
1317 modifying the stack pointer.
1318
1319 Note that disassembling backwards is not reliable, so there
1320 is a slight chance of false positives here ... */
1321
1322 bfd_byte insn[6];
1323 unsigned int r1, r3, b2;
1324 int d2;
1325
1326 if (word_size == 4
1327 && !target_read_memory (pc - 4, insn, 4)
1328 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1329 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1330 return 1;
1331
1332 if (word_size == 4
1333 && !target_read_memory (pc - 6, insn, 6)
1334 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1335 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1336 return 1;
1337
1338 if (word_size == 8
1339 && !target_read_memory (pc - 6, insn, 6)
1340 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
1341 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1342 return 1;
1343
1344 return 0;
1345 }
1346
1347 /* Displaced stepping. */
1348
1349 /* Fix up the state of registers and memory after having single-stepped
1350 a displaced instruction. */
1351 static void
1352 s390_displaced_step_fixup (struct gdbarch *gdbarch,
1353 struct displaced_step_closure *closure,
1354 CORE_ADDR from, CORE_ADDR to,
1355 struct regcache *regs)
1356 {
1357 /* Since we use simple_displaced_step_copy_insn, our closure is a
1358 copy of the instruction. */
1359 gdb_byte *insn = (gdb_byte *) closure;
1360 static int s390_instrlen[] = { 2, 4, 4, 6 };
1361 int insnlen = s390_instrlen[insn[0] >> 6];
1362
1363 /* Fields for various kinds of instructions. */
1364 unsigned int b2, r1, r2, x2, r3;
1365 int i2, d2;
1366
1367 /* Get current PC and addressing mode bit. */
1368 CORE_ADDR pc = regcache_read_pc (regs);
1369 ULONGEST amode = 0;
1370
1371 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1372 {
1373 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1374 amode &= 0x80000000;
1375 }
1376
1377 if (debug_displaced)
1378 fprintf_unfiltered (gdb_stdlog,
1379 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1380 paddress (gdbarch, from), paddress (gdbarch, to),
1381 paddress (gdbarch, pc), insnlen, (int) amode);
1382
1383 /* Handle absolute branch and save instructions. */
1384 if (is_rr (insn, op_basr, &r1, &r2)
1385 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1386 {
1387 /* Recompute saved return address in R1. */
1388 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1389 amode | (from + insnlen));
1390 }
1391
1392 /* Handle absolute branch instructions. */
1393 else if (is_rr (insn, op_bcr, &r1, &r2)
1394 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1395 || is_rr (insn, op_bctr, &r1, &r2)
1396 || is_rre (insn, op_bctgr, &r1, &r2)
1397 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1398 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1399 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1400 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1401 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1402 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1403 {
1404 /* Update PC iff branch was *not* taken. */
1405 if (pc == to + insnlen)
1406 regcache_write_pc (regs, from + insnlen);
1407 }
1408
1409 /* Handle PC-relative branch and save instructions. */
1410 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1411 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1412 {
1413 /* Update PC. */
1414 regcache_write_pc (regs, pc - to + from);
1415 /* Recompute saved return address in R1. */
1416 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1417 amode | (from + insnlen));
1418 }
1419
1420 /* Handle PC-relative branch instructions. */
1421 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1422 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1423 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1424 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1425 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1426 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1427 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1428 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1429 {
1430 /* Update PC. */
1431 regcache_write_pc (regs, pc - to + from);
1432 }
1433
1434 /* Handle LOAD ADDRESS RELATIVE LONG. */
1435 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1436 {
1437 /* Update PC. */
1438 regcache_write_pc (regs, from + insnlen);
1439 /* Recompute output address in R1. */
1440 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1441 amode | (from + i2 * 2));
1442 }
1443
1444 /* If we executed a breakpoint instruction, point PC right back at it. */
1445 else if (insn[0] == 0x0 && insn[1] == 0x1)
1446 regcache_write_pc (regs, from);
1447
1448 /* For any other insn, PC points right after the original instruction. */
1449 else
1450 regcache_write_pc (regs, from + insnlen);
1451
1452 if (debug_displaced)
1453 fprintf_unfiltered (gdb_stdlog,
1454 "displaced: (s390) pc is now %s\n",
1455 paddress (gdbarch, regcache_read_pc (regs)));
1456 }
1457
1458
1459 /* Helper routine to unwind pseudo registers. */
1460
1461 static struct value *
1462 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1463 {
1464 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1465 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1466 struct type *type = register_type (gdbarch, regnum);
1467
1468 /* Unwind PC via PSW address. */
1469 if (regnum == tdep->pc_regnum)
1470 {
1471 struct value *val;
1472
1473 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1474 if (!value_optimized_out (val))
1475 {
1476 LONGEST pswa = value_as_long (val);
1477
1478 if (TYPE_LENGTH (type) == 4)
1479 return value_from_pointer (type, pswa & 0x7fffffff);
1480 else
1481 return value_from_pointer (type, pswa);
1482 }
1483 }
1484
1485 /* Unwind CC via PSW mask. */
1486 if (regnum == tdep->cc_regnum)
1487 {
1488 struct value *val;
1489
1490 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1491 if (!value_optimized_out (val))
1492 {
1493 LONGEST pswm = value_as_long (val);
1494
1495 if (TYPE_LENGTH (type) == 4)
1496 return value_from_longest (type, (pswm >> 12) & 3);
1497 else
1498 return value_from_longest (type, (pswm >> 44) & 3);
1499 }
1500 }
1501
1502 /* Unwind full GPRs to show at least the lower halves (as the
1503 upper halves are undefined). */
1504 if (tdep->gpr_full_regnum != -1
1505 && regnum >= tdep->gpr_full_regnum
1506 && regnum < tdep->gpr_full_regnum + 16)
1507 {
1508 int reg = regnum - tdep->gpr_full_regnum;
1509 struct value *val;
1510
1511 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1512 if (!value_optimized_out (val))
1513 return value_cast (type, val);
1514 }
1515
1516 return allocate_optimized_out_value (type);
1517 }
1518
1519 static struct value *
1520 s390_trad_frame_prev_register (struct frame_info *this_frame,
1521 struct trad_frame_saved_reg saved_regs[],
1522 int regnum)
1523 {
1524 if (regnum < S390_NUM_REGS)
1525 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1526 else
1527 return s390_unwind_pseudo_register (this_frame, regnum);
1528 }
1529
1530
1531 /* Normal stack frames. */
1532
1533 struct s390_unwind_cache {
1534
1535 CORE_ADDR func;
1536 CORE_ADDR frame_base;
1537 CORE_ADDR local_base;
1538
1539 struct trad_frame_saved_reg *saved_regs;
1540 };
1541
1542 static int
1543 s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
1544 struct s390_unwind_cache *info)
1545 {
1546 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1547 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1548 struct s390_prologue_data data;
1549 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1550 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1551 int i;
1552 CORE_ADDR cfa;
1553 CORE_ADDR func;
1554 CORE_ADDR result;
1555 ULONGEST reg;
1556 CORE_ADDR prev_sp;
1557 int frame_pointer;
1558 int size;
1559 struct frame_info *next_frame;
1560
1561 /* Try to find the function start address. If we can't find it, we don't
1562 bother searching for it -- with modern compilers this would be mostly
1563 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1564 or else a valid backchain ... */
1565 func = get_frame_func (this_frame);
1566 if (!func)
1567 return 0;
1568
1569 /* Try to analyze the prologue. */
1570 result = s390_analyze_prologue (gdbarch, func,
1571 get_frame_pc (this_frame), &data);
1572 if (!result)
1573 return 0;
1574
1575 /* If this was successful, we should have found the instruction that
1576 sets the stack pointer register to the previous value of the stack
1577 pointer minus the frame size. */
1578 if (!pv_is_register (*sp, S390_SP_REGNUM))
1579 return 0;
1580
1581 /* A frame size of zero at this point can mean either a real
1582 frameless function, or else a failure to find the prologue.
1583 Perform some sanity checks to verify we really have a
1584 frameless function. */
1585 if (sp->k == 0)
1586 {
1587 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1588 size zero. This is only possible if the next frame is a sentinel
1589 frame, a dummy frame, or a signal trampoline frame. */
1590 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1591 needed, instead the code should simpliy rely on its
1592 analysis. */
1593 next_frame = get_next_frame (this_frame);
1594 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1595 next_frame = get_next_frame (next_frame);
1596 if (next_frame
1597 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
1598 return 0;
1599
1600 /* If we really have a frameless function, %r14 must be valid
1601 -- in particular, it must point to a different function. */
1602 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
1603 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1604 if (get_pc_function_start (reg) == func)
1605 {
1606 /* However, there is one case where it *is* valid for %r14
1607 to point to the same function -- if this is a recursive
1608 call, and we have stopped in the prologue *before* the
1609 stack frame was allocated.
1610
1611 Recognize this case by looking ahead a bit ... */
1612
1613 struct s390_prologue_data data2;
1614 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1615
1616 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
1617 && pv_is_register (*sp, S390_SP_REGNUM)
1618 && sp->k != 0))
1619 return 0;
1620 }
1621 }
1622
1623
1624 /* OK, we've found valid prologue data. */
1625 size = -sp->k;
1626
1627 /* If the frame pointer originally also holds the same value
1628 as the stack pointer, we're probably using it. If it holds
1629 some other value -- even a constant offset -- it is most
1630 likely used as temp register. */
1631 if (pv_is_identical (*sp, *fp))
1632 frame_pointer = S390_FRAME_REGNUM;
1633 else
1634 frame_pointer = S390_SP_REGNUM;
1635
1636 /* If we've detected a function with stack frame, we'll still have to
1637 treat it as frameless if we're currently within the function epilog
1638 code at a point where the frame pointer has already been restored.
1639 This can only happen in an innermost frame. */
1640 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1641 instead the code should simpliy rely on its analysis. */
1642 next_frame = get_next_frame (this_frame);
1643 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1644 next_frame = get_next_frame (next_frame);
1645 if (size > 0
1646 && (next_frame == NULL
1647 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
1648 {
1649 /* See the comment in s390_in_function_epilogue_p on why this is
1650 not completely reliable ... */
1651 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
1652 {
1653 memset (&data, 0, sizeof (data));
1654 size = 0;
1655 frame_pointer = S390_SP_REGNUM;
1656 }
1657 }
1658
1659 /* Once we know the frame register and the frame size, we can unwind
1660 the current value of the frame register from the next frame, and
1661 add back the frame size to arrive that the previous frame's
1662 stack pointer value. */
1663 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
1664 cfa = prev_sp + 16*word_size + 32;
1665
1666 /* Set up ABI call-saved/call-clobbered registers. */
1667 for (i = 0; i < S390_NUM_REGS; i++)
1668 if (!s390_register_call_saved (gdbarch, i))
1669 trad_frame_set_unknown (info->saved_regs, i);
1670
1671 /* CC is always call-clobbered. */
1672 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
1673
1674 /* Record the addresses of all register spill slots the prologue parser
1675 has recognized. Consider only registers defined as call-saved by the
1676 ABI; for call-clobbered registers the parser may have recognized
1677 spurious stores. */
1678
1679 for (i = 0; i < 16; i++)
1680 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1681 && data.gpr_slot[i] != 0)
1682 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
1683
1684 for (i = 0; i < 16; i++)
1685 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1686 && data.fpr_slot[i] != 0)
1687 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
1688
1689 /* Function return will set PC to %r14. */
1690 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1691
1692 /* In frameless functions, we unwind simply by moving the return
1693 address to the PC. However, if we actually stored to the
1694 save area, use that -- we might only think the function frameless
1695 because we're in the middle of the prologue ... */
1696 if (size == 0
1697 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
1698 {
1699 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
1700 }
1701
1702 /* Another sanity check: unless this is a frameless function,
1703 we should have found spill slots for SP and PC.
1704 If not, we cannot unwind further -- this happens e.g. in
1705 libc's thread_start routine. */
1706 if (size > 0)
1707 {
1708 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
1709 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
1710 prev_sp = -1;
1711 }
1712
1713 /* We use the current value of the frame register as local_base,
1714 and the top of the register save area as frame_base. */
1715 if (prev_sp != -1)
1716 {
1717 info->frame_base = prev_sp + 16*word_size + 32;
1718 info->local_base = prev_sp - size;
1719 }
1720
1721 info->func = func;
1722 return 1;
1723 }
1724
1725 static void
1726 s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
1727 struct s390_unwind_cache *info)
1728 {
1729 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1730 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1731 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1732 CORE_ADDR backchain;
1733 ULONGEST reg;
1734 LONGEST sp;
1735 int i;
1736
1737 /* Set up ABI call-saved/call-clobbered registers. */
1738 for (i = 0; i < S390_NUM_REGS; i++)
1739 if (!s390_register_call_saved (gdbarch, i))
1740 trad_frame_set_unknown (info->saved_regs, i);
1741
1742 /* CC is always call-clobbered. */
1743 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
1744
1745 /* Get the backchain. */
1746 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1747 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
1748
1749 /* A zero backchain terminates the frame chain. As additional
1750 sanity check, let's verify that the spill slot for SP in the
1751 save area pointed to by the backchain in fact links back to
1752 the save area. */
1753 if (backchain != 0
1754 && safe_read_memory_integer (backchain + 15*word_size,
1755 word_size, byte_order, &sp)
1756 && (CORE_ADDR)sp == backchain)
1757 {
1758 /* We don't know which registers were saved, but it will have
1759 to be at least %r14 and %r15. This will allow us to continue
1760 unwinding, but other prev-frame registers may be incorrect ... */
1761 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1762 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1763
1764 /* Function return will set PC to %r14. */
1765 info->saved_regs[S390_PSWA_REGNUM]
1766 = info->saved_regs[S390_RETADDR_REGNUM];
1767
1768 /* We use the current value of the frame register as local_base,
1769 and the top of the register save area as frame_base. */
1770 info->frame_base = backchain + 16*word_size + 32;
1771 info->local_base = reg;
1772 }
1773
1774 info->func = get_frame_pc (this_frame);
1775 }
1776
1777 static struct s390_unwind_cache *
1778 s390_frame_unwind_cache (struct frame_info *this_frame,
1779 void **this_prologue_cache)
1780 {
1781 struct s390_unwind_cache *info;
1782 if (*this_prologue_cache)
1783 return *this_prologue_cache;
1784
1785 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1786 *this_prologue_cache = info;
1787 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1788 info->func = -1;
1789 info->frame_base = -1;
1790 info->local_base = -1;
1791
1792 /* Try to use prologue analysis to fill the unwind cache.
1793 If this fails, fall back to reading the stack backchain. */
1794 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1795 s390_backchain_frame_unwind_cache (this_frame, info);
1796
1797 return info;
1798 }
1799
1800 static void
1801 s390_frame_this_id (struct frame_info *this_frame,
1802 void **this_prologue_cache,
1803 struct frame_id *this_id)
1804 {
1805 struct s390_unwind_cache *info
1806 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
1807
1808 if (info->frame_base == -1)
1809 return;
1810
1811 *this_id = frame_id_build (info->frame_base, info->func);
1812 }
1813
1814 static struct value *
1815 s390_frame_prev_register (struct frame_info *this_frame,
1816 void **this_prologue_cache, int regnum)
1817 {
1818 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1819 struct s390_unwind_cache *info
1820 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
1821
1822 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
1823 }
1824
1825 static const struct frame_unwind s390_frame_unwind = {
1826 NORMAL_FRAME,
1827 default_frame_unwind_stop_reason,
1828 s390_frame_this_id,
1829 s390_frame_prev_register,
1830 NULL,
1831 default_frame_sniffer
1832 };
1833
1834
1835 /* Code stubs and their stack frames. For things like PLTs and NULL
1836 function calls (where there is no true frame and the return address
1837 is in the RETADDR register). */
1838
1839 struct s390_stub_unwind_cache
1840 {
1841 CORE_ADDR frame_base;
1842 struct trad_frame_saved_reg *saved_regs;
1843 };
1844
1845 static struct s390_stub_unwind_cache *
1846 s390_stub_frame_unwind_cache (struct frame_info *this_frame,
1847 void **this_prologue_cache)
1848 {
1849 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1850 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1851 struct s390_stub_unwind_cache *info;
1852 ULONGEST reg;
1853
1854 if (*this_prologue_cache)
1855 return *this_prologue_cache;
1856
1857 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
1858 *this_prologue_cache = info;
1859 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1860
1861 /* The return address is in register %r14. */
1862 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
1863
1864 /* Retrieve stack pointer and determine our frame base. */
1865 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1866 info->frame_base = reg + 16*word_size + 32;
1867
1868 return info;
1869 }
1870
1871 static void
1872 s390_stub_frame_this_id (struct frame_info *this_frame,
1873 void **this_prologue_cache,
1874 struct frame_id *this_id)
1875 {
1876 struct s390_stub_unwind_cache *info
1877 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1878 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
1879 }
1880
1881 static struct value *
1882 s390_stub_frame_prev_register (struct frame_info *this_frame,
1883 void **this_prologue_cache, int regnum)
1884 {
1885 struct s390_stub_unwind_cache *info
1886 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1887 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
1888 }
1889
1890 static int
1891 s390_stub_frame_sniffer (const struct frame_unwind *self,
1892 struct frame_info *this_frame,
1893 void **this_prologue_cache)
1894 {
1895 CORE_ADDR addr_in_block;
1896 bfd_byte insn[S390_MAX_INSTR_SIZE];
1897
1898 /* If the current PC points to non-readable memory, we assume we
1899 have trapped due to an invalid function pointer call. We handle
1900 the non-existing current function like a PLT stub. */
1901 addr_in_block = get_frame_address_in_block (this_frame);
1902 if (in_plt_section (addr_in_block, NULL)
1903 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
1904 return 1;
1905 return 0;
1906 }
1907
1908 static const struct frame_unwind s390_stub_frame_unwind = {
1909 NORMAL_FRAME,
1910 default_frame_unwind_stop_reason,
1911 s390_stub_frame_this_id,
1912 s390_stub_frame_prev_register,
1913 NULL,
1914 s390_stub_frame_sniffer
1915 };
1916
1917
1918 /* Signal trampoline stack frames. */
1919
1920 struct s390_sigtramp_unwind_cache {
1921 CORE_ADDR frame_base;
1922 struct trad_frame_saved_reg *saved_regs;
1923 };
1924
1925 static struct s390_sigtramp_unwind_cache *
1926 s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
1927 void **this_prologue_cache)
1928 {
1929 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1930 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1931 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1932 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1933 struct s390_sigtramp_unwind_cache *info;
1934 ULONGEST this_sp, prev_sp;
1935 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
1936 int i;
1937
1938 if (*this_prologue_cache)
1939 return *this_prologue_cache;
1940
1941 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
1942 *this_prologue_cache = info;
1943 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1944
1945 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1946 next_ra = get_frame_pc (this_frame);
1947 next_cfa = this_sp + 16*word_size + 32;
1948
1949 /* New-style RT frame:
1950 retcode + alignment (8 bytes)
1951 siginfo (128 bytes)
1952 ucontext (contains sigregs at offset 5 words). */
1953 if (next_ra == next_cfa)
1954 {
1955 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
1956 /* sigregs are followed by uc_sigmask (8 bytes), then by the
1957 upper GPR halves if present. */
1958 sigreg_high_off = 8;
1959 }
1960
1961 /* Old-style RT frame and all non-RT frames:
1962 old signal mask (8 bytes)
1963 pointer to sigregs. */
1964 else
1965 {
1966 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
1967 word_size, byte_order);
1968 /* sigregs are followed by signo (4 bytes), then by the
1969 upper GPR halves if present. */
1970 sigreg_high_off = 4;
1971 }
1972
1973 /* The sigregs structure looks like this:
1974 long psw_mask;
1975 long psw_addr;
1976 long gprs[16];
1977 int acrs[16];
1978 int fpc;
1979 int __pad;
1980 double fprs[16]; */
1981
1982 /* PSW mask and address. */
1983 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
1984 sigreg_ptr += word_size;
1985 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
1986 sigreg_ptr += word_size;
1987
1988 /* Then the GPRs. */
1989 for (i = 0; i < 16; i++)
1990 {
1991 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
1992 sigreg_ptr += word_size;
1993 }
1994
1995 /* Then the ACRs. */
1996 for (i = 0; i < 16; i++)
1997 {
1998 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
1999 sigreg_ptr += 4;
2000 }
2001
2002 /* The floating-point control word. */
2003 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2004 sigreg_ptr += 8;
2005
2006 /* And finally the FPRs. */
2007 for (i = 0; i < 16; i++)
2008 {
2009 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2010 sigreg_ptr += 8;
2011 }
2012
2013 /* If we have them, the GPR upper halves are appended at the end. */
2014 sigreg_ptr += sigreg_high_off;
2015 if (tdep->gpr_full_regnum != -1)
2016 for (i = 0; i < 16; i++)
2017 {
2018 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
2019 sigreg_ptr += 4;
2020 }
2021
2022 /* Restore the previous frame's SP. */
2023 prev_sp = read_memory_unsigned_integer (
2024 info->saved_regs[S390_SP_REGNUM].addr,
2025 word_size, byte_order);
2026
2027 /* Determine our frame base. */
2028 info->frame_base = prev_sp + 16*word_size + 32;
2029
2030 return info;
2031 }
2032
2033 static void
2034 s390_sigtramp_frame_this_id (struct frame_info *this_frame,
2035 void **this_prologue_cache,
2036 struct frame_id *this_id)
2037 {
2038 struct s390_sigtramp_unwind_cache *info
2039 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2040 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2041 }
2042
2043 static struct value *
2044 s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2045 void **this_prologue_cache, int regnum)
2046 {
2047 struct s390_sigtramp_unwind_cache *info
2048 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2049 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2050 }
2051
2052 static int
2053 s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2054 struct frame_info *this_frame,
2055 void **this_prologue_cache)
2056 {
2057 CORE_ADDR pc = get_frame_pc (this_frame);
2058 bfd_byte sigreturn[2];
2059
2060 if (target_read_memory (pc, sigreturn, 2))
2061 return 0;
2062
2063 if (sigreturn[0] != 0x0a /* svc */)
2064 return 0;
2065
2066 if (sigreturn[1] != 119 /* sigreturn */
2067 && sigreturn[1] != 173 /* rt_sigreturn */)
2068 return 0;
2069
2070 return 1;
2071 }
2072
2073 static const struct frame_unwind s390_sigtramp_frame_unwind = {
2074 SIGTRAMP_FRAME,
2075 default_frame_unwind_stop_reason,
2076 s390_sigtramp_frame_this_id,
2077 s390_sigtramp_frame_prev_register,
2078 NULL,
2079 s390_sigtramp_frame_sniffer
2080 };
2081
2082
2083 /* Frame base handling. */
2084
2085 static CORE_ADDR
2086 s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2087 {
2088 struct s390_unwind_cache *info
2089 = s390_frame_unwind_cache (this_frame, this_cache);
2090 return info->frame_base;
2091 }
2092
2093 static CORE_ADDR
2094 s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2095 {
2096 struct s390_unwind_cache *info
2097 = s390_frame_unwind_cache (this_frame, this_cache);
2098 return info->local_base;
2099 }
2100
2101 static const struct frame_base s390_frame_base = {
2102 &s390_frame_unwind,
2103 s390_frame_base_address,
2104 s390_local_base_address,
2105 s390_local_base_address
2106 };
2107
2108 static CORE_ADDR
2109 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2110 {
2111 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2112 ULONGEST pc;
2113 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2114 return gdbarch_addr_bits_remove (gdbarch, pc);
2115 }
2116
2117 static CORE_ADDR
2118 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2119 {
2120 ULONGEST sp;
2121 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2122 return gdbarch_addr_bits_remove (gdbarch, sp);
2123 }
2124
2125
2126 /* DWARF-2 frame support. */
2127
2128 static struct value *
2129 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2130 int regnum)
2131 {
2132 return s390_unwind_pseudo_register (this_frame, regnum);
2133 }
2134
2135 static void
2136 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2137 struct dwarf2_frame_state_reg *reg,
2138 struct frame_info *this_frame)
2139 {
2140 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2141
2142 /* The condition code (and thus PSW mask) is call-clobbered. */
2143 if (regnum == S390_PSWM_REGNUM)
2144 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2145
2146 /* The PSW address unwinds to the return address. */
2147 else if (regnum == S390_PSWA_REGNUM)
2148 reg->how = DWARF2_FRAME_REG_RA;
2149
2150 /* Fixed registers are call-saved or call-clobbered
2151 depending on the ABI in use. */
2152 else if (regnum < S390_NUM_REGS)
2153 {
2154 if (s390_register_call_saved (gdbarch, regnum))
2155 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2156 else
2157 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2158 }
2159
2160 /* We install a special function to unwind pseudos. */
2161 else
2162 {
2163 reg->how = DWARF2_FRAME_REG_FN;
2164 reg->loc.fn = s390_dwarf2_prev_register;
2165 }
2166 }
2167
2168
2169 /* Dummy function calls. */
2170
2171 /* Return non-zero if TYPE is an integer-like type, zero otherwise.
2172 "Integer-like" types are those that should be passed the way
2173 integers are: integers, enums, ranges, characters, and booleans. */
2174 static int
2175 is_integer_like (struct type *type)
2176 {
2177 enum type_code code = TYPE_CODE (type);
2178
2179 return (code == TYPE_CODE_INT
2180 || code == TYPE_CODE_ENUM
2181 || code == TYPE_CODE_RANGE
2182 || code == TYPE_CODE_CHAR
2183 || code == TYPE_CODE_BOOL);
2184 }
2185
2186 /* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2187 "Pointer-like" types are those that should be passed the way
2188 pointers are: pointers and references. */
2189 static int
2190 is_pointer_like (struct type *type)
2191 {
2192 enum type_code code = TYPE_CODE (type);
2193
2194 return (code == TYPE_CODE_PTR
2195 || code == TYPE_CODE_REF);
2196 }
2197
2198
2199 /* Return non-zero if TYPE is a `float singleton' or `double
2200 singleton', zero otherwise.
2201
2202 A `T singleton' is a struct type with one member, whose type is
2203 either T or a `T singleton'. So, the following are all float
2204 singletons:
2205
2206 struct { float x };
2207 struct { struct { float x; } x; };
2208 struct { struct { struct { float x; } x; } x; };
2209
2210 ... and so on.
2211
2212 All such structures are passed as if they were floats or doubles,
2213 as the (revised) ABI says. */
2214 static int
2215 is_float_singleton (struct type *type)
2216 {
2217 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2218 {
2219 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2220 CHECK_TYPEDEF (singleton_type);
2221
2222 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
2223 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
2224 || is_float_singleton (singleton_type));
2225 }
2226
2227 return 0;
2228 }
2229
2230
2231 /* Return non-zero if TYPE is a struct-like type, zero otherwise.
2232 "Struct-like" types are those that should be passed as structs are:
2233 structs and unions.
2234
2235 As an odd quirk, not mentioned in the ABI, GCC passes float and
2236 double singletons as if they were a plain float, double, etc. (The
2237 corresponding union types are handled normally.) So we exclude
2238 those types here. *shrug* */
2239 static int
2240 is_struct_like (struct type *type)
2241 {
2242 enum type_code code = TYPE_CODE (type);
2243
2244 return (code == TYPE_CODE_UNION
2245 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2246 }
2247
2248
2249 /* Return non-zero if TYPE is a float-like type, zero otherwise.
2250 "Float-like" types are those that should be passed as
2251 floating-point values are.
2252
2253 You'd think this would just be floats, doubles, long doubles, etc.
2254 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2255 double singletons as if they were a plain float, double, etc. (The
2256 corresponding union types are handled normally.) So we include
2257 those types here. *shrug* */
2258 static int
2259 is_float_like (struct type *type)
2260 {
2261 return (TYPE_CODE (type) == TYPE_CODE_FLT
2262 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
2263 || is_float_singleton (type));
2264 }
2265
2266
2267 static int
2268 is_power_of_two (unsigned int n)
2269 {
2270 return ((n & (n - 1)) == 0);
2271 }
2272
2273 /* Return non-zero if TYPE should be passed as a pointer to a copy,
2274 zero otherwise. */
2275 static int
2276 s390_function_arg_pass_by_reference (struct type *type)
2277 {
2278 unsigned length = TYPE_LENGTH (type);
2279 if (length > 8)
2280 return 1;
2281
2282 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2283 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2284 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
2285 }
2286
2287 /* Return non-zero if TYPE should be passed in a float register
2288 if possible. */
2289 static int
2290 s390_function_arg_float (struct type *type)
2291 {
2292 unsigned length = TYPE_LENGTH (type);
2293 if (length > 8)
2294 return 0;
2295
2296 return is_float_like (type);
2297 }
2298
2299 /* Return non-zero if TYPE should be passed in an integer register
2300 (or a pair of integer registers) if possible. */
2301 static int
2302 s390_function_arg_integer (struct type *type)
2303 {
2304 unsigned length = TYPE_LENGTH (type);
2305 if (length > 8)
2306 return 0;
2307
2308 return is_integer_like (type)
2309 || is_pointer_like (type)
2310 || (is_struct_like (type) && is_power_of_two (length));
2311 }
2312
2313 /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2314 word as required for the ABI. */
2315 static LONGEST
2316 extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
2317 {
2318 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2319 struct type *type = check_typedef (value_type (arg));
2320
2321 /* Even structs get passed in the least significant bits of the
2322 register / memory word. It's not really right to extract them as
2323 an integer, but it does take care of the extension. */
2324 if (TYPE_UNSIGNED (type))
2325 return extract_unsigned_integer (value_contents (arg),
2326 TYPE_LENGTH (type), byte_order);
2327 else
2328 return extract_signed_integer (value_contents (arg),
2329 TYPE_LENGTH (type), byte_order);
2330 }
2331
2332
2333 /* Return the alignment required by TYPE. */
2334 static int
2335 alignment_of (struct type *type)
2336 {
2337 int alignment;
2338
2339 if (is_integer_like (type)
2340 || is_pointer_like (type)
2341 || TYPE_CODE (type) == TYPE_CODE_FLT
2342 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
2343 alignment = TYPE_LENGTH (type);
2344 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2345 || TYPE_CODE (type) == TYPE_CODE_UNION)
2346 {
2347 int i;
2348
2349 alignment = 1;
2350 for (i = 0; i < TYPE_NFIELDS (type); i++)
2351 {
2352 int field_alignment
2353 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
2354
2355 if (field_alignment > alignment)
2356 alignment = field_alignment;
2357 }
2358 }
2359 else
2360 alignment = 1;
2361
2362 /* Check that everything we ever return is a power of two. Lots of
2363 code doesn't want to deal with aligning things to arbitrary
2364 boundaries. */
2365 gdb_assert ((alignment & (alignment - 1)) == 0);
2366
2367 return alignment;
2368 }
2369
2370
2371 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
2372 place to be passed to a function, as specified by the "GNU/Linux
2373 for S/390 ELF Application Binary Interface Supplement".
2374
2375 SP is the current stack pointer. We must put arguments, links,
2376 padding, etc. whereever they belong, and return the new stack
2377 pointer value.
2378
2379 If STRUCT_RETURN is non-zero, then the function we're calling is
2380 going to return a structure by value; STRUCT_ADDR is the address of
2381 a block we've allocated for it on the stack.
2382
2383 Our caller has taken care of any type promotions needed to satisfy
2384 prototypes or the old K&R argument-passing rules. */
2385 static CORE_ADDR
2386 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2387 struct regcache *regcache, CORE_ADDR bp_addr,
2388 int nargs, struct value **args, CORE_ADDR sp,
2389 int struct_return, CORE_ADDR struct_addr)
2390 {
2391 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2392 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2393 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2394 int i;
2395
2396 /* If the i'th argument is passed as a reference to a copy, then
2397 copy_addr[i] is the address of the copy we made. */
2398 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
2399
2400 /* Reserve space for the reference-to-copy area. */
2401 for (i = 0; i < nargs; i++)
2402 {
2403 struct value *arg = args[i];
2404 struct type *type = check_typedef (value_type (arg));
2405 unsigned length = TYPE_LENGTH (type);
2406
2407 if (s390_function_arg_pass_by_reference (type))
2408 {
2409 sp -= length;
2410 sp = align_down (sp, alignment_of (type));
2411 copy_addr[i] = sp;
2412 }
2413 }
2414
2415 /* Reserve space for the parameter area. As a conservative
2416 simplification, we assume that everything will be passed on the
2417 stack. Since every argument larger than 8 bytes will be
2418 passed by reference, we use this simple upper bound. */
2419 sp -= nargs * 8;
2420
2421 /* After all that, make sure it's still aligned on an eight-byte
2422 boundary. */
2423 sp = align_down (sp, 8);
2424
2425 /* Allocate the standard frame areas: the register save area, the
2426 word reserved for the compiler (which seems kind of meaningless),
2427 and the back chain pointer. */
2428 sp -= 16*word_size + 32;
2429
2430 /* Now we have the final SP value. Make sure we didn't underflow;
2431 on 31-bit, this would result in addresses with the high bit set,
2432 which causes confusion elsewhere. Note that if we error out
2433 here, stack and registers remain untouched. */
2434 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2435 error (_("Stack overflow"));
2436
2437
2438 /* Finally, place the actual parameters, working from SP towards
2439 higher addresses. The code above is supposed to reserve enough
2440 space for this. */
2441 {
2442 int fr = 0;
2443 int gr = 2;
2444 CORE_ADDR starg = sp + 16*word_size + 32;
2445
2446 /* A struct is returned using general register 2. */
2447 if (struct_return)
2448 {
2449 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2450 struct_addr);
2451 gr++;
2452 }
2453
2454 for (i = 0; i < nargs; i++)
2455 {
2456 struct value *arg = args[i];
2457 struct type *type = check_typedef (value_type (arg));
2458 unsigned length = TYPE_LENGTH (type);
2459
2460 if (s390_function_arg_pass_by_reference (type))
2461 {
2462 /* Actually copy the argument contents to the stack slot
2463 that was reserved above. */
2464 write_memory (copy_addr[i], value_contents (arg), length);
2465
2466 if (gr <= 6)
2467 {
2468 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2469 copy_addr[i]);
2470 gr++;
2471 }
2472 else
2473 {
2474 write_memory_unsigned_integer (starg, word_size, byte_order,
2475 copy_addr[i]);
2476 starg += word_size;
2477 }
2478 }
2479 else if (s390_function_arg_float (type))
2480 {
2481 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2482 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2483 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2484 {
2485 /* When we store a single-precision value in an FP register,
2486 it occupies the leftmost bits. */
2487 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
2488 0, length, value_contents (arg));
2489 fr += 2;
2490 }
2491 else
2492 {
2493 /* When we store a single-precision value in a stack slot,
2494 it occupies the rightmost bits. */
2495 starg = align_up (starg + length, word_size);
2496 write_memory (starg - length, value_contents (arg), length);
2497 }
2498 }
2499 else if (s390_function_arg_integer (type) && length <= word_size)
2500 {
2501 if (gr <= 6)
2502 {
2503 /* Integer arguments are always extended to word size. */
2504 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
2505 extend_simple_arg (gdbarch,
2506 arg));
2507 gr++;
2508 }
2509 else
2510 {
2511 /* Integer arguments are always extended to word size. */
2512 write_memory_signed_integer (starg, word_size, byte_order,
2513 extend_simple_arg (gdbarch, arg));
2514 starg += word_size;
2515 }
2516 }
2517 else if (s390_function_arg_integer (type) && length == 2*word_size)
2518 {
2519 if (gr <= 5)
2520 {
2521 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
2522 value_contents (arg));
2523 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
2524 value_contents (arg) + word_size);
2525 gr += 2;
2526 }
2527 else
2528 {
2529 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2530 in it, then don't go back and use it again later. */
2531 gr = 7;
2532
2533 write_memory (starg, value_contents (arg), length);
2534 starg += length;
2535 }
2536 }
2537 else
2538 internal_error (__FILE__, __LINE__, _("unknown argument type"));
2539 }
2540 }
2541
2542 /* Store return address. */
2543 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2544
2545 /* Store updated stack pointer. */
2546 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
2547
2548 /* We need to return the 'stack part' of the frame ID,
2549 which is actually the top of the register save area. */
2550 return sp + 16*word_size + 32;
2551 }
2552
2553 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
2554 dummy frame. The frame ID's base needs to match the TOS value
2555 returned by push_dummy_call, and the PC match the dummy frame's
2556 breakpoint. */
2557 static struct frame_id
2558 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
2559 {
2560 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2561 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2562 sp = gdbarch_addr_bits_remove (gdbarch, sp);
2563
2564 return frame_id_build (sp + 16*word_size + 32,
2565 get_frame_pc (this_frame));
2566 }
2567
2568 static CORE_ADDR
2569 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2570 {
2571 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2572 always be aligned on an eight-byte boundary. */
2573 return (addr & -8);
2574 }
2575
2576
2577 /* Function return value access. */
2578
2579 static enum return_value_convention
2580 s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
2581 {
2582 int length = TYPE_LENGTH (type);
2583 if (length > 8)
2584 return RETURN_VALUE_STRUCT_CONVENTION;
2585
2586 switch (TYPE_CODE (type))
2587 {
2588 case TYPE_CODE_STRUCT:
2589 case TYPE_CODE_UNION:
2590 case TYPE_CODE_ARRAY:
2591 case TYPE_CODE_COMPLEX:
2592 return RETURN_VALUE_STRUCT_CONVENTION;
2593
2594 default:
2595 return RETURN_VALUE_REGISTER_CONVENTION;
2596 }
2597 }
2598
2599 static enum return_value_convention
2600 s390_return_value (struct gdbarch *gdbarch, struct type *func_type,
2601 struct type *type, struct regcache *regcache,
2602 gdb_byte *out, const gdb_byte *in)
2603 {
2604 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2605 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2606 enum return_value_convention rvc;
2607 int length;
2608
2609 type = check_typedef (type);
2610 rvc = s390_return_value_convention (gdbarch, type);
2611 length = TYPE_LENGTH (type);
2612
2613 if (in)
2614 {
2615 switch (rvc)
2616 {
2617 case RETURN_VALUE_REGISTER_CONVENTION:
2618 if (TYPE_CODE (type) == TYPE_CODE_FLT
2619 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
2620 {
2621 /* When we store a single-precision value in an FP register,
2622 it occupies the leftmost bits. */
2623 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2624 0, length, in);
2625 }
2626 else if (length <= word_size)
2627 {
2628 /* Integer arguments are always extended to word size. */
2629 if (TYPE_UNSIGNED (type))
2630 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
2631 extract_unsigned_integer (in, length, byte_order));
2632 else
2633 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
2634 extract_signed_integer (in, length, byte_order));
2635 }
2636 else if (length == 2*word_size)
2637 {
2638 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2639 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
2640 }
2641 else
2642 internal_error (__FILE__, __LINE__, _("invalid return type"));
2643 break;
2644
2645 case RETURN_VALUE_STRUCT_CONVENTION:
2646 error (_("Cannot set function return value."));
2647 break;
2648 }
2649 }
2650 else if (out)
2651 {
2652 switch (rvc)
2653 {
2654 case RETURN_VALUE_REGISTER_CONVENTION:
2655 if (TYPE_CODE (type) == TYPE_CODE_FLT
2656 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
2657 {
2658 /* When we store a single-precision value in an FP register,
2659 it occupies the leftmost bits. */
2660 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2661 0, length, out);
2662 }
2663 else if (length <= word_size)
2664 {
2665 /* Integer arguments occupy the rightmost bits. */
2666 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2667 word_size - length, length, out);
2668 }
2669 else if (length == 2*word_size)
2670 {
2671 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2672 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
2673 }
2674 else
2675 internal_error (__FILE__, __LINE__, _("invalid return type"));
2676 break;
2677
2678 case RETURN_VALUE_STRUCT_CONVENTION:
2679 error (_("Function return value unknown."));
2680 break;
2681 }
2682 }
2683
2684 return rvc;
2685 }
2686
2687
2688 /* Breakpoints. */
2689
2690 static const gdb_byte *
2691 s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2692 CORE_ADDR *pcptr, int *lenptr)
2693 {
2694 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
2695
2696 *lenptr = sizeof (breakpoint);
2697 return breakpoint;
2698 }
2699
2700
2701 /* Address handling. */
2702
2703 static CORE_ADDR
2704 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
2705 {
2706 return addr & 0x7fffffff;
2707 }
2708
2709 static int
2710 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2711 {
2712 if (byte_size == 4)
2713 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
2714 else
2715 return 0;
2716 }
2717
2718 static const char *
2719 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2720 {
2721 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
2722 return "mode32";
2723 else
2724 return NULL;
2725 }
2726
2727 static int
2728 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2729 const char *name,
2730 int *type_flags_ptr)
2731 {
2732 if (strcmp (name, "mode32") == 0)
2733 {
2734 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
2735 return 1;
2736 }
2737 else
2738 return 0;
2739 }
2740
2741 /* Set up gdbarch struct. */
2742
2743 static struct gdbarch *
2744 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2745 {
2746 const struct target_desc *tdesc = info.target_desc;
2747 struct tdesc_arch_data *tdesc_data = NULL;
2748 struct gdbarch *gdbarch;
2749 struct gdbarch_tdep *tdep;
2750 int tdep_abi;
2751 int have_upper = 0;
2752 int first_pseudo_reg, last_pseudo_reg;
2753
2754 /* Default ABI and register size. */
2755 switch (info.bfd_arch_info->mach)
2756 {
2757 case bfd_mach_s390_31:
2758 tdep_abi = ABI_LINUX_S390;
2759 break;
2760
2761 case bfd_mach_s390_64:
2762 tdep_abi = ABI_LINUX_ZSERIES;
2763 break;
2764
2765 default:
2766 return NULL;
2767 }
2768
2769 /* Use default target description if none provided by the target. */
2770 if (!tdesc_has_registers (tdesc))
2771 {
2772 if (tdep_abi == ABI_LINUX_S390)
2773 tdesc = tdesc_s390_linux32;
2774 else
2775 tdesc = tdesc_s390x_linux64;
2776 }
2777
2778 /* Check any target description for validity. */
2779 if (tdesc_has_registers (tdesc))
2780 {
2781 static const char *const gprs[] = {
2782 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2783 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2784 };
2785 static const char *const fprs[] = {
2786 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2787 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
2788 };
2789 static const char *const acrs[] = {
2790 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
2791 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
2792 };
2793 static const char *const gprs_lower[] = {
2794 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
2795 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
2796 };
2797 static const char *const gprs_upper[] = {
2798 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
2799 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
2800 };
2801 const struct tdesc_feature *feature;
2802 int i, valid_p = 1;
2803
2804 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
2805 if (feature == NULL)
2806 return NULL;
2807
2808 tdesc_data = tdesc_data_alloc ();
2809
2810 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2811 S390_PSWM_REGNUM, "pswm");
2812 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2813 S390_PSWA_REGNUM, "pswa");
2814
2815 if (tdesc_unnumbered_register (feature, "r0"))
2816 {
2817 for (i = 0; i < 16; i++)
2818 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2819 S390_R0_REGNUM + i, gprs[i]);
2820 }
2821 else
2822 {
2823 have_upper = 1;
2824
2825 for (i = 0; i < 16; i++)
2826 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2827 S390_R0_REGNUM + i,
2828 gprs_lower[i]);
2829 for (i = 0; i < 16; i++)
2830 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2831 S390_R0_UPPER_REGNUM + i,
2832 gprs_upper[i]);
2833 }
2834
2835 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
2836 if (feature == NULL)
2837 {
2838 tdesc_data_cleanup (tdesc_data);
2839 return NULL;
2840 }
2841
2842 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2843 S390_FPC_REGNUM, "fpc");
2844 for (i = 0; i < 16; i++)
2845 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2846 S390_F0_REGNUM + i, fprs[i]);
2847
2848 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
2849 if (feature == NULL)
2850 {
2851 tdesc_data_cleanup (tdesc_data);
2852 return NULL;
2853 }
2854
2855 for (i = 0; i < 16; i++)
2856 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2857 S390_A0_REGNUM + i, acrs[i]);
2858
2859 if (!valid_p)
2860 {
2861 tdesc_data_cleanup (tdesc_data);
2862 return NULL;
2863 }
2864 }
2865
2866 /* Find a candidate among extant architectures. */
2867 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2868 arches != NULL;
2869 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2870 {
2871 tdep = gdbarch_tdep (arches->gdbarch);
2872 if (!tdep)
2873 continue;
2874 if (tdep->abi != tdep_abi)
2875 continue;
2876 if ((tdep->gpr_full_regnum != -1) != have_upper)
2877 continue;
2878 if (tdesc_data != NULL)
2879 tdesc_data_cleanup (tdesc_data);
2880 return arches->gdbarch;
2881 }
2882
2883 /* Otherwise create a new gdbarch for the specified machine type. */
2884 tdep = XCALLOC (1, struct gdbarch_tdep);
2885 tdep->abi = tdep_abi;
2886 gdbarch = gdbarch_alloc (&info, tdep);
2887
2888 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
2889 set_gdbarch_char_signed (gdbarch, 0);
2890
2891 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
2892 We can safely let them default to 128-bit, since the debug info
2893 will give the size of type actually used in each case. */
2894 set_gdbarch_long_double_bit (gdbarch, 128);
2895 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
2896
2897 /* Amount PC must be decremented by after a breakpoint. This is
2898 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
2899 always. */
2900 set_gdbarch_decr_pc_after_break (gdbarch, 2);
2901 /* Stack grows downward. */
2902 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2903 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
2904 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
2905 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
2906
2907 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
2908 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
2909 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
2910 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2911 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2912 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
2913 set_gdbarch_regset_from_core_section (gdbarch,
2914 s390_regset_from_core_section);
2915 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
2916 if (have_upper)
2917 set_gdbarch_core_regset_sections (gdbarch, s390_upper_regset_sections);
2918 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
2919 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
2920 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
2921 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
2922 set_tdesc_pseudo_register_reggroup_p (gdbarch,
2923 s390_pseudo_register_reggroup_p);
2924 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
2925
2926 /* Assign pseudo register numbers. */
2927 first_pseudo_reg = gdbarch_num_regs (gdbarch);
2928 last_pseudo_reg = first_pseudo_reg;
2929 tdep->gpr_full_regnum = -1;
2930 if (have_upper)
2931 {
2932 tdep->gpr_full_regnum = last_pseudo_reg;
2933 last_pseudo_reg += 16;
2934 }
2935 tdep->pc_regnum = last_pseudo_reg++;
2936 tdep->cc_regnum = last_pseudo_reg++;
2937 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
2938 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
2939
2940 /* Inferior function calls. */
2941 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
2942 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
2943 set_gdbarch_frame_align (gdbarch, s390_frame_align);
2944 set_gdbarch_return_value (gdbarch, s390_return_value);
2945
2946 /* Frame handling. */
2947 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
2948 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
2949 dwarf2_append_unwinders (gdbarch);
2950 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
2951 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
2952 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
2953 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
2954 frame_base_set_default (gdbarch, &s390_frame_base);
2955 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
2956 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
2957
2958 /* Displaced stepping. */
2959 set_gdbarch_displaced_step_copy_insn (gdbarch,
2960 simple_displaced_step_copy_insn);
2961 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
2962 set_gdbarch_displaced_step_free_closure (gdbarch,
2963 simple_displaced_step_free_closure);
2964 set_gdbarch_displaced_step_location (gdbarch,
2965 displaced_step_at_entry_point);
2966 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
2967
2968 /* Note that GNU/Linux is the only OS supported on this
2969 platform. */
2970 linux_init_abi (info, gdbarch);
2971
2972 switch (tdep->abi)
2973 {
2974 case ABI_LINUX_S390:
2975 tdep->gregset = &s390_gregset;
2976 tdep->sizeof_gregset = s390_sizeof_gregset;
2977 tdep->fpregset = &s390_fpregset;
2978 tdep->sizeof_fpregset = s390_sizeof_fpregset;
2979
2980 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
2981 set_solib_svr4_fetch_link_map_offsets
2982 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
2983 break;
2984
2985 case ABI_LINUX_ZSERIES:
2986 tdep->gregset = &s390x_gregset;
2987 tdep->sizeof_gregset = s390x_sizeof_gregset;
2988 tdep->fpregset = &s390_fpregset;
2989 tdep->sizeof_fpregset = s390_sizeof_fpregset;
2990
2991 set_gdbarch_long_bit (gdbarch, 64);
2992 set_gdbarch_long_long_bit (gdbarch, 64);
2993 set_gdbarch_ptr_bit (gdbarch, 64);
2994 set_solib_svr4_fetch_link_map_offsets
2995 (gdbarch, svr4_lp64_fetch_link_map_offsets);
2996 set_gdbarch_address_class_type_flags (gdbarch,
2997 s390_address_class_type_flags);
2998 set_gdbarch_address_class_type_flags_to_name (gdbarch,
2999 s390_address_class_type_flags_to_name);
3000 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3001 s390_address_class_name_to_type_flags);
3002 break;
3003 }
3004
3005 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3006
3007 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3008
3009 /* Enable TLS support. */
3010 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3011 svr4_fetch_objfile_link_map);
3012
3013 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3014
3015 return gdbarch;
3016 }
3017
3018
3019 extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3020
3021 void
3022 _initialize_s390_tdep (void)
3023 {
3024 /* Hook us into the gdbarch mechanism. */
3025 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
3026
3027 /* Initialize the Linux target descriptions. */
3028 initialize_tdesc_s390_linux32 ();
3029 initialize_tdesc_s390_linux64 ();
3030 initialize_tdesc_s390x_linux64 ();
3031 }
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