Remove regcache_cooked_write_part
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
1 /* Target-dependent code for s390.
2
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21
22 #include "arch-utils.h"
23 #include "ax-gdb.h"
24 #include "dwarf2-frame.h"
25 #include "elf/s390.h"
26 #include "elf-bfd.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
29 #include "gdbarch.h"
30 #include "gdbcore.h"
31 #include "infrun.h"
32 #include "linux-tdep.h"
33 #include "objfiles.h"
34 #include "osabi.h"
35 #include "record-full.h"
36 #include "regcache.h"
37 #include "reggroups.h"
38 #include "s390-tdep.h"
39 #include "target-descriptions.h"
40 #include "trad-frame.h"
41 #include "value.h"
42
43 #include "features/s390-linux32.c"
44 #include "features/s390x-linux64.c"
45
46 /* Holds the current set of options to be passed to the disassembler. */
47 static char *s390_disassembler_options;
48
49 /* Breakpoints. */
50
51 constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
52
53 typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
54
55 /* Decoding S/390 instructions. */
56
57 /* Read a single instruction from address AT. */
58
59 static int
60 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
61 {
62 static int s390_instrlen[] = { 2, 4, 4, 6 };
63 int instrlen;
64
65 if (target_read_memory (at, &instr[0], 2))
66 return -1;
67 instrlen = s390_instrlen[instr[0] >> 6];
68 if (instrlen > 2)
69 {
70 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
71 return -1;
72 }
73 return instrlen;
74 }
75
76 /* The functions below are for recognizing and decoding S/390
77 instructions of various formats. Each of them checks whether INSN
78 is an instruction of the given format, with the specified opcodes.
79 If it is, it sets the remaining arguments to the values of the
80 instruction's fields, and returns a non-zero value; otherwise, it
81 returns zero.
82
83 These functions' arguments appear in the order they appear in the
84 instruction, not in the machine-language form. So, opcodes always
85 come first, even though they're sometimes scattered around the
86 instructions. And displacements appear before base and extension
87 registers, as they do in the assembly syntax, not at the end, as
88 they do in the machine language.
89
90 Test for RI instruction format. */
91
92 static int
93 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
94 {
95 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
96 {
97 *r1 = (insn[1] >> 4) & 0xf;
98 /* i2 is a 16-bit signed quantity. */
99 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
100 return 1;
101 }
102 else
103 return 0;
104 }
105
106 /* Test for RIL instruction format. See comment on is_ri for details. */
107
108 static int
109 is_ril (bfd_byte *insn, int op1, int op2,
110 unsigned int *r1, int *i2)
111 {
112 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
113 {
114 *r1 = (insn[1] >> 4) & 0xf;
115 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
116 no sign extension is necessary, but we don't want to assume
117 that. */
118 *i2 = (((insn[2] << 24)
119 | (insn[3] << 16)
120 | (insn[4] << 8)
121 | (insn[5])) ^ 0x80000000) - 0x80000000;
122 return 1;
123 }
124 else
125 return 0;
126 }
127
128 /* Test for RR instruction format. See comment on is_ri for details. */
129
130 static int
131 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
132 {
133 if (insn[0] == op)
134 {
135 *r1 = (insn[1] >> 4) & 0xf;
136 *r2 = insn[1] & 0xf;
137 return 1;
138 }
139 else
140 return 0;
141 }
142
143 /* Test for RRE instruction format. See comment on is_ri for details. */
144
145 static int
146 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
147 {
148 if (((insn[0] << 8) | insn[1]) == op)
149 {
150 /* Yes, insn[3]. insn[2] is unused in RRE format. */
151 *r1 = (insn[3] >> 4) & 0xf;
152 *r2 = insn[3] & 0xf;
153 return 1;
154 }
155 else
156 return 0;
157 }
158
159 /* Test for RS instruction format. See comment on is_ri for details. */
160
161 static int
162 is_rs (bfd_byte *insn, int op,
163 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
164 {
165 if (insn[0] == op)
166 {
167 *r1 = (insn[1] >> 4) & 0xf;
168 *r3 = insn[1] & 0xf;
169 *b2 = (insn[2] >> 4) & 0xf;
170 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
171 return 1;
172 }
173 else
174 return 0;
175 }
176
177 /* Test for RSY instruction format. See comment on is_ri for details. */
178
179 static int
180 is_rsy (bfd_byte *insn, int op1, int op2,
181 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
182 {
183 if (insn[0] == op1
184 && insn[5] == op2)
185 {
186 *r1 = (insn[1] >> 4) & 0xf;
187 *r3 = insn[1] & 0xf;
188 *b2 = (insn[2] >> 4) & 0xf;
189 /* The 'long displacement' is a 20-bit signed integer. */
190 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
191 ^ 0x80000) - 0x80000;
192 return 1;
193 }
194 else
195 return 0;
196 }
197
198 /* Test for RX instruction format. See comment on is_ri for details. */
199
200 static int
201 is_rx (bfd_byte *insn, int op,
202 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
203 {
204 if (insn[0] == op)
205 {
206 *r1 = (insn[1] >> 4) & 0xf;
207 *x2 = insn[1] & 0xf;
208 *b2 = (insn[2] >> 4) & 0xf;
209 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
210 return 1;
211 }
212 else
213 return 0;
214 }
215
216 /* Test for RXY instruction format. See comment on is_ri for details. */
217
218 static int
219 is_rxy (bfd_byte *insn, int op1, int op2,
220 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
221 {
222 if (insn[0] == op1
223 && insn[5] == op2)
224 {
225 *r1 = (insn[1] >> 4) & 0xf;
226 *x2 = insn[1] & 0xf;
227 *b2 = (insn[2] >> 4) & 0xf;
228 /* The 'long displacement' is a 20-bit signed integer. */
229 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
230 ^ 0x80000) - 0x80000;
231 return 1;
232 }
233 else
234 return 0;
235 }
236
237 /* A helper for s390_software_single_step, decides if an instruction
238 is a partial-execution instruction that needs to be executed until
239 completion when in record mode. If it is, returns 1 and writes
240 instruction length to a pointer. */
241
242 static int
243 s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
244 {
245 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
246 uint16_t insn;
247
248 insn = read_memory_integer (loc, 2, byte_order);
249
250 switch (insn >> 8)
251 {
252 case 0xa8: /* MVCLE */
253 *len = 4;
254 return 1;
255
256 case 0xeb:
257 {
258 insn = read_memory_integer (loc + 4, 2, byte_order);
259 if ((insn & 0xff) == 0x8e)
260 {
261 /* MVCLU */
262 *len = 6;
263 return 1;
264 }
265 }
266 break;
267 }
268
269 switch (insn)
270 {
271 case 0xb255: /* MVST */
272 case 0xb263: /* CMPSC */
273 case 0xb2a5: /* TRE */
274 case 0xb2a6: /* CU21 */
275 case 0xb2a7: /* CU12 */
276 case 0xb9b0: /* CU14 */
277 case 0xb9b1: /* CU24 */
278 case 0xb9b2: /* CU41 */
279 case 0xb9b3: /* CU42 */
280 case 0xb92a: /* KMF */
281 case 0xb92b: /* KMO */
282 case 0xb92f: /* KMC */
283 case 0xb92d: /* KMCTR */
284 case 0xb92e: /* KM */
285 case 0xb93c: /* PPNO */
286 case 0xb990: /* TRTT */
287 case 0xb991: /* TRTO */
288 case 0xb992: /* TROT */
289 case 0xb993: /* TROO */
290 *len = 4;
291 return 1;
292 }
293
294 return 0;
295 }
296
297 /* Implement the "software_single_step" gdbarch method, needed to single step
298 through instructions like MVCLE in record mode, to make sure they are
299 executed to completion. Without that, record will save the full length
300 of destination buffer on every iteration, even though the CPU will only
301 process about 4kiB of it each time, leading to O(n**2) memory and time
302 complexity. */
303
304 static std::vector<CORE_ADDR>
305 s390_software_single_step (struct regcache *regcache)
306 {
307 struct gdbarch *gdbarch = regcache->arch ();
308 CORE_ADDR loc = regcache_read_pc (regcache);
309 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
310 int len;
311 uint16_t insn;
312
313 /* Special handling only if recording. */
314 if (!record_full_is_used ())
315 return {};
316
317 /* First, match a partial instruction. */
318 if (!s390_is_partial_instruction (gdbarch, loc, &len))
319 return {};
320
321 loc += len;
322
323 /* Second, look for a branch back to it. */
324 insn = read_memory_integer (loc, 2, byte_order);
325 if (insn != 0xa714) /* BRC with mask 1 */
326 return {};
327
328 insn = read_memory_integer (loc + 2, 2, byte_order);
329 if (insn != (uint16_t) -(len / 2))
330 return {};
331
332 loc += 4;
333
334 /* Found it, step past the whole thing. */
335 return {loc};
336 }
337
338 /* Displaced stepping. */
339
340 /* Return true if INSN is a non-branch RIL-b or RIL-c format
341 instruction. */
342
343 static int
344 is_non_branch_ril (gdb_byte *insn)
345 {
346 gdb_byte op1 = insn[0];
347
348 if (op1 == 0xc4)
349 {
350 gdb_byte op2 = insn[1] & 0x0f;
351
352 switch (op2)
353 {
354 case 0x02: /* llhrl */
355 case 0x04: /* lghrl */
356 case 0x05: /* lhrl */
357 case 0x06: /* llghrl */
358 case 0x07: /* sthrl */
359 case 0x08: /* lgrl */
360 case 0x0b: /* stgrl */
361 case 0x0c: /* lgfrl */
362 case 0x0d: /* lrl */
363 case 0x0e: /* llgfrl */
364 case 0x0f: /* strl */
365 return 1;
366 }
367 }
368 else if (op1 == 0xc6)
369 {
370 gdb_byte op2 = insn[1] & 0x0f;
371
372 switch (op2)
373 {
374 case 0x00: /* exrl */
375 case 0x02: /* pfdrl */
376 case 0x04: /* cghrl */
377 case 0x05: /* chrl */
378 case 0x06: /* clghrl */
379 case 0x07: /* clhrl */
380 case 0x08: /* cgrl */
381 case 0x0a: /* clgrl */
382 case 0x0c: /* cgfrl */
383 case 0x0d: /* crl */
384 case 0x0e: /* clgfrl */
385 case 0x0f: /* clrl */
386 return 1;
387 }
388 }
389
390 return 0;
391 }
392
393 typedef buf_displaced_step_closure s390_displaced_step_closure;
394
395 /* Implementation of gdbarch_displaced_step_copy_insn. */
396
397 static struct displaced_step_closure *
398 s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
399 CORE_ADDR from, CORE_ADDR to,
400 struct regcache *regs)
401 {
402 size_t len = gdbarch_max_insn_length (gdbarch);
403 std::unique_ptr<s390_displaced_step_closure> closure
404 (new s390_displaced_step_closure (len));
405 gdb_byte *buf = closure->buf.data ();
406
407 read_memory (from, buf, len);
408
409 /* Adjust the displacement field of PC-relative RIL instructions,
410 except branches. The latter are handled in the fixup hook. */
411 if (is_non_branch_ril (buf))
412 {
413 LONGEST offset;
414
415 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
416 offset = (from - to + offset * 2) / 2;
417
418 /* If the instruction is too far from the jump pad, punt. This
419 will usually happen with instructions in shared libraries.
420 We could probably support these by rewriting them to be
421 absolute or fully emulating them. */
422 if (offset < INT32_MIN || offset > INT32_MAX)
423 {
424 /* Let the core fall back to stepping over the breakpoint
425 in-line. */
426 if (debug_displaced)
427 {
428 fprintf_unfiltered (gdb_stdlog,
429 "displaced: can't displaced step "
430 "RIL instruction: offset %s out of range\n",
431 plongest (offset));
432 }
433
434 return NULL;
435 }
436
437 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
438 }
439
440 write_memory (to, buf, len);
441
442 if (debug_displaced)
443 {
444 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
445 paddress (gdbarch, from), paddress (gdbarch, to));
446 displaced_step_dump_bytes (gdb_stdlog, buf, len);
447 }
448
449 return closure.release ();
450 }
451
452 /* Fix up the state of registers and memory after having single-stepped
453 a displaced instruction. */
454
455 static void
456 s390_displaced_step_fixup (struct gdbarch *gdbarch,
457 struct displaced_step_closure *closure_,
458 CORE_ADDR from, CORE_ADDR to,
459 struct regcache *regs)
460 {
461 /* Our closure is a copy of the instruction. */
462 s390_displaced_step_closure *closure
463 = (s390_displaced_step_closure *) closure_;
464 gdb_byte *insn = closure->buf.data ();
465 static int s390_instrlen[] = { 2, 4, 4, 6 };
466 int insnlen = s390_instrlen[insn[0] >> 6];
467
468 /* Fields for various kinds of instructions. */
469 unsigned int b2, r1, r2, x2, r3;
470 int i2, d2;
471
472 /* Get current PC and addressing mode bit. */
473 CORE_ADDR pc = regcache_read_pc (regs);
474 ULONGEST amode = 0;
475
476 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
477 {
478 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
479 amode &= 0x80000000;
480 }
481
482 if (debug_displaced)
483 fprintf_unfiltered (gdb_stdlog,
484 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
485 paddress (gdbarch, from), paddress (gdbarch, to),
486 paddress (gdbarch, pc), insnlen, (int) amode);
487
488 /* Handle absolute branch and save instructions. */
489 if (is_rr (insn, op_basr, &r1, &r2)
490 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
491 {
492 /* Recompute saved return address in R1. */
493 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
494 amode | (from + insnlen));
495 }
496
497 /* Handle absolute branch instructions. */
498 else if (is_rr (insn, op_bcr, &r1, &r2)
499 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
500 || is_rr (insn, op_bctr, &r1, &r2)
501 || is_rre (insn, op_bctgr, &r1, &r2)
502 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
503 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
504 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
505 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
506 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
507 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
508 {
509 /* Update PC iff branch was *not* taken. */
510 if (pc == to + insnlen)
511 regcache_write_pc (regs, from + insnlen);
512 }
513
514 /* Handle PC-relative branch and save instructions. */
515 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
516 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
517 {
518 /* Update PC. */
519 regcache_write_pc (regs, pc - to + from);
520 /* Recompute saved return address in R1. */
521 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
522 amode | (from + insnlen));
523 }
524
525 /* Handle LOAD ADDRESS RELATIVE LONG. */
526 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
527 {
528 /* Update PC. */
529 regcache_write_pc (regs, from + insnlen);
530 /* Recompute output address in R1. */
531 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
532 amode | (from + i2 * 2));
533 }
534
535 /* If we executed a breakpoint instruction, point PC right back at it. */
536 else if (insn[0] == 0x0 && insn[1] == 0x1)
537 regcache_write_pc (regs, from);
538
539 /* For any other insn, adjust PC by negated displacement. PC then
540 points right after the original instruction, except for PC-relative
541 branches, where it points to the adjusted branch target. */
542 else
543 regcache_write_pc (regs, pc - to + from);
544
545 if (debug_displaced)
546 fprintf_unfiltered (gdb_stdlog,
547 "displaced: (s390) pc is now %s\n",
548 paddress (gdbarch, regcache_read_pc (regs)));
549 }
550
551 /* Implement displaced_step_hw_singlestep gdbarch method. */
552
553 static int
554 s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
555 struct displaced_step_closure *closure)
556 {
557 return 1;
558 }
559
560 /* Prologue analysis. */
561
562 struct s390_prologue_data {
563
564 /* The stack. */
565 struct pv_area *stack;
566
567 /* The size and byte-order of a GPR or FPR. */
568 int gpr_size;
569 int fpr_size;
570 enum bfd_endian byte_order;
571
572 /* The general-purpose registers. */
573 pv_t gpr[S390_NUM_GPRS];
574
575 /* The floating-point registers. */
576 pv_t fpr[S390_NUM_FPRS];
577
578 /* The offset relative to the CFA where the incoming GPR N was saved
579 by the function prologue. 0 if not saved or unknown. */
580 int gpr_slot[S390_NUM_GPRS];
581
582 /* Likewise for FPRs. */
583 int fpr_slot[S390_NUM_FPRS];
584
585 /* Nonzero if the backchain was saved. This is assumed to be the
586 case when the incoming SP is saved at the current SP location. */
587 int back_chain_saved_p;
588 };
589
590 /* Return the effective address for an X-style instruction, like:
591
592 L R1, D2(X2, B2)
593
594 Here, X2 and B2 are registers, and D2 is a signed 20-bit
595 constant; the effective address is the sum of all three. If either
596 X2 or B2 are zero, then it doesn't contribute to the sum --- this
597 means that r0 can't be used as either X2 or B2. */
598
599 static pv_t
600 s390_addr (struct s390_prologue_data *data,
601 int d2, unsigned int x2, unsigned int b2)
602 {
603 pv_t result;
604
605 result = pv_constant (d2);
606 if (x2)
607 result = pv_add (result, data->gpr[x2]);
608 if (b2)
609 result = pv_add (result, data->gpr[b2]);
610
611 return result;
612 }
613
614 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
615
616 static void
617 s390_store (struct s390_prologue_data *data,
618 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
619 pv_t value)
620 {
621 pv_t addr = s390_addr (data, d2, x2, b2);
622 pv_t offset;
623
624 /* Check whether we are storing the backchain. */
625 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
626
627 if (pv_is_constant (offset) && offset.k == 0)
628 if (size == data->gpr_size
629 && pv_is_register_k (value, S390_SP_REGNUM, 0))
630 {
631 data->back_chain_saved_p = 1;
632 return;
633 }
634
635 /* Check whether we are storing a register into the stack. */
636 if (!data->stack->store_would_trash (addr))
637 data->stack->store (addr, size, value);
638
639 /* Note: If this is some store we cannot identify, you might think we
640 should forget our cached values, as any of those might have been hit.
641
642 However, we make the assumption that the register save areas are only
643 ever stored to once in any given function, and we do recognize these
644 stores. Thus every store we cannot recognize does not hit our data. */
645 }
646
647 /* Do a SIZE-byte load from D2(X2,B2). */
648
649 static pv_t
650 s390_load (struct s390_prologue_data *data,
651 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
652
653 {
654 pv_t addr = s390_addr (data, d2, x2, b2);
655
656 /* If it's a load from an in-line constant pool, then we can
657 simulate that, under the assumption that the code isn't
658 going to change between the time the processor actually
659 executed it creating the current frame, and the time when
660 we're analyzing the code to unwind past that frame. */
661 if (pv_is_constant (addr))
662 {
663 struct target_section *secp;
664 secp = target_section_by_addr (target_stack, addr.k);
665 if (secp != NULL
666 && (bfd_get_section_flags (secp->the_bfd_section->owner,
667 secp->the_bfd_section)
668 & SEC_READONLY))
669 return pv_constant (read_memory_integer (addr.k, size,
670 data->byte_order));
671 }
672
673 /* Check whether we are accessing one of our save slots. */
674 return data->stack->fetch (addr, size);
675 }
676
677 /* Function for finding saved registers in a 'struct pv_area'; we pass
678 this to pv_area::scan.
679
680 If VALUE is a saved register, ADDR says it was saved at a constant
681 offset from the frame base, and SIZE indicates that the whole
682 register was saved, record its offset in the reg_offset table in
683 PROLOGUE_UNTYPED. */
684
685 static void
686 s390_check_for_saved (void *data_untyped, pv_t addr,
687 CORE_ADDR size, pv_t value)
688 {
689 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
690 int i, offset;
691
692 if (!pv_is_register (addr, S390_SP_REGNUM))
693 return;
694
695 offset = 16 * data->gpr_size + 32 - addr.k;
696
697 /* If we are storing the original value of a register, we want to
698 record the CFA offset. If the same register is stored multiple
699 times, the stack slot with the highest address counts. */
700
701 for (i = 0; i < S390_NUM_GPRS; i++)
702 if (size == data->gpr_size
703 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
704 if (data->gpr_slot[i] == 0
705 || data->gpr_slot[i] > offset)
706 {
707 data->gpr_slot[i] = offset;
708 return;
709 }
710
711 for (i = 0; i < S390_NUM_FPRS; i++)
712 if (size == data->fpr_size
713 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
714 if (data->fpr_slot[i] == 0
715 || data->fpr_slot[i] > offset)
716 {
717 data->fpr_slot[i] = offset;
718 return;
719 }
720 }
721
722 /* Analyze the prologue of the function starting at START_PC, continuing at
723 most until CURRENT_PC. Initialize DATA to hold all information we find
724 out about the state of the registers and stack slots. Return the address
725 of the instruction after the last one that changed the SP, FP, or back
726 chain; or zero on error. */
727
728 static CORE_ADDR
729 s390_analyze_prologue (struct gdbarch *gdbarch,
730 CORE_ADDR start_pc,
731 CORE_ADDR current_pc,
732 struct s390_prologue_data *data)
733 {
734 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
735
736 /* Our return value:
737 The address of the instruction after the last one that changed
738 the SP, FP, or back chain; zero if we got an error trying to
739 read memory. */
740 CORE_ADDR result = start_pc;
741
742 /* The current PC for our abstract interpretation. */
743 CORE_ADDR pc;
744
745 /* The address of the next instruction after that. */
746 CORE_ADDR next_pc;
747
748 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
749 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
750
751 /* Set up everything's initial value. */
752 {
753 int i;
754
755 /* For the purpose of prologue tracking, we consider the GPR size to
756 be equal to the ABI word size, even if it is actually larger
757 (i.e. when running a 32-bit binary under a 64-bit kernel). */
758 data->gpr_size = word_size;
759 data->fpr_size = 8;
760 data->byte_order = gdbarch_byte_order (gdbarch);
761
762 for (i = 0; i < S390_NUM_GPRS; i++)
763 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
764
765 for (i = 0; i < S390_NUM_FPRS; i++)
766 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
767
768 for (i = 0; i < S390_NUM_GPRS; i++)
769 data->gpr_slot[i] = 0;
770
771 for (i = 0; i < S390_NUM_FPRS; i++)
772 data->fpr_slot[i] = 0;
773
774 data->back_chain_saved_p = 0;
775 }
776
777 /* Start interpreting instructions, until we hit the frame's
778 current PC or the first branch instruction. */
779 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
780 {
781 bfd_byte insn[S390_MAX_INSTR_SIZE];
782 int insn_len = s390_readinstruction (insn, pc);
783
784 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
785 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
786 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
787
788 /* Fields for various kinds of instructions. */
789 unsigned int b2, r1, r2, x2, r3;
790 int i2, d2;
791
792 /* The values of SP and FP before this instruction,
793 for detecting instructions that change them. */
794 pv_t pre_insn_sp, pre_insn_fp;
795 /* Likewise for the flag whether the back chain was saved. */
796 int pre_insn_back_chain_saved_p;
797
798 /* If we got an error trying to read the instruction, report it. */
799 if (insn_len < 0)
800 {
801 result = 0;
802 break;
803 }
804
805 next_pc = pc + insn_len;
806
807 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
808 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
809 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
810
811 /* LHI r1, i2 --- load halfword immediate. */
812 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
813 /* LGFI r1, i2 --- load fullword immediate. */
814 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
815 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
816 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
817 data->gpr[r1] = pv_constant (i2);
818
819 /* LR r1, r2 --- load from register. */
820 /* LGR r1, r2 --- load from register (64-bit version). */
821 else if (is_rr (insn32, op_lr, &r1, &r2)
822 || is_rre (insn64, op_lgr, &r1, &r2))
823 data->gpr[r1] = data->gpr[r2];
824
825 /* L r1, d2(x2, b2) --- load. */
826 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
827 /* LG r1, d2(x2, b2) --- load (64-bit version). */
828 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
829 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
830 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
831 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
832
833 /* ST r1, d2(x2, b2) --- store. */
834 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
835 /* STG r1, d2(x2, b2) --- store (64-bit version). */
836 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
837 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
838 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
839 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
840
841 /* STD r1, d2(x2,b2) --- store floating-point register. */
842 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
843 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
844
845 /* STM r1, r3, d2(b2) --- store multiple. */
846 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
847 version). */
848 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
849 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
850 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
851 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
852 {
853 for (; r1 <= r3; r1++, d2 += data->gpr_size)
854 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
855 }
856
857 /* AHI r1, i2 --- add halfword immediate. */
858 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
859 /* AFI r1, i2 --- add fullword immediate. */
860 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
861 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
862 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
863 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
864 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
865 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
866
867 /* ALFI r1, i2 --- add logical immediate. */
868 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
869 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
870 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
871 data->gpr[r1] = pv_add_constant (data->gpr[r1],
872 (CORE_ADDR)i2 & 0xffffffff);
873
874 /* AR r1, r2 -- add register. */
875 /* AGR r1, r2 -- add register (64-bit version). */
876 else if (is_rr (insn32, op_ar, &r1, &r2)
877 || is_rre (insn64, op_agr, &r1, &r2))
878 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
879
880 /* A r1, d2(x2, b2) -- add. */
881 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
882 /* AG r1, d2(x2, b2) -- add (64-bit version). */
883 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
884 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
885 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
886 data->gpr[r1] = pv_add (data->gpr[r1],
887 s390_load (data, d2, x2, b2, data->gpr_size));
888
889 /* SLFI r1, i2 --- subtract logical immediate. */
890 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
891 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
892 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
893 data->gpr[r1] = pv_add_constant (data->gpr[r1],
894 -((CORE_ADDR)i2 & 0xffffffff));
895
896 /* SR r1, r2 -- subtract register. */
897 /* SGR r1, r2 -- subtract register (64-bit version). */
898 else if (is_rr (insn32, op_sr, &r1, &r2)
899 || is_rre (insn64, op_sgr, &r1, &r2))
900 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
901
902 /* S r1, d2(x2, b2) -- subtract. */
903 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
904 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
905 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
906 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
907 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
908 data->gpr[r1] = pv_subtract (data->gpr[r1],
909 s390_load (data, d2, x2, b2, data->gpr_size));
910
911 /* LA r1, d2(x2, b2) --- load address. */
912 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
913 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
914 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
915 data->gpr[r1] = s390_addr (data, d2, x2, b2);
916
917 /* LARL r1, i2 --- load address relative long. */
918 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
919 data->gpr[r1] = pv_constant (pc + i2 * 2);
920
921 /* BASR r1, 0 --- branch and save.
922 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
923 else if (is_rr (insn, op_basr, &r1, &r2)
924 && r2 == 0)
925 data->gpr[r1] = pv_constant (next_pc);
926
927 /* BRAS r1, i2 --- branch relative and save. */
928 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
929 {
930 data->gpr[r1] = pv_constant (next_pc);
931 next_pc = pc + i2 * 2;
932
933 /* We'd better not interpret any backward branches. We'll
934 never terminate. */
935 if (next_pc <= pc)
936 break;
937 }
938
939 /* BRC/BRCL -- branch relative on condition. Ignore "branch
940 never", branch to following instruction, and "conditional
941 trap" (BRC +2). Otherwise terminate search. */
942 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
943 {
944 if (r1 != 0 && i2 != 1 && i2 != 2)
945 break;
946 }
947 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
948 {
949 if (r1 != 0 && i2 != 3)
950 break;
951 }
952
953 /* Terminate search when hitting any other branch instruction. */
954 else if (is_rr (insn, op_basr, &r1, &r2)
955 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
956 || is_rr (insn, op_bcr, &r1, &r2)
957 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
958 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
959 break;
960
961 else
962 {
963 /* An instruction we don't know how to simulate. The only
964 safe thing to do would be to set every value we're tracking
965 to 'unknown'. Instead, we'll be optimistic: we assume that
966 we *can* interpret every instruction that the compiler uses
967 to manipulate any of the data we're interested in here --
968 then we can just ignore anything else. */
969 }
970
971 /* Record the address after the last instruction that changed
972 the FP, SP, or backlink. Ignore instructions that changed
973 them back to their original values --- those are probably
974 restore instructions. (The back chain is never restored,
975 just popped.) */
976 {
977 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
978 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
979
980 if ((! pv_is_identical (pre_insn_sp, sp)
981 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
982 && sp.kind != pvk_unknown)
983 || (! pv_is_identical (pre_insn_fp, fp)
984 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
985 && fp.kind != pvk_unknown)
986 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
987 result = next_pc;
988 }
989 }
990
991 /* Record where all the registers were saved. */
992 data->stack->scan (s390_check_for_saved, data);
993
994 return result;
995 }
996
997 /* Advance PC across any function entry prologue instructions to reach
998 some "real" code. */
999
1000 static CORE_ADDR
1001 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1002 {
1003 struct s390_prologue_data data;
1004 CORE_ADDR skip_pc, func_addr;
1005
1006 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1007 {
1008 CORE_ADDR post_prologue_pc
1009 = skip_prologue_using_sal (gdbarch, func_addr);
1010 if (post_prologue_pc != 0)
1011 return std::max (pc, post_prologue_pc);
1012 }
1013
1014 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1015 return skip_pc ? skip_pc : pc;
1016 }
1017
1018 /* Register handling. */
1019
1020 /* ABI call-saved register information. */
1021
1022 static int
1023 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1024 {
1025 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1026
1027 switch (tdep->abi)
1028 {
1029 case ABI_LINUX_S390:
1030 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1031 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1032 || regnum == S390_A0_REGNUM)
1033 return 1;
1034
1035 break;
1036
1037 case ABI_LINUX_ZSERIES:
1038 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1039 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1040 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1041 return 1;
1042
1043 break;
1044 }
1045
1046 return 0;
1047 }
1048
1049 /* The "guess_tracepoint_registers" gdbarch method. */
1050
1051 static void
1052 s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1053 struct regcache *regcache,
1054 CORE_ADDR addr)
1055 {
1056 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1057 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1058 gdb_byte *reg = (gdb_byte *) alloca (sz);
1059 ULONGEST pswm, pswa;
1060
1061 /* Set PSWA from the location and a default PSWM (the only part we're
1062 unlikely to get right is the CC). */
1063 if (tdep->abi == ABI_LINUX_S390)
1064 {
1065 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1066 was in 24-bit mode). */
1067 pswa = addr | 0x80000000UL;
1068 pswm = 0x070d0000UL;
1069 }
1070 else
1071 {
1072 pswa = addr;
1073 pswm = 0x0705000180000000ULL;
1074 }
1075
1076 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
1077 regcache_raw_supply (regcache, S390_PSWA_REGNUM, reg);
1078
1079 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
1080 regcache_raw_supply (regcache, S390_PSWM_REGNUM, reg);
1081 }
1082
1083 /* Return the name of register REGNO. Return the empty string for
1084 registers that shouldn't be visible. */
1085
1086 static const char *
1087 s390_register_name (struct gdbarch *gdbarch, int regnum)
1088 {
1089 if (regnum >= S390_V0_LOWER_REGNUM
1090 && regnum <= S390_V15_LOWER_REGNUM)
1091 return "";
1092 return tdesc_register_name (gdbarch, regnum);
1093 }
1094
1095 /* DWARF Register Mapping. */
1096
1097 static const short s390_dwarf_regmap[] =
1098 {
1099 /* 0-15: General Purpose Registers. */
1100 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1101 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1102 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1103 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1104
1105 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1106 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1107 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1108 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1109 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1110
1111 /* 32-47: Control Registers (not mapped). */
1112 -1, -1, -1, -1, -1, -1, -1, -1,
1113 -1, -1, -1, -1, -1, -1, -1, -1,
1114
1115 /* 48-63: Access Registers. */
1116 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1117 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1118 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1119 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1120
1121 /* 64-65: Program Status Word. */
1122 S390_PSWM_REGNUM,
1123 S390_PSWA_REGNUM,
1124
1125 /* 66-67: Reserved. */
1126 -1, -1,
1127
1128 /* 68-83: Vector Registers 16-31. */
1129 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1130 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1131 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1132 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1133
1134 /* End of "official" DWARF registers. The remainder of the map is
1135 for GDB internal use only. */
1136
1137 /* GPR Lower Half Access. */
1138 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1139 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1140 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1141 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1142 };
1143
1144 enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1145
1146 /* Convert DWARF register number REG to the appropriate register
1147 number used by GDB. */
1148
1149 static int
1150 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1151 {
1152 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1153 int gdb_reg = -1;
1154
1155 /* In a 32-on-64 debug scenario, debug info refers to the full
1156 64-bit GPRs. Note that call frame information still refers to
1157 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1158 special register numbers to access GPRs. */
1159 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1160 return tdep->gpr_full_regnum + reg;
1161
1162 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1163 gdb_reg = s390_dwarf_regmap[reg];
1164
1165 if (tdep->v0_full_regnum == -1)
1166 {
1167 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1168 gdb_reg = -1;
1169 }
1170 else
1171 {
1172 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1173 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1174 }
1175
1176 return gdb_reg;
1177 }
1178
1179 /* Pseudo registers. */
1180
1181 /* Check whether REGNUM indicates a coupled general purpose register.
1182 These pseudo-registers are composed of two adjacent gprs. */
1183
1184 static int
1185 regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
1186 {
1187 return (tdep->gpr_full_regnum != -1
1188 && regnum >= tdep->gpr_full_regnum
1189 && regnum <= tdep->gpr_full_regnum + 15);
1190 }
1191
1192 /* Check whether REGNUM indicates a full vector register (v0-v15).
1193 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1194
1195 static int
1196 regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
1197 {
1198 return (tdep->v0_full_regnum != -1
1199 && regnum >= tdep->v0_full_regnum
1200 && regnum <= tdep->v0_full_regnum + 15);
1201 }
1202
1203 /* 'float' values are stored in the upper half of floating-point
1204 registers, even though we are otherwise a big-endian platform. The
1205 same applies to a 'float' value within a vector. */
1206
1207 static struct value *
1208 s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1209 int regnum, struct frame_id frame_id)
1210 {
1211 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1212 struct value *value = default_value_from_register (gdbarch, type,
1213 regnum, frame_id);
1214 check_typedef (type);
1215
1216 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1217 && TYPE_LENGTH (type) < 8)
1218 || regnum_is_vxr_full (tdep, regnum)
1219 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1220 set_value_offset (value, 0);
1221
1222 return value;
1223 }
1224
1225 /* Implement pseudo_register_name tdesc method. */
1226
1227 static const char *
1228 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1229 {
1230 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1231
1232 if (regnum == tdep->pc_regnum)
1233 return "pc";
1234
1235 if (regnum == tdep->cc_regnum)
1236 return "cc";
1237
1238 if (regnum_is_gpr_full (tdep, regnum))
1239 {
1240 static const char *full_name[] = {
1241 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1242 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1243 };
1244 return full_name[regnum - tdep->gpr_full_regnum];
1245 }
1246
1247 if (regnum_is_vxr_full (tdep, regnum))
1248 {
1249 static const char *full_name[] = {
1250 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1251 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1252 };
1253 return full_name[regnum - tdep->v0_full_regnum];
1254 }
1255
1256 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1257 }
1258
1259 /* Implement pseudo_register_type tdesc method. */
1260
1261 static struct type *
1262 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1263 {
1264 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1265
1266 if (regnum == tdep->pc_regnum)
1267 return builtin_type (gdbarch)->builtin_func_ptr;
1268
1269 if (regnum == tdep->cc_regnum)
1270 return builtin_type (gdbarch)->builtin_int;
1271
1272 if (regnum_is_gpr_full (tdep, regnum))
1273 return builtin_type (gdbarch)->builtin_uint64;
1274
1275 if (regnum_is_vxr_full (tdep, regnum))
1276 return tdesc_find_type (gdbarch, "vec128");
1277
1278 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1279 }
1280
1281 /* Implement pseudo_register_read gdbarch method. */
1282
1283 static enum register_status
1284 s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
1285 int regnum, gdb_byte *buf)
1286 {
1287 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1288 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1289 int regsize = register_size (gdbarch, regnum);
1290 ULONGEST val;
1291
1292 if (regnum == tdep->pc_regnum)
1293 {
1294 enum register_status status;
1295
1296 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1297 if (status == REG_VALID)
1298 {
1299 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1300 val &= 0x7fffffff;
1301 store_unsigned_integer (buf, regsize, byte_order, val);
1302 }
1303 return status;
1304 }
1305
1306 if (regnum == tdep->cc_regnum)
1307 {
1308 enum register_status status;
1309
1310 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1311 if (status == REG_VALID)
1312 {
1313 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1314 val = (val >> 12) & 3;
1315 else
1316 val = (val >> 44) & 3;
1317 store_unsigned_integer (buf, regsize, byte_order, val);
1318 }
1319 return status;
1320 }
1321
1322 if (regnum_is_gpr_full (tdep, regnum))
1323 {
1324 enum register_status status;
1325 ULONGEST val_upper;
1326
1327 regnum -= tdep->gpr_full_regnum;
1328
1329 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1330 if (status == REG_VALID)
1331 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1332 &val_upper);
1333 if (status == REG_VALID)
1334 {
1335 val |= val_upper << 32;
1336 store_unsigned_integer (buf, regsize, byte_order, val);
1337 }
1338 return status;
1339 }
1340
1341 if (regnum_is_vxr_full (tdep, regnum))
1342 {
1343 enum register_status status;
1344
1345 regnum -= tdep->v0_full_regnum;
1346
1347 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1348 if (status == REG_VALID)
1349 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1350 return status;
1351 }
1352
1353 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1354 }
1355
1356 /* Implement pseudo_register_write gdbarch method. */
1357
1358 static void
1359 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1360 int regnum, const gdb_byte *buf)
1361 {
1362 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1363 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1364 int regsize = register_size (gdbarch, regnum);
1365 ULONGEST val, psw;
1366
1367 if (regnum == tdep->pc_regnum)
1368 {
1369 val = extract_unsigned_integer (buf, regsize, byte_order);
1370 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1371 {
1372 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1373 val = (psw & 0x80000000) | (val & 0x7fffffff);
1374 }
1375 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1376 return;
1377 }
1378
1379 if (regnum == tdep->cc_regnum)
1380 {
1381 val = extract_unsigned_integer (buf, regsize, byte_order);
1382 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1383 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1384 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1385 else
1386 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1387 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1388 return;
1389 }
1390
1391 if (regnum_is_gpr_full (tdep, regnum))
1392 {
1393 regnum -= tdep->gpr_full_regnum;
1394 val = extract_unsigned_integer (buf, regsize, byte_order);
1395 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1396 val & 0xffffffff);
1397 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1398 val >> 32);
1399 return;
1400 }
1401
1402 if (regnum_is_vxr_full (tdep, regnum))
1403 {
1404 regnum -= tdep->v0_full_regnum;
1405 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1406 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1407 return;
1408 }
1409
1410 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1411 }
1412
1413 /* Register groups. */
1414
1415 /* Implement pseudo_register_reggroup_p tdesc method. */
1416
1417 static int
1418 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1419 struct reggroup *group)
1420 {
1421 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1422
1423 /* We usually save/restore the whole PSW, which includes PC and CC.
1424 However, some older gdbservers may not support saving/restoring
1425 the whole PSW yet, and will return an XML register description
1426 excluding those from the save/restore register groups. In those
1427 cases, we still need to explicitly save/restore PC and CC in order
1428 to push or pop frames. Since this doesn't hurt anything if we
1429 already save/restore the whole PSW (it's just redundant), we add
1430 PC and CC at this point unconditionally. */
1431 if (group == save_reggroup || group == restore_reggroup)
1432 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1433
1434 if (group == vector_reggroup)
1435 return regnum_is_vxr_full (tdep, regnum);
1436
1437 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1438 return 0;
1439
1440 return default_register_reggroup_p (gdbarch, regnum, group);
1441 }
1442
1443 /* The "ax_pseudo_register_collect" gdbarch method. */
1444
1445 static int
1446 s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1447 struct agent_expr *ax, int regnum)
1448 {
1449 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1450 if (regnum == tdep->pc_regnum)
1451 {
1452 ax_reg_mask (ax, S390_PSWA_REGNUM);
1453 }
1454 else if (regnum == tdep->cc_regnum)
1455 {
1456 ax_reg_mask (ax, S390_PSWM_REGNUM);
1457 }
1458 else if (regnum_is_gpr_full (tdep, regnum))
1459 {
1460 regnum -= tdep->gpr_full_regnum;
1461 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1462 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1463 }
1464 else if (regnum_is_vxr_full (tdep, regnum))
1465 {
1466 regnum -= tdep->v0_full_regnum;
1467 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1468 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1469 }
1470 else
1471 {
1472 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1473 }
1474 return 0;
1475 }
1476
1477 /* The "ax_pseudo_register_push_stack" gdbarch method. */
1478
1479 static int
1480 s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1481 struct agent_expr *ax, int regnum)
1482 {
1483 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1484 if (regnum == tdep->pc_regnum)
1485 {
1486 ax_reg (ax, S390_PSWA_REGNUM);
1487 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1488 {
1489 ax_zero_ext (ax, 31);
1490 }
1491 }
1492 else if (regnum == tdep->cc_regnum)
1493 {
1494 ax_reg (ax, S390_PSWM_REGNUM);
1495 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1496 ax_const_l (ax, 12);
1497 else
1498 ax_const_l (ax, 44);
1499 ax_simple (ax, aop_rsh_unsigned);
1500 ax_zero_ext (ax, 2);
1501 }
1502 else if (regnum_is_gpr_full (tdep, regnum))
1503 {
1504 regnum -= tdep->gpr_full_regnum;
1505 ax_reg (ax, S390_R0_REGNUM + regnum);
1506 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1507 ax_const_l (ax, 32);
1508 ax_simple (ax, aop_lsh);
1509 ax_simple (ax, aop_bit_or);
1510 }
1511 else if (regnum_is_vxr_full (tdep, regnum))
1512 {
1513 /* Too large to stuff on the stack. */
1514 return 1;
1515 }
1516 else
1517 {
1518 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1519 }
1520 return 0;
1521 }
1522
1523 /* The "gen_return_address" gdbarch method. Since this is supposed to be
1524 just a best-effort method, and we don't really have the means to run
1525 the full unwinder here, just collect the link register. */
1526
1527 static void
1528 s390_gen_return_address (struct gdbarch *gdbarch,
1529 struct agent_expr *ax, struct axs_value *value,
1530 CORE_ADDR scope)
1531 {
1532 value->type = register_type (gdbarch, S390_R14_REGNUM);
1533 value->kind = axs_lvalue_register;
1534 value->u.reg = S390_R14_REGNUM;
1535 }
1536
1537 /* Address handling. */
1538
1539 /* Implement addr_bits_remove gdbarch method.
1540 Only used for ABI_LINUX_S390. */
1541
1542 static CORE_ADDR
1543 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1544 {
1545 return addr & 0x7fffffff;
1546 }
1547
1548 /* Implement addr_class_type_flags gdbarch method.
1549 Only used for ABI_LINUX_ZSERIES. */
1550
1551 static int
1552 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1553 {
1554 if (byte_size == 4)
1555 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1556 else
1557 return 0;
1558 }
1559
1560 /* Implement addr_class_type_flags_to_name gdbarch method.
1561 Only used for ABI_LINUX_ZSERIES. */
1562
1563 static const char *
1564 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
1565 {
1566 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1567 return "mode32";
1568 else
1569 return NULL;
1570 }
1571
1572 /* Implement addr_class_name_to_type_flags gdbarch method.
1573 Only used for ABI_LINUX_ZSERIES. */
1574
1575 static int
1576 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1577 const char *name,
1578 int *type_flags_ptr)
1579 {
1580 if (strcmp (name, "mode32") == 0)
1581 {
1582 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1583 return 1;
1584 }
1585 else
1586 return 0;
1587 }
1588
1589 /* Inferior function calls. */
1590
1591 /* Dummy function calls. */
1592
1593 /* Unwrap any single-field structs in TYPE and return the effective
1594 "inner" type. E.g., yield "float" for all these cases:
1595
1596 float x;
1597 struct { float x };
1598 struct { struct { float x; } x; };
1599 struct { struct { struct { float x; } x; } x; };
1600
1601 However, if an inner type is smaller than MIN_SIZE, abort the
1602 unwrapping. */
1603
1604 static struct type *
1605 s390_effective_inner_type (struct type *type, unsigned int min_size)
1606 {
1607 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1608 && TYPE_NFIELDS (type) == 1)
1609 {
1610 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
1611
1612 if (TYPE_LENGTH (inner) < min_size)
1613 break;
1614 type = inner;
1615 }
1616
1617 return type;
1618 }
1619
1620 /* Return non-zero if TYPE should be passed like "float" or
1621 "double". */
1622
1623 static int
1624 s390_function_arg_float (struct type *type)
1625 {
1626 /* Note that long double as well as complex types are intentionally
1627 excluded. */
1628 if (TYPE_LENGTH (type) > 8)
1629 return 0;
1630
1631 /* A struct containing just a float or double is passed like a float
1632 or double. */
1633 type = s390_effective_inner_type (type, 0);
1634
1635 return (TYPE_CODE (type) == TYPE_CODE_FLT
1636 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
1637 }
1638
1639 /* Return non-zero if TYPE should be passed like a vector. */
1640
1641 static int
1642 s390_function_arg_vector (struct type *type)
1643 {
1644 if (TYPE_LENGTH (type) > 16)
1645 return 0;
1646
1647 /* Structs containing just a vector are passed like a vector. */
1648 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1649
1650 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
1651 }
1652
1653 /* Determine whether N is a power of two. */
1654
1655 static int
1656 is_power_of_two (unsigned int n)
1657 {
1658 return n && ((n & (n - 1)) == 0);
1659 }
1660
1661 /* For an argument whose type is TYPE and which is not passed like a
1662 float or vector, return non-zero if it should be passed like "int"
1663 or "long long". */
1664
1665 static int
1666 s390_function_arg_integer (struct type *type)
1667 {
1668 enum type_code code = TYPE_CODE (type);
1669
1670 if (TYPE_LENGTH (type) > 8)
1671 return 0;
1672
1673 if (code == TYPE_CODE_INT
1674 || code == TYPE_CODE_ENUM
1675 || code == TYPE_CODE_RANGE
1676 || code == TYPE_CODE_CHAR
1677 || code == TYPE_CODE_BOOL
1678 || code == TYPE_CODE_PTR
1679 || TYPE_IS_REFERENCE (type))
1680 return 1;
1681
1682 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1683 && is_power_of_two (TYPE_LENGTH (type)));
1684 }
1685
1686 /* Argument passing state: Internal data structure passed to helper
1687 routines of s390_push_dummy_call. */
1688
1689 struct s390_arg_state
1690 {
1691 /* Register cache, or NULL, if we are in "preparation mode". */
1692 struct regcache *regcache;
1693 /* Next available general/floating-point/vector register for
1694 argument passing. */
1695 int gr, fr, vr;
1696 /* Current pointer to copy area (grows downwards). */
1697 CORE_ADDR copy;
1698 /* Current pointer to parameter area (grows upwards). */
1699 CORE_ADDR argp;
1700 };
1701
1702 /* Prepare one argument ARG for a dummy call and update the argument
1703 passing state AS accordingly. If the regcache field in AS is set,
1704 operate in "write mode" and write ARG into the inferior. Otherwise
1705 run "preparation mode" and skip all updates to the inferior. */
1706
1707 static void
1708 s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1709 struct gdbarch_tdep *tdep, int word_size,
1710 enum bfd_endian byte_order, int is_unnamed)
1711 {
1712 struct type *type = check_typedef (value_type (arg));
1713 unsigned int length = TYPE_LENGTH (type);
1714 int write_mode = as->regcache != NULL;
1715
1716 if (s390_function_arg_float (type))
1717 {
1718 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1719 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1720 6. */
1721 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1722 {
1723 /* When we store a single-precision value in an FP register,
1724 it occupies the leftmost bits. */
1725 if (write_mode)
1726 as->regcache->cooked_write_part (S390_F0_REGNUM + as->fr, 0, length,
1727 value_contents (arg));
1728 as->fr += 2;
1729 }
1730 else
1731 {
1732 /* When we store a single-precision value in a stack slot,
1733 it occupies the rightmost bits. */
1734 as->argp = align_up (as->argp + length, word_size);
1735 if (write_mode)
1736 write_memory (as->argp - length, value_contents (arg),
1737 length);
1738 }
1739 }
1740 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1741 && s390_function_arg_vector (type))
1742 {
1743 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1744
1745 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1746 {
1747 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1748
1749 if (write_mode)
1750 as->regcache->cooked_write_part (regnum, 0, length,
1751 value_contents (arg));
1752 as->vr++;
1753 }
1754 else
1755 {
1756 if (write_mode)
1757 write_memory (as->argp, value_contents (arg), length);
1758 as->argp = align_up (as->argp + length, word_size);
1759 }
1760 }
1761 else if (s390_function_arg_integer (type) && length <= word_size)
1762 {
1763 /* Initialize it just to avoid a GCC false warning. */
1764 ULONGEST val = 0;
1765
1766 if (write_mode)
1767 {
1768 /* Place value in least significant bits of the register or
1769 memory word and sign- or zero-extend to full word size.
1770 This also applies to a struct or union. */
1771 val = TYPE_UNSIGNED (type)
1772 ? extract_unsigned_integer (value_contents (arg),
1773 length, byte_order)
1774 : extract_signed_integer (value_contents (arg),
1775 length, byte_order);
1776 }
1777
1778 if (as->gr <= 6)
1779 {
1780 if (write_mode)
1781 regcache_cooked_write_unsigned (as->regcache,
1782 S390_R0_REGNUM + as->gr,
1783 val);
1784 as->gr++;
1785 }
1786 else
1787 {
1788 if (write_mode)
1789 write_memory_unsigned_integer (as->argp, word_size,
1790 byte_order, val);
1791 as->argp += word_size;
1792 }
1793 }
1794 else if (s390_function_arg_integer (type) && length == 8)
1795 {
1796 if (as->gr <= 5)
1797 {
1798 if (write_mode)
1799 {
1800 as->regcache->cooked_write (S390_R0_REGNUM + as->gr,
1801 value_contents (arg));
1802 as->regcache->cooked_write (S390_R0_REGNUM + as->gr + 1,
1803 value_contents (arg) + word_size);
1804 }
1805 as->gr += 2;
1806 }
1807 else
1808 {
1809 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1810 in it, then don't go back and use it again later. */
1811 as->gr = 7;
1812
1813 if (write_mode)
1814 write_memory (as->argp, value_contents (arg), length);
1815 as->argp += length;
1816 }
1817 }
1818 else
1819 {
1820 /* This argument type is never passed in registers. Place the
1821 value in the copy area and pass a pointer to it. Use 8-byte
1822 alignment as a conservative assumption. */
1823 as->copy = align_down (as->copy - length, 8);
1824 if (write_mode)
1825 write_memory (as->copy, value_contents (arg), length);
1826
1827 if (as->gr <= 6)
1828 {
1829 if (write_mode)
1830 regcache_cooked_write_unsigned (as->regcache,
1831 S390_R0_REGNUM + as->gr,
1832 as->copy);
1833 as->gr++;
1834 }
1835 else
1836 {
1837 if (write_mode)
1838 write_memory_unsigned_integer (as->argp, word_size,
1839 byte_order, as->copy);
1840 as->argp += word_size;
1841 }
1842 }
1843 }
1844
1845 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1846 place to be passed to a function, as specified by the "GNU/Linux
1847 for S/390 ELF Application Binary Interface Supplement".
1848
1849 SP is the current stack pointer. We must put arguments, links,
1850 padding, etc. whereever they belong, and return the new stack
1851 pointer value.
1852
1853 If STRUCT_RETURN is non-zero, then the function we're calling is
1854 going to return a structure by value; STRUCT_ADDR is the address of
1855 a block we've allocated for it on the stack.
1856
1857 Our caller has taken care of any type promotions needed to satisfy
1858 prototypes or the old K&R argument-passing rules. */
1859
1860 static CORE_ADDR
1861 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1862 struct regcache *regcache, CORE_ADDR bp_addr,
1863 int nargs, struct value **args, CORE_ADDR sp,
1864 int struct_return, CORE_ADDR struct_addr)
1865 {
1866 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1867 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1868 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1869 int i;
1870 struct s390_arg_state arg_state, arg_prep;
1871 CORE_ADDR param_area_start, new_sp;
1872 struct type *ftype = check_typedef (value_type (function));
1873
1874 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
1875 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1876
1877 arg_prep.copy = sp;
1878 arg_prep.gr = struct_return ? 3 : 2;
1879 arg_prep.fr = 0;
1880 arg_prep.vr = 0;
1881 arg_prep.argp = 0;
1882 arg_prep.regcache = NULL;
1883
1884 /* Initialize arg_state for "preparation mode". */
1885 arg_state = arg_prep;
1886
1887 /* Update arg_state.copy with the start of the reference-to-copy area
1888 and arg_state.argp with the size of the parameter area. */
1889 for (i = 0; i < nargs; i++)
1890 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1891 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1892
1893 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1894
1895 /* Allocate the standard frame areas: the register save area, the
1896 word reserved for the compiler, and the back chain pointer. */
1897 new_sp = param_area_start - (16 * word_size + 32);
1898
1899 /* Now we have the final stack pointer. Make sure we didn't
1900 underflow; on 31-bit, this would result in addresses with the
1901 high bit set, which causes confusion elsewhere. Note that if we
1902 error out here, stack and registers remain untouched. */
1903 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1904 error (_("Stack overflow"));
1905
1906 /* Pass the structure return address in general register 2. */
1907 if (struct_return)
1908 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1909
1910 /* Initialize arg_state for "write mode". */
1911 arg_state = arg_prep;
1912 arg_state.argp = param_area_start;
1913 arg_state.regcache = regcache;
1914
1915 /* Write all parameters. */
1916 for (i = 0; i < nargs; i++)
1917 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1918 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1919
1920 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1921 if (word_size == 4)
1922 {
1923 ULONGEST pswa;
1924 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1925 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1926 }
1927 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1928
1929 /* Store updated stack pointer. */
1930 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1931
1932 /* We need to return the 'stack part' of the frame ID,
1933 which is actually the top of the register save area. */
1934 return param_area_start;
1935 }
1936
1937 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
1938 dummy frame. The frame ID's base needs to match the TOS value
1939 returned by push_dummy_call, and the PC match the dummy frame's
1940 breakpoint. */
1941
1942 static struct frame_id
1943 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1944 {
1945 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1946 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1947 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1948
1949 return frame_id_build (sp + 16*word_size + 32,
1950 get_frame_pc (this_frame));
1951 }
1952
1953 /* Implement frame_align gdbarch method. */
1954
1955 static CORE_ADDR
1956 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1957 {
1958 /* Both the 32- and 64-bit ABI's say that the stack pointer should
1959 always be aligned on an eight-byte boundary. */
1960 return (addr & -8);
1961 }
1962
1963 /* Helper for s390_return_value: Set or retrieve a function return
1964 value if it resides in a register. */
1965
1966 static void
1967 s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
1968 struct regcache *regcache,
1969 gdb_byte *out, const gdb_byte *in)
1970 {
1971 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1972 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1973 int length = TYPE_LENGTH (type);
1974 int code = TYPE_CODE (type);
1975
1976 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
1977 {
1978 /* Float-like value: left-aligned in f0. */
1979 if (in != NULL)
1980 regcache->cooked_write_part (S390_F0_REGNUM, 0, length, in);
1981 else
1982 regcache->cooked_read_part (S390_F0_REGNUM, 0, length, out);
1983 }
1984 else if (code == TYPE_CODE_ARRAY)
1985 {
1986 /* Vector: left-aligned in v24. */
1987 if (in != NULL)
1988 regcache->cooked_write_part (S390_V24_REGNUM, 0, length, in);
1989 else
1990 regcache->cooked_read_part (S390_V24_REGNUM, 0, length, out);
1991 }
1992 else if (length <= word_size)
1993 {
1994 /* Integer: zero- or sign-extended in r2. */
1995 if (out != NULL)
1996 regcache->cooked_read_part (S390_R2_REGNUM, word_size - length, length,
1997 out);
1998 else if (TYPE_UNSIGNED (type))
1999 regcache_cooked_write_unsigned
2000 (regcache, S390_R2_REGNUM,
2001 extract_unsigned_integer (in, length, byte_order));
2002 else
2003 regcache_cooked_write_signed
2004 (regcache, S390_R2_REGNUM,
2005 extract_signed_integer (in, length, byte_order));
2006 }
2007 else if (length == 2 * word_size)
2008 {
2009 /* Double word: in r2 and r3. */
2010 if (in != NULL)
2011 {
2012 regcache->cooked_write (S390_R2_REGNUM, in);
2013 regcache->cooked_write (S390_R3_REGNUM, in + word_size);
2014 }
2015 else
2016 {
2017 regcache->cooked_read (S390_R2_REGNUM, out);
2018 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
2019 }
2020 }
2021 else
2022 internal_error (__FILE__, __LINE__, _("invalid return type"));
2023 }
2024
2025 /* Implement the 'return_value' gdbarch method. */
2026
2027 static enum return_value_convention
2028 s390_return_value (struct gdbarch *gdbarch, struct value *function,
2029 struct type *type, struct regcache *regcache,
2030 gdb_byte *out, const gdb_byte *in)
2031 {
2032 enum return_value_convention rvc;
2033
2034 type = check_typedef (type);
2035
2036 switch (TYPE_CODE (type))
2037 {
2038 case TYPE_CODE_STRUCT:
2039 case TYPE_CODE_UNION:
2040 case TYPE_CODE_COMPLEX:
2041 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2042 break;
2043 case TYPE_CODE_ARRAY:
2044 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2045 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2046 ? RETURN_VALUE_REGISTER_CONVENTION
2047 : RETURN_VALUE_STRUCT_CONVENTION;
2048 break;
2049 default:
2050 rvc = TYPE_LENGTH (type) <= 8
2051 ? RETURN_VALUE_REGISTER_CONVENTION
2052 : RETURN_VALUE_STRUCT_CONVENTION;
2053 }
2054
2055 if (in != NULL || out != NULL)
2056 {
2057 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2058 s390_register_return_value (gdbarch, type, regcache, out, in);
2059 else if (in != NULL)
2060 error (_("Cannot set function return value."));
2061 else
2062 error (_("Function return value unknown."));
2063 }
2064
2065 return rvc;
2066 }
2067
2068 /* Frame unwinding. */
2069
2070 /* Implmement the stack_frame_destroyed_p gdbarch method. */
2071
2072 static int
2073 s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2074 {
2075 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2076
2077 /* In frameless functions, there's no frame to destroy and thus
2078 we don't care about the epilogue.
2079
2080 In functions with frame, the epilogue sequence is a pair of
2081 a LM-type instruction that restores (amongst others) the
2082 return register %r14 and the stack pointer %r15, followed
2083 by a branch 'br %r14' --or equivalent-- that effects the
2084 actual return.
2085
2086 In that situation, this function needs to return 'true' in
2087 exactly one case: when pc points to that branch instruction.
2088
2089 Thus we try to disassemble the one instructions immediately
2090 preceding pc and check whether it is an LM-type instruction
2091 modifying the stack pointer.
2092
2093 Note that disassembling backwards is not reliable, so there
2094 is a slight chance of false positives here ... */
2095
2096 bfd_byte insn[6];
2097 unsigned int r1, r3, b2;
2098 int d2;
2099
2100 if (word_size == 4
2101 && !target_read_memory (pc - 4, insn, 4)
2102 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2103 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2104 return 1;
2105
2106 if (word_size == 4
2107 && !target_read_memory (pc - 6, insn, 6)
2108 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2109 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2110 return 1;
2111
2112 if (word_size == 8
2113 && !target_read_memory (pc - 6, insn, 6)
2114 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2115 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2116 return 1;
2117
2118 return 0;
2119 }
2120
2121 /* Implement unwind_pc gdbarch method. */
2122
2123 static CORE_ADDR
2124 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2125 {
2126 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2127 ULONGEST pc;
2128 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2129 return gdbarch_addr_bits_remove (gdbarch, pc);
2130 }
2131
2132 /* Implement unwind_sp gdbarch method. */
2133
2134 static CORE_ADDR
2135 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2136 {
2137 ULONGEST sp;
2138 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2139 return gdbarch_addr_bits_remove (gdbarch, sp);
2140 }
2141
2142 /* Helper routine to unwind pseudo registers. */
2143
2144 static struct value *
2145 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2146 {
2147 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2148 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2149 struct type *type = register_type (gdbarch, regnum);
2150
2151 /* Unwind PC via PSW address. */
2152 if (regnum == tdep->pc_regnum)
2153 {
2154 struct value *val;
2155
2156 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2157 if (!value_optimized_out (val))
2158 {
2159 LONGEST pswa = value_as_long (val);
2160
2161 if (TYPE_LENGTH (type) == 4)
2162 return value_from_pointer (type, pswa & 0x7fffffff);
2163 else
2164 return value_from_pointer (type, pswa);
2165 }
2166 }
2167
2168 /* Unwind CC via PSW mask. */
2169 if (regnum == tdep->cc_regnum)
2170 {
2171 struct value *val;
2172
2173 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2174 if (!value_optimized_out (val))
2175 {
2176 LONGEST pswm = value_as_long (val);
2177
2178 if (TYPE_LENGTH (type) == 4)
2179 return value_from_longest (type, (pswm >> 12) & 3);
2180 else
2181 return value_from_longest (type, (pswm >> 44) & 3);
2182 }
2183 }
2184
2185 /* Unwind full GPRs to show at least the lower halves (as the
2186 upper halves are undefined). */
2187 if (regnum_is_gpr_full (tdep, regnum))
2188 {
2189 int reg = regnum - tdep->gpr_full_regnum;
2190 struct value *val;
2191
2192 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2193 if (!value_optimized_out (val))
2194 return value_cast (type, val);
2195 }
2196
2197 return allocate_optimized_out_value (type);
2198 }
2199
2200 /* Translate a .eh_frame register to DWARF register, or adjust a
2201 .debug_frame register. */
2202
2203 static int
2204 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2205 {
2206 /* See s390_dwarf_reg_to_regnum for comments. */
2207 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2208 }
2209
2210 /* DWARF-2 frame unwinding. */
2211
2212 /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2213 s390_dwarf2_frame_init_reg. */
2214
2215 static struct value *
2216 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2217 int regnum)
2218 {
2219 return s390_unwind_pseudo_register (this_frame, regnum);
2220 }
2221
2222 /* Implement init_reg dwarf2_frame method. */
2223
2224 static void
2225 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2226 struct dwarf2_frame_state_reg *reg,
2227 struct frame_info *this_frame)
2228 {
2229 /* The condition code (and thus PSW mask) is call-clobbered. */
2230 if (regnum == S390_PSWM_REGNUM)
2231 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2232
2233 /* The PSW address unwinds to the return address. */
2234 else if (regnum == S390_PSWA_REGNUM)
2235 reg->how = DWARF2_FRAME_REG_RA;
2236
2237 /* Fixed registers are call-saved or call-clobbered
2238 depending on the ABI in use. */
2239 else if (regnum < S390_NUM_REGS)
2240 {
2241 if (s390_register_call_saved (gdbarch, regnum))
2242 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2243 else
2244 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2245 }
2246
2247 /* We install a special function to unwind pseudos. */
2248 else
2249 {
2250 reg->how = DWARF2_FRAME_REG_FN;
2251 reg->loc.fn = s390_dwarf2_prev_register;
2252 }
2253 }
2254
2255 /* Frame unwinding. */
2256
2257 /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2258 register translation. */
2259
2260 struct value *
2261 s390_trad_frame_prev_register (struct frame_info *this_frame,
2262 struct trad_frame_saved_reg saved_regs[],
2263 int regnum)
2264 {
2265 if (regnum < S390_NUM_REGS)
2266 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2267 else
2268 return s390_unwind_pseudo_register (this_frame, regnum);
2269 }
2270
2271 /* Normal stack frames. */
2272
2273 struct s390_unwind_cache {
2274
2275 CORE_ADDR func;
2276 CORE_ADDR frame_base;
2277 CORE_ADDR local_base;
2278
2279 struct trad_frame_saved_reg *saved_regs;
2280 };
2281
2282 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2283 prologue analysis. Helper for s390_frame_unwind_cache. */
2284
2285 static int
2286 s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2287 struct s390_unwind_cache *info)
2288 {
2289 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2290 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2291 struct s390_prologue_data data;
2292 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2293 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2294 int i;
2295 CORE_ADDR cfa;
2296 CORE_ADDR func;
2297 CORE_ADDR result;
2298 ULONGEST reg;
2299 CORE_ADDR prev_sp;
2300 int frame_pointer;
2301 int size;
2302 struct frame_info *next_frame;
2303
2304 /* Try to find the function start address. If we can't find it, we don't
2305 bother searching for it -- with modern compilers this would be mostly
2306 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2307 or else a valid backchain ... */
2308 if (!get_frame_func_if_available (this_frame, &info->func))
2309 {
2310 info->func = -1;
2311 return 0;
2312 }
2313 func = info->func;
2314
2315 /* Try to analyze the prologue. */
2316 result = s390_analyze_prologue (gdbarch, func,
2317 get_frame_pc (this_frame), &data);
2318 if (!result)
2319 return 0;
2320
2321 /* If this was successful, we should have found the instruction that
2322 sets the stack pointer register to the previous value of the stack
2323 pointer minus the frame size. */
2324 if (!pv_is_register (*sp, S390_SP_REGNUM))
2325 return 0;
2326
2327 /* A frame size of zero at this point can mean either a real
2328 frameless function, or else a failure to find the prologue.
2329 Perform some sanity checks to verify we really have a
2330 frameless function. */
2331 if (sp->k == 0)
2332 {
2333 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2334 size zero. This is only possible if the next frame is a sentinel
2335 frame, a dummy frame, or a signal trampoline frame. */
2336 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2337 needed, instead the code should simpliy rely on its
2338 analysis. */
2339 next_frame = get_next_frame (this_frame);
2340 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2341 next_frame = get_next_frame (next_frame);
2342 if (next_frame
2343 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2344 return 0;
2345
2346 /* If we really have a frameless function, %r14 must be valid
2347 -- in particular, it must point to a different function. */
2348 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2349 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2350 if (get_pc_function_start (reg) == func)
2351 {
2352 /* However, there is one case where it *is* valid for %r14
2353 to point to the same function -- if this is a recursive
2354 call, and we have stopped in the prologue *before* the
2355 stack frame was allocated.
2356
2357 Recognize this case by looking ahead a bit ... */
2358
2359 struct s390_prologue_data data2;
2360 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2361
2362 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
2363 && pv_is_register (*sp, S390_SP_REGNUM)
2364 && sp->k != 0))
2365 return 0;
2366 }
2367 }
2368
2369 /* OK, we've found valid prologue data. */
2370 size = -sp->k;
2371
2372 /* If the frame pointer originally also holds the same value
2373 as the stack pointer, we're probably using it. If it holds
2374 some other value -- even a constant offset -- it is most
2375 likely used as temp register. */
2376 if (pv_is_identical (*sp, *fp))
2377 frame_pointer = S390_FRAME_REGNUM;
2378 else
2379 frame_pointer = S390_SP_REGNUM;
2380
2381 /* If we've detected a function with stack frame, we'll still have to
2382 treat it as frameless if we're currently within the function epilog
2383 code at a point where the frame pointer has already been restored.
2384 This can only happen in an innermost frame. */
2385 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2386 instead the code should simpliy rely on its analysis. */
2387 next_frame = get_next_frame (this_frame);
2388 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2389 next_frame = get_next_frame (next_frame);
2390 if (size > 0
2391 && (next_frame == NULL
2392 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2393 {
2394 /* See the comment in s390_stack_frame_destroyed_p on why this is
2395 not completely reliable ... */
2396 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2397 {
2398 memset (&data, 0, sizeof (data));
2399 size = 0;
2400 frame_pointer = S390_SP_REGNUM;
2401 }
2402 }
2403
2404 /* Once we know the frame register and the frame size, we can unwind
2405 the current value of the frame register from the next frame, and
2406 add back the frame size to arrive that the previous frame's
2407 stack pointer value. */
2408 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2409 cfa = prev_sp + 16*word_size + 32;
2410
2411 /* Set up ABI call-saved/call-clobbered registers. */
2412 for (i = 0; i < S390_NUM_REGS; i++)
2413 if (!s390_register_call_saved (gdbarch, i))
2414 trad_frame_set_unknown (info->saved_regs, i);
2415
2416 /* CC is always call-clobbered. */
2417 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2418
2419 /* Record the addresses of all register spill slots the prologue parser
2420 has recognized. Consider only registers defined as call-saved by the
2421 ABI; for call-clobbered registers the parser may have recognized
2422 spurious stores. */
2423
2424 for (i = 0; i < 16; i++)
2425 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2426 && data.gpr_slot[i] != 0)
2427 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
2428
2429 for (i = 0; i < 16; i++)
2430 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2431 && data.fpr_slot[i] != 0)
2432 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
2433
2434 /* Function return will set PC to %r14. */
2435 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2436
2437 /* In frameless functions, we unwind simply by moving the return
2438 address to the PC. However, if we actually stored to the
2439 save area, use that -- we might only think the function frameless
2440 because we're in the middle of the prologue ... */
2441 if (size == 0
2442 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2443 {
2444 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2445 }
2446
2447 /* Another sanity check: unless this is a frameless function,
2448 we should have found spill slots for SP and PC.
2449 If not, we cannot unwind further -- this happens e.g. in
2450 libc's thread_start routine. */
2451 if (size > 0)
2452 {
2453 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
2454 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2455 prev_sp = -1;
2456 }
2457
2458 /* We use the current value of the frame register as local_base,
2459 and the top of the register save area as frame_base. */
2460 if (prev_sp != -1)
2461 {
2462 info->frame_base = prev_sp + 16*word_size + 32;
2463 info->local_base = prev_sp - size;
2464 }
2465
2466 return 1;
2467 }
2468
2469 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2470 back chain unwinding. Helper for s390_frame_unwind_cache. */
2471
2472 static void
2473 s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2474 struct s390_unwind_cache *info)
2475 {
2476 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2477 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2478 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2479 CORE_ADDR backchain;
2480 ULONGEST reg;
2481 LONGEST sp, tmp;
2482 int i;
2483
2484 /* Set up ABI call-saved/call-clobbered registers. */
2485 for (i = 0; i < S390_NUM_REGS; i++)
2486 if (!s390_register_call_saved (gdbarch, i))
2487 trad_frame_set_unknown (info->saved_regs, i);
2488
2489 /* CC is always call-clobbered. */
2490 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2491
2492 /* Get the backchain. */
2493 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2494 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2495 tmp = 0;
2496 backchain = (CORE_ADDR) tmp;
2497
2498 /* A zero backchain terminates the frame chain. As additional
2499 sanity check, let's verify that the spill slot for SP in the
2500 save area pointed to by the backchain in fact links back to
2501 the save area. */
2502 if (backchain != 0
2503 && safe_read_memory_integer (backchain + 15*word_size,
2504 word_size, byte_order, &sp)
2505 && (CORE_ADDR)sp == backchain)
2506 {
2507 /* We don't know which registers were saved, but it will have
2508 to be at least %r14 and %r15. This will allow us to continue
2509 unwinding, but other prev-frame registers may be incorrect ... */
2510 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2511 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2512
2513 /* Function return will set PC to %r14. */
2514 info->saved_regs[S390_PSWA_REGNUM]
2515 = info->saved_regs[S390_RETADDR_REGNUM];
2516
2517 /* We use the current value of the frame register as local_base,
2518 and the top of the register save area as frame_base. */
2519 info->frame_base = backchain + 16*word_size + 32;
2520 info->local_base = reg;
2521 }
2522
2523 info->func = get_frame_pc (this_frame);
2524 }
2525
2526 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2527 s390_frame_unwind and s390_frame_base. */
2528
2529 static struct s390_unwind_cache *
2530 s390_frame_unwind_cache (struct frame_info *this_frame,
2531 void **this_prologue_cache)
2532 {
2533 struct s390_unwind_cache *info;
2534
2535 if (*this_prologue_cache)
2536 return (struct s390_unwind_cache *) *this_prologue_cache;
2537
2538 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2539 *this_prologue_cache = info;
2540 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2541 info->func = -1;
2542 info->frame_base = -1;
2543 info->local_base = -1;
2544
2545 TRY
2546 {
2547 /* Try to use prologue analysis to fill the unwind cache.
2548 If this fails, fall back to reading the stack backchain. */
2549 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2550 s390_backchain_frame_unwind_cache (this_frame, info);
2551 }
2552 CATCH (ex, RETURN_MASK_ERROR)
2553 {
2554 if (ex.error != NOT_AVAILABLE_ERROR)
2555 throw_exception (ex);
2556 }
2557 END_CATCH
2558
2559 return info;
2560 }
2561
2562 /* Implement this_id frame_unwind method for s390_frame_unwind. */
2563
2564 static void
2565 s390_frame_this_id (struct frame_info *this_frame,
2566 void **this_prologue_cache,
2567 struct frame_id *this_id)
2568 {
2569 struct s390_unwind_cache *info
2570 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2571
2572 if (info->frame_base == -1)
2573 {
2574 if (info->func != -1)
2575 *this_id = frame_id_build_unavailable_stack (info->func);
2576 return;
2577 }
2578
2579 *this_id = frame_id_build (info->frame_base, info->func);
2580 }
2581
2582 /* Implement prev_register frame_unwind method for s390_frame_unwind. */
2583
2584 static struct value *
2585 s390_frame_prev_register (struct frame_info *this_frame,
2586 void **this_prologue_cache, int regnum)
2587 {
2588 struct s390_unwind_cache *info
2589 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2590
2591 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2592 }
2593
2594 /* Default S390 frame unwinder. */
2595
2596 static const struct frame_unwind s390_frame_unwind = {
2597 NORMAL_FRAME,
2598 default_frame_unwind_stop_reason,
2599 s390_frame_this_id,
2600 s390_frame_prev_register,
2601 NULL,
2602 default_frame_sniffer
2603 };
2604
2605 /* Code stubs and their stack frames. For things like PLTs and NULL
2606 function calls (where there is no true frame and the return address
2607 is in the RETADDR register). */
2608
2609 struct s390_stub_unwind_cache
2610 {
2611 CORE_ADDR frame_base;
2612 struct trad_frame_saved_reg *saved_regs;
2613 };
2614
2615 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2616 s390_stub_frame_unwind. */
2617
2618 static struct s390_stub_unwind_cache *
2619 s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2620 void **this_prologue_cache)
2621 {
2622 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2623 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2624 struct s390_stub_unwind_cache *info;
2625 ULONGEST reg;
2626
2627 if (*this_prologue_cache)
2628 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2629
2630 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2631 *this_prologue_cache = info;
2632 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2633
2634 /* The return address is in register %r14. */
2635 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2636
2637 /* Retrieve stack pointer and determine our frame base. */
2638 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2639 info->frame_base = reg + 16*word_size + 32;
2640
2641 return info;
2642 }
2643
2644 /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2645
2646 static void
2647 s390_stub_frame_this_id (struct frame_info *this_frame,
2648 void **this_prologue_cache,
2649 struct frame_id *this_id)
2650 {
2651 struct s390_stub_unwind_cache *info
2652 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2653 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2654 }
2655
2656 /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2657
2658 static struct value *
2659 s390_stub_frame_prev_register (struct frame_info *this_frame,
2660 void **this_prologue_cache, int regnum)
2661 {
2662 struct s390_stub_unwind_cache *info
2663 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2664 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2665 }
2666
2667 /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2668
2669 static int
2670 s390_stub_frame_sniffer (const struct frame_unwind *self,
2671 struct frame_info *this_frame,
2672 void **this_prologue_cache)
2673 {
2674 CORE_ADDR addr_in_block;
2675 bfd_byte insn[S390_MAX_INSTR_SIZE];
2676
2677 /* If the current PC points to non-readable memory, we assume we
2678 have trapped due to an invalid function pointer call. We handle
2679 the non-existing current function like a PLT stub. */
2680 addr_in_block = get_frame_address_in_block (this_frame);
2681 if (in_plt_section (addr_in_block)
2682 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2683 return 1;
2684 return 0;
2685 }
2686
2687 /* S390 stub frame unwinder. */
2688
2689 static const struct frame_unwind s390_stub_frame_unwind = {
2690 NORMAL_FRAME,
2691 default_frame_unwind_stop_reason,
2692 s390_stub_frame_this_id,
2693 s390_stub_frame_prev_register,
2694 NULL,
2695 s390_stub_frame_sniffer
2696 };
2697
2698 /* Frame base handling. */
2699
2700 static CORE_ADDR
2701 s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2702 {
2703 struct s390_unwind_cache *info
2704 = s390_frame_unwind_cache (this_frame, this_cache);
2705 return info->frame_base;
2706 }
2707
2708 static CORE_ADDR
2709 s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2710 {
2711 struct s390_unwind_cache *info
2712 = s390_frame_unwind_cache (this_frame, this_cache);
2713 return info->local_base;
2714 }
2715
2716 static const struct frame_base s390_frame_base = {
2717 &s390_frame_unwind,
2718 s390_frame_base_address,
2719 s390_local_base_address,
2720 s390_local_base_address
2721 };
2722
2723 /* Process record-replay */
2724
2725 /* Takes the intermediate sum of address calculations and masks off upper
2726 bits according to current addressing mode. */
2727
2728 static CORE_ADDR
2729 s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2730 CORE_ADDR val)
2731 {
2732 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2733 ULONGEST pswm, pswa;
2734 int am;
2735 if (tdep->abi == ABI_LINUX_S390)
2736 {
2737 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2738 am = pswa >> 31 & 1;
2739 }
2740 else
2741 {
2742 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2743 am = pswm >> 31 & 3;
2744 }
2745 switch (am)
2746 {
2747 case 0:
2748 return val & 0xffffff;
2749 case 1:
2750 return val & 0x7fffffff;
2751 case 3:
2752 return val;
2753 default:
2754 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2755 return 0;
2756 }
2757 }
2758
2759 /* Calculates memory address using pre-calculated index, raw instruction word
2760 with b and d/dl fields, and raw instruction byte with dh field. Index and
2761 dh should be set to 0 if unused. */
2762
2763 static CORE_ADDR
2764 s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2765 ULONGEST x, uint16_t bd, int8_t dh)
2766 {
2767 uint8_t rb = bd >> 12 & 0xf;
2768 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2769 ULONGEST b;
2770 CORE_ADDR res = d + x;
2771 if (rb)
2772 {
2773 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2774 res += b;
2775 }
2776 return s390_record_address_mask (gdbarch, regcache, res);
2777 }
2778
2779 /* Calculates memory address using raw x, b + d/dl, dh fields from
2780 instruction. rx and dh should be set to 0 if unused. */
2781
2782 static CORE_ADDR
2783 s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2784 uint8_t rx, uint16_t bd, int8_t dh)
2785 {
2786 ULONGEST x = 0;
2787 if (rx)
2788 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2789 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2790 }
2791
2792 /* Calculates memory address for VSCE[GF] instructions. */
2793
2794 static int
2795 s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2796 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2797 int8_t dh, CORE_ADDR *res)
2798 {
2799 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2800 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2801 ULONGEST x;
2802 gdb_byte buf[16];
2803 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2804 return -1;
2805 if (vx < 16)
2806 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
2807 else
2808 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
2809 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2810 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2811 return 0;
2812 }
2813
2814 /* Calculates memory address for instructions with relative long addressing. */
2815
2816 static CORE_ADDR
2817 s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2818 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2819 {
2820 int32_t ri = i1 << 16 | i2;
2821 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2822 }
2823
2824 /* Population count helper. */
2825
2826 static int s390_popcnt (unsigned int x) {
2827 int res = 0;
2828 while (x)
2829 {
2830 if (x & 1)
2831 res++;
2832 x >>= 1;
2833 }
2834 return res;
2835 }
2836
2837 /* Record 64-bit register. */
2838
2839 static int
2840 s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2841 {
2842 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2843 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2844 return -1;
2845 if (tdep->abi == ABI_LINUX_S390)
2846 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2847 return -1;
2848 return 0;
2849 }
2850
2851 /* Record high 32 bits of a register. */
2852
2853 static int
2854 s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2855 {
2856 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2857 if (tdep->abi == ABI_LINUX_S390)
2858 {
2859 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2860 return -1;
2861 }
2862 else
2863 {
2864 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2865 return -1;
2866 }
2867 return 0;
2868 }
2869
2870 /* Record vector register. */
2871
2872 static int
2873 s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2874 {
2875 if (i < 16)
2876 {
2877 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2878 return -1;
2879 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2880 return -1;
2881 }
2882 else
2883 {
2884 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2885 return -1;
2886 }
2887 return 0;
2888 }
2889
2890 /* Implement process_record gdbarch method. */
2891
2892 static int
2893 s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2894 CORE_ADDR addr)
2895 {
2896 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2897 uint16_t insn[3] = {0};
2898 /* Instruction as bytes. */
2899 uint8_t ibyte[6];
2900 /* Instruction as nibbles. */
2901 uint8_t inib[12];
2902 /* Instruction vector registers. */
2903 uint8_t ivec[4];
2904 CORE_ADDR oaddr, oaddr2, oaddr3;
2905 ULONGEST tmp;
2906 int i, n;
2907 /* if EX/EXRL instruction used, here's the reg parameter */
2908 int ex = -1;
2909 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2910
2911 /* Attempting to use EX or EXRL jumps back here */
2912 ex:
2913
2914 /* Read instruction. */
2915 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2916 /* If execute was involved, do the adjustment. */
2917 if (ex != -1)
2918 insn[0] |= ex & 0xff;
2919 /* Two highest bits determine instruction size. */
2920 if (insn[0] >= 0x4000)
2921 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2922 else
2923 /* Not necessary, but avoids uninitialized variable warnings. */
2924 insn[1] = 0;
2925 if (insn[0] >= 0xc000)
2926 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2927 else
2928 insn[2] = 0;
2929 /* Split instruction into bytes and nibbles. */
2930 for (i = 0; i < 3; i++)
2931 {
2932 ibyte[i*2] = insn[i] >> 8 & 0xff;
2933 ibyte[i*2+1] = insn[i] & 0xff;
2934 }
2935 for (i = 0; i < 6; i++)
2936 {
2937 inib[i*2] = ibyte[i] >> 4 & 0xf;
2938 inib[i*2+1] = ibyte[i] & 0xf;
2939 }
2940 /* Compute vector registers, if applicable. */
2941 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2942 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2943 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2944 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2945
2946 switch (ibyte[0])
2947 {
2948 /* 0x00 undefined */
2949
2950 case 0x01:
2951 /* E-format instruction */
2952 switch (ibyte[1])
2953 {
2954 /* 0x00 undefined */
2955 /* 0x01 unsupported: PR - program return */
2956 /* 0x02 unsupported: UPT */
2957 /* 0x03 undefined */
2958 /* 0x04 privileged: PTFF - perform timing facility function */
2959 /* 0x05-0x06 undefined */
2960 /* 0x07 privileged: SCKPF - set clock programmable field */
2961 /* 0x08-0x09 undefined */
2962
2963 case 0x0a: /* PFPO - perform floating point operation */
2964 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
2965 if (!(tmp & 0x80000000u))
2966 {
2967 uint8_t ofc = tmp >> 16 & 0xff;
2968 switch (ofc)
2969 {
2970 case 0x00: /* HFP32 */
2971 case 0x01: /* HFP64 */
2972 case 0x05: /* BFP32 */
2973 case 0x06: /* BFP64 */
2974 case 0x08: /* DFP32 */
2975 case 0x09: /* DFP64 */
2976 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2977 return -1;
2978 break;
2979 case 0x02: /* HFP128 */
2980 case 0x07: /* BFP128 */
2981 case 0x0a: /* DFP128 */
2982 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2983 return -1;
2984 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
2985 return -1;
2986 break;
2987 default:
2988 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
2989 ofc, paddress (gdbarch, addr));
2990 return -1;
2991 }
2992
2993 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
2994 return -1;
2995 }
2996 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
2997 return -1;
2998 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2999 return -1;
3000 break;
3001
3002 case 0x0b: /* TAM - test address mode */
3003 case 0x0c: /* SAM24 - set address mode 24 */
3004 case 0x0d: /* SAM31 - set address mode 31 */
3005 case 0x0e: /* SAM64 - set address mode 64 */
3006 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3007 return -1;
3008 break;
3009
3010 /* 0x0f-0xfe undefined */
3011
3012 /* 0xff unsupported: TRAP */
3013
3014 default:
3015 goto UNKNOWN_OP;
3016 }
3017 break;
3018
3019 /* 0x02 undefined */
3020 /* 0x03 undefined */
3021
3022 case 0x04: /* SPM - set program mask */
3023 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3024 return -1;
3025 break;
3026
3027 case 0x05: /* BALR - branch and link */
3028 case 0x45: /* BAL - branch and link */
3029 case 0x06: /* BCTR - branch on count */
3030 case 0x46: /* BCT - branch on count */
3031 case 0x0d: /* BASR - branch and save */
3032 case 0x4d: /* BAS - branch and save */
3033 case 0x84: /* BRXH - branch relative on index high */
3034 case 0x85: /* BRXLE - branch relative on index low or equal */
3035 case 0x86: /* BXH - branch on index high */
3036 case 0x87: /* BXLE - branch on index low or equal */
3037 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3038 use 32-bit destination as counter. */
3039 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3040 return -1;
3041 break;
3042
3043 case 0x07: /* BCR - branch on condition */
3044 case 0x47: /* BC - branch on condition */
3045 /* No effect other than PC transfer. */
3046 break;
3047
3048 /* 0x08 undefined */
3049 /* 0x09 undefined */
3050
3051 case 0x0a:
3052 /* SVC - supervisor call */
3053 if (tdep->s390_syscall_record != NULL)
3054 {
3055 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3056 return -1;
3057 }
3058 else
3059 {
3060 printf_unfiltered (_("no syscall record support\n"));
3061 return -1;
3062 }
3063 break;
3064
3065 case 0x0b: /* BSM - branch and set mode */
3066 if (inib[2])
3067 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3068 return -1;
3069 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3070 return -1;
3071 break;
3072
3073 case 0x0c: /* BASSM - branch and save and set mode */
3074 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3075 return -1;
3076 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3077 return -1;
3078 break;
3079
3080 case 0x0e: /* MVCL - move long [interruptible] */
3081 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3082 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3083 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3084 tmp &= 0xffffff;
3085 if (record_full_arch_list_add_mem (oaddr, tmp))
3086 return -1;
3087 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3088 return -1;
3089 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3090 return -1;
3091 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3092 return -1;
3093 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3094 return -1;
3095 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3096 return -1;
3097 break;
3098
3099 case 0x0f: /* CLCL - compare logical long [interruptible] */
3100 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3101 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3102 return -1;
3103 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3104 return -1;
3105 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3106 return -1;
3107 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3108 return -1;
3109 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3110 return -1;
3111 break;
3112
3113 case 0x10: /* LPR - load positive */
3114 case 0x11: /* LNR - load negative */
3115 case 0x12: /* LTR - load and test */
3116 case 0x13: /* LCR - load complement */
3117 case 0x14: /* NR - and */
3118 case 0x16: /* OR - or */
3119 case 0x17: /* XR - xor */
3120 case 0x1a: /* AR - add */
3121 case 0x1b: /* SR - subtract */
3122 case 0x1e: /* ALR - add logical */
3123 case 0x1f: /* SLR - subtract logical */
3124 case 0x54: /* N - and */
3125 case 0x56: /* O - or */
3126 case 0x57: /* X - xor */
3127 case 0x5a: /* A - add */
3128 case 0x5b: /* S - subtract */
3129 case 0x5e: /* AL - add logical */
3130 case 0x5f: /* SL - subtract logical */
3131 case 0x4a: /* AH - add halfword */
3132 case 0x4b: /* SH - subtract halfword */
3133 case 0x8a: /* SRA - shift right single */
3134 case 0x8b: /* SLA - shift left single */
3135 case 0xbf: /* ICM - insert characters under mask */
3136 /* 32-bit destination + flags */
3137 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3138 return -1;
3139 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3140 return -1;
3141 break;
3142
3143 case 0x15: /* CLR - compare logical */
3144 case 0x55: /* CL - compare logical */
3145 case 0x19: /* CR - compare */
3146 case 0x29: /* CDR - compare */
3147 case 0x39: /* CER - compare */
3148 case 0x49: /* CH - compare halfword */
3149 case 0x59: /* C - compare */
3150 case 0x69: /* CD - compare */
3151 case 0x79: /* CE - compare */
3152 case 0x91: /* TM - test under mask */
3153 case 0x95: /* CLI - compare logical */
3154 case 0xbd: /* CLM - compare logical under mask */
3155 case 0xd5: /* CLC - compare logical */
3156 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3157 return -1;
3158 break;
3159
3160 case 0x18: /* LR - load */
3161 case 0x48: /* LH - load halfword */
3162 case 0x58: /* L - load */
3163 case 0x41: /* LA - load address */
3164 case 0x43: /* IC - insert character */
3165 case 0x4c: /* MH - multiply halfword */
3166 case 0x71: /* MS - multiply single */
3167 case 0x88: /* SRL - shift right single logical */
3168 case 0x89: /* SLL - shift left single logical */
3169 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3170 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3171 return -1;
3172 break;
3173
3174 case 0x1c: /* MR - multiply */
3175 case 0x5c: /* M - multiply */
3176 case 0x1d: /* DR - divide */
3177 case 0x5d: /* D - divide */
3178 case 0x8c: /* SRDL - shift right double logical */
3179 case 0x8d: /* SLDL - shift left double logical */
3180 /* 32-bit pair destination, no flags */
3181 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3182 return -1;
3183 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3184 return -1;
3185 break;
3186
3187 case 0x20: /* LPDR - load positive */
3188 case 0x30: /* LPER - load positive */
3189 case 0x21: /* LNDR - load negative */
3190 case 0x31: /* LNER - load negative */
3191 case 0x22: /* LTDR - load and test */
3192 case 0x32: /* LTER - load and test */
3193 case 0x23: /* LCDR - load complement */
3194 case 0x33: /* LCER - load complement */
3195 case 0x2a: /* ADR - add */
3196 case 0x3a: /* AER - add */
3197 case 0x6a: /* AD - add */
3198 case 0x7a: /* AE - add */
3199 case 0x2b: /* SDR - subtract */
3200 case 0x3b: /* SER - subtract */
3201 case 0x6b: /* SD - subtract */
3202 case 0x7b: /* SE - subtract */
3203 case 0x2e: /* AWR - add unnormalized */
3204 case 0x3e: /* AUR - add unnormalized */
3205 case 0x6e: /* AW - add unnormalized */
3206 case 0x7e: /* AU - add unnormalized */
3207 case 0x2f: /* SWR - subtract unnormalized */
3208 case 0x3f: /* SUR - subtract unnormalized */
3209 case 0x6f: /* SW - subtract unnormalized */
3210 case 0x7f: /* SU - subtract unnormalized */
3211 /* float destination + flags */
3212 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3213 return -1;
3214 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3215 return -1;
3216 break;
3217
3218 case 0x24: /* HDR - halve */
3219 case 0x34: /* HER - halve */
3220 case 0x25: /* LDXR - load rounded */
3221 case 0x35: /* LEDR - load rounded */
3222 case 0x28: /* LDR - load */
3223 case 0x38: /* LER - load */
3224 case 0x68: /* LD - load */
3225 case 0x78: /* LE - load */
3226 case 0x2c: /* MDR - multiply */
3227 case 0x3c: /* MDER - multiply */
3228 case 0x6c: /* MD - multiply */
3229 case 0x7c: /* MDE - multiply */
3230 case 0x2d: /* DDR - divide */
3231 case 0x3d: /* DER - divide */
3232 case 0x6d: /* DD - divide */
3233 case 0x7d: /* DE - divide */
3234 /* float destination, no flags */
3235 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3236 return -1;
3237 break;
3238
3239 case 0x26: /* MXR - multiply */
3240 case 0x27: /* MXDR - multiply */
3241 case 0x67: /* MXD - multiply */
3242 /* float pair destination, no flags */
3243 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3244 return -1;
3245 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3246 return -1;
3247 break;
3248
3249 case 0x36: /* AXR - add */
3250 case 0x37: /* SXR - subtract */
3251 /* float pair destination + flags */
3252 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3253 return -1;
3254 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3255 return -1;
3256 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3257 return -1;
3258 break;
3259
3260 case 0x40: /* STH - store halfword */
3261 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3262 if (record_full_arch_list_add_mem (oaddr, 2))
3263 return -1;
3264 break;
3265
3266 case 0x42: /* STC - store character */
3267 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3268 if (record_full_arch_list_add_mem (oaddr, 1))
3269 return -1;
3270 break;
3271
3272 case 0x44: /* EX - execute */
3273 if (ex != -1)
3274 {
3275 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
3276 paddress (gdbarch, addr));
3277 return -1;
3278 }
3279 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3280 if (inib[2])
3281 {
3282 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3283 ex = tmp & 0xff;
3284 }
3285 else
3286 {
3287 ex = 0;
3288 }
3289 goto ex;
3290
3291 case 0x4e: /* CVD - convert to decimal */
3292 case 0x60: /* STD - store */
3293 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3294 if (record_full_arch_list_add_mem (oaddr, 8))
3295 return -1;
3296 break;
3297
3298 case 0x4f: /* CVB - convert to binary */
3299 /* 32-bit gpr destination + FPC (DXC write) */
3300 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3301 return -1;
3302 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3303 return -1;
3304 break;
3305
3306 case 0x50: /* ST - store */
3307 case 0x70: /* STE - store */
3308 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3309 if (record_full_arch_list_add_mem (oaddr, 4))
3310 return -1;
3311 break;
3312
3313 case 0x51: /* LAE - load address extended */
3314 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3315 return -1;
3316 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3317 return -1;
3318 break;
3319
3320 /* 0x52 undefined */
3321 /* 0x53 undefined */
3322
3323 /* 0x61-0x66 undefined */
3324
3325 /* 0x72-0x77 undefined */
3326
3327 /* 0x80 privileged: SSM - set system mask */
3328 /* 0x81 undefined */
3329 /* 0x82 privileged: LPSW - load PSW */
3330 /* 0x83 privileged: diagnose */
3331
3332 case 0x8e: /* SRDA - shift right double */
3333 case 0x8f: /* SLDA - shift left double */
3334 /* 32-bit pair destination + flags */
3335 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3336 return -1;
3337 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3338 return -1;
3339 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3340 return -1;
3341 break;
3342
3343 case 0x90: /* STM - store multiple */
3344 case 0x9b: /* STAM - store access multiple */
3345 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3346 if (inib[2] <= inib[3])
3347 n = inib[3] - inib[2] + 1;
3348 else
3349 n = inib[3] + 0x10 - inib[2] + 1;
3350 if (record_full_arch_list_add_mem (oaddr, n * 4))
3351 return -1;
3352 break;
3353
3354 case 0x92: /* MVI - move */
3355 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3356 if (record_full_arch_list_add_mem (oaddr, 1))
3357 return -1;
3358 break;
3359
3360 case 0x93: /* TS - test and set */
3361 case 0x94: /* NI - and */
3362 case 0x96: /* OI - or */
3363 case 0x97: /* XI - xor */
3364 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3365 if (record_full_arch_list_add_mem (oaddr, 1))
3366 return -1;
3367 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3368 return -1;
3369 break;
3370
3371 case 0x98: /* LM - load multiple */
3372 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3373 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3374 return -1;
3375 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3376 return -1;
3377 break;
3378
3379 /* 0x99 privileged: TRACE */
3380
3381 case 0x9a: /* LAM - load access multiple */
3382 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3383 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3384 return -1;
3385 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3386 return -1;
3387 break;
3388
3389 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3390 /* 0xa0-0xa4 undefined */
3391
3392 case 0xa5:
3393 case 0xa7:
3394 /* RI-format instruction */
3395 switch (ibyte[0] << 4 | inib[3])
3396 {
3397 case 0xa50: /* IIHH - insert immediate */
3398 case 0xa51: /* IIHL - insert immediate */
3399 /* high 32-bit destination */
3400 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3401 return -1;
3402 break;
3403
3404 case 0xa52: /* IILH - insert immediate */
3405 case 0xa53: /* IILL - insert immediate */
3406 case 0xa75: /* BRAS - branch relative and save */
3407 case 0xa76: /* BRCT - branch relative on count */
3408 case 0xa78: /* LHI - load halfword immediate */
3409 case 0xa7c: /* MHI - multiply halfword immediate */
3410 /* 32-bit or native destination */
3411 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3412 return -1;
3413 break;
3414
3415 case 0xa54: /* NIHH - and immediate */
3416 case 0xa55: /* NIHL - and immediate */
3417 case 0xa58: /* OIHH - or immediate */
3418 case 0xa59: /* OIHL - or immediate */
3419 /* high 32-bit destination + flags */
3420 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3421 return -1;
3422 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3423 return -1;
3424 break;
3425
3426 case 0xa56: /* NILH - and immediate */
3427 case 0xa57: /* NILL - and immediate */
3428 case 0xa5a: /* OILH - or immediate */
3429 case 0xa5b: /* OILL - or immediate */
3430 case 0xa7a: /* AHI - add halfword immediate */
3431 /* 32-bit destination + flags */
3432 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3433 return -1;
3434 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3435 return -1;
3436 break;
3437
3438 case 0xa5c: /* LLIHH - load logical immediate */
3439 case 0xa5d: /* LLIHL - load logical immediate */
3440 case 0xa5e: /* LLILH - load logical immediate */
3441 case 0xa5f: /* LLILL - load logical immediate */
3442 case 0xa77: /* BRCTG - branch relative on count */
3443 case 0xa79: /* LGHI - load halfword immediate */
3444 case 0xa7d: /* MGHI - multiply halfword immediate */
3445 /* 64-bit destination */
3446 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3447 return -1;
3448 break;
3449
3450 case 0xa70: /* TMLH - test under mask */
3451 case 0xa71: /* TMLL - test under mask */
3452 case 0xa72: /* TMHH - test under mask */
3453 case 0xa73: /* TMHL - test under mask */
3454 case 0xa7e: /* CHI - compare halfword immediate */
3455 case 0xa7f: /* CGHI - compare halfword immediate */
3456 /* flags only */
3457 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3458 return -1;
3459 break;
3460
3461 case 0xa74: /* BRC - branch relative on condition */
3462 /* no register change */
3463 break;
3464
3465 case 0xa7b: /* AGHI - add halfword immediate */
3466 /* 64-bit destination + flags */
3467 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3468 return -1;
3469 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3470 return -1;
3471 break;
3472
3473 default:
3474 goto UNKNOWN_OP;
3475 }
3476 break;
3477
3478 /* 0xa6 undefined */
3479
3480 case 0xa8: /* MVCLE - move long extended [partial] */
3481 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3482 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3483 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3484 if (record_full_arch_list_add_mem (oaddr, tmp))
3485 return -1;
3486 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3487 return -1;
3488 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3489 return -1;
3490 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3491 return -1;
3492 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3493 return -1;
3494 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3495 return -1;
3496 break;
3497
3498 /* 0xaa-0xab undefined */
3499 /* 0xac privileged: STNSM - store then and system mask */
3500 /* 0xad privileged: STOSM - store then or system mask */
3501 /* 0xae privileged: SIGP - signal processor */
3502 /* 0xaf unsupported: MC - monitor call */
3503 /* 0xb0 undefined */
3504 /* 0xb1 privileged: LRA - load real address */
3505
3506 case 0xb2:
3507 case 0xb3:
3508 case 0xb9:
3509 /* S/RRD/RRE/RRF/IE-format instruction */
3510 switch (insn[0])
3511 {
3512 /* 0xb200-0xb204 undefined or privileged */
3513
3514 case 0xb205: /* STCK - store clock */
3515 case 0xb27c: /* STCKF - store clock fast */
3516 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3517 if (record_full_arch_list_add_mem (oaddr, 8))
3518 return -1;
3519 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3520 return -1;
3521 break;
3522
3523 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3524 /* 0xb21a unsupported: CFC */
3525 /* 0xb21b-0xb221 undefined or privileged */
3526
3527 case 0xb222: /* IPM - insert program mask */
3528 case 0xb24f: /* EAR - extract access */
3529 case 0xb252: /* MSR - multiply single */
3530 case 0xb2ec: /* ETND - extract transaction nesting depth */
3531 case 0xb38c: /* EFPC - extract fpc */
3532 case 0xb91f: /* LRVR - load reversed */
3533 case 0xb926: /* LBR - load byte */
3534 case 0xb927: /* LHR - load halfword */
3535 case 0xb994: /* LLCR - load logical character */
3536 case 0xb995: /* LLHR - load logical halfword */
3537 case 0xb9f2: /* LOCR - load on condition */
3538 /* 32-bit gpr destination */
3539 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3540 return -1;
3541 break;
3542
3543 /* 0xb223-0xb22c privileged or unsupported */
3544
3545 case 0xb22d: /* DXR - divide */
3546 case 0xb325: /* LXDR - load lengthened */
3547 case 0xb326: /* LXER - load lengthened */
3548 case 0xb336: /* SQXR - square root */
3549 case 0xb365: /* LXR - load */
3550 case 0xb367: /* FIXR - load fp integer */
3551 case 0xb376: /* LZXR - load zero */
3552 case 0xb3b6: /* CXFR - convert from fixed */
3553 case 0xb3c6: /* CXGR - convert from fixed */
3554 case 0xb3fe: /* IEXTR - insert biased exponent */
3555 /* float pair destination */
3556 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3557 return -1;
3558 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3559 return -1;
3560 break;
3561
3562 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3563
3564 case 0xb241: /* CKSM - checksum [partial] */
3565 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3566 return -1;
3567 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3568 return -1;
3569 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3570 return -1;
3571 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3572 return -1;
3573 break;
3574
3575 /* 0xb242-0xb243 undefined */
3576
3577 case 0xb244: /* SQDR - square root */
3578 case 0xb245: /* SQER - square root */
3579 case 0xb324: /* LDER - load lengthened */
3580 case 0xb337: /* MEER - multiply */
3581 case 0xb366: /* LEXR - load rounded */
3582 case 0xb370: /* LPDFR - load positive */
3583 case 0xb371: /* LNDFR - load negative */
3584 case 0xb372: /* CSDFR - copy sign */
3585 case 0xb373: /* LCDFR - load complement */
3586 case 0xb374: /* LZER - load zero */
3587 case 0xb375: /* LZDR - load zero */
3588 case 0xb377: /* FIER - load fp integer */
3589 case 0xb37f: /* FIDR - load fp integer */
3590 case 0xb3b4: /* CEFR - convert from fixed */
3591 case 0xb3b5: /* CDFR - convert from fixed */
3592 case 0xb3c1: /* LDGR - load fpr from gr */
3593 case 0xb3c4: /* CEGR - convert from fixed */
3594 case 0xb3c5: /* CDGR - convert from fixed */
3595 case 0xb3f6: /* IEDTR - insert biased exponent */
3596 /* float destination */
3597 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3598 return -1;
3599 break;
3600
3601 /* 0xb246-0xb24c: privileged or unsupported */
3602
3603 case 0xb24d: /* CPYA - copy access */
3604 case 0xb24e: /* SAR - set access */
3605 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3606 return -1;
3607 break;
3608
3609 /* 0xb250-0xb251 undefined or privileged */
3610 /* 0xb253-0xb254 undefined or privileged */
3611
3612 case 0xb255: /* MVST - move string [partial] */
3613 {
3614 uint8_t end;
3615 gdb_byte cur;
3616 ULONGEST num = 0;
3617 /* Read ending byte. */
3618 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3619 end = tmp & 0xff;
3620 /* Get address of second operand. */
3621 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3622 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3623 /* Search for ending byte and compute length. */
3624 do {
3625 num++;
3626 if (target_read_memory (oaddr, &cur, 1))
3627 return -1;
3628 oaddr++;
3629 } while (cur != end);
3630 /* Get address of first operand and record it. */
3631 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3632 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3633 if (record_full_arch_list_add_mem (oaddr, num))
3634 return -1;
3635 /* Record the registers. */
3636 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3637 return -1;
3638 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3639 return -1;
3640 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3641 return -1;
3642 }
3643 break;
3644
3645 /* 0xb256 undefined */
3646
3647 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3648 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3649 return -1;
3650 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3651 return -1;
3652 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3653 return -1;
3654 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3655 return -1;
3656 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3657 return -1;
3658 break;
3659
3660 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3661
3662 case 0xb25d: /* CLST - compare logical string [partial] */
3663 case 0xb25e: /* SRST - search string [partial] */
3664 case 0xb9be: /* SRSTU - search string unicode [partial] */
3665 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3666 return -1;
3667 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3668 return -1;
3669 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3670 return -1;
3671 break;
3672
3673 /* 0xb25f-0xb262 undefined */
3674
3675 case 0xb263: /* CMPSC - compression call [interruptible] */
3676 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3677 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3678 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3679 if (record_full_arch_list_add_mem (oaddr, tmp))
3680 return -1;
3681 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3682 return -1;
3683 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3684 return -1;
3685 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3686 return -1;
3687 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3688 return -1;
3689 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3690 return -1;
3691 /* DXC may be written */
3692 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3693 return -1;
3694 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3695 return -1;
3696 break;
3697
3698 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3699
3700 case 0xb278: /* STCKE - store clock extended */
3701 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3702 if (record_full_arch_list_add_mem (oaddr, 16))
3703 return -1;
3704 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3705 return -1;
3706 break;
3707
3708 /* 0xb279-0xb27b undefined or unsupported */
3709 /* 0xb27d-0xb298 undefined or privileged */
3710
3711 case 0xb299: /* SRNM - set rounding mode */
3712 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3713 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3714 case 0xb29d: /* LFPC - load fpc */
3715 case 0xb2bd: /* LFAS - load fpc and signal */
3716 case 0xb384: /* SFPC - set fpc */
3717 case 0xb385: /* SFASR - set fpc and signal */
3718 case 0xb960: /* CGRT - compare and trap */
3719 case 0xb961: /* CLGRT - compare logical and trap */
3720 case 0xb972: /* CRT - compare and trap */
3721 case 0xb973: /* CLRT - compare logical and trap */
3722 /* fpc only - including possible DXC write for trapping insns */
3723 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3724 return -1;
3725 break;
3726
3727 /* 0xb29a-0xb29b undefined */
3728
3729 case 0xb29c: /* STFPC - store fpc */
3730 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3731 if (record_full_arch_list_add_mem (oaddr, 4))
3732 return -1;
3733 break;
3734
3735 /* 0xb29e-0xb2a4 undefined */
3736
3737 case 0xb2a5: /* TRE - translate extended [partial] */
3738 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3739 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3740 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3741 if (record_full_arch_list_add_mem (oaddr, tmp))
3742 return -1;
3743 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3744 return -1;
3745 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3746 return -1;
3747 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3748 return -1;
3749 break;
3750
3751 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3752 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3753 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3754 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3755 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3756 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3757 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3758 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3759 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3760 if (record_full_arch_list_add_mem (oaddr, tmp))
3761 return -1;
3762 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3763 return -1;
3764 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3765 return -1;
3766 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3767 return -1;
3768 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3769 return -1;
3770 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3771 return -1;
3772 break;
3773
3774 /* 0xb2a8-0xb2af undefined */
3775
3776 case 0xb2b0: /* STFLE - store facility list extended */
3777 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3778 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3779 tmp &= 0xff;
3780 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3781 return -1;
3782 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3783 return -1;
3784 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3785 return -1;
3786 break;
3787
3788 /* 0xb2b1-0xb2b7 undefined or privileged */
3789 /* 0xb2ba-0xb2bc undefined */
3790 /* 0xb2be-0xb2e7 undefined */
3791 /* 0xb2e9-0xb2eb undefined */
3792 /* 0xb2ed-0xb2f7 undefined */
3793 /* 0xb2f8 unsupported: TEND */
3794 /* 0xb2f9 undefined */
3795
3796 case 0xb2e8: /* PPA - perform processor assist */
3797 case 0xb2fa: /* NIAI - next instruction access intent */
3798 /* no visible effects */
3799 break;
3800
3801 /* 0xb2fb undefined */
3802 /* 0xb2fc unsupported: TABORT */
3803 /* 0xb2fd-0xb2fe undefined */
3804 /* 0xb2ff unsupported: TRAP */
3805
3806 case 0xb300: /* LPEBR - load positive */
3807 case 0xb301: /* LNEBR - load negative */
3808 case 0xb303: /* LCEBR - load complement */
3809 case 0xb310: /* LPDBR - load positive */
3810 case 0xb311: /* LNDBR - load negative */
3811 case 0xb313: /* LCDBR - load complement */
3812 case 0xb350: /* TBEDR - convert hfp to bfp */
3813 case 0xb351: /* TBDR - convert hfp to bfp */
3814 case 0xb358: /* THDER - convert bfp to hfp */
3815 case 0xb359: /* THDR - convert bfp to hfp */
3816 /* float destination + flags */
3817 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3818 return -1;
3819 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3820 return -1;
3821 break;
3822
3823 case 0xb304: /* LDEBR - load lengthened */
3824 case 0xb30c: /* MDEBR - multiply */
3825 case 0xb30d: /* DEBR - divide */
3826 case 0xb314: /* SQEBR - square root */
3827 case 0xb315: /* SQDBR - square root */
3828 case 0xb317: /* MEEBR - multiply */
3829 case 0xb31c: /* MDBR - multiply */
3830 case 0xb31d: /* DDBR - divide */
3831 case 0xb344: /* LEDBRA - load rounded */
3832 case 0xb345: /* LDXBRA - load rounded */
3833 case 0xb346: /* LEXBRA - load rounded */
3834 case 0xb357: /* FIEBRA - load fp integer */
3835 case 0xb35f: /* FIDBRA - load fp integer */
3836 case 0xb390: /* CELFBR - convert from logical */
3837 case 0xb391: /* CDLFBR - convert from logical */
3838 case 0xb394: /* CEFBR - convert from fixed */
3839 case 0xb395: /* CDFBR - convert from fixed */
3840 case 0xb3a0: /* CELGBR - convert from logical */
3841 case 0xb3a1: /* CDLGBR - convert from logical */
3842 case 0xb3a4: /* CEGBR - convert from fixed */
3843 case 0xb3a5: /* CDGBR - convert from fixed */
3844 case 0xb3d0: /* MDTR - multiply */
3845 case 0xb3d1: /* DDTR - divide */
3846 case 0xb3d4: /* LDETR - load lengthened */
3847 case 0xb3d5: /* LEDTR - load lengthened */
3848 case 0xb3d7: /* FIDTR - load fp integer */
3849 case 0xb3dd: /* LDXTR - load lengthened */
3850 case 0xb3f1: /* CDGTR - convert from fixed */
3851 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3852 case 0xb3f3: /* CDSTR - convert from signed packed */
3853 case 0xb3f5: /* QADTR - quantize */
3854 case 0xb3f7: /* RRDTR - reround */
3855 case 0xb951: /* CDFTR - convert from fixed */
3856 case 0xb952: /* CDLGTR - convert from logical */
3857 case 0xb953: /* CDLFTR - convert from logical */
3858 /* float destination + fpc */
3859 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3860 return -1;
3861 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3862 return -1;
3863 break;
3864
3865 case 0xb305: /* LXDBR - load lengthened */
3866 case 0xb306: /* LXEBR - load lengthened */
3867 case 0xb307: /* MXDBR - multiply */
3868 case 0xb316: /* SQXBR - square root */
3869 case 0xb34c: /* MXBR - multiply */
3870 case 0xb34d: /* DXBR - divide */
3871 case 0xb347: /* FIXBRA - load fp integer */
3872 case 0xb392: /* CXLFBR - convert from logical */
3873 case 0xb396: /* CXFBR - convert from fixed */
3874 case 0xb3a2: /* CXLGBR - convert from logical */
3875 case 0xb3a6: /* CXGBR - convert from fixed */
3876 case 0xb3d8: /* MXTR - multiply */
3877 case 0xb3d9: /* DXTR - divide */
3878 case 0xb3dc: /* LXDTR - load lengthened */
3879 case 0xb3df: /* FIXTR - load fp integer */
3880 case 0xb3f9: /* CXGTR - convert from fixed */
3881 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3882 case 0xb3fb: /* CXSTR - convert from signed packed */
3883 case 0xb3fd: /* QAXTR - quantize */
3884 case 0xb3ff: /* RRXTR - reround */
3885 case 0xb959: /* CXFTR - convert from fixed */
3886 case 0xb95a: /* CXLGTR - convert from logical */
3887 case 0xb95b: /* CXLFTR - convert from logical */
3888 /* float pair destination + fpc */
3889 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3890 return -1;
3891 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3892 return -1;
3893 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3894 return -1;
3895 break;
3896
3897 case 0xb308: /* KEBR - compare and signal */
3898 case 0xb309: /* CEBR - compare */
3899 case 0xb318: /* KDBR - compare and signal */
3900 case 0xb319: /* CDBR - compare */
3901 case 0xb348: /* KXBR - compare and signal */
3902 case 0xb349: /* CXBR - compare */
3903 case 0xb3e0: /* KDTR - compare and signal */
3904 case 0xb3e4: /* CDTR - compare */
3905 case 0xb3e8: /* KXTR - compare and signal */
3906 case 0xb3ec: /* CXTR - compare */
3907 /* flags + fpc only */
3908 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3909 return -1;
3910 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3911 return -1;
3912 break;
3913
3914 case 0xb302: /* LTEBR - load and test */
3915 case 0xb312: /* LTDBR - load and test */
3916 case 0xb30a: /* AEBR - add */
3917 case 0xb30b: /* SEBR - subtract */
3918 case 0xb31a: /* ADBR - add */
3919 case 0xb31b: /* SDBR - subtract */
3920 case 0xb3d2: /* ADTR - add */
3921 case 0xb3d3: /* SDTR - subtract */
3922 case 0xb3d6: /* LTDTR - load and test */
3923 /* float destination + flags + fpc */
3924 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3925 return -1;
3926 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3927 return -1;
3928 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3929 return -1;
3930 break;
3931
3932 case 0xb30e: /* MAEBR - multiply and add */
3933 case 0xb30f: /* MSEBR - multiply and subtract */
3934 case 0xb31e: /* MADBR - multiply and add */
3935 case 0xb31f: /* MSDBR - multiply and subtract */
3936 /* float destination [RRD] + fpc */
3937 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3938 return -1;
3939 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3940 return -1;
3941 break;
3942
3943 /* 0xb320-0xb323 undefined */
3944 /* 0xb327-0xb32d undefined */
3945
3946 case 0xb32e: /* MAER - multiply and add */
3947 case 0xb32f: /* MSER - multiply and subtract */
3948 case 0xb338: /* MAYLR - multiply and add unnormalized */
3949 case 0xb339: /* MYLR - multiply unnormalized */
3950 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3951 case 0xb33d: /* MYHR - multiply unnormalized */
3952 case 0xb33e: /* MADR - multiply and add */
3953 case 0xb33f: /* MSDR - multiply and subtract */
3954 /* float destination [RRD] */
3955 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3956 return -1;
3957 break;
3958
3959 /* 0xb330-0xb335 undefined */
3960
3961 case 0xb33a: /* MAYR - multiply and add unnormalized */
3962 case 0xb33b: /* MYR - multiply unnormalized */
3963 /* float pair destination [RRD] */
3964 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3965 return -1;
3966 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
3967 return -1;
3968 break;
3969
3970 case 0xb340: /* LPXBR - load positive */
3971 case 0xb341: /* LNXBR - load negative */
3972 case 0xb343: /* LCXBR - load complement */
3973 case 0xb360: /* LPXR - load positive */
3974 case 0xb361: /* LNXR - load negative */
3975 case 0xb362: /* LTXR - load and test */
3976 case 0xb363: /* LCXR - load complement */
3977 /* float pair destination + flags */
3978 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3979 return -1;
3980 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3981 return -1;
3982 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3983 return -1;
3984 break;
3985
3986 case 0xb342: /* LTXBR - load and test */
3987 case 0xb34a: /* AXBR - add */
3988 case 0xb34b: /* SXBR - subtract */
3989 case 0xb3da: /* AXTR - add */
3990 case 0xb3db: /* SXTR - subtract */
3991 case 0xb3de: /* LTXTR - load and test */
3992 /* float pair destination + flags + fpc */
3993 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3994 return -1;
3995 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3996 return -1;
3997 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3998 return -1;
3999 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4000 return -1;
4001 break;
4002
4003 /* 0xb34e-0xb34f undefined */
4004 /* 0xb352 undefined */
4005
4006 case 0xb353: /* DIEBR - divide to integer */
4007 case 0xb35b: /* DIDBR - divide to integer */
4008 /* two float destinations + flags + fpc */
4009 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4010 return -1;
4011 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4012 return -1;
4013 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4014 return -1;
4015 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4016 return -1;
4017 break;
4018
4019 /* 0xb354-0xb356 undefined */
4020 /* 0xb35a undefined */
4021
4022 /* 0xb35c-0xb35e undefined */
4023 /* 0xb364 undefined */
4024 /* 0xb368 undefined */
4025
4026 case 0xb369: /* CXR - compare */
4027 case 0xb3f4: /* CEDTR - compare biased exponent */
4028 case 0xb3fc: /* CEXTR - compare biased exponent */
4029 case 0xb920: /* CGR - compare */
4030 case 0xb921: /* CLGR - compare logical */
4031 case 0xb930: /* CGFR - compare */
4032 case 0xb931: /* CLGFR - compare logical */
4033 case 0xb9cd: /* CHHR - compare high */
4034 case 0xb9cf: /* CLHHR - compare logical high */
4035 case 0xb9dd: /* CHLR - compare high */
4036 case 0xb9df: /* CLHLR - compare logical high */
4037 /* flags only */
4038 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4039 return -1;
4040 break;
4041
4042 /* 0xb36a-0xb36f undefined */
4043 /* 0xb377-0xb37e undefined */
4044 /* 0xb380-0xb383 undefined */
4045 /* 0xb386-0xb38b undefined */
4046 /* 0xb38d-0xb38f undefined */
4047 /* 0xb393 undefined */
4048 /* 0xb397 undefined */
4049
4050 case 0xb398: /* CFEBR - convert to fixed */
4051 case 0xb399: /* CFDBR - convert to fixed */
4052 case 0xb39a: /* CFXBR - convert to fixed */
4053 case 0xb39c: /* CLFEBR - convert to logical */
4054 case 0xb39d: /* CLFDBR - convert to logical */
4055 case 0xb39e: /* CLFXBR - convert to logical */
4056 case 0xb941: /* CFDTR - convert to fixed */
4057 case 0xb949: /* CFXTR - convert to fixed */
4058 case 0xb943: /* CLFDTR - convert to logical */
4059 case 0xb94b: /* CLFXTR - convert to logical */
4060 /* 32-bit gpr destination + flags + fpc */
4061 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4062 return -1;
4063 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4064 return -1;
4065 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4066 return -1;
4067 break;
4068
4069 /* 0xb39b undefined */
4070 /* 0xb39f undefined */
4071
4072 /* 0xb3a3 undefined */
4073 /* 0xb3a7 undefined */
4074
4075 case 0xb3a8: /* CGEBR - convert to fixed */
4076 case 0xb3a9: /* CGDBR - convert to fixed */
4077 case 0xb3aa: /* CGXBR - convert to fixed */
4078 case 0xb3ac: /* CLGEBR - convert to logical */
4079 case 0xb3ad: /* CLGDBR - convert to logical */
4080 case 0xb3ae: /* CLGXBR - convert to logical */
4081 case 0xb3e1: /* CGDTR - convert to fixed */
4082 case 0xb3e9: /* CGXTR - convert to fixed */
4083 case 0xb942: /* CLGDTR - convert to logical */
4084 case 0xb94a: /* CLGXTR - convert to logical */
4085 /* 64-bit gpr destination + flags + fpc */
4086 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4087 return -1;
4088 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4089 return -1;
4090 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4091 return -1;
4092 break;
4093
4094 /* 0xb3ab undefined */
4095 /* 0xb3af-0xb3b3 undefined */
4096 /* 0xb3b7 undefined */
4097
4098 case 0xb3b8: /* CFER - convert to fixed */
4099 case 0xb3b9: /* CFDR - convert to fixed */
4100 case 0xb3ba: /* CFXR - convert to fixed */
4101 case 0xb998: /* ALCR - add logical with carry */
4102 case 0xb999: /* SLBR - subtract logical with borrow */
4103 case 0xb9f4: /* NRK - and */
4104 case 0xb9f6: /* ORK - or */
4105 case 0xb9f7: /* XRK - xor */
4106 case 0xb9f8: /* ARK - add */
4107 case 0xb9f9: /* SRK - subtract */
4108 case 0xb9fa: /* ALRK - add logical */
4109 case 0xb9fb: /* SLRK - subtract logical */
4110 /* 32-bit gpr destination + flags */
4111 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4112 return -1;
4113 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4114 return -1;
4115 break;
4116
4117 case 0xb3c8: /* CGER - convert to fixed */
4118 case 0xb3c9: /* CGDR - convert to fixed */
4119 case 0xb3ca: /* CGXR - convert to fixed */
4120 case 0xb900: /* LPGR - load positive */
4121 case 0xb901: /* LNGR - load negative */
4122 case 0xb902: /* LTGR - load and test */
4123 case 0xb903: /* LCGR - load complement */
4124 case 0xb908: /* AGR - add */
4125 case 0xb909: /* SGR - subtract */
4126 case 0xb90a: /* ALGR - add logical */
4127 case 0xb90b: /* SLGR - subtract logical */
4128 case 0xb910: /* LPGFR - load positive */
4129 case 0xb911: /* LNGFR - load negative */
4130 case 0xb912: /* LTGFR - load and test */
4131 case 0xb913: /* LCGFR - load complement */
4132 case 0xb918: /* AGFR - add */
4133 case 0xb919: /* SGFR - subtract */
4134 case 0xb91a: /* ALGFR - add logical */
4135 case 0xb91b: /* SLGFR - subtract logical */
4136 case 0xb980: /* NGR - and */
4137 case 0xb981: /* OGR - or */
4138 case 0xb982: /* XGR - xor */
4139 case 0xb988: /* ALCGR - add logical with carry */
4140 case 0xb989: /* SLBGR - subtract logical with borrow */
4141 case 0xb9e1: /* POPCNT - population count */
4142 case 0xb9e4: /* NGRK - and */
4143 case 0xb9e6: /* OGRK - or */
4144 case 0xb9e7: /* XGRK - xor */
4145 case 0xb9e8: /* AGRK - add */
4146 case 0xb9e9: /* SGRK - subtract */
4147 case 0xb9ea: /* ALGRK - add logical */
4148 case 0xb9eb: /* SLGRK - subtract logical */
4149 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4150 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4151 /* 64-bit gpr destination + flags */
4152 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4153 return -1;
4154 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4155 return -1;
4156 break;
4157
4158 /* 0xb3bb-0xb3c0 undefined */
4159 /* 0xb3c2-0xb3c3 undefined */
4160 /* 0xb3c7 undefined */
4161 /* 0xb3cb-0xb3cc undefined */
4162
4163 case 0xb3cd: /* LGDR - load gr from fpr */
4164 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4165 case 0xb3e3: /* CSDTR - convert to signed packed */
4166 case 0xb3e5: /* EEDTR - extract biased exponent */
4167 case 0xb3e7: /* ESDTR - extract significance */
4168 case 0xb3ed: /* EEXTR - extract biased exponent */
4169 case 0xb3ef: /* ESXTR - extract significance */
4170 case 0xb904: /* LGR - load */
4171 case 0xb906: /* LGBR - load byte */
4172 case 0xb907: /* LGHR - load halfword */
4173 case 0xb90c: /* MSGR - multiply single */
4174 case 0xb90f: /* LRVGR - load reversed */
4175 case 0xb914: /* LGFR - load */
4176 case 0xb916: /* LLGFR - load logical */
4177 case 0xb917: /* LLGTR - load logical thirty one bits */
4178 case 0xb91c: /* MSGFR - multiply single 64<32 */
4179 case 0xb946: /* BCTGR - branch on count */
4180 case 0xb984: /* LLGCR - load logical character */
4181 case 0xb985: /* LLGHR - load logical halfword */
4182 case 0xb9e2: /* LOCGR - load on condition */
4183 /* 64-bit gpr destination */
4184 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4185 return -1;
4186 break;
4187
4188 /* 0xb3ce-0xb3cf undefined */
4189 /* 0xb3e6 undefined */
4190
4191 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4192 case 0xb3eb: /* CSXTR - convert to signed packed */
4193 case 0xb90d: /* DSGR - divide single */
4194 case 0xb91d: /* DSGFR - divide single */
4195 case 0xb986: /* MLGR - multiply logical */
4196 case 0xb987: /* DLGR - divide logical */
4197 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4198 /* 64-bit gpr pair destination */
4199 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4200 return -1;
4201 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4202 return -1;
4203 break;
4204
4205 /* 0xb3ee undefined */
4206 /* 0xb3f0 undefined */
4207 /* 0xb3f8 undefined */
4208
4209 /* 0xb905 privileged */
4210
4211 /* 0xb90e unsupported: EREGG */
4212
4213 /* 0xb915 undefined */
4214
4215 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4216 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4217 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4218 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4219 tmp &= 0xff;
4220 switch (tmp)
4221 {
4222 case 0x00: /* KMAC-Query */
4223 if (record_full_arch_list_add_mem (oaddr, 16))
4224 return -1;
4225 break;
4226
4227 case 0x01: /* KMAC-DEA */
4228 case 0x02: /* KMAC-TDEA-128 */
4229 case 0x03: /* KMAC-TDEA-192 */
4230 case 0x09: /* KMAC-Encrypted-DEA */
4231 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4232 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4233 if (record_full_arch_list_add_mem (oaddr, 8))
4234 return -1;
4235 break;
4236
4237 case 0x12: /* KMAC-AES-128 */
4238 case 0x13: /* KMAC-AES-192 */
4239 case 0x14: /* KMAC-AES-256 */
4240 case 0x1a: /* KMAC-Encrypted-AES-128 */
4241 case 0x1b: /* KMAC-Encrypted-AES-192 */
4242 case 0x1c: /* KMAC-Encrypted-AES-256 */
4243 if (record_full_arch_list_add_mem (oaddr, 16))
4244 return -1;
4245 break;
4246
4247 default:
4248 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4249 (int)tmp, paddress (gdbarch, addr));
4250 return -1;
4251 }
4252 if (tmp != 0)
4253 {
4254 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4255 return -1;
4256 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4257 return -1;
4258 }
4259 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4260 return -1;
4261 break;
4262
4263 /* 0xb922-0xb924 undefined */
4264 /* 0xb925 privileged */
4265 /* 0xb928 privileged */
4266
4267 case 0xb929: /* KMA - cipher message with authentication */
4268 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4269 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4270 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4271 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4272 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4273 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4274 tmp &= 0x7f;
4275 switch (tmp)
4276 {
4277 case 0x00: /* KM*-Query */
4278 if (record_full_arch_list_add_mem (oaddr, 16))
4279 return -1;
4280 break;
4281
4282 case 0x01: /* KM*-DEA */
4283 case 0x02: /* KM*-TDEA-128 */
4284 case 0x03: /* KM*-TDEA-192 */
4285 case 0x09: /* KM*-Encrypted-DEA */
4286 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4287 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4288 if (record_full_arch_list_add_mem (oaddr, 8))
4289 return -1;
4290 break;
4291
4292 case 0x12: /* KM*-AES-128 */
4293 case 0x13: /* KM*-AES-192 */
4294 case 0x14: /* KM*-AES-256 */
4295 case 0x1a: /* KM*-Encrypted-AES-128 */
4296 case 0x1b: /* KM*-Encrypted-AES-192 */
4297 case 0x1c: /* KM*-Encrypted-AES-256 */
4298 if (record_full_arch_list_add_mem (oaddr, 16))
4299 return -1;
4300 break;
4301
4302 case 0x43: /* KMC-PRNG */
4303 /* Only valid for KMC. */
4304 if (insn[0] == 0xb92f)
4305 {
4306 if (record_full_arch_list_add_mem (oaddr, 8))
4307 return -1;
4308 break;
4309 }
4310 /* For other instructions... */
4311 /* Fall through. */
4312 default:
4313 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4314 (int)tmp, paddress (gdbarch, addr));
4315 return -1;
4316 }
4317 if (tmp != 0)
4318 {
4319 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4320 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4321 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4322 if (record_full_arch_list_add_mem (oaddr2, tmp))
4323 return -1;
4324 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4325 return -1;
4326 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4327 return -1;
4328 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4329 return -1;
4330 }
4331 if (tmp != 0 && insn[0] == 0xb929)
4332 {
4333 if (record_full_arch_list_add_reg (regcache,
4334 S390_R0_REGNUM + inib[4]))
4335 return -1;
4336 if (record_full_arch_list_add_reg (regcache,
4337 S390_R0_REGNUM + (inib[4] | 1)))
4338 return -1;
4339 }
4340 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4341 return -1;
4342 break;
4343
4344 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4345 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4346 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4347 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4348 tmp &= 0x7f;
4349 switch (tmp)
4350 {
4351 case 0x00: /* PCC-Query */
4352 if (record_full_arch_list_add_mem (oaddr, 16))
4353 return -1;
4354 break;
4355
4356 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4357 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4358 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4359 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4360 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4361 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4362 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4363 return -1;
4364 break;
4365
4366 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4367 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4368 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4369 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4370 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4371 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4372 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4373 return -1;
4374 break;
4375
4376 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4377 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4378 return -1;
4379 break;
4380
4381 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4382 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4383 return -1;
4384 break;
4385
4386 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4387 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4388 return -1;
4389 break;
4390
4391 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4392 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4393 return -1;
4394 break;
4395
4396 default:
4397 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4398 (int)tmp, paddress (gdbarch, addr));
4399 return -1;
4400 }
4401 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4402 return -1;
4403 break;
4404
4405 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4406 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4407 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4408 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4409 tmp &= 0x7f;
4410 switch (tmp)
4411 {
4412 case 0x00: /* KMCTR-Query */
4413 if (record_full_arch_list_add_mem (oaddr, 16))
4414 return -1;
4415 break;
4416
4417 case 0x01: /* KMCTR-DEA */
4418 case 0x02: /* KMCTR-TDEA-128 */
4419 case 0x03: /* KMCTR-TDEA-192 */
4420 case 0x09: /* KMCTR-Encrypted-DEA */
4421 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4422 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4423 case 0x12: /* KMCTR-AES-128 */
4424 case 0x13: /* KMCTR-AES-192 */
4425 case 0x14: /* KMCTR-AES-256 */
4426 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4427 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4428 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4429 break;
4430
4431 default:
4432 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4433 (int)tmp, paddress (gdbarch, addr));
4434 return -1;
4435 }
4436 if (tmp != 0)
4437 {
4438 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4439 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4440 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4441 if (record_full_arch_list_add_mem (oaddr2, tmp))
4442 return -1;
4443 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4444 return -1;
4445 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4446 return -1;
4447 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4448 return -1;
4449 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4450 return -1;
4451 }
4452 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4453 return -1;
4454 break;
4455
4456 case 0xb92e: /* KM - cipher message [partial] */
4457 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4458 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4459 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4460 tmp &= 0x7f;
4461 switch (tmp)
4462 {
4463 case 0x00: /* KM-Query */
4464 if (record_full_arch_list_add_mem (oaddr, 16))
4465 return -1;
4466 break;
4467
4468 case 0x01: /* KM-DEA */
4469 case 0x02: /* KM-TDEA-128 */
4470 case 0x03: /* KM-TDEA-192 */
4471 case 0x09: /* KM-Encrypted-DEA */
4472 case 0x0a: /* KM-Encrypted-TDEA-128 */
4473 case 0x0b: /* KM-Encrypted-TDEA-192 */
4474 case 0x12: /* KM-AES-128 */
4475 case 0x13: /* KM-AES-192 */
4476 case 0x14: /* KM-AES-256 */
4477 case 0x1a: /* KM-Encrypted-AES-128 */
4478 case 0x1b: /* KM-Encrypted-AES-192 */
4479 case 0x1c: /* KM-Encrypted-AES-256 */
4480 break;
4481
4482 case 0x32: /* KM-XTS-AES-128 */
4483 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4484 return -1;
4485 break;
4486
4487 case 0x34: /* KM-XTS-AES-256 */
4488 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4489 return -1;
4490 break;
4491
4492 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4493 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4494 return -1;
4495 break;
4496
4497 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4498 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4499 return -1;
4500 break;
4501
4502 default:
4503 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4504 (int)tmp, paddress (gdbarch, addr));
4505 return -1;
4506 }
4507 if (tmp != 0)
4508 {
4509 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4510 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4511 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4512 if (record_full_arch_list_add_mem (oaddr2, tmp))
4513 return -1;
4514 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4515 return -1;
4516 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4517 return -1;
4518 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4519 return -1;
4520 }
4521 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4522 return -1;
4523 break;
4524
4525 /* 0xb932-0xb93b undefined */
4526
4527 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4528 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4529 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4530 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4531 tmp &= 0xff;
4532 switch (tmp)
4533 {
4534 case 0x00: /* PPNO-Query */
4535 case 0x80: /* PPNO-Query */
4536 if (record_full_arch_list_add_mem (oaddr, 16))
4537 return -1;
4538 break;
4539
4540 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4541 if (record_full_arch_list_add_mem (oaddr, 240))
4542 return -1;
4543 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4544 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4545 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4546 if (record_full_arch_list_add_mem (oaddr2, tmp))
4547 return -1;
4548 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4549 return -1;
4550 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4551 return -1;
4552 break;
4553
4554 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4555 if (record_full_arch_list_add_mem (oaddr, 240))
4556 return -1;
4557 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4558 return -1;
4559 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4560 return -1;
4561 break;
4562
4563 default:
4564 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4565 (int)tmp, paddress (gdbarch, addr));
4566 return -1;
4567 }
4568 /* DXC may be written */
4569 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4570 return -1;
4571 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4572 return -1;
4573 break;
4574
4575 /* 0xb93d undefined */
4576
4577 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4578 case 0xb93f: /* KLMD - compute last message digest [partial] */
4579 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4580 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4581 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4582 tmp &= 0xff;
4583 switch (tmp)
4584 {
4585 case 0x00: /* K*MD-Query */
4586 if (record_full_arch_list_add_mem (oaddr, 16))
4587 return -1;
4588 break;
4589
4590 case 0x01: /* K*MD-SHA-1 */
4591 if (record_full_arch_list_add_mem (oaddr, 20))
4592 return -1;
4593 break;
4594
4595 case 0x02: /* K*MD-SHA-256 */
4596 if (record_full_arch_list_add_mem (oaddr, 32))
4597 return -1;
4598 break;
4599
4600 case 0x03: /* K*MD-SHA-512 */
4601 if (record_full_arch_list_add_mem (oaddr, 64))
4602 return -1;
4603 break;
4604
4605 case 0x41: /* KIMD-GHASH */
4606 /* Only valid for KIMD. */
4607 if (insn[0] == 0xb93e)
4608 {
4609 if (record_full_arch_list_add_mem (oaddr, 16))
4610 return -1;
4611 break;
4612 }
4613 /* For KLMD... */
4614 /* Fall through. */
4615 default:
4616 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4617 (int)tmp, paddress (gdbarch, addr));
4618 return -1;
4619 }
4620 if (tmp != 0)
4621 {
4622 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4623 return -1;
4624 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4625 return -1;
4626 }
4627 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4628 return -1;
4629 break;
4630
4631 /* 0xb940 undefined */
4632 /* 0xb944-0xb945 undefined */
4633 /* 0xb947-0xb948 undefined */
4634 /* 0xb94c-0xb950 undefined */
4635 /* 0xb954-0xb958 undefined */
4636 /* 0xb95c-0xb95f undefined */
4637 /* 0xb962-0xb971 undefined */
4638 /* 0xb974-0xb97f undefined */
4639
4640 case 0xb983: /* FLOGR - find leftmost one */
4641 /* 64-bit gpr pair destination + flags */
4642 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4643 return -1;
4644 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4645 return -1;
4646 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4647 return -1;
4648 break;
4649
4650 /* 0xb98a privileged */
4651 /* 0xb98b-0xb98c undefined */
4652
4653 case 0xb98d: /* EPSW - extract psw */
4654 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4655 return -1;
4656 if (inib[7])
4657 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4658 return -1;
4659 break;
4660
4661 /* 0xb98e-0xb98f privileged */
4662
4663 case 0xb990: /* TRTT - translate two to two [partial] */
4664 case 0xb991: /* TRTO - translate two to one [partial] */
4665 case 0xb992: /* TROT - translate one to two [partial] */
4666 case 0xb993: /* TROO - translate one to one [partial] */
4667 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4668 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4669 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4670 /* tmp is source length, we want destination length. Adjust. */
4671 if (insn[0] == 0xb991)
4672 tmp >>= 1;
4673 if (insn[0] == 0xb992)
4674 tmp <<= 1;
4675 if (record_full_arch_list_add_mem (oaddr, tmp))
4676 return -1;
4677 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4678 return -1;
4679 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4680 return -1;
4681 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4682 return -1;
4683 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4684 return -1;
4685 break;
4686
4687 case 0xb996: /* MLR - multiply logical */
4688 case 0xb997: /* DLR - divide logical */
4689 /* 32-bit gpr pair destination */
4690 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4691 return -1;
4692 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4693 return -1;
4694 break;
4695
4696 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4697 /* 0xb9b4-0xb9bc undefined */
4698
4699 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4700 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4701 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4702 return -1;
4703 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4704 return -1;
4705 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4706 return -1;
4707 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4708 return -1;
4709 break;
4710
4711 /* 0xb9c0-0xb9c7 undefined */
4712
4713 case 0xb9c8: /* AHHHR - add high */
4714 case 0xb9c9: /* SHHHR - subtract high */
4715 case 0xb9ca: /* ALHHHR - add logical high */
4716 case 0xb9cb: /* SLHHHR - subtract logical high */
4717 case 0xb9d8: /* AHHLR - add high */
4718 case 0xb9d9: /* SHHLR - subtract high */
4719 case 0xb9da: /* ALHHLR - add logical high */
4720 case 0xb9db: /* SLHHLR - subtract logical high */
4721 /* 32-bit high gpr destination + flags */
4722 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4723 return -1;
4724 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4725 return -1;
4726 break;
4727
4728 /* 0xb9cc undefined */
4729 /* 0xb9ce undefined */
4730 /* 0xb9d0-0xb9d7 undefined */
4731 /* 0xb9dc undefined */
4732 /* 0xb9de undefined */
4733
4734 case 0xb9e0: /* LOCFHR - load high on condition */
4735 /* 32-bit high gpr destination */
4736 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4737 return -1;
4738 break;
4739
4740 /* 0xb9e3 undefined */
4741 /* 0xb9e5 undefined */
4742 /* 0xb9ee-0xb9f1 undefined */
4743 /* 0xb9f3 undefined */
4744 /* 0xb9f5 undefined */
4745 /* 0xb9fc undefined */
4746 /* 0xb9fe -0xb9ff undefined */
4747
4748 default:
4749 goto UNKNOWN_OP;
4750 }
4751 break;
4752
4753 /* 0xb4-0xb5 undefined */
4754 /* 0xb6 privileged: STCTL - store control */
4755 /* 0xb7 privileged: LCTL - load control */
4756 /* 0xb8 undefined */
4757
4758 case 0xba: /* CS - compare and swap */
4759 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4760 if (record_full_arch_list_add_mem (oaddr, 4))
4761 return -1;
4762 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4763 return -1;
4764 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4765 return -1;
4766 break;
4767
4768 case 0xbb: /* CDS - compare double and swap */
4769 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4770 if (record_full_arch_list_add_mem (oaddr, 8))
4771 return -1;
4772 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4773 return -1;
4774 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4775 return -1;
4776 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4777 return -1;
4778 break;
4779
4780 /* 0xbc undefined */
4781
4782 case 0xbe: /* STCM - store characters under mask */
4783 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4784 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4785 return -1;
4786 break;
4787
4788 case 0xc0:
4789 case 0xc2:
4790 case 0xc4:
4791 case 0xc6:
4792 case 0xcc:
4793 /* RIL-format instruction */
4794 switch (ibyte[0] << 4 | inib[3])
4795 {
4796 case 0xc00: /* LARL - load address relative long */
4797 case 0xc05: /* BRASL - branch relative and save long */
4798 case 0xc09: /* IILF - insert immediate */
4799 case 0xc21: /* MSFI - multiply single immediate */
4800 case 0xc42: /* LLHRL - load logical halfword relative long */
4801 case 0xc45: /* LHRL - load halfword relative long */
4802 case 0xc4d: /* LRL - load relative long */
4803 /* 32-bit or native gpr destination */
4804 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4805 return -1;
4806 break;
4807
4808 case 0xc01: /* LGFI - load immediate */
4809 case 0xc0e: /* LLIHF - load logical immediate */
4810 case 0xc0f: /* LLILF - load logical immediate */
4811 case 0xc20: /* MSGFI - multiply single immediate */
4812 case 0xc44: /* LGHRL - load halfword relative long */
4813 case 0xc46: /* LLGHRL - load logical halfword relative long */
4814 case 0xc48: /* LGRL - load relative long */
4815 case 0xc4c: /* LGFRL - load relative long */
4816 case 0xc4e: /* LLGFRL - load logical relative long */
4817 /* 64-bit gpr destination */
4818 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4819 return -1;
4820 break;
4821
4822 /* 0xc02-0xc03 undefined */
4823
4824 case 0xc04: /* BRCL - branch relative on condition long */
4825 case 0xc62: /* PFDRL - prefetch data relative long */
4826 break;
4827
4828 case 0xc06: /* XIHF - xor immediate */
4829 case 0xc0a: /* NIHF - and immediate */
4830 case 0xc0c: /* OIHF - or immediate */
4831 case 0xcc8: /* AIH - add immediate high */
4832 case 0xcca: /* ALSIH - add logical with signed immediate high */
4833 /* 32-bit high gpr destination + flags */
4834 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4835 return -1;
4836 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4837 return -1;
4838 break;
4839
4840 case 0xc07: /* XILF - xor immediate */
4841 case 0xc0b: /* NILF - and immediate */
4842 case 0xc0d: /* OILF - or immediate */
4843 case 0xc25: /* SLFI - subtract logical immediate */
4844 case 0xc29: /* AFI - add immediate */
4845 case 0xc2b: /* ALFI - add logical immediate */
4846 /* 32-bit gpr destination + flags */
4847 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4848 return -1;
4849 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4850 return -1;
4851 break;
4852
4853 case 0xc08: /* IIHF - insert immediate */
4854 case 0xcc6: /* BRCTH - branch relative on count high */
4855 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4856 /* 32-bit high gpr destination */
4857 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4858 return -1;
4859 break;
4860
4861 /* 0xc22-0xc23 undefined */
4862
4863 case 0xc24: /* SLGFI - subtract logical immediate */
4864 case 0xc28: /* AGFI - add immediate */
4865 case 0xc2a: /* ALGFI - add logical immediate */
4866 /* 64-bit gpr destination + flags */
4867 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4868 return -1;
4869 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4870 return -1;
4871 break;
4872
4873 /* 0xc26-0xc27 undefined */
4874
4875 case 0xc2c: /* CGFI - compare immediate */
4876 case 0xc2d: /* CFI - compare immediate */
4877 case 0xc2e: /* CLGFI - compare logical immediate */
4878 case 0xc2f: /* CLFI - compare logical immediate */
4879 case 0xc64: /* CGHRL - compare halfword relative long */
4880 case 0xc65: /* CHRL - compare halfword relative long */
4881 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4882 case 0xc67: /* CLHRL - compare logical halfword relative long */
4883 case 0xc68: /* CGRL - compare relative long */
4884 case 0xc6a: /* CLGRL - compare logical relative long */
4885 case 0xc6c: /* CGFRL - compare relative long */
4886 case 0xc6d: /* CRL - compare relative long */
4887 case 0xc6e: /* CLGFRL - compare logical relative long */
4888 case 0xc6f: /* CLRL - compare logical relative long */
4889 case 0xccd: /* CIH - compare immediate high */
4890 case 0xccf: /* CLIH - compare logical immediate high */
4891 /* flags only */
4892 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4893 return -1;
4894 break;
4895
4896 /* 0xc40-0xc41 undefined */
4897 /* 0xc43 undefined */
4898
4899 case 0xc47: /* STHRL - store halfword relative long */
4900 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4901 if (record_full_arch_list_add_mem (oaddr, 2))
4902 return -1;
4903 break;
4904
4905 /* 0xc49-0xc4a undefined */
4906
4907 case 0xc4b: /* STGRL - store relative long */
4908 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4909 if (record_full_arch_list_add_mem (oaddr, 8))
4910 return -1;
4911 break;
4912
4913 case 0xc4f: /* STRL - store relative long */
4914 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4915 if (record_full_arch_list_add_mem (oaddr, 4))
4916 return -1;
4917 break;
4918
4919 case 0xc60: /* EXRL - execute relative long */
4920 if (ex != -1)
4921 {
4922 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4923 paddress (gdbarch, addr));
4924 return -1;
4925 }
4926 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4927 if (inib[2])
4928 {
4929 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4930 ex = tmp & 0xff;
4931 }
4932 else
4933 {
4934 ex = 0;
4935 }
4936 goto ex;
4937
4938 /* 0xc61 undefined */
4939 /* 0xc63 undefined */
4940 /* 0xc69 undefined */
4941 /* 0xc6b undefined */
4942 /* 0xcc0-0xcc5 undefined */
4943 /* 0xcc7 undefined */
4944 /* 0xcc9 undefined */
4945 /* 0xccc undefined */
4946 /* 0xcce undefined */
4947
4948 default:
4949 goto UNKNOWN_OP;
4950 }
4951 break;
4952
4953 /* 0xc1 undefined */
4954 /* 0xc3 undefined */
4955
4956 case 0xc5: /* BPRP - branch prediction relative preload */
4957 case 0xc7: /* BPP - branch prediction preload */
4958 /* no visible effect */
4959 break;
4960
4961 case 0xc8:
4962 /* SSF-format instruction */
4963 switch (ibyte[0] << 4 | inib[3])
4964 {
4965 /* 0xc80 unsupported */
4966
4967 case 0xc81: /* ECTG - extract cpu time */
4968 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4969 return -1;
4970 if (s390_record_gpr_g (gdbarch, regcache, 0))
4971 return -1;
4972 if (s390_record_gpr_g (gdbarch, regcache, 1))
4973 return -1;
4974 break;
4975
4976 case 0xc82: /* CSST - compare and swap and store */
4977 {
4978 uint8_t fc, sc;
4979 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4980 fc = tmp & 0xff;
4981 sc = tmp >> 8 & 0xff;
4982
4983 /* First and third operands. */
4984 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4985 switch (fc)
4986 {
4987 case 0x00: /* 32-bit */
4988 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4989 return -1;
4990 if (record_full_arch_list_add_mem (oaddr, 4))
4991 return -1;
4992 break;
4993
4994 case 0x01: /* 64-bit */
4995 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4996 return -1;
4997 if (record_full_arch_list_add_mem (oaddr, 8))
4998 return -1;
4999 break;
5000
5001 case 0x02: /* 128-bit */
5002 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5003 return -1;
5004 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5005 return -1;
5006 if (record_full_arch_list_add_mem (oaddr, 16))
5007 return -1;
5008 break;
5009
5010 default:
5011 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5012 fc, paddress (gdbarch, addr));
5013 return -1;
5014 }
5015
5016 /* Second operand. */
5017 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5018 if (sc > 4)
5019 {
5020 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5021 sc, paddress (gdbarch, addr));
5022 return -1;
5023 }
5024
5025 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5026 return -1;
5027
5028 /* Flags. */
5029 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5030 return -1;
5031 }
5032 break;
5033
5034 /* 0xc83 undefined */
5035
5036 case 0xc84: /* LPD - load pair disjoint */
5037 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5038 return -1;
5039 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5040 return -1;
5041 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5042 return -1;
5043 break;
5044
5045 case 0xc85: /* LPDG - load pair disjoint */
5046 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5047 return -1;
5048 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5049 return -1;
5050 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5051 return -1;
5052 break;
5053
5054 /* 0xc86-0xc8f undefined */
5055
5056 default:
5057 goto UNKNOWN_OP;
5058 }
5059 break;
5060
5061 /* 0xc9-0xcb undefined */
5062 /* 0xcd-0xcf undefined */
5063
5064 case 0xd0: /* TRTR - translate and test reversed */
5065 case 0xdd: /* TRT - translate and test */
5066 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5067 return -1;
5068 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5069 return -1;
5070 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5071 return -1;
5072 break;
5073
5074 case 0xd1: /* MVN - move numbers */
5075 case 0xd2: /* MVC - move */
5076 case 0xd3: /* MVZ - move zones */
5077 case 0xdc: /* TR - translate */
5078 case 0xe8: /* MVCIN - move inverse */
5079 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5080 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5081 return -1;
5082 break;
5083
5084 case 0xd4: /* NC - and */
5085 case 0xd6: /* OC - or*/
5086 case 0xd7: /* XC - xor */
5087 case 0xe2: /* UNPKU - unpack unicode */
5088 case 0xea: /* UNPKA - unpack ASCII */
5089 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5090 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5091 return -1;
5092 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5093 return -1;
5094 break;
5095
5096 case 0xde: /* ED - edit */
5097 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5098 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5099 return -1;
5100 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5101 return -1;
5102 /* DXC may be written */
5103 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5104 return -1;
5105 break;
5106
5107 case 0xdf: /* EDMK - edit and mark */
5108 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5109 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5110 return -1;
5111 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5112 return -1;
5113 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5114 return -1;
5115 /* DXC may be written */
5116 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5117 return -1;
5118 break;
5119
5120 /* 0xd8 undefined */
5121 /* 0xd9 unsupported: MVCK - move with key */
5122 /* 0xda unsupported: MVCP - move to primary */
5123 /* 0xdb unsupported: MVCS - move to secondary */
5124 /* 0xe0 undefined */
5125
5126 case 0xe1: /* PKU - pack unicode */
5127 case 0xe9: /* PKA - pack ASCII */
5128 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5129 if (record_full_arch_list_add_mem (oaddr, 16))
5130 return -1;
5131 break;
5132
5133 case 0xe3:
5134 case 0xe6:
5135 case 0xe7:
5136 case 0xeb:
5137 case 0xed:
5138 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5139 switch (ibyte[0] << 8 | ibyte[5])
5140 {
5141 /* 0xe300-0xe301 undefined */
5142
5143 case 0xe302: /* LTG - load and test */
5144 case 0xe308: /* AG - add */
5145 case 0xe309: /* SG - subtract */
5146 case 0xe30a: /* ALG - add logical */
5147 case 0xe30b: /* SLG - subtract logical */
5148 case 0xe318: /* AGF - add */
5149 case 0xe319: /* SGF - subtract */
5150 case 0xe31a: /* ALGF - add logical */
5151 case 0xe31b: /* SLGF - subtract logical */
5152 case 0xe332: /* LTGF - load and test */
5153 case 0xe380: /* NG - and */
5154 case 0xe381: /* OG - or */
5155 case 0xe382: /* XG - xor */
5156 case 0xe388: /* ALCG - add logical with carry */
5157 case 0xe389: /* SLBG - subtract logical with borrow */
5158 case 0xeb0a: /* SRAG - shift right single */
5159 case 0xeb0b: /* SLAG - shift left single */
5160 /* 64-bit gpr destination + flags */
5161 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5162 return -1;
5163 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5164 return -1;
5165 break;
5166
5167 /* 0xe303 privileged */
5168
5169 case 0xe304: /* LG - load */
5170 case 0xe30c: /* MSG - multiply single */
5171 case 0xe30f: /* LRVG - load reversed */
5172 case 0xe314: /* LGF - load */
5173 case 0xe315: /* LGH - load halfword */
5174 case 0xe316: /* LLGF - load logical */
5175 case 0xe317: /* LLGT - load logical thirty one bits */
5176 case 0xe31c: /* MSGF - multiply single */
5177 case 0xe32a: /* LZRG - load and zero rightmost byte */
5178 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5179 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5180 case 0xe346: /* BCTG - branch on count */
5181 case 0xe377: /* LGB - load byte */
5182 case 0xe390: /* LLGC - load logical character */
5183 case 0xe391: /* LLGH - load logical halfword */
5184 case 0xeb0c: /* SRLG - shift right single logical */
5185 case 0xeb0d: /* SLLG - shift left single logical */
5186 case 0xeb1c: /* RLLG - rotate left single logical */
5187 case 0xeb44: /* BXHG - branch on index high */
5188 case 0xeb45: /* BXLEG - branch on index low or equal */
5189 case 0xeb4c: /* ECAG - extract cpu attribute */
5190 case 0xebe2: /* LOCG - load on condition */
5191 /* 64-bit gpr destination */
5192 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5193 return -1;
5194 break;
5195
5196 /* 0xe305 undefined */
5197
5198 case 0xe306: /* CVBY - convert to binary */
5199 /* 32-bit or native gpr destination + FPC (DXC write) */
5200 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5201 return -1;
5202 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5203 return -1;
5204 break;
5205
5206 /* 0xe307 undefined */
5207
5208 case 0xe30d: /* DSG - divide single */
5209 case 0xe31d: /* DSGF - divide single */
5210 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5211 case 0xe386: /* MLG - multiply logical */
5212 case 0xe387: /* DLG - divide logical */
5213 case 0xe38f: /* LPQ - load pair from quadword */
5214 /* 64-bit gpr pair destination */
5215 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5216 return -1;
5217 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5218 return -1;
5219 break;
5220
5221 case 0xe30e: /* CVBG - convert to binary */
5222 /* 64-bit gpr destination + FPC (DXC write) */
5223 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5224 return -1;
5225 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5226 return -1;
5227 break;
5228
5229 /* 0xe310-0xe311 undefined */
5230
5231 case 0xe312: /* LT - load and test */
5232 case 0xe338: /* AGH - add halfword to 64 bit value */
5233 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5234 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5235 case 0xe354: /* NY - and */
5236 case 0xe356: /* OY - or */
5237 case 0xe357: /* XY - xor */
5238 case 0xe35a: /* AY - add */
5239 case 0xe35b: /* SY - subtract */
5240 case 0xe35e: /* ALY - add logical */
5241 case 0xe35f: /* SLY - subtract logical */
5242 case 0xe37a: /* AHY - add halfword */
5243 case 0xe37b: /* SHY - subtract halfword */
5244 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5245 case 0xe398: /* ALC - add logical with carry */
5246 case 0xe399: /* SLB - subtract logical with borrow */
5247 case 0xe727: /* LCBB - load count to block bounduary */
5248 case 0xeb81: /* ICMY - insert characters under mask */
5249 case 0xebdc: /* SRAK - shift left single */
5250 case 0xebdd: /* SLAK - shift left single */
5251 /* 32/64-bit gpr destination + flags */
5252 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5253 return -1;
5254 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5255 return -1;
5256 break;
5257
5258 /* 0xe313 privileged */
5259
5260 case 0xe31e: /* LRV - load reversed */
5261 case 0xe31f: /* LRVH - load reversed */
5262 case 0xe33b: /* LZRF - load and zero rightmost byte */
5263 case 0xe351: /* MSY - multiply single */
5264 case 0xe358: /* LY - load */
5265 case 0xe371: /* LAY - load address */
5266 case 0xe373: /* ICY - insert character */
5267 case 0xe376: /* LB - load byte */
5268 case 0xe378: /* LHY - load */
5269 case 0xe37c: /* MHY - multiply halfword */
5270 case 0xe394: /* LLC - load logical character */
5271 case 0xe395: /* LLH - load logical halfword */
5272 case 0xeb1d: /* RLL - rotate left single logical */
5273 case 0xebde: /* SRLK - shift left single logical */
5274 case 0xebdf: /* SLLK - shift left single logical */
5275 case 0xebf2: /* LOC - load on condition */
5276 /* 32-bit or native gpr destination */
5277 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5278 return -1;
5279 break;
5280
5281 case 0xe320: /* CG - compare */
5282 case 0xe321: /* CLG - compare logical */
5283 case 0xe330: /* CGF - compare */
5284 case 0xe331: /* CLGF - compare logical */
5285 case 0xe334: /* CGH - compare halfword */
5286 case 0xe355: /* CLY - compare logical */
5287 case 0xe359: /* CY - compare */
5288 case 0xe379: /* CHY - compare halfword */
5289 case 0xe3cd: /* CHF - compare high */
5290 case 0xe3cf: /* CLHF - compare logical high */
5291 case 0xeb20: /* CLMH - compare logical under mask high */
5292 case 0xeb21: /* CLMY - compare logical under mask */
5293 case 0xeb51: /* TMY - test under mask */
5294 case 0xeb55: /* CLIY - compare logical */
5295 case 0xebc0: /* TP - test decimal */
5296 case 0xed10: /* TCEB - test data class */
5297 case 0xed11: /* TCDB - test data class */
5298 case 0xed12: /* TCXB - test data class */
5299 case 0xed50: /* TDCET - test data class */
5300 case 0xed51: /* TDGET - test data group */
5301 case 0xed54: /* TDCDT - test data class */
5302 case 0xed55: /* TDGDT - test data group */
5303 case 0xed58: /* TDCXT - test data class */
5304 case 0xed59: /* TDGXT - test data group */
5305 /* flags only */
5306 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5307 return -1;
5308 break;
5309
5310 /* 0xe322-0xe323 undefined */
5311
5312 case 0xe324: /* STG - store */
5313 case 0xe325: /* NTSTG - nontransactional store */
5314 case 0xe326: /* CVDY - convert to decimal */
5315 case 0xe32f: /* STRVG - store reversed */
5316 case 0xebe3: /* STOCG - store on condition */
5317 case 0xed67: /* STDY - store */
5318 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5319 if (record_full_arch_list_add_mem (oaddr, 8))
5320 return -1;
5321 break;
5322
5323 /* 0xe327-0xe329 undefined */
5324 /* 0xe32b-0xe32d undefined */
5325
5326 case 0xe32e: /* CVDG - convert to decimal */
5327 case 0xe38e: /* STPQ - store pair to quadword */
5328 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5329 if (record_full_arch_list_add_mem (oaddr, 16))
5330 return -1;
5331 break;
5332
5333 /* 0xe333 undefined */
5334 /* 0xe335 undefined */
5335
5336 case 0xe336: /* PFD - prefetch data */
5337 break;
5338
5339 /* 0xe337 undefined */
5340 /* 0xe33c-0xe33d undefined */
5341
5342 case 0xe33e: /* STRV - store reversed */
5343 case 0xe350: /* STY - store */
5344 case 0xe3cb: /* STFH - store high */
5345 case 0xebe1: /* STOCFH - store high on condition */
5346 case 0xebf3: /* STOC - store on condition */
5347 case 0xed66: /* STEY - store */
5348 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5349 if (record_full_arch_list_add_mem (oaddr, 4))
5350 return -1;
5351 break;
5352
5353 case 0xe33f: /* STRVH - store reversed */
5354 case 0xe370: /* STHY - store halfword */
5355 case 0xe3c7: /* STHH - store halfword high */
5356 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5357 if (record_full_arch_list_add_mem (oaddr, 2))
5358 return -1;
5359 break;
5360
5361 /* 0xe340-0xe345 undefined */
5362
5363 case 0xe347: /* BIC - branch indirect on condition */
5364 break;
5365
5366 /* 0xe348-0xe34f undefined */
5367 /* 0xe352 undefined */
5368
5369 case 0xe35c: /* MFY - multiply */
5370 case 0xe396: /* ML - multiply logical */
5371 case 0xe397: /* DL - divide logical */
5372 /* 32-bit gpr pair destination */
5373 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5374 return -1;
5375 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5376 return -1;
5377 break;
5378
5379 /* 0xe35d undefined */
5380 /* 0xe360-0xe36f undefined */
5381
5382 case 0xe372: /* STCY - store character */
5383 case 0xe3c3: /* STCH - store character high */
5384 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5385 if (record_full_arch_list_add_mem (oaddr, 1))
5386 return -1;
5387 break;
5388
5389 /* 0xe374 undefined */
5390
5391 case 0xe375: /* LAEY - load address extended */
5392 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5393 return -1;
5394 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5395 return -1;
5396 break;
5397
5398 /* 0xe37d-0xe37f undefined */
5399
5400 case 0xe385: /* LGAT - load and trap */
5401 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5402 case 0xe39d: /* LLGFAT - load logical and trap */
5403 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5404 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5405 case 0xe721: /* VLGV - vector load gr from vr element */
5406 /* 64-bit gpr destination + fpc for possible DXC write */
5407 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5408 return -1;
5409 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5410 return -1;
5411 break;
5412
5413 /* 0xe38a-0xe38d undefined */
5414 /* 0xe392-0xe393 undefined */
5415 /* 0xe39a-0xe39b undefined */
5416 /* 0xe39e undefined */
5417
5418 case 0xe39f: /* LAT - load and trap */
5419 /* 32-bit gpr destination + fpc for possible DXC write */
5420 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5421 return -1;
5422 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5423 return -1;
5424 break;
5425
5426 /* 0xe3a0-0xe3bf undefined */
5427
5428 case 0xe3c0: /* LBH - load byte high */
5429 case 0xe3c2: /* LLCH - load logical character high */
5430 case 0xe3c4: /* LHH - load halfword high */
5431 case 0xe3c6: /* LLHH - load logical halfword high */
5432 case 0xe3ca: /* LFH - load high */
5433 case 0xebe0: /* LOCFH - load high on condition */
5434 /* 32-bit high gpr destination */
5435 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5436 return -1;
5437 break;
5438
5439 /* 0xe3c1 undefined */
5440 /* 0xe3c5 undefined */
5441
5442 case 0xe3c8: /* LFHAT - load high and trap */
5443 /* 32-bit high gpr destination + fpc for possible DXC write */
5444 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5445 return -1;
5446 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5447 return -1;
5448 break;
5449
5450 /* 0xe3c9 undefined */
5451 /* 0xe3cc undefined */
5452 /* 0xe3ce undefined */
5453 /* 0xe3d0-0xe3ff undefined */
5454
5455 case 0xe634: /* VPKZ - vector pack zoned */
5456 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5457 case 0xe637: /* VLRLR - vector load rightmost with length */
5458 case 0xe649: /* VLIP - vector load immediate decimal */
5459 case 0xe700: /* VLEB - vector load element */
5460 case 0xe701: /* VLEH - vector load element */
5461 case 0xe702: /* VLEG - vector load element */
5462 case 0xe703: /* VLEF - vector load element */
5463 case 0xe704: /* VLLEZ - vector load logical element and zero */
5464 case 0xe705: /* VLREP - vector load and replicate */
5465 case 0xe706: /* VL - vector load */
5466 case 0xe707: /* VLBB - vector load to block bounduary */
5467 case 0xe712: /* VGEG - vector gather element */
5468 case 0xe713: /* VGEF - vector gather element */
5469 case 0xe722: /* VLVG - vector load vr element from gr */
5470 case 0xe730: /* VESL - vector element shift left */
5471 case 0xe733: /* VERLL - vector element rotate left logical */
5472 case 0xe737: /* VLL - vector load with length */
5473 case 0xe738: /* VESRL - vector element shift right logical */
5474 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5475 case 0xe740: /* VLEIB - vector load element immediate */
5476 case 0xe741: /* VLEIH - vector load element immediate */
5477 case 0xe742: /* VLEIG - vector load element immediate */
5478 case 0xe743: /* VLEIF - vector load element immediate */
5479 case 0xe744: /* VGBM - vector generate byte mask */
5480 case 0xe745: /* VREPI - vector replicate immediate */
5481 case 0xe746: /* VGM - vector generate mask */
5482 case 0xe74d: /* VREP - vector replicate */
5483 case 0xe750: /* VPOPCT - vector population count */
5484 case 0xe752: /* VCTZ - vector count trailing zeros */
5485 case 0xe753: /* VCLZ - vector count leading zeros */
5486 case 0xe756: /* VLR - vector load */
5487 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5488 case 0xe760: /* VMRL - vector merge low */
5489 case 0xe761: /* VMRH - vector merge high */
5490 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5491 case 0xe764: /* VSUM - vector sum across word */
5492 case 0xe765: /* VSUMG - vector sum across doubleword */
5493 case 0xe766: /* VCKSM - vector checksum */
5494 case 0xe767: /* VSUMQ - vector sum across quadword */
5495 case 0xe768: /* VN - vector and */
5496 case 0xe769: /* VNC - vector and with complement */
5497 case 0xe76a: /* VO - vector or */
5498 case 0xe76b: /* VNO - vector nor */
5499 case 0xe76c: /* VNX - vector not exclusive or */
5500 case 0xe76d: /* VX - vector xor */
5501 case 0xe76e: /* VNN - vector nand */
5502 case 0xe76f: /* VOC - vector or with complement */
5503 case 0xe770: /* VESLV - vector element shift left */
5504 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5505 case 0xe773: /* VERLLV - vector element rotate left logical */
5506 case 0xe774: /* VSL - vector shift left */
5507 case 0xe775: /* VSLB - vector shift left by byte */
5508 case 0xe777: /* VSLDB - vector shift left double by byte */
5509 case 0xe778: /* VESRLV - vector element shift right logical */
5510 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5511 case 0xe77c: /* VSRL - vector shift right logical */
5512 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5513 case 0xe77e: /* VSRA - vector shift right arithmetic */
5514 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5515 case 0xe784: /* VPDI - vector permute doubleword immediate */
5516 case 0xe785: /* VBPERM - vector bit permute */
5517 case 0xe78c: /* VPERM - vector permute */
5518 case 0xe78d: /* VSEL - vector select */
5519 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5520 case 0xe78f: /* VFMA - vector fp multiply and add */
5521 case 0xe794: /* VPK - vector pack */
5522 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5523 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5524 case 0xe7a1: /* VMLH - vector multiply logical high */
5525 case 0xe7a2: /* VML - vector multiply low */
5526 case 0xe7a3: /* VMH - vector multiply high */
5527 case 0xe7a4: /* VMLE - vector multiply logical even */
5528 case 0xe7a5: /* VMLO - vector multiply logical odd */
5529 case 0xe7a6: /* VME - vector multiply even */
5530 case 0xe7a7: /* VMO - vector multiply odd */
5531 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5532 case 0xe7aa: /* VMAL - vector multiply and add low */
5533 case 0xe7ab: /* VMAH - vector multiply and add high */
5534 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5535 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5536 case 0xe7ae: /* VMAE - vector multiply and add even */
5537 case 0xe7af: /* VMAO - vector multiply and add odd */
5538 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5539 case 0xe7b8: /* VMSL - vector multiply sum logical */
5540 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5541 case 0xe7bb: /* VAC - vector add with carry */
5542 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5543 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5544 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5545 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
5546 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
5547 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
5548 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
5549 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5550 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5551 case 0xe7c7: /* VFI - vector load fp integer */
5552 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5553 case 0xe7ce: /* VFSQ - vector fp square root */
5554 case 0xe7d4: /* VUPLL - vector unpack logical low */
5555 case 0xe7d6: /* VUPL - vector unpack low */
5556 case 0xe7d5: /* VUPLH - vector unpack logical high */
5557 case 0xe7d7: /* VUPH - vector unpack high */
5558 case 0xe7de: /* VLC - vector load complement */
5559 case 0xe7df: /* VLP - vector load positive */
5560 case 0xe7e2: /* VFA - vector fp subtract */
5561 case 0xe7e3: /* VFA - vector fp add */
5562 case 0xe7e5: /* VFD - vector fp divide */
5563 case 0xe7e7: /* VFM - vector fp multiply */
5564 case 0xe7ee: /* VFMIN - vector fp minimum */
5565 case 0xe7ef: /* VFMAX - vector fp maximum */
5566 case 0xe7f0: /* VAVGL - vector average logical */
5567 case 0xe7f1: /* VACC - vector add and compute carry */
5568 case 0xe7f2: /* VAVG - vector average */
5569 case 0xe7f3: /* VA - vector add */
5570 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5571 case 0xe7f7: /* VS - vector subtract */
5572 case 0xe7fc: /* VMNL - vector minimum logical */
5573 case 0xe7fd: /* VMXL - vector maximum logical */
5574 case 0xe7fe: /* VMN - vector minimum */
5575 case 0xe7ff: /* VMX - vector maximum */
5576 /* vector destination + FPC */
5577 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5578 return -1;
5579 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5580 return -1;
5581 break;
5582
5583 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5584 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5585 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5586 return -1;
5587 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5588 return -1;
5589 break;
5590
5591 case 0xe708: /* VSTEB - vector store element */
5592 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5593 if (record_full_arch_list_add_mem (oaddr, 1))
5594 return -1;
5595 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5596 return -1;
5597 break;
5598
5599 case 0xe709: /* VSTEH - vector store element */
5600 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5601 if (record_full_arch_list_add_mem (oaddr, 2))
5602 return -1;
5603 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5604 return -1;
5605 break;
5606
5607 case 0xe70a: /* VSTEG - vector store element */
5608 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5609 if (record_full_arch_list_add_mem (oaddr, 8))
5610 return -1;
5611 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5612 return -1;
5613 break;
5614
5615 case 0xe70b: /* VSTEF - vector store element */
5616 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5617 if (record_full_arch_list_add_mem (oaddr, 4))
5618 return -1;
5619 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5620 return -1;
5621 break;
5622
5623 /* 0xe70c-0xe70d undefined */
5624
5625 case 0xe70e: /* VST - vector store */
5626 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5627 if (record_full_arch_list_add_mem (oaddr, 16))
5628 return -1;
5629 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5630 return -1;
5631 break;
5632
5633 /* 0xe70f-0xe711 undefined */
5634 /* 0xe714-0xe719 undefined */
5635
5636 case 0xe71a: /* VSCEG - vector scatter element */
5637 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5638 return -1;
5639 if (record_full_arch_list_add_mem (oaddr, 8))
5640 return -1;
5641 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5642 return -1;
5643 break;
5644
5645 case 0xe71b: /* VSCEF - vector scatter element */
5646 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5647 return -1;
5648 if (record_full_arch_list_add_mem (oaddr, 4))
5649 return -1;
5650 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5651 return -1;
5652 break;
5653
5654 /* 0xe71c-0xe720 undefined */
5655 /* 0xe723-0xe726 undefined */
5656 /* 0xe728-0xe72f undefined */
5657 /* 0xe731-0xe732 undefined */
5658 /* 0xe734-0xe735 undefined */
5659
5660 case 0xe736: /* VLM - vector load multiple */
5661 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5662 if (s390_record_vr (gdbarch, regcache, i))
5663 return -1;
5664 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5665 return -1;
5666 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5667 return -1;
5668 break;
5669
5670 /* 0xe739 undefined */
5671 /* 0xe73b-0xe73d undefined */
5672
5673 case 0xe73e: /* VSTM - vector store multiple */
5674 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5675 if (ivec[0] <= ivec[1])
5676 n = ivec[1] - ivec[0] + 1;
5677 else
5678 n = ivec[1] + 0x20 - ivec[0] + 1;
5679 if (record_full_arch_list_add_mem (oaddr, n * 16))
5680 return -1;
5681 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5682 return -1;
5683 break;
5684
5685 case 0xe63c: /* VUPKZ - vector unpack zoned */
5686 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5687 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5688 return -1;
5689 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5690 return -1;
5691 break;
5692
5693 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5694 case 0xe73f: /* VSTL - vector store with length */
5695 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5696 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5697 tmp &= 0xffffffffu;
5698 if (tmp > 15)
5699 tmp = 15;
5700 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5701 return -1;
5702 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5703 return -1;
5704 break;
5705
5706 /* 0xe747-0xe749 undefined */
5707
5708 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5709 case 0xe659: /* VSRP - vector shift and round decimal */
5710 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5711 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5712 case 0xe671: /* VAP - vector add decimal */
5713 case 0xe673: /* VSP - vector subtract decimal */
5714 case 0xe678: /* VMP - vector multiply decimal */
5715 case 0xe679: /* VMSP - vector multiply decimal */
5716 case 0xe67a: /* VDP - vector divide decimal */
5717 case 0xe67b: /* VRP - vector remainder decimal */
5718 case 0xe67e: /* VSDP - vector shift and divide decimal */
5719 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5720 case 0xe75c: /* VISTR - vector isolate string */
5721 case 0xe780: /* VFEE - vector find element equal */
5722 case 0xe781: /* VFENE - vector find element not equal */
5723 case 0xe782: /* VFA - vector find any element equal */
5724 case 0xe78a: /* VSTRC - vector string range compare */
5725 case 0xe795: /* VPKLS - vector pack logical saturate */
5726 case 0xe797: /* VPKS - vector pack saturate */
5727 case 0xe7e8: /* VFCE - vector fp compare equal */
5728 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5729 case 0xe7eb: /* VFCH - vector fp compare high */
5730 case 0xe7f8: /* VCEQ - vector compare equal */
5731 case 0xe7f9: /* VCHL - vector compare high logical */
5732 case 0xe7fb: /* VCH - vector compare high */
5733 /* vector destination + flags + FPC */
5734 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5735 return -1;
5736 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5737 return -1;
5738 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5739 return -1;
5740 break;
5741
5742 case 0xe65f: /* VTP - vector test decimal */
5743 /* flags + FPC */
5744 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5745 return -1;
5746 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5747 return -1;
5748 break;
5749
5750 /* 0xe74b-0xe74c undefined */
5751 /* 0xe74e-0xe74f undefined */
5752 /* 0xe751 undefined */
5753 /* 0xe754-0xe755 undefined */
5754 /* 0xe757-0xe75b undefined */
5755 /* 0xe75d-0xe75e undefined */
5756 /* 0xe763 undefined */
5757 /* 0xe771 undefined */
5758 /* 0xe776 undefined */
5759 /* 0xe779 undefined */
5760 /* 0xe77b undefined */
5761 /* 0xe783 undefined */
5762 /* 0xe786-0xe789 undefined */
5763 /* 0xe78b undefined */
5764 /* 0xe790-0xe793 undefined */
5765 /* 0xe796 undefined */
5766 /* 0xe798-0xe79d undefined */
5767 /* 0xe7a0 undefined */
5768 /* 0xe7a8 undefined */
5769 /* 0xe7b0-0xe7b3 undefined */
5770 /* 0xe7b5-0xe7b7 undefined */
5771 /* 0xe7ba undefined */
5772 /* 0xe7be undefined */
5773 /* 0xe7c6 undefined */
5774 /* 0xe7c8-0xe7c9 undefined */
5775
5776 case 0xe677: /* VCP - vector compare decimal */
5777 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5778 case 0xe7cb: /* WFC - vector fp compare scalar */
5779 case 0xe7d8: /* VTM - vector test under mask */
5780 case 0xe7d9: /* VECL - vector element compare logical */
5781 case 0xe7db: /* VEC - vector element compare */
5782 case 0xed08: /* KEB - compare and signal */
5783 case 0xed09: /* CEB - compare */
5784 case 0xed18: /* KDB - compare and signal */
5785 case 0xed19: /* CDB - compare */
5786 /* flags + fpc only */
5787 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5788 return -1;
5789 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5790 return -1;
5791 break;
5792
5793 /* 0xe7cd undefined */
5794 /* 0xe7cf-0xe7d3 undefined */
5795 /* 0xe7da undefined */
5796 /* 0xe7dc-0xe7dd undefined */
5797 /* 0xe7e0-0xe7e1 undefined */
5798 /* 0xe7e4 undefined */
5799 /* 0xe7e6 undefined */
5800 /* 0xe7e9 undefined */
5801 /* 0xe7ec-0xe7ed undefined */
5802 /* 0xe7f4 undefined */
5803 /* 0xe7f6 undefined */
5804 /* 0xe7fa undefined */
5805
5806 /* 0xeb00-0xeb03 undefined */
5807
5808 case 0xeb04: /* LMG - load multiple */
5809 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5810 if (s390_record_gpr_g (gdbarch, regcache, i))
5811 return -1;
5812 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5813 return -1;
5814 break;
5815
5816 /* 0xeb05-0xeb09 undefined */
5817 /* 0xeb0e undefined */
5818 /* 0xeb0f privileged: TRACG */
5819 /* 0xeb10-0xeb13 undefined */
5820
5821 case 0xeb14: /* CSY - compare and swap */
5822 case 0xebf4: /* LAN - load and and */
5823 case 0xebf6: /* LAO - load and or */
5824 case 0xebf7: /* LAX - load and xor */
5825 case 0xebf8: /* LAA - load and add */
5826 case 0xebfa: /* LAAL - load and add logical */
5827 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5828 if (record_full_arch_list_add_mem (oaddr, 4))
5829 return -1;
5830 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5831 return -1;
5832 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5833 return -1;
5834 break;
5835
5836 /* 0xeb15-0xeb1b undefined */
5837 /* 0xeb1e-0xeb1f undefined */
5838 /* 0xeb22 undefined */
5839
5840 case 0xeb23: /* CLT - compare logical and trap */
5841 case 0xeb2b: /* CLGT - compare logical and trap */
5842 /* fpc only - including possible DXC write for trapping insns */
5843 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5844 return -1;
5845 break;
5846
5847 case 0xeb24: /* STMG - store multiple */
5848 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5849 if (inib[2] <= inib[3])
5850 n = inib[3] - inib[2] + 1;
5851 else
5852 n = inib[3] + 0x10 - inib[2] + 1;
5853 if (record_full_arch_list_add_mem (oaddr, n * 8))
5854 return -1;
5855 break;
5856
5857 /* 0xeb25 privileged */
5858
5859 case 0xeb26: /* STMH - store multiple high */
5860 case 0xeb90: /* STMY - store multiple */
5861 case 0xeb9b: /* STAMY - store access multiple */
5862 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5863 if (inib[2] <= inib[3])
5864 n = inib[3] - inib[2] + 1;
5865 else
5866 n = inib[3] + 0x10 - inib[2] + 1;
5867 if (record_full_arch_list_add_mem (oaddr, n * 4))
5868 return -1;
5869 break;
5870
5871 /* 0xeb27-0xeb2a undefined */
5872
5873 case 0xeb2c: /* STCMH - store characters under mask */
5874 case 0xeb2d: /* STCMY - store characters under mask */
5875 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5876 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5877 return -1;
5878 break;
5879
5880 /* 0xeb2e undefined */
5881 /* 0xeb2f privileged */
5882
5883 case 0xeb30: /* CSG - compare and swap */
5884 case 0xebe4: /* LANG - load and and */
5885 case 0xebe6: /* LAOG - load and or */
5886 case 0xebe7: /* LAXG - load and xor */
5887 case 0xebe8: /* LAAG - load and add */
5888 case 0xebea: /* LAALG - load and add logical */
5889 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5890 if (record_full_arch_list_add_mem (oaddr, 8))
5891 return -1;
5892 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5893 return -1;
5894 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5895 return -1;
5896 break;
5897
5898 case 0xeb31: /* CDSY - compare double and swap */
5899 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5900 if (record_full_arch_list_add_mem (oaddr, 8))
5901 return -1;
5902 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5903 return -1;
5904 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5905 return -1;
5906 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5907 return -1;
5908 break;
5909
5910 /* 0xeb32-0xeb3d undefined */
5911
5912 case 0xeb3e: /* CDSG - compare double and swap */
5913 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5914 if (record_full_arch_list_add_mem (oaddr, 16))
5915 return -1;
5916 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5917 return -1;
5918 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5919 return -1;
5920 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5921 return -1;
5922 break;
5923
5924 /* 0xeb3f-0xeb43 undefined */
5925 /* 0xeb46-0xeb4b undefined */
5926 /* 0xeb4d-0xeb50 undefined */
5927
5928 case 0xeb52: /* MVIY - move */
5929 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5930 if (record_full_arch_list_add_mem (oaddr, 1))
5931 return -1;
5932 break;
5933
5934 case 0xeb54: /* NIY - and */
5935 case 0xeb56: /* OIY - or */
5936 case 0xeb57: /* XIY - xor */
5937 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5938 if (record_full_arch_list_add_mem (oaddr, 1))
5939 return -1;
5940 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5941 return -1;
5942 break;
5943
5944 /* 0xeb53 undefined */
5945 /* 0xeb58-0xeb69 undefined */
5946
5947 case 0xeb6a: /* ASI - add immediate */
5948 case 0xeb6e: /* ALSI - add immediate */
5949 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5950 if (record_full_arch_list_add_mem (oaddr, 4))
5951 return -1;
5952 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5953 return -1;
5954 break;
5955
5956 /* 0xeb6b-0xeb6d undefined */
5957 /* 0xeb6f-0xeb79 undefined */
5958
5959 case 0xeb7a: /* AGSI - add immediate */
5960 case 0xeb7e: /* ALGSI - add immediate */
5961 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5962 if (record_full_arch_list_add_mem (oaddr, 8))
5963 return -1;
5964 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5965 return -1;
5966 break;
5967
5968 /* 0xeb7b-0xeb7d undefined */
5969 /* 0xeb7f undefined */
5970
5971 case 0xeb80: /* ICMH - insert characters under mask */
5972 /* 32-bit high gpr destination + flags */
5973 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5974 return -1;
5975 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5976 return -1;
5977 break;
5978
5979 /* 0xeb82-0xeb8d undefined */
5980
5981 case 0xeb8e: /* MVCLU - move long unicode [partial] */
5982 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5983 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5984 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
5985 if (record_full_arch_list_add_mem (oaddr, tmp))
5986 return -1;
5987 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5988 return -1;
5989 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5990 return -1;
5991 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
5992 return -1;
5993 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
5994 return -1;
5995 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5996 return -1;
5997 break;
5998
5999 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6000 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6001 return -1;
6002 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6003 return -1;
6004 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6005 return -1;
6006 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6007 return -1;
6008 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6009 return -1;
6010 break;
6011
6012 /* 0xeb91-0xeb95 undefined */
6013
6014 case 0xeb96: /* LMH - load multiple high */
6015 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6016 if (s390_record_gpr_h (gdbarch, regcache, i))
6017 return -1;
6018 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6019 return -1;
6020 break;
6021
6022 /* 0xeb97 undefined */
6023
6024 case 0xeb98: /* LMY - load multiple */
6025 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6026 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6027 return -1;
6028 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6029 return -1;
6030 break;
6031
6032 /* 0xeb99 undefined */
6033
6034 case 0xeb9a: /* LAMY - load access multiple */
6035 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6036 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6037 return -1;
6038 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6039 return -1;
6040 break;
6041
6042 /* 0xeb9c-0xebbf undefined */
6043 /* 0xebc1-0xebdb undefined */
6044 /* 0xebe5 undefined */
6045 /* 0xebe9 undefined */
6046 /* 0xebeb-0xebf1 undefined */
6047 /* 0xebf5 undefined */
6048 /* 0xebf9 undefined */
6049 /* 0xebfb-0xebff undefined */
6050
6051 /* 0xed00-0xed03 undefined */
6052
6053 case 0xed04: /* LDEB - load lengthened */
6054 case 0xed0c: /* MDEB - multiply */
6055 case 0xed0d: /* DEB - divide */
6056 case 0xed14: /* SQEB - square root */
6057 case 0xed15: /* SQDB - square root */
6058 case 0xed17: /* MEEB - multiply */
6059 case 0xed1c: /* MDB - multiply */
6060 case 0xed1d: /* DDB - divide */
6061 /* float destination + fpc */
6062 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6063 return -1;
6064 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6065 return -1;
6066 break;
6067
6068 case 0xed05: /* LXDB - load lengthened */
6069 case 0xed06: /* LXEB - load lengthened */
6070 case 0xed07: /* MXDB - multiply */
6071 /* float pair destination + fpc */
6072 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6073 return -1;
6074 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6075 return -1;
6076 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6077 return -1;
6078 break;
6079
6080 case 0xed0a: /* AEB - add */
6081 case 0xed0b: /* SEB - subtract */
6082 case 0xed1a: /* ADB - add */
6083 case 0xed1b: /* SDB - subtract */
6084 /* float destination + flags + fpc */
6085 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6086 return -1;
6087 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6088 return -1;
6089 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6090 return -1;
6091 break;
6092
6093 case 0xed0e: /* MAEB - multiply and add */
6094 case 0xed0f: /* MSEB - multiply and subtract */
6095 case 0xed1e: /* MADB - multiply and add */
6096 case 0xed1f: /* MSDB - multiply and subtract */
6097 case 0xed40: /* SLDT - shift significand left */
6098 case 0xed41: /* SRDT - shift significand right */
6099 case 0xedaa: /* CDZT - convert from zoned */
6100 case 0xedae: /* CDPT - convert from packed */
6101 /* float destination [RXF] + fpc */
6102 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6103 return -1;
6104 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6105 return -1;
6106 break;
6107
6108 /* 0xed13 undefined */
6109 /* 0xed16 undefined */
6110 /* 0xed20-0xed23 undefined */
6111
6112 case 0xed24: /* LDE - load lengthened */
6113 case 0xed34: /* SQE - square root */
6114 case 0xed35: /* SQD - square root */
6115 case 0xed37: /* MEE - multiply */
6116 case 0xed64: /* LEY - load */
6117 case 0xed65: /* LDY - load */
6118 /* float destination */
6119 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6120 return -1;
6121 break;
6122
6123 case 0xed25: /* LXD - load lengthened */
6124 case 0xed26: /* LXE - load lengthened */
6125 /* float pair destination */
6126 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6127 return -1;
6128 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6129 return -1;
6130 break;
6131
6132 /* 0xed27-0xed2d undefined */
6133
6134 case 0xed2e: /* MAE - multiply and add */
6135 case 0xed2f: /* MSE - multiply and subtract */
6136 case 0xed38: /* MAYL - multiply and add unnormalized */
6137 case 0xed39: /* MYL - multiply unnormalized */
6138 case 0xed3c: /* MAYH - multiply and add unnormalized */
6139 case 0xed3d: /* MYH - multiply unnormalized */
6140 case 0xed3e: /* MAD - multiply and add */
6141 case 0xed3f: /* MSD - multiply and subtract */
6142 /* float destination [RXF] */
6143 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6144 return -1;
6145 break;
6146
6147 /* 0xed30-0xed33 undefined */
6148 /* 0xed36 undefined */
6149
6150 case 0xed3a: /* MAY - multiply and add unnormalized */
6151 case 0xed3b: /* MY - multiply unnormalized */
6152 /* float pair destination [RXF] */
6153 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6154 return -1;
6155 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6156 return -1;
6157 break;
6158
6159 /* 0xed42-0xed47 undefind */
6160
6161 case 0xed48: /* SLXT - shift significand left */
6162 case 0xed49: /* SRXT - shift significand right */
6163 case 0xedab: /* CXZT - convert from zoned */
6164 case 0xedaf: /* CXPT - convert from packed */
6165 /* float pair destination [RXF] + fpc */
6166 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6167 return -1;
6168 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6169 return -1;
6170 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6171 return -1;
6172 break;
6173
6174 /* 0xed4a-0xed4f undefind */
6175 /* 0xed52-0xed53 undefind */
6176 /* 0xed56-0xed57 undefind */
6177 /* 0xed5a-0xed63 undefind */
6178 /* 0xed68-0xeda7 undefined */
6179
6180 case 0xeda8: /* CZDT - convert to zoned */
6181 case 0xeda9: /* CZXT - convert to zoned */
6182 case 0xedac: /* CPDT - convert to packed */
6183 case 0xedad: /* CPXT - convert to packed */
6184 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6185 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6186 return -1;
6187 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6188 return -1;
6189 break;
6190
6191 /* 0xedb0-0xedff undefined */
6192
6193 default:
6194 goto UNKNOWN_OP;
6195 }
6196 break;
6197
6198 /* 0xe4 undefined */
6199
6200 case 0xe5:
6201 /* SSE/SIL-format instruction */
6202 switch (insn[0])
6203 {
6204 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6205
6206 case 0xe544: /* MVHHI - move */
6207 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6208 if (record_full_arch_list_add_mem (oaddr, 2))
6209 return -1;
6210 break;
6211
6212 /* 0xe545-0xe547 undefined */
6213
6214 case 0xe548: /* MVGHI - move */
6215 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6216 if (record_full_arch_list_add_mem (oaddr, 8))
6217 return -1;
6218 break;
6219
6220 /* 0xe549-0xe54b undefined */
6221
6222 case 0xe54c: /* MVHI - move */
6223 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6224 if (record_full_arch_list_add_mem (oaddr, 4))
6225 return -1;
6226 break;
6227
6228 /* 0xe54d-0xe553 undefined */
6229
6230 case 0xe554: /* CHHSI - compare halfword immediate */
6231 case 0xe555: /* CLHHSI - compare logical immediate */
6232 case 0xe558: /* CGHSI - compare halfword immediate */
6233 case 0xe559: /* CLGHSI - compare logical immediate */
6234 case 0xe55c: /* CHSI - compare halfword immediate */
6235 case 0xe55d: /* CLFHSI - compare logical immediate */
6236 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6237 return -1;
6238 break;
6239
6240 /* 0xe556-0xe557 undefined */
6241 /* 0xe55a-0xe55b undefined */
6242 /* 0xe55e-0xe55f undefined */
6243
6244 case 0xe560: /* TBEGIN - transaction begin */
6245 /* The transaction will be immediately aborted after this
6246 instruction, due to single-stepping. This instruction is
6247 only supported so that the program can fail a few times
6248 and go to the non-transactional fallback. */
6249 if (inib[4])
6250 {
6251 /* Transaction diagnostic block - user. */
6252 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6253 if (record_full_arch_list_add_mem (oaddr, 256))
6254 return -1;
6255 }
6256 /* Transaction diagnostic block - supervisor. */
6257 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6258 return -1;
6259 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6260 return -1;
6261 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6262 return -1;
6263 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6264 return -1;
6265 for (i = 0; i < 16; i++)
6266 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6267 return -1;
6268 /* And flags. */
6269 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6270 return -1;
6271 break;
6272
6273 /* 0xe561 unsupported: TBEGINC */
6274 /* 0xe562-0xe5ff undefined */
6275
6276 default:
6277 goto UNKNOWN_OP;
6278 }
6279 break;
6280
6281 case 0xec:
6282 /* RIE/RIS/RRS-format instruction */
6283 switch (ibyte[0] << 8 | ibyte[5])
6284 {
6285 /* 0xec00-0xec41 undefined */
6286
6287 case 0xec42: /* LOCHI - load halfword immediate on condition */
6288 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6289 /* 32-bit or native gpr destination */
6290 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6291 return -1;
6292 break;
6293
6294 /* 0xec43 undefined */
6295
6296 case 0xec44: /* BRXHG - branch relative on index high */
6297 case 0xec45: /* BRXLG - branch relative on index low or equal */
6298 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6299 case 0xec59: /* RISBGN - rotate then insert selected bits */
6300 /* 64-bit gpr destination */
6301 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6302 return -1;
6303 break;
6304
6305 /* 0xec47-0xec4d undefined */
6306
6307 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6308 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6309 /* 32-bit high gpr destination */
6310 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6311 return -1;
6312 break;
6313
6314 /* 0xec4f-0xec50 undefined */
6315 /* 0xec52-0xec53 undefined */
6316
6317 case 0xec54: /* RNSBG - rotate then and selected bits */
6318 case 0xec55: /* RISBG - rotate then insert selected bits */
6319 case 0xec56: /* ROSBG - rotate then or selected bits */
6320 case 0xec57: /* RXSBG - rotate then xor selected bits */
6321 case 0xecd9: /* AGHIK - add immediate */
6322 case 0xecdb: /* ALGHSIK - add logical immediate */
6323 /* 64-bit gpr destination + flags */
6324 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6325 return -1;
6326 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6327 return -1;
6328 break;
6329
6330 /* 0xec58 undefined */
6331 /* 0xec5a-0xec5c undefined */
6332 /* 0xec5e-0xec63 undefined */
6333
6334 case 0xec64: /* CGRJ - compare and branch relative */
6335 case 0xec65: /* CLGRJ - compare logical and branch relative */
6336 case 0xec76: /* CRJ - compare and branch relative */
6337 case 0xec77: /* CLRJ - compare logical and branch relative */
6338 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6339 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6340 case 0xec7e: /* CIJ - compare immediate and branch relative */
6341 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6342 case 0xece4: /* CGRB - compare and branch */
6343 case 0xece5: /* CLGRB - compare logical and branch */
6344 case 0xecf6: /* CRB - compare and branch */
6345 case 0xecf7: /* CLRB - compare logical and branch */
6346 case 0xecfc: /* CGIB - compare immediate and branch */
6347 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6348 case 0xecfe: /* CIB - compare immediate and branch */
6349 case 0xecff: /* CLIB - compare logical immediate and branch */
6350 break;
6351
6352 /* 0xec66-0xec6f undefined */
6353
6354 case 0xec70: /* CGIT - compare immediate and trap */
6355 case 0xec71: /* CLGIT - compare logical immediate and trap */
6356 case 0xec72: /* CIT - compare immediate and trap */
6357 case 0xec73: /* CLFIT - compare logical immediate and trap */
6358 /* fpc only - including possible DXC write for trapping insns */
6359 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6360 return -1;
6361 break;
6362
6363 /* 0xec74-0xec75 undefined */
6364 /* 0xec78-0xec7b undefined */
6365
6366 /* 0xec80-0xecd7 undefined */
6367
6368 case 0xecd8: /* AHIK - add immediate */
6369 case 0xecda: /* ALHSIK - add logical immediate */
6370 /* 32-bit gpr destination + flags */
6371 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6372 return -1;
6373 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6374 return -1;
6375 break;
6376
6377 /* 0xecdc-0xece3 undefined */
6378 /* 0xece6-0xecf5 undefined */
6379 /* 0xecf8-0xecfb undefined */
6380
6381 default:
6382 goto UNKNOWN_OP;
6383 }
6384 break;
6385
6386 case 0xee: /* PLO - perform locked operation */
6387 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6388 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6389 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6390 if (!(tmp & 0x100))
6391 {
6392 uint8_t fc = tmp & 0xff;
6393 gdb_byte buf[8];
6394 switch (fc)
6395 {
6396 case 0x00: /* CL */
6397 /* op1c */
6398 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6399 return -1;
6400 /* op3 */
6401 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6402 return -1;
6403 break;
6404
6405 case 0x01: /* CLG */
6406 /* op1c */
6407 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6408 return -1;
6409 /* op3 */
6410 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6411 return -1;
6412 break;
6413
6414 case 0x02: /* CLGR */
6415 /* op1c */
6416 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6417 return -1;
6418 /* op3 */
6419 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6420 return -1;
6421 break;
6422
6423 case 0x03: /* CLX */
6424 /* op1c */
6425 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6426 return -1;
6427 /* op3 */
6428 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6429 return -1;
6430 break;
6431
6432 case 0x08: /* DCS */
6433 /* op3c */
6434 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6435 return -1;
6436 /* fallthru */
6437 case 0x0c: /* CSST */
6438 /* op4 */
6439 if (record_full_arch_list_add_mem (oaddr2, 4))
6440 return -1;
6441 goto CS;
6442
6443 case 0x14: /* CSTST */
6444 /* op8 */
6445 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6446 return -1;
6447 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6448 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6449 if (record_full_arch_list_add_mem (oaddr3, 4))
6450 return -1;
6451 /* fallthru */
6452 case 0x10: /* CSDST */
6453 /* op6 */
6454 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6455 return -1;
6456 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6457 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6458 if (record_full_arch_list_add_mem (oaddr3, 4))
6459 return -1;
6460 /* op4 */
6461 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6462 return -1;
6463 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6464 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6465 if (record_full_arch_list_add_mem (oaddr3, 4))
6466 return -1;
6467 /* fallthru */
6468 case 0x04: /* CS */
6469 CS:
6470 /* op1c */
6471 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6472 return -1;
6473 /* op2 */
6474 if (record_full_arch_list_add_mem (oaddr, 4))
6475 return -1;
6476 break;
6477
6478 case 0x09: /* DCSG */
6479 /* op3c */
6480 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6481 return -1;
6482 goto CSSTG;
6483
6484 case 0x15: /* CSTSTG */
6485 /* op8 */
6486 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6487 return -1;
6488 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6489 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6490 if (record_full_arch_list_add_mem (oaddr3, 8))
6491 return -1;
6492 /* fallthru */
6493 case 0x11: /* CSDSTG */
6494 /* op6 */
6495 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6496 return -1;
6497 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6498 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6499 if (record_full_arch_list_add_mem (oaddr3, 8))
6500 return -1;
6501 /* fallthru */
6502 case 0x0d: /* CSSTG */
6503 CSSTG:
6504 /* op4 */
6505 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6506 return -1;
6507 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6508 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6509 if (record_full_arch_list_add_mem (oaddr3, 8))
6510 return -1;
6511 /* fallthru */
6512 case 0x05: /* CSG */
6513 /* op1c */
6514 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6515 return -1;
6516 /* op2 */
6517 if (record_full_arch_list_add_mem (oaddr, 8))
6518 return -1;
6519 break;
6520
6521 case 0x0a: /* DCSGR */
6522 /* op3c */
6523 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6524 return -1;
6525 /* fallthru */
6526 case 0x0e: /* CSSTGR */
6527 /* op4 */
6528 if (record_full_arch_list_add_mem (oaddr2, 8))
6529 return -1;
6530 goto CSGR;
6531
6532 case 0x16: /* CSTSTGR */
6533 /* op8 */
6534 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6535 return -1;
6536 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6537 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6538 if (record_full_arch_list_add_mem (oaddr3, 8))
6539 return -1;
6540 /* fallthru */
6541 case 0x12: /* CSDSTGR */
6542 /* op6 */
6543 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6544 return -1;
6545 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6546 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6547 if (record_full_arch_list_add_mem (oaddr3, 8))
6548 return -1;
6549 /* op4 */
6550 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6551 return -1;
6552 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6553 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6554 if (record_full_arch_list_add_mem (oaddr3, 8))
6555 return -1;
6556 /* fallthru */
6557 case 0x06: /* CSGR */
6558 CSGR:
6559 /* op1c */
6560 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6561 return -1;
6562 /* op2 */
6563 if (record_full_arch_list_add_mem (oaddr, 8))
6564 return -1;
6565 break;
6566
6567 case 0x0b: /* DCSX */
6568 /* op3c */
6569 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6570 return -1;
6571 goto CSSTX;
6572
6573 case 0x17: /* CSTSTX */
6574 /* op8 */
6575 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6576 return -1;
6577 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6578 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6579 if (record_full_arch_list_add_mem (oaddr3, 16))
6580 return -1;
6581 /* fallthru */
6582 case 0x13: /* CSDSTX */
6583 /* op6 */
6584 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6585 return -1;
6586 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6587 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6588 if (record_full_arch_list_add_mem (oaddr3, 16))
6589 return -1;
6590 /* fallthru */
6591 case 0x0f: /* CSSTX */
6592 CSSTX:
6593 /* op4 */
6594 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6595 return -1;
6596 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6597 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6598 if (record_full_arch_list_add_mem (oaddr3, 16))
6599 return -1;
6600 /* fallthru */
6601 case 0x07: /* CSX */
6602 /* op1c */
6603 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6604 return -1;
6605 /* op2 */
6606 if (record_full_arch_list_add_mem (oaddr, 16))
6607 return -1;
6608 break;
6609
6610 default:
6611 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6612 fc, paddress (gdbarch, addr));
6613 return -1;
6614 }
6615 }
6616 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6617 return -1;
6618 break;
6619
6620 case 0xef: /* LMD - load multiple disjoint */
6621 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6622 if (s390_record_gpr_g (gdbarch, regcache, i))
6623 return -1;
6624 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6625 return -1;
6626 break;
6627
6628 case 0xf0: /* SRP - shift and round decimal */
6629 case 0xf8: /* ZAP - zero and add */
6630 case 0xfa: /* AP - add decimal */
6631 case 0xfb: /* SP - subtract decimal */
6632 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6633 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6634 return -1;
6635 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6636 return -1;
6637 /* DXC may be written */
6638 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6639 return -1;
6640 break;
6641
6642 case 0xf1: /* MVO - move with offset */
6643 case 0xf2: /* PACK - pack */
6644 case 0xf3: /* UNPK - unpack */
6645 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6646 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6647 return -1;
6648 break;
6649
6650 /* 0xf4-0xf7 undefined */
6651
6652 case 0xf9: /* CP - compare decimal */
6653 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6654 return -1;
6655 /* DXC may be written */
6656 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6657 return -1;
6658 break;
6659
6660 case 0xfc: /* MP - multiply decimal */
6661 case 0xfd: /* DP - divide decimal */
6662 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6663 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6664 return -1;
6665 /* DXC may be written */
6666 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6667 return -1;
6668 break;
6669
6670 /* 0xfe-0xff undefined */
6671
6672 default:
6673 UNKNOWN_OP:
6674 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
6675 "at %s.\n", insn[0], paddress (gdbarch, addr));
6676 return -1;
6677 }
6678
6679 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6680 return -1;
6681 if (record_full_arch_list_add_end ())
6682 return -1;
6683 return 0;
6684 }
6685
6686 /* Miscellaneous. */
6687
6688 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6689 "-mcmodel=large". */
6690
6691 static char *
6692 s390_gcc_target_options (struct gdbarch *gdbarch)
6693 {
6694 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
6695 }
6696
6697 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6698 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6699 always "s390". Note that an s390x compiler supports "-m31" as
6700 well. */
6701
6702 static const char *
6703 s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6704 {
6705 return "s390x?";
6706 }
6707
6708 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
6709 gdbarch.h. */
6710
6711 static int
6712 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6713 {
6714 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6715 or indirection. */
6716 || *s == '%' /* Register access. */
6717 || isdigit (*s)); /* Literal number. */
6718 }
6719
6720 /* gdbarch init. */
6721
6722 /* Validate the range of registers. NAMES must be known at compile time. */
6723
6724 #define s390_validate_reg_range(feature, tdesc_data, start, names) \
6725 do \
6726 { \
6727 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6728 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6729 return false; \
6730 } \
6731 while (0)
6732
6733 /* Validate the target description. Also numbers registers contained in
6734 tdesc. */
6735
6736 static bool
6737 s390_tdesc_valid (struct gdbarch_tdep *tdep,
6738 struct tdesc_arch_data *tdesc_data)
6739 {
6740 static const char *const psw[] = {
6741 "pswm", "pswa"
6742 };
6743 static const char *const gprs[] = {
6744 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6745 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6746 };
6747 static const char *const fprs[] = {
6748 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6749 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6750 };
6751 static const char *const acrs[] = {
6752 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6753 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6754 };
6755 static const char *const gprs_lower[] = {
6756 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6757 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6758 };
6759 static const char *const gprs_upper[] = {
6760 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6761 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6762 };
6763 static const char *const tdb_regs[] = {
6764 "tdb0", "tac", "tct", "atia",
6765 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6766 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6767 };
6768 static const char *const vxrs_low[] = {
6769 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6770 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6771 };
6772 static const char *const vxrs_high[] = {
6773 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6774 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6775 };
6776 static const char *const gs_cb[] = {
6777 "gsd", "gssm", "gsepla",
6778 };
6779 static const char *const gs_bc[] = {
6780 "bc_gsd", "bc_gssm", "bc_gsepla",
6781 };
6782
6783 const struct target_desc *tdesc = tdep->tdesc;
6784 const struct tdesc_feature *feature;
6785
6786 if (!tdesc_has_registers (tdesc))
6787 return false;
6788
6789 /* Core registers, i.e. general purpose and PSW. */
6790 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6791 if (feature == NULL)
6792 return false;
6793
6794 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6795
6796 if (tdesc_unnumbered_register (feature, "r0"))
6797 {
6798 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6799 }
6800 else
6801 {
6802 tdep->have_upper = true;
6803 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6804 gprs_lower);
6805 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6806 gprs_upper);
6807 }
6808
6809 /* Floating point registers. */
6810 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6811 if (feature == NULL)
6812 return false;
6813
6814 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6815 return false;
6816
6817 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6818
6819 /* Access control registers. */
6820 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6821 if (feature == NULL)
6822 return false;
6823
6824 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6825
6826 /* Optional GNU/Linux-specific "registers". */
6827 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6828 if (feature)
6829 {
6830 tdesc_numbered_register (feature, tdesc_data,
6831 S390_ORIG_R2_REGNUM, "orig_r2");
6832
6833 if (tdesc_numbered_register (feature, tdesc_data,
6834 S390_LAST_BREAK_REGNUM, "last_break"))
6835 tdep->have_linux_v1 = true;
6836
6837 if (tdesc_numbered_register (feature, tdesc_data,
6838 S390_SYSTEM_CALL_REGNUM, "system_call"))
6839 tdep->have_linux_v2 = true;
6840
6841 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6842 return false;
6843 }
6844
6845 /* Transaction diagnostic block. */
6846 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6847 if (feature)
6848 {
6849 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6850 tdb_regs);
6851 tdep->have_tdb = true;
6852 }
6853
6854 /* Vector registers. */
6855 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6856 if (feature)
6857 {
6858 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6859 vxrs_low);
6860 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6861 vxrs_high);
6862 tdep->have_vx = true;
6863 }
6864
6865 /* Guarded-storage registers. */
6866 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6867 if (feature)
6868 {
6869 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6870 tdep->have_gs = true;
6871 }
6872
6873 /* Guarded-storage broadcast control. */
6874 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6875 if (feature)
6876 {
6877 if (!tdep->have_gs)
6878 return false;
6879 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6880 gs_bc);
6881 }
6882
6883 return true;
6884 }
6885
6886 /* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6887 memory after use. */
6888
6889 static struct gdbarch_tdep *
6890 s390_gdbarch_tdep_alloc ()
6891 {
6892 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
6893
6894 tdep->tdesc = NULL;
6895
6896 tdep->abi = ABI_NONE;
6897 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6898
6899 tdep->gpr_full_regnum = -1;
6900 tdep->v0_full_regnum = -1;
6901 tdep->pc_regnum = -1;
6902 tdep->cc_regnum = -1;
6903
6904 tdep->have_upper = false;
6905 tdep->have_linux_v1 = false;
6906 tdep->have_linux_v2 = false;
6907 tdep->have_tdb = false;
6908 tdep->have_vx = false;
6909 tdep->have_gs = false;
6910
6911 tdep->s390_syscall_record = NULL;
6912
6913 return tdep;
6914 }
6915
6916 /* Set up gdbarch struct. */
6917
6918 static struct gdbarch *
6919 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
6920 {
6921 const struct target_desc *tdesc = info.target_desc;
6922 int first_pseudo_reg, last_pseudo_reg;
6923 static const char *const stap_register_prefixes[] = { "%", NULL };
6924 static const char *const stap_register_indirection_prefixes[] = { "(",
6925 NULL };
6926 static const char *const stap_register_indirection_suffixes[] = { ")",
6927 NULL };
6928
6929 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
6930 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
6931 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
6932 info.tdesc_data = tdesc_data;
6933
6934 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
6935 set_gdbarch_char_signed (gdbarch, 0);
6936
6937 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
6938 We can safely let them default to 128-bit, since the debug info
6939 will give the size of type actually used in each case. */
6940 set_gdbarch_long_double_bit (gdbarch, 128);
6941 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
6942
6943 /* Breakpoints. */
6944 /* Amount PC must be decremented by after a breakpoint. This is
6945 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
6946 always. */
6947 set_gdbarch_decr_pc_after_break (gdbarch, 2);
6948 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
6949 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
6950
6951 /* Displaced stepping. */
6952 set_gdbarch_displaced_step_copy_insn (gdbarch,
6953 s390_displaced_step_copy_insn);
6954 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
6955 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
6956 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
6957 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
6958 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
6959
6960 /* Prologue analysis. */
6961 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
6962
6963 /* Register handling. */
6964 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
6965 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
6966 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
6967 set_gdbarch_guess_tracepoint_registers (gdbarch,
6968 s390_guess_tracepoint_registers);
6969 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6970 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6971 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
6972
6973 /* Pseudo registers. */
6974 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
6975 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
6976 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
6977 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
6978 set_tdesc_pseudo_register_reggroup_p (gdbarch,
6979 s390_pseudo_register_reggroup_p);
6980 set_gdbarch_ax_pseudo_register_collect (gdbarch,
6981 s390_ax_pseudo_register_collect);
6982 set_gdbarch_ax_pseudo_register_push_stack
6983 (gdbarch, s390_ax_pseudo_register_push_stack);
6984 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
6985
6986 /* Inferior function calls. */
6987 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
6988 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
6989 set_gdbarch_frame_align (gdbarch, s390_frame_align);
6990 set_gdbarch_return_value (gdbarch, s390_return_value);
6991
6992 /* Frame handling. */
6993 /* Stack grows downward. */
6994 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
6995 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
6996 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
6997 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
6998 dwarf2_append_unwinders (gdbarch);
6999 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7000 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7001
7002 switch (info.bfd_arch_info->mach)
7003 {
7004 case bfd_mach_s390_31:
7005 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7006 break;
7007
7008 case bfd_mach_s390_64:
7009 set_gdbarch_long_bit (gdbarch, 64);
7010 set_gdbarch_long_long_bit (gdbarch, 64);
7011 set_gdbarch_ptr_bit (gdbarch, 64);
7012 set_gdbarch_address_class_type_flags (gdbarch,
7013 s390_address_class_type_flags);
7014 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7015 s390_address_class_type_flags_to_name);
7016 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7017 s390_address_class_name_to_type_flags);
7018 break;
7019 }
7020
7021 /* SystemTap functions. */
7022 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7023 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7024 stap_register_indirection_prefixes);
7025 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7026 stap_register_indirection_suffixes);
7027
7028 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7029 set_gdbarch_valid_disassembler_options (gdbarch,
7030 disassembler_options_s390 ());
7031
7032 /* Process record-replay */
7033 set_gdbarch_process_record (gdbarch, s390_process_record);
7034
7035 /* Miscellaneous. */
7036 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7037 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7038 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7039
7040 /* Initialize the OSABI. */
7041 gdbarch_init_osabi (info, gdbarch);
7042
7043 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7044 cause GDB to crash with an internal error when the user tries to set
7045 an unsupported OSABI. */
7046 if (!tdesc_has_registers (tdesc))
7047 {
7048 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7049 tdesc = tdesc_s390_linux32;
7050 else
7051 tdesc = tdesc_s390x_linux64;
7052 }
7053 tdep->tdesc = tdesc;
7054
7055 /* Check any target description for validity. */
7056 if (!s390_tdesc_valid (tdep, tdesc_data))
7057 {
7058 tdesc_data_cleanup (tdesc_data);
7059 xfree (tdep);
7060 gdbarch_free (gdbarch);
7061 return NULL;
7062 }
7063
7064 /* Determine vector ABI. */
7065 #ifdef HAVE_ELF
7066 if (tdep->have_vx
7067 && info.abfd != NULL
7068 && info.abfd->format == bfd_object
7069 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7070 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7071 Tag_GNU_S390_ABI_Vector) == 2)
7072 tdep->vector_abi = S390_VECTOR_ABI_128;
7073 #endif
7074
7075 /* Find a candidate among extant architectures. */
7076 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7077 arches != NULL;
7078 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7079 {
7080 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
7081 if (!tmp)
7082 continue;
7083 /* A program can 'choose' not to use the vector registers when they
7084 are present. Leading to the same tdesc but different tdep and
7085 thereby a different gdbarch. */
7086 if (tmp->vector_abi != tdep->vector_abi)
7087 continue;
7088
7089 tdesc_data_cleanup (tdesc_data);
7090 xfree (tdep);
7091 gdbarch_free (gdbarch);
7092 return arches->gdbarch;
7093 }
7094
7095 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
7096 set_gdbarch_register_name (gdbarch, s390_register_name);
7097
7098 /* Assign pseudo register numbers. */
7099 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7100 last_pseudo_reg = first_pseudo_reg;
7101 if (tdep->have_upper)
7102 {
7103 tdep->gpr_full_regnum = last_pseudo_reg;
7104 last_pseudo_reg += 16;
7105 }
7106 if (tdep->have_vx)
7107 {
7108 tdep->v0_full_regnum = last_pseudo_reg;
7109 last_pseudo_reg += 16;
7110 }
7111 tdep->pc_regnum = last_pseudo_reg++;
7112 tdep->cc_regnum = last_pseudo_reg++;
7113 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7114 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7115
7116 /* Frame handling. */
7117 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7118 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7119 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7120 frame_base_set_default (gdbarch, &s390_frame_base);
7121
7122 return gdbarch;
7123 }
7124
7125 void
7126 _initialize_s390_tdep (void)
7127 {
7128 /* Hook us into the gdbarch mechanism. */
7129 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7130
7131 initialize_tdesc_s390_linux32 ();
7132 initialize_tdesc_s390x_linux64 ();
7133 }
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