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* mn10300-tdep.c (mn10300_gdbarch_init): We do have a
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "obstack.h"
30 #include "symtab.h"
31 #include "symfile.h"
32 #include "gdbtypes.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "value.h"
36 #include "dis-asm.h"
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
41 #include "regcache.h"
42
43 #include "solib-svr4.h"
44
45 #undef XMALLOC
46 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
47
48 void (*sh_show_regs) (void);
49 int (*print_sh_insn) (bfd_vma, disassemble_info*);
50
51 /* Define other aspects of the stack frame.
52 we keep a copy of the worked out return pc lying around, since it
53 is a useful bit of info */
54
55 struct frame_extra_info
56 {
57 CORE_ADDR return_pc;
58 int leaf_function;
59 int f_offset;
60 };
61
62 #if 0
63 #ifdef _WIN32_WCE
64 char **sh_register_names = sh3_reg_names;
65 #else
66 char **sh_register_names = sh_generic_reg_names;
67 #endif
68 #endif
69
70 static char *
71 sh_generic_register_name (int reg_nr)
72 {
73 static char *register_names[] =
74 {
75 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
76 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
77 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
78 "fpul", "fpscr",
79 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
80 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
81 "ssr", "spc",
82 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
83 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
84 };
85 if (reg_nr < 0)
86 return NULL;
87 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
88 return NULL;
89 return register_names[reg_nr];
90 }
91
92 static char *
93 sh_sh_register_name (int reg_nr)
94 {
95 static char *register_names[] =
96 {
97 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
98 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
99 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
100 "", "",
101 "", "", "", "", "", "", "", "",
102 "", "", "", "", "", "", "", "",
103 "", "",
104 "", "", "", "", "", "", "", "",
105 "", "", "", "", "", "", "", "",
106 };
107 if (reg_nr < 0)
108 return NULL;
109 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
110 return NULL;
111 return register_names[reg_nr];
112 }
113
114 static char *
115 sh_sh3_register_name (int reg_nr)
116 {
117 static char *register_names[] =
118 {
119 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
120 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
121 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
122 "", "",
123 "", "", "", "", "", "", "", "",
124 "", "", "", "", "", "", "", "",
125 "ssr", "spc",
126 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
127 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
128 };
129 if (reg_nr < 0)
130 return NULL;
131 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
132 return NULL;
133 return register_names[reg_nr];
134 }
135
136 static char *
137 sh_sh3e_register_name (int reg_nr)
138 {
139 static char *register_names[] =
140 {
141 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
142 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
143 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
144 "fpul", "fpscr",
145 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
146 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
147 "ssr", "spc",
148 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
149 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
150 };
151 if (reg_nr < 0)
152 return NULL;
153 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
154 return NULL;
155 return register_names[reg_nr];
156 }
157
158 static char *
159 sh_sh_dsp_register_name (int reg_nr)
160 {
161 static char *register_names[] =
162 {
163 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
164 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
165 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
166 "", "dsr",
167 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
168 "y0", "y1", "", "", "", "", "", "mod",
169 "", "",
170 "rs", "re", "", "", "", "", "", "",
171 "", "", "", "", "", "", "", "",
172 };
173 if (reg_nr < 0)
174 return NULL;
175 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
176 return NULL;
177 return register_names[reg_nr];
178 }
179
180 static char *
181 sh_sh3_dsp_register_name (int reg_nr)
182 {
183 static char *register_names[] =
184 {
185 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
186 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
187 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
188 "", "dsr",
189 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
190 "y0", "y1", "", "", "", "", "", "mod",
191 "ssr", "spc",
192 "rs", "re", "", "", "", "", "", "",
193 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
194 "", "", "", "", "", "", "", "",
195 };
196 if (reg_nr < 0)
197 return NULL;
198 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
199 return NULL;
200 return register_names[reg_nr];
201 }
202
203 static char *
204 sh_sh4_register_name (int reg_nr)
205 {
206 static char *register_names[] =
207 {
208 /* general registers 0-15 */
209 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
210 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
211 /* 16 - 22 */
212 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
213 /* 23, 24 */
214 "fpul", "fpscr",
215 /* floating point registers 25 - 40 */
216 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
217 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
218 /* 41, 42 */
219 "ssr", "spc",
220 /* bank 0 43 - 50 */
221 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
222 /* bank 1 51 - 58 */
223 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
224 /* double precision (pseudo) 59 - 66 */
225 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
226 /* vectors (pseudo) 67 - 70 */
227 "fv0", "fv4", "fv8", "fv12",
228 /* FIXME: missing XF 71 - 86 */
229 /* FIXME: missing XD 87 - 94 */
230 };
231 if (reg_nr < 0)
232 return NULL;
233 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
234 return NULL;
235 return register_names[reg_nr];
236 }
237
238 static unsigned char *
239 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
240 {
241 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
242 static unsigned char breakpoint[] = {0xc3, 0xc3};
243
244 *lenptr = sizeof (breakpoint);
245 return breakpoint;
246 }
247
248 /* Prologue looks like
249 [mov.l <regs>,@-r15]...
250 [sts.l pr,@-r15]
251 [mov.l r14,@-r15]
252 [mov r15,r14]
253
254 Actually it can be more complicated than this. For instance, with
255 newer gcc's:
256
257 mov.l r14,@-r15
258 add #-12,r15
259 mov r15,r14
260 mov r4,r1
261 mov r5,r2
262 mov.l r6,@(4,r14)
263 mov.l r7,@(8,r14)
264 mov.b r1,@r14
265 mov r14,r1
266 mov r14,r1
267 add #2,r1
268 mov.w r2,@r1
269
270 */
271
272 /* STS.L PR,@-r15 0100111100100010
273 r15-4-->r15, PR-->(r15) */
274 #define IS_STS(x) ((x) == 0x4f22)
275
276 /* MOV.L Rm,@-r15 00101111mmmm0110
277 r15-4-->r15, Rm-->(R15) */
278 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
279
280 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
281
282 /* MOV r15,r14 0110111011110011
283 r15-->r14 */
284 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
285
286 /* ADD #imm,r15 01111111iiiiiiii
287 r15+imm-->r15 */
288 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
289
290 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
291 #define IS_SHLL_R3(x) ((x) == 0x4300)
292
293 /* ADD r3,r15 0011111100111100
294 r15+r3-->r15 */
295 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
296
297 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
298 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
299 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
300 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
301
302 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
303 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
304 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
305 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
306 #define IS_ARG_MOV(x) \
307 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
308 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
309 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
310
311 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
312 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
313 #define IS_MOV_R14(x) \
314 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
315
316 #define FPSCR_SZ (1 << 20)
317
318 /* Skip any prologue before the guts of a function */
319
320 /* Skip the prologue using the debug information. If this fails we'll
321 fall back on the 'guess' method below. */
322 static CORE_ADDR
323 after_prologue (CORE_ADDR pc)
324 {
325 struct symtab_and_line sal;
326 CORE_ADDR func_addr, func_end;
327
328 /* If we can not find the symbol in the partial symbol table, then
329 there is no hope we can determine the function's start address
330 with this code. */
331 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
332 return 0;
333
334 /* Get the line associated with FUNC_ADDR. */
335 sal = find_pc_line (func_addr, 0);
336
337 /* There are only two cases to consider. First, the end of the source line
338 is within the function bounds. In that case we return the end of the
339 source line. Second is the end of the source line extends beyond the
340 bounds of the current function. We need to use the slow code to
341 examine instructions in that case. */
342 if (sal.end < func_end)
343 return sal.end;
344 else
345 return 0;
346 }
347
348 /* Here we look at each instruction in the function, and try to guess
349 where the prologue ends. Unfortunately this is not always
350 accurate. */
351 static CORE_ADDR
352 skip_prologue_hard_way (CORE_ADDR start_pc)
353 {
354 CORE_ADDR here, end;
355 int updated_fp = 0;
356
357 if (!start_pc)
358 return 0;
359
360 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
361 {
362 int w = read_memory_integer (here, 2);
363 here += 2;
364 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
365 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
366 || IS_ARG_MOV (w) || IS_MOV_R14 (w))
367 {
368 start_pc = here;
369 }
370 else if (IS_MOV_SP_FP (w))
371 {
372 start_pc = here;
373 updated_fp = 1;
374 }
375 else
376 /* Don't bail out yet, if we are before the copy of sp. */
377 if (updated_fp)
378 break;
379 }
380
381 return start_pc;
382 }
383
384 static CORE_ADDR
385 sh_skip_prologue (CORE_ADDR pc)
386 {
387 CORE_ADDR post_prologue_pc;
388
389 /* See if we can determine the end of the prologue via the symbol table.
390 If so, then return either PC, or the PC after the prologue, whichever
391 is greater. */
392
393 post_prologue_pc = after_prologue (pc);
394
395 /* If after_prologue returned a useful address, then use it. Else
396 fall back on the instruction skipping code. */
397 if (post_prologue_pc != 0)
398 return max (pc, post_prologue_pc);
399 else
400 return (skip_prologue_hard_way (pc));
401 }
402
403 /* Immediately after a function call, return the saved pc.
404 Can't always go through the frames for this because on some machines
405 the new frame is not set up until the new function executes
406 some instructions.
407
408 The return address is the value saved in the PR register + 4 */
409 static CORE_ADDR
410 sh_saved_pc_after_call (struct frame_info *frame)
411 {
412 return (ADDR_BITS_REMOVE(read_register(PR_REGNUM)));
413 }
414
415 /* Should call_function allocate stack space for a struct return? */
416 static int
417 sh_use_struct_convention (int gcc_p, struct type *type)
418 {
419 return (TYPE_LENGTH (type) > 1);
420 }
421
422 /* Store the address of the place in which to copy the structure the
423 subroutine will return. This is called from call_function.
424
425 We store structs through a pointer passed in R0 */
426 static void
427 sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
428 {
429 write_register (STRUCT_RETURN_REGNUM, (addr));
430 }
431
432 /* Disassemble an instruction. */
433 static int
434 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
435 {
436 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
437 return print_insn_sh (memaddr, info);
438 else
439 return print_insn_shl (memaddr, info);
440 }
441
442 /* Given a GDB frame, determine the address of the calling function's frame.
443 This will be used to create a new GDB frame struct, and then
444 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
445
446 For us, the frame address is its stack pointer value, so we look up
447 the function prologue to determine the caller's sp value, and return it. */
448 static CORE_ADDR
449 sh_frame_chain (struct frame_info *frame)
450 {
451 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
452 return frame->frame; /* dummy frame same as caller's frame */
453 if (frame->pc && !inside_entry_file (frame->pc))
454 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
455 else
456 return 0;
457 }
458
459 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
460 we might want to do here is to check REGNUM against the clobber mask, and
461 somehow flag it as invalid if it isn't saved on the stack somewhere. This
462 would provide a graceful failure mode when trying to get the value of
463 caller-saves registers for an inner frame. */
464
465 static CORE_ADDR
466 sh_find_callers_reg (struct frame_info *fi, int regnum)
467 {
468 for (; fi; fi = fi->next)
469 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
470 /* When the caller requests PR from the dummy frame, we return PC because
471 that's where the previous routine appears to have done a call from. */
472 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
473 else
474 {
475 FRAME_INIT_SAVED_REGS (fi);
476 if (!fi->pc)
477 return 0;
478 if (fi->saved_regs[regnum] != 0)
479 return read_memory_integer (fi->saved_regs[regnum],
480 REGISTER_RAW_SIZE (regnum));
481 }
482 return read_register (regnum);
483 }
484
485 /* Put here the code to store, into a struct frame_saved_regs, the
486 addresses of the saved registers of frame described by FRAME_INFO.
487 This includes special registers such as pc and fp saved in special
488 ways in the stack frame. sp is even more special: the address we
489 return for it IS the sp for the next frame. */
490 static void
491 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
492 {
493 int where[NUM_REGS];
494 int rn;
495 int have_fp = 0;
496 int depth;
497 int pc;
498 int opc;
499 int insn;
500 int r3_val = 0;
501 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
502
503 if (fi->saved_regs == NULL)
504 frame_saved_regs_zalloc (fi);
505 else
506 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
507
508 if (dummy_regs)
509 {
510 /* DANGER! This is ONLY going to work if the char buffer format of
511 the saved registers is byte-for-byte identical to the
512 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
513 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
514 return;
515 }
516
517 fi->extra_info->leaf_function = 1;
518 fi->extra_info->f_offset = 0;
519
520 for (rn = 0; rn < NUM_REGS; rn++)
521 where[rn] = -1;
522
523 depth = 0;
524
525 /* Loop around examining the prologue insns until we find something
526 that does not appear to be part of the prologue. But give up
527 after 20 of them, since we're getting silly then. */
528
529 pc = get_pc_function_start (fi->pc);
530 if (!pc)
531 {
532 fi->pc = 0;
533 return;
534 }
535
536 for (opc = pc + (2 * 28); pc < opc; pc += 2)
537 {
538 insn = read_memory_integer (pc, 2);
539 /* See where the registers will be saved to */
540 if (IS_PUSH (insn))
541 {
542 rn = GET_PUSHED_REG (insn);
543 where[rn] = depth;
544 depth += 4;
545 }
546 else if (IS_STS (insn))
547 {
548 where[PR_REGNUM] = depth;
549 /* If we're storing the pr then this isn't a leaf */
550 fi->extra_info->leaf_function = 0;
551 depth += 4;
552 }
553 else if (IS_MOV_R3 (insn))
554 {
555 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
556 }
557 else if (IS_SHLL_R3 (insn))
558 {
559 r3_val <<= 1;
560 }
561 else if (IS_ADD_R3SP (insn))
562 {
563 depth += -r3_val;
564 }
565 else if (IS_ADD_SP (insn))
566 {
567 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
568 }
569 else if (IS_MOV_SP_FP (insn))
570 break;
571 #if 0 /* This used to just stop when it found an instruction that
572 was not considered part of the prologue. Now, we just
573 keep going looking for likely instructions. */
574 else
575 break;
576 #endif
577 }
578
579 /* Now we know how deep things are, we can work out their addresses */
580
581 for (rn = 0; rn < NUM_REGS; rn++)
582 {
583 if (where[rn] >= 0)
584 {
585 if (rn == FP_REGNUM)
586 have_fp = 1;
587
588 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
589 }
590 else
591 {
592 fi->saved_regs[rn] = 0;
593 }
594 }
595
596 if (have_fp)
597 {
598 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
599 }
600 else
601 {
602 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
603 }
604
605 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
606 /* Work out the return pc - either from the saved pr or the pr
607 value */
608 }
609
610 static void
611 sh_fp_frame_init_saved_regs (struct frame_info *fi)
612 {
613 int where[NUM_REGS];
614 int rn;
615 int have_fp = 0;
616 int depth;
617 int pc;
618 int opc;
619 int insn;
620 int r3_val = 0;
621 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
622
623 if (fi->saved_regs == NULL)
624 frame_saved_regs_zalloc (fi);
625 else
626 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
627
628 if (dummy_regs)
629 {
630 /* DANGER! This is ONLY going to work if the char buffer format of
631 the saved registers is byte-for-byte identical to the
632 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
633 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
634 return;
635 }
636
637 fi->extra_info->leaf_function = 1;
638 fi->extra_info->f_offset = 0;
639
640 for (rn = 0; rn < NUM_REGS; rn++)
641 where[rn] = -1;
642
643 depth = 0;
644
645 /* Loop around examining the prologue insns until we find something
646 that does not appear to be part of the prologue. But give up
647 after 20 of them, since we're getting silly then. */
648
649 pc = get_pc_function_start (fi->pc);
650 if (!pc)
651 {
652 fi->pc = 0;
653 return;
654 }
655
656 for (opc = pc + (2 * 28); pc < opc; pc += 2)
657 {
658 insn = read_memory_integer (pc, 2);
659 /* See where the registers will be saved to */
660 if (IS_PUSH (insn))
661 {
662 rn = GET_PUSHED_REG (insn);
663 where[rn] = depth;
664 depth += 4;
665 }
666 else if (IS_STS (insn))
667 {
668 where[PR_REGNUM] = depth;
669 /* If we're storing the pr then this isn't a leaf */
670 fi->extra_info->leaf_function = 0;
671 depth += 4;
672 }
673 else if (IS_MOV_R3 (insn))
674 {
675 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
676 }
677 else if (IS_SHLL_R3 (insn))
678 {
679 r3_val <<= 1;
680 }
681 else if (IS_ADD_R3SP (insn))
682 {
683 depth += -r3_val;
684 }
685 else if (IS_ADD_SP (insn))
686 {
687 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
688 }
689 else if (IS_FMOV (insn))
690 {
691 if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ)
692 {
693 depth += 8;
694 }
695 else
696 {
697 depth += 4;
698 }
699 }
700 else if (IS_MOV_SP_FP (insn))
701 break;
702 #if 0 /* This used to just stop when it found an instruction that
703 was not considered part of the prologue. Now, we just
704 keep going looking for likely instructions. */
705 else
706 break;
707 #endif
708 }
709
710 /* Now we know how deep things are, we can work out their addresses */
711
712 for (rn = 0; rn < NUM_REGS; rn++)
713 {
714 if (where[rn] >= 0)
715 {
716 if (rn == FP_REGNUM)
717 have_fp = 1;
718
719 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
720 }
721 else
722 {
723 fi->saved_regs[rn] = 0;
724 }
725 }
726
727 if (have_fp)
728 {
729 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
730 }
731 else
732 {
733 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
734 }
735
736 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
737 /* Work out the return pc - either from the saved pr or the pr
738 value */
739 }
740
741 /* Initialize the extra info saved in a FRAME */
742 static void
743 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
744 {
745
746 fi->extra_info = (struct frame_extra_info *)
747 frame_obstack_alloc (sizeof (struct frame_extra_info));
748
749 if (fi->next)
750 fi->pc = FRAME_SAVED_PC (fi->next);
751
752 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
753 {
754 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
755 by assuming it's always FP. */
756 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
757 SP_REGNUM);
758 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
759 PC_REGNUM);
760 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
761 fi->extra_info->leaf_function = 0;
762 return;
763 }
764 else
765 {
766 FRAME_INIT_SAVED_REGS (fi);
767 fi->extra_info->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
768 }
769 }
770
771 /* Extract from an array REGBUF containing the (raw) register state
772 the address in which a function should return its structure value,
773 as a CORE_ADDR (or an expression that can be used as one). */
774 static CORE_ADDR
775 sh_extract_struct_value_address (char *regbuf)
776 {
777 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
778 }
779
780 static CORE_ADDR
781 sh_frame_saved_pc (struct frame_info *frame)
782 {
783 return ((frame)->extra_info->return_pc);
784 }
785
786 /* Discard from the stack the innermost frame,
787 restoring all saved registers. */
788 static void
789 sh_pop_frame (void)
790 {
791 register struct frame_info *frame = get_current_frame ();
792 register CORE_ADDR fp;
793 register int regnum;
794
795 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
796 generic_pop_dummy_frame ();
797 else
798 {
799 fp = FRAME_FP (frame);
800 FRAME_INIT_SAVED_REGS (frame);
801
802 /* Copy regs from where they were saved in the frame */
803 for (regnum = 0; regnum < NUM_REGS; regnum++)
804 if (frame->saved_regs[regnum])
805 write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4));
806
807 write_register (PC_REGNUM, frame->extra_info->return_pc);
808 write_register (SP_REGNUM, fp + 4);
809 }
810 flush_cached_frames ();
811 }
812
813 /* Function: push_arguments
814 Setup the function arguments for calling a function in the inferior.
815
816 On the Hitachi SH architecture, there are four registers (R4 to R7)
817 which are dedicated for passing function arguments. Up to the first
818 four arguments (depending on size) may go into these registers.
819 The rest go on the stack.
820
821 Arguments that are smaller than 4 bytes will still take up a whole
822 register or a whole 32-bit word on the stack, and will be
823 right-justified in the register or the stack word. This includes
824 chars, shorts, and small aggregate types.
825
826 Arguments that are larger than 4 bytes may be split between two or
827 more registers. If there are not enough registers free, an argument
828 may be passed partly in a register (or registers), and partly on the
829 stack. This includes doubles, long longs, and larger aggregates.
830 As far as I know, there is no upper limit to the size of aggregates
831 that will be passed in this way; in other words, the convention of
832 passing a pointer to a large aggregate instead of a copy is not used.
833
834 An exceptional case exists for struct arguments (and possibly other
835 aggregates such as arrays) if the size is larger than 4 bytes but
836 not a multiple of 4 bytes. In this case the argument is never split
837 between the registers and the stack, but instead is copied in its
838 entirety onto the stack, AND also copied into as many registers as
839 there is room for. In other words, space in registers permitting,
840 two copies of the same argument are passed in. As far as I can tell,
841 only the one on the stack is used, although that may be a function
842 of the level of compiler optimization. I suspect this is a compiler
843 bug. Arguments of these odd sizes are left-justified within the
844 word (as opposed to arguments smaller than 4 bytes, which are
845 right-justified).
846
847 If the function is to return an aggregate type such as a struct, it
848 is either returned in the normal return value register R0 (if its
849 size is no greater than one byte), or else the caller must allocate
850 space into which the callee will copy the return value (if the size
851 is greater than one byte). In this case, a pointer to the return
852 value location is passed into the callee in register R2, which does
853 not displace any of the other arguments passed in via registers R4
854 to R7. */
855
856 static CORE_ADDR
857 sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
858 int struct_return, CORE_ADDR struct_addr)
859 {
860 int stack_offset, stack_alloc;
861 int argreg;
862 int argnum;
863 struct type *type;
864 CORE_ADDR regval;
865 char *val;
866 char valbuf[4];
867 int len;
868 int odd_sized_struct;
869
870 /* first force sp to a 4-byte alignment */
871 sp = sp & ~3;
872
873 /* The "struct return pointer" pseudo-argument has its own dedicated
874 register */
875 if (struct_return)
876 write_register (STRUCT_RETURN_REGNUM, struct_addr);
877
878 /* Now make sure there's space on the stack */
879 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
880 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
881 sp -= stack_alloc; /* make room on stack for args */
882
883 /* Now load as many as possible of the first arguments into
884 registers, and push the rest onto the stack. There are 16 bytes
885 in four registers available. Loop thru args from first to last. */
886
887 argreg = ARG0_REGNUM;
888 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
889 {
890 type = VALUE_TYPE (args[argnum]);
891 len = TYPE_LENGTH (type);
892 memset (valbuf, 0, sizeof (valbuf));
893 if (len < 4)
894 {
895 /* value gets right-justified in the register or stack word */
896 memcpy (valbuf + (4 - len),
897 (char *) VALUE_CONTENTS (args[argnum]), len);
898 val = valbuf;
899 }
900 else
901 val = (char *) VALUE_CONTENTS (args[argnum]);
902
903 if (len > 4 && (len & 3) != 0)
904 odd_sized_struct = 1; /* such structs go entirely on stack */
905 else
906 odd_sized_struct = 0;
907 while (len > 0)
908 {
909 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
910 { /* must go on the stack */
911 write_memory (sp + stack_offset, val, 4);
912 stack_offset += 4;
913 }
914 /* NOTE WELL!!!!! This is not an "else if" clause!!!
915 That's because some *&^%$ things get passed on the stack
916 AND in the registers! */
917 if (argreg <= ARGLAST_REGNUM)
918 { /* there's room in a register */
919 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
920 write_register (argreg++, regval);
921 }
922 /* Store the value 4 bytes at a time. This means that things
923 larger than 4 bytes may go partly in registers and partly
924 on the stack. */
925 len -= REGISTER_RAW_SIZE (argreg);
926 val += REGISTER_RAW_SIZE (argreg);
927 }
928 }
929 return sp;
930 }
931
932 /* Function: push_return_address (pc)
933 Set up the return address for the inferior function call.
934 Needed for targets where we don't actually execute a JSR/BSR instruction */
935
936 static CORE_ADDR
937 sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
938 {
939 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
940 return sp;
941 }
942
943 /* Function: fix_call_dummy
944 Poke the callee function's address into the destination part of
945 the CALL_DUMMY. The address is actually stored in a data word
946 following the actualy CALL_DUMMY instructions, which will load
947 it into a register using PC-relative addressing. This function
948 expects the CALL_DUMMY to look like this:
949
950 mov.w @(2,PC), R8
951 jsr @R8
952 nop
953 trap
954 <destination>
955 */
956
957 #if 0
958 void
959 sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
960 value_ptr *args, struct type *type, int gcc_p)
961 {
962 *(unsigned long *) (dummy + 8) = fun;
963 }
964 #endif
965
966 static int
967 sh_coerce_float_to_double (struct type *formal, struct type *actual)
968 {
969 return 1;
970 }
971
972 /* Find a function's return value in the appropriate registers (in
973 regbuf), and copy it into valbuf. Extract from an array REGBUF
974 containing the (raw) register state a function return value of type
975 TYPE, and copy that, in virtual format, into VALBUF. */
976 static void
977 sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
978 {
979 int len = TYPE_LENGTH (type);
980 int return_register = R0_REGNUM;
981 int offset;
982
983 if (len <= 4)
984 {
985 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
986 offset = REGISTER_BYTE (return_register) + 4 - len;
987 else
988 offset = REGISTER_BYTE (return_register);
989 memcpy (valbuf, regbuf + offset, len);
990 }
991 else if (len <= 8)
992 {
993 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
994 offset = REGISTER_BYTE (return_register) + 8 - len;
995 else
996 offset = REGISTER_BYTE (return_register);
997 memcpy (valbuf, regbuf + offset, len);
998 }
999 else
1000 error ("bad size for return value");
1001 }
1002
1003 static void
1004 sh3e_sh4_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1005 {
1006 int return_register;
1007 int offset;
1008 int len = TYPE_LENGTH (type);
1009
1010 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1011 return_register = FP0_REGNUM;
1012 else
1013 return_register = R0_REGNUM;
1014
1015 if (len == 8 && TYPE_CODE (type) == TYPE_CODE_FLT)
1016 {
1017 DOUBLEST val;
1018 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1019 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
1020 (char *) regbuf + REGISTER_BYTE (return_register),
1021 &val);
1022 else
1023 floatformat_to_doublest (&floatformat_ieee_double_big,
1024 (char *) regbuf + REGISTER_BYTE (return_register),
1025 &val);
1026 store_floating (valbuf, len, val);
1027 }
1028 else if (len <= 4)
1029 {
1030 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1031 offset = REGISTER_BYTE (return_register) + 4 - len;
1032 else
1033 offset = REGISTER_BYTE (return_register);
1034 memcpy (valbuf, regbuf + offset, len);
1035 }
1036 else if (len <= 8)
1037 {
1038 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1039 offset = REGISTER_BYTE (return_register) + 8 - len;
1040 else
1041 offset = REGISTER_BYTE (return_register);
1042 memcpy (valbuf, regbuf + offset, len);
1043 }
1044 else
1045 error ("bad size for return value");
1046 }
1047
1048 /* Write into appropriate registers a function return value
1049 of type TYPE, given in virtual format.
1050 If the architecture is sh4 or sh3e, store a function's return value
1051 in the R0 general register or in the FP0 floating point register,
1052 depending on the type of the return value. In all the other cases
1053 the result is stored in r0. */
1054 static void
1055 sh_default_store_return_value (struct type *type, char *valbuf)
1056 {
1057 char buf[32]; /* more than enough... */
1058
1059 if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (R0_REGNUM))
1060 {
1061 /* Add leading zeros to the value. */
1062 memset (buf, 0, REGISTER_RAW_SIZE (R0_REGNUM));
1063 memcpy (buf + REGISTER_RAW_SIZE (R0_REGNUM) - TYPE_LENGTH (type),
1064 valbuf, TYPE_LENGTH (type));
1065 write_register_bytes (REGISTER_BYTE (R0_REGNUM), buf,
1066 REGISTER_RAW_SIZE (R0_REGNUM));
1067 }
1068 else
1069 write_register_bytes (REGISTER_BYTE (R0_REGNUM), valbuf,
1070 TYPE_LENGTH (type));
1071 }
1072
1073 static void
1074 sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1075 {
1076 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1077 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1078 valbuf, TYPE_LENGTH (type));
1079 else
1080 sh_default_store_return_value (type, valbuf);
1081 }
1082
1083
1084 /* Print the registers in a form similar to the E7000 */
1085
1086 static void
1087 sh_generic_show_regs (void)
1088 {
1089 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1090 paddr (read_register (PC_REGNUM)),
1091 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1092 (long) read_register (PR_REGNUM),
1093 (long) read_register (MACH_REGNUM),
1094 (long) read_register (MACL_REGNUM));
1095
1096 printf_filtered ("GBR=%08lx VBR=%08lx",
1097 (long) read_register (GBR_REGNUM),
1098 (long) read_register (VBR_REGNUM));
1099
1100 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1101 (long) read_register (0),
1102 (long) read_register (1),
1103 (long) read_register (2),
1104 (long) read_register (3),
1105 (long) read_register (4),
1106 (long) read_register (5),
1107 (long) read_register (6),
1108 (long) read_register (7));
1109 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1110 (long) read_register (8),
1111 (long) read_register (9),
1112 (long) read_register (10),
1113 (long) read_register (11),
1114 (long) read_register (12),
1115 (long) read_register (13),
1116 (long) read_register (14),
1117 (long) read_register (15));
1118 }
1119
1120 static void
1121 sh3_show_regs (void)
1122 {
1123 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1124 paddr (read_register (PC_REGNUM)),
1125 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1126 (long) read_register (PR_REGNUM),
1127 (long) read_register (MACH_REGNUM),
1128 (long) read_register (MACL_REGNUM));
1129
1130 printf_filtered ("GBR=%08lx VBR=%08lx",
1131 (long) read_register (GBR_REGNUM),
1132 (long) read_register (VBR_REGNUM));
1133 printf_filtered (" SSR=%08lx SPC=%08lx",
1134 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1135 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1136
1137 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1138 (long) read_register (0),
1139 (long) read_register (1),
1140 (long) read_register (2),
1141 (long) read_register (3),
1142 (long) read_register (4),
1143 (long) read_register (5),
1144 (long) read_register (6),
1145 (long) read_register (7));
1146 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1147 (long) read_register (8),
1148 (long) read_register (9),
1149 (long) read_register (10),
1150 (long) read_register (11),
1151 (long) read_register (12),
1152 (long) read_register (13),
1153 (long) read_register (14),
1154 (long) read_register (15));
1155 }
1156
1157
1158 static void
1159 sh3e_show_regs (void)
1160 {
1161 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1162 paddr (read_register (PC_REGNUM)),
1163 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1164 (long) read_register (PR_REGNUM),
1165 (long) read_register (MACH_REGNUM),
1166 (long) read_register (MACL_REGNUM));
1167
1168 printf_filtered ("GBR=%08lx VBR=%08lx",
1169 (long) read_register (GBR_REGNUM),
1170 (long) read_register (VBR_REGNUM));
1171 printf_filtered (" SSR=%08lx SPC=%08lx",
1172 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1173 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1174 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1175 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1176 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1177
1178 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1179 (long) read_register (0),
1180 (long) read_register (1),
1181 (long) read_register (2),
1182 (long) read_register (3),
1183 (long) read_register (4),
1184 (long) read_register (5),
1185 (long) read_register (6),
1186 (long) read_register (7));
1187 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1188 (long) read_register (8),
1189 (long) read_register (9),
1190 (long) read_register (10),
1191 (long) read_register (11),
1192 (long) read_register (12),
1193 (long) read_register (13),
1194 (long) read_register (14),
1195 (long) read_register (15));
1196
1197 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1198 (long) read_register (FP0_REGNUM + 0),
1199 (long) read_register (FP0_REGNUM + 1),
1200 (long) read_register (FP0_REGNUM + 2),
1201 (long) read_register (FP0_REGNUM + 3),
1202 (long) read_register (FP0_REGNUM + 4),
1203 (long) read_register (FP0_REGNUM + 5),
1204 (long) read_register (FP0_REGNUM + 6),
1205 (long) read_register (FP0_REGNUM + 7));
1206 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1207 (long) read_register (FP0_REGNUM + 8),
1208 (long) read_register (FP0_REGNUM + 9),
1209 (long) read_register (FP0_REGNUM + 10),
1210 (long) read_register (FP0_REGNUM + 11),
1211 (long) read_register (FP0_REGNUM + 12),
1212 (long) read_register (FP0_REGNUM + 13),
1213 (long) read_register (FP0_REGNUM + 14),
1214 (long) read_register (FP0_REGNUM + 15));
1215 }
1216
1217 static void
1218 sh3_dsp_show_regs (void)
1219 {
1220 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1221 paddr (read_register (PC_REGNUM)),
1222 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1223 (long) read_register (PR_REGNUM),
1224 (long) read_register (MACH_REGNUM),
1225 (long) read_register (MACL_REGNUM));
1226
1227 printf_filtered ("GBR=%08lx VBR=%08lx",
1228 (long) read_register (GBR_REGNUM),
1229 (long) read_register (VBR_REGNUM));
1230
1231 printf_filtered (" SSR=%08lx SPC=%08lx",
1232 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1233 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1234
1235 printf_filtered (" DSR=%08lx",
1236 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1237
1238 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1239 (long) read_register (0),
1240 (long) read_register (1),
1241 (long) read_register (2),
1242 (long) read_register (3),
1243 (long) read_register (4),
1244 (long) read_register (5),
1245 (long) read_register (6),
1246 (long) read_register (7));
1247 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1248 (long) read_register (8),
1249 (long) read_register (9),
1250 (long) read_register (10),
1251 (long) read_register (11),
1252 (long) read_register (12),
1253 (long) read_register (13),
1254 (long) read_register (14),
1255 (long) read_register (15));
1256
1257 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1258 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1259 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1260 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1261 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1262 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1263 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1264 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1265 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1266 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1267 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1268 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1269 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1270 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1271 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1272 }
1273
1274 static void
1275 sh4_show_regs (void)
1276 {
1277 int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000;
1278 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1279 paddr (read_register (PC_REGNUM)),
1280 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1281 (long) read_register (PR_REGNUM),
1282 (long) read_register (MACH_REGNUM),
1283 (long) read_register (MACL_REGNUM));
1284
1285 printf_filtered ("GBR=%08lx VBR=%08lx",
1286 (long) read_register (GBR_REGNUM),
1287 (long) read_register (VBR_REGNUM));
1288 printf_filtered (" SSR=%08lx SPC=%08lx",
1289 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1290 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1291 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1292 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1293 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1294
1295 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1296 (long) read_register (0),
1297 (long) read_register (1),
1298 (long) read_register (2),
1299 (long) read_register (3),
1300 (long) read_register (4),
1301 (long) read_register (5),
1302 (long) read_register (6),
1303 (long) read_register (7));
1304 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1305 (long) read_register (8),
1306 (long) read_register (9),
1307 (long) read_register (10),
1308 (long) read_register (11),
1309 (long) read_register (12),
1310 (long) read_register (13),
1311 (long) read_register (14),
1312 (long) read_register (15));
1313
1314 printf_filtered ((pr
1315 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1316 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1317 (long) read_register (FP0_REGNUM + 0),
1318 (long) read_register (FP0_REGNUM + 1),
1319 (long) read_register (FP0_REGNUM + 2),
1320 (long) read_register (FP0_REGNUM + 3),
1321 (long) read_register (FP0_REGNUM + 4),
1322 (long) read_register (FP0_REGNUM + 5),
1323 (long) read_register (FP0_REGNUM + 6),
1324 (long) read_register (FP0_REGNUM + 7));
1325 printf_filtered ((pr
1326 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1327 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1328 (long) read_register (FP0_REGNUM + 8),
1329 (long) read_register (FP0_REGNUM + 9),
1330 (long) read_register (FP0_REGNUM + 10),
1331 (long) read_register (FP0_REGNUM + 11),
1332 (long) read_register (FP0_REGNUM + 12),
1333 (long) read_register (FP0_REGNUM + 13),
1334 (long) read_register (FP0_REGNUM + 14),
1335 (long) read_register (FP0_REGNUM + 15));
1336 }
1337
1338 static void
1339 sh_dsp_show_regs (void)
1340 {
1341 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1342 paddr (read_register (PC_REGNUM)),
1343 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1344 (long) read_register (PR_REGNUM),
1345 (long) read_register (MACH_REGNUM),
1346 (long) read_register (MACL_REGNUM));
1347
1348 printf_filtered ("GBR=%08lx VBR=%08lx",
1349 (long) read_register (GBR_REGNUM),
1350 (long) read_register (VBR_REGNUM));
1351
1352 printf_filtered (" DSR=%08lx",
1353 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1354
1355 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1356 (long) read_register (0),
1357 (long) read_register (1),
1358 (long) read_register (2),
1359 (long) read_register (3),
1360 (long) read_register (4),
1361 (long) read_register (5),
1362 (long) read_register (6),
1363 (long) read_register (7));
1364 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1365 (long) read_register (8),
1366 (long) read_register (9),
1367 (long) read_register (10),
1368 (long) read_register (11),
1369 (long) read_register (12),
1370 (long) read_register (13),
1371 (long) read_register (14),
1372 (long) read_register (15));
1373
1374 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1375 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1376 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1377 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1378 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1379 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1380 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1381 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1382 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1383 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1384 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1385 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1386 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1387 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1388 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1389 }
1390
1391 void sh_show_regs_command (char *args, int from_tty)
1392 {
1393 if (sh_show_regs)
1394 (*sh_show_regs)();
1395 }
1396
1397 static int
1398 fv_reg_base_num (int fv_regnum)
1399 {
1400 int fp_regnum;
1401
1402 fp_regnum = FP0_REGNUM +
1403 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
1404 return fp_regnum;
1405 }
1406
1407 static int
1408 dr_reg_base_num (int dr_regnum)
1409 {
1410 int fp_regnum;
1411
1412 fp_regnum = FP0_REGNUM +
1413 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
1414 return fp_regnum;
1415 }
1416
1417 /* Index within `registers' of the first byte of the space for
1418 register N. */
1419 static int
1420 sh_default_register_byte (int reg_nr)
1421 {
1422 return (reg_nr * 4);
1423 }
1424
1425 static int
1426 sh_sh4_register_byte (int reg_nr)
1427 {
1428 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1429 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1430 return (dr_reg_base_num (reg_nr) * 4);
1431 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1432 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1433 return (fv_reg_base_num (reg_nr) * 4);
1434 else
1435 return (reg_nr * 4);
1436 }
1437
1438 /* Number of bytes of storage in the actual machine representation for
1439 register REG_NR. */
1440 static int
1441 sh_default_register_raw_size (int reg_nr)
1442 {
1443 return 4;
1444 }
1445
1446 static int
1447 sh_sh4_register_raw_size (int reg_nr)
1448 {
1449 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1450 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1451 return 8;
1452 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1453 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1454 return 16;
1455 else
1456 return 4;
1457 }
1458
1459 /* Number of bytes of storage in the program's representation
1460 for register N. */
1461 static int
1462 sh_register_virtual_size (int reg_nr)
1463 {
1464 return 4;
1465 }
1466
1467 /* Return the GDB type object for the "standard" data type
1468 of data in register N. */
1469
1470 static struct type *
1471 sh_sh3e_register_virtual_type (int reg_nr)
1472 {
1473 if ((reg_nr >= FP0_REGNUM
1474 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1475 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1476 return builtin_type_float;
1477 else
1478 return builtin_type_int;
1479 }
1480
1481 static struct type *
1482 sh_sh4_build_float_register_type (int high)
1483 {
1484 struct type *temp;
1485
1486 temp = create_range_type (NULL, builtin_type_int, 0, high);
1487 return create_array_type (NULL, builtin_type_float, temp);
1488 }
1489
1490 static struct type *
1491 sh_sh4_register_virtual_type (int reg_nr)
1492 {
1493 if ((reg_nr >= FP0_REGNUM
1494 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1495 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1496 return builtin_type_float;
1497 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1498 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1499 return builtin_type_double;
1500 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1501 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1502 return sh_sh4_build_float_register_type (3);
1503 else
1504 return builtin_type_int;
1505 }
1506
1507 static struct type *
1508 sh_default_register_virtual_type (int reg_nr)
1509 {
1510 return builtin_type_int;
1511 }
1512
1513 /* On the sh4, the DRi pseudo registers are problematic if the target
1514 is little endian. When the user writes one of those registers, for
1515 instance with 'ser var $dr0=1', we want the double to be stored
1516 like this:
1517 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1518 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1519
1520 This corresponds to little endian byte order & big endian word
1521 order. However if we let gdb write the register w/o conversion, it
1522 will write fr0 and fr1 this way:
1523 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1524 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1525 because it will consider fr0 and fr1 as a single LE stretch of memory.
1526
1527 To achieve what we want we must force gdb to store things in
1528 floatformat_ieee_double_littlebyte_bigword (which is defined in
1529 include/floatformat.h and libiberty/floatformat.c.
1530
1531 In case the target is big endian, there is no problem, the
1532 raw bytes will look like:
1533 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1534 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1535
1536 The other pseudo registers (the FVs) also don't pose a problem
1537 because they are stored as 4 individual FP elements. */
1538
1539 int
1540 sh_sh4_register_convertible (int nr)
1541 {
1542 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1543 return (gdbarch_tdep (current_gdbarch)->DR0_REGNUM <= nr
1544 && nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM);
1545 else
1546 return 0;
1547 }
1548
1549 void
1550 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1551 char *from, char *to)
1552 {
1553 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1554 && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1555 {
1556 DOUBLEST val;
1557 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1558 store_floating(to, TYPE_LENGTH(type), val);
1559 }
1560 else
1561 error("sh_register_convert_to_virtual called with non DR register number");
1562 }
1563
1564 void
1565 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1566 char *from, char *to)
1567 {
1568 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1569 && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1570 {
1571 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1572 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1573 }
1574 else
1575 error("sh_register_convert_to_raw called with non DR register number");
1576 }
1577
1578 void
1579 sh_fetch_pseudo_register (int reg_nr)
1580 {
1581 int base_regnum, portion;
1582
1583 if (!register_cached (reg_nr))
1584 {
1585 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1586 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1587 {
1588 base_regnum = dr_reg_base_num (reg_nr);
1589
1590 /* Read the real regs for which this one is an alias. */
1591 for (portion = 0; portion < 2; portion++)
1592 if (!register_cached (base_regnum + portion))
1593 target_fetch_registers (base_regnum + portion);
1594 }
1595 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1596 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1597 {
1598 base_regnum = fv_reg_base_num (reg_nr);
1599
1600 /* Read the real regs for which this one is an alias. */
1601 for (portion = 0; portion < 4; portion++)
1602 if (!register_cached (base_regnum + portion))
1603 target_fetch_registers (base_regnum + portion);
1604
1605 }
1606 register_valid [reg_nr] = 1;
1607 }
1608 }
1609
1610 void
1611 sh_store_pseudo_register (int reg_nr)
1612 {
1613 int base_regnum, portion;
1614
1615 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1616 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1617 {
1618 base_regnum = dr_reg_base_num (reg_nr);
1619
1620 /* Write the real regs for which this one is an alias. */
1621 for (portion = 0; portion < 2; portion++)
1622 {
1623 register_valid[base_regnum + portion] = 1;
1624 target_store_registers (base_regnum + portion);
1625 }
1626 }
1627 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1628 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1629 {
1630 base_regnum = fv_reg_base_num (reg_nr);
1631
1632 /* Write the real regs for which this one is an alias. */
1633 for (portion = 0; portion < 4; portion++)
1634 {
1635 register_valid[base_regnum + portion] = 1;
1636 target_store_registers (base_regnum + portion);
1637 }
1638 }
1639 }
1640
1641 static void
1642 do_fv_register_info (int fv_regnum)
1643 {
1644 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1645 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1646 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1647 (int) read_register (first_fp_reg_num),
1648 (int) read_register (first_fp_reg_num + 1),
1649 (int) read_register (first_fp_reg_num + 2),
1650 (int) read_register (first_fp_reg_num + 3));
1651 }
1652
1653 static void
1654 do_dr_register_info (int dr_regnum)
1655 {
1656 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1657
1658 printf_filtered ("dr%d\t0x%08x%08x\n",
1659 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1660 (int) read_register (first_fp_reg_num),
1661 (int) read_register (first_fp_reg_num + 1));
1662 }
1663
1664 static void
1665 sh_do_pseudo_register (int regnum)
1666 {
1667 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1668 internal_error (__FILE__, __LINE__,
1669 "Invalid pseudo register number %d\n", regnum);
1670 else if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1671 && regnum < gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1672 do_dr_register_info (regnum);
1673 else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1674 && regnum <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1675 do_fv_register_info (regnum);
1676 }
1677
1678
1679 static void
1680 sh_do_fp_register (int regnum)
1681 { /* do values for FP (float) regs */
1682 char *raw_buffer;
1683 double flt; /* double extracted from raw hex data */
1684 int inv;
1685 int j;
1686
1687 /* Allocate space for the float. */
1688 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1689
1690 /* Get the data in raw format. */
1691 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1692 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1693
1694 /* Get the register as a number */
1695 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1696
1697 /* Print the name and some spaces. */
1698 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1699 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1700
1701 /* Print the value. */
1702 if (inv)
1703 printf_filtered ("<invalid float>");
1704 else
1705 printf_filtered ("%-10.9g", flt);
1706
1707 /* Print the fp register as hex. */
1708 printf_filtered ("\t(raw 0x");
1709 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1710 {
1711 register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j
1712 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1713 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1714 }
1715 printf_filtered (")");
1716 printf_filtered ("\n");
1717 }
1718
1719 static void
1720 sh_do_register (int regnum)
1721 {
1722 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1723
1724 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1725 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1726
1727 /* Get the data in raw format. */
1728 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1729 printf_filtered ("*value not available*\n");
1730
1731 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1732 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1733 printf_filtered ("\t");
1734 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1735 gdb_stdout, 0, 1, 0, Val_pretty_default);
1736 printf_filtered ("\n");
1737 }
1738
1739 static void
1740 sh_print_register (int regnum)
1741 {
1742 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1743 internal_error (__FILE__, __LINE__,
1744 "Invalid register number %d\n", regnum);
1745
1746 else if (regnum >= 0 && regnum < NUM_REGS)
1747 {
1748 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1749 sh_do_fp_register (regnum); /* FP regs */
1750 else
1751 sh_do_register (regnum); /* All other regs */
1752 }
1753
1754 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1755 sh_do_pseudo_register (regnum);
1756 }
1757
1758 void
1759 sh_do_registers_info (int regnum, int fpregs)
1760 {
1761 if (regnum != -1) /* do one specified register */
1762 {
1763 if (*(REGISTER_NAME (regnum)) == '\0')
1764 error ("Not a valid register for the current processor type");
1765
1766 sh_print_register (regnum);
1767 }
1768 else
1769 /* do all (or most) registers */
1770 {
1771 regnum = 0;
1772 while (regnum < NUM_REGS)
1773 {
1774 /* If the register name is empty, it is undefined for this
1775 processor, so don't display anything. */
1776 if (REGISTER_NAME (regnum) == NULL
1777 || *(REGISTER_NAME (regnum)) == '\0')
1778 {
1779 regnum++;
1780 continue;
1781 }
1782
1783 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1784 {
1785 if (fpregs)
1786 {
1787 /* true for "INFO ALL-REGISTERS" command */
1788 sh_do_fp_register (regnum); /* FP regs */
1789 regnum ++;
1790 }
1791 else
1792 regnum += (gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */
1793 }
1794 else
1795 {
1796 sh_do_register (regnum); /* All other regs */
1797 regnum++;
1798 }
1799 }
1800
1801 if (fpregs)
1802 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1803 {
1804 sh_do_pseudo_register (regnum);
1805 regnum++;
1806 }
1807 }
1808 }
1809
1810 #ifdef SVR4_SHARED_LIBS
1811
1812 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1813 for native i386 linux targets using the struct offsets defined in
1814 link.h (but without actual reference to that file).
1815
1816 This makes it possible to access i386-linux shared libraries from
1817 a gdb that was not built on an i386-linux host (for cross debugging).
1818 */
1819
1820 struct link_map_offsets *
1821 sh_linux_svr4_fetch_link_map_offsets (void)
1822 {
1823 static struct link_map_offsets lmo;
1824 static struct link_map_offsets *lmp = 0;
1825
1826 if (lmp == 0)
1827 {
1828 lmp = &lmo;
1829
1830 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1831
1832 lmo.r_map_offset = 4;
1833 lmo.r_map_size = 4;
1834
1835 lmo.link_map_size = 20; /* 552 not actual size but all we need */
1836
1837 lmo.l_addr_offset = 0;
1838 lmo.l_addr_size = 4;
1839
1840 lmo.l_name_offset = 4;
1841 lmo.l_name_size = 4;
1842
1843 lmo.l_next_offset = 12;
1844 lmo.l_next_size = 4;
1845
1846 lmo.l_prev_offset = 16;
1847 lmo.l_prev_size = 4;
1848 }
1849
1850 return lmp;
1851 }
1852 #endif /* SVR4_SHARED_LIBS */
1853
1854 static gdbarch_init_ftype sh_gdbarch_init;
1855
1856 static struct gdbarch *
1857 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1858 {
1859 static LONGEST sh_call_dummy_words[] = {0};
1860 struct gdbarch *gdbarch;
1861 struct gdbarch_tdep *tdep;
1862 gdbarch_register_name_ftype *sh_register_name;
1863 gdbarch_store_return_value_ftype *sh_store_return_value;
1864 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1865
1866 /* Find a candidate among the list of pre-declared architectures. */
1867 arches = gdbarch_list_lookup_by_info (arches, &info);
1868 if (arches != NULL)
1869 return arches->gdbarch;
1870
1871 /* None found, create a new architecture from the information
1872 provided. */
1873 tdep = XMALLOC (struct gdbarch_tdep);
1874 gdbarch = gdbarch_alloc (&info, tdep);
1875
1876 /* Initialize the register numbers that are not common to all the
1877 variants to -1, if necessary thse will be overwritten in the case
1878 statement below. */
1879 tdep->FPUL_REGNUM = -1;
1880 tdep->FPSCR_REGNUM = -1;
1881 tdep->SR_REGNUM = 22;
1882 tdep->DSR_REGNUM = -1;
1883 tdep->FP_LAST_REGNUM = -1;
1884 tdep->A0G_REGNUM = -1;
1885 tdep->A0_REGNUM = -1;
1886 tdep->A1G_REGNUM = -1;
1887 tdep->A1_REGNUM = -1;
1888 tdep->M0_REGNUM = -1;
1889 tdep->M1_REGNUM = -1;
1890 tdep->X0_REGNUM = -1;
1891 tdep->X1_REGNUM = -1;
1892 tdep->Y0_REGNUM = -1;
1893 tdep->Y1_REGNUM = -1;
1894 tdep->MOD_REGNUM = -1;
1895 tdep->RS_REGNUM = -1;
1896 tdep->RE_REGNUM = -1;
1897 tdep->SSR_REGNUM = -1;
1898 tdep->SPC_REGNUM = -1;
1899 tdep->DR0_REGNUM = -1;
1900 tdep->DR_LAST_REGNUM = -1;
1901 tdep->FV0_REGNUM = -1;
1902 tdep->FV_LAST_REGNUM = -1;
1903
1904 set_gdbarch_fp0_regnum (gdbarch, -1);
1905 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1906 set_gdbarch_max_register_raw_size (gdbarch, 4);
1907 set_gdbarch_max_register_virtual_size (gdbarch, 4);
1908 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1909 set_gdbarch_num_regs (gdbarch, 59);
1910 set_gdbarch_sp_regnum (gdbarch, 15);
1911 set_gdbarch_fp_regnum (gdbarch, 14);
1912 set_gdbarch_pc_regnum (gdbarch, 16);
1913 set_gdbarch_register_size (gdbarch, 4);
1914 set_gdbarch_register_bytes (gdbarch, NUM_REGS * 4);
1915 set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register);
1916 set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register);
1917 set_gdbarch_do_registers_info (gdbarch, sh_do_registers_info);
1918 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
1919 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
1920 print_sh_insn = gdb_print_insn_sh;
1921
1922 switch (info.bfd_arch_info->mach)
1923 {
1924 case bfd_mach_sh:
1925 sh_register_name = sh_sh_register_name;
1926 sh_show_regs = sh_generic_show_regs;
1927 sh_store_return_value = sh_default_store_return_value;
1928 sh_register_virtual_type = sh_default_register_virtual_type;
1929 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1930 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1931 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1932 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1933 break;
1934 case bfd_mach_sh2:
1935 sh_register_name = sh_sh_register_name;
1936 sh_show_regs = sh_generic_show_regs;
1937 sh_store_return_value = sh_default_store_return_value;
1938 sh_register_virtual_type = sh_default_register_virtual_type;
1939 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1940 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1941 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1942 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1943 break;
1944 case bfd_mach_sh_dsp:
1945 sh_register_name = sh_sh_dsp_register_name;
1946 sh_show_regs = sh_dsp_show_regs;
1947 sh_store_return_value = sh_default_store_return_value;
1948 sh_register_virtual_type = sh_default_register_virtual_type;
1949 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1950 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1951 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1952 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1953 tdep->DSR_REGNUM = 24;
1954 tdep->A0G_REGNUM = 25;
1955 tdep->A0_REGNUM = 26;
1956 tdep->A1G_REGNUM = 27;
1957 tdep->A1_REGNUM = 28;
1958 tdep->M0_REGNUM = 29;
1959 tdep->M1_REGNUM = 30;
1960 tdep->X0_REGNUM = 31;
1961 tdep->X1_REGNUM = 32;
1962 tdep->Y0_REGNUM = 33;
1963 tdep->Y1_REGNUM = 34;
1964 tdep->MOD_REGNUM = 40;
1965 tdep->RS_REGNUM = 43;
1966 tdep->RE_REGNUM = 44;
1967 break;
1968 case bfd_mach_sh3:
1969 sh_register_name = sh_sh3_register_name;
1970 sh_show_regs = sh3_show_regs;
1971 sh_store_return_value = sh_default_store_return_value;
1972 sh_register_virtual_type = sh_default_register_virtual_type;
1973 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1974 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1975 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1976 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1977 tdep->SSR_REGNUM = 41;
1978 tdep->SPC_REGNUM = 42;
1979 break;
1980 case bfd_mach_sh3e:
1981 sh_register_name = sh_sh3e_register_name;
1982 sh_show_regs = sh3e_show_regs;
1983 sh_store_return_value = sh3e_sh4_store_return_value;
1984 sh_register_virtual_type = sh_sh3e_register_virtual_type;
1985 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
1986 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
1987 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1988 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1989 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1990 set_gdbarch_fp0_regnum (gdbarch, 25);
1991 tdep->FPUL_REGNUM = 23;
1992 tdep->FPSCR_REGNUM = 24;
1993 tdep->FP_LAST_REGNUM = 40;
1994 tdep->SSR_REGNUM = 41;
1995 tdep->SPC_REGNUM = 42;
1996 break;
1997 case bfd_mach_sh3_dsp:
1998 sh_register_name = sh_sh3_dsp_register_name;
1999 sh_show_regs = sh3_dsp_show_regs;
2000 sh_store_return_value = sh_default_store_return_value;
2001 sh_register_virtual_type = sh_default_register_virtual_type;
2002 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2003 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2004 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2005 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2006 tdep->DSR_REGNUM = 24;
2007 tdep->A0G_REGNUM = 25;
2008 tdep->A0_REGNUM = 26;
2009 tdep->A1G_REGNUM = 27;
2010 tdep->A1_REGNUM = 28;
2011 tdep->M0_REGNUM = 29;
2012 tdep->M1_REGNUM = 30;
2013 tdep->X0_REGNUM = 31;
2014 tdep->X1_REGNUM = 32;
2015 tdep->Y0_REGNUM = 33;
2016 tdep->Y1_REGNUM = 34;
2017 tdep->MOD_REGNUM = 40;
2018 tdep->RS_REGNUM = 43;
2019 tdep->RE_REGNUM = 44;
2020 tdep->SSR_REGNUM = 41;
2021 tdep->SPC_REGNUM = 42;
2022 break;
2023 case bfd_mach_sh4:
2024 sh_register_name = sh_sh4_register_name;
2025 sh_show_regs = sh4_show_regs;
2026 sh_store_return_value = sh3e_sh4_store_return_value;
2027 sh_register_virtual_type = sh_sh4_register_virtual_type;
2028 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2029 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2030 set_gdbarch_fp0_regnum (gdbarch, 25);
2031 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
2032 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
2033 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
2034 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2035 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
2036 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
2037 set_gdbarch_register_convert_to_raw (gdbarch, sh_sh4_register_convert_to_raw);
2038 set_gdbarch_register_convert_to_virtual (gdbarch, sh_sh4_register_convert_to_virtual);
2039 set_gdbarch_register_convertible (gdbarch, sh_sh4_register_convertible);
2040 tdep->FPUL_REGNUM = 23;
2041 tdep->FPSCR_REGNUM = 24;
2042 tdep->FP_LAST_REGNUM = 40;
2043 tdep->SSR_REGNUM = 41;
2044 tdep->SPC_REGNUM = 42;
2045 tdep->DR0_REGNUM = 59;
2046 tdep->DR_LAST_REGNUM = 66;
2047 tdep->FV0_REGNUM = 67;
2048 tdep->FV_LAST_REGNUM = 70;
2049 break;
2050 default:
2051 sh_register_name = sh_generic_register_name;
2052 sh_show_regs = sh_generic_show_regs;
2053 sh_store_return_value = sh_default_store_return_value;
2054 sh_register_virtual_type = sh_default_register_virtual_type;
2055 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2056 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2057 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2058 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2059 break;
2060 }
2061
2062 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2063 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2064 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2065 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2066 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2067 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2068
2069 set_gdbarch_register_name (gdbarch, sh_register_name);
2070 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2071
2072 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2073 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2074 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2075 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2076 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2077 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2078 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);/*??should be 8?*/
2079
2080 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2081 set_gdbarch_call_dummy_length (gdbarch, 0);
2082 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2083 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2084 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2085 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2086 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2087 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2088 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2089 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2090 set_gdbarch_call_dummy_p (gdbarch, 1);
2091 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2092 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2093 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2094 set_gdbarch_coerce_float_to_double (gdbarch,
2095 sh_coerce_float_to_double);
2096
2097 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
2098 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2099 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2100
2101 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
2102 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2103 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2104 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2105 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2106 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
2107 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2108 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2109 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2110 set_gdbarch_function_start_offset (gdbarch, 0);
2111
2112 set_gdbarch_frame_args_skip (gdbarch, 0);
2113 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2114 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
2115 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2116 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2117 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
2118 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
2119 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2120 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2121 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2122 set_gdbarch_ieee_float (gdbarch, 1);
2123 tm_print_insn = print_sh_insn;
2124
2125 return gdbarch;
2126 }
2127
2128 void
2129 _initialize_sh_tdep (void)
2130 {
2131 struct cmd_list_element *c;
2132
2133 register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2134
2135 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2136 }
GDB Binutils - Deliverables
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