1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Contributed by Steve Chamberlain
36 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
37 #include "gdb_string.h"
39 /* A set of original names, to be used when restoring back to generic
40 registers from a specific set. */
42 static char *sh_generic_reg_names
[] = {
43 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
44 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
45 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
47 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
48 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
50 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
51 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
54 static char *sh_reg_names
[] = {
55 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
56 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
57 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
59 "", "", "", "", "", "", "", "",
60 "", "", "", "", "", "", "", "",
62 "", "", "", "", "", "", "", "",
63 "", "", "", "", "", "", "", "",
66 static char *sh3_reg_names
[] = {
67 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
68 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
69 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
71 "", "", "", "", "", "", "", "",
72 "", "", "", "", "", "", "", "",
74 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
75 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
78 static char *sh3e_reg_names
[] = {
79 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
80 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
81 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
83 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
84 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
86 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
87 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
92 char **sh_register_names
= sh3_reg_names
;
94 char **sh_register_names
= sh_generic_reg_names
;
102 sh_processor_type_table
[] =
105 sh_reg_names
, bfd_mach_sh
109 sh_reg_names
, bfd_mach_sh2
113 sh3_reg_names
, bfd_mach_sh3
117 sh3e_reg_names
, bfd_mach_sh3e
125 /* Prologue looks like
126 [mov.l <regs>,@-r15]...
132 #define IS_STS(x) ((x) == 0x4f22)
133 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
134 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
135 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
136 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
137 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
138 #define IS_SHLL_R3(x) ((x) == 0x4300)
139 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
140 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
141 #define FPSCR_SZ (1 << 20)
144 /* Should call_function allocate stack space for a struct return? */
146 sh_use_struct_convention (gcc_p
, type
)
150 return (TYPE_LENGTH (type
) > 1);
154 /* Skip any prologue before the guts of a function */
157 sh_skip_prologue (start_pc
)
162 w
= read_memory_integer (start_pc
, 2);
173 w
= read_memory_integer (start_pc
, 2);
179 /* Disassemble an instruction. */
182 gdb_print_insn_sh (memaddr
, info
)
184 disassemble_info
*info
;
186 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
187 return print_insn_sh (memaddr
, info
);
189 return print_insn_shl (memaddr
, info
);
192 /* Given a GDB frame, determine the address of the calling function's frame.
193 This will be used to create a new GDB frame struct, and then
194 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
196 For us, the frame address is its stack pointer value, so we look up
197 the function prologue to determine the caller's sp value, and return it. */
200 sh_frame_chain (frame
)
201 struct frame_info
*frame
;
203 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
204 return frame
->frame
; /* dummy frame same as caller's frame */
205 if (!inside_entry_file (frame
->pc
))
206 return read_memory_integer (FRAME_FP (frame
) + frame
->f_offset
, 4);
211 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
212 we might want to do here is to check REGNUM against the clobber mask, and
213 somehow flag it as invalid if it isn't saved on the stack somewhere. This
214 would provide a graceful failure mode when trying to get the value of
215 caller-saves registers for an inner frame. */
218 sh_find_callers_reg (fi
, regnum
)
219 struct frame_info
*fi
;
222 struct frame_saved_regs fsr
;
224 for (; fi
; fi
= fi
->next
)
225 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
226 /* When the caller requests PR from the dummy frame, we return PC because
227 that's where the previous routine appears to have done a call from. */
228 return generic_read_register_dummy (fi
->pc
, fi
->frame
, regnum
);
231 FRAME_FIND_SAVED_REGS (fi
, fsr
);
232 if (fsr
.regs
[regnum
] != 0)
233 return read_memory_integer (fsr
.regs
[regnum
],
234 REGISTER_RAW_SIZE (regnum
));
236 return read_register (regnum
);
239 /* Put here the code to store, into a struct frame_saved_regs, the
240 addresses of the saved registers of frame described by FRAME_INFO.
241 This includes special registers such as pc and fp saved in special
242 ways in the stack frame. sp is even more special: the address we
243 return for it IS the sp for the next frame. */
246 sh_frame_find_saved_regs (fi
, fsr
)
247 struct frame_info
*fi
;
248 struct frame_saved_regs
*fsr
;
258 char *dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
262 /* DANGER! This is ONLY going to work if the char buffer format of
263 the saved registers is byte-for-byte identical to the
264 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
265 memcpy (&fsr
->regs
, dummy_regs
, sizeof (fsr
));
269 opc
= pc
= get_pc_function_start (fi
->pc
);
271 insn
= read_memory_integer (pc
, 2);
273 fi
->leaf_function
= 1;
276 for (rn
= 0; rn
< NUM_REGS
; rn
++)
281 /* Loop around examining the prologue insns until we find something
282 that does not appear to be part of the prologue. But give up
283 after 20 of them, since we're getting silly then. */
285 while (pc
< opc
+ 20 * 2)
287 /* See where the registers will be saved to */
291 rn
= GET_PUSHED_REG (insn
);
293 insn
= read_memory_integer (pc
, 2);
296 else if (IS_STS (insn
))
299 where
[PR_REGNUM
] = depth
;
300 insn
= read_memory_integer (pc
, 2);
301 /* If we're storing the pr then this isn't a leaf */
302 fi
->leaf_function
= 0;
305 else if (IS_MOV_R3 (insn
))
307 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
309 insn
= read_memory_integer (pc
, 2);
311 else if (IS_SHLL_R3 (insn
))
315 insn
= read_memory_integer (pc
, 2);
317 else if (IS_ADD_R3SP (insn
))
321 insn
= read_memory_integer (pc
, 2);
323 else if (IS_ADD_SP (insn
))
326 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
327 insn
= read_memory_integer (pc
, 2);
329 else if (IS_FMOV (insn
))
332 insn
= read_memory_integer (pc
, 2);
333 if (read_register (FPSCR_REGNUM
) & FPSCR_SZ
)
346 /* Now we know how deep things are, we can work out their addresses */
348 for (rn
= 0; rn
< NUM_REGS
; rn
++)
355 fsr
->regs
[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
365 fsr
->regs
[SP_REGNUM
] = read_memory_integer (fsr
->regs
[FP_REGNUM
], 4);
369 fsr
->regs
[SP_REGNUM
] = fi
->frame
- 4;
372 fi
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
373 /* Work out the return pc - either from the saved pr or the pr
377 /* initialize the extra info saved in a FRAME */
380 sh_init_extra_frame_info (fromleaf
, fi
)
382 struct frame_info
*fi
;
384 struct frame_saved_regs fsr
;
387 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
389 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
391 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
392 by assuming it's always FP. */
393 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
395 fi
->return_pc
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
397 fi
->f_offset
= -(CALL_DUMMY_LENGTH
+ 4);
398 fi
->leaf_function
= 0;
403 FRAME_FIND_SAVED_REGS (fi
, fsr
);
404 fi
->return_pc
= sh_find_callers_reg (fi
, PR_REGNUM
);
408 /* Discard from the stack the innermost frame,
409 restoring all saved registers. */
414 register struct frame_info
*frame
= get_current_frame ();
415 register CORE_ADDR fp
;
417 struct frame_saved_regs fsr
;
419 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
420 generic_pop_dummy_frame ();
423 fp
= FRAME_FP (frame
);
424 get_frame_saved_regs (frame
, &fsr
);
426 /* Copy regs from where they were saved in the frame */
427 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
428 if (fsr
.regs
[regnum
])
429 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
431 write_register (PC_REGNUM
, frame
->return_pc
);
432 write_register (SP_REGNUM
, fp
+ 4);
434 flush_cached_frames ();
437 /* Function: push_arguments
438 Setup the function arguments for calling a function in the inferior.
440 On the Hitachi SH architecture, there are four registers (R4 to R7)
441 which are dedicated for passing function arguments. Up to the first
442 four arguments (depending on size) may go into these registers.
443 The rest go on the stack.
445 Arguments that are smaller than 4 bytes will still take up a whole
446 register or a whole 32-bit word on the stack, and will be
447 right-justified in the register or the stack word. This includes
448 chars, shorts, and small aggregate types.
450 Arguments that are larger than 4 bytes may be split between two or
451 more registers. If there are not enough registers free, an argument
452 may be passed partly in a register (or registers), and partly on the
453 stack. This includes doubles, long longs, and larger aggregates.
454 As far as I know, there is no upper limit to the size of aggregates
455 that will be passed in this way; in other words, the convention of
456 passing a pointer to a large aggregate instead of a copy is not used.
458 An exceptional case exists for struct arguments (and possibly other
459 aggregates such as arrays) if the size is larger than 4 bytes but
460 not a multiple of 4 bytes. In this case the argument is never split
461 between the registers and the stack, but instead is copied in its
462 entirety onto the stack, AND also copied into as many registers as
463 there is room for. In other words, space in registers permitting,
464 two copies of the same argument are passed in. As far as I can tell,
465 only the one on the stack is used, although that may be a function
466 of the level of compiler optimization. I suspect this is a compiler
467 bug. Arguments of these odd sizes are left-justified within the
468 word (as opposed to arguments smaller than 4 bytes, which are
472 If the function is to return an aggregate type such as a struct, it
473 is either returned in the normal return value register R0 (if its
474 size is no greater than one byte), or else the caller must allocate
475 space into which the callee will copy the return value (if the size
476 is greater than one byte). In this case, a pointer to the return
477 value location is passed into the callee in register R2, which does
478 not displace any of the other arguments passed in via registers R4
482 sh_push_arguments (nargs
, args
, sp
, struct_return
, struct_addr
)
486 unsigned char struct_return
;
487 CORE_ADDR struct_addr
;
489 int stack_offset
, stack_alloc
;
497 int odd_sized_struct
;
499 /* first force sp to a 4-byte alignment */
502 /* The "struct return pointer" pseudo-argument has its own dedicated
505 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
507 /* Now make sure there's space on the stack */
508 for (argnum
= 0, stack_alloc
= 0;
509 argnum
< nargs
; argnum
++)
510 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
511 sp
-= stack_alloc
; /* make room on stack for args */
514 /* Now load as many as possible of the first arguments into
515 registers, and push the rest onto the stack. There are 16 bytes
516 in four registers available. Loop thru args from first to last. */
518 argreg
= ARG0_REGNUM
;
519 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
521 type
= VALUE_TYPE (args
[argnum
]);
522 len
= TYPE_LENGTH (type
);
523 memset (valbuf
, 0, sizeof (valbuf
));
525 { /* value gets right-justified in the register or stack word */
526 memcpy (valbuf
+ (4 - len
),
527 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
531 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
533 if (len
> 4 && (len
& 3) != 0)
534 odd_sized_struct
= 1; /* such structs go entirely on stack */
536 odd_sized_struct
= 0;
539 if (argreg
> ARGLAST_REGNUM
|| odd_sized_struct
)
540 { /* must go on the stack */
541 write_memory (sp
+ stack_offset
, val
, 4);
544 /* NOTE WELL!!!!! This is not an "else if" clause!!!
545 That's because some *&^%$ things get passed on the stack
546 AND in the registers! */
547 if (argreg
<= ARGLAST_REGNUM
)
548 { /* there's room in a register */
549 regval
= extract_address (val
, REGISTER_RAW_SIZE (argreg
));
550 write_register (argreg
++, regval
);
552 /* Store the value 4 bytes at a time. This means that things
553 larger than 4 bytes may go partly in registers and partly
555 len
-= REGISTER_RAW_SIZE (argreg
);
556 val
+= REGISTER_RAW_SIZE (argreg
);
562 /* Function: push_return_address (pc)
563 Set up the return address for the inferior function call.
564 Needed for targets where we don't actually execute a JSR/BSR instruction */
567 sh_push_return_address (pc
, sp
)
571 write_register (PR_REGNUM
, CALL_DUMMY_ADDRESS ());
575 /* Function: fix_call_dummy
576 Poke the callee function's address into the destination part of
577 the CALL_DUMMY. The address is actually stored in a data word
578 following the actualy CALL_DUMMY instructions, which will load
579 it into a register using PC-relative addressing. This function
580 expects the CALL_DUMMY to look like this:
591 sh_fix_call_dummy (dummy
, pc
, fun
, nargs
, args
, type
, gcc_p
)
600 *(unsigned long *) (dummy
+ 8) = fun
;
605 /* Modify the actual processor type. */
608 sh_target_architecture_hook (ap
)
609 const bfd_arch_info_type
*ap
;
613 if (ap
->arch
!= bfd_arch_sh
)
616 for (i
= 0; sh_processor_type_table
[i
].regnames
!= NULL
; i
++)
618 if (sh_processor_type_table
[i
].mach
== ap
->mach
)
620 sh_register_names
= sh_processor_type_table
[i
].regnames
;
625 internal_error ("Architecture `%s' unreconized", ap
->printable_name
);
628 /* Print the registers in a form similar to the E7000 */
631 sh_show_regs (args
, from_tty
)
636 if (TARGET_ARCHITECTURE
->arch
== bfd_arch_sh
)
637 cpu
= TARGET_ARCHITECTURE
->mach
;
641 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
642 paddr (read_register (PC_REGNUM
)),
643 (long) read_register (SR_REGNUM
),
644 (long) read_register (PR_REGNUM
),
645 (long) read_register (MACH_REGNUM
),
646 (long) read_register (MACL_REGNUM
));
648 printf_filtered ("GBR=%08lx VBR=%08lx",
649 (long) read_register (GBR_REGNUM
),
650 (long) read_register (VBR_REGNUM
));
651 if (cpu
== bfd_mach_sh3
|| cpu
== bfd_mach_sh3e
)
653 printf_filtered (" SSR=%08lx SPC=%08lx",
654 (long) read_register (SSR_REGNUM
),
655 (long) read_register (SPC_REGNUM
));
656 if (cpu
== bfd_mach_sh3e
)
658 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
659 (long) read_register (FPUL_REGNUM
),
660 (long) read_register (FPSCR_REGNUM
));
664 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
665 (long) read_register (0),
666 (long) read_register (1),
667 (long) read_register (2),
668 (long) read_register (3),
669 (long) read_register (4),
670 (long) read_register (5),
671 (long) read_register (6),
672 (long) read_register (7));
673 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
674 (long) read_register (8),
675 (long) read_register (9),
676 (long) read_register (10),
677 (long) read_register (11),
678 (long) read_register (12),
679 (long) read_register (13),
680 (long) read_register (14),
681 (long) read_register (15));
682 if (cpu
== bfd_mach_sh3e
)
684 printf_filtered ("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
685 (long) read_register (FP0_REGNUM
+ 0),
686 (long) read_register (FP0_REGNUM
+ 1),
687 (long) read_register (FP0_REGNUM
+ 2),
688 (long) read_register (FP0_REGNUM
+ 3),
689 (long) read_register (FP0_REGNUM
+ 4),
690 (long) read_register (FP0_REGNUM
+ 5),
691 (long) read_register (FP0_REGNUM
+ 6),
692 (long) read_register (FP0_REGNUM
+ 7));
693 printf_filtered ("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
694 (long) read_register (FP0_REGNUM
+ 8),
695 (long) read_register (FP0_REGNUM
+ 9),
696 (long) read_register (FP0_REGNUM
+ 10),
697 (long) read_register (FP0_REGNUM
+ 11),
698 (long) read_register (FP0_REGNUM
+ 12),
699 (long) read_register (FP0_REGNUM
+ 13),
700 (long) read_register (FP0_REGNUM
+ 14),
701 (long) read_register (FP0_REGNUM
+ 15));
705 /* Function: extract_return_value
706 Find a function's return value in the appropriate registers (in regbuf),
707 and copy it into valbuf. */
710 sh_extract_return_value (type
, regbuf
, valbuf
)
715 int len
= TYPE_LENGTH (type
);
718 memcpy (valbuf
, ((char *) regbuf
) + 4 - len
, len
);
720 memcpy (valbuf
, ((char *) regbuf
) + 8 - len
, len
);
722 error ("bad size for return value");
726 _initialize_sh_tdep ()
728 struct cmd_list_element
*c
;
730 tm_print_insn
= gdb_print_insn_sh
;
732 target_architecture_hook
= sh_target_architecture_hook
;
734 add_com ("regs", class_vars
, sh_show_regs
, "Print all registers");