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[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "obstack.h"
30 #include "symtab.h"
31 #include "symfile.h"
32 #include "gdbtypes.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "value.h"
36 #include "dis-asm.h"
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
41 #include "regcache.h"
42 #include "doublest.h"
43
44 #include "solib-svr4.h"
45
46 #undef XMALLOC
47 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
48
49 void (*sh_show_regs) (void);
50 CORE_ADDR (*skip_prologue_hard_way) (CORE_ADDR);
51 void (*do_pseudo_register) (int);
52
53 #define SH_DEFAULT_NUM_REGS 59
54
55 /* Define other aspects of the stack frame.
56 we keep a copy of the worked out return pc lying around, since it
57 is a useful bit of info */
58
59 struct frame_extra_info
60 {
61 CORE_ADDR return_pc;
62 int leaf_function;
63 int f_offset;
64 };
65
66 static char *
67 sh_generic_register_name (int reg_nr)
68 {
69 static char *register_names[] =
70 {
71 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
72 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
73 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
74 "fpul", "fpscr",
75 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
76 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
77 "ssr", "spc",
78 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
79 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
80 };
81 if (reg_nr < 0)
82 return NULL;
83 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
84 return NULL;
85 return register_names[reg_nr];
86 }
87
88 static char *
89 sh_sh_register_name (int reg_nr)
90 {
91 static char *register_names[] =
92 {
93 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
94 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
95 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
96 "", "",
97 "", "", "", "", "", "", "", "",
98 "", "", "", "", "", "", "", "",
99 "", "",
100 "", "", "", "", "", "", "", "",
101 "", "", "", "", "", "", "", "",
102 };
103 if (reg_nr < 0)
104 return NULL;
105 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
106 return NULL;
107 return register_names[reg_nr];
108 }
109
110 static char *
111 sh_sh3_register_name (int reg_nr)
112 {
113 static char *register_names[] =
114 {
115 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
116 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
117 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
118 "", "",
119 "", "", "", "", "", "", "", "",
120 "", "", "", "", "", "", "", "",
121 "ssr", "spc",
122 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
123 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
124 };
125 if (reg_nr < 0)
126 return NULL;
127 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
128 return NULL;
129 return register_names[reg_nr];
130 }
131
132 static char *
133 sh_sh3e_register_name (int reg_nr)
134 {
135 static char *register_names[] =
136 {
137 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
138 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
139 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
140 "fpul", "fpscr",
141 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
142 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
143 "ssr", "spc",
144 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
145 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
146 };
147 if (reg_nr < 0)
148 return NULL;
149 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
150 return NULL;
151 return register_names[reg_nr];
152 }
153
154 static char *
155 sh_sh_dsp_register_name (int reg_nr)
156 {
157 static char *register_names[] =
158 {
159 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
160 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
161 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
162 "", "dsr",
163 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
164 "y0", "y1", "", "", "", "", "", "mod",
165 "", "",
166 "rs", "re", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "",
168 };
169 if (reg_nr < 0)
170 return NULL;
171 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
172 return NULL;
173 return register_names[reg_nr];
174 }
175
176 static char *
177 sh_sh3_dsp_register_name (int reg_nr)
178 {
179 static char *register_names[] =
180 {
181 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
182 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
183 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
184 "", "dsr",
185 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
186 "y0", "y1", "", "", "", "", "", "mod",
187 "ssr", "spc",
188 "rs", "re", "", "", "", "", "", "",
189 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
190 "", "", "", "", "", "", "", "",
191 };
192 if (reg_nr < 0)
193 return NULL;
194 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
195 return NULL;
196 return register_names[reg_nr];
197 }
198
199 static char *
200 sh_sh4_register_name (int reg_nr)
201 {
202 static char *register_names[] =
203 {
204 /* general registers 0-15 */
205 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
206 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
207 /* 16 - 22 */
208 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
209 /* 23, 24 */
210 "fpul", "fpscr",
211 /* floating point registers 25 - 40 */
212 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
213 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
214 /* 41, 42 */
215 "ssr", "spc",
216 /* bank 0 43 - 50 */
217 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
218 /* bank 1 51 - 58 */
219 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
220 /* double precision (pseudo) 59 - 66 */
221 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
222 /* vectors (pseudo) 67 - 70 */
223 "fv0", "fv4", "fv8", "fv12",
224 /* FIXME: missing XF 71 - 86 */
225 /* FIXME: missing XD 87 - 94 */
226 };
227 if (reg_nr < 0)
228 return NULL;
229 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
230 return NULL;
231 return register_names[reg_nr];
232 }
233
234 static unsigned char *
235 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
236 {
237 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
238 static unsigned char breakpoint[] = {0xc3, 0xc3};
239
240 *lenptr = sizeof (breakpoint);
241 return breakpoint;
242 }
243
244 /* Prologue looks like
245 [mov.l <regs>,@-r15]...
246 [sts.l pr,@-r15]
247 [mov.l r14,@-r15]
248 [mov r15,r14]
249
250 Actually it can be more complicated than this. For instance, with
251 newer gcc's:
252
253 mov.l r14,@-r15
254 add #-12,r15
255 mov r15,r14
256 mov r4,r1
257 mov r5,r2
258 mov.l r6,@(4,r14)
259 mov.l r7,@(8,r14)
260 mov.b r1,@r14
261 mov r14,r1
262 mov r14,r1
263 add #2,r1
264 mov.w r2,@r1
265
266 */
267
268 /* STS.L PR,@-r15 0100111100100010
269 r15-4-->r15, PR-->(r15) */
270 #define IS_STS(x) ((x) == 0x4f22)
271
272 /* MOV.L Rm,@-r15 00101111mmmm0110
273 r15-4-->r15, Rm-->(R15) */
274 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
275
276 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
277
278 /* MOV r15,r14 0110111011110011
279 r15-->r14 */
280 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
281
282 /* ADD #imm,r15 01111111iiiiiiii
283 r15+imm-->r15 */
284 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
285
286 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
287 #define IS_SHLL_R3(x) ((x) == 0x4300)
288
289 /* ADD r3,r15 0011111100111100
290 r15+r3-->r15 */
291 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
292
293 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
294 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
295 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
296 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
297
298 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
299 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
300 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
301 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
302 #define IS_ARG_MOV(x) \
303 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
304 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
305 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
306
307 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
308 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
309 #define IS_MOV_TO_R14(x) \
310 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
311
312 #define FPSCR_SZ (1 << 20)
313
314 /* Skip any prologue before the guts of a function */
315
316 /* Skip the prologue using the debug information. If this fails we'll
317 fall back on the 'guess' method below. */
318 static CORE_ADDR
319 after_prologue (CORE_ADDR pc)
320 {
321 struct symtab_and_line sal;
322 CORE_ADDR func_addr, func_end;
323
324 /* If we can not find the symbol in the partial symbol table, then
325 there is no hope we can determine the function's start address
326 with this code. */
327 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
328 return 0;
329
330 /* Get the line associated with FUNC_ADDR. */
331 sal = find_pc_line (func_addr, 0);
332
333 /* There are only two cases to consider. First, the end of the source line
334 is within the function bounds. In that case we return the end of the
335 source line. Second is the end of the source line extends beyond the
336 bounds of the current function. We need to use the slow code to
337 examine instructions in that case. */
338 if (sal.end < func_end)
339 return sal.end;
340 else
341 return 0;
342 }
343
344 /* Here we look at each instruction in the function, and try to guess
345 where the prologue ends. Unfortunately this is not always
346 accurate. */
347 static CORE_ADDR
348 sh_skip_prologue_hard_way (CORE_ADDR start_pc)
349 {
350 CORE_ADDR here, end;
351 int updated_fp = 0;
352
353 if (!start_pc)
354 return 0;
355
356 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
357 {
358 int w = read_memory_integer (here, 2);
359 here += 2;
360 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
361 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
362 || IS_ARG_MOV (w) || IS_MOV_TO_R14 (w))
363 {
364 start_pc = here;
365 }
366 else if (IS_MOV_SP_FP (w))
367 {
368 start_pc = here;
369 updated_fp = 1;
370 }
371 else
372 /* Don't bail out yet, if we are before the copy of sp. */
373 if (updated_fp)
374 break;
375 }
376
377 return start_pc;
378 }
379
380 static CORE_ADDR
381 sh_skip_prologue (CORE_ADDR pc)
382 {
383 CORE_ADDR post_prologue_pc;
384
385 /* See if we can determine the end of the prologue via the symbol table.
386 If so, then return either PC, or the PC after the prologue, whichever
387 is greater. */
388 post_prologue_pc = after_prologue (pc);
389
390 /* If after_prologue returned a useful address, then use it. Else
391 fall back on the instruction skipping code. */
392 if (post_prologue_pc != 0)
393 return max (pc, post_prologue_pc);
394 else
395 return (skip_prologue_hard_way (pc));
396 }
397
398 /* Immediately after a function call, return the saved pc.
399 Can't always go through the frames for this because on some machines
400 the new frame is not set up until the new function executes
401 some instructions.
402
403 The return address is the value saved in the PR register + 4 */
404 static CORE_ADDR
405 sh_saved_pc_after_call (struct frame_info *frame)
406 {
407 return (ADDR_BITS_REMOVE (read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM)));
408 }
409
410 /* Should call_function allocate stack space for a struct return? */
411 static int
412 sh_use_struct_convention (int gcc_p, struct type *type)
413 {
414 return (TYPE_LENGTH (type) > 1);
415 }
416
417 /* Store the address of the place in which to copy the structure the
418 subroutine will return. This is called from call_function.
419
420 We store structs through a pointer passed in R2 */
421 static void
422 sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
423 {
424 write_register (STRUCT_RETURN_REGNUM, (addr));
425 }
426
427 /* Disassemble an instruction. */
428 static int
429 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
430 {
431 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
432 return print_insn_sh (memaddr, info);
433 else
434 return print_insn_shl (memaddr, info);
435 }
436
437 /* Given a GDB frame, determine the address of the calling function's frame.
438 This will be used to create a new GDB frame struct, and then
439 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
440
441 For us, the frame address is its stack pointer value, so we look up
442 the function prologue to determine the caller's sp value, and return it. */
443 static CORE_ADDR
444 sh_frame_chain (struct frame_info *frame)
445 {
446 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
447 return frame->frame; /* dummy frame same as caller's frame */
448 if (frame->pc && !inside_entry_file (frame->pc))
449 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
450 else
451 return 0;
452 }
453
454 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
455 we might want to do here is to check REGNUM against the clobber mask, and
456 somehow flag it as invalid if it isn't saved on the stack somewhere. This
457 would provide a graceful failure mode when trying to get the value of
458 caller-saves registers for an inner frame. */
459 static CORE_ADDR
460 sh_find_callers_reg (struct frame_info *fi, int regnum)
461 {
462 for (; fi; fi = fi->next)
463 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
464 /* When the caller requests PR from the dummy frame, we return PC because
465 that's where the previous routine appears to have done a call from. */
466 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
467 else
468 {
469 FRAME_INIT_SAVED_REGS (fi);
470 if (!fi->pc)
471 return 0;
472 if (fi->saved_regs[regnum] != 0)
473 return read_memory_integer (fi->saved_regs[regnum],
474 REGISTER_RAW_SIZE (regnum));
475 }
476 return read_register (regnum);
477 }
478
479 /* Put here the code to store, into a struct frame_saved_regs, the
480 addresses of the saved registers of frame described by FRAME_INFO.
481 This includes special registers such as pc and fp saved in special
482 ways in the stack frame. sp is even more special: the address we
483 return for it IS the sp for the next frame. */
484 static void
485 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
486 {
487 int where[NUM_REGS + NUM_PSEUDO_REGS];
488 int rn;
489 int have_fp = 0;
490 int depth;
491 int pc;
492 int opc;
493 int insn;
494 int r3_val = 0;
495 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
496
497 if (fi->saved_regs == NULL)
498 frame_saved_regs_zalloc (fi);
499 else
500 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
501
502 if (dummy_regs)
503 {
504 /* DANGER! This is ONLY going to work if the char buffer format of
505 the saved registers is byte-for-byte identical to the
506 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
507 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
508 return;
509 }
510
511 fi->extra_info->leaf_function = 1;
512 fi->extra_info->f_offset = 0;
513
514 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
515 where[rn] = -1;
516
517 depth = 0;
518
519 /* Loop around examining the prologue insns until we find something
520 that does not appear to be part of the prologue. But give up
521 after 20 of them, since we're getting silly then. */
522
523 pc = get_pc_function_start (fi->pc);
524 if (!pc)
525 {
526 fi->pc = 0;
527 return;
528 }
529
530 for (opc = pc + (2 * 28); pc < opc; pc += 2)
531 {
532 insn = read_memory_integer (pc, 2);
533 /* See where the registers will be saved to */
534 if (IS_PUSH (insn))
535 {
536 rn = GET_PUSHED_REG (insn);
537 where[rn] = depth;
538 depth += 4;
539 }
540 else if (IS_STS (insn))
541 {
542 where[gdbarch_tdep (current_gdbarch)->PR_REGNUM] = depth;
543 /* If we're storing the pr then this isn't a leaf */
544 fi->extra_info->leaf_function = 0;
545 depth += 4;
546 }
547 else if (IS_MOV_R3 (insn))
548 {
549 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
550 }
551 else if (IS_SHLL_R3 (insn))
552 {
553 r3_val <<= 1;
554 }
555 else if (IS_ADD_R3SP (insn))
556 {
557 depth += -r3_val;
558 }
559 else if (IS_ADD_SP (insn))
560 {
561 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
562 }
563 else if (IS_MOV_SP_FP (insn))
564 break;
565 #if 0 /* This used to just stop when it found an instruction that
566 was not considered part of the prologue. Now, we just
567 keep going looking for likely instructions. */
568 else
569 break;
570 #endif
571 }
572
573 /* Now we know how deep things are, we can work out their addresses */
574
575 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
576 {
577 if (where[rn] >= 0)
578 {
579 if (rn == FP_REGNUM)
580 have_fp = 1;
581
582 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
583 }
584 else
585 {
586 fi->saved_regs[rn] = 0;
587 }
588 }
589
590 if (have_fp)
591 {
592 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
593 }
594 else
595 {
596 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
597 }
598
599 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
600 /* Work out the return pc - either from the saved pr or the pr
601 value */
602 }
603
604 /* For vectors of 4 floating point registers. */
605 static int
606 fv_reg_base_num (int fv_regnum)
607 {
608 int fp_regnum;
609
610 fp_regnum = FP0_REGNUM +
611 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
612 return fp_regnum;
613 }
614
615 /* For double precision floating point registers, i.e 2 fp regs.*/
616 static int
617 dr_reg_base_num (int dr_regnum)
618 {
619 int fp_regnum;
620
621 fp_regnum = FP0_REGNUM +
622 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
623 return fp_regnum;
624 }
625
626 static void
627 sh_fp_frame_init_saved_regs (struct frame_info *fi)
628 {
629 int where[NUM_REGS + NUM_PSEUDO_REGS];
630 int rn;
631 int have_fp = 0;
632 int depth;
633 int pc;
634 int opc;
635 int insn;
636 int r3_val = 0;
637 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
638 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
639
640 if (fi->saved_regs == NULL)
641 frame_saved_regs_zalloc (fi);
642 else
643 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
644
645 if (dummy_regs)
646 {
647 /* DANGER! This is ONLY going to work if the char buffer format of
648 the saved registers is byte-for-byte identical to the
649 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
650 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
651 return;
652 }
653
654 fi->extra_info->leaf_function = 1;
655 fi->extra_info->f_offset = 0;
656
657 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
658 where[rn] = -1;
659
660 depth = 0;
661
662 /* Loop around examining the prologue insns until we find something
663 that does not appear to be part of the prologue. But give up
664 after 20 of them, since we're getting silly then. */
665
666 pc = get_pc_function_start (fi->pc);
667 if (!pc)
668 {
669 fi->pc = 0;
670 return;
671 }
672
673 for (opc = pc + (2 * 28); pc < opc; pc += 2)
674 {
675 insn = read_memory_integer (pc, 2);
676 /* See where the registers will be saved to */
677 if (IS_PUSH (insn))
678 {
679 rn = GET_PUSHED_REG (insn);
680 where[rn] = depth;
681 depth += 4;
682 }
683 else if (IS_STS (insn))
684 {
685 where[tdep->PR_REGNUM] = depth;
686 /* If we're storing the pr then this isn't a leaf */
687 fi->extra_info->leaf_function = 0;
688 depth += 4;
689 }
690 else if (IS_MOV_R3 (insn))
691 {
692 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
693 }
694 else if (IS_SHLL_R3 (insn))
695 {
696 r3_val <<= 1;
697 }
698 else if (IS_ADD_R3SP (insn))
699 {
700 depth += -r3_val;
701 }
702 else if (IS_ADD_SP (insn))
703 {
704 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
705 }
706 else if (IS_FMOV (insn))
707 {
708 if (read_register (tdep->FPSCR_REGNUM) & FPSCR_SZ)
709 {
710 depth += 8;
711 }
712 else
713 {
714 depth += 4;
715 }
716 }
717 else if (IS_MOV_SP_FP (insn))
718 break;
719 #if 0 /* This used to just stop when it found an instruction that
720 was not considered part of the prologue. Now, we just
721 keep going looking for likely instructions. */
722 else
723 break;
724 #endif
725 }
726
727 /* Now we know how deep things are, we can work out their addresses */
728
729 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
730 {
731 if (where[rn] >= 0)
732 {
733 if (rn == FP_REGNUM)
734 have_fp = 1;
735
736 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
737 }
738 else
739 {
740 fi->saved_regs[rn] = 0;
741 }
742 }
743
744 if (have_fp)
745 {
746 fi->saved_regs[SP_REGNUM] =
747 read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
748 }
749 else
750 {
751 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
752 }
753
754 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
755 /* Work out the return pc - either from the saved pr or the pr
756 value */
757 }
758
759 /* Initialize the extra info saved in a FRAME */
760 static void
761 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
762 {
763
764 fi->extra_info = (struct frame_extra_info *)
765 frame_obstack_alloc (sizeof (struct frame_extra_info));
766
767 if (fi->next)
768 fi->pc = FRAME_SAVED_PC (fi->next);
769
770 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
771 {
772 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
773 by assuming it's always FP. */
774 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
775 SP_REGNUM);
776 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc,
777 fi->frame,
778 PC_REGNUM);
779 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
780 fi->extra_info->leaf_function = 0;
781 return;
782 }
783 else
784 {
785 FRAME_INIT_SAVED_REGS (fi);
786 fi->extra_info->return_pc =
787 sh_find_callers_reg (fi, gdbarch_tdep (current_gdbarch)->PR_REGNUM);
788 }
789 }
790
791 /* Extract from an array REGBUF containing the (raw) register state
792 the address in which a function should return its structure value,
793 as a CORE_ADDR (or an expression that can be used as one). */
794 static CORE_ADDR
795 sh_extract_struct_value_address (char *regbuf)
796 {
797 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
798 }
799
800 static CORE_ADDR
801 sh_frame_saved_pc (struct frame_info *frame)
802 {
803 return ((frame)->extra_info->return_pc);
804 }
805
806 /* Discard from the stack the innermost frame,
807 restoring all saved registers. */
808 static void
809 sh_pop_frame (void)
810 {
811 register struct frame_info *frame = get_current_frame ();
812 register CORE_ADDR fp;
813 register int regnum;
814
815 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
816 generic_pop_dummy_frame ();
817 else
818 {
819 fp = FRAME_FP (frame);
820 FRAME_INIT_SAVED_REGS (frame);
821
822 /* Copy regs from where they were saved in the frame */
823 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
824 if (frame->saved_regs[regnum])
825 write_register (regnum,
826 read_memory_integer (frame->saved_regs[regnum], 4));
827
828 write_register (PC_REGNUM, frame->extra_info->return_pc);
829 write_register (SP_REGNUM, fp + 4);
830 }
831 flush_cached_frames ();
832 }
833
834 /* Function: push_arguments
835 Setup the function arguments for calling a function in the inferior.
836
837 On the Hitachi SH architecture, there are four registers (R4 to R7)
838 which are dedicated for passing function arguments. Up to the first
839 four arguments (depending on size) may go into these registers.
840 The rest go on the stack.
841
842 Arguments that are smaller than 4 bytes will still take up a whole
843 register or a whole 32-bit word on the stack, and will be
844 right-justified in the register or the stack word. This includes
845 chars, shorts, and small aggregate types.
846
847 Arguments that are larger than 4 bytes may be split between two or
848 more registers. If there are not enough registers free, an argument
849 may be passed partly in a register (or registers), and partly on the
850 stack. This includes doubles, long longs, and larger aggregates.
851 As far as I know, there is no upper limit to the size of aggregates
852 that will be passed in this way; in other words, the convention of
853 passing a pointer to a large aggregate instead of a copy is not used.
854
855 An exceptional case exists for struct arguments (and possibly other
856 aggregates such as arrays) if the size is larger than 4 bytes but
857 not a multiple of 4 bytes. In this case the argument is never split
858 between the registers and the stack, but instead is copied in its
859 entirety onto the stack, AND also copied into as many registers as
860 there is room for. In other words, space in registers permitting,
861 two copies of the same argument are passed in. As far as I can tell,
862 only the one on the stack is used, although that may be a function
863 of the level of compiler optimization. I suspect this is a compiler
864 bug. Arguments of these odd sizes are left-justified within the
865 word (as opposed to arguments smaller than 4 bytes, which are
866 right-justified).
867
868 If the function is to return an aggregate type such as a struct, it
869 is either returned in the normal return value register R0 (if its
870 size is no greater than one byte), or else the caller must allocate
871 space into which the callee will copy the return value (if the size
872 is greater than one byte). In this case, a pointer to the return
873 value location is passed into the callee in register R2, which does
874 not displace any of the other arguments passed in via registers R4
875 to R7. */
876
877 static CORE_ADDR
878 sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
879 int struct_return, CORE_ADDR struct_addr)
880 {
881 int stack_offset, stack_alloc;
882 int argreg;
883 int argnum;
884 struct type *type;
885 CORE_ADDR regval;
886 char *val;
887 char valbuf[4];
888 int len;
889 int odd_sized_struct;
890 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
891
892 /* first force sp to a 4-byte alignment */
893 sp = sp & ~3;
894
895 /* The "struct return pointer" pseudo-argument has its own dedicated
896 register */
897 if (struct_return)
898 write_register (STRUCT_RETURN_REGNUM, struct_addr);
899
900 /* Now make sure there's space on the stack */
901 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
902 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
903 sp -= stack_alloc; /* make room on stack for args */
904
905 /* Now load as many as possible of the first arguments into
906 registers, and push the rest onto the stack. There are 16 bytes
907 in four registers available. Loop thru args from first to last. */
908
909 argreg = tdep->ARG0_REGNUM;
910 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
911 {
912 type = VALUE_TYPE (args[argnum]);
913 len = TYPE_LENGTH (type);
914 memset (valbuf, 0, sizeof (valbuf));
915 if (len < 4)
916 {
917 /* value gets right-justified in the register or stack word */
918 memcpy (valbuf + (4 - len),
919 (char *) VALUE_CONTENTS (args[argnum]), len);
920 val = valbuf;
921 }
922 else
923 val = (char *) VALUE_CONTENTS (args[argnum]);
924
925 if (len > 4 && (len & 3) != 0)
926 odd_sized_struct = 1; /* such structs go entirely on stack */
927 else
928 odd_sized_struct = 0;
929 while (len > 0)
930 {
931 if (argreg > tdep->ARGLAST_REGNUM
932 || odd_sized_struct)
933 {
934 /* must go on the stack */
935 write_memory (sp + stack_offset, val, 4);
936 stack_offset += 4;
937 }
938 /* NOTE WELL!!!!! This is not an "else if" clause!!!
939 That's because some *&^%$ things get passed on the stack
940 AND in the registers! */
941 if (argreg <= tdep->ARGLAST_REGNUM)
942 {
943 /* there's room in a register */
944 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
945 write_register (argreg++, regval);
946 }
947 /* Store the value 4 bytes at a time. This means that things
948 larger than 4 bytes may go partly in registers and partly
949 on the stack. */
950 len -= REGISTER_RAW_SIZE (argreg);
951 val += REGISTER_RAW_SIZE (argreg);
952 }
953 }
954 return sp;
955 }
956
957 /* Function: push_return_address (pc)
958 Set up the return address for the inferior function call.
959 Needed for targets where we don't actually execute a JSR/BSR instruction */
960
961 static CORE_ADDR
962 sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
963 {
964 write_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM, CALL_DUMMY_ADDRESS ());
965 return sp;
966 }
967
968 /* Function: fix_call_dummy
969 Poke the callee function's address into the destination part of
970 the CALL_DUMMY. The address is actually stored in a data word
971 following the actualy CALL_DUMMY instructions, which will load
972 it into a register using PC-relative addressing. This function
973 expects the CALL_DUMMY to look like this:
974
975 mov.w @(2,PC), R8
976 jsr @R8
977 nop
978 trap
979 <destination>
980 */
981
982 #if 0
983 void
984 sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
985 struct value **args, struct type *type, int gcc_p)
986 {
987 *(unsigned long *) (dummy + 8) = fun;
988 }
989 #endif
990
991 static int
992 sh_coerce_float_to_double (struct type *formal, struct type *actual)
993 {
994 return 1;
995 }
996
997 /* Find a function's return value in the appropriate registers (in
998 regbuf), and copy it into valbuf. Extract from an array REGBUF
999 containing the (raw) register state a function return value of type
1000 TYPE, and copy that, in virtual format, into VALBUF. */
1001 static void
1002 sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1003 {
1004 int len = TYPE_LENGTH (type);
1005 int return_register = R0_REGNUM;
1006 int offset;
1007
1008 if (len <= 4)
1009 {
1010 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1011 offset = REGISTER_BYTE (return_register) + 4 - len;
1012 else
1013 offset = REGISTER_BYTE (return_register);
1014 memcpy (valbuf, regbuf + offset, len);
1015 }
1016 else if (len <= 8)
1017 {
1018 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1019 offset = REGISTER_BYTE (return_register) + 8 - len;
1020 else
1021 offset = REGISTER_BYTE (return_register);
1022 memcpy (valbuf, regbuf + offset, len);
1023 }
1024 else
1025 error ("bad size for return value");
1026 }
1027
1028 static void
1029 sh3e_sh4_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1030 {
1031 int return_register;
1032 int offset;
1033 int len = TYPE_LENGTH (type);
1034
1035 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1036 return_register = FP0_REGNUM;
1037 else
1038 return_register = R0_REGNUM;
1039
1040 if (len == 8 && TYPE_CODE (type) == TYPE_CODE_FLT)
1041 {
1042 DOUBLEST val;
1043 if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
1044 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
1045 (char *) regbuf + REGISTER_BYTE (return_register),
1046 &val);
1047 else
1048 floatformat_to_doublest (&floatformat_ieee_double_big,
1049 (char *) regbuf + REGISTER_BYTE (return_register),
1050 &val);
1051 store_floating (valbuf, len, val);
1052 }
1053 else if (len <= 4)
1054 {
1055 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1056 offset = REGISTER_BYTE (return_register) + 4 - len;
1057 else
1058 offset = REGISTER_BYTE (return_register);
1059 memcpy (valbuf, regbuf + offset, len);
1060 }
1061 else if (len <= 8)
1062 {
1063 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1064 offset = REGISTER_BYTE (return_register) + 8 - len;
1065 else
1066 offset = REGISTER_BYTE (return_register);
1067 memcpy (valbuf, regbuf + offset, len);
1068 }
1069 else
1070 error ("bad size for return value");
1071 }
1072
1073 /* Write into appropriate registers a function return value
1074 of type TYPE, given in virtual format.
1075 If the architecture is sh4 or sh3e, store a function's return value
1076 in the R0 general register or in the FP0 floating point register,
1077 depending on the type of the return value. In all the other cases
1078 the result is stored in r0, left-justified. */
1079 static void
1080 sh_default_store_return_value (struct type *type, char *valbuf)
1081 {
1082 char buf[32]; /* more than enough... */
1083
1084 if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (R0_REGNUM))
1085 {
1086 /* Add leading zeros to the value. */
1087 memset (buf, 0, REGISTER_RAW_SIZE (R0_REGNUM));
1088 memcpy (buf + REGISTER_RAW_SIZE (R0_REGNUM) - TYPE_LENGTH (type),
1089 valbuf, TYPE_LENGTH (type));
1090 write_register_bytes (REGISTER_BYTE (R0_REGNUM), buf,
1091 REGISTER_RAW_SIZE (R0_REGNUM));
1092 }
1093 else
1094 write_register_bytes (REGISTER_BYTE (R0_REGNUM), valbuf,
1095 TYPE_LENGTH (type));
1096 }
1097
1098 static void
1099 sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1100 {
1101 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1102 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1103 valbuf, TYPE_LENGTH (type));
1104 else
1105 sh_default_store_return_value (type, valbuf);
1106 }
1107
1108 /* Print the registers in a form similar to the E7000 */
1109
1110 static void
1111 sh_generic_show_regs (void)
1112 {
1113 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1114
1115 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1116 paddr (read_register (PC_REGNUM)),
1117 (long) read_register (tdep->SR_REGNUM),
1118 (long) read_register (tdep->PR_REGNUM),
1119 (long) read_register (MACH_REGNUM),
1120 (long) read_register (MACL_REGNUM));
1121
1122 printf_filtered ("GBR=%08lx VBR=%08lx",
1123 (long) read_register (GBR_REGNUM),
1124 (long) read_register (VBR_REGNUM));
1125
1126 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1127 (long) read_register (0),
1128 (long) read_register (1),
1129 (long) read_register (2),
1130 (long) read_register (3),
1131 (long) read_register (4),
1132 (long) read_register (5),
1133 (long) read_register (6),
1134 (long) read_register (7));
1135 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1136 (long) read_register (8),
1137 (long) read_register (9),
1138 (long) read_register (10),
1139 (long) read_register (11),
1140 (long) read_register (12),
1141 (long) read_register (13),
1142 (long) read_register (14),
1143 (long) read_register (15));
1144 }
1145
1146 static void
1147 sh3_show_regs (void)
1148 {
1149 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1150
1151 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1152 paddr (read_register (PC_REGNUM)),
1153 (long) read_register (tdep->SR_REGNUM),
1154 (long) read_register (tdep->PR_REGNUM),
1155 (long) read_register (MACH_REGNUM),
1156 (long) read_register (MACL_REGNUM));
1157
1158 printf_filtered ("GBR=%08lx VBR=%08lx",
1159 (long) read_register (GBR_REGNUM),
1160 (long) read_register (VBR_REGNUM));
1161 printf_filtered (" SSR=%08lx SPC=%08lx",
1162 (long) read_register (tdep->SSR_REGNUM),
1163 (long) read_register (tdep->SPC_REGNUM));
1164
1165 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1166 (long) read_register (0),
1167 (long) read_register (1),
1168 (long) read_register (2),
1169 (long) read_register (3),
1170 (long) read_register (4),
1171 (long) read_register (5),
1172 (long) read_register (6),
1173 (long) read_register (7));
1174 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1175 (long) read_register (8),
1176 (long) read_register (9),
1177 (long) read_register (10),
1178 (long) read_register (11),
1179 (long) read_register (12),
1180 (long) read_register (13),
1181 (long) read_register (14),
1182 (long) read_register (15));
1183 }
1184
1185
1186 static void
1187 sh3e_show_regs (void)
1188 {
1189 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1190
1191 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1192 paddr (read_register (PC_REGNUM)),
1193 (long) read_register (tdep->SR_REGNUM),
1194 (long) read_register (tdep->PR_REGNUM),
1195 (long) read_register (MACH_REGNUM),
1196 (long) read_register (MACL_REGNUM));
1197
1198 printf_filtered ("GBR=%08lx VBR=%08lx",
1199 (long) read_register (GBR_REGNUM),
1200 (long) read_register (VBR_REGNUM));
1201 printf_filtered (" SSR=%08lx SPC=%08lx",
1202 (long) read_register (tdep->SSR_REGNUM),
1203 (long) read_register (tdep->SPC_REGNUM));
1204 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1205 (long) read_register (tdep->FPUL_REGNUM),
1206 (long) read_register (tdep->FPSCR_REGNUM));
1207
1208 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1209 (long) read_register (0),
1210 (long) read_register (1),
1211 (long) read_register (2),
1212 (long) read_register (3),
1213 (long) read_register (4),
1214 (long) read_register (5),
1215 (long) read_register (6),
1216 (long) read_register (7));
1217 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1218 (long) read_register (8),
1219 (long) read_register (9),
1220 (long) read_register (10),
1221 (long) read_register (11),
1222 (long) read_register (12),
1223 (long) read_register (13),
1224 (long) read_register (14),
1225 (long) read_register (15));
1226
1227 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1228 (long) read_register (FP0_REGNUM + 0),
1229 (long) read_register (FP0_REGNUM + 1),
1230 (long) read_register (FP0_REGNUM + 2),
1231 (long) read_register (FP0_REGNUM + 3),
1232 (long) read_register (FP0_REGNUM + 4),
1233 (long) read_register (FP0_REGNUM + 5),
1234 (long) read_register (FP0_REGNUM + 6),
1235 (long) read_register (FP0_REGNUM + 7));
1236 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1237 (long) read_register (FP0_REGNUM + 8),
1238 (long) read_register (FP0_REGNUM + 9),
1239 (long) read_register (FP0_REGNUM + 10),
1240 (long) read_register (FP0_REGNUM + 11),
1241 (long) read_register (FP0_REGNUM + 12),
1242 (long) read_register (FP0_REGNUM + 13),
1243 (long) read_register (FP0_REGNUM + 14),
1244 (long) read_register (FP0_REGNUM + 15));
1245 }
1246
1247 static void
1248 sh3_dsp_show_regs (void)
1249 {
1250 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1251
1252 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1253 paddr (read_register (PC_REGNUM)),
1254 (long) read_register (tdep->SR_REGNUM),
1255 (long) read_register (tdep->PR_REGNUM),
1256 (long) read_register (MACH_REGNUM),
1257 (long) read_register (MACL_REGNUM));
1258
1259 printf_filtered ("GBR=%08lx VBR=%08lx",
1260 (long) read_register (GBR_REGNUM),
1261 (long) read_register (VBR_REGNUM));
1262
1263 printf_filtered (" SSR=%08lx SPC=%08lx",
1264 (long) read_register (tdep->SSR_REGNUM),
1265 (long) read_register (tdep->SPC_REGNUM));
1266
1267 printf_filtered (" DSR=%08lx",
1268 (long) read_register (tdep->DSR_REGNUM));
1269
1270 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1271 (long) read_register (0),
1272 (long) read_register (1),
1273 (long) read_register (2),
1274 (long) read_register (3),
1275 (long) read_register (4),
1276 (long) read_register (5),
1277 (long) read_register (6),
1278 (long) read_register (7));
1279 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1280 (long) read_register (8),
1281 (long) read_register (9),
1282 (long) read_register (10),
1283 (long) read_register (11),
1284 (long) read_register (12),
1285 (long) read_register (13),
1286 (long) read_register (14),
1287 (long) read_register (15));
1288
1289 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1290 (long) read_register (tdep->A0G_REGNUM) & 0xff,
1291 (long) read_register (tdep->A0_REGNUM),
1292 (long) read_register (tdep->M0_REGNUM),
1293 (long) read_register (tdep->X0_REGNUM),
1294 (long) read_register (tdep->Y0_REGNUM),
1295 (long) read_register (tdep->RS_REGNUM),
1296 (long) read_register (tdep->MOD_REGNUM));
1297 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1298 (long) read_register (tdep->A1G_REGNUM) & 0xff,
1299 (long) read_register (tdep->A1_REGNUM),
1300 (long) read_register (tdep->M1_REGNUM),
1301 (long) read_register (tdep->X1_REGNUM),
1302 (long) read_register (tdep->Y1_REGNUM),
1303 (long) read_register (tdep->RE_REGNUM));
1304 }
1305
1306 static void
1307 sh4_show_regs (void)
1308 {
1309 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1310
1311 int pr = read_register (tdep->FPSCR_REGNUM) & 0x80000;
1312 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1313 paddr (read_register (PC_REGNUM)),
1314 (long) read_register (tdep->SR_REGNUM),
1315 (long) read_register (tdep->PR_REGNUM),
1316 (long) read_register (MACH_REGNUM),
1317 (long) read_register (MACL_REGNUM));
1318
1319 printf_filtered ("GBR=%08lx VBR=%08lx",
1320 (long) read_register (GBR_REGNUM),
1321 (long) read_register (VBR_REGNUM));
1322 printf_filtered (" SSR=%08lx SPC=%08lx",
1323 (long) read_register (tdep->SSR_REGNUM),
1324 (long) read_register (tdep->SPC_REGNUM));
1325 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1326 (long) read_register (tdep->FPUL_REGNUM),
1327 (long) read_register (tdep->FPSCR_REGNUM));
1328
1329 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1330 (long) read_register (0),
1331 (long) read_register (1),
1332 (long) read_register (2),
1333 (long) read_register (3),
1334 (long) read_register (4),
1335 (long) read_register (5),
1336 (long) read_register (6),
1337 (long) read_register (7));
1338 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1339 (long) read_register (8),
1340 (long) read_register (9),
1341 (long) read_register (10),
1342 (long) read_register (11),
1343 (long) read_register (12),
1344 (long) read_register (13),
1345 (long) read_register (14),
1346 (long) read_register (15));
1347
1348 printf_filtered ((pr
1349 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1350 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1351 (long) read_register (FP0_REGNUM + 0),
1352 (long) read_register (FP0_REGNUM + 1),
1353 (long) read_register (FP0_REGNUM + 2),
1354 (long) read_register (FP0_REGNUM + 3),
1355 (long) read_register (FP0_REGNUM + 4),
1356 (long) read_register (FP0_REGNUM + 5),
1357 (long) read_register (FP0_REGNUM + 6),
1358 (long) read_register (FP0_REGNUM + 7));
1359 printf_filtered ((pr
1360 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1361 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1362 (long) read_register (FP0_REGNUM + 8),
1363 (long) read_register (FP0_REGNUM + 9),
1364 (long) read_register (FP0_REGNUM + 10),
1365 (long) read_register (FP0_REGNUM + 11),
1366 (long) read_register (FP0_REGNUM + 12),
1367 (long) read_register (FP0_REGNUM + 13),
1368 (long) read_register (FP0_REGNUM + 14),
1369 (long) read_register (FP0_REGNUM + 15));
1370 }
1371
1372 static void
1373 sh_dsp_show_regs (void)
1374 {
1375 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1376
1377 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1378 paddr (read_register (PC_REGNUM)),
1379 (long) read_register (tdep->SR_REGNUM),
1380 (long) read_register (tdep->PR_REGNUM),
1381 (long) read_register (MACH_REGNUM),
1382 (long) read_register (MACL_REGNUM));
1383
1384 printf_filtered ("GBR=%08lx VBR=%08lx",
1385 (long) read_register (GBR_REGNUM),
1386 (long) read_register (VBR_REGNUM));
1387
1388 printf_filtered (" DSR=%08lx",
1389 (long) read_register (tdep->DSR_REGNUM));
1390
1391 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1392 (long) read_register (0),
1393 (long) read_register (1),
1394 (long) read_register (2),
1395 (long) read_register (3),
1396 (long) read_register (4),
1397 (long) read_register (5),
1398 (long) read_register (6),
1399 (long) read_register (7));
1400 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1401 (long) read_register (8),
1402 (long) read_register (9),
1403 (long) read_register (10),
1404 (long) read_register (11),
1405 (long) read_register (12),
1406 (long) read_register (13),
1407 (long) read_register (14),
1408 (long) read_register (15));
1409
1410 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1411 (long) read_register (tdep->A0G_REGNUM) & 0xff,
1412 (long) read_register (tdep->A0_REGNUM),
1413 (long) read_register (tdep->M0_REGNUM),
1414 (long) read_register (tdep->X0_REGNUM),
1415 (long) read_register (tdep->Y0_REGNUM),
1416 (long) read_register (tdep->RS_REGNUM),
1417 (long) read_register (tdep->MOD_REGNUM));
1418 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1419 (long) read_register (tdep->A1G_REGNUM) & 0xff,
1420 (long) read_register (tdep->A1_REGNUM),
1421 (long) read_register (tdep->M1_REGNUM),
1422 (long) read_register (tdep->X1_REGNUM),
1423 (long) read_register (tdep->Y1_REGNUM),
1424 (long) read_register (tdep->RE_REGNUM));
1425 }
1426
1427 void sh_show_regs_command (char *args, int from_tty)
1428 {
1429 if (sh_show_regs)
1430 (*sh_show_regs)();
1431 }
1432
1433 /* Index within `registers' of the first byte of the space for
1434 register N. */
1435 static int
1436 sh_default_register_byte (int reg_nr)
1437 {
1438 return (reg_nr * 4);
1439 }
1440
1441 static int
1442 sh_sh4_register_byte (int reg_nr)
1443 {
1444 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1445
1446 if (reg_nr >= tdep->DR0_REGNUM
1447 && reg_nr <= tdep->DR_LAST_REGNUM)
1448 return (dr_reg_base_num (reg_nr) * 4);
1449 else if (reg_nr >= tdep->FV0_REGNUM
1450 && reg_nr <= tdep->FV_LAST_REGNUM)
1451 return (fv_reg_base_num (reg_nr) * 4);
1452 else
1453 return (reg_nr * 4);
1454 }
1455
1456 /* Number of bytes of storage in the actual machine representation for
1457 register REG_NR. */
1458 static int
1459 sh_default_register_raw_size (int reg_nr)
1460 {
1461 return 4;
1462 }
1463
1464 static int
1465 sh_sh4_register_raw_size (int reg_nr)
1466 {
1467 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1468
1469 if (reg_nr >= tdep->DR0_REGNUM
1470 && reg_nr <= tdep->DR_LAST_REGNUM)
1471 return 8;
1472 else if (reg_nr >= tdep->FV0_REGNUM
1473 && reg_nr <= tdep->FV_LAST_REGNUM)
1474 return 16;
1475 else
1476 return 4;
1477 }
1478
1479 /* Number of bytes of storage in the program's representation
1480 for register N. */
1481 static int
1482 sh_register_virtual_size (int reg_nr)
1483 {
1484 return 4;
1485 }
1486
1487 /* Return the GDB type object for the "standard" data type
1488 of data in register N. */
1489 static struct type *
1490 sh_sh3e_register_virtual_type (int reg_nr)
1491 {
1492 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1493
1494 if ((reg_nr >= FP0_REGNUM
1495 && (reg_nr <= tdep->FP_LAST_REGNUM))
1496 || (reg_nr == tdep->FPUL_REGNUM))
1497 return builtin_type_float;
1498 else
1499 return builtin_type_int;
1500 }
1501
1502 static struct type *
1503 sh_sh4_build_float_register_type (int high)
1504 {
1505 struct type *temp;
1506
1507 temp = create_range_type (NULL, builtin_type_int, 0, high);
1508 return create_array_type (NULL, builtin_type_float, temp);
1509 }
1510
1511 static struct type *
1512 sh_sh4_register_virtual_type (int reg_nr)
1513 {
1514 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1515
1516 if ((reg_nr >= FP0_REGNUM
1517 && (reg_nr <= tdep->FP_LAST_REGNUM))
1518 || (reg_nr == tdep->FPUL_REGNUM))
1519 return builtin_type_float;
1520 else if (reg_nr >= tdep->DR0_REGNUM
1521 && reg_nr <= tdep->DR_LAST_REGNUM)
1522 return builtin_type_double;
1523 else if (reg_nr >= tdep->FV0_REGNUM
1524 && reg_nr <= tdep->FV_LAST_REGNUM)
1525 return sh_sh4_build_float_register_type (3);
1526 else
1527 return builtin_type_int;
1528 }
1529
1530 static struct type *
1531 sh_default_register_virtual_type (int reg_nr)
1532 {
1533 return builtin_type_int;
1534 }
1535
1536 /* On the sh4, the DRi pseudo registers are problematic if the target
1537 is little endian. When the user writes one of those registers, for
1538 instance with 'ser var $dr0=1', we want the double to be stored
1539 like this:
1540 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1541 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1542
1543 This corresponds to little endian byte order & big endian word
1544 order. However if we let gdb write the register w/o conversion, it
1545 will write fr0 and fr1 this way:
1546 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1547 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1548 because it will consider fr0 and fr1 as a single LE stretch of memory.
1549
1550 To achieve what we want we must force gdb to store things in
1551 floatformat_ieee_double_littlebyte_bigword (which is defined in
1552 include/floatformat.h and libiberty/floatformat.c.
1553
1554 In case the target is big endian, there is no problem, the
1555 raw bytes will look like:
1556 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1557 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1558
1559 The other pseudo registers (the FVs) also don't pose a problem
1560 because they are stored as 4 individual FP elements. */
1561
1562 static void
1563 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1564 char *from, char *to)
1565 {
1566 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1567
1568 if (regnum >= tdep->DR0_REGNUM
1569 && regnum <= tdep->DR_LAST_REGNUM)
1570 {
1571 DOUBLEST val;
1572 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1573 store_floating (to, TYPE_LENGTH (type), val);
1574 }
1575 else
1576 error ("sh_register_convert_to_virtual called with non DR register number");
1577 }
1578
1579 static void
1580 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1581 char *from, char *to)
1582 {
1583 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1584
1585 if (regnum >= tdep->DR0_REGNUM
1586 && regnum <= tdep->DR_LAST_REGNUM)
1587 {
1588 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1589 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1590 }
1591 else
1592 error("sh_register_convert_to_raw called with non DR register number");
1593 }
1594
1595 void
1596 sh_pseudo_register_read (int reg_nr, char *buffer)
1597 {
1598 int base_regnum, portion;
1599 char *temp_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE);
1600 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1601
1602 if (reg_nr >= tdep->DR0_REGNUM
1603 && reg_nr <= tdep->DR_LAST_REGNUM)
1604 {
1605 base_regnum = dr_reg_base_num (reg_nr);
1606
1607 /* Build the value in the provided buffer. */
1608 /* Read the real regs for which this one is an alias. */
1609 for (portion = 0; portion < 2; portion++)
1610 regcache_read (base_regnum + portion,
1611 temp_buffer
1612 + REGISTER_RAW_SIZE (base_regnum) * portion);
1613 /* We must pay attention to the endiannes. */
1614 sh_sh4_register_convert_to_virtual (reg_nr,
1615 REGISTER_VIRTUAL_TYPE (reg_nr),
1616 temp_buffer, buffer);
1617 }
1618 else if (reg_nr >= tdep->FV0_REGNUM
1619 && reg_nr <= tdep->FV_LAST_REGNUM)
1620 {
1621 base_regnum = fv_reg_base_num (reg_nr);
1622
1623 /* Read the real regs for which this one is an alias. */
1624 for (portion = 0; portion < 4; portion++)
1625 regcache_read (base_regnum + portion,
1626 buffer + REGISTER_RAW_SIZE (base_regnum) * portion);
1627 }
1628 }
1629
1630 static void
1631 sh4_register_read (struct gdbarch *gdbarch, int reg_nr, char *buffer)
1632 {
1633 if (reg_nr >= 0 && reg_nr < gdbarch_tdep (current_gdbarch)->DR0_REGNUM)
1634 /* It is a regular register. */
1635 regcache_read (reg_nr, buffer);
1636 else
1637 /* It is a pseudo register and we need to construct its value */
1638 sh_pseudo_register_read (reg_nr, buffer);
1639 }
1640
1641 void
1642 sh_pseudo_register_write (int reg_nr, char *buffer)
1643 {
1644 int base_regnum, portion;
1645 char *temp_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE);
1646 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1647
1648 if (reg_nr >= tdep->DR0_REGNUM
1649 && reg_nr <= tdep->DR_LAST_REGNUM)
1650 {
1651 base_regnum = dr_reg_base_num (reg_nr);
1652
1653 /* We must pay attention to the endiannes. */
1654 sh_sh4_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr), reg_nr,
1655 buffer, temp_buffer);
1656
1657 /* Write the real regs for which this one is an alias. */
1658 for (portion = 0; portion < 2; portion++)
1659 regcache_write (base_regnum + portion,
1660 temp_buffer + REGISTER_RAW_SIZE (base_regnum) * portion);
1661 }
1662 else if (reg_nr >= tdep->FV0_REGNUM
1663 && reg_nr <= tdep->FV_LAST_REGNUM)
1664 {
1665 base_regnum = fv_reg_base_num (reg_nr);
1666
1667 /* Write the real regs for which this one is an alias. */
1668 for (portion = 0; portion < 4; portion++)
1669 regcache_write (base_regnum + portion,
1670 buffer + REGISTER_RAW_SIZE (base_regnum) * portion);
1671 }
1672 }
1673
1674 static void
1675 sh4_register_write (struct gdbarch *gdbarch, int reg_nr, char *buffer)
1676 {
1677 if (reg_nr >= 0 && reg_nr < gdbarch_tdep (current_gdbarch)->DR0_REGNUM)
1678 /* It is a regular register. */
1679 regcache_write (reg_nr, buffer);
1680 else
1681 /* It is a pseudo register and we need to construct its value */
1682 sh_pseudo_register_write (reg_nr, buffer);
1683 }
1684
1685 /* Floating point vector of 4 float registers. */
1686 static void
1687 do_fv_register_info (int fv_regnum)
1688 {
1689 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1690 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1691 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1692 (int) read_register (first_fp_reg_num),
1693 (int) read_register (first_fp_reg_num + 1),
1694 (int) read_register (first_fp_reg_num + 2),
1695 (int) read_register (first_fp_reg_num + 3));
1696 }
1697
1698 /* Double precision registers. */
1699 static void
1700 do_dr_register_info (int dr_regnum)
1701 {
1702 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1703
1704 printf_filtered ("dr%d\t0x%08x%08x\n",
1705 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1706 (int) read_register (first_fp_reg_num),
1707 (int) read_register (first_fp_reg_num + 1));
1708 }
1709
1710 static void
1711 sh_do_pseudo_register (int regnum)
1712 {
1713 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1714
1715 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1716 internal_error (__FILE__, __LINE__,
1717 "Invalid pseudo register number %d\n", regnum);
1718 else if (regnum >= tdep->DR0_REGNUM
1719 && regnum < tdep->DR_LAST_REGNUM)
1720 do_dr_register_info (regnum);
1721 else if (regnum >= tdep->FV0_REGNUM
1722 && regnum <= tdep->FV_LAST_REGNUM)
1723 do_fv_register_info (regnum);
1724 }
1725
1726 static void
1727 sh_do_fp_register (int regnum)
1728 { /* do values for FP (float) regs */
1729 char *raw_buffer;
1730 double flt; /* double extracted from raw hex data */
1731 int inv;
1732 int j;
1733
1734 /* Allocate space for the float. */
1735 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1736
1737 /* Get the data in raw format. */
1738 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1739 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1740
1741 /* Get the register as a number */
1742 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1743
1744 /* Print the name and some spaces. */
1745 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1746 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1747
1748 /* Print the value. */
1749 if (inv)
1750 printf_filtered ("<invalid float>");
1751 else
1752 printf_filtered ("%-10.9g", flt);
1753
1754 /* Print the fp register as hex. */
1755 printf_filtered ("\t(raw 0x");
1756 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1757 {
1758 register int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j
1759 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1760 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1761 }
1762 printf_filtered (")");
1763 printf_filtered ("\n");
1764 }
1765
1766 static void
1767 sh_do_register (int regnum)
1768 {
1769 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1770
1771 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1772 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1773
1774 /* Get the data in raw format. */
1775 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1776 printf_filtered ("*value not available*\n");
1777
1778 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1779 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1780 printf_filtered ("\t");
1781 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1782 gdb_stdout, 0, 1, 0, Val_pretty_default);
1783 printf_filtered ("\n");
1784 }
1785
1786 static void
1787 sh_print_register (int regnum)
1788 {
1789 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1790 internal_error (__FILE__, __LINE__,
1791 "Invalid register number %d\n", regnum);
1792
1793 else if (regnum >= 0 && regnum < NUM_REGS)
1794 {
1795 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1796 sh_do_fp_register (regnum); /* FP regs */
1797 else
1798 sh_do_register (regnum); /* All other regs */
1799 }
1800
1801 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1802 do_pseudo_register (regnum);
1803 }
1804
1805 void
1806 sh_do_registers_info (int regnum, int fpregs)
1807 {
1808 if (regnum != -1) /* do one specified register */
1809 {
1810 if (*(REGISTER_NAME (regnum)) == '\0')
1811 error ("Not a valid register for the current processor type");
1812
1813 sh_print_register (regnum);
1814 }
1815 else
1816 /* do all (or most) registers */
1817 {
1818 regnum = 0;
1819 while (regnum < NUM_REGS)
1820 {
1821 /* If the register name is empty, it is undefined for this
1822 processor, so don't display anything. */
1823 if (REGISTER_NAME (regnum) == NULL
1824 || *(REGISTER_NAME (regnum)) == '\0')
1825 {
1826 regnum++;
1827 continue;
1828 }
1829
1830 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1831 {
1832 if (fpregs)
1833 {
1834 /* true for "INFO ALL-REGISTERS" command */
1835 sh_do_fp_register (regnum); /* FP regs */
1836 regnum ++;
1837 }
1838 else
1839 regnum += (gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */
1840 }
1841 else
1842 {
1843 sh_do_register (regnum); /* All other regs */
1844 regnum++;
1845 }
1846 }
1847
1848 if (fpregs)
1849 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1850 {
1851 do_pseudo_register (regnum);
1852 regnum++;
1853 }
1854 }
1855 }
1856
1857 #ifdef SVR4_SHARED_LIBS
1858
1859 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1860 for native i386 linux targets using the struct offsets defined in
1861 link.h (but without actual reference to that file).
1862
1863 This makes it possible to access i386-linux shared libraries from
1864 a gdb that was not built on an i386-linux host (for cross debugging).
1865 */
1866
1867 struct link_map_offsets *
1868 sh_linux_svr4_fetch_link_map_offsets (void)
1869 {
1870 static struct link_map_offsets lmo;
1871 static struct link_map_offsets *lmp = 0;
1872
1873 if (lmp == 0)
1874 {
1875 lmp = &lmo;
1876
1877 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1878
1879 lmo.r_map_offset = 4;
1880 lmo.r_map_size = 4;
1881
1882 lmo.link_map_size = 20; /* 552 not actual size but all we need */
1883
1884 lmo.l_addr_offset = 0;
1885 lmo.l_addr_size = 4;
1886
1887 lmo.l_name_offset = 4;
1888 lmo.l_name_size = 4;
1889
1890 lmo.l_next_offset = 12;
1891 lmo.l_next_size = 4;
1892
1893 lmo.l_prev_offset = 16;
1894 lmo.l_prev_size = 4;
1895 }
1896
1897 return lmp;
1898 }
1899 #endif /* SVR4_SHARED_LIBS */
1900
1901 static gdbarch_init_ftype sh_gdbarch_init;
1902
1903 static struct gdbarch *
1904 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1905 {
1906 static LONGEST sh_call_dummy_words[] = {0};
1907 struct gdbarch *gdbarch;
1908 struct gdbarch_tdep *tdep;
1909 gdbarch_register_name_ftype *sh_register_name;
1910 gdbarch_store_return_value_ftype *sh_store_return_value;
1911 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1912
1913 /* Find a candidate among the list of pre-declared architectures. */
1914 arches = gdbarch_list_lookup_by_info (arches, &info);
1915 if (arches != NULL)
1916 return arches->gdbarch;
1917
1918 /* None found, create a new architecture from the information
1919 provided. */
1920 tdep = XMALLOC (struct gdbarch_tdep);
1921 gdbarch = gdbarch_alloc (&info, tdep);
1922
1923 /* Initialize the register numbers that are not common to all the
1924 variants to -1, if necessary thse will be overwritten in the case
1925 statement below. */
1926 tdep->FPUL_REGNUM = -1;
1927 tdep->FPSCR_REGNUM = -1;
1928 tdep->PR_REGNUM = 17;
1929 tdep->SR_REGNUM = 22;
1930 tdep->DSR_REGNUM = -1;
1931 tdep->FP_LAST_REGNUM = -1;
1932 tdep->A0G_REGNUM = -1;
1933 tdep->A0_REGNUM = -1;
1934 tdep->A1G_REGNUM = -1;
1935 tdep->A1_REGNUM = -1;
1936 tdep->M0_REGNUM = -1;
1937 tdep->M1_REGNUM = -1;
1938 tdep->X0_REGNUM = -1;
1939 tdep->X1_REGNUM = -1;
1940 tdep->Y0_REGNUM = -1;
1941 tdep->Y1_REGNUM = -1;
1942 tdep->MOD_REGNUM = -1;
1943 tdep->RS_REGNUM = -1;
1944 tdep->RE_REGNUM = -1;
1945 tdep->SSR_REGNUM = -1;
1946 tdep->SPC_REGNUM = -1;
1947 tdep->DR0_REGNUM = -1;
1948 tdep->DR_LAST_REGNUM = -1;
1949 tdep->FV0_REGNUM = -1;
1950 tdep->FV_LAST_REGNUM = -1;
1951 tdep->ARG0_REGNUM = 4;
1952 tdep->ARGLAST_REGNUM = 7;
1953 tdep->RETURN_REGNUM = 0;
1954 tdep->FLOAT_ARGLAST_REGNUM = -1;
1955
1956 set_gdbarch_fp0_regnum (gdbarch, -1);
1957 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1958 set_gdbarch_max_register_raw_size (gdbarch, 4);
1959 set_gdbarch_max_register_virtual_size (gdbarch, 4);
1960 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1961 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1962 set_gdbarch_num_regs (gdbarch, SH_DEFAULT_NUM_REGS);
1963 set_gdbarch_sp_regnum (gdbarch, 15);
1964 set_gdbarch_fp_regnum (gdbarch, 14);
1965 set_gdbarch_pc_regnum (gdbarch, 16);
1966 set_gdbarch_register_size (gdbarch, 4);
1967 set_gdbarch_register_bytes (gdbarch, SH_DEFAULT_NUM_REGS * 4);
1968 set_gdbarch_do_registers_info (gdbarch, sh_do_registers_info);
1969 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
1970 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
1971 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1972 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
1973 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
1974 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
1975 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
1976 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
1977 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
1978 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
1979 set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh);
1980 skip_prologue_hard_way = sh_skip_prologue_hard_way;
1981 do_pseudo_register = sh_do_pseudo_register;
1982
1983 switch (info.bfd_arch_info->mach)
1984 {
1985 case bfd_mach_sh:
1986 sh_register_name = sh_sh_register_name;
1987 sh_show_regs = sh_generic_show_regs;
1988 sh_store_return_value = sh_default_store_return_value;
1989 sh_register_virtual_type = sh_default_register_virtual_type;
1990 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1991 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1992 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1993 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1994 break;
1995 case bfd_mach_sh2:
1996 sh_register_name = sh_sh_register_name;
1997 sh_show_regs = sh_generic_show_regs;
1998 sh_store_return_value = sh_default_store_return_value;
1999 sh_register_virtual_type = sh_default_register_virtual_type;
2000 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2001 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2002 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2003 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2004 break;
2005 case bfd_mach_sh_dsp:
2006 sh_register_name = sh_sh_dsp_register_name;
2007 sh_show_regs = sh_dsp_show_regs;
2008 sh_store_return_value = sh_default_store_return_value;
2009 sh_register_virtual_type = sh_default_register_virtual_type;
2010 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2011 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2012 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2013 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2014 tdep->DSR_REGNUM = 24;
2015 tdep->A0G_REGNUM = 25;
2016 tdep->A0_REGNUM = 26;
2017 tdep->A1G_REGNUM = 27;
2018 tdep->A1_REGNUM = 28;
2019 tdep->M0_REGNUM = 29;
2020 tdep->M1_REGNUM = 30;
2021 tdep->X0_REGNUM = 31;
2022 tdep->X1_REGNUM = 32;
2023 tdep->Y0_REGNUM = 33;
2024 tdep->Y1_REGNUM = 34;
2025 tdep->MOD_REGNUM = 40;
2026 tdep->RS_REGNUM = 43;
2027 tdep->RE_REGNUM = 44;
2028 break;
2029 case bfd_mach_sh3:
2030 sh_register_name = sh_sh3_register_name;
2031 sh_show_regs = sh3_show_regs;
2032 sh_store_return_value = sh_default_store_return_value;
2033 sh_register_virtual_type = sh_default_register_virtual_type;
2034 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2035 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2036 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2037 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2038 tdep->SSR_REGNUM = 41;
2039 tdep->SPC_REGNUM = 42;
2040 break;
2041 case bfd_mach_sh3e:
2042 sh_register_name = sh_sh3e_register_name;
2043 sh_show_regs = sh3e_show_regs;
2044 sh_store_return_value = sh3e_sh4_store_return_value;
2045 sh_register_virtual_type = sh_sh3e_register_virtual_type;
2046 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2047 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2048 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2049 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2050 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2051 set_gdbarch_fp0_regnum (gdbarch, 25);
2052 tdep->FPUL_REGNUM = 23;
2053 tdep->FPSCR_REGNUM = 24;
2054 tdep->FP_LAST_REGNUM = 40;
2055 tdep->SSR_REGNUM = 41;
2056 tdep->SPC_REGNUM = 42;
2057 break;
2058 case bfd_mach_sh3_dsp:
2059 sh_register_name = sh_sh3_dsp_register_name;
2060 sh_show_regs = sh3_dsp_show_regs;
2061 sh_store_return_value = sh_default_store_return_value;
2062 sh_register_virtual_type = sh_default_register_virtual_type;
2063 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2064 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2065 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2066 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2067 tdep->DSR_REGNUM = 24;
2068 tdep->A0G_REGNUM = 25;
2069 tdep->A0_REGNUM = 26;
2070 tdep->A1G_REGNUM = 27;
2071 tdep->A1_REGNUM = 28;
2072 tdep->M0_REGNUM = 29;
2073 tdep->M1_REGNUM = 30;
2074 tdep->X0_REGNUM = 31;
2075 tdep->X1_REGNUM = 32;
2076 tdep->Y0_REGNUM = 33;
2077 tdep->Y1_REGNUM = 34;
2078 tdep->MOD_REGNUM = 40;
2079 tdep->RS_REGNUM = 43;
2080 tdep->RE_REGNUM = 44;
2081 tdep->SSR_REGNUM = 41;
2082 tdep->SPC_REGNUM = 42;
2083 break;
2084 case bfd_mach_sh4:
2085 sh_register_name = sh_sh4_register_name;
2086 sh_show_regs = sh4_show_regs;
2087 sh_store_return_value = sh3e_sh4_store_return_value;
2088 sh_register_virtual_type = sh_sh4_register_virtual_type;
2089 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2090 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2091 set_gdbarch_fp0_regnum (gdbarch, 25);
2092 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
2093 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
2094 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
2095 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2096 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
2097 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
2098 set_gdbarch_register_read (gdbarch, sh4_register_read);
2099 set_gdbarch_register_write (gdbarch, sh4_register_write);
2100 tdep->FPUL_REGNUM = 23;
2101 tdep->FPSCR_REGNUM = 24;
2102 tdep->FP_LAST_REGNUM = 40;
2103 tdep->SSR_REGNUM = 41;
2104 tdep->SPC_REGNUM = 42;
2105 tdep->DR0_REGNUM = 59;
2106 tdep->DR_LAST_REGNUM = 66;
2107 tdep->FV0_REGNUM = 67;
2108 tdep->FV_LAST_REGNUM = 70;
2109 break;
2110 default:
2111 sh_register_name = sh_generic_register_name;
2112 sh_show_regs = sh_generic_show_regs;
2113 sh_store_return_value = sh_default_store_return_value;
2114 sh_register_virtual_type = sh_default_register_virtual_type;
2115 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2116 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2117 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2118 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2119 break;
2120 }
2121
2122 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2123 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2124 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2125 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2126 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2127 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2128
2129 set_gdbarch_register_name (gdbarch, sh_register_name);
2130 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2131
2132 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2133 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2134 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2135 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2136 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2137 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);/*??should be 8?*/
2138
2139 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2140 set_gdbarch_call_dummy_length (gdbarch, 0);
2141 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2142 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2143 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2144 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2145 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2146 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2147 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2148 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2149 set_gdbarch_call_dummy_p (gdbarch, 1);
2150 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2151 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2152 set_gdbarch_coerce_float_to_double (gdbarch,
2153 sh_coerce_float_to_double);
2154
2155 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2156 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2157
2158 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2159 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2160 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2161 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2162 set_gdbarch_function_start_offset (gdbarch, 0);
2163
2164 set_gdbarch_frame_args_skip (gdbarch, 0);
2165 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2166 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2167 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2168 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
2169 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
2170 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2171 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2172 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2173
2174 return gdbarch;
2175 }
2176
2177 void
2178 _initialize_sh_tdep (void)
2179 {
2180 struct cmd_list_element *c;
2181
2182 register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2183
2184 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2185 }
GDB Binutils - Deliverables
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