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* Makefile.in (ALLDEPFILES): Add sh64-tdep.c.
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "symtab.h"
30 #include "symfile.h"
31 #include "gdbtypes.h"
32 #include "gdbcmd.h"
33 #include "gdbcore.h"
34 #include "value.h"
35 #include "dis-asm.h"
36 #include "inferior.h"
37 #include "gdb_string.h"
38 #include "arch-utils.h"
39 #include "floatformat.h"
40 #include "regcache.h"
41 #include "doublest.h"
42 #include "osabi.h"
43
44 #include "sh-tdep.h"
45
46 #include "elf-bfd.h"
47 #include "solib-svr4.h"
48
49 /* sh flags */
50 #include "elf/sh.h"
51 /* registers numbers shared with the simulator */
52 #include "gdb/sim-sh.h"
53
54 static void (*sh_show_regs) (void);
55
56 #define SH_DEFAULT_NUM_REGS 59
57
58 /* Define other aspects of the stack frame.
59 we keep a copy of the worked out return pc lying around, since it
60 is a useful bit of info */
61
62 struct frame_extra_info
63 {
64 CORE_ADDR return_pc;
65 int leaf_function;
66 int f_offset;
67 };
68
69 static const char *
70 sh_generic_register_name (int reg_nr)
71 {
72 static char *register_names[] =
73 {
74 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
75 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
76 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
77 "fpul", "fpscr",
78 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
79 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
80 "ssr", "spc",
81 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
82 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
83 };
84 if (reg_nr < 0)
85 return NULL;
86 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
87 return NULL;
88 return register_names[reg_nr];
89 }
90
91 static const char *
92 sh_sh_register_name (int reg_nr)
93 {
94 static char *register_names[] =
95 {
96 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
97 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
98 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
99 "", "",
100 "", "", "", "", "", "", "", "",
101 "", "", "", "", "", "", "", "",
102 "", "",
103 "", "", "", "", "", "", "", "",
104 "", "", "", "", "", "", "", "",
105 };
106 if (reg_nr < 0)
107 return NULL;
108 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
109 return NULL;
110 return register_names[reg_nr];
111 }
112
113 static const char *
114 sh_sh3_register_name (int reg_nr)
115 {
116 static char *register_names[] =
117 {
118 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
119 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
120 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
121 "", "",
122 "", "", "", "", "", "", "", "",
123 "", "", "", "", "", "", "", "",
124 "ssr", "spc",
125 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
126 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
127 };
128 if (reg_nr < 0)
129 return NULL;
130 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
131 return NULL;
132 return register_names[reg_nr];
133 }
134
135 static const char *
136 sh_sh3e_register_name (int reg_nr)
137 {
138 static char *register_names[] =
139 {
140 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
143 "fpul", "fpscr",
144 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
145 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
146 "ssr", "spc",
147 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
148 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
149 };
150 if (reg_nr < 0)
151 return NULL;
152 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
153 return NULL;
154 return register_names[reg_nr];
155 }
156
157 static const char *
158 sh_sh2e_register_name (int reg_nr)
159 {
160 static char *register_names[] =
161 {
162 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
163 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
164 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
165 "fpul", "fpscr",
166 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
167 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
168 "", "",
169 "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "",
171 };
172 if (reg_nr < 0)
173 return NULL;
174 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
175 return NULL;
176 return register_names[reg_nr];
177 }
178
179 static const char *
180 sh_sh_dsp_register_name (int reg_nr)
181 {
182 static char *register_names[] =
183 {
184 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
185 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
186 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
187 "", "dsr",
188 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
189 "y0", "y1", "", "", "", "", "", "mod",
190 "", "",
191 "rs", "re", "", "", "", "", "", "",
192 "", "", "", "", "", "", "", "",
193 };
194 if (reg_nr < 0)
195 return NULL;
196 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
197 return NULL;
198 return register_names[reg_nr];
199 }
200
201 static const char *
202 sh_sh3_dsp_register_name (int reg_nr)
203 {
204 static char *register_names[] =
205 {
206 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
207 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
208 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
209 "", "dsr",
210 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
211 "y0", "y1", "", "", "", "", "", "mod",
212 "ssr", "spc",
213 "rs", "re", "", "", "", "", "", "",
214 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
215 "", "", "", "", "", "", "", "",
216 };
217 if (reg_nr < 0)
218 return NULL;
219 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
220 return NULL;
221 return register_names[reg_nr];
222 }
223
224 static const char *
225 sh_sh4_register_name (int reg_nr)
226 {
227 static char *register_names[] =
228 {
229 /* general registers 0-15 */
230 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
231 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
232 /* 16 - 22 */
233 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
234 /* 23, 24 */
235 "fpul", "fpscr",
236 /* floating point registers 25 - 40 */
237 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
238 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
239 /* 41, 42 */
240 "ssr", "spc",
241 /* bank 0 43 - 50 */
242 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
243 /* bank 1 51 - 58 */
244 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
245 /* double precision (pseudo) 59 - 66 */
246 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
247 /* vectors (pseudo) 67 - 70 */
248 "fv0", "fv4", "fv8", "fv12",
249 /* FIXME: missing XF 71 - 86 */
250 /* FIXME: missing XD 87 - 94 */
251 };
252 if (reg_nr < 0)
253 return NULL;
254 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
255 return NULL;
256 return register_names[reg_nr];
257 }
258
259 #define NUM_PSEUDO_REGS_SH_MEDIA 80
260 #define NUM_PSEUDO_REGS_SH_COMPACT 51
261
262 static const unsigned char *
263 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
264 {
265 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
266 static unsigned char breakpoint[] = {0xc3, 0xc3};
267
268 *lenptr = sizeof (breakpoint);
269 return breakpoint;
270 }
271
272 static CORE_ADDR
273 sh_push_dummy_code (struct gdbarch *gdbarch,
274 CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
275 struct value **args, int nargs,
276 struct type *value_type,
277 CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
278 {
279 /* Allocate space sufficient for a breakpoint. */
280 sp = (sp - 2) & ~1;
281 /* Store the address of that breakpoint */
282 *bp_addr = sp;
283 /* sh always starts the call at the callee's entry point. */
284 *real_pc = funaddr;
285 return sp;
286 }
287
288 /* Prologue looks like
289 [mov.l <regs>,@-r15]...
290 [sts.l pr,@-r15]
291 [mov.l r14,@-r15]
292 [mov r15,r14]
293
294 Actually it can be more complicated than this. For instance, with
295 newer gcc's:
296
297 mov.l r14,@-r15
298 add #-12,r15
299 mov r15,r14
300 mov r4,r1
301 mov r5,r2
302 mov.l r6,@(4,r14)
303 mov.l r7,@(8,r14)
304 mov.b r1,@r14
305 mov r14,r1
306 mov r14,r1
307 add #2,r1
308 mov.w r2,@r1
309
310 */
311
312 /* STS.L PR,@-r15 0100111100100010
313 r15-4-->r15, PR-->(r15) */
314 #define IS_STS(x) ((x) == 0x4f22)
315
316 /* MOV.L Rm,@-r15 00101111mmmm0110
317 r15-4-->r15, Rm-->(R15) */
318 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
319
320 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
321
322 /* MOV r15,r14 0110111011110011
323 r15-->r14 */
324 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
325
326 /* ADD #imm,r15 01111111iiiiiiii
327 r15+imm-->r15 */
328 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
329
330 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
331 #define IS_SHLL_R3(x) ((x) == 0x4300)
332
333 /* ADD r3,r15 0011111100111100
334 r15+r3-->r15 */
335 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
336
337 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
338 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
339 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
340 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
341
342 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
343 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
344 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
345 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
346 #define IS_ARG_MOV(x) \
347 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
348 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
349 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
350
351 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
352 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
353 #define IS_MOV_TO_R14(x) \
354 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
355
356 #define FPSCR_SZ (1 << 20)
357
358 /* Skip any prologue before the guts of a function */
359
360 /* Skip the prologue using the debug information. If this fails we'll
361 fall back on the 'guess' method below. */
362 static CORE_ADDR
363 after_prologue (CORE_ADDR pc)
364 {
365 struct symtab_and_line sal;
366 CORE_ADDR func_addr, func_end;
367
368 /* If we can not find the symbol in the partial symbol table, then
369 there is no hope we can determine the function's start address
370 with this code. */
371 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
372 return 0;
373
374 /* Get the line associated with FUNC_ADDR. */
375 sal = find_pc_line (func_addr, 0);
376
377 /* There are only two cases to consider. First, the end of the source line
378 is within the function bounds. In that case we return the end of the
379 source line. Second is the end of the source line extends beyond the
380 bounds of the current function. We need to use the slow code to
381 examine instructions in that case. */
382 if (sal.end < func_end)
383 return sal.end;
384 else
385 return 0;
386 }
387
388 /* Here we look at each instruction in the function, and try to guess
389 where the prologue ends. Unfortunately this is not always
390 accurate. */
391 static CORE_ADDR
392 sh_skip_prologue_hard_way (CORE_ADDR start_pc)
393 {
394 CORE_ADDR here, end;
395 int updated_fp = 0;
396
397 if (!start_pc)
398 return 0;
399
400 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
401 {
402 int w = read_memory_integer (here, 2);
403 here += 2;
404 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
405 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
406 || IS_ARG_MOV (w) || IS_MOV_TO_R14 (w))
407 {
408 start_pc = here;
409 }
410 else if (IS_MOV_SP_FP (w))
411 {
412 start_pc = here;
413 updated_fp = 1;
414 }
415 else
416 /* Don't bail out yet, if we are before the copy of sp. */
417 if (updated_fp)
418 break;
419 }
420
421 return start_pc;
422 }
423
424 static CORE_ADDR
425 sh_skip_prologue (CORE_ADDR pc)
426 {
427 CORE_ADDR post_prologue_pc;
428
429 /* See if we can determine the end of the prologue via the symbol table.
430 If so, then return either PC, or the PC after the prologue, whichever
431 is greater. */
432 post_prologue_pc = after_prologue (pc);
433
434 /* If after_prologue returned a useful address, then use it. Else
435 fall back on the instruction skipping code. */
436 if (post_prologue_pc != 0)
437 return max (pc, post_prologue_pc);
438 else
439 return sh_skip_prologue_hard_way (pc);
440 }
441
442 /* Immediately after a function call, return the saved pc.
443 Can't always go through the frames for this because on some machines
444 the new frame is not set up until the new function executes
445 some instructions.
446
447 The return address is the value saved in the PR register + 4 */
448 static CORE_ADDR
449 sh_saved_pc_after_call (struct frame_info *frame)
450 {
451 return (ADDR_BITS_REMOVE (read_register (PR_REGNUM)));
452 }
453
454 /* Should call_function allocate stack space for a struct return? */
455 static int
456 sh_use_struct_convention (int gcc_p, struct type *type)
457 {
458 #if 0
459 return (TYPE_LENGTH (type) > 1);
460 #else
461 int len = TYPE_LENGTH (type);
462 int nelem = TYPE_NFIELDS (type);
463 return ((len != 1 && len != 2 && len != 4 && len != 8) || nelem != 1) &&
464 (len != 8 || TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) != 4);
465 #endif
466 }
467
468 /* Disassemble an instruction. */
469 static int
470 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
471 {
472 info->endian = TARGET_BYTE_ORDER;
473 return print_insn_sh (memaddr, info);
474 }
475
476 /* Given a GDB frame, determine the address of the calling function's
477 frame. This will be used to create a new GDB frame struct, and
478 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
479 will be called for the new frame.
480
481 For us, the frame address is its stack pointer value, so we look up
482 the function prologue to determine the caller's sp value, and return it. */
483 static CORE_ADDR
484 sh_frame_chain (struct frame_info *frame)
485 {
486 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
487 get_frame_base (frame),
488 get_frame_base (frame)))
489 return get_frame_base (frame); /* dummy frame same as caller's frame */
490 if (get_frame_pc (frame) && !inside_entry_file (get_frame_pc (frame)))
491 return read_memory_integer (get_frame_base (frame)
492 + get_frame_extra_info (frame)->f_offset, 4);
493 else
494 return 0;
495 }
496
497 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
498 we might want to do here is to check REGNUM against the clobber mask, and
499 somehow flag it as invalid if it isn't saved on the stack somewhere. This
500 would provide a graceful failure mode when trying to get the value of
501 caller-saves registers for an inner frame. */
502 static CORE_ADDR
503 sh_find_callers_reg (struct frame_info *fi, int regnum)
504 {
505 for (; fi; fi = get_next_frame (fi))
506 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
507 get_frame_base (fi)))
508 /* When the caller requests PR from the dummy frame, we return PC because
509 that's where the previous routine appears to have done a call from. */
510 return deprecated_read_register_dummy (get_frame_pc (fi),
511 get_frame_base (fi), regnum);
512 else
513 {
514 DEPRECATED_FRAME_INIT_SAVED_REGS (fi);
515 if (!get_frame_pc (fi))
516 return 0;
517 if (get_frame_saved_regs (fi)[regnum] != 0)
518 return read_memory_integer (get_frame_saved_regs (fi)[regnum],
519 register_size (current_gdbarch, regnum));
520 }
521 return read_register (regnum);
522 }
523
524 /* Put here the code to store, into a struct frame_saved_regs, the
525 addresses of the saved registers of frame described by FRAME_INFO.
526 This includes special registers such as pc and fp saved in special
527 ways in the stack frame. sp is even more special: the address we
528 return for it IS the sp for the next frame. */
529 static void
530 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
531 {
532 int *where = (int *) alloca ((NUM_REGS + NUM_PSEUDO_REGS) * sizeof(int));
533 int rn;
534 int have_fp = 0;
535 int depth;
536 int pc;
537 int opc;
538 int insn;
539 int r3_val = 0;
540 char *dummy_regs = deprecated_generic_find_dummy_frame (get_frame_pc (fi),
541 get_frame_base (fi));
542
543 if (get_frame_saved_regs (fi) == NULL)
544 frame_saved_regs_zalloc (fi);
545 else
546 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
547
548 if (dummy_regs)
549 {
550 /* DANGER! This is ONLY going to work if the char buffer format of
551 the saved registers is byte-for-byte identical to the
552 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
553 memcpy (get_frame_saved_regs (fi), dummy_regs, SIZEOF_FRAME_SAVED_REGS);
554 return;
555 }
556
557 get_frame_extra_info (fi)->leaf_function = 1;
558 get_frame_extra_info (fi)->f_offset = 0;
559
560 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
561 where[rn] = -1;
562
563 depth = 0;
564
565 /* Loop around examining the prologue insns until we find something
566 that does not appear to be part of the prologue. But give up
567 after 20 of them, since we're getting silly then. */
568
569 pc = get_frame_func (fi);
570 if (!pc)
571 {
572 deprecated_update_frame_pc_hack (fi, 0);
573 return;
574 }
575
576 for (opc = pc + (2 * 28); pc < opc; pc += 2)
577 {
578 insn = read_memory_integer (pc, 2);
579 /* See where the registers will be saved to */
580 if (IS_PUSH (insn))
581 {
582 rn = GET_PUSHED_REG (insn);
583 where[rn] = depth;
584 depth += 4;
585 }
586 else if (IS_STS (insn))
587 {
588 where[PR_REGNUM] = depth;
589 /* If we're storing the pr then this isn't a leaf */
590 get_frame_extra_info (fi)->leaf_function = 0;
591 depth += 4;
592 }
593 else if (IS_MOV_R3 (insn))
594 {
595 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
596 }
597 else if (IS_SHLL_R3 (insn))
598 {
599 r3_val <<= 1;
600 }
601 else if (IS_ADD_R3SP (insn))
602 {
603 depth += -r3_val;
604 }
605 else if (IS_ADD_SP (insn))
606 {
607 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
608 }
609 else if (IS_MOV_SP_FP (insn))
610 break;
611 #if 0 /* This used to just stop when it found an instruction that
612 was not considered part of the prologue. Now, we just
613 keep going looking for likely instructions. */
614 else
615 break;
616 #endif
617 }
618
619 /* Now we know how deep things are, we can work out their addresses */
620
621 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
622 {
623 if (where[rn] >= 0)
624 {
625 if (rn == DEPRECATED_FP_REGNUM)
626 have_fp = 1;
627
628 get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - where[rn] + depth - 4;
629 }
630 else
631 {
632 get_frame_saved_regs (fi)[rn] = 0;
633 }
634 }
635
636 if (have_fp)
637 {
638 get_frame_saved_regs (fi)[SP_REGNUM] = read_memory_integer (get_frame_saved_regs (fi)[DEPRECATED_FP_REGNUM], 4);
639 }
640 else
641 {
642 get_frame_saved_regs (fi)[SP_REGNUM] = get_frame_base (fi) - 4;
643 }
644
645 get_frame_extra_info (fi)->f_offset = depth - where[DEPRECATED_FP_REGNUM] - 4;
646 /* Work out the return pc - either from the saved pr or the pr
647 value */
648 }
649
650 /* For vectors of 4 floating point registers. */
651 static int
652 fv_reg_base_num (int fv_regnum)
653 {
654 int fp_regnum;
655
656 fp_regnum = FP0_REGNUM +
657 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
658 return fp_regnum;
659 }
660
661 /* For double precision floating point registers, i.e 2 fp regs.*/
662 static int
663 dr_reg_base_num (int dr_regnum)
664 {
665 int fp_regnum;
666
667 fp_regnum = FP0_REGNUM +
668 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
669 return fp_regnum;
670 }
671
672 static void
673 sh_fp_frame_init_saved_regs (struct frame_info *fi)
674 {
675 int *where = (int *) alloca ((NUM_REGS + NUM_PSEUDO_REGS) * sizeof (int));
676 int rn;
677 int have_fp = 0;
678 int depth;
679 int pc;
680 int opc;
681 int insn;
682 int r3_val = 0;
683 char *dummy_regs = deprecated_generic_find_dummy_frame (get_frame_pc (fi), get_frame_base (fi));
684 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
685
686 if (get_frame_saved_regs (fi) == NULL)
687 frame_saved_regs_zalloc (fi);
688 else
689 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
690
691 if (dummy_regs)
692 {
693 /* DANGER! This is ONLY going to work if the char buffer format of
694 the saved registers is byte-for-byte identical to the
695 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
696 memcpy (get_frame_saved_regs (fi), dummy_regs, SIZEOF_FRAME_SAVED_REGS);
697 return;
698 }
699
700 get_frame_extra_info (fi)->leaf_function = 1;
701 get_frame_extra_info (fi)->f_offset = 0;
702
703 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
704 where[rn] = -1;
705
706 depth = 0;
707
708 /* Loop around examining the prologue insns until we find something
709 that does not appear to be part of the prologue. But give up
710 after 20 of them, since we're getting silly then. */
711
712 pc = get_frame_func (fi);
713 if (!pc)
714 {
715 deprecated_update_frame_pc_hack (fi, 0);
716 return;
717 }
718
719 for (opc = pc + (2 * 28); pc < opc; pc += 2)
720 {
721 insn = read_memory_integer (pc, 2);
722 /* See where the registers will be saved to */
723 if (IS_PUSH (insn))
724 {
725 rn = GET_PUSHED_REG (insn);
726 where[rn] = depth;
727 depth += 4;
728 }
729 else if (IS_STS (insn))
730 {
731 where[PR_REGNUM] = depth;
732 /* If we're storing the pr then this isn't a leaf */
733 get_frame_extra_info (fi)->leaf_function = 0;
734 depth += 4;
735 }
736 else if (IS_MOV_R3 (insn))
737 {
738 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
739 }
740 else if (IS_SHLL_R3 (insn))
741 {
742 r3_val <<= 1;
743 }
744 else if (IS_ADD_R3SP (insn))
745 {
746 depth += -r3_val;
747 }
748 else if (IS_ADD_SP (insn))
749 {
750 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
751 }
752 else if (IS_FMOV (insn))
753 {
754 if (read_register (tdep->FPSCR_REGNUM) & FPSCR_SZ)
755 {
756 depth += 8;
757 }
758 else
759 {
760 depth += 4;
761 }
762 }
763 else if (IS_MOV_SP_FP (insn))
764 break;
765 #if 0 /* This used to just stop when it found an instruction that
766 was not considered part of the prologue. Now, we just
767 keep going looking for likely instructions. */
768 else
769 break;
770 #endif
771 }
772
773 /* Now we know how deep things are, we can work out their addresses */
774
775 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
776 {
777 if (where[rn] >= 0)
778 {
779 if (rn == DEPRECATED_FP_REGNUM)
780 have_fp = 1;
781
782 get_frame_saved_regs (fi)[rn] = get_frame_base (fi) - where[rn] + depth - 4;
783 }
784 else
785 {
786 get_frame_saved_regs (fi)[rn] = 0;
787 }
788 }
789
790 if (have_fp)
791 {
792 get_frame_saved_regs (fi)[SP_REGNUM] =
793 read_memory_integer (get_frame_saved_regs (fi)[DEPRECATED_FP_REGNUM], 4);
794 }
795 else
796 {
797 get_frame_saved_regs (fi)[SP_REGNUM] = get_frame_base (fi) - 4;
798 }
799
800 get_frame_extra_info (fi)->f_offset = depth - where[DEPRECATED_FP_REGNUM] - 4;
801 /* Work out the return pc - either from the saved pr or the pr
802 value */
803 }
804
805 /* Initialize the extra info saved in a FRAME */
806 static void
807 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
808 {
809
810 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
811
812 if (get_next_frame (fi))
813 deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi)));
814
815 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi), get_frame_base (fi),
816 get_frame_base (fi)))
817 {
818 /* We need to setup fi->frame here because call_function_by_hand
819 gets it wrong by assuming it's always FP. */
820 deprecated_update_frame_base_hack (fi, deprecated_read_register_dummy (get_frame_pc (fi), get_frame_base (fi),
821 SP_REGNUM));
822 get_frame_extra_info (fi)->return_pc = deprecated_read_register_dummy (get_frame_pc (fi),
823 get_frame_base (fi),
824 PC_REGNUM);
825 get_frame_extra_info (fi)->f_offset = -(DEPRECATED_CALL_DUMMY_LENGTH + 4);
826 get_frame_extra_info (fi)->leaf_function = 0;
827 return;
828 }
829 else
830 {
831 DEPRECATED_FRAME_INIT_SAVED_REGS (fi);
832 get_frame_extra_info (fi)->return_pc =
833 sh_find_callers_reg (fi, PR_REGNUM);
834 }
835 }
836
837 /* Extract from an array REGBUF containing the (raw) register state
838 the address in which a function should return its structure value,
839 as a CORE_ADDR (or an expression that can be used as one). */
840 static CORE_ADDR
841 sh_extract_struct_value_address (struct regcache *regcache)
842 {
843 ULONGEST addr;
844 /*FIXME: Is R0 really correct here? Not STRUCT_RETURN_REGNUM? */
845 regcache_cooked_read_unsigned (regcache, STRUCT_RETURN_REGNUM, &addr);
846 return addr;
847 }
848
849 static CORE_ADDR
850 sh_frame_saved_pc (struct frame_info *frame)
851 {
852 return (get_frame_extra_info (frame)->return_pc);
853 }
854
855 /* Discard from the stack the innermost frame,
856 restoring all saved registers. */
857 static void
858 sh_pop_frame (void)
859 {
860 register struct frame_info *frame = get_current_frame ();
861 register CORE_ADDR fp;
862 register int regnum;
863
864 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
865 get_frame_base (frame),
866 get_frame_base (frame)))
867 generic_pop_dummy_frame ();
868 else
869 {
870 fp = get_frame_base (frame);
871 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
872
873 /* Copy regs from where they were saved in the frame */
874 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
875 if (get_frame_saved_regs (frame)[regnum])
876 write_register (regnum,
877 read_memory_integer (get_frame_saved_regs (frame)[regnum], 4));
878
879 write_register (PC_REGNUM, get_frame_extra_info (frame)->return_pc);
880 write_register (SP_REGNUM, fp + 4);
881 }
882 flush_cached_frames ();
883 }
884
885 static CORE_ADDR
886 sh_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
887 {
888 return sp & ~3;
889 }
890
891 /* Function: push_dummy_call (formerly push_arguments)
892 Setup the function arguments for calling a function in the inferior.
893
894 On the Hitachi SH architecture, there are four registers (R4 to R7)
895 which are dedicated for passing function arguments. Up to the first
896 four arguments (depending on size) may go into these registers.
897 The rest go on the stack.
898
899 MVS: Except on SH variants that have floating point registers.
900 In that case, float and double arguments are passed in the same
901 manner, but using FP registers instead of GP registers.
902
903 Arguments that are smaller than 4 bytes will still take up a whole
904 register or a whole 32-bit word on the stack, and will be
905 right-justified in the register or the stack word. This includes
906 chars, shorts, and small aggregate types.
907
908 Arguments that are larger than 4 bytes may be split between two or
909 more registers. If there are not enough registers free, an argument
910 may be passed partly in a register (or registers), and partly on the
911 stack. This includes doubles, long longs, and larger aggregates.
912 As far as I know, there is no upper limit to the size of aggregates
913 that will be passed in this way; in other words, the convention of
914 passing a pointer to a large aggregate instead of a copy is not used.
915
916 MVS: The above appears to be true for the SH variants that do not
917 have an FPU, however those that have an FPU appear to copy the
918 aggregate argument onto the stack (and not place it in registers)
919 if it is larger than 16 bytes (four GP registers).
920
921 An exceptional case exists for struct arguments (and possibly other
922 aggregates such as arrays) if the size is larger than 4 bytes but
923 not a multiple of 4 bytes. In this case the argument is never split
924 between the registers and the stack, but instead is copied in its
925 entirety onto the stack, AND also copied into as many registers as
926 there is room for. In other words, space in registers permitting,
927 two copies of the same argument are passed in. As far as I can tell,
928 only the one on the stack is used, although that may be a function
929 of the level of compiler optimization. I suspect this is a compiler
930 bug. Arguments of these odd sizes are left-justified within the
931 word (as opposed to arguments smaller than 4 bytes, which are
932 right-justified).
933
934 If the function is to return an aggregate type such as a struct, it
935 is either returned in the normal return value register R0 (if its
936 size is no greater than one byte), or else the caller must allocate
937 space into which the callee will copy the return value (if the size
938 is greater than one byte). In this case, a pointer to the return
939 value location is passed into the callee in register R2, which does
940 not displace any of the other arguments passed in via registers R4
941 to R7. */
942
943 static CORE_ADDR
944 sh_push_dummy_call_fpu (struct gdbarch *gdbarch,
945 CORE_ADDR func_addr,
946 struct regcache *regcache,
947 CORE_ADDR bp_addr, int nargs,
948 struct value **args,
949 CORE_ADDR sp, int struct_return,
950 CORE_ADDR struct_addr)
951 {
952 int stack_offset, stack_alloc;
953 int argreg, flt_argreg;
954 int argnum;
955 struct type *type;
956 CORE_ADDR regval;
957 char *val;
958 char valbuf[4];
959 int len;
960 int odd_sized_struct;
961 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
962
963 /* first force sp to a 4-byte alignment */
964 sp = sh_frame_align (gdbarch, sp);
965
966 /* The "struct return pointer" pseudo-argument has its own dedicated
967 register */
968 if (struct_return)
969 regcache_cooked_write_unsigned (regcache,
970 STRUCT_RETURN_REGNUM,
971 struct_addr);
972
973 /* Now make sure there's space on the stack */
974 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
975 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
976 sp -= stack_alloc; /* make room on stack for args */
977
978 /* Now load as many as possible of the first arguments into
979 registers, and push the rest onto the stack. There are 16 bytes
980 in four registers available. Loop thru args from first to last. */
981
982 argreg = ARG0_REGNUM;
983 flt_argreg = FLOAT_ARG0_REGNUM;
984 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
985 {
986 type = VALUE_TYPE (args[argnum]);
987 len = TYPE_LENGTH (type);
988 memset (valbuf, 0, sizeof (valbuf));
989 if (len < 4)
990 {
991 /* value gets right-justified in the register or stack word */
992 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
993 memcpy (valbuf + (4 - len),
994 (char *) VALUE_CONTENTS (args[argnum]), len);
995 else
996 memcpy (valbuf, (char *) VALUE_CONTENTS (args[argnum]), len);
997 val = valbuf;
998 }
999 else
1000 val = (char *) VALUE_CONTENTS (args[argnum]);
1001
1002 if (len > 4 && (len & 3) != 0)
1003 odd_sized_struct = 1; /* Such structs go entirely on stack. */
1004 else if (len > 16)
1005 odd_sized_struct = 1; /* So do aggregates bigger than 4 words. */
1006 else
1007 odd_sized_struct = 0;
1008 while (len > 0)
1009 {
1010 if ((TYPE_CODE (type) == TYPE_CODE_FLT
1011 && flt_argreg > FLOAT_ARGLAST_REGNUM)
1012 || argreg > ARGLAST_REGNUM
1013 || odd_sized_struct)
1014 {
1015 /* must go on the stack */
1016 write_memory (sp + stack_offset, val, 4);
1017 stack_offset += 4;
1018 }
1019 /* NOTE WELL!!!!! This is not an "else if" clause!!!
1020 That's because some *&^%$ things get passed on the stack
1021 AND in the registers! */
1022 if (TYPE_CODE (type) == TYPE_CODE_FLT &&
1023 flt_argreg > 0 && flt_argreg <= FLOAT_ARGLAST_REGNUM)
1024 {
1025 /* Argument goes in a single-precision fp reg. */
1026 regval = extract_unsigned_integer (val, register_size (gdbarch,
1027 argreg));
1028 regcache_cooked_write_unsigned (regcache, flt_argreg++, regval);
1029 }
1030 else if (argreg <= ARGLAST_REGNUM)
1031 {
1032 /* there's room in a register */
1033 regval = extract_unsigned_integer (val, register_size (gdbarch,
1034 argreg));
1035 regcache_cooked_write_unsigned (regcache, argreg++, regval);
1036 }
1037 /* Store the value 4 bytes at a time. This means that things
1038 larger than 4 bytes may go partly in registers and partly
1039 on the stack. */
1040 len -= register_size (gdbarch, argreg);
1041 val += register_size (gdbarch, argreg);
1042 }
1043 }
1044
1045 /* Store return address. */
1046 regcache_cooked_write_unsigned (regcache, PR_REGNUM, bp_addr);
1047
1048 /* Update stack pointer. */
1049 regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
1050
1051 return sp;
1052 }
1053
1054 static CORE_ADDR
1055 sh_push_dummy_call_nofpu (struct gdbarch *gdbarch,
1056 CORE_ADDR func_addr,
1057 struct regcache *regcache,
1058 CORE_ADDR bp_addr,
1059 int nargs, struct value **args,
1060 CORE_ADDR sp, int struct_return,
1061 CORE_ADDR struct_addr)
1062 {
1063 int stack_offset, stack_alloc;
1064 int argreg;
1065 int argnum;
1066 struct type *type;
1067 CORE_ADDR regval;
1068 char *val;
1069 char valbuf[4];
1070 int len;
1071 int odd_sized_struct;
1072 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1073
1074 /* first force sp to a 4-byte alignment */
1075 sp = sh_frame_align (gdbarch, sp);
1076
1077 /* The "struct return pointer" pseudo-argument has its own dedicated
1078 register */
1079 if (struct_return)
1080 regcache_cooked_write_unsigned (regcache,
1081 STRUCT_RETURN_REGNUM,
1082 struct_addr);
1083
1084 /* Now make sure there's space on the stack */
1085 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
1086 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
1087 sp -= stack_alloc; /* make room on stack for args */
1088
1089 /* Now load as many as possible of the first arguments into
1090 registers, and push the rest onto the stack. There are 16 bytes
1091 in four registers available. Loop thru args from first to last. */
1092
1093 argreg = ARG0_REGNUM;
1094 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
1095 {
1096 type = VALUE_TYPE (args[argnum]);
1097 len = TYPE_LENGTH (type);
1098 memset (valbuf, 0, sizeof (valbuf));
1099 if (len < 4)
1100 {
1101 /* value gets right-justified in the register or stack word */
1102 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
1103 memcpy (valbuf + (4 - len),
1104 (char *) VALUE_CONTENTS (args[argnum]), len);
1105 else
1106 memcpy (valbuf, (char *) VALUE_CONTENTS (args[argnum]), len);
1107 val = valbuf;
1108 }
1109 else
1110 val = (char *) VALUE_CONTENTS (args[argnum]);
1111
1112 if (len > 4 && (len & 3) != 0)
1113 odd_sized_struct = 1; /* such structs go entirely on stack */
1114 else
1115 odd_sized_struct = 0;
1116 while (len > 0)
1117 {
1118 if (argreg > ARGLAST_REGNUM
1119 || odd_sized_struct)
1120 {
1121 /* must go on the stack */
1122 write_memory (sp + stack_offset, val, 4);
1123 stack_offset += 4;
1124 }
1125 /* NOTE WELL!!!!! This is not an "else if" clause!!!
1126 That's because some *&^%$ things get passed on the stack
1127 AND in the registers! */
1128 if (argreg <= ARGLAST_REGNUM)
1129 {
1130 /* there's room in a register */
1131 regval = extract_unsigned_integer (val, register_size (gdbarch,
1132 argreg));
1133 regcache_cooked_write_unsigned (regcache, argreg++, regval);
1134 }
1135 /* Store the value 4 bytes at a time. This means that things
1136 larger than 4 bytes may go partly in registers and partly
1137 on the stack. */
1138 len -= register_size (gdbarch, argreg);
1139 val += register_size (gdbarch, argreg);
1140 }
1141 }
1142
1143 /* Store return address. */
1144 regcache_cooked_write_unsigned (regcache, PR_REGNUM, bp_addr);
1145
1146 /* Update stack pointer. */
1147 regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
1148
1149 return sp;
1150 }
1151
1152 /* Find a function's return value in the appropriate registers (in
1153 regbuf), and copy it into valbuf. Extract from an array REGBUF
1154 containing the (raw) register state a function return value of type
1155 TYPE, and copy that, in virtual format, into VALBUF. */
1156 static void
1157 sh_default_extract_return_value (struct type *type, struct regcache *regcache,
1158 void *valbuf)
1159 {
1160 int len = TYPE_LENGTH (type);
1161 int return_register = R0_REGNUM;
1162 int offset;
1163
1164 if (len <= 4)
1165 {
1166 ULONGEST c;
1167
1168 regcache_cooked_read_unsigned (regcache, R0_REGNUM, &c);
1169 store_unsigned_integer (valbuf, len, c);
1170 }
1171 else if (len == 8)
1172 {
1173 int i, regnum = R0_REGNUM;
1174 for (i = 0; i < len; i += 4)
1175 regcache_raw_read (regcache, regnum++, (char *)valbuf + i);
1176 }
1177 else
1178 error ("bad size for return value");
1179 }
1180
1181 static void
1182 sh3e_sh4_extract_return_value (struct type *type, struct regcache *regcache,
1183 void *valbuf)
1184 {
1185 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1186 {
1187 int len = TYPE_LENGTH (type);
1188 int i, regnum = FP0_REGNUM;
1189 for (i = 0; i < len; i += 4)
1190 regcache_raw_read (regcache, regnum++, (char *)valbuf + i);
1191 }
1192 else
1193 sh_default_extract_return_value (type, regcache, valbuf);
1194 }
1195
1196 /* Write into appropriate registers a function return value
1197 of type TYPE, given in virtual format.
1198 If the architecture is sh4 or sh3e, store a function's return value
1199 in the R0 general register or in the FP0 floating point register,
1200 depending on the type of the return value. In all the other cases
1201 the result is stored in r0, left-justified. */
1202 static void
1203 sh_default_store_return_value (struct type *type, struct regcache *regcache,
1204 const void *valbuf)
1205 {
1206 ULONGEST val;
1207 int len = TYPE_LENGTH (type);
1208
1209 if (len <= 4)
1210 {
1211 val = extract_unsigned_integer (valbuf, len);
1212 regcache_cooked_write_unsigned (regcache, R0_REGNUM, val);
1213 }
1214 else
1215 {
1216 int i, regnum = R0_REGNUM;
1217 for (i = 0; i < len; i += 4)
1218 regcache_raw_write (regcache, regnum++, (char *)valbuf + i);
1219 }
1220 }
1221
1222 static void
1223 sh3e_sh4_store_return_value (struct type *type, struct regcache *regcache,
1224 const void *valbuf)
1225 {
1226 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1227 {
1228 int len = TYPE_LENGTH (type);
1229 int i, regnum = FP0_REGNUM;
1230 for (i = 0; i < len; i += 4)
1231 regcache_raw_write (regcache, regnum++, (char *)valbuf + i);
1232 }
1233 else
1234 sh_default_store_return_value (type, regcache, valbuf);
1235 }
1236
1237 /* Print the registers in a form similar to the E7000 */
1238
1239 static void
1240 sh_generic_show_regs (void)
1241 {
1242 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1243
1244 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1245 paddr (read_register (PC_REGNUM)),
1246 (long) read_register (SR_REGNUM),
1247 (long) read_register (PR_REGNUM),
1248 (long) read_register (MACH_REGNUM),
1249 (long) read_register (MACL_REGNUM));
1250
1251 printf_filtered ("GBR=%08lx VBR=%08lx",
1252 (long) read_register (GBR_REGNUM),
1253 (long) read_register (VBR_REGNUM));
1254
1255 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1256 (long) read_register (0),
1257 (long) read_register (1),
1258 (long) read_register (2),
1259 (long) read_register (3),
1260 (long) read_register (4),
1261 (long) read_register (5),
1262 (long) read_register (6),
1263 (long) read_register (7));
1264 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1265 (long) read_register (8),
1266 (long) read_register (9),
1267 (long) read_register (10),
1268 (long) read_register (11),
1269 (long) read_register (12),
1270 (long) read_register (13),
1271 (long) read_register (14),
1272 (long) read_register (15));
1273 }
1274
1275 static void
1276 sh3_show_regs (void)
1277 {
1278 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1279
1280 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1281 paddr (read_register (PC_REGNUM)),
1282 (long) read_register (SR_REGNUM),
1283 (long) read_register (PR_REGNUM),
1284 (long) read_register (MACH_REGNUM),
1285 (long) read_register (MACL_REGNUM));
1286
1287 printf_filtered ("GBR=%08lx VBR=%08lx",
1288 (long) read_register (GBR_REGNUM),
1289 (long) read_register (VBR_REGNUM));
1290 printf_filtered (" SSR=%08lx SPC=%08lx",
1291 (long) read_register (tdep->SSR_REGNUM),
1292 (long) read_register (tdep->SPC_REGNUM));
1293
1294 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1295 (long) read_register (0),
1296 (long) read_register (1),
1297 (long) read_register (2),
1298 (long) read_register (3),
1299 (long) read_register (4),
1300 (long) read_register (5),
1301 (long) read_register (6),
1302 (long) read_register (7));
1303 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1304 (long) read_register (8),
1305 (long) read_register (9),
1306 (long) read_register (10),
1307 (long) read_register (11),
1308 (long) read_register (12),
1309 (long) read_register (13),
1310 (long) read_register (14),
1311 (long) read_register (15));
1312 }
1313
1314
1315 static void
1316 sh2e_show_regs (void)
1317 {
1318 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1319 paddr (read_register (PC_REGNUM)),
1320 (long) read_register (SR_REGNUM),
1321 (long) read_register (PR_REGNUM),
1322 (long) read_register (MACH_REGNUM),
1323 (long) read_register (MACL_REGNUM));
1324
1325 printf_filtered ("GBR=%08lx VBR=%08lx",
1326 (long) read_register (GBR_REGNUM),
1327 (long) read_register (VBR_REGNUM));
1328 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1329 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1330 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1331
1332 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1333 (long) read_register (0),
1334 (long) read_register (1),
1335 (long) read_register (2),
1336 (long) read_register (3),
1337 (long) read_register (4),
1338 (long) read_register (5),
1339 (long) read_register (6),
1340 (long) read_register (7));
1341 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1342 (long) read_register (8),
1343 (long) read_register (9),
1344 (long) read_register (10),
1345 (long) read_register (11),
1346 (long) read_register (12),
1347 (long) read_register (13),
1348 (long) read_register (14),
1349 (long) read_register (15));
1350
1351 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1352 (long) read_register (FP0_REGNUM + 0),
1353 (long) read_register (FP0_REGNUM + 1),
1354 (long) read_register (FP0_REGNUM + 2),
1355 (long) read_register (FP0_REGNUM + 3),
1356 (long) read_register (FP0_REGNUM + 4),
1357 (long) read_register (FP0_REGNUM + 5),
1358 (long) read_register (FP0_REGNUM + 6),
1359 (long) read_register (FP0_REGNUM + 7));
1360 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1361 (long) read_register (FP0_REGNUM + 8),
1362 (long) read_register (FP0_REGNUM + 9),
1363 (long) read_register (FP0_REGNUM + 10),
1364 (long) read_register (FP0_REGNUM + 11),
1365 (long) read_register (FP0_REGNUM + 12),
1366 (long) read_register (FP0_REGNUM + 13),
1367 (long) read_register (FP0_REGNUM + 14),
1368 (long) read_register (FP0_REGNUM + 15));
1369 }
1370
1371 static void
1372 sh3e_show_regs (void)
1373 {
1374 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1375
1376 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1377 paddr (read_register (PC_REGNUM)),
1378 (long) read_register (SR_REGNUM),
1379 (long) read_register (PR_REGNUM),
1380 (long) read_register (MACH_REGNUM),
1381 (long) read_register (MACL_REGNUM));
1382
1383 printf_filtered ("GBR=%08lx VBR=%08lx",
1384 (long) read_register (GBR_REGNUM),
1385 (long) read_register (VBR_REGNUM));
1386 printf_filtered (" SSR=%08lx SPC=%08lx",
1387 (long) read_register (tdep->SSR_REGNUM),
1388 (long) read_register (tdep->SPC_REGNUM));
1389 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1390 (long) read_register (tdep->FPUL_REGNUM),
1391 (long) read_register (tdep->FPSCR_REGNUM));
1392
1393 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1394 (long) read_register (0),
1395 (long) read_register (1),
1396 (long) read_register (2),
1397 (long) read_register (3),
1398 (long) read_register (4),
1399 (long) read_register (5),
1400 (long) read_register (6),
1401 (long) read_register (7));
1402 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1403 (long) read_register (8),
1404 (long) read_register (9),
1405 (long) read_register (10),
1406 (long) read_register (11),
1407 (long) read_register (12),
1408 (long) read_register (13),
1409 (long) read_register (14),
1410 (long) read_register (15));
1411
1412 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1413 (long) read_register (FP0_REGNUM + 0),
1414 (long) read_register (FP0_REGNUM + 1),
1415 (long) read_register (FP0_REGNUM + 2),
1416 (long) read_register (FP0_REGNUM + 3),
1417 (long) read_register (FP0_REGNUM + 4),
1418 (long) read_register (FP0_REGNUM + 5),
1419 (long) read_register (FP0_REGNUM + 6),
1420 (long) read_register (FP0_REGNUM + 7));
1421 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1422 (long) read_register (FP0_REGNUM + 8),
1423 (long) read_register (FP0_REGNUM + 9),
1424 (long) read_register (FP0_REGNUM + 10),
1425 (long) read_register (FP0_REGNUM + 11),
1426 (long) read_register (FP0_REGNUM + 12),
1427 (long) read_register (FP0_REGNUM + 13),
1428 (long) read_register (FP0_REGNUM + 14),
1429 (long) read_register (FP0_REGNUM + 15));
1430 }
1431
1432 static void
1433 sh3_dsp_show_regs (void)
1434 {
1435 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1436
1437 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1438 paddr (read_register (PC_REGNUM)),
1439 (long) read_register (SR_REGNUM),
1440 (long) read_register (PR_REGNUM),
1441 (long) read_register (MACH_REGNUM),
1442 (long) read_register (MACL_REGNUM));
1443
1444 printf_filtered ("GBR=%08lx VBR=%08lx",
1445 (long) read_register (GBR_REGNUM),
1446 (long) read_register (VBR_REGNUM));
1447
1448 printf_filtered (" SSR=%08lx SPC=%08lx",
1449 (long) read_register (tdep->SSR_REGNUM),
1450 (long) read_register (tdep->SPC_REGNUM));
1451
1452 printf_filtered (" DSR=%08lx",
1453 (long) read_register (tdep->DSR_REGNUM));
1454
1455 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1456 (long) read_register (0),
1457 (long) read_register (1),
1458 (long) read_register (2),
1459 (long) read_register (3),
1460 (long) read_register (4),
1461 (long) read_register (5),
1462 (long) read_register (6),
1463 (long) read_register (7));
1464 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1465 (long) read_register (8),
1466 (long) read_register (9),
1467 (long) read_register (10),
1468 (long) read_register (11),
1469 (long) read_register (12),
1470 (long) read_register (13),
1471 (long) read_register (14),
1472 (long) read_register (15));
1473
1474 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1475 (long) read_register (tdep->A0G_REGNUM) & 0xff,
1476 (long) read_register (tdep->A0_REGNUM),
1477 (long) read_register (tdep->M0_REGNUM),
1478 (long) read_register (tdep->X0_REGNUM),
1479 (long) read_register (tdep->Y0_REGNUM),
1480 (long) read_register (tdep->RS_REGNUM),
1481 (long) read_register (tdep->MOD_REGNUM));
1482 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1483 (long) read_register (tdep->A1G_REGNUM) & 0xff,
1484 (long) read_register (tdep->A1_REGNUM),
1485 (long) read_register (tdep->M1_REGNUM),
1486 (long) read_register (tdep->X1_REGNUM),
1487 (long) read_register (tdep->Y1_REGNUM),
1488 (long) read_register (tdep->RE_REGNUM));
1489 }
1490
1491 static void
1492 sh4_show_regs (void)
1493 {
1494 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1495
1496 int pr = read_register (tdep->FPSCR_REGNUM) & 0x80000;
1497 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1498 paddr (read_register (PC_REGNUM)),
1499 (long) read_register (SR_REGNUM),
1500 (long) read_register (PR_REGNUM),
1501 (long) read_register (MACH_REGNUM),
1502 (long) read_register (MACL_REGNUM));
1503
1504 printf_filtered ("GBR=%08lx VBR=%08lx",
1505 (long) read_register (GBR_REGNUM),
1506 (long) read_register (VBR_REGNUM));
1507 printf_filtered (" SSR=%08lx SPC=%08lx",
1508 (long) read_register (tdep->SSR_REGNUM),
1509 (long) read_register (tdep->SPC_REGNUM));
1510 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1511 (long) read_register (tdep->FPUL_REGNUM),
1512 (long) read_register (tdep->FPSCR_REGNUM));
1513
1514 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1515 (long) read_register (0),
1516 (long) read_register (1),
1517 (long) read_register (2),
1518 (long) read_register (3),
1519 (long) read_register (4),
1520 (long) read_register (5),
1521 (long) read_register (6),
1522 (long) read_register (7));
1523 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1524 (long) read_register (8),
1525 (long) read_register (9),
1526 (long) read_register (10),
1527 (long) read_register (11),
1528 (long) read_register (12),
1529 (long) read_register (13),
1530 (long) read_register (14),
1531 (long) read_register (15));
1532
1533 printf_filtered ((pr
1534 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1535 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1536 (long) read_register (FP0_REGNUM + 0),
1537 (long) read_register (FP0_REGNUM + 1),
1538 (long) read_register (FP0_REGNUM + 2),
1539 (long) read_register (FP0_REGNUM + 3),
1540 (long) read_register (FP0_REGNUM + 4),
1541 (long) read_register (FP0_REGNUM + 5),
1542 (long) read_register (FP0_REGNUM + 6),
1543 (long) read_register (FP0_REGNUM + 7));
1544 printf_filtered ((pr
1545 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1546 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1547 (long) read_register (FP0_REGNUM + 8),
1548 (long) read_register (FP0_REGNUM + 9),
1549 (long) read_register (FP0_REGNUM + 10),
1550 (long) read_register (FP0_REGNUM + 11),
1551 (long) read_register (FP0_REGNUM + 12),
1552 (long) read_register (FP0_REGNUM + 13),
1553 (long) read_register (FP0_REGNUM + 14),
1554 (long) read_register (FP0_REGNUM + 15));
1555 }
1556
1557 static void
1558 sh_dsp_show_regs (void)
1559 {
1560 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1561
1562 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1563 paddr (read_register (PC_REGNUM)),
1564 (long) read_register (SR_REGNUM),
1565 (long) read_register (PR_REGNUM),
1566 (long) read_register (MACH_REGNUM),
1567 (long) read_register (MACL_REGNUM));
1568
1569 printf_filtered ("GBR=%08lx VBR=%08lx",
1570 (long) read_register (GBR_REGNUM),
1571 (long) read_register (VBR_REGNUM));
1572
1573 printf_filtered (" DSR=%08lx",
1574 (long) read_register (tdep->DSR_REGNUM));
1575
1576 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1577 (long) read_register (0),
1578 (long) read_register (1),
1579 (long) read_register (2),
1580 (long) read_register (3),
1581 (long) read_register (4),
1582 (long) read_register (5),
1583 (long) read_register (6),
1584 (long) read_register (7));
1585 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1586 (long) read_register (8),
1587 (long) read_register (9),
1588 (long) read_register (10),
1589 (long) read_register (11),
1590 (long) read_register (12),
1591 (long) read_register (13),
1592 (long) read_register (14),
1593 (long) read_register (15));
1594
1595 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1596 (long) read_register (tdep->A0G_REGNUM) & 0xff,
1597 (long) read_register (tdep->A0_REGNUM),
1598 (long) read_register (tdep->M0_REGNUM),
1599 (long) read_register (tdep->X0_REGNUM),
1600 (long) read_register (tdep->Y0_REGNUM),
1601 (long) read_register (tdep->RS_REGNUM),
1602 (long) read_register (tdep->MOD_REGNUM));
1603 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1604 (long) read_register (tdep->A1G_REGNUM) & 0xff,
1605 (long) read_register (tdep->A1_REGNUM),
1606 (long) read_register (tdep->M1_REGNUM),
1607 (long) read_register (tdep->X1_REGNUM),
1608 (long) read_register (tdep->Y1_REGNUM),
1609 (long) read_register (tdep->RE_REGNUM));
1610 }
1611
1612 static void
1613 sh_show_regs_command (char *args, int from_tty)
1614 {
1615 if (sh_show_regs)
1616 (*sh_show_regs)();
1617 }
1618
1619 /* Return the GDB type object for the "standard" data type
1620 of data in register N. */
1621 static struct type *
1622 sh_sh3e_register_type (struct gdbarch *gdbarch, int reg_nr)
1623 {
1624 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1625
1626 if ((reg_nr >= FP0_REGNUM
1627 && (reg_nr <= tdep->FP_LAST_REGNUM))
1628 || (reg_nr == tdep->FPUL_REGNUM))
1629 return builtin_type_float;
1630 else
1631 return builtin_type_int;
1632 }
1633
1634 static struct type *
1635 sh_sh4_build_float_register_type (int high)
1636 {
1637 struct type *temp;
1638
1639 temp = create_range_type (NULL, builtin_type_int, 0, high);
1640 return create_array_type (NULL, builtin_type_float, temp);
1641 }
1642
1643 static struct type *
1644 sh_sh4_register_type (struct gdbarch *gdbarch, int reg_nr)
1645 {
1646 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1647
1648 if ((reg_nr >= FP0_REGNUM
1649 && (reg_nr <= tdep->FP_LAST_REGNUM))
1650 || (reg_nr == tdep->FPUL_REGNUM))
1651 return builtin_type_float;
1652 else if (reg_nr >= tdep->DR0_REGNUM
1653 && reg_nr <= tdep->DR_LAST_REGNUM)
1654 return builtin_type_double;
1655 else if (reg_nr >= tdep->FV0_REGNUM
1656 && reg_nr <= tdep->FV_LAST_REGNUM)
1657 return sh_sh4_build_float_register_type (3);
1658 else
1659 return builtin_type_int;
1660 }
1661
1662 static struct type *
1663 sh_default_register_type (struct gdbarch *gdbarch, int reg_nr)
1664 {
1665 return builtin_type_int;
1666 }
1667
1668 /* On the sh4, the DRi pseudo registers are problematic if the target
1669 is little endian. When the user writes one of those registers, for
1670 instance with 'ser var $dr0=1', we want the double to be stored
1671 like this:
1672 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1673 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1674
1675 This corresponds to little endian byte order & big endian word
1676 order. However if we let gdb write the register w/o conversion, it
1677 will write fr0 and fr1 this way:
1678 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1679 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1680 because it will consider fr0 and fr1 as a single LE stretch of memory.
1681
1682 To achieve what we want we must force gdb to store things in
1683 floatformat_ieee_double_littlebyte_bigword (which is defined in
1684 include/floatformat.h and libiberty/floatformat.c.
1685
1686 In case the target is big endian, there is no problem, the
1687 raw bytes will look like:
1688 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1689 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1690
1691 The other pseudo registers (the FVs) also don't pose a problem
1692 because they are stored as 4 individual FP elements. */
1693
1694 static void
1695 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1696 char *from, char *to)
1697 {
1698 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1699
1700 if (regnum >= tdep->DR0_REGNUM
1701 && regnum <= tdep->DR_LAST_REGNUM)
1702 {
1703 DOUBLEST val;
1704 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1705 store_typed_floating (to, type, val);
1706 }
1707 else
1708 error ("sh_register_convert_to_virtual called with non DR register number");
1709 }
1710
1711 static void
1712 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1713 const void *from, void *to)
1714 {
1715 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1716
1717 if (regnum >= tdep->DR0_REGNUM
1718 && regnum <= tdep->DR_LAST_REGNUM)
1719 {
1720 DOUBLEST val = extract_typed_floating (from, type);
1721 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1722 }
1723 else
1724 error("sh_register_convert_to_raw called with non DR register number");
1725 }
1726
1727 static void
1728 sh_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1729 int reg_nr, void *buffer)
1730 {
1731 int base_regnum, portion;
1732 char temp_buffer[MAX_REGISTER_SIZE];
1733 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1734
1735 if (reg_nr >= tdep->DR0_REGNUM
1736 && reg_nr <= tdep->DR_LAST_REGNUM)
1737 {
1738 base_regnum = dr_reg_base_num (reg_nr);
1739
1740 /* Build the value in the provided buffer. */
1741 /* Read the real regs for which this one is an alias. */
1742 for (portion = 0; portion < 2; portion++)
1743 regcache_raw_read (regcache, base_regnum + portion,
1744 (temp_buffer
1745 + register_size (gdbarch, base_regnum) * portion));
1746 /* We must pay attention to the endiannes. */
1747 sh_sh4_register_convert_to_virtual (reg_nr,
1748 gdbarch_register_type (gdbarch, reg_nr),
1749 temp_buffer, buffer);
1750 }
1751 else if (reg_nr >= tdep->FV0_REGNUM
1752 && reg_nr <= tdep->FV_LAST_REGNUM)
1753 {
1754 base_regnum = fv_reg_base_num (reg_nr);
1755
1756 /* Read the real regs for which this one is an alias. */
1757 for (portion = 0; portion < 4; portion++)
1758 regcache_raw_read (regcache, base_regnum + portion,
1759 ((char *) buffer
1760 + register_size (gdbarch, base_regnum) * portion));
1761 }
1762 }
1763
1764 static void
1765 sh_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1766 int reg_nr, const void *buffer)
1767 {
1768 int base_regnum, portion;
1769 char temp_buffer[MAX_REGISTER_SIZE];
1770 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1771
1772 if (reg_nr >= tdep->DR0_REGNUM
1773 && reg_nr <= tdep->DR_LAST_REGNUM)
1774 {
1775 base_regnum = dr_reg_base_num (reg_nr);
1776
1777 /* We must pay attention to the endiannes. */
1778 sh_sh4_register_convert_to_raw (gdbarch_register_type (gdbarch, reg_nr), reg_nr,
1779 buffer, temp_buffer);
1780
1781 /* Write the real regs for which this one is an alias. */
1782 for (portion = 0; portion < 2; portion++)
1783 regcache_raw_write (regcache, base_regnum + portion,
1784 (temp_buffer
1785 + register_size (gdbarch, base_regnum) * portion));
1786 }
1787 else if (reg_nr >= tdep->FV0_REGNUM
1788 && reg_nr <= tdep->FV_LAST_REGNUM)
1789 {
1790 base_regnum = fv_reg_base_num (reg_nr);
1791
1792 /* Write the real regs for which this one is an alias. */
1793 for (portion = 0; portion < 4; portion++)
1794 regcache_raw_write (regcache, base_regnum + portion,
1795 ((char *) buffer
1796 + register_size (gdbarch, base_regnum) * portion));
1797 }
1798 }
1799
1800 /* Floating point vector of 4 float registers. */
1801 static void
1802 do_fv_register_info (struct gdbarch *gdbarch, struct ui_file *file,
1803 int fv_regnum)
1804 {
1805 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1806 fprintf_filtered (file, "fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1807 fv_regnum - gdbarch_tdep (gdbarch)->FV0_REGNUM,
1808 (int) read_register (first_fp_reg_num),
1809 (int) read_register (first_fp_reg_num + 1),
1810 (int) read_register (first_fp_reg_num + 2),
1811 (int) read_register (first_fp_reg_num + 3));
1812 }
1813
1814 /* Double precision registers. */
1815 static void
1816 do_dr_register_info (struct gdbarch *gdbarch, struct ui_file *file,
1817 int dr_regnum)
1818 {
1819 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1820
1821 fprintf_filtered (file, "dr%d\t0x%08x%08x\n",
1822 dr_regnum - gdbarch_tdep (gdbarch)->DR0_REGNUM,
1823 (int) read_register (first_fp_reg_num),
1824 (int) read_register (first_fp_reg_num + 1));
1825 }
1826
1827 static void
1828 sh_print_pseudo_register (struct gdbarch *gdbarch, struct ui_file *file,
1829 int regnum)
1830 {
1831 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1832
1833 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1834 internal_error (__FILE__, __LINE__,
1835 "Invalid pseudo register number %d\n", regnum);
1836 else if (regnum >= tdep->DR0_REGNUM
1837 && regnum <= tdep->DR_LAST_REGNUM)
1838 do_dr_register_info (gdbarch, file, regnum);
1839 else if (regnum >= tdep->FV0_REGNUM
1840 && regnum <= tdep->FV_LAST_REGNUM)
1841 do_fv_register_info (gdbarch, file, regnum);
1842 }
1843
1844 static void
1845 sh_do_fp_register (struct gdbarch *gdbarch, struct ui_file *file, int regnum)
1846 { /* do values for FP (float) regs */
1847 char *raw_buffer;
1848 double flt; /* double extracted from raw hex data */
1849 int inv;
1850 int j;
1851
1852 /* Allocate space for the float. */
1853 raw_buffer = (char *) alloca (register_size (gdbarch, FP0_REGNUM));
1854
1855 /* Get the data in raw format. */
1856 if (!frame_register_read (get_selected_frame (), regnum, raw_buffer))
1857 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1858
1859 /* Get the register as a number */
1860 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1861
1862 /* Print the name and some spaces. */
1863 fputs_filtered (REGISTER_NAME (regnum), file);
1864 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file);
1865
1866 /* Print the value. */
1867 if (inv)
1868 fprintf_filtered (file, "<invalid float>");
1869 else
1870 fprintf_filtered (file, "%-10.9g", flt);
1871
1872 /* Print the fp register as hex. */
1873 fprintf_filtered (file, "\t(raw 0x");
1874 for (j = 0; j < register_size (gdbarch, regnum); j++)
1875 {
1876 register int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j
1877 : register_size (gdbarch, regnum) - 1 - j;
1878 fprintf_filtered (file, "%02x", (unsigned char) raw_buffer[idx]);
1879 }
1880 fprintf_filtered (file, ")");
1881 fprintf_filtered (file, "\n");
1882 }
1883
1884 static void
1885 sh_do_register (struct gdbarch *gdbarch, struct ui_file *file, int regnum)
1886 {
1887 char raw_buffer[MAX_REGISTER_SIZE];
1888
1889 fputs_filtered (REGISTER_NAME (regnum), file);
1890 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file);
1891
1892 /* Get the data in raw format. */
1893 if (!frame_register_read (get_selected_frame (), regnum, raw_buffer))
1894 fprintf_filtered (file, "*value not available*\n");
1895
1896 val_print (gdbarch_register_type (gdbarch, regnum), raw_buffer, 0, 0,
1897 file, 'x', 1, 0, Val_pretty_default);
1898 fprintf_filtered (file, "\t");
1899 val_print (gdbarch_register_type (gdbarch, regnum), raw_buffer, 0, 0,
1900 file, 0, 1, 0, Val_pretty_default);
1901 fprintf_filtered (file, "\n");
1902 }
1903
1904 static void
1905 sh_print_register (struct gdbarch *gdbarch, struct ui_file *file, int regnum)
1906 {
1907 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1908 internal_error (__FILE__, __LINE__,
1909 "Invalid register number %d\n", regnum);
1910
1911 else if (regnum >= 0 && regnum < NUM_REGS)
1912 {
1913 if (TYPE_CODE (gdbarch_register_type (gdbarch, regnum)) == TYPE_CODE_FLT)
1914 sh_do_fp_register (gdbarch, file, regnum); /* FP regs */
1915 else
1916 sh_do_register (gdbarch, file, regnum); /* All other regs */
1917 }
1918
1919 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1920 {
1921 sh_print_pseudo_register (gdbarch, file, regnum);
1922 }
1923 }
1924
1925 static void
1926 sh_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1927 struct frame_info *frame, int regnum, int fpregs)
1928 {
1929 if (regnum != -1) /* do one specified register */
1930 {
1931 if (*(REGISTER_NAME (regnum)) == '\0')
1932 error ("Not a valid register for the current processor type");
1933
1934 sh_print_register (gdbarch, file, regnum);
1935 }
1936 else
1937 /* do all (or most) registers */
1938 {
1939 regnum = 0;
1940 while (regnum < NUM_REGS)
1941 {
1942 /* If the register name is empty, it is undefined for this
1943 processor, so don't display anything. */
1944 if (REGISTER_NAME (regnum) == NULL
1945 || *(REGISTER_NAME (regnum)) == '\0')
1946 {
1947 regnum++;
1948 continue;
1949 }
1950
1951 if (TYPE_CODE (gdbarch_register_type (gdbarch, regnum)) == TYPE_CODE_FLT)
1952 {
1953 if (fpregs)
1954 {
1955 /* true for "INFO ALL-REGISTERS" command */
1956 sh_do_fp_register (gdbarch, file, regnum); /* FP regs */
1957 regnum ++;
1958 }
1959 else
1960 regnum += (gdbarch_tdep (gdbarch)->FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */
1961 }
1962 else
1963 {
1964 sh_do_register (gdbarch, file, regnum); /* All other regs */
1965 regnum++;
1966 }
1967 }
1968
1969 if (fpregs)
1970 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1971 {
1972 sh_print_pseudo_register (gdbarch, file, regnum);
1973 regnum++;
1974 }
1975 }
1976 }
1977
1978 #ifdef SVR4_SHARED_LIBS
1979
1980 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1981 for native i386 linux targets using the struct offsets defined in
1982 link.h (but without actual reference to that file).
1983
1984 This makes it possible to access i386-linux shared libraries from
1985 a gdb that was not built on an i386-linux host (for cross debugging).
1986 */
1987
1988 struct link_map_offsets *
1989 sh_linux_svr4_fetch_link_map_offsets (void)
1990 {
1991 static struct link_map_offsets lmo;
1992 static struct link_map_offsets *lmp = 0;
1993
1994 if (lmp == 0)
1995 {
1996 lmp = &lmo;
1997
1998 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1999
2000 lmo.r_map_offset = 4;
2001 lmo.r_map_size = 4;
2002
2003 lmo.link_map_size = 20; /* 552 not actual size but all we need */
2004
2005 lmo.l_addr_offset = 0;
2006 lmo.l_addr_size = 4;
2007
2008 lmo.l_name_offset = 4;
2009 lmo.l_name_size = 4;
2010
2011 lmo.l_next_offset = 12;
2012 lmo.l_next_size = 4;
2013
2014 lmo.l_prev_offset = 16;
2015 lmo.l_prev_size = 4;
2016 }
2017
2018 return lmp;
2019 }
2020 #endif /* SVR4_SHARED_LIBS */
2021
2022 \f
2023 enum
2024 {
2025 DSP_DSR_REGNUM = 24,
2026 DSP_A0G_REGNUM,
2027 DSP_A0_REGNUM,
2028 DSP_A1G_REGNUM,
2029 DSP_A1_REGNUM,
2030 DSP_M0_REGNUM,
2031 DSP_M1_REGNUM,
2032 DSP_X0_REGNUM,
2033 DSP_X1_REGNUM,
2034 DSP_Y0_REGNUM,
2035 DSP_Y1_REGNUM,
2036
2037 DSP_MOD_REGNUM = 40,
2038
2039 DSP_RS_REGNUM = 43,
2040 DSP_RE_REGNUM,
2041
2042 DSP_R0_BANK_REGNUM = 51,
2043 DSP_R7_BANK_REGNUM = DSP_R0_BANK_REGNUM + 7
2044 };
2045
2046 static int
2047 sh_dsp_register_sim_regno (int nr)
2048 {
2049 if (legacy_register_sim_regno (nr) < 0)
2050 return legacy_register_sim_regno (nr);
2051 if (nr >= DSP_DSR_REGNUM && nr <= DSP_Y1_REGNUM)
2052 return nr - DSP_DSR_REGNUM + SIM_SH_DSR_REGNUM;
2053 if (nr == DSP_MOD_REGNUM)
2054 return SIM_SH_MOD_REGNUM;
2055 if (nr == DSP_RS_REGNUM)
2056 return SIM_SH_RS_REGNUM;
2057 if (nr == DSP_RE_REGNUM)
2058 return SIM_SH_RE_REGNUM;
2059 if (nr >= DSP_R0_BANK_REGNUM && nr <= DSP_R7_BANK_REGNUM)
2060 return nr - DSP_R0_BANK_REGNUM + SIM_SH_R0_BANK_REGNUM;
2061 return nr;
2062 }
2063 \f
2064 static gdbarch_init_ftype sh_gdbarch_init;
2065
2066 static struct gdbarch *
2067 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2068 {
2069 struct gdbarch *gdbarch;
2070 struct gdbarch_tdep *tdep;
2071
2072 sh_show_regs = sh_generic_show_regs;
2073 switch (info.bfd_arch_info->mach)
2074 {
2075 case bfd_mach_sh2e:
2076 sh_show_regs = sh2e_show_regs;
2077 break;
2078 case bfd_mach_sh_dsp:
2079 sh_show_regs = sh_dsp_show_regs;
2080 break;
2081
2082 case bfd_mach_sh3:
2083 sh_show_regs = sh3_show_regs;
2084 break;
2085
2086 case bfd_mach_sh3e:
2087 sh_show_regs = sh3e_show_regs;
2088 break;
2089
2090 case bfd_mach_sh3_dsp:
2091 sh_show_regs = sh3_dsp_show_regs;
2092 break;
2093
2094 case bfd_mach_sh4:
2095 sh_show_regs = sh4_show_regs;
2096 break;
2097
2098 case bfd_mach_sh5:
2099 sh_show_regs = sh64_show_regs;
2100 /* SH5 is handled entirely in sh64-tdep.c */
2101 return sh64_gdbarch_init (info, arches);
2102 }
2103
2104 /* If there is already a candidate, use it. */
2105 arches = gdbarch_list_lookup_by_info (arches, &info);
2106 if (arches != NULL)
2107 return arches->gdbarch;
2108
2109 /* None found, create a new architecture from the information
2110 provided. */
2111 tdep = XMALLOC (struct gdbarch_tdep);
2112 gdbarch = gdbarch_alloc (&info, tdep);
2113
2114 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2115 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2116 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
2117
2118 /* Initialize the register numbers that are not common to all the
2119 variants to -1, if necessary thse will be overwritten in the case
2120 statement below. */
2121 tdep->FPUL_REGNUM = -1;
2122 tdep->FPSCR_REGNUM = -1;
2123 tdep->DSR_REGNUM = -1;
2124 tdep->FP_LAST_REGNUM = -1;
2125 tdep->A0G_REGNUM = -1;
2126 tdep->A0_REGNUM = -1;
2127 tdep->A1G_REGNUM = -1;
2128 tdep->A1_REGNUM = -1;
2129 tdep->M0_REGNUM = -1;
2130 tdep->M1_REGNUM = -1;
2131 tdep->X0_REGNUM = -1;
2132 tdep->X1_REGNUM = -1;
2133 tdep->Y0_REGNUM = -1;
2134 tdep->Y1_REGNUM = -1;
2135 tdep->MOD_REGNUM = -1;
2136 tdep->RS_REGNUM = -1;
2137 tdep->RE_REGNUM = -1;
2138 tdep->SSR_REGNUM = -1;
2139 tdep->SPC_REGNUM = -1;
2140 tdep->DR0_REGNUM = -1;
2141 tdep->DR_LAST_REGNUM = -1;
2142 tdep->FV0_REGNUM = -1;
2143 tdep->FV_LAST_REGNUM = -1;
2144
2145 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2146 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2147 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2148 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2149 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2150 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2151 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2152 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2153
2154 set_gdbarch_num_regs (gdbarch, SH_DEFAULT_NUM_REGS);
2155 set_gdbarch_sp_regnum (gdbarch, 15);
2156 set_gdbarch_deprecated_fp_regnum (gdbarch, 14);
2157 set_gdbarch_pc_regnum (gdbarch, 16);
2158 set_gdbarch_fp0_regnum (gdbarch, -1);
2159 set_gdbarch_num_pseudo_regs (gdbarch, 0);
2160
2161 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
2162 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2163
2164 set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh);
2165 set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
2166
2167 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2168
2169 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2170 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2171 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2172 set_gdbarch_function_start_offset (gdbarch, 0);
2173
2174 set_gdbarch_frame_args_skip (gdbarch, 0);
2175 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2176 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2177
2178 set_gdbarch_deprecated_frame_chain (gdbarch, sh_frame_chain);
2179 set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
2180 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2181 set_gdbarch_deprecated_pop_frame (gdbarch, sh_pop_frame);
2182 set_gdbarch_deprecated_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2183 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2184 set_gdbarch_frame_align (gdbarch, sh_frame_align);
2185
2186 switch (info.bfd_arch_info->mach)
2187 {
2188 case bfd_mach_sh:
2189 set_gdbarch_register_name (gdbarch, sh_sh_register_name);
2190 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2191 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2192 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2193 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2194 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2195 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2196 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2197
2198 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2199 break;
2200 case bfd_mach_sh2:
2201 set_gdbarch_register_name (gdbarch, sh_sh_register_name);
2202 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2203 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2204 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2205 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2206 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2207 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2208 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2209
2210 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2211 break;
2212 case bfd_mach_sh2e:
2213 /* doubles on sh2e and sh3e are actually 4 byte. */
2214 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2215
2216 set_gdbarch_register_name (gdbarch, sh_sh2e_register_name);
2217 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2218 set_gdbarch_register_type (gdbarch, sh_sh3e_register_type);
2219 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2220 set_gdbarch_fp0_regnum (gdbarch, 25);
2221 set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
2222 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2223 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
2224 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2225 tdep->FPUL_REGNUM = 23;
2226 tdep->FPSCR_REGNUM = 24;
2227 tdep->FP_LAST_REGNUM = 40;
2228
2229 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2230 break;
2231 case bfd_mach_sh_dsp:
2232 set_gdbarch_register_name (gdbarch, sh_sh_dsp_register_name);
2233 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2234 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2235 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2236 set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno);
2237 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2238 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2239 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2240 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2241 tdep->DSR_REGNUM = 24;
2242 tdep->A0G_REGNUM = 25;
2243 tdep->A0_REGNUM = 26;
2244 tdep->A1G_REGNUM = 27;
2245 tdep->A1_REGNUM = 28;
2246 tdep->M0_REGNUM = 29;
2247 tdep->M1_REGNUM = 30;
2248 tdep->X0_REGNUM = 31;
2249 tdep->X1_REGNUM = 32;
2250 tdep->Y0_REGNUM = 33;
2251 tdep->Y1_REGNUM = 34;
2252 tdep->MOD_REGNUM = 40;
2253 tdep->RS_REGNUM = 43;
2254 tdep->RE_REGNUM = 44;
2255
2256 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2257 break;
2258 case bfd_mach_sh3:
2259 set_gdbarch_register_name (gdbarch, sh_sh3_register_name);
2260 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2261 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2262 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2263 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2264 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2265 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2266 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2267 tdep->SSR_REGNUM = 41;
2268 tdep->SPC_REGNUM = 42;
2269
2270 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2271 break;
2272 case bfd_mach_sh3e:
2273 /* doubles on sh2e and sh3e are actually 4 byte. */
2274 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2275
2276 set_gdbarch_register_name (gdbarch, sh_sh3e_register_name);
2277 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2278 set_gdbarch_register_type (gdbarch, sh_sh3e_register_type);
2279 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2280 set_gdbarch_fp0_regnum (gdbarch, 25);
2281 set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
2282 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2283 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
2284 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2285 tdep->FPUL_REGNUM = 23;
2286 tdep->FPSCR_REGNUM = 24;
2287 tdep->FP_LAST_REGNUM = 40;
2288 tdep->SSR_REGNUM = 41;
2289 tdep->SPC_REGNUM = 42;
2290
2291 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2292 break;
2293 case bfd_mach_sh3_dsp:
2294 set_gdbarch_register_name (gdbarch, sh_sh3_dsp_register_name);
2295 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2296 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2297 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2298 set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno);
2299 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2300 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2301 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu);
2302 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2303 tdep->DSR_REGNUM = 24;
2304 tdep->A0G_REGNUM = 25;
2305 tdep->A0_REGNUM = 26;
2306 tdep->A1G_REGNUM = 27;
2307 tdep->A1_REGNUM = 28;
2308 tdep->M0_REGNUM = 29;
2309 tdep->M1_REGNUM = 30;
2310 tdep->X0_REGNUM = 31;
2311 tdep->X1_REGNUM = 32;
2312 tdep->Y0_REGNUM = 33;
2313 tdep->Y1_REGNUM = 34;
2314 tdep->MOD_REGNUM = 40;
2315 tdep->RS_REGNUM = 43;
2316 tdep->RE_REGNUM = 44;
2317 tdep->SSR_REGNUM = 41;
2318 tdep->SPC_REGNUM = 42;
2319
2320 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2321 break;
2322 case bfd_mach_sh4:
2323 set_gdbarch_register_name (gdbarch, sh_sh4_register_name);
2324 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2325 set_gdbarch_register_type (gdbarch, sh_sh4_register_type);
2326 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2327 set_gdbarch_fp0_regnum (gdbarch, 25);
2328 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2329 set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read);
2330 set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write);
2331 set_gdbarch_store_return_value (gdbarch, sh3e_sh4_store_return_value);
2332 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2333 set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
2334 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2335 tdep->FPUL_REGNUM = 23;
2336 tdep->FPSCR_REGNUM = 24;
2337 tdep->FP_LAST_REGNUM = 40;
2338 tdep->SSR_REGNUM = 41;
2339 tdep->SPC_REGNUM = 42;
2340 tdep->DR0_REGNUM = 59;
2341 tdep->DR_LAST_REGNUM = 66;
2342 tdep->FV0_REGNUM = 67;
2343 tdep->FV_LAST_REGNUM = 70;
2344
2345 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2346 break;
2347 default:
2348 set_gdbarch_register_name (gdbarch, sh_generic_register_name);
2349 set_gdbarch_print_registers_info (gdbarch, sh_print_registers_info);
2350 set_gdbarch_register_type (gdbarch, sh_default_register_type);
2351 set_gdbarch_push_dummy_code (gdbarch, sh_push_dummy_code);
2352 set_gdbarch_store_return_value (gdbarch, sh_default_store_return_value);
2353 set_gdbarch_extract_return_value (gdbarch, sh_default_extract_return_value);
2354
2355 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2356 break;
2357 }
2358
2359 /* Hook in ABI-specific overrides, if they have been registered. */
2360 gdbarch_init_osabi (info, gdbarch);
2361
2362 return gdbarch;
2363 }
2364
2365 static void
2366 sh_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2367 {
2368 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2369
2370 if (tdep == NULL)
2371 return;
2372
2373 /* FIXME: dump the rest of gdbarch_tdep. */
2374 }
2375
2376 extern initialize_file_ftype _initialize_sh_tdep; /* -Wmissing-prototypes */
2377
2378 void
2379 _initialize_sh_tdep (void)
2380 {
2381 struct cmd_list_element *c;
2382
2383 gdbarch_register (bfd_arch_sh, sh_gdbarch_init, sh_dump_tdep);
2384
2385 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2386 }
GDB Binutils - Deliverables
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