1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Contributed by Steve Chamberlain
36 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
37 #include "gdb_string.h"
39 /* A set of original names, to be used when restoring back to generic
40 registers from a specific set. */
42 static char *sh_generic_reg_names
[] = {
43 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
44 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
45 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
47 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
48 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
50 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
51 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
54 static char *sh_reg_names
[] = {
55 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
56 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
57 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
59 "", "", "", "", "", "", "", "",
60 "", "", "", "", "", "", "", "",
62 "", "", "", "", "", "", "", "",
63 "", "", "", "", "", "", "", "",
66 static char *sh3_reg_names
[] = {
67 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
68 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
69 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
71 "", "", "", "", "", "", "", "",
72 "", "", "", "", "", "", "", "",
74 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
75 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
78 static char *sh3e_reg_names
[] = {
79 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
80 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
81 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
83 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
84 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
86 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
87 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
93 char **sh_register_names
= sh_generic_reg_names
;
100 sh_processor_type_table
[] =
103 sh_reg_names
, bfd_mach_sh
107 sh3_reg_names
, bfd_mach_sh3
111 sh3e_reg_names
, bfd_mach_sh3e
115 sh3e_reg_names
, bfd_mach_sh4
123 /* Prologue looks like
124 [mov.l <regs>,@-r15]...
130 #define IS_STS(x) ((x) == 0x4f22)
131 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
132 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
133 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
134 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
135 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
136 #define IS_SHLL_R3(x) ((x) == 0x4300)
137 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
138 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
139 #define FPSCR_SZ (1 << 20)
142 /* Should call_function allocate stack space for a struct return? */
144 sh_use_struct_convention (gcc_p
, type
)
148 return (TYPE_LENGTH (type
) > 1);
152 /* Skip any prologue before the guts of a function */
155 sh_skip_prologue (start_pc
)
160 w
= read_memory_integer (start_pc
, 2);
171 w
= read_memory_integer (start_pc
, 2);
177 /* Disassemble an instruction. */
180 gdb_print_insn_sh (memaddr
, info
)
182 disassemble_info
*info
;
184 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
185 return print_insn_sh (memaddr
, info
);
187 return print_insn_shl (memaddr
, info
);
190 /* Given a GDB frame, determine the address of the calling function's frame.
191 This will be used to create a new GDB frame struct, and then
192 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
194 For us, the frame address is its stack pointer value, so we look up
195 the function prologue to determine the caller's sp value, and return it. */
198 sh_frame_chain (frame
)
199 struct frame_info
*frame
;
201 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
202 return frame
->frame
; /* dummy frame same as caller's frame */
203 if (!inside_entry_file (frame
->pc
))
204 return read_memory_integer (FRAME_FP (frame
) + frame
->f_offset
, 4);
209 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
210 we might want to do here is to check REGNUM against the clobber mask, and
211 somehow flag it as invalid if it isn't saved on the stack somewhere. This
212 would provide a graceful failure mode when trying to get the value of
213 caller-saves registers for an inner frame. */
216 sh_find_callers_reg (fi
, regnum
)
217 struct frame_info
*fi
;
220 struct frame_saved_regs fsr
;
222 for (; fi
; fi
= fi
->next
)
223 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
224 /* When the caller requests PR from the dummy frame, we return PC because
225 that's where the previous routine appears to have done a call from. */
226 return generic_read_register_dummy (fi
->pc
, fi
->frame
, regnum
);
229 FRAME_FIND_SAVED_REGS (fi
, fsr
);
230 if (fsr
.regs
[regnum
] != 0)
231 return read_memory_integer (fsr
.regs
[regnum
],
232 REGISTER_RAW_SIZE (regnum
));
234 return read_register (regnum
);
237 /* Put here the code to store, into a struct frame_saved_regs, the
238 addresses of the saved registers of frame described by FRAME_INFO.
239 This includes special registers such as pc and fp saved in special
240 ways in the stack frame. sp is even more special: the address we
241 return for it IS the sp for the next frame. */
244 sh_frame_find_saved_regs (fi
, fsr
)
245 struct frame_info
*fi
;
246 struct frame_saved_regs
*fsr
;
256 char *dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
260 /* DANGER! This is ONLY going to work if the char buffer format of
261 the saved registers is byte-for-byte identical to the
262 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
263 memcpy (&fsr
->regs
, dummy_regs
, sizeof (fsr
));
267 opc
= pc
= get_pc_function_start (fi
->pc
);
269 insn
= read_memory_integer (pc
, 2);
271 fi
->leaf_function
= 1;
274 for (rn
= 0; rn
< NUM_REGS
; rn
++)
279 /* Loop around examining the prologue insns until we find something
280 that does not appear to be part of the prologue. But give up
281 after 20 of them, since we're getting silly then. */
283 while (pc
< opc
+ 20 * 2)
285 /* See where the registers will be saved to */
289 rn
= GET_PUSHED_REG (insn
);
291 insn
= read_memory_integer (pc
, 2);
294 else if (IS_STS (insn
))
297 where
[PR_REGNUM
] = depth
;
298 insn
= read_memory_integer (pc
, 2);
299 /* If we're storing the pr then this isn't a leaf */
300 fi
->leaf_function
= 0;
303 else if (IS_MOV_R3 (insn
))
305 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
307 insn
= read_memory_integer (pc
, 2);
309 else if (IS_SHLL_R3 (insn
))
313 insn
= read_memory_integer (pc
, 2);
315 else if (IS_ADD_R3SP (insn
))
319 insn
= read_memory_integer (pc
, 2);
321 else if (IS_ADD_SP (insn
))
324 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
325 insn
= read_memory_integer (pc
, 2);
327 else if (IS_FMOV (insn
))
330 insn
= read_memory_integer (pc
, 2);
331 if (read_register (FPSCR_REGNUM
) & FPSCR_SZ
)
344 /* Now we know how deep things are, we can work out their addresses */
346 for (rn
= 0; rn
< NUM_REGS
; rn
++)
353 fsr
->regs
[rn
] = fi
->frame
- where
[rn
] + depth
- 4;
363 fsr
->regs
[SP_REGNUM
] = read_memory_integer (fsr
->regs
[FP_REGNUM
], 4);
367 fsr
->regs
[SP_REGNUM
] = fi
->frame
- 4;
370 fi
->f_offset
= depth
- where
[FP_REGNUM
] - 4;
371 /* Work out the return pc - either from the saved pr or the pr
375 /* initialize the extra info saved in a FRAME */
378 sh_init_extra_frame_info (fromleaf
, fi
)
380 struct frame_info
*fi
;
382 struct frame_saved_regs fsr
;
385 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
387 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
389 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
390 by assuming it's always FP. */
391 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
393 fi
->return_pc
= generic_read_register_dummy (fi
->pc
, fi
->frame
,
395 fi
->f_offset
= -(CALL_DUMMY_LENGTH
+ 4);
396 fi
->leaf_function
= 0;
401 FRAME_FIND_SAVED_REGS (fi
, fsr
);
402 fi
->return_pc
= sh_find_callers_reg (fi
, PR_REGNUM
);
406 /* Discard from the stack the innermost frame,
407 restoring all saved registers. */
412 register struct frame_info
*frame
= get_current_frame ();
413 register CORE_ADDR fp
;
415 struct frame_saved_regs fsr
;
417 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
418 generic_pop_dummy_frame ();
421 fp
= FRAME_FP (frame
);
422 get_frame_saved_regs (frame
, &fsr
);
424 /* Copy regs from where they were saved in the frame */
425 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
426 if (fsr
.regs
[regnum
])
427 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
429 write_register (PC_REGNUM
, frame
->return_pc
);
430 write_register (SP_REGNUM
, fp
+ 4);
432 flush_cached_frames ();
435 /* Function: push_arguments
436 Setup the function arguments for calling a function in the inferior.
438 On the Hitachi SH architecture, there are four registers (R4 to R7)
439 which are dedicated for passing function arguments. Up to the first
440 four arguments (depending on size) may go into these registers.
441 The rest go on the stack.
443 Arguments that are smaller than 4 bytes will still take up a whole
444 register or a whole 32-bit word on the stack, and will be
445 right-justified in the register or the stack word. This includes
446 chars, shorts, and small aggregate types.
448 Arguments that are larger than 4 bytes may be split between two or
449 more registers. If there are not enough registers free, an argument
450 may be passed partly in a register (or registers), and partly on the
451 stack. This includes doubles, long longs, and larger aggregates.
452 As far as I know, there is no upper limit to the size of aggregates
453 that will be passed in this way; in other words, the convention of
454 passing a pointer to a large aggregate instead of a copy is not used.
456 An exceptional case exists for struct arguments (and possibly other
457 aggregates such as arrays) if the size is larger than 4 bytes but
458 not a multiple of 4 bytes. In this case the argument is never split
459 between the registers and the stack, but instead is copied in its
460 entirety onto the stack, AND also copied into as many registers as
461 there is room for. In other words, space in registers permitting,
462 two copies of the same argument are passed in. As far as I can tell,
463 only the one on the stack is used, although that may be a function
464 of the level of compiler optimization. I suspect this is a compiler
465 bug. Arguments of these odd sizes are left-justified within the
466 word (as opposed to arguments smaller than 4 bytes, which are
470 If the function is to return an aggregate type such as a struct, it
471 is either returned in the normal return value register R0 (if its
472 size is no greater than one byte), or else the caller must allocate
473 space into which the callee will copy the return value (if the size
474 is greater than one byte). In this case, a pointer to the return
475 value location is passed into the callee in register R2, which does
476 not displace any of the other arguments passed in via registers R4
480 sh_push_arguments (nargs
, args
, sp
, struct_return
, struct_addr
)
484 unsigned char struct_return
;
485 CORE_ADDR struct_addr
;
487 int stack_offset
, stack_alloc
;
495 int odd_sized_struct
;
497 /* first force sp to a 4-byte alignment */
500 /* The "struct return pointer" pseudo-argument has its own dedicated
503 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
505 /* Now make sure there's space on the stack */
506 for (argnum
= 0, stack_alloc
= 0;
507 argnum
< nargs
; argnum
++)
508 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
509 sp
-= stack_alloc
; /* make room on stack for args */
512 /* Now load as many as possible of the first arguments into
513 registers, and push the rest onto the stack. There are 16 bytes
514 in four registers available. Loop thru args from first to last. */
516 argreg
= ARG0_REGNUM
;
517 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
519 type
= VALUE_TYPE (args
[argnum
]);
520 len
= TYPE_LENGTH (type
);
521 memset (valbuf
, 0, sizeof (valbuf
));
523 { /* value gets right-justified in the register or stack word */
524 memcpy (valbuf
+ (4 - len
),
525 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
529 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
531 if (len
> 4 && (len
& 3) != 0)
532 odd_sized_struct
= 1; /* such structs go entirely on stack */
534 odd_sized_struct
= 0;
537 if (argreg
> ARGLAST_REGNUM
|| odd_sized_struct
)
538 { /* must go on the stack */
539 write_memory (sp
+ stack_offset
, val
, 4);
542 /* NOTE WELL!!!!! This is not an "else if" clause!!!
543 That's because some *&^%$ things get passed on the stack
544 AND in the registers! */
545 if (argreg
<= ARGLAST_REGNUM
)
546 { /* there's room in a register */
547 regval
= extract_address (val
, REGISTER_RAW_SIZE (argreg
));
548 write_register (argreg
++, regval
);
550 /* Store the value 4 bytes at a time. This means that things
551 larger than 4 bytes may go partly in registers and partly
553 len
-= REGISTER_RAW_SIZE (argreg
);
554 val
+= REGISTER_RAW_SIZE (argreg
);
560 /* Function: push_return_address (pc)
561 Set up the return address for the inferior function call.
562 Needed for targets where we don't actually execute a JSR/BSR instruction */
565 sh_push_return_address (pc
, sp
)
569 write_register (PR_REGNUM
, CALL_DUMMY_ADDRESS ());
573 /* Function: fix_call_dummy
574 Poke the callee function's address into the destination part of
575 the CALL_DUMMY. The address is actually stored in a data word
576 following the actualy CALL_DUMMY instructions, which will load
577 it into a register using PC-relative addressing. This function
578 expects the CALL_DUMMY to look like this:
589 sh_fix_call_dummy (dummy
, pc
, fun
, nargs
, args
, type
, gcc_p
)
598 *(unsigned long *) (dummy
+ 8) = fun
;
603 /* Modify the actual processor type. */
606 sh_target_architecture_hook (ap
)
607 const bfd_arch_info_type
*ap
;
611 if (ap
->arch
!= bfd_arch_sh
)
614 for (i
= 0; sh_processor_type_table
[i
].regnames
!= NULL
; i
++)
616 if (sh_processor_type_table
[i
].mach
== ap
->mach
)
618 sh_register_names
= sh_processor_type_table
[i
].regnames
;
623 fatal ("Architecture `%s' unreconized", ap
->printable_name
);
626 /* Print the registers in a form similar to the E7000 */
629 sh_show_regs (args
, from_tty
)
634 if (TARGET_ARCHITECTURE
->arch
== bfd_arch_sh
)
635 cpu
= TARGET_ARCHITECTURE
->mach
;
639 /* FIXME: sh4 has more registers */
640 if (cpu
== bfd_mach_sh4
)
643 printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
644 read_register (PC_REGNUM
),
645 read_register (SR_REGNUM
),
646 read_register (PR_REGNUM
),
647 read_register (MACH_REGNUM
),
648 read_register (MACL_REGNUM
));
650 printf_filtered ("GBR=%08x VBR=%08x",
651 read_register (GBR_REGNUM
),
652 read_register (VBR_REGNUM
));
653 if (cpu
== bfd_mach_sh3
|| cpu
== bfd_mach_sh3e
)
655 printf_filtered (" SSR=%08x SPC=%08x",
656 read_register (SSR_REGNUM
),
657 read_register (SPC_REGNUM
));
658 if (cpu
== bfd_mach_sh3e
)
660 printf_filtered (" FPUL=%08x FPSCR=%08x",
661 read_register (FPUL_REGNUM
),
662 read_register (FPSCR_REGNUM
));
666 printf_filtered ("\nR0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
675 printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
684 if (cpu
== bfd_mach_sh3e
)
686 printf_filtered ("FP0-FP7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
687 read_register (FP0_REGNUM
+ 0),
688 read_register (FP0_REGNUM
+ 1),
689 read_register (FP0_REGNUM
+ 2),
690 read_register (FP0_REGNUM
+ 3),
691 read_register (FP0_REGNUM
+ 4),
692 read_register (FP0_REGNUM
+ 5),
693 read_register (FP0_REGNUM
+ 6),
694 read_register (FP0_REGNUM
+ 7));
695 printf_filtered ("FP8-FP15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
696 read_register (FP0_REGNUM
+ 8),
697 read_register (FP0_REGNUM
+ 9),
698 read_register (FP0_REGNUM
+ 10),
699 read_register (FP0_REGNUM
+ 11),
700 read_register (FP0_REGNUM
+ 12),
701 read_register (FP0_REGNUM
+ 13),
702 read_register (FP0_REGNUM
+ 14),
703 read_register (FP0_REGNUM
+ 15));
707 /* Function: extract_return_value
708 Find a function's return value in the appropriate registers (in regbuf),
709 and copy it into valbuf. */
712 sh_extract_return_value (type
, regbuf
, valbuf
)
717 int len
= TYPE_LENGTH (type
);
720 memcpy (valbuf
, ((char *) regbuf
) + 4 - len
, len
);
722 memcpy (valbuf
, ((char *) regbuf
) + 8 - len
, len
);
724 error ("bad size for return value");
728 _initialize_sh_tdep ()
730 struct cmd_list_element
*c
;
732 tm_print_insn
= gdb_print_insn_sh
;
734 target_architecture_hook
= sh_target_architecture_hook
;
736 add_com ("regs", class_vars
, sh_show_regs
, "Print all registers");