1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 Contributed by Steve Chamberlain
37 #include "gdb_string.h"
38 #include "arch-utils.h"
39 #include "floatformat.h"
47 #include "solib-svr4.h"
51 /* registers numbers shared with the simulator */
52 #include "gdb/sim-sh.h"
54 void (*sh_show_regs
) (void);
55 CORE_ADDR (*skip_prologue_hard_way
) (CORE_ADDR
);
56 void (*do_pseudo_register
) (int);
58 #define SH_DEFAULT_NUM_REGS 59
60 /* Define other aspects of the stack frame.
61 we keep a copy of the worked out return pc lying around, since it
62 is a useful bit of info */
64 struct frame_extra_info
72 sh_generic_register_name (int reg_nr
)
74 static char *register_names
[] =
76 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
77 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
78 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
80 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
81 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
83 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
84 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
88 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
90 return register_names
[reg_nr
];
94 sh_sh_register_name (int reg_nr
)
96 static char *register_names
[] =
98 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
99 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
100 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
102 "", "", "", "", "", "", "", "",
103 "", "", "", "", "", "", "", "",
105 "", "", "", "", "", "", "", "",
106 "", "", "", "", "", "", "", "",
110 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
112 return register_names
[reg_nr
];
116 sh_sh3_register_name (int reg_nr
)
118 static char *register_names
[] =
120 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
121 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
122 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
124 "", "", "", "", "", "", "", "",
125 "", "", "", "", "", "", "", "",
127 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
128 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
132 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
134 return register_names
[reg_nr
];
138 sh_sh3e_register_name (int reg_nr
)
140 static char *register_names
[] =
142 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
143 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
144 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
146 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
147 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
149 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
150 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
154 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
156 return register_names
[reg_nr
];
160 sh_sh2e_register_name (int reg_nr
)
162 static char *register_names
[] =
164 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
165 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
166 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
168 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
169 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
171 "", "", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "",
176 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
178 return register_names
[reg_nr
];
182 sh_sh_dsp_register_name (int reg_nr
)
184 static char *register_names
[] =
186 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
187 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
188 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
190 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
191 "y0", "y1", "", "", "", "", "", "mod",
193 "rs", "re", "", "", "", "", "", "",
194 "", "", "", "", "", "", "", "",
198 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
200 return register_names
[reg_nr
];
204 sh_sh3_dsp_register_name (int reg_nr
)
206 static char *register_names
[] =
208 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
209 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
210 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
212 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
213 "y0", "y1", "", "", "", "", "", "mod",
215 "rs", "re", "", "", "", "", "", "",
216 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
217 "", "", "", "", "", "", "", "",
221 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
223 return register_names
[reg_nr
];
227 sh_sh4_register_name (int reg_nr
)
229 static char *register_names
[] =
231 /* general registers 0-15 */
232 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
233 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
235 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
238 /* floating point registers 25 - 40 */
239 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
240 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
244 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
246 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
247 /* double precision (pseudo) 59 - 66 */
248 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
249 /* vectors (pseudo) 67 - 70 */
250 "fv0", "fv4", "fv8", "fv12",
251 /* FIXME: missing XF 71 - 86 */
252 /* FIXME: missing XD 87 - 94 */
256 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
258 return register_names
[reg_nr
];
262 sh_sh64_register_name (int reg_nr
)
264 static char *register_names
[] =
266 /* SH MEDIA MODE (ISA 32) */
267 /* general registers (64-bit) 0-63 */
268 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
269 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
270 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
271 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
272 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
273 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
274 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
275 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
280 /* status reg., saved status reg., saved pc reg. (64-bit) 65-67 */
283 /* target registers (64-bit) 68-75*/
284 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
286 /* floating point state control register (32-bit) 76 */
289 /* single precision floating point registers (32-bit) 77-140*/
290 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
291 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
292 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
293 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31",
294 "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39",
295 "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47",
296 "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55",
297 "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63",
299 /* double precision registers (pseudo) 141-172 */
300 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
301 "dr16", "dr18", "dr20", "dr22", "dr24", "dr26", "dr28", "dr30",
302 "dr32", "dr34", "dr36", "dr38", "dr40", "dr42", "dr44", "dr46",
303 "dr48", "dr50", "dr52", "dr54", "dr56", "dr58", "dr60", "dr62",
305 /* floating point pairs (pseudo) 173-204*/
306 "fp0", "fp2", "fp4", "fp6", "fp8", "fp10", "fp12", "fp14",
307 "fp16", "fp18", "fp20", "fp22", "fp24", "fp26", "fp28", "fp30",
308 "fp32", "fp34", "fp36", "fp38", "fp40", "fp42", "fp44", "fp46",
309 "fp48", "fp50", "fp52", "fp54", "fp56", "fp58", "fp60", "fp62",
311 /* floating point vectors (4 floating point regs) (pseudo) 205-220*/
312 "fv0", "fv4", "fv8", "fv12", "fv16", "fv20", "fv24", "fv28",
313 "fv32", "fv36", "fv40", "fv44", "fv48", "fv52", "fv56", "fv60",
315 /* SH COMPACT MODE (ISA 16) (all pseudo) 221-272*/
316 "r0_c", "r1_c", "r2_c", "r3_c", "r4_c", "r5_c", "r6_c", "r7_c",
317 "r8_c", "r9_c", "r10_c", "r11_c", "r12_c", "r13_c", "r14_c", "r15_c",
319 "gbr_c", "mach_c", "macl_c", "pr_c", "t_c",
321 "fr0_c", "fr1_c", "fr2_c", "fr3_c", "fr4_c", "fr5_c", "fr6_c", "fr7_c",
322 "fr8_c", "fr9_c", "fr10_c", "fr11_c", "fr12_c", "fr13_c", "fr14_c", "fr15_c",
323 "dr0_c", "dr2_c", "dr4_c", "dr6_c", "dr8_c", "dr10_c", "dr12_c", "dr14_c",
324 "fv0_c", "fv4_c", "fv8_c", "fv12_c",
325 /* FIXME!!!! XF0 XF15, XD0 XD14 ?????*/
330 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
332 return register_names
[reg_nr
];
335 #define NUM_PSEUDO_REGS_SH_MEDIA 80
336 #define NUM_PSEUDO_REGS_SH_COMPACT 51
338 static const unsigned char *
339 sh_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
341 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
342 static unsigned char breakpoint
[] = {0xc3, 0xc3};
344 *lenptr
= sizeof (breakpoint
);
348 /* Macros and functions for setting and testing a bit in a minimal
349 symbol that marks it as 32-bit function. The MSB of the minimal
350 symbol's "info" field is used for this purpose. This field is
351 already being used to store the symbol size, so the assumption is
352 that the symbol size cannot exceed 2^31.
354 ELF_MAKE_MSYMBOL_SPECIAL
355 tests whether an ELF symbol is "special", i.e. refers
356 to a 32-bit function, and sets a "special" bit in a
357 minimal symbol to mark it as a 32-bit function
358 MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol
359 MSYMBOL_SIZE returns the size of the minimal symbol, i.e.
360 the "info" field with the "special" bit masked out */
362 #define MSYMBOL_IS_SPECIAL(msym) \
363 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
366 sh64_elf_make_msymbol_special (asymbol
*sym
, struct minimal_symbol
*msym
)
371 if (((elf_symbol_type
*)(sym
))->internal_elf_sym
.st_other
== STO_SH5_ISA32
)
373 MSYMBOL_INFO (msym
) = (char *) (((long) MSYMBOL_INFO (msym
)) | 0x80000000);
374 SYMBOL_VALUE_ADDRESS (msym
) |= 1;
378 /* ISA32 (shmedia) function addresses are odd (bit 0 is set). Here
379 are some macros to test, set, or clear bit 0 of addresses. */
380 #define IS_ISA32_ADDR(addr) ((addr) & 1)
381 #define MAKE_ISA32_ADDR(addr) ((addr) | 1)
382 #define UNMAKE_ISA32_ADDR(addr) ((addr) & ~1)
385 pc_is_isa32 (bfd_vma memaddr
)
387 struct minimal_symbol
*sym
;
389 /* If bit 0 of the address is set, assume this is a
390 ISA32 (shmedia) address. */
391 if (IS_ISA32_ADDR (memaddr
))
394 /* A flag indicating that this is a ISA32 function is stored by elfread.c in
395 the high bit of the info field. Use this to decide if the function is
397 sym
= lookup_minimal_symbol_by_pc (memaddr
);
399 return MSYMBOL_IS_SPECIAL (sym
);
404 static const unsigned char *
405 sh_sh64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
407 /* The BRK instruction for shmedia is
408 01101111 11110101 11111111 11110000
409 which translates in big endian mode to 0x6f, 0xf5, 0xff, 0xf0
410 and in little endian mode to 0xf0, 0xff, 0xf5, 0x6f */
412 /* The BRK instruction for shcompact is
414 which translates in big endian mode to 0x0, 0x3b
415 and in little endian mode to 0x3b, 0x0*/
417 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
419 if (pc_is_isa32 (*pcptr
))
421 static unsigned char big_breakpoint_media
[] = {0x6f, 0xf5, 0xff, 0xf0};
422 *pcptr
= UNMAKE_ISA32_ADDR (*pcptr
);
423 *lenptr
= sizeof (big_breakpoint_media
);
424 return big_breakpoint_media
;
428 static unsigned char big_breakpoint_compact
[] = {0x0, 0x3b};
429 *lenptr
= sizeof (big_breakpoint_compact
);
430 return big_breakpoint_compact
;
435 if (pc_is_isa32 (*pcptr
))
437 static unsigned char little_breakpoint_media
[] = {0xf0, 0xff, 0xf5, 0x6f};
438 *pcptr
= UNMAKE_ISA32_ADDR (*pcptr
);
439 *lenptr
= sizeof (little_breakpoint_media
);
440 return little_breakpoint_media
;
444 static unsigned char little_breakpoint_compact
[] = {0x3b, 0x0};
445 *lenptr
= sizeof (little_breakpoint_compact
);
446 return little_breakpoint_compact
;
451 /* Prologue looks like
452 [mov.l <regs>,@-r15]...
457 Actually it can be more complicated than this. For instance, with
475 /* PTABS/L Rn, TRa 0110101111110001nnnnnnl00aaa0000
476 with l=1 and n = 18 0110101111110001010010100aaa0000 */
477 #define IS_PTABSL_R18(x) (((x) & 0xffffff8f) == 0x6bf14a00)
479 /* STS.L PR,@-r0 0100000000100010
480 r0-4-->r0, PR-->(r0) */
481 #define IS_STS_R0(x) ((x) == 0x4022)
483 /* STS PR, Rm 0000mmmm00101010
485 #define IS_STS_PR(x) (((x) & 0xf0ff) == 0x2a)
487 /* MOV.L Rm,@(disp,r15) 00011111mmmmdddd
489 #define IS_MOV_TO_R15(x) (((x) & 0xff00) == 0x1f00)
491 /* MOV.L R14,@(disp,r15) 000111111110dddd
492 R14-->(dispx4+r15) */
493 #define IS_MOV_R14(x) (((x) & 0xfff0) == 0x1fe0)
495 /* ST.Q R14, disp, R18 101011001110dddddddddd0100100000
496 R18-->(dispx8+R14) */
497 #define IS_STQ_R18_R14(x) (((x) & 0xfff003ff) == 0xace00120)
499 /* ST.Q R15, disp, R18 101011001111dddddddddd0100100000
500 R18-->(dispx8+R15) */
501 #define IS_STQ_R18_R15(x) (((x) & 0xfff003ff) == 0xacf00120)
503 /* ST.L R15, disp, R18 101010001111dddddddddd0100100000
504 R18-->(dispx4+R15) */
505 #define IS_STL_R18_R15(x) (((x) & 0xfff003ff) == 0xa8f00120)
507 /* ST.Q R15, disp, R14 1010 1100 1111 dddd dddd dd00 1110 0000
508 R14-->(dispx8+R15) */
509 #define IS_STQ_R14_R15(x) (((x) & 0xfff003ff) == 0xacf000e0)
511 /* ST.L R15, disp, R14 1010 1000 1111 dddd dddd dd00 1110 0000
512 R14-->(dispx4+R15) */
513 #define IS_STL_R14_R15(x) (((x) & 0xfff003ff) == 0xa8f000e0)
515 /* ADDI.L R15,imm,R15 1101 0100 1111 ssss ssss ss00 1111 0000
517 #define IS_ADDIL_SP_MEDIA(x) (((x) & 0xfff003ff) == 0xd4f000f0)
519 /* ADDI R15,imm,R15 1101 0000 1111 ssss ssss ss00 1111 0000
521 #define IS_ADDI_SP_MEDIA(x) (((x) & 0xfff003ff) == 0xd0f000f0)
523 /* ADD.L R15,R63,R14 0000 0000 1111 1000 1111 1100 1110 0000
525 #define IS_ADDL_SP_FP_MEDIA(x) ((x) == 0x00f8fce0)
527 /* ADD R15,R63,R14 0000 0000 1111 1001 1111 1100 1110 0000
529 #define IS_ADD_SP_FP_MEDIA(x) ((x) == 0x00f9fce0)
531 #define IS_MOV_SP_FP_MEDIA(x) (IS_ADDL_SP_FP_MEDIA(x) || IS_ADD_SP_FP_MEDIA(x))
533 /* MOV #imm, R0 1110 0000 ssss ssss
535 #define IS_MOV_R0(x) (((x) & 0xff00) == 0xe000)
537 /* MOV.L @(disp,PC), R0 1101 0000 iiii iiii */
538 #define IS_MOVL_R0(x) (((x) & 0xff00) == 0xd000)
540 /* ADD r15,r0 0011 0000 1111 1100
542 #define IS_ADD_SP_R0(x) ((x) == 0x30fc)
544 /* MOV.L R14 @-R0 0010 0000 1110 0110
545 R14-->(R0-4), R0-4-->R0 */
546 #define IS_MOV_R14_R0(x) ((x) == 0x20e6)
548 /* ADD Rm,R63,Rn Rm+R63-->Rn 0000 00mm mmmm 1001 1111 11nn nnnn 0000
549 where Rm is one of r2-r9 which are the argument registers. */
550 /* FIXME: Recognize the float and double register moves too! */
551 #define IS_MEDIA_IND_ARG_MOV(x) \
552 ((((x) & 0xfc0ffc0f) == 0x0009fc00) && (((x) & 0x03f00000) >= 0x00200000 && ((x) & 0x03f00000) <= 0x00900000))
554 /* ST.Q Rn,0,Rm Rm-->Rn+0 1010 11nn nnnn 0000 0000 00mm mmmm 0000
555 or ST.L Rn,0,Rm Rm-->Rn+0 1010 10nn nnnn 0000 0000 00mm mmmm 0000
556 where Rm is one of r2-r9 which are the argument registers. */
557 #define IS_MEDIA_ARG_MOV(x) \
558 (((((x) & 0xfc0ffc0f) == 0xac000000) || (((x) & 0xfc0ffc0f) == 0xa8000000)) \
559 && (((x) & 0x000003f0) >= 0x00000020 && ((x) & 0x000003f0) <= 0x00000090))
561 /* ST.B R14,0,Rn Rn-->(R14+0) 1010 0000 1110 0000 0000 00nn nnnn 0000*/
562 /* ST.W R14,0,Rn Rn-->(R14+0) 1010 0100 1110 0000 0000 00nn nnnn 0000*/
563 /* ST.L R14,0,Rn Rn-->(R14+0) 1010 1000 1110 0000 0000 00nn nnnn 0000*/
564 /* FST.S R14,0,FRn Rn-->(R14+0) 1011 0100 1110 0000 0000 00nn nnnn 0000*/
565 /* FST.D R14,0,DRn Rn-->(R14+0) 1011 1100 1110 0000 0000 00nn nnnn 0000*/
566 #define IS_MEDIA_MOV_TO_R14(x) \
567 ((((x) & 0xfffffc0f) == 0xa0e00000) \
568 || (((x) & 0xfffffc0f) == 0xa4e00000) \
569 || (((x) & 0xfffffc0f) == 0xa8e00000) \
570 || (((x) & 0xfffffc0f) == 0xb4e00000) \
571 || (((x) & 0xfffffc0f) == 0xbce00000))
573 /* MOV Rm, Rn Rm-->Rn 0110 nnnn mmmm 0011
575 #define IS_COMPACT_IND_ARG_MOV(x) \
576 ((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0020) && (((x) & 0x00f0) <= 0x0090))
578 /* compact direct arg move!
579 MOV.L Rn, @r14 0010 1110 mmmm 0010 */
580 #define IS_COMPACT_ARG_MOV(x) \
581 (((((x) & 0xff0f) == 0x2e02) && (((x) & 0x00f0) >= 0x0020) && ((x) & 0x00f0) <= 0x0090))
583 /* MOV.B Rm, @R14 0010 1110 mmmm 0000
584 MOV.W Rm, @R14 0010 1110 mmmm 0001 */
585 #define IS_COMPACT_MOV_TO_R14(x) \
586 ((((x) & 0xff0f) == 0x2e00) || (((x) & 0xff0f) == 0x2e01))
588 #define IS_JSR_R0(x) ((x) == 0x400b)
589 #define IS_NOP(x) ((x) == 0x0009)
592 /* STS.L PR,@-r15 0100111100100010
593 r15-4-->r15, PR-->(r15) */
594 #define IS_STS(x) ((x) == 0x4f22)
596 /* MOV.L Rm,@-r15 00101111mmmm0110
597 r15-4-->r15, Rm-->(R15) */
598 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
600 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
602 /* MOV r15,r14 0110111011110011
604 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
606 /* ADD #imm,r15 01111111iiiiiiii
608 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
610 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
611 #define IS_SHLL_R3(x) ((x) == 0x4300)
613 /* ADD r3,r15 0011111100111100
615 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
617 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
618 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
619 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
620 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
622 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
623 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
624 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
625 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
626 #define IS_ARG_MOV(x) \
627 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
628 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
629 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
631 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
632 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
633 #define IS_MOV_TO_R14(x) \
634 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
636 #define FPSCR_SZ (1 << 20)
638 /* Skip any prologue before the guts of a function */
640 /* Skip the prologue using the debug information. If this fails we'll
641 fall back on the 'guess' method below. */
643 after_prologue (CORE_ADDR pc
)
645 struct symtab_and_line sal
;
646 CORE_ADDR func_addr
, func_end
;
648 /* If we can not find the symbol in the partial symbol table, then
649 there is no hope we can determine the function's start address
651 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
654 /* Get the line associated with FUNC_ADDR. */
655 sal
= find_pc_line (func_addr
, 0);
657 /* There are only two cases to consider. First, the end of the source line
658 is within the function bounds. In that case we return the end of the
659 source line. Second is the end of the source line extends beyond the
660 bounds of the current function. We need to use the slow code to
661 examine instructions in that case. */
662 if (sal
.end
< func_end
)
668 /* Here we look at each instruction in the function, and try to guess
669 where the prologue ends. Unfortunately this is not always
672 sh_skip_prologue_hard_way (CORE_ADDR start_pc
)
680 for (here
= start_pc
, end
= start_pc
+ (2 * 28); here
< end
;)
682 int w
= read_memory_integer (here
, 2);
684 if (IS_FMOV (w
) || IS_PUSH (w
) || IS_STS (w
) || IS_MOV_R3 (w
)
685 || IS_ADD_R3SP (w
) || IS_ADD_SP (w
) || IS_SHLL_R3 (w
)
686 || IS_ARG_MOV (w
) || IS_MOV_TO_R14 (w
))
690 else if (IS_MOV_SP_FP (w
))
696 /* Don't bail out yet, if we are before the copy of sp. */
705 look_for_args_moves (CORE_ADDR start_pc
, int media_mode
)
709 int insn_size
= (media_mode
? 4 : 2);
711 for (here
= start_pc
, end
= start_pc
+ (insn_size
* 28); here
< end
;)
715 w
= read_memory_integer (UNMAKE_ISA32_ADDR (here
), insn_size
);
717 if (IS_MEDIA_IND_ARG_MOV (w
))
719 /* This must be followed by a store to r14, so the argument
720 is where the debug info says it is. This can happen after
721 the SP has been saved, unfortunately. */
723 int next_insn
= read_memory_integer (UNMAKE_ISA32_ADDR (here
),
726 if (IS_MEDIA_MOV_TO_R14 (next_insn
))
729 else if (IS_MEDIA_ARG_MOV (w
))
731 /* These instructions store directly the argument in r14. */
739 w
= read_memory_integer (here
, insn_size
);
742 if (IS_COMPACT_IND_ARG_MOV (w
))
744 /* This must be followed by a store to r14, so the argument
745 is where the debug info says it is. This can happen after
746 the SP has been saved, unfortunately. */
748 int next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
750 if (IS_COMPACT_MOV_TO_R14 (next_insn
))
753 else if (IS_COMPACT_ARG_MOV (w
))
755 /* These instructions store directly the argument in r14. */
758 else if (IS_MOVL_R0 (w
))
760 /* There is a function that gcc calls to get the arguments
761 passed correctly to the function. Only after this
762 function call the arguments will be found at the place
763 where they are supposed to be. This happens in case the
764 argument has to be stored into a 64-bit register (for
765 instance doubles, long longs). SHcompact doesn't have
766 access to the full 64-bits, so we store the register in
767 stack slot and store the address of the stack slot in
768 the register, then do a call through a wrapper that
769 loads the memory value into the register. A SHcompact
770 callee calls an argument decoder
771 (GCC_shcompact_incoming_args) that stores the 64-bit
772 value in a stack slot and stores the address of the
773 stack slot in the register. GCC thinks the argument is
774 just passed by transparent reference, but this is only
775 true after the argument decoder is called. Such a call
776 needs to be considered part of the prologue. */
778 /* This must be followed by a JSR @r0 instruction and by
779 a NOP instruction. After these, the prologue is over! */
781 int next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
783 if (IS_JSR_R0 (next_insn
))
785 next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
788 if (IS_NOP (next_insn
))
801 sh64_skip_prologue_hard_way (CORE_ADDR start_pc
)
811 if (pc_is_isa32 (start_pc
) == 0)
817 for (here
= start_pc
, end
= start_pc
+ (insn_size
* 28); here
< end
;)
822 int w
= read_memory_integer (UNMAKE_ISA32_ADDR (here
), insn_size
);
824 if (IS_STQ_R18_R14 (w
) || IS_STQ_R18_R15 (w
) || IS_STQ_R14_R15 (w
)
825 || IS_STL_R14_R15 (w
) || IS_STL_R18_R15 (w
)
826 || IS_ADDIL_SP_MEDIA (w
) || IS_ADDI_SP_MEDIA (w
) || IS_PTABSL_R18 (w
))
830 else if (IS_MOV_SP_FP (w
) || IS_MOV_SP_FP_MEDIA(w
))
838 /* Don't bail out yet, we may have arguments stored in
839 registers here, according to the debug info, so that
840 gdb can print the frames correctly. */
841 start_pc
= look_for_args_moves (here
- insn_size
, media_mode
);
847 int w
= 0xffff & read_memory_integer (here
, insn_size
);
850 if (IS_STS_R0 (w
) || IS_STS_PR (w
)
851 || IS_MOV_TO_R15 (w
) || IS_MOV_R14 (w
)
852 || IS_MOV_R0 (w
) || IS_ADD_SP_R0 (w
) || IS_MOV_R14_R0 (w
))
856 else if (IS_MOV_SP_FP (w
))
864 /* Don't bail out yet, we may have arguments stored in
865 registers here, according to the debug info, so that
866 gdb can print the frames correctly. */
867 start_pc
= look_for_args_moves (here
- insn_size
, media_mode
);
877 sh_skip_prologue (CORE_ADDR pc
)
879 CORE_ADDR post_prologue_pc
;
881 /* See if we can determine the end of the prologue via the symbol table.
882 If so, then return either PC, or the PC after the prologue, whichever
884 post_prologue_pc
= after_prologue (pc
);
886 /* If after_prologue returned a useful address, then use it. Else
887 fall back on the instruction skipping code. */
888 if (post_prologue_pc
!= 0)
889 return max (pc
, post_prologue_pc
);
891 return (skip_prologue_hard_way (pc
));
894 /* Immediately after a function call, return the saved pc.
895 Can't always go through the frames for this because on some machines
896 the new frame is not set up until the new function executes
899 The return address is the value saved in the PR register + 4 */
901 sh_saved_pc_after_call (struct frame_info
*frame
)
903 return (ADDR_BITS_REMOVE (read_register (gdbarch_tdep (current_gdbarch
)->PR_REGNUM
)));
906 /* Should call_function allocate stack space for a struct return? */
908 sh_use_struct_convention (int gcc_p
, struct type
*type
)
911 return (TYPE_LENGTH (type
) > 1);
913 int len
= TYPE_LENGTH (type
);
914 int nelem
= TYPE_NFIELDS (type
);
915 return ((len
!= 1 && len
!= 2 && len
!= 4 && len
!= 8) || nelem
!= 1) &&
916 (len
!= 8 || TYPE_LENGTH (TYPE_FIELD_TYPE (type
, 0)) != 4);
921 sh64_use_struct_convention (int gcc_p
, struct type
*type
)
923 return (TYPE_LENGTH (type
) > 8);
926 /* Store the address of the place in which to copy the structure the
927 subroutine will return. This is called from call_function.
929 We store structs through a pointer passed in R2 */
931 sh_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
933 write_register (STRUCT_RETURN_REGNUM
, (addr
));
936 /* Disassemble an instruction. */
938 gdb_print_insn_sh (bfd_vma memaddr
, disassemble_info
*info
)
940 info
->endian
= TARGET_BYTE_ORDER
;
941 return print_insn_sh (memaddr
, info
);
944 /* Given a GDB frame, determine the address of the calling function's
945 frame. This will be used to create a new GDB frame struct, and
946 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
947 will be called for the new frame.
949 For us, the frame address is its stack pointer value, so we look up
950 the function prologue to determine the caller's sp value, and return it. */
952 sh_frame_chain (struct frame_info
*frame
)
954 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
955 get_frame_base (frame
),
956 get_frame_base (frame
)))
957 return get_frame_base (frame
); /* dummy frame same as caller's frame */
958 if (get_frame_pc (frame
) && !inside_entry_file (get_frame_pc (frame
)))
959 return read_memory_integer (get_frame_base (frame
)
960 + get_frame_extra_info (frame
)->f_offset
, 4);
965 /* Given a register number RN as it appears in an assembly
966 instruction, find the corresponding register number in the GDB
969 translate_insn_rn (int rn
, int media_mode
)
971 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
973 /* FIXME: this assumes that the number rn is for a not pseudo
979 /* These registers don't have a corresponding compact one. */
980 /* FIXME: This is probably not enough. */
982 if ((rn
>= 16 && rn
<= 63) || (rn
>= 93 && rn
<= 140))
985 if (rn
>= 0 && rn
<= tdep
->R0_C_REGNUM
)
986 return tdep
->R0_C_REGNUM
+ rn
;
993 sh64_frame_chain (struct frame_info
*frame
)
995 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
996 get_frame_base (frame
),
997 get_frame_base (frame
)))
998 return get_frame_base (frame
); /* dummy frame same as caller's frame */
999 if (get_frame_pc (frame
) && !inside_entry_file (get_frame_pc (frame
)))
1001 int media_mode
= pc_is_isa32 (get_frame_pc (frame
));
1003 if (gdbarch_tdep (current_gdbarch
)->sh_abi
== SH_ABI_32
)
1006 size
= REGISTER_RAW_SIZE (translate_insn_rn (DEPRECATED_FP_REGNUM
, media_mode
));
1007 return read_memory_integer (get_frame_base (frame
)
1008 + get_frame_extra_info (frame
)->f_offset
,
1015 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
1016 we might want to do here is to check REGNUM against the clobber mask, and
1017 somehow flag it as invalid if it isn't saved on the stack somewhere. This
1018 would provide a graceful failure mode when trying to get the value of
1019 caller-saves registers for an inner frame. */
1021 sh_find_callers_reg (struct frame_info
*fi
, int regnum
)
1023 for (; fi
; fi
= get_next_frame (fi
))
1024 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
1025 get_frame_base (fi
)))
1026 /* When the caller requests PR from the dummy frame, we return PC because
1027 that's where the previous routine appears to have done a call from. */
1028 return deprecated_read_register_dummy (get_frame_pc (fi
),
1029 get_frame_base (fi
), regnum
);
1032 DEPRECATED_FRAME_INIT_SAVED_REGS (fi
);
1033 if (!get_frame_pc (fi
))
1035 if (get_frame_saved_regs (fi
)[regnum
] != 0)
1036 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
1037 REGISTER_RAW_SIZE (regnum
));
1039 return read_register (regnum
);
1043 sh64_get_saved_pr (struct frame_info
*fi
, int pr_regnum
)
1047 for (; fi
; fi
= get_next_frame (fi
))
1048 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
1049 get_frame_base (fi
)))
1050 /* When the caller requests PR from the dummy frame, we return PC because
1051 that's where the previous routine appears to have done a call from. */
1052 return deprecated_read_register_dummy (get_frame_pc (fi
),
1053 get_frame_base (fi
), pr_regnum
);
1056 DEPRECATED_FRAME_INIT_SAVED_REGS (fi
);
1057 if (!get_frame_pc (fi
))
1060 media_mode
= pc_is_isa32 (get_frame_pc (fi
));
1062 if (get_frame_saved_regs (fi
)[pr_regnum
] != 0)
1064 int gdb_reg_num
= translate_insn_rn (pr_regnum
, media_mode
);
1065 int size
= ((gdbarch_tdep (current_gdbarch
)->sh_abi
== SH_ABI_32
)
1067 : REGISTER_RAW_SIZE (gdb_reg_num
));
1068 return read_memory_integer (get_frame_saved_regs (fi
)[pr_regnum
], size
);
1071 return read_register (pr_regnum
);
1074 /* Put here the code to store, into a struct frame_saved_regs, the
1075 addresses of the saved registers of frame described by FRAME_INFO.
1076 This includes special registers such as pc and fp saved in special
1077 ways in the stack frame. sp is even more special: the address we
1078 return for it IS the sp for the next frame. */
1080 sh_nofp_frame_init_saved_regs (struct frame_info
*fi
)
1082 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof(int));
1090 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
),
1091 get_frame_base (fi
));
1093 if (get_frame_saved_regs (fi
) == NULL
)
1094 frame_saved_regs_zalloc (fi
);
1096 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
1100 /* DANGER! This is ONLY going to work if the char buffer format of
1101 the saved registers is byte-for-byte identical to the
1102 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
1103 memcpy (get_frame_saved_regs (fi
), dummy_regs
, SIZEOF_FRAME_SAVED_REGS
);
1107 get_frame_extra_info (fi
)->leaf_function
= 1;
1108 get_frame_extra_info (fi
)->f_offset
= 0;
1110 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1115 /* Loop around examining the prologue insns until we find something
1116 that does not appear to be part of the prologue. But give up
1117 after 20 of them, since we're getting silly then. */
1119 pc
= get_frame_func (fi
);
1122 deprecated_update_frame_pc_hack (fi
, 0);
1126 for (opc
= pc
+ (2 * 28); pc
< opc
; pc
+= 2)
1128 insn
= read_memory_integer (pc
, 2);
1129 /* See where the registers will be saved to */
1132 rn
= GET_PUSHED_REG (insn
);
1136 else if (IS_STS (insn
))
1138 where
[gdbarch_tdep (current_gdbarch
)->PR_REGNUM
] = depth
;
1139 /* If we're storing the pr then this isn't a leaf */
1140 get_frame_extra_info (fi
)->leaf_function
= 0;
1143 else if (IS_MOV_R3 (insn
))
1145 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
1147 else if (IS_SHLL_R3 (insn
))
1151 else if (IS_ADD_R3SP (insn
))
1155 else if (IS_ADD_SP (insn
))
1157 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
1159 else if (IS_MOV_SP_FP (insn
))
1161 #if 0 /* This used to just stop when it found an instruction that
1162 was not considered part of the prologue. Now, we just
1163 keep going looking for likely instructions. */
1169 /* Now we know how deep things are, we can work out their addresses */
1171 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1175 if (rn
== DEPRECATED_FP_REGNUM
)
1178 get_frame_saved_regs (fi
)[rn
] = get_frame_base (fi
) - where
[rn
] + depth
- 4;
1182 get_frame_saved_regs (fi
)[rn
] = 0;
1188 get_frame_saved_regs (fi
)[SP_REGNUM
] = read_memory_integer (get_frame_saved_regs (fi
)[DEPRECATED_FP_REGNUM
], 4);
1192 get_frame_saved_regs (fi
)[SP_REGNUM
] = get_frame_base (fi
) - 4;
1195 get_frame_extra_info (fi
)->f_offset
= depth
- where
[DEPRECATED_FP_REGNUM
] - 4;
1196 /* Work out the return pc - either from the saved pr or the pr
1200 /* For vectors of 4 floating point registers. */
1202 fv_reg_base_num (int fv_regnum
)
1206 fp_regnum
= FP0_REGNUM
+
1207 (fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
) * 4;
1211 /* For double precision floating point registers, i.e 2 fp regs.*/
1213 dr_reg_base_num (int dr_regnum
)
1217 fp_regnum
= FP0_REGNUM
+
1218 (dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
) * 2;
1222 /* For pairs of floating point registers */
1224 fpp_reg_base_num (int fpp_regnum
)
1228 fp_regnum
= FP0_REGNUM
+
1229 (fpp_regnum
- gdbarch_tdep (current_gdbarch
)->FPP0_REGNUM
) * 2;
1234 is_media_pseudo (int rn
)
1236 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1238 return (rn
>= tdep
->DR0_REGNUM
1239 && rn
<= tdep
->FV_LAST_REGNUM
);
1243 sh64_get_gdb_regnum (int gcc_regnum
, CORE_ADDR pc
)
1245 return translate_insn_rn (gcc_regnum
, pc_is_isa32 (pc
));
1249 sh64_media_reg_base_num (int reg_nr
)
1251 int base_regnum
= -1;
1252 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1254 if (reg_nr
>= tdep
->DR0_REGNUM
1255 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
1256 base_regnum
= dr_reg_base_num (reg_nr
);
1258 else if (reg_nr
>= tdep
->FPP0_REGNUM
1259 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
1260 base_regnum
= fpp_reg_base_num (reg_nr
);
1262 else if (reg_nr
>= tdep
->FV0_REGNUM
1263 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
1264 base_regnum
= fv_reg_base_num (reg_nr
);
1271 SH COMPACT MODE (ISA 16) (all pseudo) 221-272
1272 GDB_REGNUM BASE_REGNUM
1332 sh64_compact_reg_base_num (int reg_nr
)
1334 int base_regnum
= -1;
1335 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1337 /* general register N maps to general register N */
1338 if (reg_nr
>= tdep
->R0_C_REGNUM
1339 && reg_nr
<= tdep
->R_LAST_C_REGNUM
)
1340 base_regnum
= reg_nr
- tdep
->R0_C_REGNUM
;
1342 /* floating point register N maps to floating point register N */
1343 else if (reg_nr
>= tdep
->FP0_C_REGNUM
1344 && reg_nr
<= tdep
->FP_LAST_C_REGNUM
)
1345 base_regnum
= reg_nr
- tdep
->FP0_C_REGNUM
+ FP0_REGNUM
;
1347 /* double prec register N maps to base regnum for double prec register N */
1348 else if (reg_nr
>= tdep
->DR0_C_REGNUM
1349 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
)
1350 base_regnum
= dr_reg_base_num (tdep
->DR0_REGNUM
1351 + reg_nr
- tdep
->DR0_C_REGNUM
);
1353 /* vector N maps to base regnum for vector register N */
1354 else if (reg_nr
>= tdep
->FV0_C_REGNUM
1355 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
1356 base_regnum
= fv_reg_base_num (tdep
->FV0_REGNUM
1357 + reg_nr
- tdep
->FV0_C_REGNUM
);
1359 else if (reg_nr
== tdep
->PC_C_REGNUM
)
1360 base_regnum
= PC_REGNUM
;
1362 else if (reg_nr
== tdep
->GBR_C_REGNUM
)
1365 else if (reg_nr
== tdep
->MACH_C_REGNUM
1366 || reg_nr
== tdep
->MACL_C_REGNUM
)
1369 else if (reg_nr
== tdep
->PR_C_REGNUM
)
1372 else if (reg_nr
== tdep
->T_C_REGNUM
)
1375 else if (reg_nr
== tdep
->FPSCR_C_REGNUM
)
1376 base_regnum
= tdep
->FPSCR_REGNUM
; /*???? this register is a mess. */
1378 else if (reg_nr
== tdep
->FPUL_C_REGNUM
)
1379 base_regnum
= FP0_REGNUM
+ 32;
1384 /* Given a register number RN (according to the gdb scheme) , return
1385 its corresponding architectural register. In media mode, only a
1386 subset of the registers is pseudo registers. For compact mode, all
1387 the registers are pseudo. */
1389 translate_rn_to_arch_reg_num (int rn
, int media_mode
)
1394 if (!is_media_pseudo (rn
))
1397 return sh64_media_reg_base_num (rn
);
1400 /* All compact registers are pseudo. */
1401 return sh64_compact_reg_base_num (rn
);
1405 sign_extend (int value
, int bits
)
1407 value
= value
& ((1 << bits
) - 1);
1408 return (value
& (1 << (bits
- 1))
1409 ? value
| (~((1 << bits
) - 1))
1414 sh64_nofp_frame_init_saved_regs (struct frame_info
*fi
)
1416 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof (int));
1428 int gdb_register_number
;
1429 int register_number
;
1430 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
), get_frame_base (fi
));
1431 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1433 if (get_frame_saved_regs (fi
) == NULL
)
1434 frame_saved_regs_zalloc (fi
);
1436 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
1440 /* DANGER! This is ONLY going to work if the char buffer format of
1441 the saved registers is byte-for-byte identical to the
1442 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
1443 memcpy (get_frame_saved_regs (fi
), dummy_regs
, SIZEOF_FRAME_SAVED_REGS
);
1447 get_frame_extra_info (fi
)->leaf_function
= 1;
1448 get_frame_extra_info (fi
)->f_offset
= 0;
1450 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1455 /* Loop around examining the prologue insns until we find something
1456 that does not appear to be part of the prologue. But give up
1457 after 20 of them, since we're getting silly then. */
1459 pc
= get_frame_func (fi
);
1462 deprecated_update_frame_pc_hack (fi
, 0);
1466 if (pc_is_isa32 (pc
))
1477 /* The frame pointer register is general register 14 in shmedia and
1478 shcompact modes. In sh compact it is a pseudo register. Same goes
1479 for the stack pointer register, which is register 15. */
1480 fp_regnum
= translate_insn_rn (DEPRECATED_FP_REGNUM
, media_mode
);
1481 sp_regnum
= translate_insn_rn (SP_REGNUM
, media_mode
);
1483 for (opc
= pc
+ (insn_size
* 28); pc
< opc
; pc
+= insn_size
)
1485 insn
= read_memory_integer (media_mode
? UNMAKE_ISA32_ADDR (pc
) : pc
,
1488 if (media_mode
== 0)
1490 if (IS_STS_PR (insn
))
1492 int next_insn
= read_memory_integer (pc
+ insn_size
, insn_size
);
1493 if (IS_MOV_TO_R15 (next_insn
))
1495 int reg_nr
= tdep
->PR_C_REGNUM
;
1497 where
[reg_nr
] = depth
- ((((next_insn
& 0xf) ^ 0x8) - 0x8) << 2);
1498 get_frame_extra_info (fi
)->leaf_function
= 0;
1502 else if (IS_MOV_R14 (insn
))
1504 where
[fp_regnum
] = depth
- ((((insn
& 0xf) ^ 0x8) - 0x8) << 2);
1507 else if (IS_MOV_R0 (insn
))
1509 /* Put in R0 the offset from SP at which to store some
1510 registers. We are interested in this value, because it
1511 will tell us where the given registers are stored within
1513 r0_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
1515 else if (IS_ADD_SP_R0 (insn
))
1517 /* This instruction still prepares r0, but we don't care.
1518 We already have the offset in r0_val. */
1520 else if (IS_STS_R0 (insn
))
1522 /* Store PR at r0_val-4 from SP. Decrement r0 by 4*/
1523 int reg_nr
= tdep
->PR_C_REGNUM
;
1524 where
[reg_nr
] = depth
- (r0_val
- 4);
1526 get_frame_extra_info (fi
)->leaf_function
= 0;
1528 else if (IS_MOV_R14_R0 (insn
))
1530 /* Store R14 at r0_val-4 from SP. Decrement r0 by 4 */
1531 where
[fp_regnum
] = depth
- (r0_val
- 4);
1535 else if (IS_ADD_SP (insn
))
1537 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
1539 else if (IS_MOV_SP_FP (insn
))
1544 if (IS_ADDIL_SP_MEDIA (insn
)
1545 || IS_ADDI_SP_MEDIA (insn
))
1547 depth
-= sign_extend ((((insn
& 0xffc00) ^ 0x80000) - 0x80000) >> 10, 9);
1550 else if (IS_STQ_R18_R15 (insn
))
1552 where
[tdep
->PR_REGNUM
] =
1553 depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 3);
1554 get_frame_extra_info (fi
)->leaf_function
= 0;
1557 else if (IS_STL_R18_R15 (insn
))
1559 where
[tdep
->PR_REGNUM
] =
1560 depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 2);
1561 get_frame_extra_info (fi
)->leaf_function
= 0;
1564 else if (IS_STQ_R14_R15 (insn
))
1566 where
[fp_regnum
] = depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 3);
1569 else if (IS_STL_R14_R15 (insn
))
1571 where
[fp_regnum
] = depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 2);
1574 else if (IS_MOV_SP_FP_MEDIA (insn
))
1579 /* Now we know how deep things are, we can work out their addresses. */
1580 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1582 register_number
= translate_rn_to_arch_reg_num (rn
, media_mode
);
1586 if (rn
== fp_regnum
)
1589 /* Watch out! saved_regs is only for the real registers, and
1590 doesn't include space for the pseudo registers. */
1591 get_frame_saved_regs (fi
)[register_number
]= get_frame_base (fi
) - where
[rn
] + depth
;
1595 get_frame_saved_regs (fi
)[register_number
] = 0;
1600 /* SP_REGNUM is 15. For shmedia 15 is the real register. For
1601 shcompact 15 is the arch register corresponding to the pseudo
1602 register r15 which still is the SP register. */
1603 /* The place on the stack where fp is stored contains the sp of
1605 /* Again, saved_registers contains only space for the real
1606 registers, so we store in DEPRECATED_FP_REGNUM position. */
1608 if (tdep
->sh_abi
== SH_ABI_32
)
1611 size
= REGISTER_RAW_SIZE (fp_regnum
);
1612 get_frame_saved_regs (fi
)[sp_regnum
] = read_memory_integer (get_frame_saved_regs (fi
)[fp_regnum
], size
);
1615 get_frame_saved_regs (fi
)[sp_regnum
] = get_frame_base (fi
);
1617 get_frame_extra_info (fi
)->f_offset
= depth
- where
[fp_regnum
];
1621 sh_fp_frame_init_saved_regs (struct frame_info
*fi
)
1623 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof (int));
1631 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
), get_frame_base (fi
));
1632 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1634 if (get_frame_saved_regs (fi
) == NULL
)
1635 frame_saved_regs_zalloc (fi
);
1637 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
1641 /* DANGER! This is ONLY going to work if the char buffer format of
1642 the saved registers is byte-for-byte identical to the
1643 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
1644 memcpy (get_frame_saved_regs (fi
), dummy_regs
, SIZEOF_FRAME_SAVED_REGS
);
1648 get_frame_extra_info (fi
)->leaf_function
= 1;
1649 get_frame_extra_info (fi
)->f_offset
= 0;
1651 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1656 /* Loop around examining the prologue insns until we find something
1657 that does not appear to be part of the prologue. But give up
1658 after 20 of them, since we're getting silly then. */
1660 pc
= get_frame_func (fi
);
1663 deprecated_update_frame_pc_hack (fi
, 0);
1667 for (opc
= pc
+ (2 * 28); pc
< opc
; pc
+= 2)
1669 insn
= read_memory_integer (pc
, 2);
1670 /* See where the registers will be saved to */
1673 rn
= GET_PUSHED_REG (insn
);
1677 else if (IS_STS (insn
))
1679 where
[tdep
->PR_REGNUM
] = depth
;
1680 /* If we're storing the pr then this isn't a leaf */
1681 get_frame_extra_info (fi
)->leaf_function
= 0;
1684 else if (IS_MOV_R3 (insn
))
1686 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
1688 else if (IS_SHLL_R3 (insn
))
1692 else if (IS_ADD_R3SP (insn
))
1696 else if (IS_ADD_SP (insn
))
1698 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
1700 else if (IS_FMOV (insn
))
1702 if (read_register (tdep
->FPSCR_REGNUM
) & FPSCR_SZ
)
1711 else if (IS_MOV_SP_FP (insn
))
1713 #if 0 /* This used to just stop when it found an instruction that
1714 was not considered part of the prologue. Now, we just
1715 keep going looking for likely instructions. */
1721 /* Now we know how deep things are, we can work out their addresses */
1723 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1727 if (rn
== DEPRECATED_FP_REGNUM
)
1730 get_frame_saved_regs (fi
)[rn
] = get_frame_base (fi
) - where
[rn
] + depth
- 4;
1734 get_frame_saved_regs (fi
)[rn
] = 0;
1740 get_frame_saved_regs (fi
)[SP_REGNUM
] =
1741 read_memory_integer (get_frame_saved_regs (fi
)[DEPRECATED_FP_REGNUM
], 4);
1745 get_frame_saved_regs (fi
)[SP_REGNUM
] = get_frame_base (fi
) - 4;
1748 get_frame_extra_info (fi
)->f_offset
= depth
- where
[DEPRECATED_FP_REGNUM
] - 4;
1749 /* Work out the return pc - either from the saved pr or the pr
1753 /* Initialize the extra info saved in a FRAME */
1755 sh_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1758 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1760 if (get_next_frame (fi
))
1761 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1763 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
1764 get_frame_base (fi
)))
1766 /* We need to setup fi->frame here because call_function_by_hand
1767 gets it wrong by assuming it's always FP. */
1768 deprecated_update_frame_base_hack (fi
, deprecated_read_register_dummy (get_frame_pc (fi
), get_frame_base (fi
),
1770 get_frame_extra_info (fi
)->return_pc
= deprecated_read_register_dummy (get_frame_pc (fi
),
1771 get_frame_base (fi
),
1773 get_frame_extra_info (fi
)->f_offset
= -(DEPRECATED_CALL_DUMMY_LENGTH
+ 4);
1774 get_frame_extra_info (fi
)->leaf_function
= 0;
1779 DEPRECATED_FRAME_INIT_SAVED_REGS (fi
);
1780 get_frame_extra_info (fi
)->return_pc
=
1781 sh_find_callers_reg (fi
, gdbarch_tdep (current_gdbarch
)->PR_REGNUM
);
1786 sh64_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1788 int media_mode
= pc_is_isa32 (get_frame_pc (fi
));
1790 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1792 if (get_next_frame (fi
))
1793 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1795 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
1796 get_frame_base (fi
)))
1798 /* We need to setup fi->frame here because call_function_by_hand
1799 gets it wrong by assuming it's always FP. */
1800 deprecated_update_frame_base_hack (fi
, deprecated_read_register_dummy (get_frame_pc (fi
), get_frame_base (fi
), SP_REGNUM
));
1801 get_frame_extra_info (fi
)->return_pc
=
1802 deprecated_read_register_dummy (get_frame_pc (fi
),
1803 get_frame_base (fi
), PC_REGNUM
);
1804 get_frame_extra_info (fi
)->f_offset
= -(DEPRECATED_CALL_DUMMY_LENGTH
+ 4);
1805 get_frame_extra_info (fi
)->leaf_function
= 0;
1810 DEPRECATED_FRAME_INIT_SAVED_REGS (fi
);
1811 get_frame_extra_info (fi
)->return_pc
=
1812 sh64_get_saved_pr (fi
, gdbarch_tdep (current_gdbarch
)->PR_REGNUM
);
1817 sh64_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
1818 struct frame_info
*frame
, int regnum
,
1819 enum lval_type
*lval
)
1822 int live_regnum
= regnum
;
1823 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1825 if (!target_has_registers
)
1826 error ("No registers.");
1828 /* Normal systems don't optimize out things with register numbers. */
1829 if (optimized
!= NULL
)
1832 if (addrp
) /* default assumption: not found in memory */
1836 memset (raw_buffer
, 0, sizeof (raw_buffer
));
1838 /* We must do this here, before the following while loop changes
1839 frame, and makes it NULL. If this is a media register number,
1840 but we are in compact mode, it will become the corresponding
1841 compact pseudo register. If there is no corresponding compact
1842 pseudo-register what do we do?*/
1843 media_mode
= pc_is_isa32 (get_frame_pc (frame
));
1844 live_regnum
= translate_insn_rn (regnum
, media_mode
);
1846 /* Note: since the current frame's registers could only have been
1847 saved by frames INTERIOR TO the current frame, we skip examining
1848 the current frame itself: otherwise, we would be getting the
1849 previous frame's registers which were saved by the current frame. */
1851 while (frame
&& ((frame
= get_next_frame (frame
)) != NULL
))
1853 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1854 get_frame_base (frame
),
1855 get_frame_base (frame
)))
1857 if (lval
) /* found it in a CALL_DUMMY frame */
1861 (deprecated_generic_find_dummy_frame (get_frame_pc (frame
), get_frame_base (frame
))
1862 + REGISTER_BYTE (regnum
)),
1863 REGISTER_RAW_SIZE (regnum
));
1867 DEPRECATED_FRAME_INIT_SAVED_REGS (frame
);
1868 if (get_frame_saved_regs (frame
) != NULL
1869 && get_frame_saved_regs (frame
)[regnum
] != 0)
1871 if (lval
) /* found it saved on the stack */
1872 *lval
= lval_memory
;
1873 if (regnum
== SP_REGNUM
)
1875 if (raw_buffer
) /* SP register treated specially */
1876 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1877 get_frame_saved_regs (frame
)[regnum
]);
1880 { /* any other register */
1883 *addrp
= get_frame_saved_regs (frame
)[regnum
];
1887 if (tdep
->sh_abi
== SH_ABI_32
1888 && (live_regnum
== DEPRECATED_FP_REGNUM
1889 || live_regnum
== tdep
->PR_REGNUM
))
1892 size
= REGISTER_RAW_SIZE (live_regnum
);
1893 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
1894 read_memory (get_frame_saved_regs (frame
)[regnum
], raw_buffer
, size
);
1896 read_memory (get_frame_saved_regs (frame
)[regnum
],
1898 + REGISTER_RAW_SIZE (live_regnum
)
1907 /* If we get thru the loop to this point, it means the register was
1908 not saved in any frame. Return the actual live-register value. */
1910 if (lval
) /* found it in a live register */
1911 *lval
= lval_register
;
1913 *addrp
= REGISTER_BYTE (live_regnum
);
1915 deprecated_read_register_gen (live_regnum
, raw_buffer
);
1918 /* Extract from an array REGBUF containing the (raw) register state
1919 the address in which a function should return its structure value,
1920 as a CORE_ADDR (or an expression that can be used as one). */
1922 sh_extract_struct_value_address (char *regbuf
)
1924 return (extract_unsigned_integer ((regbuf
), REGISTER_RAW_SIZE (0)));
1928 sh64_extract_struct_value_address (char *regbuf
)
1930 return (extract_unsigned_integer ((regbuf
+ REGISTER_BYTE (STRUCT_RETURN_REGNUM
)),
1931 REGISTER_RAW_SIZE (STRUCT_RETURN_REGNUM
)));
1935 sh_frame_saved_pc (struct frame_info
*frame
)
1937 return (get_frame_extra_info (frame
)->return_pc
);
1940 /* Discard from the stack the innermost frame,
1941 restoring all saved registers. */
1945 register struct frame_info
*frame
= get_current_frame ();
1946 register CORE_ADDR fp
;
1947 register int regnum
;
1949 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1950 get_frame_base (frame
),
1951 get_frame_base (frame
)))
1952 generic_pop_dummy_frame ();
1955 fp
= get_frame_base (frame
);
1956 DEPRECATED_FRAME_INIT_SAVED_REGS (frame
);
1958 /* Copy regs from where they were saved in the frame */
1959 for (regnum
= 0; regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
; regnum
++)
1960 if (get_frame_saved_regs (frame
)[regnum
])
1961 write_register (regnum
,
1962 read_memory_integer (get_frame_saved_regs (frame
)[regnum
], 4));
1964 write_register (PC_REGNUM
, get_frame_extra_info (frame
)->return_pc
);
1965 write_register (SP_REGNUM
, fp
+ 4);
1967 flush_cached_frames ();
1970 /* Used in the 'return' command. */
1972 sh64_pop_frame (void)
1974 register struct frame_info
*frame
= get_current_frame ();
1975 register CORE_ADDR fp
;
1976 register int regnum
;
1977 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1979 int media_mode
= pc_is_isa32 (get_frame_pc (frame
));
1981 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1982 get_frame_base (frame
),
1983 get_frame_base (frame
)))
1984 generic_pop_dummy_frame ();
1987 fp
= get_frame_base (frame
);
1988 DEPRECATED_FRAME_INIT_SAVED_REGS (frame
);
1990 /* Copy regs from where they were saved in the frame */
1991 for (regnum
= 0; regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
; regnum
++)
1992 if (get_frame_saved_regs (frame
)[regnum
])
1995 if (tdep
->sh_abi
== SH_ABI_32
1996 && (regnum
== DEPRECATED_FP_REGNUM
1997 || regnum
== tdep
->PR_REGNUM
))
2000 size
= REGISTER_RAW_SIZE (translate_insn_rn (regnum
,
2002 write_register (regnum
,
2003 read_memory_integer (get_frame_saved_regs (frame
)[regnum
],
2007 write_register (PC_REGNUM
, get_frame_extra_info (frame
)->return_pc
);
2008 write_register (SP_REGNUM
, fp
+ 8);
2010 flush_cached_frames ();
2013 /* Function: push_arguments
2014 Setup the function arguments for calling a function in the inferior.
2016 On the Hitachi SH architecture, there are four registers (R4 to R7)
2017 which are dedicated for passing function arguments. Up to the first
2018 four arguments (depending on size) may go into these registers.
2019 The rest go on the stack.
2021 Arguments that are smaller than 4 bytes will still take up a whole
2022 register or a whole 32-bit word on the stack, and will be
2023 right-justified in the register or the stack word. This includes
2024 chars, shorts, and small aggregate types.
2026 Arguments that are larger than 4 bytes may be split between two or
2027 more registers. If there are not enough registers free, an argument
2028 may be passed partly in a register (or registers), and partly on the
2029 stack. This includes doubles, long longs, and larger aggregates.
2030 As far as I know, there is no upper limit to the size of aggregates
2031 that will be passed in this way; in other words, the convention of
2032 passing a pointer to a large aggregate instead of a copy is not used.
2034 An exceptional case exists for struct arguments (and possibly other
2035 aggregates such as arrays) if the size is larger than 4 bytes but
2036 not a multiple of 4 bytes. In this case the argument is never split
2037 between the registers and the stack, but instead is copied in its
2038 entirety onto the stack, AND also copied into as many registers as
2039 there is room for. In other words, space in registers permitting,
2040 two copies of the same argument are passed in. As far as I can tell,
2041 only the one on the stack is used, although that may be a function
2042 of the level of compiler optimization. I suspect this is a compiler
2043 bug. Arguments of these odd sizes are left-justified within the
2044 word (as opposed to arguments smaller than 4 bytes, which are
2047 If the function is to return an aggregate type such as a struct, it
2048 is either returned in the normal return value register R0 (if its
2049 size is no greater than one byte), or else the caller must allocate
2050 space into which the callee will copy the return value (if the size
2051 is greater than one byte). In this case, a pointer to the return
2052 value location is passed into the callee in register R2, which does
2053 not displace any of the other arguments passed in via registers R4
2057 sh_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2058 int struct_return
, CORE_ADDR struct_addr
)
2060 int stack_offset
, stack_alloc
;
2068 int odd_sized_struct
;
2069 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2071 /* first force sp to a 4-byte alignment */
2074 /* The "struct return pointer" pseudo-argument has its own dedicated
2077 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
2079 /* Now make sure there's space on the stack */
2080 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
2081 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
2082 sp
-= stack_alloc
; /* make room on stack for args */
2084 /* Now load as many as possible of the first arguments into
2085 registers, and push the rest onto the stack. There are 16 bytes
2086 in four registers available. Loop thru args from first to last. */
2088 argreg
= tdep
->ARG0_REGNUM
;
2089 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
2091 type
= VALUE_TYPE (args
[argnum
]);
2092 len
= TYPE_LENGTH (type
);
2093 memset (valbuf
, 0, sizeof (valbuf
));
2096 /* value gets right-justified in the register or stack word */
2097 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2098 memcpy (valbuf
+ (4 - len
),
2099 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
2101 memcpy (valbuf
, (char *) VALUE_CONTENTS (args
[argnum
]), len
);
2105 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
2107 if (len
> 4 && (len
& 3) != 0)
2108 odd_sized_struct
= 1; /* such structs go entirely on stack */
2110 odd_sized_struct
= 0;
2113 if (argreg
> tdep
->ARGLAST_REGNUM
2114 || odd_sized_struct
)
2116 /* must go on the stack */
2117 write_memory (sp
+ stack_offset
, val
, 4);
2120 /* NOTE WELL!!!!! This is not an "else if" clause!!!
2121 That's because some *&^%$ things get passed on the stack
2122 AND in the registers! */
2123 if (argreg
<= tdep
->ARGLAST_REGNUM
)
2125 /* there's room in a register */
2126 regval
= extract_unsigned_integer (val
, REGISTER_RAW_SIZE (argreg
));
2127 write_register (argreg
++, regval
);
2129 /* Store the value 4 bytes at a time. This means that things
2130 larger than 4 bytes may go partly in registers and partly
2132 len
-= REGISTER_RAW_SIZE (argreg
);
2133 val
+= REGISTER_RAW_SIZE (argreg
);
2139 /* R2-R9 for integer types and integer equivalent (char, pointers) and
2140 non-scalar (struct, union) elements (even if the elements are
2142 FR0-FR11 for single precision floating point (float)
2143 DR0-DR10 for double precision floating point (double)
2145 If a float is argument number 3 (for instance) and arguments number
2146 1,2, and 4 are integer, the mapping will be:
2147 arg1 -->R2, arg2 --> R3, arg3 -->FR0, arg4 --> R5. I.e. R4 is not used.
2149 If a float is argument number 10 (for instance) and arguments number
2150 1 through 10 are integer, the mapping will be:
2151 arg1->R2, arg2->R3, arg3->R4, arg4->R5, arg5->R6, arg6->R7, arg7->R8,
2152 arg8->R9, arg9->(0,SP)stack(8-byte aligned), arg10->FR0, arg11->stack(16,SP).
2153 I.e. there is hole in the stack.
2155 Different rules apply for variable arguments functions, and for functions
2156 for which the prototype is not known. */
2159 sh64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2160 int struct_return
, CORE_ADDR struct_addr
)
2162 int stack_offset
, stack_alloc
;
2166 int float_arg_index
= 0;
2167 int double_arg_index
= 0;
2177 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2179 memset (fp_args
, 0, sizeof (fp_args
));
2181 /* first force sp to a 8-byte alignment */
2184 /* The "struct return pointer" pseudo-argument has its own dedicated
2188 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
2190 /* Now make sure there's space on the stack */
2191 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
2192 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 7) & ~7);
2193 sp
-= stack_alloc
; /* make room on stack for args */
2195 /* Now load as many as possible of the first arguments into
2196 registers, and push the rest onto the stack. There are 64 bytes
2197 in eight registers available. Loop thru args from first to last. */
2199 int_argreg
= tdep
->ARG0_REGNUM
;
2200 float_argreg
= FP0_REGNUM
;
2201 double_argreg
= tdep
->DR0_REGNUM
;
2203 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
2205 type
= VALUE_TYPE (args
[argnum
]);
2206 len
= TYPE_LENGTH (type
);
2207 memset (valbuf
, 0, sizeof (valbuf
));
2209 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
2211 argreg_size
= REGISTER_RAW_SIZE (int_argreg
);
2213 if (len
< argreg_size
)
2215 /* value gets right-justified in the register or stack word */
2216 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2217 memcpy (valbuf
+ argreg_size
- len
,
2218 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
2220 memcpy (valbuf
, (char *) VALUE_CONTENTS (args
[argnum
]), len
);
2225 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
2229 if (int_argreg
> tdep
->ARGLAST_REGNUM
)
2231 /* must go on the stack */
2232 write_memory (sp
+ stack_offset
, val
, argreg_size
);
2233 stack_offset
+= 8;/*argreg_size;*/
2235 /* NOTE WELL!!!!! This is not an "else if" clause!!!
2236 That's because some *&^%$ things get passed on the stack
2237 AND in the registers! */
2238 if (int_argreg
<= tdep
->ARGLAST_REGNUM
)
2240 /* there's room in a register */
2241 regval
= extract_unsigned_integer (val
, argreg_size
);
2242 write_register (int_argreg
, regval
);
2244 /* Store the value 8 bytes at a time. This means that
2245 things larger than 8 bytes may go partly in registers
2246 and partly on the stack. FIXME: argreg is incremented
2247 before we use its size. */
2255 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
2258 /* Where is it going to be stored? */
2259 while (fp_args
[float_arg_index
])
2262 /* Now float_argreg points to the register where it
2263 should be stored. Are we still within the allowed
2265 if (float_arg_index
<= tdep
->FLOAT_ARGLAST_REGNUM
)
2267 /* Goes in FR0...FR11 */
2268 deprecated_write_register_gen (FP0_REGNUM
+ float_arg_index
,
2270 fp_args
[float_arg_index
] = 1;
2271 /* Skip the corresponding general argument register. */
2276 /* Store it as the integers, 8 bytes at the time, if
2277 necessary spilling on the stack. */
2282 /* Where is it going to be stored? */
2283 while (fp_args
[double_arg_index
])
2284 double_arg_index
+= 2;
2285 /* Now double_argreg points to the register
2286 where it should be stored.
2287 Are we still within the allowed register set? */
2288 if (double_arg_index
< tdep
->FLOAT_ARGLAST_REGNUM
)
2290 /* Goes in DR0...DR10 */
2291 /* The numbering of the DRi registers is consecutive,
2292 i.e. includes odd numbers. */
2293 int double_register_offset
= double_arg_index
/ 2;
2294 int regnum
= tdep
->DR0_REGNUM
+
2295 double_register_offset
;
2297 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
2299 memset (valbuf_tmp
, 0, sizeof (valbuf_tmp
));
2300 REGISTER_CONVERT_TO_VIRTUAL (regnum
,
2301 type
, val
, valbuf_tmp
);
2305 /* Note: must use write_register_gen here instead
2306 of regcache_raw_write, because
2307 regcache_raw_write works only for real
2308 registers, not pseudo. write_register_gen will
2309 call the gdbarch function to do register
2310 writes, and that will properly know how to deal
2312 deprecated_write_register_gen (regnum
, val
);
2313 fp_args
[double_arg_index
] = 1;
2314 fp_args
[double_arg_index
+ 1] = 1;
2315 /* Skip the corresponding general argument register. */
2320 /* Store it as the integers, 8 bytes at the time, if
2321 necessary spilling on the stack. */
2328 /* Function: push_return_address (pc)
2329 Set up the return address for the inferior function call.
2330 Needed for targets where we don't actually execute a JSR/BSR instruction */
2333 sh_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
2335 write_register (gdbarch_tdep (current_gdbarch
)->PR_REGNUM
,
2336 CALL_DUMMY_ADDRESS ());
2340 /* Function: fix_call_dummy
2341 Poke the callee function's address into the destination part of
2342 the CALL_DUMMY. The address is actually stored in a data word
2343 following the actualy CALL_DUMMY instructions, which will load
2344 it into a register using PC-relative addressing. This function
2345 expects the CALL_DUMMY to look like this:
2356 sh_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
2357 struct value
**args
, struct type
*type
, int gcc_p
)
2359 *(unsigned long *) (dummy
+ 8) = fun
;
2363 /* Find a function's return value in the appropriate registers (in
2364 regbuf), and copy it into valbuf. Extract from an array REGBUF
2365 containing the (raw) register state a function return value of type
2366 TYPE, and copy that, in virtual format, into VALBUF. */
2368 sh_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2370 int len
= TYPE_LENGTH (type
);
2371 int return_register
= R0_REGNUM
;
2376 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2377 offset
= REGISTER_BYTE (return_register
) + 4 - len
;
2379 offset
= REGISTER_BYTE (return_register
);
2380 memcpy (valbuf
, regbuf
+ offset
, len
);
2384 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2385 offset
= REGISTER_BYTE (return_register
) + 8 - len
;
2387 offset
= REGISTER_BYTE (return_register
);
2388 memcpy (valbuf
, regbuf
+ offset
, len
);
2391 error ("bad size for return value");
2395 sh3e_sh4_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2397 int return_register
;
2399 int len
= TYPE_LENGTH (type
);
2401 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2402 return_register
= FP0_REGNUM
;
2404 return_register
= R0_REGNUM
;
2406 if (len
== 8 && TYPE_CODE (type
) == TYPE_CODE_FLT
)
2409 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
2410 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
,
2411 (char *) regbuf
+ REGISTER_BYTE (return_register
),
2414 floatformat_to_doublest (&floatformat_ieee_double_big
,
2415 (char *) regbuf
+ REGISTER_BYTE (return_register
),
2417 deprecated_store_floating (valbuf
, len
, val
);
2421 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2422 offset
= REGISTER_BYTE (return_register
) + 4 - len
;
2424 offset
= REGISTER_BYTE (return_register
);
2425 memcpy (valbuf
, regbuf
+ offset
, len
);
2429 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2430 offset
= REGISTER_BYTE (return_register
) + 8 - len
;
2432 offset
= REGISTER_BYTE (return_register
);
2433 memcpy (valbuf
, regbuf
+ offset
, len
);
2436 error ("bad size for return value");
2440 sh64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2443 int return_register
;
2444 int len
= TYPE_LENGTH (type
);
2445 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2447 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2451 /* Return value stored in FP0_REGNUM */
2452 return_register
= FP0_REGNUM
;
2453 offset
= REGISTER_BYTE (return_register
);
2454 memcpy (valbuf
, (char *) regbuf
+ offset
, len
);
2458 /* return value stored in DR0_REGNUM */
2461 return_register
= tdep
->DR0_REGNUM
;
2462 offset
= REGISTER_BYTE (return_register
);
2464 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
2465 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
,
2466 (char *) regbuf
+ offset
, &val
);
2468 floatformat_to_doublest (&floatformat_ieee_double_big
,
2469 (char *) regbuf
+ offset
, &val
);
2470 deprecated_store_floating (valbuf
, len
, val
);
2477 /* Result is in register 2. If smaller than 8 bytes, it is padded
2478 at the most significant end. */
2479 return_register
= tdep
->RETURN_REGNUM
;
2480 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2481 offset
= REGISTER_BYTE (return_register
) +
2482 REGISTER_RAW_SIZE (return_register
) - len
;
2484 offset
= REGISTER_BYTE (return_register
);
2485 memcpy (valbuf
, (char *) regbuf
+ offset
, len
);
2488 error ("bad size for return value");
2492 /* Write into appropriate registers a function return value
2493 of type TYPE, given in virtual format.
2494 If the architecture is sh4 or sh3e, store a function's return value
2495 in the R0 general register or in the FP0 floating point register,
2496 depending on the type of the return value. In all the other cases
2497 the result is stored in r0, left-justified. */
2499 sh_default_store_return_value (struct type
*type
, char *valbuf
)
2501 char buf
[32]; /* more than enough... */
2503 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (R0_REGNUM
))
2505 /* Add leading zeros to the value. */
2506 memset (buf
, 0, REGISTER_RAW_SIZE (R0_REGNUM
));
2507 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2508 memcpy (buf
+ REGISTER_RAW_SIZE (R0_REGNUM
) - TYPE_LENGTH (type
),
2509 valbuf
, TYPE_LENGTH (type
));
2511 memcpy (buf
, valbuf
, TYPE_LENGTH (type
));
2512 deprecated_write_register_bytes (REGISTER_BYTE (R0_REGNUM
), buf
,
2513 REGISTER_RAW_SIZE (R0_REGNUM
));
2516 deprecated_write_register_bytes (REGISTER_BYTE (R0_REGNUM
), valbuf
,
2517 TYPE_LENGTH (type
));
2521 sh3e_sh4_store_return_value (struct type
*type
, char *valbuf
)
2523 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2524 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
2525 valbuf
, TYPE_LENGTH (type
));
2527 sh_default_store_return_value (type
, valbuf
);
2531 sh64_store_return_value (struct type
*type
, char *valbuf
)
2533 char buf
[64]; /* more than enough... */
2534 int len
= TYPE_LENGTH (type
);
2536 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2540 /* Return value stored in FP0_REGNUM */
2541 deprecated_write_register_gen (FP0_REGNUM
, valbuf
);
2545 /* return value stored in DR0_REGNUM */
2546 /* FIXME: Implement */
2551 int return_register
= gdbarch_tdep (current_gdbarch
)->RETURN_REGNUM
;
2554 if (len
<= REGISTER_RAW_SIZE (return_register
))
2556 /* Pad with zeros. */
2557 memset (buf
, 0, REGISTER_RAW_SIZE (return_register
));
2558 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
2559 offset
= 0; /*REGISTER_RAW_SIZE (return_register) - len;*/
2561 offset
= REGISTER_RAW_SIZE (return_register
) - len
;
2563 memcpy (buf
+ offset
, valbuf
, len
);
2564 deprecated_write_register_gen (return_register
, buf
);
2567 deprecated_write_register_gen (return_register
, valbuf
);
2571 /* Print the registers in a form similar to the E7000 */
2574 sh_generic_show_regs (void)
2576 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2578 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2579 paddr (read_register (PC_REGNUM
)),
2580 (long) read_register (tdep
->SR_REGNUM
),
2581 (long) read_register (tdep
->PR_REGNUM
),
2582 (long) read_register (MACH_REGNUM
),
2583 (long) read_register (MACL_REGNUM
));
2585 printf_filtered ("GBR=%08lx VBR=%08lx",
2586 (long) read_register (GBR_REGNUM
),
2587 (long) read_register (VBR_REGNUM
));
2589 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2590 (long) read_register (0),
2591 (long) read_register (1),
2592 (long) read_register (2),
2593 (long) read_register (3),
2594 (long) read_register (4),
2595 (long) read_register (5),
2596 (long) read_register (6),
2597 (long) read_register (7));
2598 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2599 (long) read_register (8),
2600 (long) read_register (9),
2601 (long) read_register (10),
2602 (long) read_register (11),
2603 (long) read_register (12),
2604 (long) read_register (13),
2605 (long) read_register (14),
2606 (long) read_register (15));
2610 sh3_show_regs (void)
2612 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2614 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2615 paddr (read_register (PC_REGNUM
)),
2616 (long) read_register (tdep
->SR_REGNUM
),
2617 (long) read_register (tdep
->PR_REGNUM
),
2618 (long) read_register (MACH_REGNUM
),
2619 (long) read_register (MACL_REGNUM
));
2621 printf_filtered ("GBR=%08lx VBR=%08lx",
2622 (long) read_register (GBR_REGNUM
),
2623 (long) read_register (VBR_REGNUM
));
2624 printf_filtered (" SSR=%08lx SPC=%08lx",
2625 (long) read_register (tdep
->SSR_REGNUM
),
2626 (long) read_register (tdep
->SPC_REGNUM
));
2628 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2629 (long) read_register (0),
2630 (long) read_register (1),
2631 (long) read_register (2),
2632 (long) read_register (3),
2633 (long) read_register (4),
2634 (long) read_register (5),
2635 (long) read_register (6),
2636 (long) read_register (7));
2637 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2638 (long) read_register (8),
2639 (long) read_register (9),
2640 (long) read_register (10),
2641 (long) read_register (11),
2642 (long) read_register (12),
2643 (long) read_register (13),
2644 (long) read_register (14),
2645 (long) read_register (15));
2650 sh2e_show_regs (void)
2652 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2653 paddr (read_register (PC_REGNUM
)),
2654 (long) read_register (SR_REGNUM
),
2655 (long) read_register (PR_REGNUM
),
2656 (long) read_register (MACH_REGNUM
),
2657 (long) read_register (MACL_REGNUM
));
2659 printf_filtered ("GBR=%08lx VBR=%08lx",
2660 (long) read_register (GBR_REGNUM
),
2661 (long) read_register (VBR_REGNUM
));
2662 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
2663 (long) read_register (gdbarch_tdep (current_gdbarch
)->FPUL_REGNUM
),
2664 (long) read_register (gdbarch_tdep (current_gdbarch
)->FPSCR_REGNUM
));
2666 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2667 (long) read_register (0),
2668 (long) read_register (1),
2669 (long) read_register (2),
2670 (long) read_register (3),
2671 (long) read_register (4),
2672 (long) read_register (5),
2673 (long) read_register (6),
2674 (long) read_register (7));
2675 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2676 (long) read_register (8),
2677 (long) read_register (9),
2678 (long) read_register (10),
2679 (long) read_register (11),
2680 (long) read_register (12),
2681 (long) read_register (13),
2682 (long) read_register (14),
2683 (long) read_register (15));
2685 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2686 (long) read_register (FP0_REGNUM
+ 0),
2687 (long) read_register (FP0_REGNUM
+ 1),
2688 (long) read_register (FP0_REGNUM
+ 2),
2689 (long) read_register (FP0_REGNUM
+ 3),
2690 (long) read_register (FP0_REGNUM
+ 4),
2691 (long) read_register (FP0_REGNUM
+ 5),
2692 (long) read_register (FP0_REGNUM
+ 6),
2693 (long) read_register (FP0_REGNUM
+ 7));
2694 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2695 (long) read_register (FP0_REGNUM
+ 8),
2696 (long) read_register (FP0_REGNUM
+ 9),
2697 (long) read_register (FP0_REGNUM
+ 10),
2698 (long) read_register (FP0_REGNUM
+ 11),
2699 (long) read_register (FP0_REGNUM
+ 12),
2700 (long) read_register (FP0_REGNUM
+ 13),
2701 (long) read_register (FP0_REGNUM
+ 14),
2702 (long) read_register (FP0_REGNUM
+ 15));
2706 sh3e_show_regs (void)
2708 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2710 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2711 paddr (read_register (PC_REGNUM
)),
2712 (long) read_register (tdep
->SR_REGNUM
),
2713 (long) read_register (tdep
->PR_REGNUM
),
2714 (long) read_register (MACH_REGNUM
),
2715 (long) read_register (MACL_REGNUM
));
2717 printf_filtered ("GBR=%08lx VBR=%08lx",
2718 (long) read_register (GBR_REGNUM
),
2719 (long) read_register (VBR_REGNUM
));
2720 printf_filtered (" SSR=%08lx SPC=%08lx",
2721 (long) read_register (tdep
->SSR_REGNUM
),
2722 (long) read_register (tdep
->SPC_REGNUM
));
2723 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
2724 (long) read_register (tdep
->FPUL_REGNUM
),
2725 (long) read_register (tdep
->FPSCR_REGNUM
));
2727 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2728 (long) read_register (0),
2729 (long) read_register (1),
2730 (long) read_register (2),
2731 (long) read_register (3),
2732 (long) read_register (4),
2733 (long) read_register (5),
2734 (long) read_register (6),
2735 (long) read_register (7));
2736 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2737 (long) read_register (8),
2738 (long) read_register (9),
2739 (long) read_register (10),
2740 (long) read_register (11),
2741 (long) read_register (12),
2742 (long) read_register (13),
2743 (long) read_register (14),
2744 (long) read_register (15));
2746 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2747 (long) read_register (FP0_REGNUM
+ 0),
2748 (long) read_register (FP0_REGNUM
+ 1),
2749 (long) read_register (FP0_REGNUM
+ 2),
2750 (long) read_register (FP0_REGNUM
+ 3),
2751 (long) read_register (FP0_REGNUM
+ 4),
2752 (long) read_register (FP0_REGNUM
+ 5),
2753 (long) read_register (FP0_REGNUM
+ 6),
2754 (long) read_register (FP0_REGNUM
+ 7));
2755 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2756 (long) read_register (FP0_REGNUM
+ 8),
2757 (long) read_register (FP0_REGNUM
+ 9),
2758 (long) read_register (FP0_REGNUM
+ 10),
2759 (long) read_register (FP0_REGNUM
+ 11),
2760 (long) read_register (FP0_REGNUM
+ 12),
2761 (long) read_register (FP0_REGNUM
+ 13),
2762 (long) read_register (FP0_REGNUM
+ 14),
2763 (long) read_register (FP0_REGNUM
+ 15));
2767 sh3_dsp_show_regs (void)
2769 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2771 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2772 paddr (read_register (PC_REGNUM
)),
2773 (long) read_register (tdep
->SR_REGNUM
),
2774 (long) read_register (tdep
->PR_REGNUM
),
2775 (long) read_register (MACH_REGNUM
),
2776 (long) read_register (MACL_REGNUM
));
2778 printf_filtered ("GBR=%08lx VBR=%08lx",
2779 (long) read_register (GBR_REGNUM
),
2780 (long) read_register (VBR_REGNUM
));
2782 printf_filtered (" SSR=%08lx SPC=%08lx",
2783 (long) read_register (tdep
->SSR_REGNUM
),
2784 (long) read_register (tdep
->SPC_REGNUM
));
2786 printf_filtered (" DSR=%08lx",
2787 (long) read_register (tdep
->DSR_REGNUM
));
2789 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2790 (long) read_register (0),
2791 (long) read_register (1),
2792 (long) read_register (2),
2793 (long) read_register (3),
2794 (long) read_register (4),
2795 (long) read_register (5),
2796 (long) read_register (6),
2797 (long) read_register (7));
2798 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2799 (long) read_register (8),
2800 (long) read_register (9),
2801 (long) read_register (10),
2802 (long) read_register (11),
2803 (long) read_register (12),
2804 (long) read_register (13),
2805 (long) read_register (14),
2806 (long) read_register (15));
2808 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
2809 (long) read_register (tdep
->A0G_REGNUM
) & 0xff,
2810 (long) read_register (tdep
->A0_REGNUM
),
2811 (long) read_register (tdep
->M0_REGNUM
),
2812 (long) read_register (tdep
->X0_REGNUM
),
2813 (long) read_register (tdep
->Y0_REGNUM
),
2814 (long) read_register (tdep
->RS_REGNUM
),
2815 (long) read_register (tdep
->MOD_REGNUM
));
2816 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
2817 (long) read_register (tdep
->A1G_REGNUM
) & 0xff,
2818 (long) read_register (tdep
->A1_REGNUM
),
2819 (long) read_register (tdep
->M1_REGNUM
),
2820 (long) read_register (tdep
->X1_REGNUM
),
2821 (long) read_register (tdep
->Y1_REGNUM
),
2822 (long) read_register (tdep
->RE_REGNUM
));
2826 sh4_show_regs (void)
2828 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2830 int pr
= read_register (tdep
->FPSCR_REGNUM
) & 0x80000;
2831 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2832 paddr (read_register (PC_REGNUM
)),
2833 (long) read_register (tdep
->SR_REGNUM
),
2834 (long) read_register (tdep
->PR_REGNUM
),
2835 (long) read_register (MACH_REGNUM
),
2836 (long) read_register (MACL_REGNUM
));
2838 printf_filtered ("GBR=%08lx VBR=%08lx",
2839 (long) read_register (GBR_REGNUM
),
2840 (long) read_register (VBR_REGNUM
));
2841 printf_filtered (" SSR=%08lx SPC=%08lx",
2842 (long) read_register (tdep
->SSR_REGNUM
),
2843 (long) read_register (tdep
->SPC_REGNUM
));
2844 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
2845 (long) read_register (tdep
->FPUL_REGNUM
),
2846 (long) read_register (tdep
->FPSCR_REGNUM
));
2848 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2849 (long) read_register (0),
2850 (long) read_register (1),
2851 (long) read_register (2),
2852 (long) read_register (3),
2853 (long) read_register (4),
2854 (long) read_register (5),
2855 (long) read_register (6),
2856 (long) read_register (7));
2857 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2858 (long) read_register (8),
2859 (long) read_register (9),
2860 (long) read_register (10),
2861 (long) read_register (11),
2862 (long) read_register (12),
2863 (long) read_register (13),
2864 (long) read_register (14),
2865 (long) read_register (15));
2867 printf_filtered ((pr
2868 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
2869 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2870 (long) read_register (FP0_REGNUM
+ 0),
2871 (long) read_register (FP0_REGNUM
+ 1),
2872 (long) read_register (FP0_REGNUM
+ 2),
2873 (long) read_register (FP0_REGNUM
+ 3),
2874 (long) read_register (FP0_REGNUM
+ 4),
2875 (long) read_register (FP0_REGNUM
+ 5),
2876 (long) read_register (FP0_REGNUM
+ 6),
2877 (long) read_register (FP0_REGNUM
+ 7));
2878 printf_filtered ((pr
2879 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
2880 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
2881 (long) read_register (FP0_REGNUM
+ 8),
2882 (long) read_register (FP0_REGNUM
+ 9),
2883 (long) read_register (FP0_REGNUM
+ 10),
2884 (long) read_register (FP0_REGNUM
+ 11),
2885 (long) read_register (FP0_REGNUM
+ 12),
2886 (long) read_register (FP0_REGNUM
+ 13),
2887 (long) read_register (FP0_REGNUM
+ 14),
2888 (long) read_register (FP0_REGNUM
+ 15));
2892 sh_dsp_show_regs (void)
2894 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2896 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
2897 paddr (read_register (PC_REGNUM
)),
2898 (long) read_register (tdep
->SR_REGNUM
),
2899 (long) read_register (tdep
->PR_REGNUM
),
2900 (long) read_register (MACH_REGNUM
),
2901 (long) read_register (MACL_REGNUM
));
2903 printf_filtered ("GBR=%08lx VBR=%08lx",
2904 (long) read_register (GBR_REGNUM
),
2905 (long) read_register (VBR_REGNUM
));
2907 printf_filtered (" DSR=%08lx",
2908 (long) read_register (tdep
->DSR_REGNUM
));
2910 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2911 (long) read_register (0),
2912 (long) read_register (1),
2913 (long) read_register (2),
2914 (long) read_register (3),
2915 (long) read_register (4),
2916 (long) read_register (5),
2917 (long) read_register (6),
2918 (long) read_register (7));
2919 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2920 (long) read_register (8),
2921 (long) read_register (9),
2922 (long) read_register (10),
2923 (long) read_register (11),
2924 (long) read_register (12),
2925 (long) read_register (13),
2926 (long) read_register (14),
2927 (long) read_register (15));
2929 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
2930 (long) read_register (tdep
->A0G_REGNUM
) & 0xff,
2931 (long) read_register (tdep
->A0_REGNUM
),
2932 (long) read_register (tdep
->M0_REGNUM
),
2933 (long) read_register (tdep
->X0_REGNUM
),
2934 (long) read_register (tdep
->Y0_REGNUM
),
2935 (long) read_register (tdep
->RS_REGNUM
),
2936 (long) read_register (tdep
->MOD_REGNUM
));
2937 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
2938 (long) read_register (tdep
->A1G_REGNUM
) & 0xff,
2939 (long) read_register (tdep
->A1_REGNUM
),
2940 (long) read_register (tdep
->M1_REGNUM
),
2941 (long) read_register (tdep
->X1_REGNUM
),
2942 (long) read_register (tdep
->Y1_REGNUM
),
2943 (long) read_register (tdep
->RE_REGNUM
));
2947 sh64_show_media_regs (void)
2950 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2952 printf_filtered ("PC=%s SR=%016llx \n",
2953 paddr (read_register (PC_REGNUM
)),
2954 (long long) read_register (tdep
->SR_REGNUM
));
2956 printf_filtered ("SSR=%016llx SPC=%016llx \n",
2957 (long long) read_register (tdep
->SSR_REGNUM
),
2958 (long long) read_register (tdep
->SPC_REGNUM
));
2959 printf_filtered ("FPSCR=%016lx\n ",
2960 (long) read_register (tdep
->FPSCR_REGNUM
));
2962 for (i
= 0; i
< 64; i
= i
+ 4)
2963 printf_filtered ("\nR%d-R%d %016llx %016llx %016llx %016llx\n",
2965 (long long) read_register (i
+ 0),
2966 (long long) read_register (i
+ 1),
2967 (long long) read_register (i
+ 2),
2968 (long long) read_register (i
+ 3));
2970 printf_filtered ("\n");
2972 for (i
= 0; i
< 64; i
= i
+ 8)
2973 printf_filtered ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
2975 (long) read_register (FP0_REGNUM
+ i
+ 0),
2976 (long) read_register (FP0_REGNUM
+ i
+ 1),
2977 (long) read_register (FP0_REGNUM
+ i
+ 2),
2978 (long) read_register (FP0_REGNUM
+ i
+ 3),
2979 (long) read_register (FP0_REGNUM
+ i
+ 4),
2980 (long) read_register (FP0_REGNUM
+ i
+ 5),
2981 (long) read_register (FP0_REGNUM
+ i
+ 6),
2982 (long) read_register (FP0_REGNUM
+ i
+ 7));
2986 sh64_show_compact_regs (void)
2989 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2991 printf_filtered ("PC=%s \n",
2992 paddr (read_register (tdep
->PC_C_REGNUM
)));
2994 printf_filtered ("GBR=%08lx MACH=%08lx MACL=%08lx PR=%08lx T=%08lx\n",
2995 (long) read_register (tdep
->GBR_C_REGNUM
),
2996 (long) read_register (tdep
->MACH_C_REGNUM
),
2997 (long) read_register (tdep
->MACL_C_REGNUM
),
2998 (long) read_register (tdep
->PR_C_REGNUM
),
2999 (long) read_register (tdep
->T_C_REGNUM
));
3000 printf_filtered ("FPSCR=%08lx FPUL=%08lx\n",
3001 (long) read_register (tdep
->FPSCR_REGNUM
),
3002 (long) read_register (tdep
->FPUL_REGNUM
));
3004 for (i
= 0; i
< 16; i
= i
+ 4)
3005 printf_filtered ("\nR%d-R%d %08lx %08lx %08lx %08lx\n",
3007 (long) read_register (i
+ 0),
3008 (long) read_register (i
+ 1),
3009 (long) read_register (i
+ 2),
3010 (long) read_register (i
+ 3));
3012 printf_filtered ("\n");
3014 for (i
= 0; i
< 16; i
= i
+ 8)
3015 printf_filtered ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
3017 (long) read_register (FP0_REGNUM
+ i
+ 0),
3018 (long) read_register (FP0_REGNUM
+ i
+ 1),
3019 (long) read_register (FP0_REGNUM
+ i
+ 2),
3020 (long) read_register (FP0_REGNUM
+ i
+ 3),
3021 (long) read_register (FP0_REGNUM
+ i
+ 4),
3022 (long) read_register (FP0_REGNUM
+ i
+ 5),
3023 (long) read_register (FP0_REGNUM
+ i
+ 6),
3024 (long) read_register (FP0_REGNUM
+ i
+ 7));
3027 /*FIXME!!! This only shows the registers for shmedia, excluding the
3028 pseudo registers. */
3030 sh64_show_regs (void)
3032 if (pc_is_isa32 (get_frame_pc (deprecated_selected_frame
)))
3033 sh64_show_media_regs ();
3035 sh64_show_compact_regs ();
3039 sh_show_regs_command (char *args
, int from_tty
)
3045 /* Index within `registers' of the first byte of the space for
3048 sh_default_register_byte (int reg_nr
)
3050 return (reg_nr
* 4);
3054 sh_sh4_register_byte (int reg_nr
)
3056 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3058 if (reg_nr
>= tdep
->DR0_REGNUM
3059 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3060 return (dr_reg_base_num (reg_nr
) * 4);
3061 else if (reg_nr
>= tdep
->FV0_REGNUM
3062 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3063 return (fv_reg_base_num (reg_nr
) * 4);
3065 return (reg_nr
* 4);
3070 SH MEDIA MODE (ISA 32)
3071 general registers (64-bit) 0-63
3072 0 r0, r1, r2, r3, r4, r5, r6, r7,
3073 64 r8, r9, r10, r11, r12, r13, r14, r15,
3074 128 r16, r17, r18, r19, r20, r21, r22, r23,
3075 192 r24, r25, r26, r27, r28, r29, r30, r31,
3076 256 r32, r33, r34, r35, r36, r37, r38, r39,
3077 320 r40, r41, r42, r43, r44, r45, r46, r47,
3078 384 r48, r49, r50, r51, r52, r53, r54, r55,
3079 448 r56, r57, r58, r59, r60, r61, r62, r63,
3084 status reg., saved status reg., saved pc reg. (64-bit) 65-67
3087 target registers (64-bit) 68-75
3088 544 tr0, tr1, tr2, tr3, tr4, tr5, tr6, tr7,
3090 floating point state control register (32-bit) 76
3093 single precision floating point registers (32-bit) 77-140
3094 612 fr0, fr1, fr2, fr3, fr4, fr5, fr6, fr7,
3095 644 fr8, fr9, fr10, fr11, fr12, fr13, fr14, fr15,
3096 676 fr16, fr17, fr18, fr19, fr20, fr21, fr22, fr23,
3097 708 fr24, fr25, fr26, fr27, fr28, fr29, fr30, fr31,
3098 740 fr32, fr33, fr34, fr35, fr36, fr37, fr38, fr39,
3099 772 fr40, fr41, fr42, fr43, fr44, fr45, fr46, fr47,
3100 804 fr48, fr49, fr50, fr51, fr52, fr53, fr54, fr55,
3101 836 fr56, fr57, fr58, fr59, fr60, fr61, fr62, fr63,
3103 TOTAL SPACE FOR REGISTERS: 868 bytes
3105 From here on they are all pseudo registers: no memory allocated.
3106 REGISTER_BYTE returns the register byte for the base register.
3108 double precision registers (pseudo) 141-172
3109 dr0, dr2, dr4, dr6, dr8, dr10, dr12, dr14,
3110 dr16, dr18, dr20, dr22, dr24, dr26, dr28, dr30,
3111 dr32, dr34, dr36, dr38, dr40, dr42, dr44, dr46,
3112 dr48, dr50, dr52, dr54, dr56, dr58, dr60, dr62,
3114 floating point pairs (pseudo) 173-204
3115 fp0, fp2, fp4, fp6, fp8, fp10, fp12, fp14,
3116 fp16, fp18, fp20, fp22, fp24, fp26, fp28, fp30,
3117 fp32, fp34, fp36, fp38, fp40, fp42, fp44, fp46,
3118 fp48, fp50, fp52, fp54, fp56, fp58, fp60, fp62,
3120 floating point vectors (4 floating point regs) (pseudo) 205-220
3121 fv0, fv4, fv8, fv12, fv16, fv20, fv24, fv28,
3122 fv32, fv36, fv40, fv44, fv48, fv52, fv56, fv60,
3124 SH COMPACT MODE (ISA 16) (all pseudo) 221-272
3125 r0_c, r1_c, r2_c, r3_c, r4_c, r5_c, r6_c, r7_c,
3126 r8_c, r9_c, r10_c, r11_c, r12_c, r13_c, r14_c, r15_c,
3128 gbr_c, mach_c, macl_c, pr_c, t_c,
3130 fr0_c, fr1_c, fr2_c, fr3_c, fr4_c, fr5_c, fr6_c, fr7_c,
3131 fr8_c, fr9_c, fr10_c, fr11_c, fr12_c, fr13_c, fr14_c, fr15_c
3132 dr0_c, dr2_c, dr4_c, dr6_c, dr8_c, dr10_c, dr12_c, dr14_c
3133 fv0_c, fv4_c, fv8_c, fv12_c
3137 sh_sh64_register_byte (int reg_nr
)
3139 int base_regnum
= -1;
3140 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3142 /* If it is a pseudo register, get the number of the first floating
3143 point register that is part of it. */
3144 if (reg_nr
>= tdep
->DR0_REGNUM
3145 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3146 base_regnum
= dr_reg_base_num (reg_nr
);
3148 else if (reg_nr
>= tdep
->FPP0_REGNUM
3149 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3150 base_regnum
= fpp_reg_base_num (reg_nr
);
3152 else if (reg_nr
>= tdep
->FV0_REGNUM
3153 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3154 base_regnum
= fv_reg_base_num (reg_nr
);
3156 /* sh compact pseudo register. FPSCR is a pathological case, need to
3157 treat it as special. */
3158 else if ((reg_nr
>= tdep
->R0_C_REGNUM
3159 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
3160 && reg_nr
!= tdep
->FPSCR_C_REGNUM
)
3161 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3163 /* Now return the offset in bytes within the register cache. */
3164 /* sh media pseudo register, i.e. any of DR, FFP, FV registers. */
3165 if (reg_nr
>= tdep
->DR0_REGNUM
3166 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3167 return (base_regnum
- FP0_REGNUM
+ 1) * 4
3168 + (tdep
->TR7_REGNUM
+ 1) * 8;
3170 /* sh compact pseudo register: general register */
3171 if ((reg_nr
>= tdep
->R0_C_REGNUM
3172 && reg_nr
<= tdep
->R_LAST_C_REGNUM
))
3173 return (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
3174 ? base_regnum
* 8 + 4
3177 /* sh compact pseudo register: */
3178 if (reg_nr
== tdep
->PC_C_REGNUM
3179 || reg_nr
== tdep
->GBR_C_REGNUM
3180 || reg_nr
== tdep
->MACL_C_REGNUM
3181 || reg_nr
== tdep
->PR_C_REGNUM
)
3182 return (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
3183 ? base_regnum
* 8 + 4
3186 if (reg_nr
== tdep
->MACH_C_REGNUM
)
3187 return base_regnum
* 8;
3189 if (reg_nr
== tdep
->T_C_REGNUM
)
3190 return base_regnum
* 8; /* FIXME??? how do we get bit 0? Do we have to? */
3192 /* sh compact pseudo register: floating point register */
3193 else if (reg_nr
>=tdep
->FP0_C_REGNUM
3194 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
3195 return (base_regnum
- FP0_REGNUM
) * 4
3196 + (tdep
->TR7_REGNUM
+ 1) * 8 + 4;
3198 else if (reg_nr
== tdep
->FPSCR_C_REGNUM
)
3199 /* This is complicated, for now return the beginning of the
3200 architectural FPSCR register. */
3201 return (tdep
->TR7_REGNUM
+ 1) * 8;
3203 else if (reg_nr
== tdep
->FPUL_C_REGNUM
)
3204 return ((base_regnum
- FP0_REGNUM
) * 4 +
3205 (tdep
->TR7_REGNUM
+ 1) * 8 + 4);
3207 /* It is not a pseudo register. */
3208 /* It is a 64 bit register. */
3209 else if (reg_nr
<= tdep
->TR7_REGNUM
)
3212 /* It is a 32 bit register. */
3214 if (reg_nr
== tdep
->FPSCR_REGNUM
)
3215 return (tdep
->FPSCR_REGNUM
* 8);
3217 /* It is floating point 32-bit register */
3219 return ((tdep
->TR7_REGNUM
+ 1) * 8
3220 + (reg_nr
- FP0_REGNUM
+ 1) * 4);
3223 /* Number of bytes of storage in the actual machine representation for
3226 sh_default_register_raw_size (int reg_nr
)
3232 sh_sh4_register_raw_size (int reg_nr
)
3234 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3236 if (reg_nr
>= tdep
->DR0_REGNUM
3237 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3239 else if (reg_nr
>= tdep
->FV0_REGNUM
3240 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3247 sh_sh64_register_raw_size (int reg_nr
)
3249 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3251 if ((reg_nr
>= tdep
->DR0_REGNUM
3252 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3253 || (reg_nr
>= tdep
->FPP0_REGNUM
3254 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3255 || (reg_nr
>= tdep
->DR0_C_REGNUM
3256 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
)
3257 || (reg_nr
<= tdep
->TR7_REGNUM
))
3260 else if ((reg_nr
>= tdep
->FV0_REGNUM
3261 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3262 || (reg_nr
>= tdep
->FV0_C_REGNUM
3263 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
))
3266 else /* this covers also the 32-bit SH compact registers. */
3270 /* Number of bytes of storage in the program's representation
3273 sh_register_virtual_size (int reg_nr
)
3280 sh_sh64_register_virtual_size (int reg_nr
)
3282 if (reg_nr
>= FP0_REGNUM
3283 && reg_nr
<= gdbarch_tdep (current_gdbarch
)->FP_LAST_REGNUM
)
3289 /* Return the GDB type object for the "standard" data type
3290 of data in register N. */
3291 static struct type
*
3292 sh_sh3e_register_virtual_type (int reg_nr
)
3294 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3296 if ((reg_nr
>= FP0_REGNUM
3297 && (reg_nr
<= tdep
->FP_LAST_REGNUM
))
3298 || (reg_nr
== tdep
->FPUL_REGNUM
))
3299 return builtin_type_float
;
3301 return builtin_type_int
;
3304 static struct type
*
3305 sh_sh4_build_float_register_type (int high
)
3309 temp
= create_range_type (NULL
, builtin_type_int
, 0, high
);
3310 return create_array_type (NULL
, builtin_type_float
, temp
);
3313 static struct type
*
3314 sh_sh4_register_virtual_type (int reg_nr
)
3316 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3318 if ((reg_nr
>= FP0_REGNUM
3319 && (reg_nr
<= tdep
->FP_LAST_REGNUM
))
3320 || (reg_nr
== tdep
->FPUL_REGNUM
))
3321 return builtin_type_float
;
3322 else if (reg_nr
>= tdep
->DR0_REGNUM
3323 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3324 return builtin_type_double
;
3325 else if (reg_nr
>= tdep
->FV0_REGNUM
3326 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3327 return sh_sh4_build_float_register_type (3);
3329 return builtin_type_int
;
3332 static struct type
*
3333 sh_sh64_register_virtual_type (int reg_nr
)
3335 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3337 if ((reg_nr
>= FP0_REGNUM
3338 && reg_nr
<= tdep
->FP_LAST_REGNUM
)
3339 || (reg_nr
>= tdep
->FP0_C_REGNUM
3340 && reg_nr
<= tdep
->FP_LAST_C_REGNUM
))
3341 return builtin_type_float
;
3342 else if ((reg_nr
>= tdep
->DR0_REGNUM
3343 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3344 || (reg_nr
>= tdep
->DR0_C_REGNUM
3345 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
))
3346 return builtin_type_double
;
3347 else if (reg_nr
>= tdep
->FPP0_REGNUM
3348 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3349 return sh_sh4_build_float_register_type (1);
3350 else if ((reg_nr
>= tdep
->FV0_REGNUM
3351 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3352 ||(reg_nr
>= tdep
->FV0_C_REGNUM
3353 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
))
3354 return sh_sh4_build_float_register_type (3);
3355 else if (reg_nr
== tdep
->FPSCR_REGNUM
)
3356 return builtin_type_int
;
3357 else if (reg_nr
>= tdep
->R0_C_REGNUM
3358 && reg_nr
< tdep
->FP0_C_REGNUM
)
3359 return builtin_type_int
;
3361 return builtin_type_long_long
;
3364 static struct type
*
3365 sh_default_register_virtual_type (int reg_nr
)
3367 return builtin_type_int
;
3370 /* On the sh4, the DRi pseudo registers are problematic if the target
3371 is little endian. When the user writes one of those registers, for
3372 instance with 'ser var $dr0=1', we want the double to be stored
3374 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
3375 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
3377 This corresponds to little endian byte order & big endian word
3378 order. However if we let gdb write the register w/o conversion, it
3379 will write fr0 and fr1 this way:
3380 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
3381 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
3382 because it will consider fr0 and fr1 as a single LE stretch of memory.
3384 To achieve what we want we must force gdb to store things in
3385 floatformat_ieee_double_littlebyte_bigword (which is defined in
3386 include/floatformat.h and libiberty/floatformat.c.
3388 In case the target is big endian, there is no problem, the
3389 raw bytes will look like:
3390 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
3391 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
3393 The other pseudo registers (the FVs) also don't pose a problem
3394 because they are stored as 4 individual FP elements. */
3397 sh_sh4_register_convert_to_virtual (int regnum
, struct type
*type
,
3398 char *from
, char *to
)
3400 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3402 if (regnum
>= tdep
->DR0_REGNUM
3403 && regnum
<= tdep
->DR_LAST_REGNUM
)
3406 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
, from
, &val
);
3407 deprecated_store_floating (to
, TYPE_LENGTH (type
), val
);
3410 error ("sh_register_convert_to_virtual called with non DR register number");
3414 sh_sh64_register_convert_to_virtual (int regnum
, struct type
*type
,
3415 char *from
, char *to
)
3417 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3419 if (TARGET_BYTE_ORDER
!= BFD_ENDIAN_LITTLE
)
3421 /* It is a no-op. */
3422 memcpy (to
, from
, REGISTER_RAW_SIZE (regnum
));
3426 if ((regnum
>= tdep
->DR0_REGNUM
3427 && regnum
<= tdep
->DR_LAST_REGNUM
)
3428 || (regnum
>= tdep
->DR0_C_REGNUM
3429 && regnum
<= tdep
->DR_LAST_C_REGNUM
))
3432 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
, from
, &val
);
3433 deprecated_store_floating(to
, TYPE_LENGTH(type
), val
);
3436 error("sh_register_convert_to_virtual called with non DR register number");
3440 sh_sh4_register_convert_to_raw (struct type
*type
, int regnum
,
3441 const void *from
, void *to
)
3443 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3445 if (regnum
>= tdep
->DR0_REGNUM
3446 && regnum
<= tdep
->DR_LAST_REGNUM
)
3448 DOUBLEST val
= deprecated_extract_floating (from
, TYPE_LENGTH(type
));
3449 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword
, &val
, to
);
3452 error("sh_register_convert_to_raw called with non DR register number");
3456 sh_sh64_register_convert_to_raw (struct type
*type
, int regnum
,
3457 const void *from
, void *to
)
3459 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3461 if (TARGET_BYTE_ORDER
!= BFD_ENDIAN_LITTLE
)
3463 /* It is a no-op. */
3464 memcpy (to
, from
, REGISTER_RAW_SIZE (regnum
));
3468 if ((regnum
>= tdep
->DR0_REGNUM
3469 && regnum
<= tdep
->DR_LAST_REGNUM
)
3470 || (regnum
>= tdep
->DR0_C_REGNUM
3471 && regnum
<= tdep
->DR_LAST_C_REGNUM
))
3473 DOUBLEST val
= deprecated_extract_floating (from
, TYPE_LENGTH(type
));
3474 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword
, &val
, to
);
3477 error("sh_register_convert_to_raw called with non DR register number");
3481 sh_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3482 int reg_nr
, void *buffer
)
3484 int base_regnum
, portion
;
3485 char temp_buffer
[MAX_REGISTER_SIZE
];
3486 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3488 if (reg_nr
>= tdep
->DR0_REGNUM
3489 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3491 base_regnum
= dr_reg_base_num (reg_nr
);
3493 /* Build the value in the provided buffer. */
3494 /* Read the real regs for which this one is an alias. */
3495 for (portion
= 0; portion
< 2; portion
++)
3496 regcache_raw_read (regcache
, base_regnum
+ portion
,
3498 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3499 /* We must pay attention to the endiannes. */
3500 sh_sh4_register_convert_to_virtual (reg_nr
,
3501 REGISTER_VIRTUAL_TYPE (reg_nr
),
3502 temp_buffer
, buffer
);
3504 else if (reg_nr
>= tdep
->FV0_REGNUM
3505 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3507 base_regnum
= fv_reg_base_num (reg_nr
);
3509 /* Read the real regs for which this one is an alias. */
3510 for (portion
= 0; portion
< 4; portion
++)
3511 regcache_raw_read (regcache
, base_regnum
+ portion
,
3513 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3518 sh64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3519 int reg_nr
, void *buffer
)
3524 char temp_buffer
[MAX_REGISTER_SIZE
];
3525 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3527 if (reg_nr
>= tdep
->DR0_REGNUM
3528 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3530 base_regnum
= dr_reg_base_num (reg_nr
);
3532 /* Build the value in the provided buffer. */
3533 /* DR regs are double precision registers obtained by
3534 concatenating 2 single precision floating point registers. */
3535 for (portion
= 0; portion
< 2; portion
++)
3536 regcache_raw_read (regcache
, base_regnum
+ portion
,
3538 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3540 /* We must pay attention to the endiannes. */
3541 sh_sh64_register_convert_to_virtual (reg_nr
, REGISTER_VIRTUAL_TYPE (reg_nr
),
3542 temp_buffer
, buffer
);
3546 else if (reg_nr
>= tdep
->FPP0_REGNUM
3547 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3549 base_regnum
= fpp_reg_base_num (reg_nr
);
3551 /* Build the value in the provided buffer. */
3552 /* FPP regs are pairs of single precision registers obtained by
3553 concatenating 2 single precision floating point registers. */
3554 for (portion
= 0; portion
< 2; portion
++)
3555 regcache_raw_read (regcache
, base_regnum
+ portion
,
3557 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3560 else if (reg_nr
>= tdep
->FV0_REGNUM
3561 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3563 base_regnum
= fv_reg_base_num (reg_nr
);
3565 /* Build the value in the provided buffer. */
3566 /* FV regs are vectors of single precision registers obtained by
3567 concatenating 4 single precision floating point registers. */
3568 for (portion
= 0; portion
< 4; portion
++)
3569 regcache_raw_read (regcache
, base_regnum
+ portion
,
3571 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3574 /* sh compact pseudo registers. 1-to-1 with a shmedia register */
3575 else if (reg_nr
>= tdep
->R0_C_REGNUM
3576 && reg_nr
<= tdep
->T_C_REGNUM
)
3578 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3580 /* Build the value in the provided buffer. */
3581 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
3582 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
3584 memcpy (buffer
, temp_buffer
+ offset
, 4); /* get LOWER 32 bits only????*/
3587 else if (reg_nr
>= tdep
->FP0_C_REGNUM
3588 && reg_nr
<= tdep
->FP_LAST_C_REGNUM
)
3590 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3592 /* Build the value in the provided buffer. */
3593 /* Floating point registers map 1-1 to the media fp regs,
3594 they have the same size and endienness. */
3595 regcache_raw_read (regcache
, base_regnum
, buffer
);
3598 else if (reg_nr
>= tdep
->DR0_C_REGNUM
3599 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
)
3601 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3603 /* DR_C regs are double precision registers obtained by
3604 concatenating 2 single precision floating point registers. */
3605 for (portion
= 0; portion
< 2; portion
++)
3606 regcache_raw_read (regcache
, base_regnum
+ portion
,
3608 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3610 /* We must pay attention to the endiannes. */
3611 sh_sh64_register_convert_to_virtual (reg_nr
, REGISTER_VIRTUAL_TYPE (reg_nr
),
3612 temp_buffer
, buffer
);
3615 else if (reg_nr
>= tdep
->FV0_C_REGNUM
3616 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
3618 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3620 /* Build the value in the provided buffer. */
3621 /* FV_C regs are vectors of single precision registers obtained by
3622 concatenating 4 single precision floating point registers. */
3623 for (portion
= 0; portion
< 4; portion
++)
3624 regcache_raw_read (regcache
, base_regnum
+ portion
,
3626 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3629 else if (reg_nr
== tdep
->FPSCR_C_REGNUM
)
3631 int fpscr_base_regnum
;
3633 unsigned int fpscr_value
;
3634 unsigned int sr_value
;
3635 unsigned int fpscr_c_value
;
3636 unsigned int fpscr_c_part1_value
;
3637 unsigned int fpscr_c_part2_value
;
3639 fpscr_base_regnum
= tdep
->FPSCR_REGNUM
;
3640 sr_base_regnum
= tdep
->SR_REGNUM
;
3642 /* Build the value in the provided buffer. */
3643 /* FPSCR_C is a very weird register that contains sparse bits
3644 from the FPSCR and the SR architectural registers.
3651 2-17 Bit 2-18 of FPSCR
3652 18-20 Bits 12,13,14 of SR
3656 /* Get FPSCR into a local buffer */
3657 regcache_raw_read (regcache
, fpscr_base_regnum
, temp_buffer
);
3658 /* Get value as an int. */
3659 fpscr_value
= extract_unsigned_integer (temp_buffer
, 4);
3660 /* Get SR into a local buffer */
3661 regcache_raw_read (regcache
, sr_base_regnum
, temp_buffer
);
3662 /* Get value as an int. */
3663 sr_value
= extract_unsigned_integer (temp_buffer
, 4);
3664 /* Build the new value. */
3665 fpscr_c_part1_value
= fpscr_value
& 0x3fffd;
3666 fpscr_c_part2_value
= (sr_value
& 0x7000) << 6;
3667 fpscr_c_value
= fpscr_c_part1_value
| fpscr_c_part2_value
;
3668 /* Store that in out buffer!!! */
3669 store_unsigned_integer (buffer
, 4, fpscr_c_value
);
3670 /* FIXME There is surely an endianness gotcha here. */
3673 else if (reg_nr
== tdep
->FPUL_C_REGNUM
)
3675 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3677 /* FPUL_C register is floating point register 32,
3678 same size, same endianness. */
3679 regcache_raw_read (regcache
, base_regnum
, buffer
);
3684 sh_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3685 int reg_nr
, const void *buffer
)
3687 int base_regnum
, portion
;
3688 char temp_buffer
[MAX_REGISTER_SIZE
];
3689 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3691 if (reg_nr
>= tdep
->DR0_REGNUM
3692 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3694 base_regnum
= dr_reg_base_num (reg_nr
);
3696 /* We must pay attention to the endiannes. */
3697 sh_sh4_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr
), reg_nr
,
3698 buffer
, temp_buffer
);
3700 /* Write the real regs for which this one is an alias. */
3701 for (portion
= 0; portion
< 2; portion
++)
3702 regcache_raw_write (regcache
, base_regnum
+ portion
,
3704 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3706 else if (reg_nr
>= tdep
->FV0_REGNUM
3707 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3709 base_regnum
= fv_reg_base_num (reg_nr
);
3711 /* Write the real regs for which this one is an alias. */
3712 for (portion
= 0; portion
< 4; portion
++)
3713 regcache_raw_write (regcache
, base_regnum
+ portion
,
3715 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3720 sh64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3721 int reg_nr
, const void *buffer
)
3723 int base_regnum
, portion
;
3725 char temp_buffer
[MAX_REGISTER_SIZE
];
3726 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3728 if (reg_nr
>= tdep
->DR0_REGNUM
3729 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
3731 base_regnum
= dr_reg_base_num (reg_nr
);
3732 /* We must pay attention to the endiannes. */
3733 sh_sh64_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr
), reg_nr
,
3734 buffer
, temp_buffer
);
3737 /* Write the real regs for which this one is an alias. */
3738 for (portion
= 0; portion
< 2; portion
++)
3739 regcache_raw_write (regcache
, base_regnum
+ portion
,
3741 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3744 else if (reg_nr
>= tdep
->FPP0_REGNUM
3745 && reg_nr
<= tdep
->FPP_LAST_REGNUM
)
3747 base_regnum
= fpp_reg_base_num (reg_nr
);
3749 /* Write the real regs for which this one is an alias. */
3750 for (portion
= 0; portion
< 2; portion
++)
3751 regcache_raw_write (regcache
, base_regnum
+ portion
,
3753 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3756 else if (reg_nr
>= tdep
->FV0_REGNUM
3757 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
3759 base_regnum
= fv_reg_base_num (reg_nr
);
3761 /* Write the real regs for which this one is an alias. */
3762 for (portion
= 0; portion
< 4; portion
++)
3763 regcache_raw_write (regcache
, base_regnum
+ portion
,
3765 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3768 /* sh compact general pseudo registers. 1-to-1 with a shmedia
3769 register but only 4 bytes of it. */
3770 else if (reg_nr
>= tdep
->R0_C_REGNUM
3771 && reg_nr
<= tdep
->T_C_REGNUM
)
3773 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3774 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
3775 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
3779 /* Let's read the value of the base register into a temporary
3780 buffer, so that overwriting the last four bytes with the new
3781 value of the pseudo will leave the upper 4 bytes unchanged. */
3782 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
3783 /* Write as an 8 byte quantity */
3784 memcpy (temp_buffer
+ offset
, buffer
, 4);
3785 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
3788 /* sh floating point compact pseudo registers. 1-to-1 with a shmedia
3789 registers. Both are 4 bytes. */
3790 else if (reg_nr
>= tdep
->FP0_C_REGNUM
3791 && reg_nr
<= tdep
->FP_LAST_C_REGNUM
)
3793 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3794 regcache_raw_write (regcache
, base_regnum
, buffer
);
3797 else if (reg_nr
>= tdep
->DR0_C_REGNUM
3798 && reg_nr
<= tdep
->DR_LAST_C_REGNUM
)
3800 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3801 for (portion
= 0; portion
< 2; portion
++)
3803 /* We must pay attention to the endiannes. */
3804 sh_sh64_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr
), reg_nr
,
3805 buffer
, temp_buffer
);
3807 regcache_raw_write (regcache
, base_regnum
+ portion
,
3809 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3813 else if (reg_nr
>= tdep
->FV0_C_REGNUM
3814 && reg_nr
<= tdep
->FV_LAST_C_REGNUM
)
3816 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3818 for (portion
= 0; portion
< 4; portion
++)
3820 regcache_raw_write (regcache
, base_regnum
+ portion
,
3822 + REGISTER_RAW_SIZE (base_regnum
) * portion
));
3826 else if (reg_nr
== tdep
->FPSCR_C_REGNUM
)
3828 int fpscr_base_regnum
;
3830 unsigned int fpscr_value
;
3831 unsigned int sr_value
;
3832 unsigned int old_fpscr_value
;
3833 unsigned int old_sr_value
;
3834 unsigned int fpscr_c_value
;
3835 unsigned int fpscr_mask
;
3836 unsigned int sr_mask
;
3838 fpscr_base_regnum
= tdep
->FPSCR_REGNUM
;
3839 sr_base_regnum
= tdep
->SR_REGNUM
;
3841 /* FPSCR_C is a very weird register that contains sparse bits
3842 from the FPSCR and the SR architectural registers.
3849 2-17 Bit 2-18 of FPSCR
3850 18-20 Bits 12,13,14 of SR
3854 /* Get value as an int. */
3855 fpscr_c_value
= extract_unsigned_integer (buffer
, 4);
3857 /* Build the new values. */
3858 fpscr_mask
= 0x0003fffd;
3859 sr_mask
= 0x001c0000;
3861 fpscr_value
= fpscr_c_value
& fpscr_mask
;
3862 sr_value
= (fpscr_value
& sr_mask
) >> 6;
3864 regcache_raw_read (regcache
, fpscr_base_regnum
, temp_buffer
);
3865 old_fpscr_value
= extract_unsigned_integer (temp_buffer
, 4);
3866 old_fpscr_value
&= 0xfffc0002;
3867 fpscr_value
|= old_fpscr_value
;
3868 store_unsigned_integer (temp_buffer
, 4, fpscr_value
);
3869 regcache_raw_write (regcache
, fpscr_base_regnum
, temp_buffer
);
3871 regcache_raw_read (regcache
, sr_base_regnum
, temp_buffer
);
3872 old_sr_value
= extract_unsigned_integer (temp_buffer
, 4);
3873 old_sr_value
&= 0xffff8fff;
3874 sr_value
|= old_sr_value
;
3875 store_unsigned_integer (temp_buffer
, 4, sr_value
);
3876 regcache_raw_write (regcache
, sr_base_regnum
, temp_buffer
);
3879 else if (reg_nr
== tdep
->FPUL_C_REGNUM
)
3881 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
3882 regcache_raw_write (regcache
, base_regnum
, buffer
);
3886 /* Floating point vector of 4 float registers. */
3888 do_fv_register_info (int fv_regnum
)
3890 int first_fp_reg_num
= fv_reg_base_num (fv_regnum
);
3891 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
3892 fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
,
3893 (int) read_register (first_fp_reg_num
),
3894 (int) read_register (first_fp_reg_num
+ 1),
3895 (int) read_register (first_fp_reg_num
+ 2),
3896 (int) read_register (first_fp_reg_num
+ 3));
3899 /* Floating point vector of 4 float registers, compact mode. */
3901 do_fv_c_register_info (int fv_regnum
)
3903 int first_fp_reg_num
= sh64_compact_reg_base_num (fv_regnum
);
3904 printf_filtered ("fv%d_c\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
3905 fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_C_REGNUM
,
3906 (int) read_register (first_fp_reg_num
),
3907 (int) read_register (first_fp_reg_num
+ 1),
3908 (int) read_register (first_fp_reg_num
+ 2),
3909 (int) read_register (first_fp_reg_num
+ 3));
3912 /* Pairs of single regs. The DR are instead double precision
3915 do_fpp_register_info (int fpp_regnum
)
3917 int first_fp_reg_num
= fpp_reg_base_num (fpp_regnum
);
3919 printf_filtered ("fpp%d\t0x%08x\t0x%08x\n",
3920 fpp_regnum
- gdbarch_tdep (current_gdbarch
)->FPP0_REGNUM
,
3921 (int) read_register (first_fp_reg_num
),
3922 (int) read_register (first_fp_reg_num
+ 1));
3925 /* Double precision registers. */
3927 do_dr_register_info (int dr_regnum
)
3929 int first_fp_reg_num
= dr_reg_base_num (dr_regnum
);
3931 printf_filtered ("dr%d\t0x%08x%08x\n",
3932 dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
,
3933 (int) read_register (first_fp_reg_num
),
3934 (int) read_register (first_fp_reg_num
+ 1));
3937 /* Double precision registers, compact mode. */
3939 do_dr_c_register_info (int dr_regnum
)
3941 int first_fp_reg_num
= sh64_compact_reg_base_num (dr_regnum
);
3943 printf_filtered ("dr%d_c\t0x%08x%08x\n",
3944 dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_C_REGNUM
,
3945 (int) read_register (first_fp_reg_num
),
3946 (int) read_register (first_fp_reg_num
+1));
3949 /* General register in compact mode. */
3951 do_r_c_register_info (int r_c_regnum
)
3953 int regnum
= sh64_compact_reg_base_num (r_c_regnum
);
3955 printf_filtered ("r%d_c\t0x%08x\n",
3956 r_c_regnum
- gdbarch_tdep (current_gdbarch
)->R0_C_REGNUM
,
3957 /*FIXME!!!*/ (int) read_register (regnum
));
3960 /* FIXME:!! THIS SHOULD TAKE CARE OF GETTING THE RIGHT PORTION OF THE
3961 shmedia REGISTERS. */
3962 /* Control registers, compact mode. */
3964 do_cr_c_register_info (int cr_c_regnum
)
3966 switch (cr_c_regnum
)
3968 case 237: printf_filtered ("pc_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3970 case 238: printf_filtered ("gbr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3972 case 239: printf_filtered ("mach_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3974 case 240: printf_filtered ("macl_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3976 case 241: printf_filtered ("pr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3978 case 242: printf_filtered ("t_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3980 case 243: printf_filtered ("fpscr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
3982 case 244: printf_filtered ("fpul_c\t0x%08x\n", (int)read_register (cr_c_regnum
));
3988 sh_do_pseudo_register (int regnum
)
3990 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3992 if (regnum
< NUM_REGS
|| regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
3993 internal_error (__FILE__
, __LINE__
,
3994 "Invalid pseudo register number %d\n", regnum
);
3995 else if (regnum
>= tdep
->DR0_REGNUM
3996 && regnum
< tdep
->DR_LAST_REGNUM
)
3997 do_dr_register_info (regnum
);
3998 else if (regnum
>= tdep
->FV0_REGNUM
3999 && regnum
<= tdep
->FV_LAST_REGNUM
)
4000 do_fv_register_info (regnum
);
4004 sh_do_fp_register (int regnum
)
4005 { /* do values for FP (float) regs */
4007 double flt
; /* double extracted from raw hex data */
4011 /* Allocate space for the float. */
4012 raw_buffer
= (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM
));
4014 /* Get the data in raw format. */
4015 if (!frame_register_read (deprecated_selected_frame
, regnum
, raw_buffer
))
4016 error ("can't read register %d (%s)", regnum
, REGISTER_NAME (regnum
));
4018 /* Get the register as a number */
4019 flt
= unpack_double (builtin_type_float
, raw_buffer
, &inv
);
4021 /* Print the name and some spaces. */
4022 fputs_filtered (REGISTER_NAME (regnum
), gdb_stdout
);
4023 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), gdb_stdout
);
4025 /* Print the value. */
4027 printf_filtered ("<invalid float>");
4029 printf_filtered ("%-10.9g", flt
);
4031 /* Print the fp register as hex. */
4032 printf_filtered ("\t(raw 0x");
4033 for (j
= 0; j
< REGISTER_RAW_SIZE (regnum
); j
++)
4035 register int idx
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? j
4036 : REGISTER_RAW_SIZE (regnum
) - 1 - j
;
4037 printf_filtered ("%02x", (unsigned char) raw_buffer
[idx
]);
4039 printf_filtered (")");
4040 printf_filtered ("\n");
4044 sh64_do_pseudo_register (int regnum
)
4046 /* All the sh64-compact mode registers are pseudo registers. */
4047 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
4049 if (regnum
< NUM_REGS
4050 || regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS_SH_MEDIA
+ NUM_PSEUDO_REGS_SH_COMPACT
)
4051 internal_error (__FILE__
, __LINE__
,
4052 "Invalid pseudo register number %d\n", regnum
);
4054 else if ((regnum
>= tdep
->DR0_REGNUM
4055 && regnum
<= tdep
->DR_LAST_REGNUM
))
4056 do_dr_register_info (regnum
);
4058 else if ((regnum
>= tdep
->DR0_C_REGNUM
4059 && regnum
<= tdep
->DR_LAST_C_REGNUM
))
4060 do_dr_c_register_info (regnum
);
4062 else if ((regnum
>= tdep
->FV0_REGNUM
4063 && regnum
<= tdep
->FV_LAST_REGNUM
))
4064 do_fv_register_info (regnum
);
4066 else if ((regnum
>= tdep
->FV0_C_REGNUM
4067 && regnum
<= tdep
->FV_LAST_C_REGNUM
))
4068 do_fv_c_register_info (regnum
);
4070 else if (regnum
>= tdep
->FPP0_REGNUM
4071 && regnum
<= tdep
->FPP_LAST_REGNUM
)
4072 do_fpp_register_info (regnum
);
4074 else if (regnum
>= tdep
->R0_C_REGNUM
4075 && regnum
<= tdep
->R_LAST_C_REGNUM
)
4076 do_r_c_register_info (regnum
); /* FIXME, this function will not print the right format */
4078 else if (regnum
>= tdep
->FP0_C_REGNUM
4079 && regnum
<= tdep
->FP_LAST_C_REGNUM
)
4080 sh_do_fp_register (regnum
); /* this should work also for pseudoregs */
4082 else if (regnum
>= tdep
->PC_C_REGNUM
4083 && regnum
<= tdep
->FPUL_C_REGNUM
)
4084 do_cr_c_register_info (regnum
);
4089 sh_do_register (int regnum
)
4091 char raw_buffer
[MAX_REGISTER_SIZE
];
4093 fputs_filtered (REGISTER_NAME (regnum
), gdb_stdout
);
4094 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), gdb_stdout
);
4096 /* Get the data in raw format. */
4097 if (!frame_register_read (deprecated_selected_frame
, regnum
, raw_buffer
))
4098 printf_filtered ("*value not available*\n");
4100 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0, 0,
4101 gdb_stdout
, 'x', 1, 0, Val_pretty_default
);
4102 printf_filtered ("\t");
4103 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0, 0,
4104 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
4105 printf_filtered ("\n");
4109 sh_print_register (int regnum
)
4111 if (regnum
< 0 || regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
4112 internal_error (__FILE__
, __LINE__
,
4113 "Invalid register number %d\n", regnum
);
4115 else if (regnum
>= 0 && regnum
< NUM_REGS
)
4117 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
4118 sh_do_fp_register (regnum
); /* FP regs */
4120 sh_do_register (regnum
); /* All other regs */
4123 else if (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
4124 do_pseudo_register (regnum
);
4128 sh_do_registers_info (int regnum
, int fpregs
)
4130 if (regnum
!= -1) /* do one specified register */
4132 if (*(REGISTER_NAME (regnum
)) == '\0')
4133 error ("Not a valid register for the current processor type");
4135 sh_print_register (regnum
);
4138 /* do all (or most) registers */
4141 while (regnum
< NUM_REGS
)
4143 /* If the register name is empty, it is undefined for this
4144 processor, so don't display anything. */
4145 if (REGISTER_NAME (regnum
) == NULL
4146 || *(REGISTER_NAME (regnum
)) == '\0')
4152 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
4156 /* true for "INFO ALL-REGISTERS" command */
4157 sh_do_fp_register (regnum
); /* FP regs */
4161 regnum
+= (gdbarch_tdep (current_gdbarch
)->FP_LAST_REGNUM
- FP0_REGNUM
); /* skip FP regs */
4165 sh_do_register (regnum
); /* All other regs */
4171 while (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
4173 do_pseudo_register (regnum
);
4180 sh_compact_do_registers_info (int regnum
, int fpregs
)
4182 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
4183 if (regnum
!= -1) /* do one specified register */
4185 if (*(REGISTER_NAME (regnum
)) == '\0')
4186 error ("Not a valid register for the current processor type");
4188 if (regnum
>= 0 && regnum
< tdep
->R0_C_REGNUM
)
4189 error ("Not a valid register for the current processor mode.");
4191 sh_print_register (regnum
);
4194 /* do all compact registers */
4196 regnum
= tdep
->R0_C_REGNUM
;
4197 while (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
4199 do_pseudo_register (regnum
);
4206 sh64_do_registers_info (int regnum
, int fpregs
)
4208 if (pc_is_isa32 (get_frame_pc (deprecated_selected_frame
)))
4209 sh_do_registers_info (regnum
, fpregs
);
4211 sh_compact_do_registers_info (regnum
, fpregs
);
4214 #ifdef SVR4_SHARED_LIBS
4216 /* Fetch (and possibly build) an appropriate link_map_offsets structure
4217 for native i386 linux targets using the struct offsets defined in
4218 link.h (but without actual reference to that file).
4220 This makes it possible to access i386-linux shared libraries from
4221 a gdb that was not built on an i386-linux host (for cross debugging).
4224 struct link_map_offsets
*
4225 sh_linux_svr4_fetch_link_map_offsets (void)
4227 static struct link_map_offsets lmo
;
4228 static struct link_map_offsets
*lmp
= 0;
4234 lmo
.r_debug_size
= 8; /* 20 not actual size but all we need */
4236 lmo
.r_map_offset
= 4;
4239 lmo
.link_map_size
= 20; /* 552 not actual size but all we need */
4241 lmo
.l_addr_offset
= 0;
4242 lmo
.l_addr_size
= 4;
4244 lmo
.l_name_offset
= 4;
4245 lmo
.l_name_size
= 4;
4247 lmo
.l_next_offset
= 12;
4248 lmo
.l_next_size
= 4;
4250 lmo
.l_prev_offset
= 16;
4251 lmo
.l_prev_size
= 4;
4256 #endif /* SVR4_SHARED_LIBS */
4261 DSP_DSR_REGNUM
= 24,
4273 DSP_MOD_REGNUM
= 40,
4278 DSP_R0_BANK_REGNUM
= 51,
4279 DSP_R7_BANK_REGNUM
= DSP_R0_BANK_REGNUM
+ 7
4283 sh_dsp_register_sim_regno (int nr
)
4285 if (legacy_register_sim_regno (nr
) < 0)
4286 return legacy_register_sim_regno (nr
);
4287 if (nr
>= DSP_DSR_REGNUM
&& nr
< DSP_Y1_REGNUM
)
4288 return nr
- DSP_DSR_REGNUM
+ SIM_SH_DSR_REGNUM
;
4289 if (nr
== DSP_MOD_REGNUM
)
4290 return SIM_SH_MOD_REGNUM
;
4291 if (nr
== DSP_RS_REGNUM
)
4292 return SIM_SH_RS_REGNUM
;
4293 if (nr
== DSP_RE_REGNUM
)
4294 return SIM_SH_RE_REGNUM
;
4295 if (nr
>= DSP_R0_BANK_REGNUM
&& nr
<= DSP_R7_BANK_REGNUM
)
4296 return nr
- DSP_R0_BANK_REGNUM
+ SIM_SH_R0_BANK_REGNUM
;
4300 static gdbarch_init_ftype sh_gdbarch_init
;
4302 static struct gdbarch
*
4303 sh_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
4305 static LONGEST sh_call_dummy_words
[] = {0};
4306 struct gdbarch
*gdbarch
;
4307 struct gdbarch_tdep
*tdep
;
4308 gdbarch_register_name_ftype
*sh_register_name
;
4309 gdbarch_deprecated_store_return_value_ftype
*sh_store_return_value
;
4310 gdbarch_register_virtual_type_ftype
*sh_register_virtual_type
;
4312 /* If there is already a candidate, use it. */
4313 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
4315 return arches
->gdbarch
;
4317 /* None found, create a new architecture from the information
4319 tdep
= XMALLOC (struct gdbarch_tdep
);
4320 gdbarch
= gdbarch_alloc (&info
, tdep
);
4322 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
4323 ready to unwind the PC first (see frame.c:get_prev_frame()). */
4324 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
4326 /* Initialize the register numbers that are not common to all the
4327 variants to -1, if necessary thse will be overwritten in the case
4329 tdep
->FPUL_REGNUM
= -1;
4330 tdep
->FPSCR_REGNUM
= -1;
4331 tdep
->PR_REGNUM
= 17;
4332 tdep
->SR_REGNUM
= 22;
4333 tdep
->DSR_REGNUM
= -1;
4334 tdep
->FP_LAST_REGNUM
= -1;
4335 tdep
->A0G_REGNUM
= -1;
4336 tdep
->A0_REGNUM
= -1;
4337 tdep
->A1G_REGNUM
= -1;
4338 tdep
->A1_REGNUM
= -1;
4339 tdep
->M0_REGNUM
= -1;
4340 tdep
->M1_REGNUM
= -1;
4341 tdep
->X0_REGNUM
= -1;
4342 tdep
->X1_REGNUM
= -1;
4343 tdep
->Y0_REGNUM
= -1;
4344 tdep
->Y1_REGNUM
= -1;
4345 tdep
->MOD_REGNUM
= -1;
4346 tdep
->RS_REGNUM
= -1;
4347 tdep
->RE_REGNUM
= -1;
4348 tdep
->SSR_REGNUM
= -1;
4349 tdep
->SPC_REGNUM
= -1;
4350 tdep
->DR0_REGNUM
= -1;
4351 tdep
->DR_LAST_REGNUM
= -1;
4352 tdep
->FV0_REGNUM
= -1;
4353 tdep
->FV_LAST_REGNUM
= -1;
4354 tdep
->ARG0_REGNUM
= 4;
4355 tdep
->ARGLAST_REGNUM
= 7;
4356 tdep
->RETURN_REGNUM
= 0;
4357 tdep
->FLOAT_ARGLAST_REGNUM
= -1;
4359 tdep
->sh_abi
= SH_ABI_UNKNOWN
;
4361 set_gdbarch_fp0_regnum (gdbarch
, -1);
4362 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
4363 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 4);
4364 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 4);
4365 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4366 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4367 set_gdbarch_num_regs (gdbarch
, SH_DEFAULT_NUM_REGS
);
4368 set_gdbarch_sp_regnum (gdbarch
, 15);
4369 set_gdbarch_deprecated_fp_regnum (gdbarch
, 14);
4370 set_gdbarch_pc_regnum (gdbarch
, 16);
4371 set_gdbarch_deprecated_register_size (gdbarch
, 4);
4372 set_gdbarch_deprecated_register_bytes (gdbarch
, SH_DEFAULT_NUM_REGS
* 4);
4373 set_gdbarch_deprecated_do_registers_info (gdbarch
, sh_do_registers_info
);
4374 set_gdbarch_breakpoint_from_pc (gdbarch
, sh_breakpoint_from_pc
);
4375 set_gdbarch_deprecated_frame_chain (gdbarch
, sh_frame_chain
);
4376 set_gdbarch_deprecated_get_saved_register (gdbarch
, deprecated_generic_get_saved_register
);
4377 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, sh_init_extra_frame_info
);
4378 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh_extract_return_value
);
4379 set_gdbarch_deprecated_push_arguments (gdbarch
, sh_push_arguments
);
4380 set_gdbarch_deprecated_store_struct_return (gdbarch
, sh_store_struct_return
);
4381 set_gdbarch_use_struct_convention (gdbarch
, sh_use_struct_convention
);
4382 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
4383 set_gdbarch_deprecated_pop_frame (gdbarch
, sh_pop_frame
);
4384 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_sh
);
4385 set_gdbarch_register_sim_regno (gdbarch
, legacy_register_sim_regno
);
4386 skip_prologue_hard_way
= sh_skip_prologue_hard_way
;
4387 do_pseudo_register
= sh_do_pseudo_register
;
4389 switch (info
.bfd_arch_info
->mach
)
4392 sh_register_name
= sh_sh_register_name
;
4393 sh_show_regs
= sh_generic_show_regs
;
4394 sh_store_return_value
= sh_default_store_return_value
;
4395 sh_register_virtual_type
= sh_default_register_virtual_type
;
4396 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4397 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4398 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4399 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4402 sh_register_name
= sh_sh_register_name
;
4403 sh_show_regs
= sh_generic_show_regs
;
4404 sh_store_return_value
= sh_default_store_return_value
;
4405 sh_register_virtual_type
= sh_default_register_virtual_type
;
4406 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4407 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4408 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4409 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4412 sh_register_name
= sh_sh2e_register_name
;
4413 sh_show_regs
= sh2e_show_regs
;
4414 sh_store_return_value
= sh3e_sh4_store_return_value
;
4415 sh_register_virtual_type
= sh_sh3e_register_virtual_type
;
4416 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4417 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4418 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4419 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4420 set_gdbarch_fp0_regnum (gdbarch
, 25);
4421 tdep
->FPUL_REGNUM
= 23;
4422 tdep
->FPSCR_REGNUM
= 24;
4423 tdep
->FP_LAST_REGNUM
= 40;
4425 case bfd_mach_sh_dsp
:
4426 sh_register_name
= sh_sh_dsp_register_name
;
4427 sh_show_regs
= sh_dsp_show_regs
;
4428 sh_store_return_value
= sh_default_store_return_value
;
4429 sh_register_virtual_type
= sh_default_register_virtual_type
;
4430 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4431 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4432 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4433 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4434 set_gdbarch_register_sim_regno (gdbarch
, sh_dsp_register_sim_regno
);
4435 tdep
->DSR_REGNUM
= 24;
4436 tdep
->A0G_REGNUM
= 25;
4437 tdep
->A0_REGNUM
= 26;
4438 tdep
->A1G_REGNUM
= 27;
4439 tdep
->A1_REGNUM
= 28;
4440 tdep
->M0_REGNUM
= 29;
4441 tdep
->M1_REGNUM
= 30;
4442 tdep
->X0_REGNUM
= 31;
4443 tdep
->X1_REGNUM
= 32;
4444 tdep
->Y0_REGNUM
= 33;
4445 tdep
->Y1_REGNUM
= 34;
4446 tdep
->MOD_REGNUM
= 40;
4447 tdep
->RS_REGNUM
= 43;
4448 tdep
->RE_REGNUM
= 44;
4451 sh_register_name
= sh_sh3_register_name
;
4452 sh_show_regs
= sh3_show_regs
;
4453 sh_store_return_value
= sh_default_store_return_value
;
4454 sh_register_virtual_type
= sh_default_register_virtual_type
;
4455 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4456 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4457 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4458 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4459 tdep
->SSR_REGNUM
= 41;
4460 tdep
->SPC_REGNUM
= 42;
4463 sh_register_name
= sh_sh3e_register_name
;
4464 sh_show_regs
= sh3e_show_regs
;
4465 sh_store_return_value
= sh3e_sh4_store_return_value
;
4466 sh_register_virtual_type
= sh_sh3e_register_virtual_type
;
4467 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_fp_frame_init_saved_regs
);
4468 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4469 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4470 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4471 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
4472 set_gdbarch_fp0_regnum (gdbarch
, 25);
4473 tdep
->FPUL_REGNUM
= 23;
4474 tdep
->FPSCR_REGNUM
= 24;
4475 tdep
->FP_LAST_REGNUM
= 40;
4476 tdep
->SSR_REGNUM
= 41;
4477 tdep
->SPC_REGNUM
= 42;
4479 case bfd_mach_sh3_dsp
:
4480 sh_register_name
= sh_sh3_dsp_register_name
;
4481 sh_show_regs
= sh3_dsp_show_regs
;
4482 sh_store_return_value
= sh_default_store_return_value
;
4483 sh_register_virtual_type
= sh_default_register_virtual_type
;
4484 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4485 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4486 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4487 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4488 tdep
->DSR_REGNUM
= 24;
4489 tdep
->A0G_REGNUM
= 25;
4490 tdep
->A0_REGNUM
= 26;
4491 tdep
->A1G_REGNUM
= 27;
4492 tdep
->A1_REGNUM
= 28;
4493 tdep
->M0_REGNUM
= 29;
4494 tdep
->M1_REGNUM
= 30;
4495 tdep
->X0_REGNUM
= 31;
4496 tdep
->X1_REGNUM
= 32;
4497 tdep
->Y0_REGNUM
= 33;
4498 tdep
->Y1_REGNUM
= 34;
4499 tdep
->MOD_REGNUM
= 40;
4500 tdep
->RS_REGNUM
= 43;
4501 tdep
->RE_REGNUM
= 44;
4502 tdep
->SSR_REGNUM
= 41;
4503 tdep
->SPC_REGNUM
= 42;
4506 sh_register_name
= sh_sh4_register_name
;
4507 sh_show_regs
= sh4_show_regs
;
4508 sh_store_return_value
= sh3e_sh4_store_return_value
;
4509 sh_register_virtual_type
= sh_sh4_register_virtual_type
;
4510 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_fp_frame_init_saved_regs
);
4511 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
4512 set_gdbarch_fp0_regnum (gdbarch
, 25);
4513 set_gdbarch_register_raw_size (gdbarch
, sh_sh4_register_raw_size
);
4514 set_gdbarch_register_virtual_size (gdbarch
, sh_sh4_register_raw_size
);
4515 set_gdbarch_register_byte (gdbarch
, sh_sh4_register_byte
);
4516 set_gdbarch_num_pseudo_regs (gdbarch
, 12);
4517 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 4 * 4);
4518 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 4 * 4);
4519 set_gdbarch_pseudo_register_read (gdbarch
, sh_pseudo_register_read
);
4520 set_gdbarch_pseudo_register_write (gdbarch
, sh_pseudo_register_write
);
4521 tdep
->FPUL_REGNUM
= 23;
4522 tdep
->FPSCR_REGNUM
= 24;
4523 tdep
->FP_LAST_REGNUM
= 40;
4524 tdep
->SSR_REGNUM
= 41;
4525 tdep
->SPC_REGNUM
= 42;
4526 tdep
->DR0_REGNUM
= 59;
4527 tdep
->DR_LAST_REGNUM
= 66;
4528 tdep
->FV0_REGNUM
= 67;
4529 tdep
->FV_LAST_REGNUM
= 70;
4532 tdep
->PR_REGNUM
= 18;
4533 tdep
->SR_REGNUM
= 65;
4534 tdep
->FPSCR_REGNUM
= SIM_SH64_FPCSR_REGNUM
;
4535 tdep
->FP_LAST_REGNUM
= SIM_SH64_FR0_REGNUM
+ SIM_SH64_NR_FP_REGS
- 1;
4536 tdep
->SSR_REGNUM
= SIM_SH64_SSR_REGNUM
;
4537 tdep
->SPC_REGNUM
= SIM_SH64_SPC_REGNUM
;
4538 tdep
->TR7_REGNUM
= SIM_SH64_TR0_REGNUM
+ 7;
4539 tdep
->FPP0_REGNUM
= 173;
4540 tdep
->FPP_LAST_REGNUM
= 204;
4541 tdep
->DR0_REGNUM
= 141;
4542 tdep
->DR_LAST_REGNUM
= 172;
4543 tdep
->FV0_REGNUM
= 205;
4544 tdep
->FV_LAST_REGNUM
= 220;
4545 tdep
->R0_C_REGNUM
= 221;
4546 tdep
->R_LAST_C_REGNUM
= 236;
4547 tdep
->PC_C_REGNUM
= 237;
4548 tdep
->GBR_C_REGNUM
= 238;
4549 tdep
->MACH_C_REGNUM
= 239;
4550 tdep
->MACL_C_REGNUM
= 240;
4551 tdep
->PR_C_REGNUM
= 241;
4552 tdep
->T_C_REGNUM
= 242;
4553 tdep
->FPSCR_C_REGNUM
= 243;
4554 tdep
->FPUL_C_REGNUM
= 244;
4555 tdep
->FP0_C_REGNUM
= 245;
4556 tdep
->FP_LAST_C_REGNUM
= 260;
4557 tdep
->DR0_C_REGNUM
= 261;
4558 tdep
->DR_LAST_C_REGNUM
= 268;
4559 tdep
->FV0_C_REGNUM
= 269;
4560 tdep
->FV_LAST_C_REGNUM
= 272;
4561 tdep
->ARG0_REGNUM
= 2;
4562 tdep
->ARGLAST_REGNUM
= 9;
4563 tdep
->RETURN_REGNUM
= 2;
4564 tdep
->FLOAT_ARGLAST_REGNUM
= 11;
4566 set_gdbarch_num_pseudo_regs (gdbarch
, NUM_PSEUDO_REGS_SH_MEDIA
+ NUM_PSEUDO_REGS_SH_COMPACT
);
4567 set_gdbarch_fp0_regnum (gdbarch
, SIM_SH64_FR0_REGNUM
);
4568 set_gdbarch_pc_regnum (gdbarch
, 64);
4570 /* Determine the ABI */
4571 if (bfd_get_arch_size (info
.abfd
) == 64)
4573 /* If the ABI is the 64-bit one, it can only be sh-media. */
4574 tdep
->sh_abi
= SH_ABI_64
;
4575 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4576 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4580 /* If the ABI is the 32-bit one it could be either media or
4582 tdep
->sh_abi
= SH_ABI_32
;
4583 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4584 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4587 /* the number of real registers is the same whether we are in
4588 ISA16(compact) or ISA32(media). */
4589 set_gdbarch_num_regs (gdbarch
, SIM_SH64_NR_REGS
);
4590 set_gdbarch_deprecated_register_size (gdbarch
, 8); /*????*/
4591 set_gdbarch_deprecated_register_bytes (gdbarch
,
4592 ((SIM_SH64_NR_FP_REGS
+ 1) * 4)
4593 + (SIM_SH64_NR_REGS
- SIM_SH64_NR_FP_REGS
-1) * 8);
4595 sh_register_name
= sh_sh64_register_name
;
4596 sh_show_regs
= sh64_show_regs
;
4597 sh_register_virtual_type
= sh_sh64_register_virtual_type
;
4598 sh_store_return_value
= sh64_store_return_value
;
4599 skip_prologue_hard_way
= sh64_skip_prologue_hard_way
;
4600 do_pseudo_register
= sh64_do_pseudo_register
;
4601 set_gdbarch_register_raw_size (gdbarch
, sh_sh64_register_raw_size
);
4602 set_gdbarch_register_virtual_size (gdbarch
, sh_sh64_register_raw_size
);
4603 set_gdbarch_register_byte (gdbarch
, sh_sh64_register_byte
);
4604 /* This seems awfully wrong!*/
4605 /*set_gdbarch_deprecated_max_register_raw_size (gdbarch, 8);*/
4606 /* should include the size of the pseudo regs. */
4607 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 4 * 4);
4608 /* Or should that go in the virtual_size? */
4609 /*set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 8);*/
4610 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 4 * 4);
4611 set_gdbarch_pseudo_register_read (gdbarch
, sh64_pseudo_register_read
);
4612 set_gdbarch_pseudo_register_write (gdbarch
, sh64_pseudo_register_write
);
4614 set_gdbarch_deprecated_do_registers_info (gdbarch
, sh64_do_registers_info
);
4615 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh64_nofp_frame_init_saved_regs
);
4616 set_gdbarch_breakpoint_from_pc (gdbarch
, sh_sh64_breakpoint_from_pc
);
4617 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, sh64_init_extra_frame_info
);
4618 set_gdbarch_deprecated_frame_chain (gdbarch
, sh64_frame_chain
);
4619 set_gdbarch_deprecated_get_saved_register (gdbarch
, sh64_get_saved_register
);
4620 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh64_extract_return_value
);
4621 set_gdbarch_deprecated_push_arguments (gdbarch
, sh64_push_arguments
);
4622 /*set_gdbarch_deprecated_store_struct_return (gdbarch, sh64_store_struct_return);*/
4623 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sh64_extract_struct_value_address
);
4624 set_gdbarch_use_struct_convention (gdbarch
, sh64_use_struct_convention
);
4625 set_gdbarch_deprecated_pop_frame (gdbarch
, sh64_pop_frame
);
4626 set_gdbarch_elf_make_msymbol_special (gdbarch
,
4627 sh64_elf_make_msymbol_special
);
4630 sh_register_name
= sh_generic_register_name
;
4631 sh_show_regs
= sh_generic_show_regs
;
4632 sh_store_return_value
= sh_default_store_return_value
;
4633 sh_register_virtual_type
= sh_default_register_virtual_type
;
4634 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
4635 set_gdbarch_register_raw_size (gdbarch
, sh_default_register_raw_size
);
4636 set_gdbarch_register_virtual_size (gdbarch
, sh_default_register_raw_size
);
4637 set_gdbarch_register_byte (gdbarch
, sh_default_register_byte
);
4641 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
4642 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, deprecated_write_sp
);
4644 set_gdbarch_register_name (gdbarch
, sh_register_name
);
4645 set_gdbarch_register_virtual_type (gdbarch
, sh_register_virtual_type
);
4647 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
4648 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4649 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4650 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
4651 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4652 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
4654 set_gdbarch_deprecated_call_dummy_words (gdbarch
, sh_call_dummy_words
);
4655 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch
, sizeof (sh_call_dummy_words
));
4657 set_gdbarch_deprecated_push_return_address (gdbarch
, sh_push_return_address
);
4659 set_gdbarch_deprecated_store_return_value (gdbarch
, sh_store_return_value
);
4660 set_gdbarch_skip_prologue (gdbarch
, sh_skip_prologue
);
4661 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4662 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
4663 set_gdbarch_function_start_offset (gdbarch
, 0);
4665 set_gdbarch_frame_args_skip (gdbarch
, 0);
4666 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
4667 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, sh_frame_saved_pc
);
4668 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, sh_saved_pc_after_call
);
4669 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
4671 /* Hook in ABI-specific overrides, if they have been registered. */
4672 gdbarch_init_osabi (info
, gdbarch
);
4678 sh_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
4680 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
4685 /* FIXME: dump the rest of gdbarch_tdep. */
4688 extern initialize_file_ftype _initialize_sh_tdep
; /* -Wmissing-prototypes */
4691 _initialize_sh_tdep (void)
4693 struct cmd_list_element
*c
;
4695 gdbarch_register (bfd_arch_sh
, sh_gdbarch_init
, sh_dump_tdep
);
4697 add_com ("regs", class_vars
, sh_show_regs_command
, "Print all registers");