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Create new file regcache.h. Update all uses.
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "obstack.h"
30 #include "symtab.h"
31 #include "symfile.h"
32 #include "gdbtypes.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "value.h"
36 #include "dis-asm.h"
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
41 #include "regcache.h"
42
43 #include "solib-svr4.h"
44
45 #undef XMALLOC
46 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
47
48
49 /* Frame interpretation related functions. */
50 static gdbarch_breakpoint_from_pc_ftype sh_breakpoint_from_pc;
51 static gdbarch_frame_chain_ftype sh_frame_chain;
52 static gdbarch_frame_saved_pc_ftype sh_frame_saved_pc;
53 static gdbarch_skip_prologue_ftype sh_skip_prologue;
54
55 static gdbarch_frame_init_saved_regs_ftype sh_nofp_frame_init_saved_regs;
56 static gdbarch_frame_init_saved_regs_ftype sh_fp_frame_init_saved_regs;
57 static gdbarch_init_extra_frame_info_ftype sh_init_extra_frame_info;
58 static gdbarch_pop_frame_ftype sh_pop_frame;
59 static gdbarch_saved_pc_after_call_ftype sh_saved_pc_after_call;
60
61 /* Function call related functions. */
62 static gdbarch_extract_return_value_ftype sh_extract_return_value;
63 static gdbarch_extract_return_value_ftype sh3e_sh4_extract_return_value;
64 static gdbarch_extract_struct_value_address_ftype sh_extract_struct_value_address;
65 static gdbarch_use_struct_convention_ftype sh_use_struct_convention;
66 static gdbarch_store_struct_return_ftype sh_store_struct_return;
67 static gdbarch_push_arguments_ftype sh_push_arguments;
68 static gdbarch_push_return_address_ftype sh_push_return_address;
69 static gdbarch_coerce_float_to_double_ftype sh_coerce_float_to_double;
70 static gdbarch_store_return_value_ftype sh_default_store_return_value;
71 static gdbarch_store_return_value_ftype sh3e_sh4_store_return_value;
72
73 static gdbarch_register_name_ftype sh_generic_register_name;
74 static gdbarch_register_name_ftype sh_sh_register_name;
75 static gdbarch_register_name_ftype sh_sh3_register_name;
76 static gdbarch_register_name_ftype sh_sh3e_register_name;
77 static gdbarch_register_name_ftype sh_sh_dsp_register_name;
78 static gdbarch_register_name_ftype sh_sh3_dsp_register_name;
79
80 /* Registers display related functions */
81 static gdbarch_register_raw_size_ftype sh_default_register_raw_size;
82 static gdbarch_register_raw_size_ftype sh_sh4_register_raw_size;
83
84 static gdbarch_register_virtual_size_ftype sh_register_virtual_size;
85
86 static gdbarch_register_byte_ftype sh_default_register_byte;
87 static gdbarch_register_byte_ftype sh_sh4_register_byte;
88
89 static gdbarch_register_virtual_type_ftype sh_sh3e_register_virtual_type;
90 static gdbarch_register_virtual_type_ftype sh_sh4_register_virtual_type;
91 static gdbarch_register_virtual_type_ftype sh_default_register_virtual_type;
92
93 static void sh_generic_show_regs (void);
94 static void sh3_show_regs (void);
95 static void sh3e_show_regs (void);
96 static void sh3_dsp_show_regs (void);
97 static void sh_dsp_show_regs (void);
98 static void sh4_show_regs (void);
99 static void sh_show_regs_command (char *, int);
100
101 static struct type *sh_sh4_build_float_register_type (int high);
102
103 static gdbarch_fetch_pseudo_register_ftype sh_fetch_pseudo_register;
104 static gdbarch_store_pseudo_register_ftype sh_store_pseudo_register;
105 static int fv_reg_base_num (int);
106 static int dr_reg_base_num (int);
107 static gdbarch_do_registers_info_ftype sh_do_registers_info;
108 static void do_fv_register_info (int fv_regnum);
109 static void do_dr_register_info (int dr_regnum);
110 static void sh_do_pseudo_register (int regnum);
111 static void sh_do_fp_register (int regnum);
112 static void sh_do_register (int regnum);
113 static void sh_print_register (int regnum);
114
115 void (*sh_show_regs) (void);
116 int (*print_sh_insn) (bfd_vma, disassemble_info*);
117
118 /* Define other aspects of the stack frame.
119 we keep a copy of the worked out return pc lying around, since it
120 is a useful bit of info */
121
122 struct frame_extra_info
123 {
124 CORE_ADDR return_pc;
125 int leaf_function;
126 int f_offset;
127 };
128
129 #if 0
130 #ifdef _WIN32_WCE
131 char **sh_register_names = sh3_reg_names;
132 #else
133 char **sh_register_names = sh_generic_reg_names;
134 #endif
135 #endif
136
137 static char *
138 sh_generic_register_name (int reg_nr)
139 {
140 static char *register_names[] =
141 {
142 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
143 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
144 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
145 "fpul", "fpscr",
146 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
147 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
148 "ssr", "spc",
149 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
150 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
151 };
152 if (reg_nr < 0)
153 return NULL;
154 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
155 return NULL;
156 return register_names[reg_nr];
157 }
158
159 static char *
160 sh_sh_register_name (int reg_nr)
161 {
162 static char *register_names[] =
163 {
164 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
165 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
166 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
167 "", "",
168 "", "", "", "", "", "", "", "",
169 "", "", "", "", "", "", "", "",
170 "", "",
171 "", "", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "",
173 };
174 if (reg_nr < 0)
175 return NULL;
176 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
177 return NULL;
178 return register_names[reg_nr];
179 }
180
181 static char *
182 sh_sh3_register_name (int reg_nr)
183 {
184 static char *register_names[] =
185 {
186 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
187 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
188 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
189 "", "",
190 "", "", "", "", "", "", "", "",
191 "", "", "", "", "", "", "", "",
192 "ssr", "spc",
193 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
194 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
195 };
196 if (reg_nr < 0)
197 return NULL;
198 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
199 return NULL;
200 return register_names[reg_nr];
201 }
202
203 static char *
204 sh_sh3e_register_name (int reg_nr)
205 {
206 static char *register_names[] =
207 {
208 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
209 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
210 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
211 "fpul", "fpscr",
212 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
213 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
214 "ssr", "spc",
215 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
216 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
217 };
218 if (reg_nr < 0)
219 return NULL;
220 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
221 return NULL;
222 return register_names[reg_nr];
223 }
224
225 static char *
226 sh_sh_dsp_register_name (int reg_nr)
227 {
228 static char *register_names[] =
229 {
230 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
231 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
232 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
233 "", "dsr",
234 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
235 "y0", "y1", "", "", "", "", "", "mod",
236 "", "",
237 "rs", "re", "", "", "", "", "", "",
238 "", "", "", "", "", "", "", "",
239 };
240 if (reg_nr < 0)
241 return NULL;
242 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
243 return NULL;
244 return register_names[reg_nr];
245 }
246
247 static char *
248 sh_sh3_dsp_register_name (int reg_nr)
249 {
250 static char *register_names[] =
251 {
252 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
253 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
254 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
255 "", "dsr",
256 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
257 "y0", "y1", "", "", "", "", "", "mod",
258 "ssr", "spc",
259 "rs", "re", "", "", "", "", "", "",
260 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
261 "", "", "", "", "", "", "", "",
262 };
263 if (reg_nr < 0)
264 return NULL;
265 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
266 return NULL;
267 return register_names[reg_nr];
268 }
269
270 static char *
271 sh_sh4_register_name (int reg_nr)
272 {
273 static char *register_names[] =
274 {
275 /* general registers 0-15 */
276 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
277 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
278 /* 16 - 22 */
279 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
280 /* 23, 24 */
281 "fpul", "fpscr",
282 /* floating point registers 25 - 40 */
283 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
284 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
285 /* 41, 42 */
286 "ssr", "spc",
287 /* bank 0 43 - 50 */
288 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
289 /* bank 1 51 - 58 */
290 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
291 /* double precision (pseudo) 59 - 66 */
292 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
293 /* vectors (pseudo) 67 - 70 */
294 "fv0", "fv4", "fv8", "fv12",
295 /* FIXME: missing XF 71 - 86 */
296 /* FIXME: missing XD 87 - 94 */
297 };
298 if (reg_nr < 0)
299 return NULL;
300 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
301 return NULL;
302 return register_names[reg_nr];
303 }
304
305 static unsigned char *
306 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
307 {
308 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
309 static unsigned char breakpoint[] = {0xc3, 0xc3};
310
311 *lenptr = sizeof (breakpoint);
312 return breakpoint;
313 }
314
315 /* Prologue looks like
316 [mov.l <regs>,@-r15]...
317 [sts.l pr,@-r15]
318 [mov.l r14,@-r15]
319 [mov r15,r14]
320
321 Actually it can be more complicated than this. For instance, with
322 newer gcc's:
323
324 mov.l r14,@-r15
325 add #-12,r15
326 mov r15,r14
327 mov r4,r1
328 mov r5,r2
329 mov.l r6,@(4,r14)
330 mov.l r7,@(8,r14)
331 mov.b r1,@r14
332 mov r14,r1
333 mov r14,r1
334 add #2,r1
335 mov.w r2,@r1
336
337 */
338
339 /* STS.L PR,@-r15 0100111100100010
340 r15-4-->r15, PR-->(r15) */
341 #define IS_STS(x) ((x) == 0x4f22)
342
343 /* MOV.L Rm,@-r15 00101111mmmm0110
344 r15-4-->r15, Rm-->(R15) */
345 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
346
347 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
348
349 /* MOV r15,r14 0110111011110011
350 r15-->r14 */
351 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
352
353 /* ADD #imm,r15 01111111iiiiiiii
354 r15+imm-->r15 */
355 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
356
357 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
358 #define IS_SHLL_R3(x) ((x) == 0x4300)
359
360 /* ADD r3,r15 0011111100111100
361 r15+r3-->r15 */
362 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
363
364 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
365 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
366 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
367 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
368
369 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
370 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
371 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
372 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
373 #define IS_ARG_MOV(x) \
374 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
375 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
376 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
377
378 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
379 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
380 #define IS_MOV_R14(x) \
381 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
382
383 #define FPSCR_SZ (1 << 20)
384
385 /* Skip any prologue before the guts of a function */
386
387 /* Skip the prologue using the debug information. If this fails we'll
388 fall back on the 'guess' method below. */
389 static CORE_ADDR
390 after_prologue (CORE_ADDR pc)
391 {
392 struct symtab_and_line sal;
393 CORE_ADDR func_addr, func_end;
394
395 /* If we can not find the symbol in the partial symbol table, then
396 there is no hope we can determine the function's start address
397 with this code. */
398 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
399 return 0;
400
401 /* Get the line associated with FUNC_ADDR. */
402 sal = find_pc_line (func_addr, 0);
403
404 /* There are only two cases to consider. First, the end of the source line
405 is within the function bounds. In that case we return the end of the
406 source line. Second is the end of the source line extends beyond the
407 bounds of the current function. We need to use the slow code to
408 examine instructions in that case. */
409 if (sal.end < func_end)
410 return sal.end;
411 else
412 return 0;
413 }
414
415 /* Here we look at each instruction in the function, and try to guess
416 where the prologue ends. Unfortunately this is not always
417 accurate. */
418 static CORE_ADDR
419 skip_prologue_hard_way (CORE_ADDR start_pc)
420 {
421 CORE_ADDR here, end;
422 int updated_fp = 0;
423
424 if (!start_pc)
425 return 0;
426
427 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
428 {
429 int w = read_memory_integer (here, 2);
430 here += 2;
431 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
432 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
433 || IS_ARG_MOV (w) || IS_MOV_R14 (w))
434 {
435 start_pc = here;
436 }
437 else if (IS_MOV_SP_FP (w))
438 {
439 start_pc = here;
440 updated_fp = 1;
441 }
442 else
443 /* Don't bail out yet, if we are before the copy of sp. */
444 if (updated_fp)
445 break;
446 }
447
448 return start_pc;
449 }
450
451 static CORE_ADDR
452 sh_skip_prologue (CORE_ADDR pc)
453 {
454 CORE_ADDR post_prologue_pc;
455
456 /* See if we can determine the end of the prologue via the symbol table.
457 If so, then return either PC, or the PC after the prologue, whichever
458 is greater. */
459
460 post_prologue_pc = after_prologue (pc);
461
462 /* If after_prologue returned a useful address, then use it. Else
463 fall back on the instruction skipping code. */
464 if (post_prologue_pc != 0)
465 return max (pc, post_prologue_pc);
466 else
467 return (skip_prologue_hard_way (pc));
468 }
469
470 /* Immediately after a function call, return the saved pc.
471 Can't always go through the frames for this because on some machines
472 the new frame is not set up until the new function executes
473 some instructions.
474
475 The return address is the value saved in the PR register + 4 */
476 static CORE_ADDR
477 sh_saved_pc_after_call (struct frame_info *frame)
478 {
479 return (ADDR_BITS_REMOVE(read_register(PR_REGNUM)));
480 }
481
482 /* Should call_function allocate stack space for a struct return? */
483 static int
484 sh_use_struct_convention (int gcc_p, struct type *type)
485 {
486 return (TYPE_LENGTH (type) > 1);
487 }
488
489 /* Store the address of the place in which to copy the structure the
490 subroutine will return. This is called from call_function.
491
492 We store structs through a pointer passed in R0 */
493 static void
494 sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
495 {
496 write_register (STRUCT_RETURN_REGNUM, (addr));
497 }
498
499 /* Disassemble an instruction. */
500 static int
501 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
502 {
503 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
504 return print_insn_sh (memaddr, info);
505 else
506 return print_insn_shl (memaddr, info);
507 }
508
509 /* Given a GDB frame, determine the address of the calling function's frame.
510 This will be used to create a new GDB frame struct, and then
511 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
512
513 For us, the frame address is its stack pointer value, so we look up
514 the function prologue to determine the caller's sp value, and return it. */
515 static CORE_ADDR
516 sh_frame_chain (struct frame_info *frame)
517 {
518 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
519 return frame->frame; /* dummy frame same as caller's frame */
520 if (frame->pc && !inside_entry_file (frame->pc))
521 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
522 else
523 return 0;
524 }
525
526 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
527 we might want to do here is to check REGNUM against the clobber mask, and
528 somehow flag it as invalid if it isn't saved on the stack somewhere. This
529 would provide a graceful failure mode when trying to get the value of
530 caller-saves registers for an inner frame. */
531
532 static CORE_ADDR
533 sh_find_callers_reg (struct frame_info *fi, int regnum)
534 {
535 for (; fi; fi = fi->next)
536 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
537 /* When the caller requests PR from the dummy frame, we return PC because
538 that's where the previous routine appears to have done a call from. */
539 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
540 else
541 {
542 FRAME_INIT_SAVED_REGS (fi);
543 if (!fi->pc)
544 return 0;
545 if (fi->saved_regs[regnum] != 0)
546 return read_memory_integer (fi->saved_regs[regnum],
547 REGISTER_RAW_SIZE (regnum));
548 }
549 return read_register (regnum);
550 }
551
552 /* Put here the code to store, into a struct frame_saved_regs, the
553 addresses of the saved registers of frame described by FRAME_INFO.
554 This includes special registers such as pc and fp saved in special
555 ways in the stack frame. sp is even more special: the address we
556 return for it IS the sp for the next frame. */
557 static void
558 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
559 {
560 int where[NUM_REGS];
561 int rn;
562 int have_fp = 0;
563 int depth;
564 int pc;
565 int opc;
566 int insn;
567 int r3_val = 0;
568 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
569
570 if (fi->saved_regs == NULL)
571 frame_saved_regs_zalloc (fi);
572 else
573 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
574
575 if (dummy_regs)
576 {
577 /* DANGER! This is ONLY going to work if the char buffer format of
578 the saved registers is byte-for-byte identical to the
579 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
580 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
581 return;
582 }
583
584 fi->extra_info->leaf_function = 1;
585 fi->extra_info->f_offset = 0;
586
587 for (rn = 0; rn < NUM_REGS; rn++)
588 where[rn] = -1;
589
590 depth = 0;
591
592 /* Loop around examining the prologue insns until we find something
593 that does not appear to be part of the prologue. But give up
594 after 20 of them, since we're getting silly then. */
595
596 pc = get_pc_function_start (fi->pc);
597 if (!pc)
598 {
599 fi->pc = 0;
600 return;
601 }
602
603 for (opc = pc + (2 * 28); pc < opc; pc += 2)
604 {
605 insn = read_memory_integer (pc, 2);
606 /* See where the registers will be saved to */
607 if (IS_PUSH (insn))
608 {
609 rn = GET_PUSHED_REG (insn);
610 where[rn] = depth;
611 depth += 4;
612 }
613 else if (IS_STS (insn))
614 {
615 where[PR_REGNUM] = depth;
616 /* If we're storing the pr then this isn't a leaf */
617 fi->extra_info->leaf_function = 0;
618 depth += 4;
619 }
620 else if (IS_MOV_R3 (insn))
621 {
622 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
623 }
624 else if (IS_SHLL_R3 (insn))
625 {
626 r3_val <<= 1;
627 }
628 else if (IS_ADD_R3SP (insn))
629 {
630 depth += -r3_val;
631 }
632 else if (IS_ADD_SP (insn))
633 {
634 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
635 }
636 else if (IS_MOV_SP_FP (insn))
637 break;
638 #if 0 /* This used to just stop when it found an instruction that
639 was not considered part of the prologue. Now, we just
640 keep going looking for likely instructions. */
641 else
642 break;
643 #endif
644 }
645
646 /* Now we know how deep things are, we can work out their addresses */
647
648 for (rn = 0; rn < NUM_REGS; rn++)
649 {
650 if (where[rn] >= 0)
651 {
652 if (rn == FP_REGNUM)
653 have_fp = 1;
654
655 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
656 }
657 else
658 {
659 fi->saved_regs[rn] = 0;
660 }
661 }
662
663 if (have_fp)
664 {
665 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
666 }
667 else
668 {
669 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
670 }
671
672 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
673 /* Work out the return pc - either from the saved pr or the pr
674 value */
675 }
676
677 static void
678 sh_fp_frame_init_saved_regs (struct frame_info *fi)
679 {
680 int where[NUM_REGS];
681 int rn;
682 int have_fp = 0;
683 int depth;
684 int pc;
685 int opc;
686 int insn;
687 int r3_val = 0;
688 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
689
690 if (fi->saved_regs == NULL)
691 frame_saved_regs_zalloc (fi);
692 else
693 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
694
695 if (dummy_regs)
696 {
697 /* DANGER! This is ONLY going to work if the char buffer format of
698 the saved registers is byte-for-byte identical to the
699 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
700 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
701 return;
702 }
703
704 fi->extra_info->leaf_function = 1;
705 fi->extra_info->f_offset = 0;
706
707 for (rn = 0; rn < NUM_REGS; rn++)
708 where[rn] = -1;
709
710 depth = 0;
711
712 /* Loop around examining the prologue insns until we find something
713 that does not appear to be part of the prologue. But give up
714 after 20 of them, since we're getting silly then. */
715
716 pc = get_pc_function_start (fi->pc);
717 if (!pc)
718 {
719 fi->pc = 0;
720 return;
721 }
722
723 for (opc = pc + (2 * 28); pc < opc; pc += 2)
724 {
725 insn = read_memory_integer (pc, 2);
726 /* See where the registers will be saved to */
727 if (IS_PUSH (insn))
728 {
729 rn = GET_PUSHED_REG (insn);
730 where[rn] = depth;
731 depth += 4;
732 }
733 else if (IS_STS (insn))
734 {
735 where[PR_REGNUM] = depth;
736 /* If we're storing the pr then this isn't a leaf */
737 fi->extra_info->leaf_function = 0;
738 depth += 4;
739 }
740 else if (IS_MOV_R3 (insn))
741 {
742 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
743 }
744 else if (IS_SHLL_R3 (insn))
745 {
746 r3_val <<= 1;
747 }
748 else if (IS_ADD_R3SP (insn))
749 {
750 depth += -r3_val;
751 }
752 else if (IS_ADD_SP (insn))
753 {
754 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
755 }
756 else if (IS_FMOV (insn))
757 {
758 if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ)
759 {
760 depth += 8;
761 }
762 else
763 {
764 depth += 4;
765 }
766 }
767 else if (IS_MOV_SP_FP (insn))
768 break;
769 #if 0 /* This used to just stop when it found an instruction that
770 was not considered part of the prologue. Now, we just
771 keep going looking for likely instructions. */
772 else
773 break;
774 #endif
775 }
776
777 /* Now we know how deep things are, we can work out their addresses */
778
779 for (rn = 0; rn < NUM_REGS; rn++)
780 {
781 if (where[rn] >= 0)
782 {
783 if (rn == FP_REGNUM)
784 have_fp = 1;
785
786 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
787 }
788 else
789 {
790 fi->saved_regs[rn] = 0;
791 }
792 }
793
794 if (have_fp)
795 {
796 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
797 }
798 else
799 {
800 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
801 }
802
803 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
804 /* Work out the return pc - either from the saved pr or the pr
805 value */
806 }
807
808 /* Initialize the extra info saved in a FRAME */
809 static void
810 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
811 {
812
813 fi->extra_info = (struct frame_extra_info *)
814 frame_obstack_alloc (sizeof (struct frame_extra_info));
815
816 if (fi->next)
817 fi->pc = FRAME_SAVED_PC (fi->next);
818
819 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
820 {
821 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
822 by assuming it's always FP. */
823 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
824 SP_REGNUM);
825 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
826 PC_REGNUM);
827 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
828 fi->extra_info->leaf_function = 0;
829 return;
830 }
831 else
832 {
833 FRAME_INIT_SAVED_REGS (fi);
834 fi->extra_info->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
835 }
836 }
837
838 /* Extract from an array REGBUF containing the (raw) register state
839 the address in which a function should return its structure value,
840 as a CORE_ADDR (or an expression that can be used as one). */
841 static CORE_ADDR
842 sh_extract_struct_value_address (char *regbuf)
843 {
844 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
845 }
846
847 static CORE_ADDR
848 sh_frame_saved_pc (struct frame_info *frame)
849 {
850 return ((frame)->extra_info->return_pc);
851 }
852
853 /* Discard from the stack the innermost frame,
854 restoring all saved registers. */
855 static void
856 sh_pop_frame (void)
857 {
858 register struct frame_info *frame = get_current_frame ();
859 register CORE_ADDR fp;
860 register int regnum;
861
862 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
863 generic_pop_dummy_frame ();
864 else
865 {
866 fp = FRAME_FP (frame);
867 FRAME_INIT_SAVED_REGS (frame);
868
869 /* Copy regs from where they were saved in the frame */
870 for (regnum = 0; regnum < NUM_REGS; regnum++)
871 if (frame->saved_regs[regnum])
872 write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4));
873
874 write_register (PC_REGNUM, frame->extra_info->return_pc);
875 write_register (SP_REGNUM, fp + 4);
876 }
877 flush_cached_frames ();
878 }
879
880 /* Function: push_arguments
881 Setup the function arguments for calling a function in the inferior.
882
883 On the Hitachi SH architecture, there are four registers (R4 to R7)
884 which are dedicated for passing function arguments. Up to the first
885 four arguments (depending on size) may go into these registers.
886 The rest go on the stack.
887
888 Arguments that are smaller than 4 bytes will still take up a whole
889 register or a whole 32-bit word on the stack, and will be
890 right-justified in the register or the stack word. This includes
891 chars, shorts, and small aggregate types.
892
893 Arguments that are larger than 4 bytes may be split between two or
894 more registers. If there are not enough registers free, an argument
895 may be passed partly in a register (or registers), and partly on the
896 stack. This includes doubles, long longs, and larger aggregates.
897 As far as I know, there is no upper limit to the size of aggregates
898 that will be passed in this way; in other words, the convention of
899 passing a pointer to a large aggregate instead of a copy is not used.
900
901 An exceptional case exists for struct arguments (and possibly other
902 aggregates such as arrays) if the size is larger than 4 bytes but
903 not a multiple of 4 bytes. In this case the argument is never split
904 between the registers and the stack, but instead is copied in its
905 entirety onto the stack, AND also copied into as many registers as
906 there is room for. In other words, space in registers permitting,
907 two copies of the same argument are passed in. As far as I can tell,
908 only the one on the stack is used, although that may be a function
909 of the level of compiler optimization. I suspect this is a compiler
910 bug. Arguments of these odd sizes are left-justified within the
911 word (as opposed to arguments smaller than 4 bytes, which are
912 right-justified).
913
914 If the function is to return an aggregate type such as a struct, it
915 is either returned in the normal return value register R0 (if its
916 size is no greater than one byte), or else the caller must allocate
917 space into which the callee will copy the return value (if the size
918 is greater than one byte). In this case, a pointer to the return
919 value location is passed into the callee in register R2, which does
920 not displace any of the other arguments passed in via registers R4
921 to R7. */
922
923 static CORE_ADDR
924 sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
925 int struct_return, CORE_ADDR struct_addr)
926 {
927 int stack_offset, stack_alloc;
928 int argreg;
929 int argnum;
930 struct type *type;
931 CORE_ADDR regval;
932 char *val;
933 char valbuf[4];
934 int len;
935 int odd_sized_struct;
936
937 /* first force sp to a 4-byte alignment */
938 sp = sp & ~3;
939
940 /* The "struct return pointer" pseudo-argument has its own dedicated
941 register */
942 if (struct_return)
943 write_register (STRUCT_RETURN_REGNUM, struct_addr);
944
945 /* Now make sure there's space on the stack */
946 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
947 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
948 sp -= stack_alloc; /* make room on stack for args */
949
950 /* Now load as many as possible of the first arguments into
951 registers, and push the rest onto the stack. There are 16 bytes
952 in four registers available. Loop thru args from first to last. */
953
954 argreg = ARG0_REGNUM;
955 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
956 {
957 type = VALUE_TYPE (args[argnum]);
958 len = TYPE_LENGTH (type);
959 memset (valbuf, 0, sizeof (valbuf));
960 if (len < 4)
961 {
962 /* value gets right-justified in the register or stack word */
963 memcpy (valbuf + (4 - len),
964 (char *) VALUE_CONTENTS (args[argnum]), len);
965 val = valbuf;
966 }
967 else
968 val = (char *) VALUE_CONTENTS (args[argnum]);
969
970 if (len > 4 && (len & 3) != 0)
971 odd_sized_struct = 1; /* such structs go entirely on stack */
972 else
973 odd_sized_struct = 0;
974 while (len > 0)
975 {
976 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
977 { /* must go on the stack */
978 write_memory (sp + stack_offset, val, 4);
979 stack_offset += 4;
980 }
981 /* NOTE WELL!!!!! This is not an "else if" clause!!!
982 That's because some *&^%$ things get passed on the stack
983 AND in the registers! */
984 if (argreg <= ARGLAST_REGNUM)
985 { /* there's room in a register */
986 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
987 write_register (argreg++, regval);
988 }
989 /* Store the value 4 bytes at a time. This means that things
990 larger than 4 bytes may go partly in registers and partly
991 on the stack. */
992 len -= REGISTER_RAW_SIZE (argreg);
993 val += REGISTER_RAW_SIZE (argreg);
994 }
995 }
996 return sp;
997 }
998
999 /* Function: push_return_address (pc)
1000 Set up the return address for the inferior function call.
1001 Needed for targets where we don't actually execute a JSR/BSR instruction */
1002
1003 static CORE_ADDR
1004 sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1005 {
1006 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
1007 return sp;
1008 }
1009
1010 /* Function: fix_call_dummy
1011 Poke the callee function's address into the destination part of
1012 the CALL_DUMMY. The address is actually stored in a data word
1013 following the actualy CALL_DUMMY instructions, which will load
1014 it into a register using PC-relative addressing. This function
1015 expects the CALL_DUMMY to look like this:
1016
1017 mov.w @(2,PC), R8
1018 jsr @R8
1019 nop
1020 trap
1021 <destination>
1022 */
1023
1024 #if 0
1025 void
1026 sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
1027 value_ptr *args, struct type *type, int gcc_p)
1028 {
1029 *(unsigned long *) (dummy + 8) = fun;
1030 }
1031 #endif
1032
1033 static int
1034 sh_coerce_float_to_double (struct type *formal, struct type *actual)
1035 {
1036 return 1;
1037 }
1038
1039 /* Find a function's return value in the appropriate registers (in
1040 regbuf), and copy it into valbuf. Extract from an array REGBUF
1041 containing the (raw) register state a function return value of type
1042 TYPE, and copy that, in virtual format, into VALBUF. */
1043 static void
1044 sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1045 {
1046 int len = TYPE_LENGTH (type);
1047 int return_register = R0_REGNUM;
1048 int offset;
1049
1050 if (len <= 4)
1051 {
1052 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1053 offset = REGISTER_BYTE (return_register) + 4 - len;
1054 else
1055 offset = REGISTER_BYTE (return_register);
1056 memcpy (valbuf, regbuf + offset, len);
1057 }
1058 else if (len <= 8)
1059 {
1060 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1061 offset = REGISTER_BYTE (return_register) + 8 - len;
1062 else
1063 offset = REGISTER_BYTE (return_register);
1064 memcpy (valbuf, regbuf + offset, len);
1065 }
1066 else
1067 error ("bad size for return value");
1068 }
1069
1070 static void
1071 sh3e_sh4_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1072 {
1073 int return_register;
1074 int offset;
1075 int len = TYPE_LENGTH (type);
1076
1077 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1078 return_register = FP0_REGNUM;
1079 else
1080 return_register = R0_REGNUM;
1081
1082 if (len == 8 && TYPE_CODE (type) == TYPE_CODE_FLT)
1083 {
1084 DOUBLEST val;
1085 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1086 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
1087 (char *) regbuf + REGISTER_BYTE (return_register),
1088 &val);
1089 else
1090 floatformat_to_doublest (&floatformat_ieee_double_big,
1091 (char *) regbuf + REGISTER_BYTE (return_register),
1092 &val);
1093 store_floating (valbuf, len, val);
1094 }
1095 else if (len <= 4)
1096 {
1097 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1098 offset = REGISTER_BYTE (return_register) + 4 - len;
1099 else
1100 offset = REGISTER_BYTE (return_register);
1101 memcpy (valbuf, regbuf + offset, len);
1102 }
1103 else if (len <= 8)
1104 {
1105 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1106 offset = REGISTER_BYTE (return_register) + 8 - len;
1107 else
1108 offset = REGISTER_BYTE (return_register);
1109 memcpy (valbuf, regbuf + offset, len);
1110 }
1111 else
1112 error ("bad size for return value");
1113 }
1114
1115 /* Write into appropriate registers a function return value
1116 of type TYPE, given in virtual format.
1117 If the architecture is sh4 or sh3e, store a function's return value
1118 in the R0 general register or in the FP0 floating point register,
1119 depending on the type of the return value. In all the other cases
1120 the result is stored in r0. */
1121 static void
1122 sh_default_store_return_value (struct type *type, char *valbuf)
1123 {
1124 char buf[32]; /* more than enough... */
1125
1126 if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (R0_REGNUM))
1127 {
1128 /* Add leading zeros to the value. */
1129 memset (buf, 0, REGISTER_RAW_SIZE (R0_REGNUM));
1130 memcpy (buf + REGISTER_RAW_SIZE (R0_REGNUM) - TYPE_LENGTH (type),
1131 valbuf, TYPE_LENGTH (type));
1132 write_register_bytes (REGISTER_BYTE (R0_REGNUM), buf,
1133 REGISTER_RAW_SIZE (R0_REGNUM));
1134 }
1135 else
1136 write_register_bytes (REGISTER_BYTE (R0_REGNUM), valbuf,
1137 TYPE_LENGTH (type));
1138 }
1139
1140 static void
1141 sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1142 {
1143 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1144 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1145 valbuf, TYPE_LENGTH (type));
1146 else
1147 sh_default_store_return_value (type, valbuf);
1148 }
1149
1150
1151 /* Print the registers in a form similar to the E7000 */
1152
1153 static void
1154 sh_generic_show_regs (void)
1155 {
1156 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1157 paddr (read_register (PC_REGNUM)),
1158 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1159 (long) read_register (PR_REGNUM),
1160 (long) read_register (MACH_REGNUM),
1161 (long) read_register (MACL_REGNUM));
1162
1163 printf_filtered ("GBR=%08lx VBR=%08lx",
1164 (long) read_register (GBR_REGNUM),
1165 (long) read_register (VBR_REGNUM));
1166
1167 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1168 (long) read_register (0),
1169 (long) read_register (1),
1170 (long) read_register (2),
1171 (long) read_register (3),
1172 (long) read_register (4),
1173 (long) read_register (5),
1174 (long) read_register (6),
1175 (long) read_register (7));
1176 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1177 (long) read_register (8),
1178 (long) read_register (9),
1179 (long) read_register (10),
1180 (long) read_register (11),
1181 (long) read_register (12),
1182 (long) read_register (13),
1183 (long) read_register (14),
1184 (long) read_register (15));
1185 }
1186
1187 static void
1188 sh3_show_regs (void)
1189 {
1190 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1191 paddr (read_register (PC_REGNUM)),
1192 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1193 (long) read_register (PR_REGNUM),
1194 (long) read_register (MACH_REGNUM),
1195 (long) read_register (MACL_REGNUM));
1196
1197 printf_filtered ("GBR=%08lx VBR=%08lx",
1198 (long) read_register (GBR_REGNUM),
1199 (long) read_register (VBR_REGNUM));
1200 printf_filtered (" SSR=%08lx SPC=%08lx",
1201 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1202 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1203
1204 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1205 (long) read_register (0),
1206 (long) read_register (1),
1207 (long) read_register (2),
1208 (long) read_register (3),
1209 (long) read_register (4),
1210 (long) read_register (5),
1211 (long) read_register (6),
1212 (long) read_register (7));
1213 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1214 (long) read_register (8),
1215 (long) read_register (9),
1216 (long) read_register (10),
1217 (long) read_register (11),
1218 (long) read_register (12),
1219 (long) read_register (13),
1220 (long) read_register (14),
1221 (long) read_register (15));
1222 }
1223
1224
1225 static void
1226 sh3e_show_regs (void)
1227 {
1228 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1229 paddr (read_register (PC_REGNUM)),
1230 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1231 (long) read_register (PR_REGNUM),
1232 (long) read_register (MACH_REGNUM),
1233 (long) read_register (MACL_REGNUM));
1234
1235 printf_filtered ("GBR=%08lx VBR=%08lx",
1236 (long) read_register (GBR_REGNUM),
1237 (long) read_register (VBR_REGNUM));
1238 printf_filtered (" SSR=%08lx SPC=%08lx",
1239 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1240 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1241 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1242 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1243 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1244
1245 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1246 (long) read_register (0),
1247 (long) read_register (1),
1248 (long) read_register (2),
1249 (long) read_register (3),
1250 (long) read_register (4),
1251 (long) read_register (5),
1252 (long) read_register (6),
1253 (long) read_register (7));
1254 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1255 (long) read_register (8),
1256 (long) read_register (9),
1257 (long) read_register (10),
1258 (long) read_register (11),
1259 (long) read_register (12),
1260 (long) read_register (13),
1261 (long) read_register (14),
1262 (long) read_register (15));
1263
1264 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1265 (long) read_register (FP0_REGNUM + 0),
1266 (long) read_register (FP0_REGNUM + 1),
1267 (long) read_register (FP0_REGNUM + 2),
1268 (long) read_register (FP0_REGNUM + 3),
1269 (long) read_register (FP0_REGNUM + 4),
1270 (long) read_register (FP0_REGNUM + 5),
1271 (long) read_register (FP0_REGNUM + 6),
1272 (long) read_register (FP0_REGNUM + 7));
1273 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1274 (long) read_register (FP0_REGNUM + 8),
1275 (long) read_register (FP0_REGNUM + 9),
1276 (long) read_register (FP0_REGNUM + 10),
1277 (long) read_register (FP0_REGNUM + 11),
1278 (long) read_register (FP0_REGNUM + 12),
1279 (long) read_register (FP0_REGNUM + 13),
1280 (long) read_register (FP0_REGNUM + 14),
1281 (long) read_register (FP0_REGNUM + 15));
1282 }
1283
1284 static void
1285 sh3_dsp_show_regs (void)
1286 {
1287 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1288 paddr (read_register (PC_REGNUM)),
1289 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1290 (long) read_register (PR_REGNUM),
1291 (long) read_register (MACH_REGNUM),
1292 (long) read_register (MACL_REGNUM));
1293
1294 printf_filtered ("GBR=%08lx VBR=%08lx",
1295 (long) read_register (GBR_REGNUM),
1296 (long) read_register (VBR_REGNUM));
1297
1298 printf_filtered (" SSR=%08lx SPC=%08lx",
1299 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1300 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1301
1302 printf_filtered (" DSR=%08lx",
1303 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1304
1305 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1306 (long) read_register (0),
1307 (long) read_register (1),
1308 (long) read_register (2),
1309 (long) read_register (3),
1310 (long) read_register (4),
1311 (long) read_register (5),
1312 (long) read_register (6),
1313 (long) read_register (7));
1314 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1315 (long) read_register (8),
1316 (long) read_register (9),
1317 (long) read_register (10),
1318 (long) read_register (11),
1319 (long) read_register (12),
1320 (long) read_register (13),
1321 (long) read_register (14),
1322 (long) read_register (15));
1323
1324 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1325 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1326 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1327 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1328 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1329 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1330 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1331 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1332 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1333 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1334 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1335 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1336 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1337 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1338 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1339 }
1340
1341 static void
1342 sh4_show_regs (void)
1343 {
1344 int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000;
1345 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1346 paddr (read_register (PC_REGNUM)),
1347 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1348 (long) read_register (PR_REGNUM),
1349 (long) read_register (MACH_REGNUM),
1350 (long) read_register (MACL_REGNUM));
1351
1352 printf_filtered ("GBR=%08lx VBR=%08lx",
1353 (long) read_register (GBR_REGNUM),
1354 (long) read_register (VBR_REGNUM));
1355 printf_filtered (" SSR=%08lx SPC=%08lx",
1356 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1357 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1358 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1359 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1360 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1361
1362 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1363 (long) read_register (0),
1364 (long) read_register (1),
1365 (long) read_register (2),
1366 (long) read_register (3),
1367 (long) read_register (4),
1368 (long) read_register (5),
1369 (long) read_register (6),
1370 (long) read_register (7));
1371 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1372 (long) read_register (8),
1373 (long) read_register (9),
1374 (long) read_register (10),
1375 (long) read_register (11),
1376 (long) read_register (12),
1377 (long) read_register (13),
1378 (long) read_register (14),
1379 (long) read_register (15));
1380
1381 printf_filtered ((pr
1382 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1383 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1384 (long) read_register (FP0_REGNUM + 0),
1385 (long) read_register (FP0_REGNUM + 1),
1386 (long) read_register (FP0_REGNUM + 2),
1387 (long) read_register (FP0_REGNUM + 3),
1388 (long) read_register (FP0_REGNUM + 4),
1389 (long) read_register (FP0_REGNUM + 5),
1390 (long) read_register (FP0_REGNUM + 6),
1391 (long) read_register (FP0_REGNUM + 7));
1392 printf_filtered ((pr
1393 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1394 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1395 (long) read_register (FP0_REGNUM + 8),
1396 (long) read_register (FP0_REGNUM + 9),
1397 (long) read_register (FP0_REGNUM + 10),
1398 (long) read_register (FP0_REGNUM + 11),
1399 (long) read_register (FP0_REGNUM + 12),
1400 (long) read_register (FP0_REGNUM + 13),
1401 (long) read_register (FP0_REGNUM + 14),
1402 (long) read_register (FP0_REGNUM + 15));
1403 }
1404
1405 static void
1406 sh_dsp_show_regs (void)
1407 {
1408 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1409 paddr (read_register (PC_REGNUM)),
1410 (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1411 (long) read_register (PR_REGNUM),
1412 (long) read_register (MACH_REGNUM),
1413 (long) read_register (MACL_REGNUM));
1414
1415 printf_filtered ("GBR=%08lx VBR=%08lx",
1416 (long) read_register (GBR_REGNUM),
1417 (long) read_register (VBR_REGNUM));
1418
1419 printf_filtered (" DSR=%08lx",
1420 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1421
1422 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1423 (long) read_register (0),
1424 (long) read_register (1),
1425 (long) read_register (2),
1426 (long) read_register (3),
1427 (long) read_register (4),
1428 (long) read_register (5),
1429 (long) read_register (6),
1430 (long) read_register (7));
1431 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1432 (long) read_register (8),
1433 (long) read_register (9),
1434 (long) read_register (10),
1435 (long) read_register (11),
1436 (long) read_register (12),
1437 (long) read_register (13),
1438 (long) read_register (14),
1439 (long) read_register (15));
1440
1441 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1442 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1443 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1444 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1445 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1446 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1447 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1448 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1449 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1450 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1451 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1452 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1453 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1454 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1455 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1456 }
1457
1458 void sh_show_regs_command (char *args, int from_tty)
1459 {
1460 if (sh_show_regs)
1461 (*sh_show_regs)();
1462 }
1463
1464 /* Index within `registers' of the first byte of the space for
1465 register N. */
1466 static int
1467 sh_default_register_byte (int reg_nr)
1468 {
1469 return (reg_nr * 4);
1470 }
1471
1472 static int
1473 sh_sh4_register_byte (int reg_nr)
1474 {
1475 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1476 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1477 return (dr_reg_base_num (reg_nr) * 4);
1478 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1479 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1480 return (fv_reg_base_num (reg_nr) * 4);
1481 else
1482 return (reg_nr * 4);
1483 }
1484
1485 /* Number of bytes of storage in the actual machine representation for
1486 register REG_NR. */
1487 static int
1488 sh_default_register_raw_size (int reg_nr)
1489 {
1490 return 4;
1491 }
1492
1493 static int
1494 sh_sh4_register_raw_size (int reg_nr)
1495 {
1496 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1497 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1498 return 8;
1499 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1500 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1501 return 16;
1502 else
1503 return 4;
1504 }
1505
1506 /* Number of bytes of storage in the program's representation
1507 for register N. */
1508 static int
1509 sh_register_virtual_size (int reg_nr)
1510 {
1511 return 4;
1512 }
1513
1514 /* Return the GDB type object for the "standard" data type
1515 of data in register N. */
1516
1517 static struct type *
1518 sh_sh3e_register_virtual_type (int reg_nr)
1519 {
1520 if ((reg_nr >= FP0_REGNUM
1521 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1522 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1523 return builtin_type_float;
1524 else
1525 return builtin_type_int;
1526 }
1527
1528 static struct type *
1529 sh_sh4_register_virtual_type (int reg_nr)
1530 {
1531 if ((reg_nr >= FP0_REGNUM
1532 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1533 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1534 return builtin_type_float;
1535 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1536 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1537 return builtin_type_double;
1538 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1539 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1540 return sh_sh4_build_float_register_type (3);
1541 else
1542 return builtin_type_int;
1543 }
1544
1545 static struct type *
1546 sh_sh4_build_float_register_type (int high)
1547 {
1548 struct type *temp;
1549
1550 temp = create_range_type (NULL, builtin_type_int, 0, high);
1551 return create_array_type (NULL, builtin_type_float, temp);
1552 }
1553
1554 static struct type *
1555 sh_default_register_virtual_type (int reg_nr)
1556 {
1557 return builtin_type_int;
1558 }
1559
1560 /* On the sh4, the DRi pseudo registers are problematic if the target
1561 is little endian. When the user writes one of those registers, for
1562 instance with 'ser var $dr0=1', we want the double to be stored
1563 like this:
1564 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1565 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1566
1567 This corresponds to little endian byte order & big endian word
1568 order. However if we let gdb write the register w/o conversion, it
1569 will write fr0 and fr1 this way:
1570 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1571 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1572 because it will consider fr0 and fr1 as a single LE stretch of memory.
1573
1574 To achieve what we want we must force gdb to store things in
1575 floatformat_ieee_double_littlebyte_bigword (which is defined in
1576 include/floatformat.h and libiberty/floatformat.c.
1577
1578 In case the target is big endian, there is no problem, the
1579 raw bytes will look like:
1580 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1581 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1582
1583 The other pseudo registers (the FVs) also don't pose a problem
1584 because they are stored as 4 individual FP elements. */
1585
1586 int
1587 sh_sh4_register_convertible (int nr)
1588 {
1589 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1590 return (gdbarch_tdep (current_gdbarch)->DR0_REGNUM <= nr
1591 && nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM);
1592 else
1593 return 0;
1594 }
1595
1596 void
1597 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1598 char *from, char *to)
1599 {
1600 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1601 && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1602 {
1603 DOUBLEST val;
1604 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1605 store_floating(to, TYPE_LENGTH(type), val);
1606 }
1607 else
1608 error("sh_register_convert_to_virtual called with non DR register number");
1609 }
1610
1611 void
1612 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1613 char *from, char *to)
1614 {
1615 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1616 && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1617 {
1618 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1619 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1620 }
1621 else
1622 error("sh_register_convert_to_raw called with non DR register number");
1623 }
1624
1625 void
1626 sh_fetch_pseudo_register (int reg_nr)
1627 {
1628 int base_regnum, portion;
1629
1630 if (!register_cached (reg_nr))
1631 {
1632 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1633 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1634 {
1635 base_regnum = dr_reg_base_num (reg_nr);
1636
1637 /* Read the real regs for which this one is an alias. */
1638 for (portion = 0; portion < 2; portion++)
1639 if (!register_cached (base_regnum + portion))
1640 target_fetch_registers (base_regnum + portion);
1641 }
1642 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1643 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1644 {
1645 base_regnum = fv_reg_base_num (reg_nr);
1646
1647 /* Read the real regs for which this one is an alias. */
1648 for (portion = 0; portion < 4; portion++)
1649 if (!register_cached (base_regnum + portion))
1650 target_fetch_registers (base_regnum + portion);
1651
1652 }
1653 register_valid [reg_nr] = 1;
1654 }
1655 }
1656
1657 void
1658 sh_store_pseudo_register (int reg_nr)
1659 {
1660 int base_regnum, portion;
1661
1662 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1663 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1664 {
1665 base_regnum = dr_reg_base_num (reg_nr);
1666
1667 /* Write the real regs for which this one is an alias. */
1668 for (portion = 0; portion < 2; portion++)
1669 {
1670 register_valid[base_regnum + portion] = 1;
1671 target_store_registers (base_regnum + portion);
1672 }
1673 }
1674 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1675 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1676 {
1677 base_regnum = fv_reg_base_num (reg_nr);
1678
1679 /* Write the real regs for which this one is an alias. */
1680 for (portion = 0; portion < 4; portion++)
1681 {
1682 register_valid[base_regnum + portion] = 1;
1683 target_store_registers (base_regnum + portion);
1684 }
1685 }
1686 }
1687
1688 static int
1689 fv_reg_base_num (int fv_regnum)
1690 {
1691 int fp_regnum;
1692
1693 fp_regnum = FP0_REGNUM +
1694 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
1695 return fp_regnum;
1696 }
1697
1698 static int
1699 dr_reg_base_num (int dr_regnum)
1700 {
1701 int fp_regnum;
1702
1703 fp_regnum = FP0_REGNUM +
1704 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
1705 return fp_regnum;
1706 }
1707
1708 static void
1709 do_fv_register_info (int fv_regnum)
1710 {
1711 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1712 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1713 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1714 (int) read_register (first_fp_reg_num),
1715 (int) read_register (first_fp_reg_num + 1),
1716 (int) read_register (first_fp_reg_num + 2),
1717 (int) read_register (first_fp_reg_num + 3));
1718 }
1719
1720 static void
1721 do_dr_register_info (int dr_regnum)
1722 {
1723 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1724
1725 printf_filtered ("dr%d\t0x%08x%08x\n",
1726 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1727 (int) read_register (first_fp_reg_num),
1728 (int) read_register (first_fp_reg_num + 1));
1729 }
1730
1731 static void
1732 sh_do_pseudo_register (int regnum)
1733 {
1734 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1735 internal_error (__FILE__, __LINE__,
1736 "Invalid pseudo register number %d\n", regnum);
1737 else if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1738 && regnum < gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1739 do_dr_register_info (regnum);
1740 else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1741 && regnum <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1742 do_fv_register_info (regnum);
1743 }
1744
1745
1746 static void
1747 sh_do_fp_register (int regnum)
1748 { /* do values for FP (float) regs */
1749 char *raw_buffer;
1750 double flt; /* double extracted from raw hex data */
1751 int inv;
1752 int j;
1753
1754 /* Allocate space for the float. */
1755 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1756
1757 /* Get the data in raw format. */
1758 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1759 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1760
1761 /* Get the register as a number */
1762 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1763
1764 /* Print the name and some spaces. */
1765 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1766 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1767
1768 /* Print the value. */
1769 printf_filtered (inv ? "<invalid float>" : "%-10.9g", flt);
1770
1771 /* Print the fp register as hex. */
1772 printf_filtered ("\t(raw 0x");
1773 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1774 {
1775 register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j
1776 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1777 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1778 }
1779 printf_filtered (")");
1780 printf_filtered ("\n");
1781 }
1782
1783 static void
1784 sh_do_register (int regnum)
1785 {
1786 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1787
1788 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1789 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1790
1791 /* Get the data in raw format. */
1792 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1793 printf_filtered ("*value not available*\n");
1794
1795 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1796 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1797 printf_filtered ("\t");
1798 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1799 gdb_stdout, 0, 1, 0, Val_pretty_default);
1800 printf_filtered ("\n");
1801 }
1802
1803 static void
1804 sh_print_register (int regnum)
1805 {
1806 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1807 internal_error (__FILE__, __LINE__,
1808 "Invalid register number %d\n", regnum);
1809
1810 else if (regnum >= 0 && regnum < NUM_REGS)
1811 {
1812 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1813 sh_do_fp_register (regnum); /* FP regs */
1814 else
1815 sh_do_register (regnum); /* All other regs */
1816 }
1817
1818 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1819 sh_do_pseudo_register (regnum);
1820 }
1821
1822 void
1823 sh_do_registers_info (int regnum, int fpregs)
1824 {
1825 if (regnum != -1) /* do one specified register */
1826 {
1827 if (*(REGISTER_NAME (regnum)) == '\0')
1828 error ("Not a valid register for the current processor type");
1829
1830 sh_print_register (regnum);
1831 }
1832 else
1833 /* do all (or most) registers */
1834 {
1835 regnum = 0;
1836 while (regnum < NUM_REGS)
1837 {
1838 /* If the register name is empty, it is undefined for this
1839 processor, so don't display anything. */
1840 if (REGISTER_NAME (regnum) == NULL
1841 || *(REGISTER_NAME (regnum)) == '\0')
1842 {
1843 regnum++;
1844 continue;
1845 }
1846
1847 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1848 {
1849 if (fpregs)
1850 {
1851 /* true for "INFO ALL-REGISTERS" command */
1852 sh_do_fp_register (regnum); /* FP regs */
1853 regnum ++;
1854 }
1855 else
1856 regnum += (gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */
1857 }
1858 else
1859 {
1860 sh_do_register (regnum); /* All other regs */
1861 regnum++;
1862 }
1863 }
1864
1865 if (fpregs)
1866 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1867 {
1868 sh_do_pseudo_register (regnum);
1869 regnum++;
1870 }
1871 }
1872 }
1873
1874 #ifdef SVR4_SHARED_LIBS
1875
1876 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1877 for native i386 linux targets using the struct offsets defined in
1878 link.h (but without actual reference to that file).
1879
1880 This makes it possible to access i386-linux shared libraries from
1881 a gdb that was not built on an i386-linux host (for cross debugging).
1882 */
1883
1884 struct link_map_offsets *
1885 sh_linux_svr4_fetch_link_map_offsets (void)
1886 {
1887 static struct link_map_offsets lmo;
1888 static struct link_map_offsets *lmp = 0;
1889
1890 if (lmp == 0)
1891 {
1892 lmp = &lmo;
1893
1894 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1895
1896 lmo.r_map_offset = 4;
1897 lmo.r_map_size = 4;
1898
1899 lmo.link_map_size = 20; /* 552 not actual size but all we need */
1900
1901 lmo.l_addr_offset = 0;
1902 lmo.l_addr_size = 4;
1903
1904 lmo.l_name_offset = 4;
1905 lmo.l_name_size = 4;
1906
1907 lmo.l_next_offset = 12;
1908 lmo.l_next_size = 4;
1909
1910 lmo.l_prev_offset = 16;
1911 lmo.l_prev_size = 4;
1912 }
1913
1914 return lmp;
1915 }
1916 #endif /* SVR4_SHARED_LIBS */
1917
1918 static gdbarch_init_ftype sh_gdbarch_init;
1919
1920 static struct gdbarch *
1921 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1922 {
1923 static LONGEST sh_call_dummy_words[] = {0};
1924 struct gdbarch *gdbarch;
1925 struct gdbarch_tdep *tdep;
1926 gdbarch_register_name_ftype *sh_register_name;
1927 gdbarch_store_return_value_ftype *sh_store_return_value;
1928 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1929
1930 /* Find a candidate among the list of pre-declared architectures. */
1931 arches = gdbarch_list_lookup_by_info (arches, &info);
1932 if (arches != NULL)
1933 return arches->gdbarch;
1934
1935 /* None found, create a new architecture from the information
1936 provided. */
1937 tdep = XMALLOC (struct gdbarch_tdep);
1938 gdbarch = gdbarch_alloc (&info, tdep);
1939
1940 /* Initialize the register numbers that are not common to all the
1941 variants to -1, if necessary thse will be overwritten in the case
1942 statement below. */
1943 tdep->FPUL_REGNUM = -1;
1944 tdep->FPSCR_REGNUM = -1;
1945 tdep->SR_REGNUM = 22;
1946 tdep->DSR_REGNUM = -1;
1947 tdep->FP_LAST_REGNUM = -1;
1948 tdep->A0G_REGNUM = -1;
1949 tdep->A0_REGNUM = -1;
1950 tdep->A1G_REGNUM = -1;
1951 tdep->A1_REGNUM = -1;
1952 tdep->M0_REGNUM = -1;
1953 tdep->M1_REGNUM = -1;
1954 tdep->X0_REGNUM = -1;
1955 tdep->X1_REGNUM = -1;
1956 tdep->Y0_REGNUM = -1;
1957 tdep->Y1_REGNUM = -1;
1958 tdep->MOD_REGNUM = -1;
1959 tdep->RS_REGNUM = -1;
1960 tdep->RE_REGNUM = -1;
1961 tdep->SSR_REGNUM = -1;
1962 tdep->SPC_REGNUM = -1;
1963 tdep->DR0_REGNUM = -1;
1964 tdep->DR_LAST_REGNUM = -1;
1965 tdep->FV0_REGNUM = -1;
1966 tdep->FV_LAST_REGNUM = -1;
1967
1968 set_gdbarch_fp0_regnum (gdbarch, -1);
1969 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1970 set_gdbarch_max_register_raw_size (gdbarch, 4);
1971 set_gdbarch_max_register_virtual_size (gdbarch, 4);
1972 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1973 set_gdbarch_num_regs (gdbarch, 59);
1974 set_gdbarch_sp_regnum (gdbarch, 15);
1975 set_gdbarch_fp_regnum (gdbarch, 14);
1976 set_gdbarch_pc_regnum (gdbarch, 16);
1977 set_gdbarch_register_size (gdbarch, 4);
1978 set_gdbarch_register_bytes (gdbarch, NUM_REGS * 4);
1979 set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register);
1980 set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register);
1981 set_gdbarch_do_registers_info (gdbarch, sh_do_registers_info);
1982 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
1983 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
1984 print_sh_insn = gdb_print_insn_sh;
1985
1986 switch (info.bfd_arch_info->mach)
1987 {
1988 case bfd_mach_sh:
1989 sh_register_name = sh_sh_register_name;
1990 sh_show_regs = sh_generic_show_regs;
1991 sh_store_return_value = sh_default_store_return_value;
1992 sh_register_virtual_type = sh_default_register_virtual_type;
1993 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1994 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1995 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1996 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1997 break;
1998 case bfd_mach_sh2:
1999 sh_register_name = sh_sh_register_name;
2000 sh_show_regs = sh_generic_show_regs;
2001 sh_store_return_value = sh_default_store_return_value;
2002 sh_register_virtual_type = sh_default_register_virtual_type;
2003 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2004 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2005 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2006 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2007 break;
2008 case bfd_mach_sh_dsp:
2009 sh_register_name = sh_sh_dsp_register_name;
2010 sh_show_regs = sh_dsp_show_regs;
2011 sh_store_return_value = sh_default_store_return_value;
2012 sh_register_virtual_type = sh_default_register_virtual_type;
2013 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2014 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2015 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2016 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2017 tdep->DSR_REGNUM = 24;
2018 tdep->A0G_REGNUM = 25;
2019 tdep->A0_REGNUM = 26;
2020 tdep->A1G_REGNUM = 27;
2021 tdep->A1_REGNUM = 28;
2022 tdep->M0_REGNUM = 29;
2023 tdep->M1_REGNUM = 30;
2024 tdep->X0_REGNUM = 31;
2025 tdep->X1_REGNUM = 32;
2026 tdep->Y0_REGNUM = 33;
2027 tdep->Y1_REGNUM = 34;
2028 tdep->MOD_REGNUM = 40;
2029 tdep->RS_REGNUM = 43;
2030 tdep->RE_REGNUM = 44;
2031 break;
2032 case bfd_mach_sh3:
2033 sh_register_name = sh_sh3_register_name;
2034 sh_show_regs = sh3_show_regs;
2035 sh_store_return_value = sh_default_store_return_value;
2036 sh_register_virtual_type = sh_default_register_virtual_type;
2037 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2038 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2039 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2040 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2041 tdep->SSR_REGNUM = 41;
2042 tdep->SPC_REGNUM = 42;
2043 break;
2044 case bfd_mach_sh3e:
2045 sh_register_name = sh_sh3e_register_name;
2046 sh_show_regs = sh3e_show_regs;
2047 sh_store_return_value = sh3e_sh4_store_return_value;
2048 sh_register_virtual_type = sh_sh3e_register_virtual_type;
2049 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2050 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2051 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2052 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2053 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2054 set_gdbarch_fp0_regnum (gdbarch, 25);
2055 tdep->FPUL_REGNUM = 23;
2056 tdep->FPSCR_REGNUM = 24;
2057 tdep->FP_LAST_REGNUM = 40;
2058 tdep->SSR_REGNUM = 41;
2059 tdep->SPC_REGNUM = 42;
2060 break;
2061 case bfd_mach_sh3_dsp:
2062 sh_register_name = sh_sh3_dsp_register_name;
2063 sh_show_regs = sh3_dsp_show_regs;
2064 sh_store_return_value = sh_default_store_return_value;
2065 sh_register_virtual_type = sh_default_register_virtual_type;
2066 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2067 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2068 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2069 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2070 tdep->DSR_REGNUM = 24;
2071 tdep->A0G_REGNUM = 25;
2072 tdep->A0_REGNUM = 26;
2073 tdep->A1G_REGNUM = 27;
2074 tdep->A1_REGNUM = 28;
2075 tdep->M0_REGNUM = 29;
2076 tdep->M1_REGNUM = 30;
2077 tdep->X0_REGNUM = 31;
2078 tdep->X1_REGNUM = 32;
2079 tdep->Y0_REGNUM = 33;
2080 tdep->Y1_REGNUM = 34;
2081 tdep->MOD_REGNUM = 40;
2082 tdep->RS_REGNUM = 43;
2083 tdep->RE_REGNUM = 44;
2084 tdep->SSR_REGNUM = 41;
2085 tdep->SPC_REGNUM = 42;
2086 break;
2087 case bfd_mach_sh4:
2088 sh_register_name = sh_sh4_register_name;
2089 sh_show_regs = sh4_show_regs;
2090 sh_store_return_value = sh3e_sh4_store_return_value;
2091 sh_register_virtual_type = sh_sh4_register_virtual_type;
2092 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2093 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2094 set_gdbarch_fp0_regnum (gdbarch, 25);
2095 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
2096 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
2097 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
2098 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2099 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
2100 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
2101 set_gdbarch_register_convert_to_raw (gdbarch, sh_sh4_register_convert_to_raw);
2102 set_gdbarch_register_convert_to_virtual (gdbarch, sh_sh4_register_convert_to_virtual);
2103 set_gdbarch_register_convertible (gdbarch, sh_sh4_register_convertible);
2104 tdep->FPUL_REGNUM = 23;
2105 tdep->FPSCR_REGNUM = 24;
2106 tdep->FP_LAST_REGNUM = 40;
2107 tdep->SSR_REGNUM = 41;
2108 tdep->SPC_REGNUM = 42;
2109 tdep->DR0_REGNUM = 59;
2110 tdep->DR_LAST_REGNUM = 66;
2111 tdep->FV0_REGNUM = 67;
2112 tdep->FV_LAST_REGNUM = 70;
2113 break;
2114 default:
2115 sh_register_name = sh_generic_register_name;
2116 sh_show_regs = sh_generic_show_regs;
2117 sh_store_return_value = sh_default_store_return_value;
2118 sh_register_virtual_type = sh_default_register_virtual_type;
2119 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2120 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2121 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2122 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2123 break;
2124 }
2125
2126 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2127 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2128 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2129 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2130 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2131 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2132
2133 set_gdbarch_register_name (gdbarch, sh_register_name);
2134 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2135
2136 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2137 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2138 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2139 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2140 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2141 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2142 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);/*??should be 8?*/
2143
2144 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2145 set_gdbarch_call_dummy_length (gdbarch, 0);
2146 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2147 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2148 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2149 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2150 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2151 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2152 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2153 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2154 set_gdbarch_call_dummy_p (gdbarch, 1);
2155 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2156 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2157 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2158 set_gdbarch_coerce_float_to_double (gdbarch,
2159 sh_coerce_float_to_double);
2160
2161 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
2162 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2163 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2164
2165 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
2166 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2167 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2168 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2169 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2170 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
2171 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2172 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2173 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2174 set_gdbarch_function_start_offset (gdbarch, 0);
2175
2176 set_gdbarch_frame_args_skip (gdbarch, 0);
2177 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2178 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
2179 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2180 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2181 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
2182 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
2183 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2184 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2185 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2186 set_gdbarch_ieee_float (gdbarch, 1);
2187 tm_print_insn = print_sh_insn;
2188
2189 return gdbarch;
2190 }
2191
2192 void
2193 _initialize_sh_tdep (void)
2194 {
2195 struct cmd_list_element *c;
2196
2197 register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2198
2199 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2200 }
GDB Binutils - Deliverables
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