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2000-10-30 Michael Snyder <msnyder@cleaver.cygnus.com>
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000 Free Software
3 Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /*
23 Contributed by Steve Chamberlain
24 sac@cygnus.com
25 */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "obstack.h"
30 #include "symtab.h"
31 #include "symfile.h"
32 #include "gdbtypes.h"
33 #include "gdbcmd.h"
34 #include "gdbcore.h"
35 #include "value.h"
36 #include "dis-asm.h"
37 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
38 #include "gdb_string.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
41
42 #include "solib-svr4.h"
43
44 #undef XMALLOC
45 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
46
47
48 /* Frame interpretation related functions. */
49 static gdbarch_breakpoint_from_pc_ftype sh_breakpoint_from_pc;
50 static gdbarch_frame_chain_ftype sh_frame_chain;
51 static gdbarch_frame_saved_pc_ftype sh_frame_saved_pc;
52 static gdbarch_skip_prologue_ftype sh_skip_prologue;
53
54 static gdbarch_frame_init_saved_regs_ftype sh_nofp_frame_init_saved_regs;
55 static gdbarch_frame_init_saved_regs_ftype sh_fp_frame_init_saved_regs;
56 static gdbarch_init_extra_frame_info_ftype sh_init_extra_frame_info;
57 static gdbarch_pop_frame_ftype sh_pop_frame;
58 static gdbarch_saved_pc_after_call_ftype sh_saved_pc_after_call;
59 static gdbarch_frame_args_address_ftype sh_frame_args_address;
60 static gdbarch_frame_locals_address_ftype sh_frame_locals_address;
61
62 /* Function call related functions. */
63 static gdbarch_extract_return_value_ftype sh_extract_return_value;
64 static gdbarch_extract_struct_value_address_ftype sh_extract_struct_value_address;
65 static gdbarch_use_struct_convention_ftype sh_use_struct_convention;
66 static gdbarch_store_struct_return_ftype sh_store_struct_return;
67 static gdbarch_push_arguments_ftype sh_push_arguments;
68 static gdbarch_push_return_address_ftype sh_push_return_address;
69 static gdbarch_coerce_float_to_double_ftype sh_coerce_float_to_double;
70 static gdbarch_store_return_value_ftype sh_default_store_return_value;
71 static gdbarch_store_return_value_ftype sh3e_sh4_store_return_value;
72
73 static gdbarch_register_name_ftype sh_generic_register_name;
74 static gdbarch_register_name_ftype sh_sh_register_name;
75 static gdbarch_register_name_ftype sh_sh3_register_name;
76 static gdbarch_register_name_ftype sh_sh3e_register_name;
77 static gdbarch_register_name_ftype sh_sh_dsp_register_name;
78 static gdbarch_register_name_ftype sh_sh3_dsp_register_name;
79
80 /* Registers display related functions */
81 static gdbarch_register_raw_size_ftype sh_default_register_raw_size;
82 static gdbarch_register_raw_size_ftype sh_sh4_register_raw_size;
83
84 static gdbarch_register_virtual_size_ftype sh_register_virtual_size;
85
86 static gdbarch_register_byte_ftype sh_default_register_byte;
87 static gdbarch_register_byte_ftype sh_sh4_register_byte;
88
89 static gdbarch_register_virtual_type_ftype sh_sh3e_register_virtual_type;
90 static gdbarch_register_virtual_type_ftype sh_sh4_register_virtual_type;
91 static gdbarch_register_virtual_type_ftype sh_default_register_virtual_type;
92
93 static void sh_generic_show_regs (void);
94 static void sh3_show_regs (void);
95 static void sh3e_show_regs (void);
96 static void sh3_dsp_show_regs (void);
97 static void sh_dsp_show_regs (void);
98 static void sh4_show_regs (void);
99 static void sh_show_regs_command (char *, int);
100
101 static struct type *sh_sh4_build_float_register_type (int high);
102
103 static gdbarch_fetch_pseudo_register_ftype sh_fetch_pseudo_register;
104 static gdbarch_store_pseudo_register_ftype sh_store_pseudo_register;
105 static int fv_reg_base_num (int);
106 static int dr_reg_base_num (int);
107 static void do_fv_register_info (int fv_regnum);
108 static void do_dr_register_info (int dr_regnum);
109 static void sh_do_pseudo_register (int regnum);
110 static void sh_do_fp_register (int regnum);
111 static void sh_do_register (int regnum);
112 static void sh_print_register (int regnum);
113
114 void (*sh_show_regs) (void);
115
116
117 /* Define other aspects of the stack frame.
118 we keep a copy of the worked out return pc lying around, since it
119 is a useful bit of info */
120
121 struct frame_extra_info
122 {
123 CORE_ADDR return_pc;
124 int leaf_function;
125 int f_offset;
126 };
127
128 #if 0
129 #ifdef _WIN32_WCE
130 char **sh_register_names = sh3_reg_names;
131 #else
132 char **sh_register_names = sh_generic_reg_names;
133 #endif
134 #endif
135
136 static char *
137 sh_generic_register_name (int reg_nr)
138 {
139 static char *register_names[] =
140 {
141 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
142 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
143 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
144 "fpul", "fpscr",
145 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
146 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
147 "ssr", "spc",
148 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
149 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
150 };
151 if (reg_nr < 0)
152 return NULL;
153 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
154 return NULL;
155 return register_names[reg_nr];
156 }
157
158 static char *
159 sh_sh_register_name (int reg_nr)
160 {
161 static char *register_names[] =
162 {
163 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
164 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
165 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
166 "", "",
167 "", "", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "",
169 "", "",
170 "", "", "", "", "", "", "", "",
171 "", "", "", "", "", "", "", "",
172 };
173 if (reg_nr < 0)
174 return NULL;
175 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
176 return NULL;
177 return register_names[reg_nr];
178 }
179
180 static char *
181 sh_sh3_register_name (int reg_nr)
182 {
183 static char *register_names[] =
184 {
185 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
186 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
187 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
188 "", "",
189 "", "", "", "", "", "", "", "",
190 "", "", "", "", "", "", "", "",
191 "ssr", "spc",
192 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
193 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
194 };
195 if (reg_nr < 0)
196 return NULL;
197 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
198 return NULL;
199 return register_names[reg_nr];
200 }
201
202 static char *
203 sh_sh3e_register_name (int reg_nr)
204 {
205 static char *register_names[] =
206 {
207 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
208 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
209 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
210 "fpul", "fpscr",
211 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
212 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
213 "ssr", "spc",
214 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
215 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
216 };
217 if (reg_nr < 0)
218 return NULL;
219 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
220 return NULL;
221 return register_names[reg_nr];
222 }
223
224 static char *
225 sh_sh_dsp_register_name (int reg_nr)
226 {
227 static char *register_names[] =
228 {
229 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
230 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
231 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
232 "", "dsr",
233 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
234 "y0", "y1", "", "", "", "", "", "mod",
235 "", "",
236 "rs", "re", "", "", "", "", "", "",
237 "", "", "", "", "", "", "", "",
238 };
239 if (reg_nr < 0)
240 return NULL;
241 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
242 return NULL;
243 return register_names[reg_nr];
244 }
245
246 static char *
247 sh_sh3_dsp_register_name (int reg_nr)
248 {
249 static char *register_names[] =
250 {
251 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
252 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
253 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
254 "", "dsr",
255 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
256 "y0", "y1", "", "", "", "", "", "mod",
257 "ssr", "spc",
258 "rs", "re", "", "", "", "", "", "",
259 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
260 "", "", "", "", "", "", "", "",
261 };
262 if (reg_nr < 0)
263 return NULL;
264 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
265 return NULL;
266 return register_names[reg_nr];
267 }
268
269 static char *
270 sh_sh4_register_name (int reg_nr)
271 {
272 static char *register_names[] =
273 {
274 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
275 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
276 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
277 "fpul", "fpscr",
278 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
279 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
280 "ssr", "spc",
281 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
282 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
283 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
284 "fv0", "fv4", "fv8", "fv12",
285 };
286 if (reg_nr < 0)
287 return NULL;
288 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
289 return NULL;
290 return register_names[reg_nr];
291 }
292
293 static unsigned char *
294 sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
295 {
296 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
297 static unsigned char breakpoint[] = {0xc3, 0xc3};
298
299 *lenptr = sizeof (breakpoint);
300 return breakpoint;
301 }
302
303 /* Prologue looks like
304 [mov.l <regs>,@-r15]...
305 [sts.l pr,@-r15]
306 [mov.l r14,@-r15]
307 [mov r15,r14]
308
309 Actually it can be more complicated than this. For instance, with
310 newer gcc's:
311
312 mov.l r14,@-r15
313 add #-12,r15
314 mov r15,r14
315 mov r4,r1
316 mov r5,r2
317 mov.l r6,@(4,r14)
318 mov.l r7,@(8,r14)
319 mov.b r1,@r14
320 mov r14,r1
321 mov r14,r1
322 add #2,r1
323 mov.w r2,@r1
324
325 */
326
327 /* STS.L PR,@-r15 0100111100100010
328 r15-4-->r15, PR-->(r15) */
329 #define IS_STS(x) ((x) == 0x4f22)
330
331 /* MOV.L Rm,@-r15 00101111mmmm0110
332 r15-4-->r15, Rm-->(R15) */
333 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
334
335 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
336
337 /* MOV r15,r14 0110111011110011
338 r15-->r14 */
339 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
340
341 /* ADD #imm,r15 01111111iiiiiiii
342 r15+imm-->r15 */
343 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
344
345 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
346 #define IS_SHLL_R3(x) ((x) == 0x4300)
347
348 /* ADD r3,r15 0011111100111100
349 r15+r3-->r15 */
350 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
351
352 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
353 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
354 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
355 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
356
357 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
358 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
359 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
360 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
361 #define IS_ARG_MOV(x) \
362 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
363 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
364 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
365
366 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
367 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
368 #define IS_MOV_R14(x) \
369 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
370
371 #define FPSCR_SZ (1 << 20)
372
373 /* Skip any prologue before the guts of a function */
374
375 /* Skip the prologue using the debug information. If this fails we'll
376 fall back on the 'guess' method below. */
377 static CORE_ADDR
378 after_prologue (CORE_ADDR pc)
379 {
380 struct symtab_and_line sal;
381 CORE_ADDR func_addr, func_end;
382
383 /* If we can not find the symbol in the partial symbol table, then
384 there is no hope we can determine the function's start address
385 with this code. */
386 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
387 return 0;
388
389 /* Get the line associated with FUNC_ADDR. */
390 sal = find_pc_line (func_addr, 0);
391
392 /* There are only two cases to consider. First, the end of the source line
393 is within the function bounds. In that case we return the end of the
394 source line. Second is the end of the source line extends beyond the
395 bounds of the current function. We need to use the slow code to
396 examine instructions in that case. */
397 if (sal.end < func_end)
398 return sal.end;
399 else
400 return 0;
401 }
402
403 /* Here we look at each instruction in the function, and try to guess
404 where the prologue ends. Unfortunately this is not always
405 accurate. */
406 static CORE_ADDR
407 skip_prologue_hard_way (CORE_ADDR start_pc)
408 {
409 CORE_ADDR here, end;
410 int updated_fp = 0;
411
412 if (!start_pc)
413 return 0;
414
415 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
416 {
417 int w = read_memory_integer (here, 2);
418 here += 2;
419 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
420 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
421 || IS_ARG_MOV (w) || IS_MOV_R14 (w))
422 {
423 start_pc = here;
424 }
425 else if (IS_MOV_SP_FP (w))
426 {
427 start_pc = here;
428 updated_fp = 1;
429 }
430 else
431 /* Don't bail out yet, if we are before the copy of sp. */
432 if (updated_fp)
433 break;
434 }
435
436 return start_pc;
437 }
438
439 static CORE_ADDR
440 sh_skip_prologue (CORE_ADDR pc)
441 {
442 CORE_ADDR post_prologue_pc;
443
444 /* See if we can determine the end of the prologue via the symbol table.
445 If so, then return either PC, or the PC after the prologue, whichever
446 is greater. */
447
448 post_prologue_pc = after_prologue (pc);
449
450 /* If after_prologue returned a useful address, then use it. Else
451 fall back on the instruction skipping code. */
452 if (post_prologue_pc != 0)
453 return max (pc, post_prologue_pc);
454 else
455 return (skip_prologue_hard_way (pc));
456 }
457
458 /* Immediately after a function call, return the saved pc.
459 Can't always go through the frames for this because on some machines
460 the new frame is not set up until the new function executes
461 some instructions.
462
463 The return address is the value saved in the PR register + 4 */
464 static CORE_ADDR
465 sh_saved_pc_after_call (struct frame_info *frame)
466 {
467 return (ADDR_BITS_REMOVE(read_register(PR_REGNUM)));
468 }
469
470 /* Should call_function allocate stack space for a struct return? */
471 static int
472 sh_use_struct_convention (int gcc_p, struct type *type)
473 {
474 return (TYPE_LENGTH (type) > 1);
475 }
476
477 /* Store the address of the place in which to copy the structure the
478 subroutine will return. This is called from call_function.
479
480 We store structs through a pointer passed in R0 */
481 static void
482 sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
483 {
484 write_register (STRUCT_RETURN_REGNUM, (addr));
485 }
486
487 /* Disassemble an instruction. */
488 static int
489 gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
490 {
491 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
492 return print_insn_sh (memaddr, info);
493 else
494 return print_insn_shl (memaddr, info);
495 }
496
497 /* Given a GDB frame, determine the address of the calling function's frame.
498 This will be used to create a new GDB frame struct, and then
499 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
500
501 For us, the frame address is its stack pointer value, so we look up
502 the function prologue to determine the caller's sp value, and return it. */
503 static CORE_ADDR
504 sh_frame_chain (struct frame_info *frame)
505 {
506 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
507 return frame->frame; /* dummy frame same as caller's frame */
508 if (frame->pc && !inside_entry_file (frame->pc))
509 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
510 else
511 return 0;
512 }
513
514 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
515 we might want to do here is to check REGNUM against the clobber mask, and
516 somehow flag it as invalid if it isn't saved on the stack somewhere. This
517 would provide a graceful failure mode when trying to get the value of
518 caller-saves registers for an inner frame. */
519
520 static CORE_ADDR
521 sh_find_callers_reg (struct frame_info *fi, int regnum)
522 {
523 for (; fi; fi = fi->next)
524 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
525 /* When the caller requests PR from the dummy frame, we return PC because
526 that's where the previous routine appears to have done a call from. */
527 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
528 else
529 {
530 FRAME_INIT_SAVED_REGS (fi);
531 if (!fi->pc)
532 return 0;
533 if (fi->saved_regs[regnum] != 0)
534 return read_memory_integer (fi->saved_regs[regnum],
535 REGISTER_RAW_SIZE (regnum));
536 }
537 return read_register (regnum);
538 }
539
540 /* Put here the code to store, into a struct frame_saved_regs, the
541 addresses of the saved registers of frame described by FRAME_INFO.
542 This includes special registers such as pc and fp saved in special
543 ways in the stack frame. sp is even more special: the address we
544 return for it IS the sp for the next frame. */
545 static void
546 sh_nofp_frame_init_saved_regs (struct frame_info *fi)
547 {
548 int where[NUM_REGS];
549 int rn;
550 int have_fp = 0;
551 int depth;
552 int pc;
553 int opc;
554 int insn;
555 int r3_val = 0;
556 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
557
558 if (fi->saved_regs == NULL)
559 frame_saved_regs_zalloc (fi);
560 else
561 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
562
563 if (dummy_regs)
564 {
565 /* DANGER! This is ONLY going to work if the char buffer format of
566 the saved registers is byte-for-byte identical to the
567 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
568 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
569 return;
570 }
571
572 fi->extra_info->leaf_function = 1;
573 fi->extra_info->f_offset = 0;
574
575 for (rn = 0; rn < NUM_REGS; rn++)
576 where[rn] = -1;
577
578 depth = 0;
579
580 /* Loop around examining the prologue insns until we find something
581 that does not appear to be part of the prologue. But give up
582 after 20 of them, since we're getting silly then. */
583
584 pc = get_pc_function_start (fi->pc);
585 if (!pc)
586 {
587 fi->pc = 0;
588 return;
589 }
590
591 for (opc = pc + (2 * 28); pc < opc; pc += 2)
592 {
593 insn = read_memory_integer (pc, 2);
594 /* See where the registers will be saved to */
595 if (IS_PUSH (insn))
596 {
597 rn = GET_PUSHED_REG (insn);
598 where[rn] = depth;
599 depth += 4;
600 }
601 else if (IS_STS (insn))
602 {
603 where[PR_REGNUM] = depth;
604 /* If we're storing the pr then this isn't a leaf */
605 fi->extra_info->leaf_function = 0;
606 depth += 4;
607 }
608 else if (IS_MOV_R3 (insn))
609 {
610 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
611 }
612 else if (IS_SHLL_R3 (insn))
613 {
614 r3_val <<= 1;
615 }
616 else if (IS_ADD_R3SP (insn))
617 {
618 depth += -r3_val;
619 }
620 else if (IS_ADD_SP (insn))
621 {
622 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
623 }
624 else if (IS_MOV_SP_FP (insn))
625 break;
626 #if 0 /* This used to just stop when it found an instruction that
627 was not considered part of the prologue. Now, we just
628 keep going looking for likely instructions. */
629 else
630 break;
631 #endif
632 }
633
634 /* Now we know how deep things are, we can work out their addresses */
635
636 for (rn = 0; rn < NUM_REGS; rn++)
637 {
638 if (where[rn] >= 0)
639 {
640 if (rn == FP_REGNUM)
641 have_fp = 1;
642
643 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
644 }
645 else
646 {
647 fi->saved_regs[rn] = 0;
648 }
649 }
650
651 if (have_fp)
652 {
653 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
654 }
655 else
656 {
657 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
658 }
659
660 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
661 /* Work out the return pc - either from the saved pr or the pr
662 value */
663 }
664
665 static void
666 sh_fp_frame_init_saved_regs (struct frame_info *fi)
667 {
668 int where[NUM_REGS];
669 int rn;
670 int have_fp = 0;
671 int depth;
672 int pc;
673 int opc;
674 int insn;
675 int r3_val = 0;
676 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
677
678 if (fi->saved_regs == NULL)
679 frame_saved_regs_zalloc (fi);
680 else
681 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
682
683 if (dummy_regs)
684 {
685 /* DANGER! This is ONLY going to work if the char buffer format of
686 the saved registers is byte-for-byte identical to the
687 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
688 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
689 return;
690 }
691
692 fi->extra_info->leaf_function = 1;
693 fi->extra_info->f_offset = 0;
694
695 for (rn = 0; rn < NUM_REGS; rn++)
696 where[rn] = -1;
697
698 depth = 0;
699
700 /* Loop around examining the prologue insns until we find something
701 that does not appear to be part of the prologue. But give up
702 after 20 of them, since we're getting silly then. */
703
704 pc = get_pc_function_start (fi->pc);
705 if (!pc)
706 {
707 fi->pc = 0;
708 return;
709 }
710
711 for (opc = pc + (2 * 28); pc < opc; pc += 2)
712 {
713 insn = read_memory_integer (pc, 2);
714 /* See where the registers will be saved to */
715 if (IS_PUSH (insn))
716 {
717 rn = GET_PUSHED_REG (insn);
718 where[rn] = depth;
719 depth += 4;
720 }
721 else if (IS_STS (insn))
722 {
723 where[PR_REGNUM] = depth;
724 /* If we're storing the pr then this isn't a leaf */
725 fi->extra_info->leaf_function = 0;
726 depth += 4;
727 }
728 else if (IS_MOV_R3 (insn))
729 {
730 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
731 }
732 else if (IS_SHLL_R3 (insn))
733 {
734 r3_val <<= 1;
735 }
736 else if (IS_ADD_R3SP (insn))
737 {
738 depth += -r3_val;
739 }
740 else if (IS_ADD_SP (insn))
741 {
742 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
743 }
744 else if (IS_FMOV (insn))
745 {
746 if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ)
747 {
748 depth += 8;
749 }
750 else
751 {
752 depth += 4;
753 }
754 }
755 else if (IS_MOV_SP_FP (insn))
756 break;
757 #if 0 /* This used to just stop when it found an instruction that
758 was not considered part of the prologue. Now, we just
759 keep going looking for likely instructions. */
760 else
761 break;
762 #endif
763 }
764
765 /* Now we know how deep things are, we can work out their addresses */
766
767 for (rn = 0; rn < NUM_REGS; rn++)
768 {
769 if (where[rn] >= 0)
770 {
771 if (rn == FP_REGNUM)
772 have_fp = 1;
773
774 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
775 }
776 else
777 {
778 fi->saved_regs[rn] = 0;
779 }
780 }
781
782 if (have_fp)
783 {
784 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
785 }
786 else
787 {
788 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
789 }
790
791 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
792 /* Work out the return pc - either from the saved pr or the pr
793 value */
794 }
795
796 /* Initialize the extra info saved in a FRAME */
797 static void
798 sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
799 {
800
801 fi->extra_info = (struct frame_extra_info *)
802 frame_obstack_alloc (sizeof (struct frame_extra_info));
803
804 if (fi->next)
805 fi->pc = FRAME_SAVED_PC (fi->next);
806
807 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
808 {
809 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
810 by assuming it's always FP. */
811 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
812 SP_REGNUM);
813 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
814 PC_REGNUM);
815 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
816 fi->extra_info->leaf_function = 0;
817 return;
818 }
819 else
820 {
821 FRAME_INIT_SAVED_REGS (fi);
822 fi->extra_info->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
823 }
824 }
825
826 /* Extract from an array REGBUF containing the (raw) register state
827 the address in which a function should return its structure value,
828 as a CORE_ADDR (or an expression that can be used as one). */
829 CORE_ADDR
830 static sh_extract_struct_value_address (regbuf)
831 char *regbuf;
832 {
833 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
834 }
835
836 static CORE_ADDR
837 sh_frame_saved_pc (struct frame_info *frame)
838 {
839 return ((frame)->extra_info->return_pc);
840 }
841
842 static CORE_ADDR
843 sh_frame_args_address (struct frame_info *fi)
844 {
845 return (fi)->frame;
846 }
847
848 static CORE_ADDR
849 sh_frame_locals_address (struct frame_info *fi)
850 {
851 return (fi)->frame;
852 }
853
854 /* Discard from the stack the innermost frame,
855 restoring all saved registers. */
856 static void
857 sh_pop_frame (void)
858 {
859 register struct frame_info *frame = get_current_frame ();
860 register CORE_ADDR fp;
861 register int regnum;
862
863 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
864 generic_pop_dummy_frame ();
865 else
866 {
867 fp = FRAME_FP (frame);
868 FRAME_INIT_SAVED_REGS (frame);
869
870 /* Copy regs from where they were saved in the frame */
871 for (regnum = 0; regnum < NUM_REGS; regnum++)
872 if (frame->saved_regs[regnum])
873 write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4));
874
875 write_register (PC_REGNUM, frame->extra_info->return_pc);
876 write_register (SP_REGNUM, fp + 4);
877 }
878 flush_cached_frames ();
879 }
880
881 /* Function: push_arguments
882 Setup the function arguments for calling a function in the inferior.
883
884 On the Hitachi SH architecture, there are four registers (R4 to R7)
885 which are dedicated for passing function arguments. Up to the first
886 four arguments (depending on size) may go into these registers.
887 The rest go on the stack.
888
889 Arguments that are smaller than 4 bytes will still take up a whole
890 register or a whole 32-bit word on the stack, and will be
891 right-justified in the register or the stack word. This includes
892 chars, shorts, and small aggregate types.
893
894 Arguments that are larger than 4 bytes may be split between two or
895 more registers. If there are not enough registers free, an argument
896 may be passed partly in a register (or registers), and partly on the
897 stack. This includes doubles, long longs, and larger aggregates.
898 As far as I know, there is no upper limit to the size of aggregates
899 that will be passed in this way; in other words, the convention of
900 passing a pointer to a large aggregate instead of a copy is not used.
901
902 An exceptional case exists for struct arguments (and possibly other
903 aggregates such as arrays) if the size is larger than 4 bytes but
904 not a multiple of 4 bytes. In this case the argument is never split
905 between the registers and the stack, but instead is copied in its
906 entirety onto the stack, AND also copied into as many registers as
907 there is room for. In other words, space in registers permitting,
908 two copies of the same argument are passed in. As far as I can tell,
909 only the one on the stack is used, although that may be a function
910 of the level of compiler optimization. I suspect this is a compiler
911 bug. Arguments of these odd sizes are left-justified within the
912 word (as opposed to arguments smaller than 4 bytes, which are
913 right-justified).
914
915 If the function is to return an aggregate type such as a struct, it
916 is either returned in the normal return value register R0 (if its
917 size is no greater than one byte), or else the caller must allocate
918 space into which the callee will copy the return value (if the size
919 is greater than one byte). In this case, a pointer to the return
920 value location is passed into the callee in register R2, which does
921 not displace any of the other arguments passed in via registers R4
922 to R7. */
923
924 static CORE_ADDR
925 sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
926 int struct_return, CORE_ADDR struct_addr)
927 {
928 int stack_offset, stack_alloc;
929 int argreg;
930 int argnum;
931 struct type *type;
932 CORE_ADDR regval;
933 char *val;
934 char valbuf[4];
935 int len;
936 int odd_sized_struct;
937
938 /* first force sp to a 4-byte alignment */
939 sp = sp & ~3;
940
941 /* The "struct return pointer" pseudo-argument has its own dedicated
942 register */
943 if (struct_return)
944 write_register (STRUCT_RETURN_REGNUM, struct_addr);
945
946 /* Now make sure there's space on the stack */
947 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
948 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
949 sp -= stack_alloc; /* make room on stack for args */
950
951 /* Now load as many as possible of the first arguments into
952 registers, and push the rest onto the stack. There are 16 bytes
953 in four registers available. Loop thru args from first to last. */
954
955 argreg = ARG0_REGNUM;
956 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
957 {
958 type = VALUE_TYPE (args[argnum]);
959 len = TYPE_LENGTH (type);
960 memset (valbuf, 0, sizeof (valbuf));
961 if (len < 4)
962 {
963 /* value gets right-justified in the register or stack word */
964 memcpy (valbuf + (4 - len),
965 (char *) VALUE_CONTENTS (args[argnum]), len);
966 val = valbuf;
967 }
968 else
969 val = (char *) VALUE_CONTENTS (args[argnum]);
970
971 if (len > 4 && (len & 3) != 0)
972 odd_sized_struct = 1; /* such structs go entirely on stack */
973 else
974 odd_sized_struct = 0;
975 while (len > 0)
976 {
977 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
978 { /* must go on the stack */
979 write_memory (sp + stack_offset, val, 4);
980 stack_offset += 4;
981 }
982 /* NOTE WELL!!!!! This is not an "else if" clause!!!
983 That's because some *&^%$ things get passed on the stack
984 AND in the registers! */
985 if (argreg <= ARGLAST_REGNUM)
986 { /* there's room in a register */
987 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
988 write_register (argreg++, regval);
989 }
990 /* Store the value 4 bytes at a time. This means that things
991 larger than 4 bytes may go partly in registers and partly
992 on the stack. */
993 len -= REGISTER_RAW_SIZE (argreg);
994 val += REGISTER_RAW_SIZE (argreg);
995 }
996 }
997 return sp;
998 }
999
1000 /* Function: push_return_address (pc)
1001 Set up the return address for the inferior function call.
1002 Needed for targets where we don't actually execute a JSR/BSR instruction */
1003
1004 static CORE_ADDR
1005 sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1006 {
1007 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
1008 return sp;
1009 }
1010
1011 /* Function: fix_call_dummy
1012 Poke the callee function's address into the destination part of
1013 the CALL_DUMMY. The address is actually stored in a data word
1014 following the actualy CALL_DUMMY instructions, which will load
1015 it into a register using PC-relative addressing. This function
1016 expects the CALL_DUMMY to look like this:
1017
1018 mov.w @(2,PC), R8
1019 jsr @R8
1020 nop
1021 trap
1022 <destination>
1023 */
1024
1025 #if 0
1026 void
1027 sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
1028 value_ptr *args, struct type *type, int gcc_p)
1029 {
1030 *(unsigned long *) (dummy + 8) = fun;
1031 }
1032 #endif
1033
1034 static int
1035 sh_coerce_float_to_double (struct type *formal, struct type *actual)
1036 {
1037 return 1;
1038 }
1039
1040 /* Find a function's return value in the appropriate registers (in
1041 regbuf), and copy it into valbuf. Extract from an array REGBUF
1042 containing the (raw) register state a function return value of type
1043 TYPE, and copy that, in virtual format, into VALBUF. */
1044 static void
1045 sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1046 {
1047 int len = TYPE_LENGTH (type);
1048
1049 if (len <= 4)
1050 memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
1051 else if (len <= 8)
1052 memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
1053 else
1054 error ("bad size for return value");
1055 }
1056
1057 /* Write into appropriate registers a function return value
1058 of type TYPE, given in virtual format.
1059 If the architecture is sh4 or sh3e, store a function's return value
1060 in the R0 general register or in the FP0 floating point register,
1061 depending on the type of the return value. In all the other cases
1062 the result is stored in r0. */
1063 static void
1064 sh_default_store_return_value (struct type *type, char *valbuf)
1065 {
1066 write_register_bytes (REGISTER_BYTE (0),
1067 valbuf, TYPE_LENGTH (type));
1068 }
1069
1070 static void
1071 sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1072 {
1073 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1074 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1075 valbuf, TYPE_LENGTH (type));
1076 else
1077 write_register_bytes (REGISTER_BYTE (0),
1078 valbuf, TYPE_LENGTH (type));
1079 }
1080
1081
1082 /* Print the registers in a form similar to the E7000 */
1083
1084 static void
1085 sh_generic_show_regs (void)
1086 {
1087 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1088 paddr (read_register (PC_REGNUM)),
1089 (long) read_register (SR_REGNUM),
1090 (long) read_register (PR_REGNUM),
1091 (long) read_register (MACH_REGNUM),
1092 (long) read_register (MACL_REGNUM));
1093
1094 printf_filtered ("GBR=%08lx VBR=%08lx",
1095 (long) read_register (GBR_REGNUM),
1096 (long) read_register (VBR_REGNUM));
1097
1098 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1099 (long) read_register (0),
1100 (long) read_register (1),
1101 (long) read_register (2),
1102 (long) read_register (3),
1103 (long) read_register (4),
1104 (long) read_register (5),
1105 (long) read_register (6),
1106 (long) read_register (7));
1107 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1108 (long) read_register (8),
1109 (long) read_register (9),
1110 (long) read_register (10),
1111 (long) read_register (11),
1112 (long) read_register (12),
1113 (long) read_register (13),
1114 (long) read_register (14),
1115 (long) read_register (15));
1116 }
1117
1118 static void
1119 sh3_show_regs (void)
1120 {
1121 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1122 paddr (read_register (PC_REGNUM)),
1123 (long) read_register (SR_REGNUM),
1124 (long) read_register (PR_REGNUM),
1125 (long) read_register (MACH_REGNUM),
1126 (long) read_register (MACL_REGNUM));
1127
1128 printf_filtered ("GBR=%08lx VBR=%08lx",
1129 (long) read_register (GBR_REGNUM),
1130 (long) read_register (VBR_REGNUM));
1131 printf_filtered (" SSR=%08lx SPC=%08lx",
1132 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1133 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1134
1135 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1136 (long) read_register (0),
1137 (long) read_register (1),
1138 (long) read_register (2),
1139 (long) read_register (3),
1140 (long) read_register (4),
1141 (long) read_register (5),
1142 (long) read_register (6),
1143 (long) read_register (7));
1144 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1145 (long) read_register (8),
1146 (long) read_register (9),
1147 (long) read_register (10),
1148 (long) read_register (11),
1149 (long) read_register (12),
1150 (long) read_register (13),
1151 (long) read_register (14),
1152 (long) read_register (15));
1153 }
1154
1155
1156 static void
1157 sh3e_show_regs (void)
1158 {
1159 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1160 paddr (read_register (PC_REGNUM)),
1161 (long) read_register (SR_REGNUM),
1162 (long) read_register (PR_REGNUM),
1163 (long) read_register (MACH_REGNUM),
1164 (long) read_register (MACL_REGNUM));
1165
1166 printf_filtered ("GBR=%08lx VBR=%08lx",
1167 (long) read_register (GBR_REGNUM),
1168 (long) read_register (VBR_REGNUM));
1169 printf_filtered (" SSR=%08lx SPC=%08lx",
1170 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1171 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1172 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1173 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1174 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1175
1176 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1177 (long) read_register (0),
1178 (long) read_register (1),
1179 (long) read_register (2),
1180 (long) read_register (3),
1181 (long) read_register (4),
1182 (long) read_register (5),
1183 (long) read_register (6),
1184 (long) read_register (7));
1185 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1186 (long) read_register (8),
1187 (long) read_register (9),
1188 (long) read_register (10),
1189 (long) read_register (11),
1190 (long) read_register (12),
1191 (long) read_register (13),
1192 (long) read_register (14),
1193 (long) read_register (15));
1194
1195 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1196 (long) read_register (FP0_REGNUM + 0),
1197 (long) read_register (FP0_REGNUM + 1),
1198 (long) read_register (FP0_REGNUM + 2),
1199 (long) read_register (FP0_REGNUM + 3),
1200 (long) read_register (FP0_REGNUM + 4),
1201 (long) read_register (FP0_REGNUM + 5),
1202 (long) read_register (FP0_REGNUM + 6),
1203 (long) read_register (FP0_REGNUM + 7));
1204 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1205 (long) read_register (FP0_REGNUM + 8),
1206 (long) read_register (FP0_REGNUM + 9),
1207 (long) read_register (FP0_REGNUM + 10),
1208 (long) read_register (FP0_REGNUM + 11),
1209 (long) read_register (FP0_REGNUM + 12),
1210 (long) read_register (FP0_REGNUM + 13),
1211 (long) read_register (FP0_REGNUM + 14),
1212 (long) read_register (FP0_REGNUM + 15));
1213 }
1214
1215 static void
1216 sh3_dsp_show_regs (void)
1217 {
1218 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1219 paddr (read_register (PC_REGNUM)),
1220 (long) read_register (SR_REGNUM),
1221 (long) read_register (PR_REGNUM),
1222 (long) read_register (MACH_REGNUM),
1223 (long) read_register (MACL_REGNUM));
1224
1225 printf_filtered ("GBR=%08lx VBR=%08lx",
1226 (long) read_register (GBR_REGNUM),
1227 (long) read_register (VBR_REGNUM));
1228
1229 printf_filtered (" SSR=%08lx SPC=%08lx",
1230 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1231 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1232
1233 printf_filtered (" DSR=%08lx",
1234 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1235
1236 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1237 (long) read_register (0),
1238 (long) read_register (1),
1239 (long) read_register (2),
1240 (long) read_register (3),
1241 (long) read_register (4),
1242 (long) read_register (5),
1243 (long) read_register (6),
1244 (long) read_register (7));
1245 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1246 (long) read_register (8),
1247 (long) read_register (9),
1248 (long) read_register (10),
1249 (long) read_register (11),
1250 (long) read_register (12),
1251 (long) read_register (13),
1252 (long) read_register (14),
1253 (long) read_register (15));
1254
1255 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1256 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1257 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1258 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1259 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1260 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1261 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1262 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1263 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1264 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1265 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1266 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1267 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1268 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1269 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1270 }
1271
1272 static void
1273 sh4_show_regs (void)
1274 {
1275 int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000;
1276 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1277 paddr (read_register (PC_REGNUM)),
1278 (long) read_register (SR_REGNUM),
1279 (long) read_register (PR_REGNUM),
1280 (long) read_register (MACH_REGNUM),
1281 (long) read_register (MACL_REGNUM));
1282
1283 printf_filtered ("GBR=%08lx VBR=%08lx",
1284 (long) read_register (GBR_REGNUM),
1285 (long) read_register (VBR_REGNUM));
1286 printf_filtered (" SSR=%08lx SPC=%08lx",
1287 (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1288 (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1289 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1290 (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1291 (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1292
1293 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1294 (long) read_register (0),
1295 (long) read_register (1),
1296 (long) read_register (2),
1297 (long) read_register (3),
1298 (long) read_register (4),
1299 (long) read_register (5),
1300 (long) read_register (6),
1301 (long) read_register (7));
1302 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1303 (long) read_register (8),
1304 (long) read_register (9),
1305 (long) read_register (10),
1306 (long) read_register (11),
1307 (long) read_register (12),
1308 (long) read_register (13),
1309 (long) read_register (14),
1310 (long) read_register (15));
1311
1312 printf_filtered ((pr
1313 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1314 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1315 (long) read_register (FP0_REGNUM + 0),
1316 (long) read_register (FP0_REGNUM + 1),
1317 (long) read_register (FP0_REGNUM + 2),
1318 (long) read_register (FP0_REGNUM + 3),
1319 (long) read_register (FP0_REGNUM + 4),
1320 (long) read_register (FP0_REGNUM + 5),
1321 (long) read_register (FP0_REGNUM + 6),
1322 (long) read_register (FP0_REGNUM + 7));
1323 printf_filtered ((pr
1324 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1325 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1326 (long) read_register (FP0_REGNUM + 8),
1327 (long) read_register (FP0_REGNUM + 9),
1328 (long) read_register (FP0_REGNUM + 10),
1329 (long) read_register (FP0_REGNUM + 11),
1330 (long) read_register (FP0_REGNUM + 12),
1331 (long) read_register (FP0_REGNUM + 13),
1332 (long) read_register (FP0_REGNUM + 14),
1333 (long) read_register (FP0_REGNUM + 15));
1334 }
1335
1336 static void
1337 sh_dsp_show_regs (void)
1338 {
1339 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1340 paddr (read_register (PC_REGNUM)),
1341 (long) read_register (SR_REGNUM),
1342 (long) read_register (PR_REGNUM),
1343 (long) read_register (MACH_REGNUM),
1344 (long) read_register (MACL_REGNUM));
1345
1346 printf_filtered ("GBR=%08lx VBR=%08lx",
1347 (long) read_register (GBR_REGNUM),
1348 (long) read_register (VBR_REGNUM));
1349
1350 printf_filtered (" DSR=%08lx",
1351 (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1352
1353 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1354 (long) read_register (0),
1355 (long) read_register (1),
1356 (long) read_register (2),
1357 (long) read_register (3),
1358 (long) read_register (4),
1359 (long) read_register (5),
1360 (long) read_register (6),
1361 (long) read_register (7));
1362 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1363 (long) read_register (8),
1364 (long) read_register (9),
1365 (long) read_register (10),
1366 (long) read_register (11),
1367 (long) read_register (12),
1368 (long) read_register (13),
1369 (long) read_register (14),
1370 (long) read_register (15));
1371
1372 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1373 (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1374 (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1375 (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1376 (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1377 (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1378 (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1379 (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1380 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1381 (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1382 (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1383 (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1384 (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1385 (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1386 (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1387 }
1388
1389 void sh_show_regs_command (char *args, int from_tty)
1390 {
1391 if (sh_show_regs)
1392 (*sh_show_regs)();
1393 }
1394
1395 /* Index within `registers' of the first byte of the space for
1396 register N. */
1397 static int
1398 sh_default_register_byte (int reg_nr)
1399 {
1400 return (reg_nr * 4);
1401 }
1402
1403 static int
1404 sh_sh4_register_byte (int reg_nr)
1405 {
1406 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1407 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1408 return (dr_reg_base_num (reg_nr) * 4);
1409 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1410 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1411 return (fv_reg_base_num (reg_nr) * 4);
1412 else
1413 return (reg_nr * 4);
1414 }
1415
1416 /* Number of bytes of storage in the actual machine representation for
1417 register REG_NR. */
1418 static int
1419 sh_default_register_raw_size (int reg_nr)
1420 {
1421 return 4;
1422 }
1423
1424 static int
1425 sh_sh4_register_raw_size (int reg_nr)
1426 {
1427 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1428 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1429 return 8;
1430 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1431 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1432 return 16;
1433 else
1434 return 4;
1435 }
1436
1437 /* Number of bytes of storage in the program's representation
1438 for register N. */
1439 static int
1440 sh_register_virtual_size (int reg_nr)
1441 {
1442 return 4;
1443 }
1444
1445 /* Return the GDB type object for the "standard" data type
1446 of data in register N. */
1447
1448 static struct type *
1449 sh_sh3e_register_virtual_type (int reg_nr)
1450 {
1451 if ((reg_nr >= FP0_REGNUM
1452 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP15_REGNUM))
1453 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1454 return builtin_type_float;
1455 else
1456 return builtin_type_int;
1457 }
1458
1459 static struct type *
1460 sh_sh4_register_virtual_type (int reg_nr)
1461 {
1462 if ((reg_nr >= FP0_REGNUM
1463 && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP15_REGNUM))
1464 || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1465 return builtin_type_float;
1466 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1467 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1468 return builtin_type_double;
1469 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1470 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1471 return sh_sh4_build_float_register_type (3);
1472 else
1473 return builtin_type_int;
1474 }
1475
1476 static struct type *
1477 sh_sh4_build_float_register_type (int high)
1478 {
1479 struct type *temp;
1480
1481 temp = create_range_type (NULL, builtin_type_int, 0, high);
1482 return create_array_type (NULL, builtin_type_float, temp);
1483 }
1484
1485 static struct type *
1486 sh_default_register_virtual_type (int reg_nr)
1487 {
1488 return builtin_type_int;
1489 }
1490
1491 /* On the sh4, the DRi pseudo registers are problematic if the target
1492 is little endian. When the user writes one of those registers, for
1493 instance with 'ser var $dr0=1', we want the double to be stored
1494 like this:
1495 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1496 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1497
1498 This corresponds to little endian byte order & big endian word
1499 order. However if we let gdb write the register w/o conversion, it
1500 will write fr0 and fr1 this way:
1501 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1502 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1503 because it will consider fr0 and fr1 as a single LE stretch of memory.
1504
1505 To achieve what we want we must force gdb to store things in
1506 floatformat_ieee_double_littlebyte_bigword (which is defined in
1507 include/floatformat.h and libiberty/floatformat.c.
1508
1509 In case the target is big endian, there is no problem, the
1510 raw bytes will look like:
1511 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1512 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1513
1514 The other pseudo registers (the FVs) also don't pose a problem
1515 because they are stored as 4 individual FP elements. */
1516
1517 int
1518 sh_sh4_register_convertible (int nr)
1519 {
1520 if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1521 return (gdbarch_tdep (current_gdbarch)->DR0_REGNUM <= nr
1522 && nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM);
1523 else
1524 return 0;
1525 }
1526
1527 void
1528 sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1529 char *from, char *to)
1530 {
1531 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1532 && regnum <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1533 {
1534 DOUBLEST val;
1535 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1536 store_floating(to, TYPE_LENGTH(type), val);
1537 }
1538 else
1539 error("sh_register_convert_to_virtual called with non DR register number");
1540 }
1541
1542 void
1543 sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1544 char *from, char *to)
1545 {
1546 if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1547 && regnum <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1548 {
1549 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1550 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1551 }
1552 else
1553 error("sh_register_convert_to_raw called with non DR register number");
1554 }
1555
1556 void
1557 sh_fetch_pseudo_register (int reg_nr)
1558 {
1559 int base_regnum, portion;
1560
1561 if (!register_cached (reg_nr))
1562 {
1563 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1564 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1565 {
1566 base_regnum = dr_reg_base_num (reg_nr);
1567
1568 /* Read the real regs for which this one is an alias. */
1569 for (portion = 0; portion < 2; portion++)
1570 if (!register_cached (base_regnum + portion))
1571 target_fetch_registers (base_regnum + portion);
1572 }
1573 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1574 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1575 {
1576 base_regnum = fv_reg_base_num (reg_nr);
1577
1578 /* Read the real regs for which this one is an alias. */
1579 for (portion = 0; portion < 4; portion++)
1580 if (!register_cached (base_regnum + portion))
1581 target_fetch_registers (base_regnum + portion);
1582
1583 }
1584 register_valid [reg_nr] = 1;
1585 }
1586 }
1587
1588 void
1589 sh_store_pseudo_register (int reg_nr)
1590 {
1591 int base_regnum, portion;
1592
1593 if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1594 && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
1595 {
1596 base_regnum = dr_reg_base_num (reg_nr);
1597
1598 /* Write the real regs for which this one is an alias. */
1599 for (portion = 0; portion < 2; portion++)
1600 {
1601 register_valid[base_regnum + portion] = 1;
1602 target_store_registers (base_regnum + portion);
1603 }
1604 }
1605 else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1606 && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1607 {
1608 base_regnum = fv_reg_base_num (reg_nr);
1609
1610 /* Write the real regs for which this one is an alias. */
1611 for (portion = 0; portion < 4; portion++)
1612 {
1613 register_valid[base_regnum + portion] = 1;
1614 target_store_registers (base_regnum + portion);
1615 }
1616 }
1617 }
1618
1619 static int
1620 fv_reg_base_num (int fv_regnum)
1621 {
1622 int fp_regnum;
1623
1624 fp_regnum = FP0_REGNUM +
1625 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
1626 return fp_regnum;
1627 }
1628
1629 static int
1630 dr_reg_base_num (int dr_regnum)
1631 {
1632 int fp_regnum;
1633
1634 fp_regnum = FP0_REGNUM +
1635 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
1636 return fp_regnum;
1637 }
1638
1639 static void
1640 do_fv_register_info (int fv_regnum)
1641 {
1642 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1643 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1644 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1645 (int) read_register (first_fp_reg_num),
1646 (int) read_register (first_fp_reg_num + 1),
1647 (int) read_register (first_fp_reg_num + 2),
1648 (int) read_register (first_fp_reg_num + 3));
1649 }
1650
1651 static void
1652 do_dr_register_info (int dr_regnum)
1653 {
1654 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1655
1656 printf_filtered ("dr%d\t0x%08x%08x\n",
1657 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1658 (int) read_register (first_fp_reg_num),
1659 (int) read_register (first_fp_reg_num + 1));
1660 }
1661
1662 static void
1663 sh_do_pseudo_register (int regnum)
1664 {
1665 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1666 internal_error ("Invalid pseudo register number %d\n", regnum);
1667 else if (regnum >= NUM_REGS &&
1668 regnum < gdbarch_tdep (current_gdbarch)->FV0_REGNUM)
1669 do_dr_register_info (regnum);
1670 else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM &&
1671 regnum <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
1672 do_fv_register_info (regnum);
1673 }
1674
1675
1676 static void
1677 sh_do_fp_register (int regnum)
1678 { /* do values for FP (float) regs */
1679 char *raw_buffer;
1680 double flt; /* double extracted from raw hex data */
1681 int inv;
1682 int j;
1683
1684 /* Allocate space for the float. */
1685 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1686
1687 /* Get the data in raw format. */
1688 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1689 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1690
1691 /* Get the register as a number */
1692 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1693
1694 /* Print the name and some spaces. */
1695 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1696 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1697
1698 /* Print the value. */
1699 printf_filtered (inv ? "<invalid float>" : "%-10.9g", flt);
1700
1701 /* Print the fp register as hex. */
1702 printf_filtered ("\t(raw 0x");
1703 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1704 {
1705 register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j
1706 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1707 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1708 }
1709 printf_filtered (")");
1710 printf_filtered ("\n");
1711 }
1712
1713 static void
1714 sh_do_register (int regnum)
1715 {
1716 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1717
1718 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1719 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1720
1721 /* Get the data in raw format. */
1722 if (read_relative_register_raw_bytes (regnum, raw_buffer))
1723 printf_filtered ("*value not available*\n");
1724
1725 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1726 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1727 printf_filtered ("\t");
1728 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1729 gdb_stdout, 0, 1, 0, Val_pretty_default);
1730 printf_filtered ("\n");
1731 }
1732
1733 static void
1734 sh_print_register (int regnum)
1735 {
1736 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1737 internal_error ("Invalid register number %d\n", regnum);
1738
1739 else if (regnum > 0 && regnum < NUM_REGS)
1740 {
1741 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1742 sh_do_fp_register (regnum); /* FP regs */
1743 else
1744 sh_do_register (regnum); /* All other regs */
1745 }
1746
1747 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1748 sh_do_pseudo_register (regnum);
1749 }
1750
1751 void
1752 sh_do_registers_info (int regnum, int fpregs)
1753 {
1754 if (regnum != -1) /* do one specified register */
1755 {
1756 if (*(REGISTER_NAME (regnum)) == '\0')
1757 error ("Not a valid register for the current processor type");
1758
1759 sh_print_register (regnum);
1760 }
1761 else
1762 /* do all (or most) registers */
1763 {
1764 regnum = 0;
1765 while (regnum < NUM_REGS)
1766 {
1767 /* If the register name is empty, it is undefined for this
1768 processor, so don't display anything. */
1769 if (REGISTER_NAME (regnum) == NULL
1770 || *(REGISTER_NAME (regnum)) == '\0')
1771 {
1772 regnum++;
1773 continue;
1774 }
1775
1776 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1777 {
1778 if (fpregs)
1779 {
1780 /* true for "INFO ALL-REGISTERS" command */
1781 sh_do_fp_register (regnum); /* FP regs */
1782 regnum ++;
1783 }
1784 else
1785 regnum += (gdbarch_tdep (current_gdbarch)->FP15_REGNUM - FP0_REGNUM); /* skip FP regs */
1786 }
1787 else
1788 {
1789 sh_do_register (regnum); /* All other regs */
1790 regnum++;
1791 }
1792 }
1793
1794 if (fpregs)
1795 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1796 {
1797 sh_do_pseudo_register (regnum);
1798 regnum++;
1799 }
1800 }
1801 }
1802
1803 #ifdef SVR4_SHARED_LIBS
1804
1805 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1806 for native i386 linux targets using the struct offsets defined in
1807 link.h (but without actual reference to that file).
1808
1809 This makes it possible to access i386-linux shared libraries from
1810 a gdb that was not built on an i386-linux host (for cross debugging).
1811 */
1812
1813 struct link_map_offsets *
1814 sh_linux_svr4_fetch_link_map_offsets (void)
1815 {
1816 static struct link_map_offsets lmo;
1817 static struct link_map_offsets *lmp = 0;
1818
1819 if (lmp == 0)
1820 {
1821 lmp = &lmo;
1822
1823 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1824
1825 lmo.r_map_offset = 4;
1826 lmo.r_map_size = 4;
1827
1828 lmo.link_map_size = 20; /* 552 not actual size but all we need */
1829
1830 lmo.l_addr_offset = 0;
1831 lmo.l_addr_size = 4;
1832
1833 lmo.l_name_offset = 4;
1834 lmo.l_name_size = 4;
1835
1836 lmo.l_next_offset = 12;
1837 lmo.l_next_size = 4;
1838
1839 lmo.l_prev_offset = 16;
1840 lmo.l_prev_size = 4;
1841 }
1842
1843 return lmp;
1844 }
1845 #endif /* SVR4_SHARED_LIBS */
1846
1847 static gdbarch_init_ftype sh_gdbarch_init;
1848
1849 static struct gdbarch *
1850 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1851 {
1852 static LONGEST sh_call_dummy_words[] = {0};
1853 struct gdbarch *gdbarch;
1854 struct gdbarch_tdep *tdep;
1855 gdbarch_register_name_ftype *sh_register_name;
1856 gdbarch_store_return_value_ftype *sh_store_return_value;
1857 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1858
1859 /* Find a candidate among the list of pre-declared architectures. */
1860 arches = gdbarch_list_lookup_by_info (arches, &info);
1861 if (arches != NULL)
1862 return arches->gdbarch;
1863
1864 /* None found, create a new architecture from the information
1865 provided. */
1866 tdep = XMALLOC (struct gdbarch_tdep);
1867 gdbarch = gdbarch_alloc (&info, tdep);
1868
1869 /* Initialize the register numbers that are not common to all the
1870 variants to -1, if necessary thse will be overwritten in the case
1871 statement below. */
1872 tdep->FPUL_REGNUM = -1;
1873 tdep->FPSCR_REGNUM = -1;
1874 tdep->DSR_REGNUM = -1;
1875 tdep->FP15_REGNUM = -1;
1876 tdep->A0G_REGNUM = -1;
1877 tdep->A0_REGNUM = -1;
1878 tdep->A1G_REGNUM = -1;
1879 tdep->A1_REGNUM = -1;
1880 tdep->M0_REGNUM = -1;
1881 tdep->M1_REGNUM = -1;
1882 tdep->X0_REGNUM = -1;
1883 tdep->X1_REGNUM = -1;
1884 tdep->Y0_REGNUM = -1;
1885 tdep->Y1_REGNUM = -1;
1886 tdep->MOD_REGNUM = -1;
1887 tdep->RS_REGNUM = -1;
1888 tdep->RE_REGNUM = -1;
1889 tdep->SSR_REGNUM = -1;
1890 tdep->SPC_REGNUM = -1;
1891 tdep->DR0_REGNUM = -1;
1892 tdep->DR2_REGNUM = -1;
1893 tdep->DR4_REGNUM = -1;
1894 tdep->DR6_REGNUM = -1;
1895 tdep->DR8_REGNUM = -1;
1896 tdep->DR10_REGNUM = -1;
1897 tdep->DR12_REGNUM = -1;
1898 tdep->DR14_REGNUM = -1;
1899 tdep->FV0_REGNUM = -1;
1900 tdep->FV4_REGNUM = -1;
1901 tdep->FV8_REGNUM = -1;
1902 tdep->FV12_REGNUM = -1;
1903 set_gdbarch_fp0_regnum (gdbarch, -1);
1904 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1905 set_gdbarch_max_register_raw_size (gdbarch, 4);
1906 set_gdbarch_max_register_virtual_size (gdbarch, 4);
1907
1908 switch (info.bfd_arch_info->mach)
1909 {
1910 case bfd_mach_sh:
1911 sh_register_name = sh_sh_register_name;
1912 sh_show_regs = sh_generic_show_regs;
1913 sh_store_return_value = sh_default_store_return_value;
1914 sh_register_virtual_type = sh_default_register_virtual_type;
1915 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1916 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1917 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1918 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1919 break;
1920 case bfd_mach_sh2:
1921 sh_register_name = sh_sh_register_name;
1922 sh_show_regs = sh_generic_show_regs;
1923 sh_store_return_value = sh_default_store_return_value;
1924 sh_register_virtual_type = sh_default_register_virtual_type;
1925 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1926 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1927 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1928 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1929 break;
1930 case bfd_mach_sh_dsp:
1931 sh_register_name = sh_sh_dsp_register_name;
1932 sh_show_regs = sh_dsp_show_regs;
1933 sh_store_return_value = sh_default_store_return_value;
1934 sh_register_virtual_type = sh_default_register_virtual_type;
1935 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1936 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1937 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1938 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1939 tdep->DSR_REGNUM = 24;
1940 tdep->A0G_REGNUM = 25;
1941 tdep->A0_REGNUM = 26;
1942 tdep->A1G_REGNUM = 27;
1943 tdep->A1_REGNUM = 28;
1944 tdep->M0_REGNUM = 29;
1945 tdep->M1_REGNUM = 30;
1946 tdep->X0_REGNUM = 31;
1947 tdep->X1_REGNUM = 32;
1948 tdep->Y0_REGNUM = 33;
1949 tdep->Y1_REGNUM = 34;
1950 tdep->MOD_REGNUM = 40;
1951 tdep->RS_REGNUM = 43;
1952 tdep->RE_REGNUM = 44;
1953 break;
1954 case bfd_mach_sh3:
1955 sh_register_name = sh_sh3_register_name;
1956 sh_show_regs = sh3_show_regs;
1957 sh_store_return_value = sh_default_store_return_value;
1958 sh_register_virtual_type = sh_default_register_virtual_type;
1959 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1960 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1961 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1962 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1963 tdep->SSR_REGNUM = 41;
1964 tdep->SPC_REGNUM = 42;
1965 break;
1966 case bfd_mach_sh3e:
1967 sh_register_name = sh_sh3e_register_name;
1968 sh_show_regs = sh3e_show_regs;
1969 sh_store_return_value = sh3e_sh4_store_return_value;
1970 sh_register_virtual_type = sh_sh3e_register_virtual_type;
1971 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
1972 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1973 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1974 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1975 set_gdbarch_fp0_regnum (gdbarch, 25);
1976 tdep->FPUL_REGNUM = 23;
1977 tdep->FPSCR_REGNUM = 24;
1978 tdep->FP15_REGNUM = 40;
1979 tdep->SSR_REGNUM = 41;
1980 tdep->SPC_REGNUM = 42;
1981 break;
1982 case bfd_mach_sh3_dsp:
1983 sh_register_name = sh_sh3_dsp_register_name;
1984 sh_show_regs = sh3_dsp_show_regs;
1985 sh_store_return_value = sh_default_store_return_value;
1986 sh_register_virtual_type = sh_default_register_virtual_type;
1987 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1988 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1989 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1990 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1991 tdep->DSR_REGNUM = 24;
1992 tdep->A0G_REGNUM = 25;
1993 tdep->A0_REGNUM = 26;
1994 tdep->A1G_REGNUM = 27;
1995 tdep->A1_REGNUM = 28;
1996 tdep->M0_REGNUM = 29;
1997 tdep->M1_REGNUM = 30;
1998 tdep->X0_REGNUM = 31;
1999 tdep->X1_REGNUM = 32;
2000 tdep->Y0_REGNUM = 33;
2001 tdep->Y1_REGNUM = 34;
2002 tdep->MOD_REGNUM = 40;
2003 tdep->RS_REGNUM = 43;
2004 tdep->RE_REGNUM = 44;
2005 tdep->SSR_REGNUM = 41;
2006 tdep->SPC_REGNUM = 42;
2007 break;
2008 case bfd_mach_sh4:
2009 sh_register_name = sh_sh4_register_name;
2010 sh_show_regs = sh4_show_regs;
2011 sh_store_return_value = sh3e_sh4_store_return_value;
2012 sh_register_virtual_type = sh_sh4_register_virtual_type;
2013 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2014 set_gdbarch_fp0_regnum (gdbarch, 25);
2015 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
2016 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
2017 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
2018 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2019 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
2020 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
2021 set_gdbarch_register_convert_to_raw (gdbarch, sh_sh4_register_convert_to_raw);
2022 set_gdbarch_register_convert_to_virtual (gdbarch, sh_sh4_register_convert_to_virtual);
2023 set_gdbarch_register_convertible (gdbarch, sh_sh4_register_convertible);
2024 tdep->FPUL_REGNUM = 23;
2025 tdep->FPSCR_REGNUM = 24;
2026 tdep->FP15_REGNUM = 40;
2027 tdep->SSR_REGNUM = 41;
2028 tdep->SPC_REGNUM = 42;
2029 tdep->DR0_REGNUM = 59;
2030 tdep->DR2_REGNUM = 60;
2031 tdep->DR4_REGNUM = 61;
2032 tdep->DR6_REGNUM = 62;
2033 tdep->DR8_REGNUM = 63;
2034 tdep->DR10_REGNUM = 64;
2035 tdep->DR12_REGNUM = 65;
2036 tdep->DR14_REGNUM = 66;
2037 tdep->FV0_REGNUM = 67;
2038 tdep->FV4_REGNUM = 68;
2039 tdep->FV8_REGNUM = 69;
2040 tdep->FV12_REGNUM = 70;
2041 break;
2042 default:
2043 sh_register_name = sh_generic_register_name;
2044 sh_show_regs = sh_generic_show_regs;
2045 sh_store_return_value = sh_default_store_return_value;
2046 sh_register_virtual_type = sh_default_register_virtual_type;
2047 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2048 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2049 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2050 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2051 break;
2052 }
2053
2054 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2055 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2056 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2057 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2058 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2059 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2060
2061 set_gdbarch_num_regs (gdbarch, 59);
2062 set_gdbarch_sp_regnum (gdbarch, 15);
2063 set_gdbarch_fp_regnum (gdbarch, 14);
2064 set_gdbarch_pc_regnum (gdbarch, 16);
2065 set_gdbarch_register_name (gdbarch, sh_register_name);
2066 set_gdbarch_register_size (gdbarch, 4);
2067 set_gdbarch_register_bytes (gdbarch, NUM_REGS * 4);
2068 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2069
2070 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2071 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2072 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2073 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2074 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2075 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2076 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2077 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
2078
2079 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2080 set_gdbarch_call_dummy_length (gdbarch, 0);
2081 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2082 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2083 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2084 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2085 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2086 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2087 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2088 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2089 set_gdbarch_call_dummy_p (gdbarch, 1);
2090 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2091 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2092 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2093 set_gdbarch_coerce_float_to_double (gdbarch,
2094 sh_coerce_float_to_double);
2095
2096 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
2097 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
2098 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2099 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2100
2101 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
2102 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2103 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2104 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2105 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2106 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
2107 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2108 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2109 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2110 set_gdbarch_function_start_offset (gdbarch, 0);
2111 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
2112
2113 set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register);
2114 set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register);
2115 set_gdbarch_frame_args_skip (gdbarch, 0);
2116 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2117 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
2118 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2119 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2120 set_gdbarch_frame_args_address (gdbarch, sh_frame_args_address);
2121 set_gdbarch_frame_locals_address (gdbarch, sh_frame_locals_address);
2122 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2123 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2124 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2125 set_gdbarch_ieee_float (gdbarch, 1);
2126
2127 return gdbarch;
2128 }
2129
2130 void
2131 _initialize_sh_tdep (void)
2132 {
2133 struct cmd_list_element *c;
2134
2135 register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2136 tm_print_insn = gdb_print_insn_sh;
2137
2138 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2139 }
GDB Binutils - Deliverables
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