1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 Contributed by Steve Chamberlain
37 #include "gdb_string.h"
38 #include "arch-utils.h"
39 #include "floatformat.h"
47 #include "solib-svr4.h"
51 /* registers numbers shared with the simulator */
52 #include "gdb/sim-sh.h"
54 static void (*sh_show_regs
) (void);
56 #define SH_DEFAULT_NUM_REGS 59
58 /* Define other aspects of the stack frame.
59 we keep a copy of the worked out return pc lying around, since it
60 is a useful bit of info */
62 struct frame_extra_info
70 sh_generic_register_name (int reg_nr
)
72 static char *register_names
[] =
74 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
75 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
76 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
78 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
79 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
81 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
82 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
86 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
88 return register_names
[reg_nr
];
92 sh_sh_register_name (int reg_nr
)
94 static char *register_names
[] =
96 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
97 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
98 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
100 "", "", "", "", "", "", "", "",
101 "", "", "", "", "", "", "", "",
103 "", "", "", "", "", "", "", "",
104 "", "", "", "", "", "", "", "",
108 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
110 return register_names
[reg_nr
];
114 sh_sh3_register_name (int reg_nr
)
116 static char *register_names
[] =
118 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
119 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
120 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
122 "", "", "", "", "", "", "", "",
123 "", "", "", "", "", "", "", "",
125 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
126 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
130 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
132 return register_names
[reg_nr
];
136 sh_sh3e_register_name (int reg_nr
)
138 static char *register_names
[] =
140 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
144 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
145 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
147 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
148 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
152 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
154 return register_names
[reg_nr
];
158 sh_sh2e_register_name (int reg_nr
)
160 static char *register_names
[] =
162 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
163 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
164 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
166 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
167 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
169 "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "",
174 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
176 return register_names
[reg_nr
];
180 sh_sh_dsp_register_name (int reg_nr
)
182 static char *register_names
[] =
184 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
185 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
186 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
188 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
189 "y0", "y1", "", "", "", "", "", "mod",
191 "rs", "re", "", "", "", "", "", "",
192 "", "", "", "", "", "", "", "",
196 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
198 return register_names
[reg_nr
];
202 sh_sh3_dsp_register_name (int reg_nr
)
204 static char *register_names
[] =
206 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
207 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
208 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
210 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
211 "y0", "y1", "", "", "", "", "", "mod",
213 "rs", "re", "", "", "", "", "", "",
214 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
215 "", "", "", "", "", "", "", "",
219 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
221 return register_names
[reg_nr
];
225 sh_sh4_register_name (int reg_nr
)
227 static char *register_names
[] =
229 /* general registers 0-15 */
230 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
231 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
233 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
236 /* floating point registers 25 - 40 */
237 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
238 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
242 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
244 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
245 /* double precision (pseudo) 59 - 66 */
246 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
247 /* vectors (pseudo) 67 - 70 */
248 "fv0", "fv4", "fv8", "fv12",
249 /* FIXME: missing XF 71 - 86 */
250 /* FIXME: missing XD 87 - 94 */
254 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
256 return register_names
[reg_nr
];
259 #define NUM_PSEUDO_REGS_SH_MEDIA 80
260 #define NUM_PSEUDO_REGS_SH_COMPACT 51
262 static const unsigned char *
263 sh_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
265 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
266 static unsigned char breakpoint
[] = {0xc3, 0xc3};
268 *lenptr
= sizeof (breakpoint
);
273 sh_push_dummy_code (struct gdbarch
*gdbarch
,
274 CORE_ADDR sp
, CORE_ADDR funaddr
, int using_gcc
,
275 struct value
**args
, int nargs
,
276 struct type
*value_type
,
277 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
279 /* Allocate space sufficient for a breakpoint. */
281 /* Store the address of that breakpoint */
283 /* sh always starts the call at the callee's entry point. */
288 /* Prologue looks like
289 [mov.l <regs>,@-r15]...
294 Actually it can be more complicated than this. For instance, with
312 /* STS.L PR,@-r15 0100111100100010
313 r15-4-->r15, PR-->(r15) */
314 #define IS_STS(x) ((x) == 0x4f22)
316 /* MOV.L Rm,@-r15 00101111mmmm0110
317 r15-4-->r15, Rm-->(R15) */
318 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
320 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
322 /* MOV r15,r14 0110111011110011
324 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
326 /* ADD #imm,r15 01111111iiiiiiii
328 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
330 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
331 #define IS_SHLL_R3(x) ((x) == 0x4300)
333 /* ADD r3,r15 0011111100111100
335 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
337 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
338 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
339 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
340 #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
342 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
343 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
344 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
345 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
346 #define IS_ARG_MOV(x) \
347 (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
348 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
349 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
351 /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
352 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
353 #define IS_MOV_TO_R14(x) \
354 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
356 #define FPSCR_SZ (1 << 20)
358 /* Skip any prologue before the guts of a function */
360 /* Skip the prologue using the debug information. If this fails we'll
361 fall back on the 'guess' method below. */
363 after_prologue (CORE_ADDR pc
)
365 struct symtab_and_line sal
;
366 CORE_ADDR func_addr
, func_end
;
368 /* If we can not find the symbol in the partial symbol table, then
369 there is no hope we can determine the function's start address
371 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
374 /* Get the line associated with FUNC_ADDR. */
375 sal
= find_pc_line (func_addr
, 0);
377 /* There are only two cases to consider. First, the end of the source line
378 is within the function bounds. In that case we return the end of the
379 source line. Second is the end of the source line extends beyond the
380 bounds of the current function. We need to use the slow code to
381 examine instructions in that case. */
382 if (sal
.end
< func_end
)
388 /* Here we look at each instruction in the function, and try to guess
389 where the prologue ends. Unfortunately this is not always
392 sh_skip_prologue_hard_way (CORE_ADDR start_pc
)
400 for (here
= start_pc
, end
= start_pc
+ (2 * 28); here
< end
;)
402 int w
= read_memory_integer (here
, 2);
404 if (IS_FMOV (w
) || IS_PUSH (w
) || IS_STS (w
) || IS_MOV_R3 (w
)
405 || IS_ADD_R3SP (w
) || IS_ADD_SP (w
) || IS_SHLL_R3 (w
)
406 || IS_ARG_MOV (w
) || IS_MOV_TO_R14 (w
))
410 else if (IS_MOV_SP_FP (w
))
416 /* Don't bail out yet, if we are before the copy of sp. */
425 sh_skip_prologue (CORE_ADDR pc
)
427 CORE_ADDR post_prologue_pc
;
429 /* See if we can determine the end of the prologue via the symbol table.
430 If so, then return either PC, or the PC after the prologue, whichever
432 post_prologue_pc
= after_prologue (pc
);
434 /* If after_prologue returned a useful address, then use it. Else
435 fall back on the instruction skipping code. */
436 if (post_prologue_pc
!= 0)
437 return max (pc
, post_prologue_pc
);
439 return sh_skip_prologue_hard_way (pc
);
442 /* Immediately after a function call, return the saved pc.
443 Can't always go through the frames for this because on some machines
444 the new frame is not set up until the new function executes
447 The return address is the value saved in the PR register + 4 */
449 sh_saved_pc_after_call (struct frame_info
*frame
)
451 return (ADDR_BITS_REMOVE (read_register (PR_REGNUM
)));
454 /* Should call_function allocate stack space for a struct return? */
456 sh_use_struct_convention (int gcc_p
, struct type
*type
)
459 return (TYPE_LENGTH (type
) > 1);
461 int len
= TYPE_LENGTH (type
);
462 int nelem
= TYPE_NFIELDS (type
);
463 return ((len
!= 1 && len
!= 2 && len
!= 4 && len
!= 8) || nelem
!= 1) &&
464 (len
!= 8 || TYPE_LENGTH (TYPE_FIELD_TYPE (type
, 0)) != 4);
468 /* Disassemble an instruction. */
470 gdb_print_insn_sh (bfd_vma memaddr
, disassemble_info
*info
)
472 info
->endian
= TARGET_BYTE_ORDER
;
473 return print_insn_sh (memaddr
, info
);
476 /* Given a GDB frame, determine the address of the calling function's
477 frame. This will be used to create a new GDB frame struct, and
478 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
479 will be called for the new frame.
481 For us, the frame address is its stack pointer value, so we look up
482 the function prologue to determine the caller's sp value, and return it. */
484 sh_frame_chain (struct frame_info
*frame
)
486 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
487 get_frame_base (frame
),
488 get_frame_base (frame
)))
489 return get_frame_base (frame
); /* dummy frame same as caller's frame */
490 if (get_frame_pc (frame
)
491 && !deprecated_inside_entry_file (get_frame_pc (frame
)))
492 return read_memory_integer (get_frame_base (frame
)
493 + get_frame_extra_info (frame
)->f_offset
, 4);
498 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
499 we might want to do here is to check REGNUM against the clobber mask, and
500 somehow flag it as invalid if it isn't saved on the stack somewhere. This
501 would provide a graceful failure mode when trying to get the value of
502 caller-saves registers for an inner frame. */
504 sh_find_callers_reg (struct frame_info
*fi
, int regnum
)
506 for (; fi
; fi
= get_next_frame (fi
))
507 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
508 get_frame_base (fi
)))
509 /* When the caller requests PR from the dummy frame, we return PC because
510 that's where the previous routine appears to have done a call from. */
511 return deprecated_read_register_dummy (get_frame_pc (fi
),
512 get_frame_base (fi
), regnum
);
515 DEPRECATED_FRAME_INIT_SAVED_REGS (fi
);
516 if (!get_frame_pc (fi
))
518 if (get_frame_saved_regs (fi
)[regnum
] != 0)
519 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
520 register_size (current_gdbarch
, regnum
));
522 return read_register (regnum
);
525 /* Put here the code to store, into a struct frame_saved_regs, the
526 addresses of the saved registers of frame described by FRAME_INFO.
527 This includes special registers such as pc and fp saved in special
528 ways in the stack frame. sp is even more special: the address we
529 return for it IS the sp for the next frame. */
531 sh_nofp_frame_init_saved_regs (struct frame_info
*fi
)
533 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof(int));
541 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
),
542 get_frame_base (fi
));
544 if (get_frame_saved_regs (fi
) == NULL
)
545 frame_saved_regs_zalloc (fi
);
547 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
551 /* DANGER! This is ONLY going to work if the char buffer format of
552 the saved registers is byte-for-byte identical to the
553 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
554 memcpy (get_frame_saved_regs (fi
), dummy_regs
, SIZEOF_FRAME_SAVED_REGS
);
558 get_frame_extra_info (fi
)->leaf_function
= 1;
559 get_frame_extra_info (fi
)->f_offset
= 0;
561 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
566 /* Loop around examining the prologue insns until we find something
567 that does not appear to be part of the prologue. But give up
568 after 20 of them, since we're getting silly then. */
570 pc
= get_frame_func (fi
);
573 deprecated_update_frame_pc_hack (fi
, 0);
577 for (opc
= pc
+ (2 * 28); pc
< opc
; pc
+= 2)
579 insn
= read_memory_integer (pc
, 2);
580 /* See where the registers will be saved to */
583 rn
= GET_PUSHED_REG (insn
);
587 else if (IS_STS (insn
))
589 where
[PR_REGNUM
] = depth
;
590 /* If we're storing the pr then this isn't a leaf */
591 get_frame_extra_info (fi
)->leaf_function
= 0;
594 else if (IS_MOV_R3 (insn
))
596 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
598 else if (IS_SHLL_R3 (insn
))
602 else if (IS_ADD_R3SP (insn
))
606 else if (IS_ADD_SP (insn
))
608 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
610 else if (IS_MOV_SP_FP (insn
))
612 #if 0 /* This used to just stop when it found an instruction that
613 was not considered part of the prologue. Now, we just
614 keep going looking for likely instructions. */
620 /* Now we know how deep things are, we can work out their addresses */
622 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
626 if (rn
== DEPRECATED_FP_REGNUM
)
629 get_frame_saved_regs (fi
)[rn
] = get_frame_base (fi
) - where
[rn
] + depth
- 4;
633 get_frame_saved_regs (fi
)[rn
] = 0;
639 get_frame_saved_regs (fi
)[SP_REGNUM
] = read_memory_integer (get_frame_saved_regs (fi
)[DEPRECATED_FP_REGNUM
], 4);
643 get_frame_saved_regs (fi
)[SP_REGNUM
] = get_frame_base (fi
) - 4;
646 get_frame_extra_info (fi
)->f_offset
= depth
- where
[DEPRECATED_FP_REGNUM
] - 4;
647 /* Work out the return pc - either from the saved pr or the pr
651 /* For vectors of 4 floating point registers. */
653 fv_reg_base_num (int fv_regnum
)
657 fp_regnum
= FP0_REGNUM
+
658 (fv_regnum
- gdbarch_tdep (current_gdbarch
)->FV0_REGNUM
) * 4;
662 /* For double precision floating point registers, i.e 2 fp regs.*/
664 dr_reg_base_num (int dr_regnum
)
668 fp_regnum
= FP0_REGNUM
+
669 (dr_regnum
- gdbarch_tdep (current_gdbarch
)->DR0_REGNUM
) * 2;
674 sh_fp_frame_init_saved_regs (struct frame_info
*fi
)
676 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof (int));
684 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
), get_frame_base (fi
));
685 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
687 if (get_frame_saved_regs (fi
) == NULL
)
688 frame_saved_regs_zalloc (fi
);
690 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
694 /* DANGER! This is ONLY going to work if the char buffer format of
695 the saved registers is byte-for-byte identical to the
696 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
697 memcpy (get_frame_saved_regs (fi
), dummy_regs
, SIZEOF_FRAME_SAVED_REGS
);
701 get_frame_extra_info (fi
)->leaf_function
= 1;
702 get_frame_extra_info (fi
)->f_offset
= 0;
704 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
709 /* Loop around examining the prologue insns until we find something
710 that does not appear to be part of the prologue. But give up
711 after 20 of them, since we're getting silly then. */
713 pc
= get_frame_func (fi
);
716 deprecated_update_frame_pc_hack (fi
, 0);
720 for (opc
= pc
+ (2 * 28); pc
< opc
; pc
+= 2)
722 insn
= read_memory_integer (pc
, 2);
723 /* See where the registers will be saved to */
726 rn
= GET_PUSHED_REG (insn
);
730 else if (IS_STS (insn
))
732 where
[PR_REGNUM
] = depth
;
733 /* If we're storing the pr then this isn't a leaf */
734 get_frame_extra_info (fi
)->leaf_function
= 0;
737 else if (IS_MOV_R3 (insn
))
739 r3_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
741 else if (IS_SHLL_R3 (insn
))
745 else if (IS_ADD_R3SP (insn
))
749 else if (IS_ADD_SP (insn
))
751 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
753 else if (IS_FMOV (insn
))
755 if (read_register (tdep
->FPSCR_REGNUM
) & FPSCR_SZ
)
764 else if (IS_MOV_SP_FP (insn
))
766 #if 0 /* This used to just stop when it found an instruction that
767 was not considered part of the prologue. Now, we just
768 keep going looking for likely instructions. */
774 /* Now we know how deep things are, we can work out their addresses */
776 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
780 if (rn
== DEPRECATED_FP_REGNUM
)
783 get_frame_saved_regs (fi
)[rn
] = get_frame_base (fi
) - where
[rn
] + depth
- 4;
787 get_frame_saved_regs (fi
)[rn
] = 0;
793 get_frame_saved_regs (fi
)[SP_REGNUM
] =
794 read_memory_integer (get_frame_saved_regs (fi
)[DEPRECATED_FP_REGNUM
], 4);
798 get_frame_saved_regs (fi
)[SP_REGNUM
] = get_frame_base (fi
) - 4;
801 get_frame_extra_info (fi
)->f_offset
= depth
- where
[DEPRECATED_FP_REGNUM
] - 4;
802 /* Work out the return pc - either from the saved pr or the pr
806 /* Initialize the extra info saved in a FRAME */
808 sh_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
811 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
813 if (get_next_frame (fi
))
814 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
816 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
817 get_frame_base (fi
)))
819 /* We need to setup fi->frame here because call_function_by_hand
820 gets it wrong by assuming it's always FP. */
821 deprecated_update_frame_base_hack (fi
, deprecated_read_register_dummy (get_frame_pc (fi
), get_frame_base (fi
),
823 get_frame_extra_info (fi
)->return_pc
= deprecated_read_register_dummy (get_frame_pc (fi
),
826 get_frame_extra_info (fi
)->f_offset
= -(DEPRECATED_CALL_DUMMY_LENGTH
+ 4);
827 get_frame_extra_info (fi
)->leaf_function
= 0;
832 DEPRECATED_FRAME_INIT_SAVED_REGS (fi
);
833 get_frame_extra_info (fi
)->return_pc
=
834 sh_find_callers_reg (fi
, PR_REGNUM
);
838 /* Extract from an array REGBUF containing the (raw) register state
839 the address in which a function should return its structure value,
840 as a CORE_ADDR (or an expression that can be used as one). */
842 sh_extract_struct_value_address (struct regcache
*regcache
)
845 /*FIXME: Is R0 really correct here? Not STRUCT_RETURN_REGNUM? */
846 regcache_cooked_read_unsigned (regcache
, STRUCT_RETURN_REGNUM
, &addr
);
851 sh_frame_saved_pc (struct frame_info
*frame
)
853 return (get_frame_extra_info (frame
)->return_pc
);
856 /* Discard from the stack the innermost frame,
857 restoring all saved registers. */
861 register struct frame_info
*frame
= get_current_frame ();
862 register CORE_ADDR fp
;
865 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
866 get_frame_base (frame
),
867 get_frame_base (frame
)))
868 generic_pop_dummy_frame ();
871 fp
= get_frame_base (frame
);
872 DEPRECATED_FRAME_INIT_SAVED_REGS (frame
);
874 /* Copy regs from where they were saved in the frame */
875 for (regnum
= 0; regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
; regnum
++)
876 if (get_frame_saved_regs (frame
)[regnum
])
877 write_register (regnum
,
878 read_memory_integer (get_frame_saved_regs (frame
)[regnum
], 4));
880 write_register (PC_REGNUM
, get_frame_extra_info (frame
)->return_pc
);
881 write_register (SP_REGNUM
, fp
+ 4);
883 flush_cached_frames ();
887 sh_frame_align (struct gdbarch
*ignore
, CORE_ADDR sp
)
892 /* Function: push_dummy_call (formerly push_arguments)
893 Setup the function arguments for calling a function in the inferior.
895 On the Hitachi SH architecture, there are four registers (R4 to R7)
896 which are dedicated for passing function arguments. Up to the first
897 four arguments (depending on size) may go into these registers.
898 The rest go on the stack.
900 MVS: Except on SH variants that have floating point registers.
901 In that case, float and double arguments are passed in the same
902 manner, but using FP registers instead of GP registers.
904 Arguments that are smaller than 4 bytes will still take up a whole
905 register or a whole 32-bit word on the stack, and will be
906 right-justified in the register or the stack word. This includes
907 chars, shorts, and small aggregate types.
909 Arguments that are larger than 4 bytes may be split between two or
910 more registers. If there are not enough registers free, an argument
911 may be passed partly in a register (or registers), and partly on the
912 stack. This includes doubles, long longs, and larger aggregates.
913 As far as I know, there is no upper limit to the size of aggregates
914 that will be passed in this way; in other words, the convention of
915 passing a pointer to a large aggregate instead of a copy is not used.
917 MVS: The above appears to be true for the SH variants that do not
918 have an FPU, however those that have an FPU appear to copy the
919 aggregate argument onto the stack (and not place it in registers)
920 if it is larger than 16 bytes (four GP registers).
922 An exceptional case exists for struct arguments (and possibly other
923 aggregates such as arrays) if the size is larger than 4 bytes but
924 not a multiple of 4 bytes. In this case the argument is never split
925 between the registers and the stack, but instead is copied in its
926 entirety onto the stack, AND also copied into as many registers as
927 there is room for. In other words, space in registers permitting,
928 two copies of the same argument are passed in. As far as I can tell,
929 only the one on the stack is used, although that may be a function
930 of the level of compiler optimization. I suspect this is a compiler
931 bug. Arguments of these odd sizes are left-justified within the
932 word (as opposed to arguments smaller than 4 bytes, which are
935 If the function is to return an aggregate type such as a struct, it
936 is either returned in the normal return value register R0 (if its
937 size is no greater than one byte), or else the caller must allocate
938 space into which the callee will copy the return value (if the size
939 is greater than one byte). In this case, a pointer to the return
940 value location is passed into the callee in register R2, which does
941 not displace any of the other arguments passed in via registers R4
945 sh_push_dummy_call_fpu (struct gdbarch
*gdbarch
,
947 struct regcache
*regcache
,
948 CORE_ADDR bp_addr
, int nargs
,
950 CORE_ADDR sp
, int struct_return
,
951 CORE_ADDR struct_addr
)
953 int stack_offset
, stack_alloc
;
954 int argreg
, flt_argreg
;
961 int odd_sized_struct
;
962 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
964 /* first force sp to a 4-byte alignment */
965 sp
= sh_frame_align (gdbarch
, sp
);
967 /* The "struct return pointer" pseudo-argument has its own dedicated
970 regcache_cooked_write_unsigned (regcache
,
971 STRUCT_RETURN_REGNUM
,
974 /* Now make sure there's space on the stack */
975 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
976 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
977 sp
-= stack_alloc
; /* make room on stack for args */
979 /* Now load as many as possible of the first arguments into
980 registers, and push the rest onto the stack. There are 16 bytes
981 in four registers available. Loop thru args from first to last. */
983 argreg
= ARG0_REGNUM
;
984 flt_argreg
= FLOAT_ARG0_REGNUM
;
985 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
987 type
= VALUE_TYPE (args
[argnum
]);
988 len
= TYPE_LENGTH (type
);
989 memset (valbuf
, 0, sizeof (valbuf
));
992 /* value gets right-justified in the register or stack word */
993 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
994 memcpy (valbuf
+ (4 - len
),
995 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
997 memcpy (valbuf
, (char *) VALUE_CONTENTS (args
[argnum
]), len
);
1001 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1003 if (len
> 4 && (len
& 3) != 0)
1004 odd_sized_struct
= 1; /* Such structs go entirely on stack. */
1006 odd_sized_struct
= 1; /* So do aggregates bigger than 4 words. */
1008 odd_sized_struct
= 0;
1011 if ((TYPE_CODE (type
) == TYPE_CODE_FLT
1012 && flt_argreg
> FLOAT_ARGLAST_REGNUM
)
1013 || argreg
> ARGLAST_REGNUM
1014 || odd_sized_struct
)
1016 /* must go on the stack */
1017 write_memory (sp
+ stack_offset
, val
, 4);
1020 /* NOTE WELL!!!!! This is not an "else if" clause!!!
1021 That's because some *&^%$ things get passed on the stack
1022 AND in the registers! */
1023 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&&
1024 flt_argreg
> 0 && flt_argreg
<= FLOAT_ARGLAST_REGNUM
)
1026 /* Argument goes in a single-precision fp reg. */
1027 regval
= extract_unsigned_integer (val
, register_size (gdbarch
,
1029 regcache_cooked_write_unsigned (regcache
, flt_argreg
++, regval
);
1031 else if (argreg
<= ARGLAST_REGNUM
)
1033 /* there's room in a register */
1034 regval
= extract_unsigned_integer (val
, register_size (gdbarch
,
1036 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
1038 /* Store the value 4 bytes at a time. This means that things
1039 larger than 4 bytes may go partly in registers and partly
1041 len
-= register_size (gdbarch
, argreg
);
1042 val
+= register_size (gdbarch
, argreg
);
1046 /* Store return address. */
1047 regcache_cooked_write_unsigned (regcache
, PR_REGNUM
, bp_addr
);
1049 /* Update stack pointer. */
1050 regcache_cooked_write_unsigned (regcache
, SP_REGNUM
, sp
);
1056 sh_push_dummy_call_nofpu (struct gdbarch
*gdbarch
,
1057 CORE_ADDR func_addr
,
1058 struct regcache
*regcache
,
1060 int nargs
, struct value
**args
,
1061 CORE_ADDR sp
, int struct_return
,
1062 CORE_ADDR struct_addr
)
1064 int stack_offset
, stack_alloc
;
1072 int odd_sized_struct
;
1073 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1075 /* first force sp to a 4-byte alignment */
1076 sp
= sh_frame_align (gdbarch
, sp
);
1078 /* The "struct return pointer" pseudo-argument has its own dedicated
1081 regcache_cooked_write_unsigned (regcache
,
1082 STRUCT_RETURN_REGNUM
,
1085 /* Now make sure there's space on the stack */
1086 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
1087 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
1088 sp
-= stack_alloc
; /* make room on stack for args */
1090 /* Now load as many as possible of the first arguments into
1091 registers, and push the rest onto the stack. There are 16 bytes
1092 in four registers available. Loop thru args from first to last. */
1094 argreg
= ARG0_REGNUM
;
1095 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
1097 type
= VALUE_TYPE (args
[argnum
]);
1098 len
= TYPE_LENGTH (type
);
1099 memset (valbuf
, 0, sizeof (valbuf
));
1102 /* value gets right-justified in the register or stack word */
1103 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1104 memcpy (valbuf
+ (4 - len
),
1105 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
1107 memcpy (valbuf
, (char *) VALUE_CONTENTS (args
[argnum
]), len
);
1111 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1113 if (len
> 4 && (len
& 3) != 0)
1114 odd_sized_struct
= 1; /* such structs go entirely on stack */
1116 odd_sized_struct
= 0;
1119 if (argreg
> ARGLAST_REGNUM
1120 || odd_sized_struct
)
1122 /* must go on the stack */
1123 write_memory (sp
+ stack_offset
, val
, 4);
1126 /* NOTE WELL!!!!! This is not an "else if" clause!!!
1127 That's because some *&^%$ things get passed on the stack
1128 AND in the registers! */
1129 if (argreg
<= ARGLAST_REGNUM
)
1131 /* there's room in a register */
1132 regval
= extract_unsigned_integer (val
, register_size (gdbarch
,
1134 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
1136 /* Store the value 4 bytes at a time. This means that things
1137 larger than 4 bytes may go partly in registers and partly
1139 len
-= register_size (gdbarch
, argreg
);
1140 val
+= register_size (gdbarch
, argreg
);
1144 /* Store return address. */
1145 regcache_cooked_write_unsigned (regcache
, PR_REGNUM
, bp_addr
);
1147 /* Update stack pointer. */
1148 regcache_cooked_write_unsigned (regcache
, SP_REGNUM
, sp
);
1153 /* Find a function's return value in the appropriate registers (in
1154 regbuf), and copy it into valbuf. Extract from an array REGBUF
1155 containing the (raw) register state a function return value of type
1156 TYPE, and copy that, in virtual format, into VALBUF. */
1158 sh_default_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1161 int len
= TYPE_LENGTH (type
);
1162 int return_register
= R0_REGNUM
;
1169 regcache_cooked_read_unsigned (regcache
, R0_REGNUM
, &c
);
1170 store_unsigned_integer (valbuf
, len
, c
);
1174 int i
, regnum
= R0_REGNUM
;
1175 for (i
= 0; i
< len
; i
+= 4)
1176 regcache_raw_read (regcache
, regnum
++, (char *)valbuf
+ i
);
1179 error ("bad size for return value");
1183 sh3e_sh4_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1186 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1188 int len
= TYPE_LENGTH (type
);
1189 int i
, regnum
= FP0_REGNUM
;
1190 for (i
= 0; i
< len
; i
+= 4)
1191 regcache_raw_read (regcache
, regnum
++, (char *)valbuf
+ i
);
1194 sh_default_extract_return_value (type
, regcache
, valbuf
);
1197 /* Write into appropriate registers a function return value
1198 of type TYPE, given in virtual format.
1199 If the architecture is sh4 or sh3e, store a function's return value
1200 in the R0 general register or in the FP0 floating point register,
1201 depending on the type of the return value. In all the other cases
1202 the result is stored in r0, left-justified. */
1204 sh_default_store_return_value (struct type
*type
, struct regcache
*regcache
,
1208 int len
= TYPE_LENGTH (type
);
1212 val
= extract_unsigned_integer (valbuf
, len
);
1213 regcache_cooked_write_unsigned (regcache
, R0_REGNUM
, val
);
1217 int i
, regnum
= R0_REGNUM
;
1218 for (i
= 0; i
< len
; i
+= 4)
1219 regcache_raw_write (regcache
, regnum
++, (char *)valbuf
+ i
);
1224 sh3e_sh4_store_return_value (struct type
*type
, struct regcache
*regcache
,
1227 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1229 int len
= TYPE_LENGTH (type
);
1230 int i
, regnum
= FP0_REGNUM
;
1231 for (i
= 0; i
< len
; i
+= 4)
1232 regcache_raw_write (regcache
, regnum
++, (char *)valbuf
+ i
);
1235 sh_default_store_return_value (type
, regcache
, valbuf
);
1238 /* Print the registers in a form similar to the E7000 */
1241 sh_generic_show_regs (void)
1243 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1245 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1246 paddr (read_register (PC_REGNUM
)),
1247 (long) read_register (SR_REGNUM
),
1248 (long) read_register (PR_REGNUM
),
1249 (long) read_register (MACH_REGNUM
),
1250 (long) read_register (MACL_REGNUM
));
1252 printf_filtered ("GBR=%08lx VBR=%08lx",
1253 (long) read_register (GBR_REGNUM
),
1254 (long) read_register (VBR_REGNUM
));
1256 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1257 (long) read_register (0),
1258 (long) read_register (1),
1259 (long) read_register (2),
1260 (long) read_register (3),
1261 (long) read_register (4),
1262 (long) read_register (5),
1263 (long) read_register (6),
1264 (long) read_register (7));
1265 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1266 (long) read_register (8),
1267 (long) read_register (9),
1268 (long) read_register (10),
1269 (long) read_register (11),
1270 (long) read_register (12),
1271 (long) read_register (13),
1272 (long) read_register (14),
1273 (long) read_register (15));
1277 sh3_show_regs (void)
1279 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1281 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1282 paddr (read_register (PC_REGNUM
)),
1283 (long) read_register (SR_REGNUM
),
1284 (long) read_register (PR_REGNUM
),
1285 (long) read_register (MACH_REGNUM
),
1286 (long) read_register (MACL_REGNUM
));
1288 printf_filtered ("GBR=%08lx VBR=%08lx",
1289 (long) read_register (GBR_REGNUM
),
1290 (long) read_register (VBR_REGNUM
));
1291 printf_filtered (" SSR=%08lx SPC=%08lx",
1292 (long) read_register (tdep
->SSR_REGNUM
),
1293 (long) read_register (tdep
->SPC_REGNUM
));
1295 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1296 (long) read_register (0),
1297 (long) read_register (1),
1298 (long) read_register (2),
1299 (long) read_register (3),
1300 (long) read_register (4),
1301 (long) read_register (5),
1302 (long) read_register (6),
1303 (long) read_register (7));
1304 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1305 (long) read_register (8),
1306 (long) read_register (9),
1307 (long) read_register (10),
1308 (long) read_register (11),
1309 (long) read_register (12),
1310 (long) read_register (13),
1311 (long) read_register (14),
1312 (long) read_register (15));
1317 sh2e_show_regs (void)
1319 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1320 paddr (read_register (PC_REGNUM
)),
1321 (long) read_register (SR_REGNUM
),
1322 (long) read_register (PR_REGNUM
),
1323 (long) read_register (MACH_REGNUM
),
1324 (long) read_register (MACL_REGNUM
));
1326 printf_filtered ("GBR=%08lx VBR=%08lx",
1327 (long) read_register (GBR_REGNUM
),
1328 (long) read_register (VBR_REGNUM
));
1329 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1330 (long) read_register (gdbarch_tdep (current_gdbarch
)->FPUL_REGNUM
),
1331 (long) read_register (gdbarch_tdep (current_gdbarch
)->FPSCR_REGNUM
));
1333 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1334 (long) read_register (0),
1335 (long) read_register (1),
1336 (long) read_register (2),
1337 (long) read_register (3),
1338 (long) read_register (4),
1339 (long) read_register (5),
1340 (long) read_register (6),
1341 (long) read_register (7));
1342 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1343 (long) read_register (8),
1344 (long) read_register (9),
1345 (long) read_register (10),
1346 (long) read_register (11),
1347 (long) read_register (12),
1348 (long) read_register (13),
1349 (long) read_register (14),
1350 (long) read_register (15));
1352 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1353 (long) read_register (FP0_REGNUM
+ 0),
1354 (long) read_register (FP0_REGNUM
+ 1),
1355 (long) read_register (FP0_REGNUM
+ 2),
1356 (long) read_register (FP0_REGNUM
+ 3),
1357 (long) read_register (FP0_REGNUM
+ 4),
1358 (long) read_register (FP0_REGNUM
+ 5),
1359 (long) read_register (FP0_REGNUM
+ 6),
1360 (long) read_register (FP0_REGNUM
+ 7));
1361 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1362 (long) read_register (FP0_REGNUM
+ 8),
1363 (long) read_register (FP0_REGNUM
+ 9),
1364 (long) read_register (FP0_REGNUM
+ 10),
1365 (long) read_register (FP0_REGNUM
+ 11),
1366 (long) read_register (FP0_REGNUM
+ 12),
1367 (long) read_register (FP0_REGNUM
+ 13),
1368 (long) read_register (FP0_REGNUM
+ 14),
1369 (long) read_register (FP0_REGNUM
+ 15));
1373 sh3e_show_regs (void)
1375 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1377 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1378 paddr (read_register (PC_REGNUM
)),
1379 (long) read_register (SR_REGNUM
),
1380 (long) read_register (PR_REGNUM
),
1381 (long) read_register (MACH_REGNUM
),
1382 (long) read_register (MACL_REGNUM
));
1384 printf_filtered ("GBR=%08lx VBR=%08lx",
1385 (long) read_register (GBR_REGNUM
),
1386 (long) read_register (VBR_REGNUM
));
1387 printf_filtered (" SSR=%08lx SPC=%08lx",
1388 (long) read_register (tdep
->SSR_REGNUM
),
1389 (long) read_register (tdep
->SPC_REGNUM
));
1390 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1391 (long) read_register (tdep
->FPUL_REGNUM
),
1392 (long) read_register (tdep
->FPSCR_REGNUM
));
1394 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1395 (long) read_register (0),
1396 (long) read_register (1),
1397 (long) read_register (2),
1398 (long) read_register (3),
1399 (long) read_register (4),
1400 (long) read_register (5),
1401 (long) read_register (6),
1402 (long) read_register (7));
1403 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1404 (long) read_register (8),
1405 (long) read_register (9),
1406 (long) read_register (10),
1407 (long) read_register (11),
1408 (long) read_register (12),
1409 (long) read_register (13),
1410 (long) read_register (14),
1411 (long) read_register (15));
1413 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1414 (long) read_register (FP0_REGNUM
+ 0),
1415 (long) read_register (FP0_REGNUM
+ 1),
1416 (long) read_register (FP0_REGNUM
+ 2),
1417 (long) read_register (FP0_REGNUM
+ 3),
1418 (long) read_register (FP0_REGNUM
+ 4),
1419 (long) read_register (FP0_REGNUM
+ 5),
1420 (long) read_register (FP0_REGNUM
+ 6),
1421 (long) read_register (FP0_REGNUM
+ 7));
1422 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1423 (long) read_register (FP0_REGNUM
+ 8),
1424 (long) read_register (FP0_REGNUM
+ 9),
1425 (long) read_register (FP0_REGNUM
+ 10),
1426 (long) read_register (FP0_REGNUM
+ 11),
1427 (long) read_register (FP0_REGNUM
+ 12),
1428 (long) read_register (FP0_REGNUM
+ 13),
1429 (long) read_register (FP0_REGNUM
+ 14),
1430 (long) read_register (FP0_REGNUM
+ 15));
1434 sh3_dsp_show_regs (void)
1436 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1438 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1439 paddr (read_register (PC_REGNUM
)),
1440 (long) read_register (SR_REGNUM
),
1441 (long) read_register (PR_REGNUM
),
1442 (long) read_register (MACH_REGNUM
),
1443 (long) read_register (MACL_REGNUM
));
1445 printf_filtered ("GBR=%08lx VBR=%08lx",
1446 (long) read_register (GBR_REGNUM
),
1447 (long) read_register (VBR_REGNUM
));
1449 printf_filtered (" SSR=%08lx SPC=%08lx",
1450 (long) read_register (tdep
->SSR_REGNUM
),
1451 (long) read_register (tdep
->SPC_REGNUM
));
1453 printf_filtered (" DSR=%08lx",
1454 (long) read_register (tdep
->DSR_REGNUM
));
1456 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1457 (long) read_register (0),
1458 (long) read_register (1),
1459 (long) read_register (2),
1460 (long) read_register (3),
1461 (long) read_register (4),
1462 (long) read_register (5),
1463 (long) read_register (6),
1464 (long) read_register (7));
1465 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1466 (long) read_register (8),
1467 (long) read_register (9),
1468 (long) read_register (10),
1469 (long) read_register (11),
1470 (long) read_register (12),
1471 (long) read_register (13),
1472 (long) read_register (14),
1473 (long) read_register (15));
1475 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1476 (long) read_register (tdep
->A0G_REGNUM
) & 0xff,
1477 (long) read_register (tdep
->A0_REGNUM
),
1478 (long) read_register (tdep
->M0_REGNUM
),
1479 (long) read_register (tdep
->X0_REGNUM
),
1480 (long) read_register (tdep
->Y0_REGNUM
),
1481 (long) read_register (tdep
->RS_REGNUM
),
1482 (long) read_register (tdep
->MOD_REGNUM
));
1483 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1484 (long) read_register (tdep
->A1G_REGNUM
) & 0xff,
1485 (long) read_register (tdep
->A1_REGNUM
),
1486 (long) read_register (tdep
->M1_REGNUM
),
1487 (long) read_register (tdep
->X1_REGNUM
),
1488 (long) read_register (tdep
->Y1_REGNUM
),
1489 (long) read_register (tdep
->RE_REGNUM
));
1493 sh4_show_regs (void)
1495 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1497 int pr
= read_register (tdep
->FPSCR_REGNUM
) & 0x80000;
1498 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1499 paddr (read_register (PC_REGNUM
)),
1500 (long) read_register (SR_REGNUM
),
1501 (long) read_register (PR_REGNUM
),
1502 (long) read_register (MACH_REGNUM
),
1503 (long) read_register (MACL_REGNUM
));
1505 printf_filtered ("GBR=%08lx VBR=%08lx",
1506 (long) read_register (GBR_REGNUM
),
1507 (long) read_register (VBR_REGNUM
));
1508 printf_filtered (" SSR=%08lx SPC=%08lx",
1509 (long) read_register (tdep
->SSR_REGNUM
),
1510 (long) read_register (tdep
->SPC_REGNUM
));
1511 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1512 (long) read_register (tdep
->FPUL_REGNUM
),
1513 (long) read_register (tdep
->FPSCR_REGNUM
));
1515 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1516 (long) read_register (0),
1517 (long) read_register (1),
1518 (long) read_register (2),
1519 (long) read_register (3),
1520 (long) read_register (4),
1521 (long) read_register (5),
1522 (long) read_register (6),
1523 (long) read_register (7));
1524 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1525 (long) read_register (8),
1526 (long) read_register (9),
1527 (long) read_register (10),
1528 (long) read_register (11),
1529 (long) read_register (12),
1530 (long) read_register (13),
1531 (long) read_register (14),
1532 (long) read_register (15));
1534 printf_filtered ((pr
1535 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1536 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1537 (long) read_register (FP0_REGNUM
+ 0),
1538 (long) read_register (FP0_REGNUM
+ 1),
1539 (long) read_register (FP0_REGNUM
+ 2),
1540 (long) read_register (FP0_REGNUM
+ 3),
1541 (long) read_register (FP0_REGNUM
+ 4),
1542 (long) read_register (FP0_REGNUM
+ 5),
1543 (long) read_register (FP0_REGNUM
+ 6),
1544 (long) read_register (FP0_REGNUM
+ 7));
1545 printf_filtered ((pr
1546 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1547 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1548 (long) read_register (FP0_REGNUM
+ 8),
1549 (long) read_register (FP0_REGNUM
+ 9),
1550 (long) read_register (FP0_REGNUM
+ 10),
1551 (long) read_register (FP0_REGNUM
+ 11),
1552 (long) read_register (FP0_REGNUM
+ 12),
1553 (long) read_register (FP0_REGNUM
+ 13),
1554 (long) read_register (FP0_REGNUM
+ 14),
1555 (long) read_register (FP0_REGNUM
+ 15));
1559 sh_dsp_show_regs (void)
1561 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1563 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1564 paddr (read_register (PC_REGNUM
)),
1565 (long) read_register (SR_REGNUM
),
1566 (long) read_register (PR_REGNUM
),
1567 (long) read_register (MACH_REGNUM
),
1568 (long) read_register (MACL_REGNUM
));
1570 printf_filtered ("GBR=%08lx VBR=%08lx",
1571 (long) read_register (GBR_REGNUM
),
1572 (long) read_register (VBR_REGNUM
));
1574 printf_filtered (" DSR=%08lx",
1575 (long) read_register (tdep
->DSR_REGNUM
));
1577 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1578 (long) read_register (0),
1579 (long) read_register (1),
1580 (long) read_register (2),
1581 (long) read_register (3),
1582 (long) read_register (4),
1583 (long) read_register (5),
1584 (long) read_register (6),
1585 (long) read_register (7));
1586 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1587 (long) read_register (8),
1588 (long) read_register (9),
1589 (long) read_register (10),
1590 (long) read_register (11),
1591 (long) read_register (12),
1592 (long) read_register (13),
1593 (long) read_register (14),
1594 (long) read_register (15));
1596 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1597 (long) read_register (tdep
->A0G_REGNUM
) & 0xff,
1598 (long) read_register (tdep
->A0_REGNUM
),
1599 (long) read_register (tdep
->M0_REGNUM
),
1600 (long) read_register (tdep
->X0_REGNUM
),
1601 (long) read_register (tdep
->Y0_REGNUM
),
1602 (long) read_register (tdep
->RS_REGNUM
),
1603 (long) read_register (tdep
->MOD_REGNUM
));
1604 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1605 (long) read_register (tdep
->A1G_REGNUM
) & 0xff,
1606 (long) read_register (tdep
->A1_REGNUM
),
1607 (long) read_register (tdep
->M1_REGNUM
),
1608 (long) read_register (tdep
->X1_REGNUM
),
1609 (long) read_register (tdep
->Y1_REGNUM
),
1610 (long) read_register (tdep
->RE_REGNUM
));
1614 sh_show_regs_command (char *args
, int from_tty
)
1620 /* Return the GDB type object for the "standard" data type
1621 of data in register N. */
1622 static struct type
*
1623 sh_sh3e_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
1625 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1627 if ((reg_nr
>= FP0_REGNUM
1628 && (reg_nr
<= tdep
->FP_LAST_REGNUM
))
1629 || (reg_nr
== tdep
->FPUL_REGNUM
))
1630 return builtin_type_float
;
1632 return builtin_type_int
;
1635 static struct type
*
1636 sh_sh4_build_float_register_type (int high
)
1640 temp
= create_range_type (NULL
, builtin_type_int
, 0, high
);
1641 return create_array_type (NULL
, builtin_type_float
, temp
);
1644 static struct type
*
1645 sh_sh4_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
1647 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1649 if ((reg_nr
>= FP0_REGNUM
1650 && (reg_nr
<= tdep
->FP_LAST_REGNUM
))
1651 || (reg_nr
== tdep
->FPUL_REGNUM
))
1652 return builtin_type_float
;
1653 else if (reg_nr
>= tdep
->DR0_REGNUM
1654 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
1655 return builtin_type_double
;
1656 else if (reg_nr
>= tdep
->FV0_REGNUM
1657 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
1658 return sh_sh4_build_float_register_type (3);
1660 return builtin_type_int
;
1663 static struct type
*
1664 sh_default_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
1666 return builtin_type_int
;
1669 /* On the sh4, the DRi pseudo registers are problematic if the target
1670 is little endian. When the user writes one of those registers, for
1671 instance with 'ser var $dr0=1', we want the double to be stored
1673 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1674 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1676 This corresponds to little endian byte order & big endian word
1677 order. However if we let gdb write the register w/o conversion, it
1678 will write fr0 and fr1 this way:
1679 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1680 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1681 because it will consider fr0 and fr1 as a single LE stretch of memory.
1683 To achieve what we want we must force gdb to store things in
1684 floatformat_ieee_double_littlebyte_bigword (which is defined in
1685 include/floatformat.h and libiberty/floatformat.c.
1687 In case the target is big endian, there is no problem, the
1688 raw bytes will look like:
1689 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1690 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1692 The other pseudo registers (the FVs) also don't pose a problem
1693 because they are stored as 4 individual FP elements. */
1696 sh_sh4_register_convert_to_virtual (int regnum
, struct type
*type
,
1697 char *from
, char *to
)
1699 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1701 if (regnum
>= tdep
->DR0_REGNUM
1702 && regnum
<= tdep
->DR_LAST_REGNUM
)
1705 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
, from
, &val
);
1706 store_typed_floating (to
, type
, val
);
1709 error ("sh_register_convert_to_virtual called with non DR register number");
1713 sh_sh4_register_convert_to_raw (struct type
*type
, int regnum
,
1714 const void *from
, void *to
)
1716 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1718 if (regnum
>= tdep
->DR0_REGNUM
1719 && regnum
<= tdep
->DR_LAST_REGNUM
)
1721 DOUBLEST val
= extract_typed_floating (from
, type
);
1722 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword
, &val
, to
);
1725 error("sh_register_convert_to_raw called with non DR register number");
1729 sh_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1730 int reg_nr
, void *buffer
)
1732 int base_regnum
, portion
;
1733 char temp_buffer
[MAX_REGISTER_SIZE
];
1734 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1736 if (reg_nr
>= tdep
->DR0_REGNUM
1737 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
1739 base_regnum
= dr_reg_base_num (reg_nr
);
1741 /* Build the value in the provided buffer. */
1742 /* Read the real regs for which this one is an alias. */
1743 for (portion
= 0; portion
< 2; portion
++)
1744 regcache_raw_read (regcache
, base_regnum
+ portion
,
1746 + register_size (gdbarch
, base_regnum
) * portion
));
1747 /* We must pay attention to the endiannes. */
1748 sh_sh4_register_convert_to_virtual (reg_nr
,
1749 gdbarch_register_type (gdbarch
, reg_nr
),
1750 temp_buffer
, buffer
);
1752 else if (reg_nr
>= tdep
->FV0_REGNUM
1753 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
1755 base_regnum
= fv_reg_base_num (reg_nr
);
1757 /* Read the real regs for which this one is an alias. */
1758 for (portion
= 0; portion
< 4; portion
++)
1759 regcache_raw_read (regcache
, base_regnum
+ portion
,
1761 + register_size (gdbarch
, base_regnum
) * portion
));
1766 sh_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1767 int reg_nr
, const void *buffer
)
1769 int base_regnum
, portion
;
1770 char temp_buffer
[MAX_REGISTER_SIZE
];
1771 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1773 if (reg_nr
>= tdep
->DR0_REGNUM
1774 && reg_nr
<= tdep
->DR_LAST_REGNUM
)
1776 base_regnum
= dr_reg_base_num (reg_nr
);
1778 /* We must pay attention to the endiannes. */
1779 sh_sh4_register_convert_to_raw (gdbarch_register_type (gdbarch
, reg_nr
), reg_nr
,
1780 buffer
, temp_buffer
);
1782 /* Write the real regs for which this one is an alias. */
1783 for (portion
= 0; portion
< 2; portion
++)
1784 regcache_raw_write (regcache
, base_regnum
+ portion
,
1786 + register_size (gdbarch
, base_regnum
) * portion
));
1788 else if (reg_nr
>= tdep
->FV0_REGNUM
1789 && reg_nr
<= tdep
->FV_LAST_REGNUM
)
1791 base_regnum
= fv_reg_base_num (reg_nr
);
1793 /* Write the real regs for which this one is an alias. */
1794 for (portion
= 0; portion
< 4; portion
++)
1795 regcache_raw_write (regcache
, base_regnum
+ portion
,
1797 + register_size (gdbarch
, base_regnum
) * portion
));
1801 /* Floating point vector of 4 float registers. */
1803 do_fv_register_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1806 int first_fp_reg_num
= fv_reg_base_num (fv_regnum
);
1807 fprintf_filtered (file
, "fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1808 fv_regnum
- gdbarch_tdep (gdbarch
)->FV0_REGNUM
,
1809 (int) read_register (first_fp_reg_num
),
1810 (int) read_register (first_fp_reg_num
+ 1),
1811 (int) read_register (first_fp_reg_num
+ 2),
1812 (int) read_register (first_fp_reg_num
+ 3));
1815 /* Double precision registers. */
1817 do_dr_register_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1820 int first_fp_reg_num
= dr_reg_base_num (dr_regnum
);
1822 fprintf_filtered (file
, "dr%d\t0x%08x%08x\n",
1823 dr_regnum
- gdbarch_tdep (gdbarch
)->DR0_REGNUM
,
1824 (int) read_register (first_fp_reg_num
),
1825 (int) read_register (first_fp_reg_num
+ 1));
1829 sh_print_pseudo_register (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1832 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1834 if (regnum
< NUM_REGS
|| regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
1835 internal_error (__FILE__
, __LINE__
,
1836 "Invalid pseudo register number %d\n", regnum
);
1837 else if (regnum
>= tdep
->DR0_REGNUM
1838 && regnum
<= tdep
->DR_LAST_REGNUM
)
1839 do_dr_register_info (gdbarch
, file
, regnum
);
1840 else if (regnum
>= tdep
->FV0_REGNUM
1841 && regnum
<= tdep
->FV_LAST_REGNUM
)
1842 do_fv_register_info (gdbarch
, file
, regnum
);
1846 sh_do_fp_register (struct gdbarch
*gdbarch
, struct ui_file
*file
, int regnum
)
1847 { /* do values for FP (float) regs */
1849 double flt
; /* double extracted from raw hex data */
1853 /* Allocate space for the float. */
1854 raw_buffer
= (char *) alloca (register_size (gdbarch
, FP0_REGNUM
));
1856 /* Get the data in raw format. */
1857 if (!frame_register_read (get_selected_frame (), regnum
, raw_buffer
))
1858 error ("can't read register %d (%s)", regnum
, REGISTER_NAME (regnum
));
1860 /* Get the register as a number */
1861 flt
= unpack_double (builtin_type_float
, raw_buffer
, &inv
);
1863 /* Print the name and some spaces. */
1864 fputs_filtered (REGISTER_NAME (regnum
), file
);
1865 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), file
);
1867 /* Print the value. */
1869 fprintf_filtered (file
, "<invalid float>");
1871 fprintf_filtered (file
, "%-10.9g", flt
);
1873 /* Print the fp register as hex. */
1874 fprintf_filtered (file
, "\t(raw 0x");
1875 for (j
= 0; j
< register_size (gdbarch
, regnum
); j
++)
1877 register int idx
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? j
1878 : register_size (gdbarch
, regnum
) - 1 - j
;
1879 fprintf_filtered (file
, "%02x", (unsigned char) raw_buffer
[idx
]);
1881 fprintf_filtered (file
, ")");
1882 fprintf_filtered (file
, "\n");
1886 sh_do_register (struct gdbarch
*gdbarch
, struct ui_file
*file
, int regnum
)
1888 char raw_buffer
[MAX_REGISTER_SIZE
];
1890 fputs_filtered (REGISTER_NAME (regnum
), file
);
1891 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), file
);
1893 /* Get the data in raw format. */
1894 if (!frame_register_read (get_selected_frame (), regnum
, raw_buffer
))
1895 fprintf_filtered (file
, "*value not available*\n");
1897 val_print (gdbarch_register_type (gdbarch
, regnum
), raw_buffer
, 0, 0,
1898 file
, 'x', 1, 0, Val_pretty_default
);
1899 fprintf_filtered (file
, "\t");
1900 val_print (gdbarch_register_type (gdbarch
, regnum
), raw_buffer
, 0, 0,
1901 file
, 0, 1, 0, Val_pretty_default
);
1902 fprintf_filtered (file
, "\n");
1906 sh_print_register (struct gdbarch
*gdbarch
, struct ui_file
*file
, int regnum
)
1908 if (regnum
< 0 || regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
1909 internal_error (__FILE__
, __LINE__
,
1910 "Invalid register number %d\n", regnum
);
1912 else if (regnum
>= 0 && regnum
< NUM_REGS
)
1914 if (TYPE_CODE (gdbarch_register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
)
1915 sh_do_fp_register (gdbarch
, file
, regnum
); /* FP regs */
1917 sh_do_register (gdbarch
, file
, regnum
); /* All other regs */
1920 else if (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
1922 sh_print_pseudo_register (gdbarch
, file
, regnum
);
1927 sh_print_registers_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1928 struct frame_info
*frame
, int regnum
, int fpregs
)
1930 if (regnum
!= -1) /* do one specified register */
1932 if (*(REGISTER_NAME (regnum
)) == '\0')
1933 error ("Not a valid register for the current processor type");
1935 sh_print_register (gdbarch
, file
, regnum
);
1938 /* do all (or most) registers */
1941 while (regnum
< NUM_REGS
)
1943 /* If the register name is empty, it is undefined for this
1944 processor, so don't display anything. */
1945 if (REGISTER_NAME (regnum
) == NULL
1946 || *(REGISTER_NAME (regnum
)) == '\0')
1952 if (TYPE_CODE (gdbarch_register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
)
1956 /* true for "INFO ALL-REGISTERS" command */
1957 sh_do_fp_register (gdbarch
, file
, regnum
); /* FP regs */
1961 regnum
+= (gdbarch_tdep (gdbarch
)->FP_LAST_REGNUM
- FP0_REGNUM
); /* skip FP regs */
1965 sh_do_register (gdbarch
, file
, regnum
); /* All other regs */
1971 while (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
1973 sh_print_pseudo_register (gdbarch
, file
, regnum
);
1979 #ifdef SVR4_SHARED_LIBS
1981 /* Fetch (and possibly build) an appropriate link_map_offsets structure
1982 for native i386 linux targets using the struct offsets defined in
1983 link.h (but without actual reference to that file).
1985 This makes it possible to access i386-linux shared libraries from
1986 a gdb that was not built on an i386-linux host (for cross debugging).
1989 struct link_map_offsets
*
1990 sh_linux_svr4_fetch_link_map_offsets (void)
1992 static struct link_map_offsets lmo
;
1993 static struct link_map_offsets
*lmp
= 0;
1999 lmo
.r_debug_size
= 8; /* 20 not actual size but all we need */
2001 lmo
.r_map_offset
= 4;
2004 lmo
.link_map_size
= 20; /* 552 not actual size but all we need */
2006 lmo
.l_addr_offset
= 0;
2007 lmo
.l_addr_size
= 4;
2009 lmo
.l_name_offset
= 4;
2010 lmo
.l_name_size
= 4;
2012 lmo
.l_next_offset
= 12;
2013 lmo
.l_next_size
= 4;
2015 lmo
.l_prev_offset
= 16;
2016 lmo
.l_prev_size
= 4;
2021 #endif /* SVR4_SHARED_LIBS */
2026 DSP_DSR_REGNUM
= 24,
2038 DSP_MOD_REGNUM
= 40,
2043 DSP_R0_BANK_REGNUM
= 51,
2044 DSP_R7_BANK_REGNUM
= DSP_R0_BANK_REGNUM
+ 7
2048 sh_dsp_register_sim_regno (int nr
)
2050 if (legacy_register_sim_regno (nr
) < 0)
2051 return legacy_register_sim_regno (nr
);
2052 if (nr
>= DSP_DSR_REGNUM
&& nr
<= DSP_Y1_REGNUM
)
2053 return nr
- DSP_DSR_REGNUM
+ SIM_SH_DSR_REGNUM
;
2054 if (nr
== DSP_MOD_REGNUM
)
2055 return SIM_SH_MOD_REGNUM
;
2056 if (nr
== DSP_RS_REGNUM
)
2057 return SIM_SH_RS_REGNUM
;
2058 if (nr
== DSP_RE_REGNUM
)
2059 return SIM_SH_RE_REGNUM
;
2060 if (nr
>= DSP_R0_BANK_REGNUM
&& nr
<= DSP_R7_BANK_REGNUM
)
2061 return nr
- DSP_R0_BANK_REGNUM
+ SIM_SH_R0_BANK_REGNUM
;
2065 static gdbarch_init_ftype sh_gdbarch_init
;
2067 static struct gdbarch
*
2068 sh_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2070 struct gdbarch
*gdbarch
;
2071 struct gdbarch_tdep
*tdep
;
2073 sh_show_regs
= sh_generic_show_regs
;
2074 switch (info
.bfd_arch_info
->mach
)
2077 sh_show_regs
= sh2e_show_regs
;
2079 case bfd_mach_sh_dsp
:
2080 sh_show_regs
= sh_dsp_show_regs
;
2084 sh_show_regs
= sh3_show_regs
;
2088 sh_show_regs
= sh3e_show_regs
;
2091 case bfd_mach_sh3_dsp
:
2092 sh_show_regs
= sh3_dsp_show_regs
;
2096 sh_show_regs
= sh4_show_regs
;
2100 sh_show_regs
= sh64_show_regs
;
2101 /* SH5 is handled entirely in sh64-tdep.c */
2102 return sh64_gdbarch_init (info
, arches
);
2105 /* If there is already a candidate, use it. */
2106 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2108 return arches
->gdbarch
;
2110 /* None found, create a new architecture from the information
2112 tdep
= XMALLOC (struct gdbarch_tdep
);
2113 gdbarch
= gdbarch_alloc (&info
, tdep
);
2115 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2116 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2117 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
2119 /* Initialize the register numbers that are not common to all the
2120 variants to -1, if necessary thse will be overwritten in the case
2122 tdep
->FPUL_REGNUM
= -1;
2123 tdep
->FPSCR_REGNUM
= -1;
2124 tdep
->DSR_REGNUM
= -1;
2125 tdep
->FP_LAST_REGNUM
= -1;
2126 tdep
->A0G_REGNUM
= -1;
2127 tdep
->A0_REGNUM
= -1;
2128 tdep
->A1G_REGNUM
= -1;
2129 tdep
->A1_REGNUM
= -1;
2130 tdep
->M0_REGNUM
= -1;
2131 tdep
->M1_REGNUM
= -1;
2132 tdep
->X0_REGNUM
= -1;
2133 tdep
->X1_REGNUM
= -1;
2134 tdep
->Y0_REGNUM
= -1;
2135 tdep
->Y1_REGNUM
= -1;
2136 tdep
->MOD_REGNUM
= -1;
2137 tdep
->RS_REGNUM
= -1;
2138 tdep
->RE_REGNUM
= -1;
2139 tdep
->SSR_REGNUM
= -1;
2140 tdep
->SPC_REGNUM
= -1;
2141 tdep
->DR0_REGNUM
= -1;
2142 tdep
->DR_LAST_REGNUM
= -1;
2143 tdep
->FV0_REGNUM
= -1;
2144 tdep
->FV_LAST_REGNUM
= -1;
2146 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2147 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2148 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2149 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2150 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2151 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2152 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2153 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2155 set_gdbarch_num_regs (gdbarch
, SH_DEFAULT_NUM_REGS
);
2156 set_gdbarch_sp_regnum (gdbarch
, 15);
2157 set_gdbarch_deprecated_fp_regnum (gdbarch
, 14);
2158 set_gdbarch_pc_regnum (gdbarch
, 16);
2159 set_gdbarch_fp0_regnum (gdbarch
, -1);
2160 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
2162 set_gdbarch_breakpoint_from_pc (gdbarch
, sh_breakpoint_from_pc
);
2163 set_gdbarch_use_struct_convention (gdbarch
, sh_use_struct_convention
);
2165 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_sh
);
2166 set_gdbarch_register_sim_regno (gdbarch
, legacy_register_sim_regno
);
2168 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2170 set_gdbarch_skip_prologue (gdbarch
, sh_skip_prologue
);
2171 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2172 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2173 set_gdbarch_function_start_offset (gdbarch
, 0);
2175 set_gdbarch_frame_args_skip (gdbarch
, 0);
2176 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
2177 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2179 set_gdbarch_deprecated_frame_chain (gdbarch
, sh_frame_chain
);
2180 set_gdbarch_deprecated_get_saved_register (gdbarch
, deprecated_generic_get_saved_register
);
2181 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, sh_init_extra_frame_info
);
2182 set_gdbarch_deprecated_pop_frame (gdbarch
, sh_pop_frame
);
2183 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, sh_frame_saved_pc
);
2184 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, sh_saved_pc_after_call
);
2185 set_gdbarch_frame_align (gdbarch
, sh_frame_align
);
2187 switch (info
.bfd_arch_info
->mach
)
2190 set_gdbarch_register_name (gdbarch
, sh_sh_register_name
);
2191 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2192 set_gdbarch_register_type (gdbarch
, sh_default_register_type
);
2193 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2194 set_gdbarch_store_return_value (gdbarch
, sh_default_store_return_value
);
2195 set_gdbarch_extract_return_value (gdbarch
, sh_default_extract_return_value
);
2196 set_gdbarch_push_dummy_call (gdbarch
, sh_push_dummy_call_nofpu
);
2197 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2199 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
2202 set_gdbarch_register_name (gdbarch
, sh_sh_register_name
);
2203 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2204 set_gdbarch_register_type (gdbarch
, sh_default_register_type
);
2205 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2206 set_gdbarch_store_return_value (gdbarch
, sh_default_store_return_value
);
2207 set_gdbarch_extract_return_value (gdbarch
, sh_default_extract_return_value
);
2208 set_gdbarch_push_dummy_call (gdbarch
, sh_push_dummy_call_nofpu
);
2209 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2211 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
2214 /* doubles on sh2e and sh3e are actually 4 byte. */
2215 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2217 set_gdbarch_register_name (gdbarch
, sh_sh2e_register_name
);
2218 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2219 set_gdbarch_register_type (gdbarch
, sh_sh3e_register_type
);
2220 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2221 set_gdbarch_fp0_regnum (gdbarch
, 25);
2222 set_gdbarch_store_return_value (gdbarch
, sh3e_sh4_store_return_value
);
2223 set_gdbarch_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
2224 set_gdbarch_push_dummy_call (gdbarch
, sh_push_dummy_call_fpu
);
2225 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2226 tdep
->FPUL_REGNUM
= 23;
2227 tdep
->FPSCR_REGNUM
= 24;
2228 tdep
->FP_LAST_REGNUM
= 40;
2230 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
2232 case bfd_mach_sh_dsp
:
2233 set_gdbarch_register_name (gdbarch
, sh_sh_dsp_register_name
);
2234 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2235 set_gdbarch_register_type (gdbarch
, sh_default_register_type
);
2236 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2237 set_gdbarch_register_sim_regno (gdbarch
, sh_dsp_register_sim_regno
);
2238 set_gdbarch_store_return_value (gdbarch
, sh_default_store_return_value
);
2239 set_gdbarch_extract_return_value (gdbarch
, sh_default_extract_return_value
);
2240 set_gdbarch_push_dummy_call (gdbarch
, sh_push_dummy_call_nofpu
);
2241 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2242 tdep
->DSR_REGNUM
= 24;
2243 tdep
->A0G_REGNUM
= 25;
2244 tdep
->A0_REGNUM
= 26;
2245 tdep
->A1G_REGNUM
= 27;
2246 tdep
->A1_REGNUM
= 28;
2247 tdep
->M0_REGNUM
= 29;
2248 tdep
->M1_REGNUM
= 30;
2249 tdep
->X0_REGNUM
= 31;
2250 tdep
->X1_REGNUM
= 32;
2251 tdep
->Y0_REGNUM
= 33;
2252 tdep
->Y1_REGNUM
= 34;
2253 tdep
->MOD_REGNUM
= 40;
2254 tdep
->RS_REGNUM
= 43;
2255 tdep
->RE_REGNUM
= 44;
2257 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
2260 set_gdbarch_register_name (gdbarch
, sh_sh3_register_name
);
2261 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2262 set_gdbarch_register_type (gdbarch
, sh_default_register_type
);
2263 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2264 set_gdbarch_store_return_value (gdbarch
, sh_default_store_return_value
);
2265 set_gdbarch_extract_return_value (gdbarch
, sh_default_extract_return_value
);
2266 set_gdbarch_push_dummy_call (gdbarch
, sh_push_dummy_call_nofpu
);
2267 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2268 tdep
->SSR_REGNUM
= 41;
2269 tdep
->SPC_REGNUM
= 42;
2271 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
2274 /* doubles on sh2e and sh3e are actually 4 byte. */
2275 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2277 set_gdbarch_register_name (gdbarch
, sh_sh3e_register_name
);
2278 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2279 set_gdbarch_register_type (gdbarch
, sh_sh3e_register_type
);
2280 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2281 set_gdbarch_fp0_regnum (gdbarch
, 25);
2282 set_gdbarch_store_return_value (gdbarch
, sh3e_sh4_store_return_value
);
2283 set_gdbarch_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
2284 set_gdbarch_push_dummy_call (gdbarch
, sh_push_dummy_call_fpu
);
2285 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2286 tdep
->FPUL_REGNUM
= 23;
2287 tdep
->FPSCR_REGNUM
= 24;
2288 tdep
->FP_LAST_REGNUM
= 40;
2289 tdep
->SSR_REGNUM
= 41;
2290 tdep
->SPC_REGNUM
= 42;
2292 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_fp_frame_init_saved_regs
);
2294 case bfd_mach_sh3_dsp
:
2295 set_gdbarch_register_name (gdbarch
, sh_sh3_dsp_register_name
);
2296 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2297 set_gdbarch_register_type (gdbarch
, sh_default_register_type
);
2298 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2299 set_gdbarch_register_sim_regno (gdbarch
, sh_dsp_register_sim_regno
);
2300 set_gdbarch_store_return_value (gdbarch
, sh_default_store_return_value
);
2301 set_gdbarch_extract_return_value (gdbarch
, sh_default_extract_return_value
);
2302 set_gdbarch_push_dummy_call (gdbarch
, sh_push_dummy_call_nofpu
);
2303 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2304 tdep
->DSR_REGNUM
= 24;
2305 tdep
->A0G_REGNUM
= 25;
2306 tdep
->A0_REGNUM
= 26;
2307 tdep
->A1G_REGNUM
= 27;
2308 tdep
->A1_REGNUM
= 28;
2309 tdep
->M0_REGNUM
= 29;
2310 tdep
->M1_REGNUM
= 30;
2311 tdep
->X0_REGNUM
= 31;
2312 tdep
->X1_REGNUM
= 32;
2313 tdep
->Y0_REGNUM
= 33;
2314 tdep
->Y1_REGNUM
= 34;
2315 tdep
->MOD_REGNUM
= 40;
2316 tdep
->RS_REGNUM
= 43;
2317 tdep
->RE_REGNUM
= 44;
2318 tdep
->SSR_REGNUM
= 41;
2319 tdep
->SPC_REGNUM
= 42;
2321 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
2324 set_gdbarch_register_name (gdbarch
, sh_sh4_register_name
);
2325 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2326 set_gdbarch_register_type (gdbarch
, sh_sh4_register_type
);
2327 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2328 set_gdbarch_fp0_regnum (gdbarch
, 25);
2329 set_gdbarch_num_pseudo_regs (gdbarch
, 12);
2330 set_gdbarch_pseudo_register_read (gdbarch
, sh_pseudo_register_read
);
2331 set_gdbarch_pseudo_register_write (gdbarch
, sh_pseudo_register_write
);
2332 set_gdbarch_store_return_value (gdbarch
, sh3e_sh4_store_return_value
);
2333 set_gdbarch_extract_return_value (gdbarch
, sh3e_sh4_extract_return_value
);
2334 set_gdbarch_push_dummy_call (gdbarch
, sh_push_dummy_call_fpu
);
2335 set_gdbarch_extract_struct_value_address (gdbarch
, sh_extract_struct_value_address
);
2336 tdep
->FPUL_REGNUM
= 23;
2337 tdep
->FPSCR_REGNUM
= 24;
2338 tdep
->FP_LAST_REGNUM
= 40;
2339 tdep
->SSR_REGNUM
= 41;
2340 tdep
->SPC_REGNUM
= 42;
2341 tdep
->DR0_REGNUM
= 59;
2342 tdep
->DR_LAST_REGNUM
= 66;
2343 tdep
->FV0_REGNUM
= 67;
2344 tdep
->FV_LAST_REGNUM
= 70;
2346 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_fp_frame_init_saved_regs
);
2349 set_gdbarch_register_name (gdbarch
, sh_generic_register_name
);
2350 set_gdbarch_print_registers_info (gdbarch
, sh_print_registers_info
);
2351 set_gdbarch_register_type (gdbarch
, sh_default_register_type
);
2352 set_gdbarch_push_dummy_code (gdbarch
, sh_push_dummy_code
);
2353 set_gdbarch_store_return_value (gdbarch
, sh_default_store_return_value
);
2354 set_gdbarch_extract_return_value (gdbarch
, sh_default_extract_return_value
);
2356 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh_nofp_frame_init_saved_regs
);
2360 /* Hook in ABI-specific overrides, if they have been registered. */
2361 gdbarch_init_osabi (info
, gdbarch
);
2367 sh_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2369 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2374 /* FIXME: dump the rest of gdbarch_tdep. */
2377 extern initialize_file_ftype _initialize_sh_tdep
; /* -Wmissing-prototypes */
2380 _initialize_sh_tdep (void)
2382 struct cmd_list_element
*c
;
2384 gdbarch_register (bfd_arch_sh
, sh_gdbarch_init
, sh_dump_tdep
);
2386 add_com ("regs", class_vars
, sh_show_regs_command
, "Print all registers");