1 /* Target-dependent code for Renesas Super-H, for GDB.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 Contributed by Steve Chamberlain
37 #include "gdb_string.h"
38 #include "arch-utils.h"
39 #include "floatformat.h"
45 #include "solib-svr4.h"
49 /* registers numbers shared with the simulator */
50 #include "gdb/sim-sh.h"
52 /* Information that is dependent on the processor variant. */
65 /* Registers of SH5 */
69 DEFAULT_RETURN_REGNUM
= 2,
70 STRUCT_RETURN_REGNUM
= 2,
73 FLOAT_ARGLAST_REGNUM
= 11,
78 /* FPP stands for Floating Point Pair, to avoid confusion with
79 GDB's FP0_REGNUM, which is the number of the first Floating
80 point register. Unfortunately on the sh5, the floating point
81 registers are called FR, and the floating point pairs are called FP. */
83 FPP_LAST_REGNUM
= 204,
87 R_LAST_C_REGNUM
= 236,
97 FP_LAST_C_REGNUM
= 260,
99 DR_LAST_C_REGNUM
= 268,
101 FV_LAST_C_REGNUM
= 272,
102 FPSCR_REGNUM
= SIM_SH64_FPCSR_REGNUM
,
103 SSR_REGNUM
= SIM_SH64_SSR_REGNUM
,
104 SPC_REGNUM
= SIM_SH64_SPC_REGNUM
,
105 TR7_REGNUM
= SIM_SH64_TR0_REGNUM
+ 7,
106 FP_LAST_REGNUM
= SIM_SH64_FR0_REGNUM
+ SIM_SH64_NR_FP_REGS
- 1
110 /* Define other aspects of the stack frame.
111 we keep a copy of the worked out return pc lying around, since it
112 is a useful bit of info */
114 struct frame_extra_info
122 sh_sh64_register_name (int reg_nr
)
124 static char *register_names
[] =
126 /* SH MEDIA MODE (ISA 32) */
127 /* general registers (64-bit) 0-63 */
128 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
129 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
130 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
131 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
132 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
133 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
134 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
135 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
140 /* status reg., saved status reg., saved pc reg. (64-bit) 65-67 */
143 /* target registers (64-bit) 68-75*/
144 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
146 /* floating point state control register (32-bit) 76 */
149 /* single precision floating point registers (32-bit) 77-140*/
150 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
151 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
152 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
153 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31",
154 "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39",
155 "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47",
156 "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55",
157 "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63",
159 /* double precision registers (pseudo) 141-172 */
160 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
161 "dr16", "dr18", "dr20", "dr22", "dr24", "dr26", "dr28", "dr30",
162 "dr32", "dr34", "dr36", "dr38", "dr40", "dr42", "dr44", "dr46",
163 "dr48", "dr50", "dr52", "dr54", "dr56", "dr58", "dr60", "dr62",
165 /* floating point pairs (pseudo) 173-204*/
166 "fp0", "fp2", "fp4", "fp6", "fp8", "fp10", "fp12", "fp14",
167 "fp16", "fp18", "fp20", "fp22", "fp24", "fp26", "fp28", "fp30",
168 "fp32", "fp34", "fp36", "fp38", "fp40", "fp42", "fp44", "fp46",
169 "fp48", "fp50", "fp52", "fp54", "fp56", "fp58", "fp60", "fp62",
171 /* floating point vectors (4 floating point regs) (pseudo) 205-220*/
172 "fv0", "fv4", "fv8", "fv12", "fv16", "fv20", "fv24", "fv28",
173 "fv32", "fv36", "fv40", "fv44", "fv48", "fv52", "fv56", "fv60",
175 /* SH COMPACT MODE (ISA 16) (all pseudo) 221-272*/
176 "r0_c", "r1_c", "r2_c", "r3_c", "r4_c", "r5_c", "r6_c", "r7_c",
177 "r8_c", "r9_c", "r10_c", "r11_c", "r12_c", "r13_c", "r14_c", "r15_c",
179 "gbr_c", "mach_c", "macl_c", "pr_c", "t_c",
181 "fr0_c", "fr1_c", "fr2_c", "fr3_c", "fr4_c", "fr5_c", "fr6_c", "fr7_c",
182 "fr8_c", "fr9_c", "fr10_c", "fr11_c", "fr12_c", "fr13_c", "fr14_c", "fr15_c",
183 "dr0_c", "dr2_c", "dr4_c", "dr6_c", "dr8_c", "dr10_c", "dr12_c", "dr14_c",
184 "fv0_c", "fv4_c", "fv8_c", "fv12_c",
185 /* FIXME!!!! XF0 XF15, XD0 XD14 ?????*/
190 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
192 return register_names
[reg_nr
];
195 #define NUM_PSEUDO_REGS_SH_MEDIA 80
196 #define NUM_PSEUDO_REGS_SH_COMPACT 51
198 /* Macros and functions for setting and testing a bit in a minimal
199 symbol that marks it as 32-bit function. The MSB of the minimal
200 symbol's "info" field is used for this purpose.
202 ELF_MAKE_MSYMBOL_SPECIAL
203 tests whether an ELF symbol is "special", i.e. refers
204 to a 32-bit function, and sets a "special" bit in a
205 minimal symbol to mark it as a 32-bit function
206 MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol */
208 #define MSYMBOL_IS_SPECIAL(msym) \
209 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
212 sh64_elf_make_msymbol_special (asymbol
*sym
, struct minimal_symbol
*msym
)
217 if (((elf_symbol_type
*)(sym
))->internal_elf_sym
.st_other
== STO_SH5_ISA32
)
219 MSYMBOL_INFO (msym
) = (char *) (((long) MSYMBOL_INFO (msym
)) | 0x80000000);
220 SYMBOL_VALUE_ADDRESS (msym
) |= 1;
224 /* ISA32 (shmedia) function addresses are odd (bit 0 is set). Here
225 are some macros to test, set, or clear bit 0 of addresses. */
226 #define IS_ISA32_ADDR(addr) ((addr) & 1)
227 #define MAKE_ISA32_ADDR(addr) ((addr) | 1)
228 #define UNMAKE_ISA32_ADDR(addr) ((addr) & ~1)
231 pc_is_isa32 (bfd_vma memaddr
)
233 struct minimal_symbol
*sym
;
235 /* If bit 0 of the address is set, assume this is a
236 ISA32 (shmedia) address. */
237 if (IS_ISA32_ADDR (memaddr
))
240 /* A flag indicating that this is a ISA32 function is stored by elfread.c in
241 the high bit of the info field. Use this to decide if the function is
243 sym
= lookup_minimal_symbol_by_pc (memaddr
);
245 return MSYMBOL_IS_SPECIAL (sym
);
250 static const unsigned char *
251 sh_sh64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
253 /* The BRK instruction for shmedia is
254 01101111 11110101 11111111 11110000
255 which translates in big endian mode to 0x6f, 0xf5, 0xff, 0xf0
256 and in little endian mode to 0xf0, 0xff, 0xf5, 0x6f */
258 /* The BRK instruction for shcompact is
260 which translates in big endian mode to 0x0, 0x3b
261 and in little endian mode to 0x3b, 0x0*/
263 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
265 if (pc_is_isa32 (*pcptr
))
267 static unsigned char big_breakpoint_media
[] = {0x6f, 0xf5, 0xff, 0xf0};
268 *pcptr
= UNMAKE_ISA32_ADDR (*pcptr
);
269 *lenptr
= sizeof (big_breakpoint_media
);
270 return big_breakpoint_media
;
274 static unsigned char big_breakpoint_compact
[] = {0x0, 0x3b};
275 *lenptr
= sizeof (big_breakpoint_compact
);
276 return big_breakpoint_compact
;
281 if (pc_is_isa32 (*pcptr
))
283 static unsigned char little_breakpoint_media
[] = {0xf0, 0xff, 0xf5, 0x6f};
284 *pcptr
= UNMAKE_ISA32_ADDR (*pcptr
);
285 *lenptr
= sizeof (little_breakpoint_media
);
286 return little_breakpoint_media
;
290 static unsigned char little_breakpoint_compact
[] = {0x3b, 0x0};
291 *lenptr
= sizeof (little_breakpoint_compact
);
292 return little_breakpoint_compact
;
297 /* Prologue looks like
298 [mov.l <regs>,@-r15]...
303 Actually it can be more complicated than this. For instance, with
321 /* PTABS/L Rn, TRa 0110101111110001nnnnnnl00aaa0000
322 with l=1 and n = 18 0110101111110001010010100aaa0000 */
323 #define IS_PTABSL_R18(x) (((x) & 0xffffff8f) == 0x6bf14a00)
325 /* STS.L PR,@-r0 0100000000100010
326 r0-4-->r0, PR-->(r0) */
327 #define IS_STS_R0(x) ((x) == 0x4022)
329 /* STS PR, Rm 0000mmmm00101010
331 #define IS_STS_PR(x) (((x) & 0xf0ff) == 0x2a)
333 /* MOV.L Rm,@(disp,r15) 00011111mmmmdddd
335 #define IS_MOV_TO_R15(x) (((x) & 0xff00) == 0x1f00)
337 /* MOV.L R14,@(disp,r15) 000111111110dddd
338 R14-->(dispx4+r15) */
339 #define IS_MOV_R14(x) (((x) & 0xfff0) == 0x1fe0)
341 /* ST.Q R14, disp, R18 101011001110dddddddddd0100100000
342 R18-->(dispx8+R14) */
343 #define IS_STQ_R18_R14(x) (((x) & 0xfff003ff) == 0xace00120)
345 /* ST.Q R15, disp, R18 101011001111dddddddddd0100100000
346 R18-->(dispx8+R15) */
347 #define IS_STQ_R18_R15(x) (((x) & 0xfff003ff) == 0xacf00120)
349 /* ST.L R15, disp, R18 101010001111dddddddddd0100100000
350 R18-->(dispx4+R15) */
351 #define IS_STL_R18_R15(x) (((x) & 0xfff003ff) == 0xa8f00120)
353 /* ST.Q R15, disp, R14 1010 1100 1111 dddd dddd dd00 1110 0000
354 R14-->(dispx8+R15) */
355 #define IS_STQ_R14_R15(x) (((x) & 0xfff003ff) == 0xacf000e0)
357 /* ST.L R15, disp, R14 1010 1000 1111 dddd dddd dd00 1110 0000
358 R14-->(dispx4+R15) */
359 #define IS_STL_R14_R15(x) (((x) & 0xfff003ff) == 0xa8f000e0)
361 /* ADDI.L R15,imm,R15 1101 0100 1111 ssss ssss ss00 1111 0000
363 #define IS_ADDIL_SP_MEDIA(x) (((x) & 0xfff003ff) == 0xd4f000f0)
365 /* ADDI R15,imm,R15 1101 0000 1111 ssss ssss ss00 1111 0000
367 #define IS_ADDI_SP_MEDIA(x) (((x) & 0xfff003ff) == 0xd0f000f0)
369 /* ADD.L R15,R63,R14 0000 0000 1111 1000 1111 1100 1110 0000
371 #define IS_ADDL_SP_FP_MEDIA(x) ((x) == 0x00f8fce0)
373 /* ADD R15,R63,R14 0000 0000 1111 1001 1111 1100 1110 0000
375 #define IS_ADD_SP_FP_MEDIA(x) ((x) == 0x00f9fce0)
377 #define IS_MOV_SP_FP_MEDIA(x) (IS_ADDL_SP_FP_MEDIA(x) || IS_ADD_SP_FP_MEDIA(x))
379 /* MOV #imm, R0 1110 0000 ssss ssss
381 #define IS_MOV_R0(x) (((x) & 0xff00) == 0xe000)
383 /* MOV.L @(disp,PC), R0 1101 0000 iiii iiii */
384 #define IS_MOVL_R0(x) (((x) & 0xff00) == 0xd000)
386 /* ADD r15,r0 0011 0000 1111 1100
388 #define IS_ADD_SP_R0(x) ((x) == 0x30fc)
390 /* MOV.L R14 @-R0 0010 0000 1110 0110
391 R14-->(R0-4), R0-4-->R0 */
392 #define IS_MOV_R14_R0(x) ((x) == 0x20e6)
394 /* ADD Rm,R63,Rn Rm+R63-->Rn 0000 00mm mmmm 1001 1111 11nn nnnn 0000
395 where Rm is one of r2-r9 which are the argument registers. */
396 /* FIXME: Recognize the float and double register moves too! */
397 #define IS_MEDIA_IND_ARG_MOV(x) \
398 ((((x) & 0xfc0ffc0f) == 0x0009fc00) && (((x) & 0x03f00000) >= 0x00200000 && ((x) & 0x03f00000) <= 0x00900000))
400 /* ST.Q Rn,0,Rm Rm-->Rn+0 1010 11nn nnnn 0000 0000 00mm mmmm 0000
401 or ST.L Rn,0,Rm Rm-->Rn+0 1010 10nn nnnn 0000 0000 00mm mmmm 0000
402 where Rm is one of r2-r9 which are the argument registers. */
403 #define IS_MEDIA_ARG_MOV(x) \
404 (((((x) & 0xfc0ffc0f) == 0xac000000) || (((x) & 0xfc0ffc0f) == 0xa8000000)) \
405 && (((x) & 0x000003f0) >= 0x00000020 && ((x) & 0x000003f0) <= 0x00000090))
407 /* ST.B R14,0,Rn Rn-->(R14+0) 1010 0000 1110 0000 0000 00nn nnnn 0000*/
408 /* ST.W R14,0,Rn Rn-->(R14+0) 1010 0100 1110 0000 0000 00nn nnnn 0000*/
409 /* ST.L R14,0,Rn Rn-->(R14+0) 1010 1000 1110 0000 0000 00nn nnnn 0000*/
410 /* FST.S R14,0,FRn Rn-->(R14+0) 1011 0100 1110 0000 0000 00nn nnnn 0000*/
411 /* FST.D R14,0,DRn Rn-->(R14+0) 1011 1100 1110 0000 0000 00nn nnnn 0000*/
412 #define IS_MEDIA_MOV_TO_R14(x) \
413 ((((x) & 0xfffffc0f) == 0xa0e00000) \
414 || (((x) & 0xfffffc0f) == 0xa4e00000) \
415 || (((x) & 0xfffffc0f) == 0xa8e00000) \
416 || (((x) & 0xfffffc0f) == 0xb4e00000) \
417 || (((x) & 0xfffffc0f) == 0xbce00000))
419 /* MOV Rm, Rn Rm-->Rn 0110 nnnn mmmm 0011
421 #define IS_COMPACT_IND_ARG_MOV(x) \
422 ((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0020) && (((x) & 0x00f0) <= 0x0090))
424 /* compact direct arg move!
425 MOV.L Rn, @r14 0010 1110 mmmm 0010 */
426 #define IS_COMPACT_ARG_MOV(x) \
427 (((((x) & 0xff0f) == 0x2e02) && (((x) & 0x00f0) >= 0x0020) && ((x) & 0x00f0) <= 0x0090))
429 /* MOV.B Rm, @R14 0010 1110 mmmm 0000
430 MOV.W Rm, @R14 0010 1110 mmmm 0001 */
431 #define IS_COMPACT_MOV_TO_R14(x) \
432 ((((x) & 0xff0f) == 0x2e00) || (((x) & 0xff0f) == 0x2e01))
434 #define IS_JSR_R0(x) ((x) == 0x400b)
435 #define IS_NOP(x) ((x) == 0x0009)
438 /* MOV r15,r14 0110111011110011
440 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
442 /* ADD #imm,r15 01111111iiiiiiii
444 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
446 /* Skip any prologue before the guts of a function */
448 /* Skip the prologue using the debug information. If this fails we'll
449 fall back on the 'guess' method below. */
451 after_prologue (CORE_ADDR pc
)
453 struct symtab_and_line sal
;
454 CORE_ADDR func_addr
, func_end
;
456 /* If we can not find the symbol in the partial symbol table, then
457 there is no hope we can determine the function's start address
459 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
462 /* Get the line associated with FUNC_ADDR. */
463 sal
= find_pc_line (func_addr
, 0);
465 /* There are only two cases to consider. First, the end of the source line
466 is within the function bounds. In that case we return the end of the
467 source line. Second is the end of the source line extends beyond the
468 bounds of the current function. We need to use the slow code to
469 examine instructions in that case. */
470 if (sal
.end
< func_end
)
477 look_for_args_moves (CORE_ADDR start_pc
, int media_mode
)
481 int insn_size
= (media_mode
? 4 : 2);
483 for (here
= start_pc
, end
= start_pc
+ (insn_size
* 28); here
< end
;)
487 w
= read_memory_integer (UNMAKE_ISA32_ADDR (here
), insn_size
);
489 if (IS_MEDIA_IND_ARG_MOV (w
))
491 /* This must be followed by a store to r14, so the argument
492 is where the debug info says it is. This can happen after
493 the SP has been saved, unfortunately. */
495 int next_insn
= read_memory_integer (UNMAKE_ISA32_ADDR (here
),
498 if (IS_MEDIA_MOV_TO_R14 (next_insn
))
501 else if (IS_MEDIA_ARG_MOV (w
))
503 /* These instructions store directly the argument in r14. */
511 w
= read_memory_integer (here
, insn_size
);
514 if (IS_COMPACT_IND_ARG_MOV (w
))
516 /* This must be followed by a store to r14, so the argument
517 is where the debug info says it is. This can happen after
518 the SP has been saved, unfortunately. */
520 int next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
522 if (IS_COMPACT_MOV_TO_R14 (next_insn
))
525 else if (IS_COMPACT_ARG_MOV (w
))
527 /* These instructions store directly the argument in r14. */
530 else if (IS_MOVL_R0 (w
))
532 /* There is a function that gcc calls to get the arguments
533 passed correctly to the function. Only after this
534 function call the arguments will be found at the place
535 where they are supposed to be. This happens in case the
536 argument has to be stored into a 64-bit register (for
537 instance doubles, long longs). SHcompact doesn't have
538 access to the full 64-bits, so we store the register in
539 stack slot and store the address of the stack slot in
540 the register, then do a call through a wrapper that
541 loads the memory value into the register. A SHcompact
542 callee calls an argument decoder
543 (GCC_shcompact_incoming_args) that stores the 64-bit
544 value in a stack slot and stores the address of the
545 stack slot in the register. GCC thinks the argument is
546 just passed by transparent reference, but this is only
547 true after the argument decoder is called. Such a call
548 needs to be considered part of the prologue. */
550 /* This must be followed by a JSR @r0 instruction and by
551 a NOP instruction. After these, the prologue is over! */
553 int next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
555 if (IS_JSR_R0 (next_insn
))
557 next_insn
= 0xffff & read_memory_integer (here
, insn_size
);
560 if (IS_NOP (next_insn
))
573 sh64_skip_prologue_hard_way (CORE_ADDR start_pc
)
583 if (pc_is_isa32 (start_pc
) == 0)
589 for (here
= start_pc
, end
= start_pc
+ (insn_size
* 28); here
< end
;)
594 int w
= read_memory_integer (UNMAKE_ISA32_ADDR (here
), insn_size
);
596 if (IS_STQ_R18_R14 (w
) || IS_STQ_R18_R15 (w
) || IS_STQ_R14_R15 (w
)
597 || IS_STL_R14_R15 (w
) || IS_STL_R18_R15 (w
)
598 || IS_ADDIL_SP_MEDIA (w
) || IS_ADDI_SP_MEDIA (w
) || IS_PTABSL_R18 (w
))
602 else if (IS_MOV_SP_FP (w
) || IS_MOV_SP_FP_MEDIA(w
))
610 /* Don't bail out yet, we may have arguments stored in
611 registers here, according to the debug info, so that
612 gdb can print the frames correctly. */
613 start_pc
= look_for_args_moves (here
- insn_size
, media_mode
);
619 int w
= 0xffff & read_memory_integer (here
, insn_size
);
622 if (IS_STS_R0 (w
) || IS_STS_PR (w
)
623 || IS_MOV_TO_R15 (w
) || IS_MOV_R14 (w
)
624 || IS_MOV_R0 (w
) || IS_ADD_SP_R0 (w
) || IS_MOV_R14_R0 (w
))
628 else if (IS_MOV_SP_FP (w
))
636 /* Don't bail out yet, we may have arguments stored in
637 registers here, according to the debug info, so that
638 gdb can print the frames correctly. */
639 start_pc
= look_for_args_moves (here
- insn_size
, media_mode
);
649 sh_skip_prologue (CORE_ADDR pc
)
651 CORE_ADDR post_prologue_pc
;
653 /* See if we can determine the end of the prologue via the symbol table.
654 If so, then return either PC, or the PC after the prologue, whichever
656 post_prologue_pc
= after_prologue (pc
);
658 /* If after_prologue returned a useful address, then use it. Else
659 fall back on the instruction skipping code. */
660 if (post_prologue_pc
!= 0)
661 return max (pc
, post_prologue_pc
);
663 return sh64_skip_prologue_hard_way (pc
);
666 /* Immediately after a function call, return the saved pc.
667 Can't always go through the frames for this because on some machines
668 the new frame is not set up until the new function executes
671 The return address is the value saved in the PR register + 4 */
673 sh_saved_pc_after_call (struct frame_info
*frame
)
675 return (ADDR_BITS_REMOVE (read_register (PR_REGNUM
)));
678 /* Should call_function allocate stack space for a struct return? */
680 sh64_use_struct_convention (int gcc_p
, struct type
*type
)
682 return (TYPE_LENGTH (type
) > 8);
685 /* Store the address of the place in which to copy the structure the
686 subroutine will return. This is called from call_function.
688 We store structs through a pointer passed in R2 */
690 sh64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
692 write_register (STRUCT_RETURN_REGNUM
, (addr
));
695 /* Disassemble an instruction. */
697 gdb_print_insn_sh (bfd_vma memaddr
, disassemble_info
*info
)
699 info
->endian
= TARGET_BYTE_ORDER
;
700 return print_insn_sh (memaddr
, info
);
703 /* Given a register number RN as it appears in an assembly
704 instruction, find the corresponding register number in the GDB
707 translate_insn_rn (int rn
, int media_mode
)
709 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
711 /* FIXME: this assumes that the number rn is for a not pseudo
717 /* These registers don't have a corresponding compact one. */
718 /* FIXME: This is probably not enough. */
720 if ((rn
>= 16 && rn
<= 63) || (rn
>= 93 && rn
<= 140))
723 if (rn
>= 0 && rn
<= R0_C_REGNUM
)
724 return R0_C_REGNUM
+ rn
;
730 /* Given a GDB frame, determine the address of the calling function's
731 frame. This will be used to create a new GDB frame struct, and
732 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
733 will be called for the new frame.
735 For us, the frame address is its stack pointer value, so we look up
736 the function prologue to determine the caller's sp value, and return it. */
738 sh64_frame_chain (struct frame_info
*frame
)
740 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
741 get_frame_base (frame
),
742 get_frame_base (frame
)))
743 return get_frame_base (frame
); /* dummy frame same as caller's frame */
744 if (get_frame_pc (frame
)
745 && !deprecated_inside_entry_file (get_frame_pc (frame
)))
747 int media_mode
= pc_is_isa32 (get_frame_pc (frame
));
749 if (gdbarch_tdep (current_gdbarch
)->sh_abi
== SH_ABI_32
)
752 size
= DEPRECATED_REGISTER_RAW_SIZE (translate_insn_rn (DEPRECATED_FP_REGNUM
, media_mode
));
753 return read_memory_integer (get_frame_base (frame
)
754 + get_frame_extra_info (frame
)->f_offset
,
762 sh64_get_saved_pr (struct frame_info
*fi
, int pr_regnum
)
766 for (; fi
; fi
= get_next_frame (fi
))
767 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
768 get_frame_base (fi
)))
769 /* When the caller requests PR from the dummy frame, we return PC because
770 that's where the previous routine appears to have done a call from. */
771 return deprecated_read_register_dummy (get_frame_pc (fi
),
772 get_frame_base (fi
), pr_regnum
);
775 DEPRECATED_FRAME_INIT_SAVED_REGS (fi
);
776 if (!get_frame_pc (fi
))
779 media_mode
= pc_is_isa32 (get_frame_pc (fi
));
781 if (deprecated_get_frame_saved_regs (fi
)[pr_regnum
] != 0)
783 int gdb_reg_num
= translate_insn_rn (pr_regnum
, media_mode
);
784 int size
= ((gdbarch_tdep (current_gdbarch
)->sh_abi
== SH_ABI_32
)
786 : DEPRECATED_REGISTER_RAW_SIZE (gdb_reg_num
));
787 return read_memory_integer (deprecated_get_frame_saved_regs (fi
)[pr_regnum
], size
);
790 return read_register (pr_regnum
);
793 /* For vectors of 4 floating point registers. */
795 fv_reg_base_num (int fv_regnum
)
799 fp_regnum
= FP0_REGNUM
+
800 (fv_regnum
- FV0_REGNUM
) * 4;
804 /* For double precision floating point registers, i.e 2 fp regs.*/
806 dr_reg_base_num (int dr_regnum
)
810 fp_regnum
= FP0_REGNUM
+
811 (dr_regnum
- DR0_REGNUM
) * 2;
815 /* For pairs of floating point registers */
817 fpp_reg_base_num (int fpp_regnum
)
821 fp_regnum
= FP0_REGNUM
+
822 (fpp_regnum
- FPP0_REGNUM
) * 2;
827 is_media_pseudo (int rn
)
829 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
831 return (rn
>= DR0_REGNUM
832 && rn
<= FV_LAST_REGNUM
);
836 sh64_get_gdb_regnum (int gcc_regnum
, CORE_ADDR pc
)
838 return translate_insn_rn (gcc_regnum
, pc_is_isa32 (pc
));
842 sh64_media_reg_base_num (int reg_nr
)
844 int base_regnum
= -1;
845 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
847 if (reg_nr
>= DR0_REGNUM
848 && reg_nr
<= DR_LAST_REGNUM
)
849 base_regnum
= dr_reg_base_num (reg_nr
);
851 else if (reg_nr
>= FPP0_REGNUM
852 && reg_nr
<= FPP_LAST_REGNUM
)
853 base_regnum
= fpp_reg_base_num (reg_nr
);
855 else if (reg_nr
>= FV0_REGNUM
856 && reg_nr
<= FV_LAST_REGNUM
)
857 base_regnum
= fv_reg_base_num (reg_nr
);
864 SH COMPACT MODE (ISA 16) (all pseudo) 221-272
865 GDB_REGNUM BASE_REGNUM
925 sh64_compact_reg_base_num (int reg_nr
)
927 int base_regnum
= -1;
928 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
930 /* general register N maps to general register N */
931 if (reg_nr
>= R0_C_REGNUM
932 && reg_nr
<= R_LAST_C_REGNUM
)
933 base_regnum
= reg_nr
- R0_C_REGNUM
;
935 /* floating point register N maps to floating point register N */
936 else if (reg_nr
>= FP0_C_REGNUM
937 && reg_nr
<= FP_LAST_C_REGNUM
)
938 base_regnum
= reg_nr
- FP0_C_REGNUM
+ FP0_REGNUM
;
940 /* double prec register N maps to base regnum for double prec register N */
941 else if (reg_nr
>= DR0_C_REGNUM
942 && reg_nr
<= DR_LAST_C_REGNUM
)
943 base_regnum
= dr_reg_base_num (DR0_REGNUM
944 + reg_nr
- DR0_C_REGNUM
);
946 /* vector N maps to base regnum for vector register N */
947 else if (reg_nr
>= FV0_C_REGNUM
948 && reg_nr
<= FV_LAST_C_REGNUM
)
949 base_regnum
= fv_reg_base_num (FV0_REGNUM
950 + reg_nr
- FV0_C_REGNUM
);
952 else if (reg_nr
== PC_C_REGNUM
)
953 base_regnum
= PC_REGNUM
;
955 else if (reg_nr
== GBR_C_REGNUM
)
958 else if (reg_nr
== MACH_C_REGNUM
959 || reg_nr
== MACL_C_REGNUM
)
962 else if (reg_nr
== PR_C_REGNUM
)
965 else if (reg_nr
== T_C_REGNUM
)
968 else if (reg_nr
== FPSCR_C_REGNUM
)
969 base_regnum
= FPSCR_REGNUM
; /*???? this register is a mess. */
971 else if (reg_nr
== FPUL_C_REGNUM
)
972 base_regnum
= FP0_REGNUM
+ 32;
977 /* Given a register number RN (according to the gdb scheme) , return
978 its corresponding architectural register. In media mode, only a
979 subset of the registers is pseudo registers. For compact mode, all
980 the registers are pseudo. */
982 translate_rn_to_arch_reg_num (int rn
, int media_mode
)
987 if (!is_media_pseudo (rn
))
990 return sh64_media_reg_base_num (rn
);
993 /* All compact registers are pseudo. */
994 return sh64_compact_reg_base_num (rn
);
998 sign_extend (int value
, int bits
)
1000 value
= value
& ((1 << bits
) - 1);
1001 return (value
& (1 << (bits
- 1))
1002 ? value
| (~((1 << bits
) - 1))
1007 sh64_nofp_frame_init_saved_regs (struct frame_info
*fi
)
1009 int *where
= (int *) alloca ((NUM_REGS
+ NUM_PSEUDO_REGS
) * sizeof (int));
1021 int gdb_register_number
;
1022 int register_number
;
1023 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
), get_frame_base (fi
));
1024 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1026 if (deprecated_get_frame_saved_regs (fi
) == NULL
)
1027 frame_saved_regs_zalloc (fi
);
1029 memset (deprecated_get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
1033 /* DANGER! This is ONLY going to work if the char buffer format of
1034 the saved registers is byte-for-byte identical to the
1035 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
1036 memcpy (deprecated_get_frame_saved_regs (fi
), dummy_regs
, SIZEOF_FRAME_SAVED_REGS
);
1040 get_frame_extra_info (fi
)->leaf_function
= 1;
1041 get_frame_extra_info (fi
)->f_offset
= 0;
1043 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1048 /* Loop around examining the prologue insns until we find something
1049 that does not appear to be part of the prologue. But give up
1050 after 20 of them, since we're getting silly then. */
1052 pc
= get_frame_func (fi
);
1055 deprecated_update_frame_pc_hack (fi
, 0);
1059 if (pc_is_isa32 (pc
))
1070 /* The frame pointer register is general register 14 in shmedia and
1071 shcompact modes. In sh compact it is a pseudo register. Same goes
1072 for the stack pointer register, which is register 15. */
1073 fp_regnum
= translate_insn_rn (DEPRECATED_FP_REGNUM
, media_mode
);
1074 sp_regnum
= translate_insn_rn (SP_REGNUM
, media_mode
);
1076 for (opc
= pc
+ (insn_size
* 28); pc
< opc
; pc
+= insn_size
)
1078 insn
= read_memory_integer (media_mode
? UNMAKE_ISA32_ADDR (pc
) : pc
,
1081 if (media_mode
== 0)
1083 if (IS_STS_PR (insn
))
1085 int next_insn
= read_memory_integer (pc
+ insn_size
, insn_size
);
1086 if (IS_MOV_TO_R15 (next_insn
))
1088 int reg_nr
= PR_C_REGNUM
;
1090 where
[reg_nr
] = depth
- ((((next_insn
& 0xf) ^ 0x8) - 0x8) << 2);
1091 get_frame_extra_info (fi
)->leaf_function
= 0;
1095 else if (IS_MOV_R14 (insn
))
1097 where
[fp_regnum
] = depth
- ((((insn
& 0xf) ^ 0x8) - 0x8) << 2);
1100 else if (IS_MOV_R0 (insn
))
1102 /* Put in R0 the offset from SP at which to store some
1103 registers. We are interested in this value, because it
1104 will tell us where the given registers are stored within
1106 r0_val
= ((insn
& 0xff) ^ 0x80) - 0x80;
1108 else if (IS_ADD_SP_R0 (insn
))
1110 /* This instruction still prepares r0, but we don't care.
1111 We already have the offset in r0_val. */
1113 else if (IS_STS_R0 (insn
))
1115 /* Store PR at r0_val-4 from SP. Decrement r0 by 4*/
1116 int reg_nr
= PR_C_REGNUM
;
1117 where
[reg_nr
] = depth
- (r0_val
- 4);
1119 get_frame_extra_info (fi
)->leaf_function
= 0;
1121 else if (IS_MOV_R14_R0 (insn
))
1123 /* Store R14 at r0_val-4 from SP. Decrement r0 by 4 */
1124 where
[fp_regnum
] = depth
- (r0_val
- 4);
1128 else if (IS_ADD_SP (insn
))
1130 depth
-= ((insn
& 0xff) ^ 0x80) - 0x80;
1132 else if (IS_MOV_SP_FP (insn
))
1137 if (IS_ADDIL_SP_MEDIA (insn
)
1138 || IS_ADDI_SP_MEDIA (insn
))
1140 depth
-= sign_extend ((((insn
& 0xffc00) ^ 0x80000) - 0x80000) >> 10, 9);
1143 else if (IS_STQ_R18_R15 (insn
))
1146 depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 3);
1147 get_frame_extra_info (fi
)->leaf_function
= 0;
1150 else if (IS_STL_R18_R15 (insn
))
1153 depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 2);
1154 get_frame_extra_info (fi
)->leaf_function
= 0;
1157 else if (IS_STQ_R14_R15 (insn
))
1159 where
[fp_regnum
] = depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 3);
1162 else if (IS_STL_R14_R15 (insn
))
1164 where
[fp_regnum
] = depth
- (sign_extend ((insn
& 0xffc00) >> 10, 9) << 2);
1167 else if (IS_MOV_SP_FP_MEDIA (insn
))
1172 /* Now we know how deep things are, we can work out their addresses. */
1173 for (rn
= 0; rn
< NUM_REGS
+ NUM_PSEUDO_REGS
; rn
++)
1175 register_number
= translate_rn_to_arch_reg_num (rn
, media_mode
);
1179 if (rn
== fp_regnum
)
1182 /* Watch out! saved_regs is only for the real registers, and
1183 doesn't include space for the pseudo registers. */
1184 deprecated_get_frame_saved_regs (fi
)[register_number
]= get_frame_base (fi
) - where
[rn
] + depth
;
1188 deprecated_get_frame_saved_regs (fi
)[register_number
] = 0;
1193 /* SP_REGNUM is 15. For shmedia 15 is the real register. For
1194 shcompact 15 is the arch register corresponding to the pseudo
1195 register r15 which still is the SP register. */
1196 /* The place on the stack where fp is stored contains the sp of
1198 /* Again, saved_registers contains only space for the real
1199 registers, so we store in DEPRECATED_FP_REGNUM position. */
1201 if (tdep
->sh_abi
== SH_ABI_32
)
1204 size
= DEPRECATED_REGISTER_RAW_SIZE (fp_regnum
);
1205 deprecated_get_frame_saved_regs (fi
)[sp_regnum
] = read_memory_integer (deprecated_get_frame_saved_regs (fi
)[fp_regnum
], size
);
1208 deprecated_get_frame_saved_regs (fi
)[sp_regnum
] = get_frame_base (fi
);
1210 get_frame_extra_info (fi
)->f_offset
= depth
- where
[fp_regnum
];
1213 /* Initialize the extra info saved in a FRAME */
1215 sh64_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1217 int media_mode
= pc_is_isa32 (get_frame_pc (fi
));
1219 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1221 if (get_next_frame (fi
))
1222 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1224 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
1225 get_frame_base (fi
)))
1227 /* We need to setup fi->frame here because call_function_by_hand
1228 gets it wrong by assuming it's always FP. */
1229 deprecated_update_frame_base_hack (fi
, deprecated_read_register_dummy (get_frame_pc (fi
), get_frame_base (fi
), SP_REGNUM
));
1230 get_frame_extra_info (fi
)->return_pc
=
1231 deprecated_read_register_dummy (get_frame_pc (fi
),
1232 get_frame_base (fi
), PC_REGNUM
);
1233 get_frame_extra_info (fi
)->f_offset
= -(DEPRECATED_CALL_DUMMY_LENGTH
+ 4);
1234 get_frame_extra_info (fi
)->leaf_function
= 0;
1239 DEPRECATED_FRAME_INIT_SAVED_REGS (fi
);
1240 get_frame_extra_info (fi
)->return_pc
=
1241 sh64_get_saved_pr (fi
, PR_REGNUM
);
1246 sh64_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
1247 struct frame_info
*frame
, int regnum
,
1248 enum lval_type
*lval
)
1251 int live_regnum
= regnum
;
1252 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1254 if (!target_has_registers
)
1255 error ("No registers.");
1257 /* Normal systems don't optimize out things with register numbers. */
1258 if (optimized
!= NULL
)
1261 if (addrp
) /* default assumption: not found in memory */
1265 memset (raw_buffer
, 0, sizeof (raw_buffer
));
1267 /* We must do this here, before the following while loop changes
1268 frame, and makes it NULL. If this is a media register number,
1269 but we are in compact mode, it will become the corresponding
1270 compact pseudo register. If there is no corresponding compact
1271 pseudo-register what do we do?*/
1272 media_mode
= pc_is_isa32 (get_frame_pc (frame
));
1273 live_regnum
= translate_insn_rn (regnum
, media_mode
);
1275 /* Note: since the current frame's registers could only have been
1276 saved by frames INTERIOR TO the current frame, we skip examining
1277 the current frame itself: otherwise, we would be getting the
1278 previous frame's registers which were saved by the current frame. */
1280 while (frame
&& ((frame
= get_next_frame (frame
)) != NULL
))
1282 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1283 get_frame_base (frame
),
1284 get_frame_base (frame
)))
1286 if (lval
) /* found it in a CALL_DUMMY frame */
1290 (deprecated_generic_find_dummy_frame (get_frame_pc (frame
), get_frame_base (frame
))
1291 + DEPRECATED_REGISTER_BYTE (regnum
)),
1292 DEPRECATED_REGISTER_RAW_SIZE (regnum
));
1296 DEPRECATED_FRAME_INIT_SAVED_REGS (frame
);
1297 if (deprecated_get_frame_saved_regs (frame
) != NULL
1298 && deprecated_get_frame_saved_regs (frame
)[regnum
] != 0)
1300 if (lval
) /* found it saved on the stack */
1301 *lval
= lval_memory
;
1302 if (regnum
== SP_REGNUM
)
1304 if (raw_buffer
) /* SP register treated specially */
1305 store_unsigned_integer (raw_buffer
, DEPRECATED_REGISTER_RAW_SIZE (regnum
),
1306 deprecated_get_frame_saved_regs (frame
)[regnum
]);
1309 { /* any other register */
1312 *addrp
= deprecated_get_frame_saved_regs (frame
)[regnum
];
1316 if (tdep
->sh_abi
== SH_ABI_32
1317 && (live_regnum
== DEPRECATED_FP_REGNUM
1318 || live_regnum
== PR_REGNUM
))
1321 size
= DEPRECATED_REGISTER_RAW_SIZE (live_regnum
);
1322 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
1323 read_memory (deprecated_get_frame_saved_regs (frame
)[regnum
], raw_buffer
, size
);
1325 read_memory (deprecated_get_frame_saved_regs (frame
)[regnum
],
1327 + DEPRECATED_REGISTER_RAW_SIZE (live_regnum
)
1336 /* If we get thru the loop to this point, it means the register was
1337 not saved in any frame. Return the actual live-register value. */
1339 if (lval
) /* found it in a live register */
1340 *lval
= lval_register
;
1342 *addrp
= DEPRECATED_REGISTER_BYTE (live_regnum
);
1344 deprecated_read_register_gen (live_regnum
, raw_buffer
);
1348 sh64_extract_struct_value_address (char *regbuf
)
1350 return (extract_unsigned_integer ((regbuf
+ DEPRECATED_REGISTER_BYTE (STRUCT_RETURN_REGNUM
)),
1351 DEPRECATED_REGISTER_RAW_SIZE (STRUCT_RETURN_REGNUM
)));
1355 sh_frame_saved_pc (struct frame_info
*frame
)
1357 return (get_frame_extra_info (frame
)->return_pc
);
1360 /* Discard from the stack the innermost frame, restoring all saved registers.
1361 Used in the 'return' command. */
1363 sh64_pop_frame (void)
1365 struct frame_info
*frame
= get_current_frame ();
1368 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1370 int media_mode
= pc_is_isa32 (get_frame_pc (frame
));
1372 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1373 get_frame_base (frame
),
1374 get_frame_base (frame
)))
1375 generic_pop_dummy_frame ();
1378 fp
= get_frame_base (frame
);
1379 DEPRECATED_FRAME_INIT_SAVED_REGS (frame
);
1381 /* Copy regs from where they were saved in the frame */
1382 for (regnum
= 0; regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
; regnum
++)
1383 if (deprecated_get_frame_saved_regs (frame
)[regnum
])
1386 if (tdep
->sh_abi
== SH_ABI_32
1387 && (regnum
== DEPRECATED_FP_REGNUM
1388 || regnum
== PR_REGNUM
))
1391 size
= DEPRECATED_REGISTER_RAW_SIZE (translate_insn_rn (regnum
,
1393 write_register (regnum
,
1394 read_memory_integer (deprecated_get_frame_saved_regs (frame
)[regnum
],
1398 write_register (PC_REGNUM
, get_frame_extra_info (frame
)->return_pc
);
1399 write_register (SP_REGNUM
, fp
+ 8);
1401 flush_cached_frames ();
1405 sh_frame_align (struct gdbarch
*ignore
, CORE_ADDR sp
)
1410 /* Function: push_arguments
1411 Setup the function arguments for calling a function in the inferior.
1413 On the Renesas SH architecture, there are four registers (R4 to R7)
1414 which are dedicated for passing function arguments. Up to the first
1415 four arguments (depending on size) may go into these registers.
1416 The rest go on the stack.
1418 Arguments that are smaller than 4 bytes will still take up a whole
1419 register or a whole 32-bit word on the stack, and will be
1420 right-justified in the register or the stack word. This includes
1421 chars, shorts, and small aggregate types.
1423 Arguments that are larger than 4 bytes may be split between two or
1424 more registers. If there are not enough registers free, an argument
1425 may be passed partly in a register (or registers), and partly on the
1426 stack. This includes doubles, long longs, and larger aggregates.
1427 As far as I know, there is no upper limit to the size of aggregates
1428 that will be passed in this way; in other words, the convention of
1429 passing a pointer to a large aggregate instead of a copy is not used.
1431 An exceptional case exists for struct arguments (and possibly other
1432 aggregates such as arrays) if the size is larger than 4 bytes but
1433 not a multiple of 4 bytes. In this case the argument is never split
1434 between the registers and the stack, but instead is copied in its
1435 entirety onto the stack, AND also copied into as many registers as
1436 there is room for. In other words, space in registers permitting,
1437 two copies of the same argument are passed in. As far as I can tell,
1438 only the one on the stack is used, although that may be a function
1439 of the level of compiler optimization. I suspect this is a compiler
1440 bug. Arguments of these odd sizes are left-justified within the
1441 word (as opposed to arguments smaller than 4 bytes, which are
1444 If the function is to return an aggregate type such as a struct, it
1445 is either returned in the normal return value register R0 (if its
1446 size is no greater than one byte), or else the caller must allocate
1447 space into which the callee will copy the return value (if the size
1448 is greater than one byte). In this case, a pointer to the return
1449 value location is passed into the callee in register R2, which does
1450 not displace any of the other arguments passed in via registers R4
1453 /* R2-R9 for integer types and integer equivalent (char, pointers) and
1454 non-scalar (struct, union) elements (even if the elements are
1456 FR0-FR11 for single precision floating point (float)
1457 DR0-DR10 for double precision floating point (double)
1459 If a float is argument number 3 (for instance) and arguments number
1460 1,2, and 4 are integer, the mapping will be:
1461 arg1 -->R2, arg2 --> R3, arg3 -->FR0, arg4 --> R5. I.e. R4 is not used.
1463 If a float is argument number 10 (for instance) and arguments number
1464 1 through 10 are integer, the mapping will be:
1465 arg1->R2, arg2->R3, arg3->R4, arg4->R5, arg5->R6, arg6->R7, arg7->R8,
1466 arg8->R9, arg9->(0,SP)stack(8-byte aligned), arg10->FR0, arg11->stack(16,SP).
1467 I.e. there is hole in the stack.
1469 Different rules apply for variable arguments functions, and for functions
1470 for which the prototype is not known. */
1473 sh64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1474 int struct_return
, CORE_ADDR struct_addr
)
1476 int stack_offset
, stack_alloc
;
1480 int float_arg_index
= 0;
1481 int double_arg_index
= 0;
1491 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1493 memset (fp_args
, 0, sizeof (fp_args
));
1495 /* first force sp to a 8-byte alignment */
1498 /* The "struct return pointer" pseudo-argument has its own dedicated
1502 write_register (STRUCT_RETURN_REGNUM
, struct_addr
);
1504 /* Now make sure there's space on the stack */
1505 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
1506 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 7) & ~7);
1507 sp
-= stack_alloc
; /* make room on stack for args */
1509 /* Now load as many as possible of the first arguments into
1510 registers, and push the rest onto the stack. There are 64 bytes
1511 in eight registers available. Loop thru args from first to last. */
1513 int_argreg
= ARG0_REGNUM
;
1514 float_argreg
= FP0_REGNUM
;
1515 double_argreg
= DR0_REGNUM
;
1517 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
1519 type
= VALUE_TYPE (args
[argnum
]);
1520 len
= TYPE_LENGTH (type
);
1521 memset (valbuf
, 0, sizeof (valbuf
));
1523 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
1525 argreg_size
= DEPRECATED_REGISTER_RAW_SIZE (int_argreg
);
1527 if (len
< argreg_size
)
1529 /* value gets right-justified in the register or stack word */
1530 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1531 memcpy (valbuf
+ argreg_size
- len
,
1532 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
1534 memcpy (valbuf
, (char *) VALUE_CONTENTS (args
[argnum
]), len
);
1539 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1543 if (int_argreg
> ARGLAST_REGNUM
)
1545 /* must go on the stack */
1546 write_memory (sp
+ stack_offset
, val
, argreg_size
);
1547 stack_offset
+= 8;/*argreg_size;*/
1549 /* NOTE WELL!!!!! This is not an "else if" clause!!!
1550 That's because some *&^%$ things get passed on the stack
1551 AND in the registers! */
1552 if (int_argreg
<= ARGLAST_REGNUM
)
1554 /* there's room in a register */
1555 regval
= extract_unsigned_integer (val
, argreg_size
);
1556 write_register (int_argreg
, regval
);
1558 /* Store the value 8 bytes at a time. This means that
1559 things larger than 8 bytes may go partly in registers
1560 and partly on the stack. FIXME: argreg is incremented
1561 before we use its size. */
1569 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1572 /* Where is it going to be stored? */
1573 while (fp_args
[float_arg_index
])
1576 /* Now float_argreg points to the register where it
1577 should be stored. Are we still within the allowed
1579 if (float_arg_index
<= FLOAT_ARGLAST_REGNUM
)
1581 /* Goes in FR0...FR11 */
1582 deprecated_write_register_gen (FP0_REGNUM
+ float_arg_index
,
1584 fp_args
[float_arg_index
] = 1;
1585 /* Skip the corresponding general argument register. */
1590 /* Store it as the integers, 8 bytes at the time, if
1591 necessary spilling on the stack. */
1596 /* Where is it going to be stored? */
1597 while (fp_args
[double_arg_index
])
1598 double_arg_index
+= 2;
1599 /* Now double_argreg points to the register
1600 where it should be stored.
1601 Are we still within the allowed register set? */
1602 if (double_arg_index
< FLOAT_ARGLAST_REGNUM
)
1604 /* Goes in DR0...DR10 */
1605 /* The numbering of the DRi registers is consecutive,
1606 i.e. includes odd numbers. */
1607 int double_register_offset
= double_arg_index
/ 2;
1608 int regnum
= DR0_REGNUM
+
1609 double_register_offset
;
1611 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
1613 memset (valbuf_tmp
, 0, sizeof (valbuf_tmp
));
1614 DEPRECATED_REGISTER_CONVERT_TO_VIRTUAL (regnum
,
1620 /* Note: must use write_register_gen here instead
1621 of regcache_raw_write, because
1622 regcache_raw_write works only for real
1623 registers, not pseudo. write_register_gen will
1624 call the gdbarch function to do register
1625 writes, and that will properly know how to deal
1627 deprecated_write_register_gen (regnum
, val
);
1628 fp_args
[double_arg_index
] = 1;
1629 fp_args
[double_arg_index
+ 1] = 1;
1630 /* Skip the corresponding general argument register. */
1635 /* Store it as the integers, 8 bytes at the time, if
1636 necessary spilling on the stack. */
1643 /* Function: push_return_address (pc)
1644 Set up the return address for the inferior function call.
1645 Needed for targets where we don't actually execute a JSR/BSR instruction */
1648 sh64_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1650 write_register (PR_REGNUM
, entry_point_address ());
1654 /* Find a function's return value in the appropriate registers (in
1655 regbuf), and copy it into valbuf. Extract from an array REGBUF
1656 containing the (raw) register state a function return value of type
1657 TYPE, and copy that, in virtual format, into VALBUF. */
1659 sh64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
1662 int return_register
;
1663 int len
= TYPE_LENGTH (type
);
1664 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1666 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1670 /* Return value stored in FP0_REGNUM */
1671 return_register
= FP0_REGNUM
;
1672 offset
= DEPRECATED_REGISTER_BYTE (return_register
);
1673 memcpy (valbuf
, (char *) regbuf
+ offset
, len
);
1677 /* return value stored in DR0_REGNUM */
1680 return_register
= DR0_REGNUM
;
1681 offset
= DEPRECATED_REGISTER_BYTE (return_register
);
1683 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
1684 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
,
1685 (char *) regbuf
+ offset
, &val
);
1687 floatformat_to_doublest (&floatformat_ieee_double_big
,
1688 (char *) regbuf
+ offset
, &val
);
1689 deprecated_store_floating (valbuf
, len
, val
);
1696 /* Result is in register 2. If smaller than 8 bytes, it is padded
1697 at the most significant end. */
1698 return_register
= DEFAULT_RETURN_REGNUM
;
1699 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1700 offset
= DEPRECATED_REGISTER_BYTE (return_register
) +
1701 DEPRECATED_REGISTER_RAW_SIZE (return_register
) - len
;
1703 offset
= DEPRECATED_REGISTER_BYTE (return_register
);
1704 memcpy (valbuf
, (char *) regbuf
+ offset
, len
);
1707 error ("bad size for return value");
1711 /* Write into appropriate registers a function return value
1712 of type TYPE, given in virtual format.
1713 If the architecture is sh4 or sh3e, store a function's return value
1714 in the R0 general register or in the FP0 floating point register,
1715 depending on the type of the return value. In all the other cases
1716 the result is stored in r0, left-justified. */
1719 sh64_store_return_value (struct type
*type
, char *valbuf
)
1721 char buf
[64]; /* more than enough... */
1722 int len
= TYPE_LENGTH (type
);
1724 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1728 /* Return value stored in FP0_REGNUM */
1729 deprecated_write_register_gen (FP0_REGNUM
, valbuf
);
1733 /* return value stored in DR0_REGNUM */
1734 /* FIXME: Implement */
1739 int return_register
= DEFAULT_RETURN_REGNUM
;
1742 if (len
<= DEPRECATED_REGISTER_RAW_SIZE (return_register
))
1744 /* Pad with zeros. */
1745 memset (buf
, 0, DEPRECATED_REGISTER_RAW_SIZE (return_register
));
1746 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
1747 offset
= 0; /*DEPRECATED_REGISTER_RAW_SIZE (return_register) - len;*/
1749 offset
= DEPRECATED_REGISTER_RAW_SIZE (return_register
) - len
;
1751 memcpy (buf
+ offset
, valbuf
, len
);
1752 deprecated_write_register_gen (return_register
, buf
);
1755 deprecated_write_register_gen (return_register
, valbuf
);
1760 sh64_show_media_regs (void)
1763 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1765 printf_filtered ("PC=%s SR=%016llx \n",
1766 paddr (read_register (PC_REGNUM
)),
1767 (long long) read_register (SR_REGNUM
));
1769 printf_filtered ("SSR=%016llx SPC=%016llx \n",
1770 (long long) read_register (SSR_REGNUM
),
1771 (long long) read_register (SPC_REGNUM
));
1772 printf_filtered ("FPSCR=%016lx\n ",
1773 (long) read_register (FPSCR_REGNUM
));
1775 for (i
= 0; i
< 64; i
= i
+ 4)
1776 printf_filtered ("\nR%d-R%d %016llx %016llx %016llx %016llx\n",
1778 (long long) read_register (i
+ 0),
1779 (long long) read_register (i
+ 1),
1780 (long long) read_register (i
+ 2),
1781 (long long) read_register (i
+ 3));
1783 printf_filtered ("\n");
1785 for (i
= 0; i
< 64; i
= i
+ 8)
1786 printf_filtered ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1788 (long) read_register (FP0_REGNUM
+ i
+ 0),
1789 (long) read_register (FP0_REGNUM
+ i
+ 1),
1790 (long) read_register (FP0_REGNUM
+ i
+ 2),
1791 (long) read_register (FP0_REGNUM
+ i
+ 3),
1792 (long) read_register (FP0_REGNUM
+ i
+ 4),
1793 (long) read_register (FP0_REGNUM
+ i
+ 5),
1794 (long) read_register (FP0_REGNUM
+ i
+ 6),
1795 (long) read_register (FP0_REGNUM
+ i
+ 7));
1799 sh64_show_compact_regs (void)
1802 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1804 printf_filtered ("PC=%s \n",
1805 paddr (read_register (PC_C_REGNUM
)));
1807 printf_filtered ("GBR=%08lx MACH=%08lx MACL=%08lx PR=%08lx T=%08lx\n",
1808 (long) read_register (GBR_C_REGNUM
),
1809 (long) read_register (MACH_C_REGNUM
),
1810 (long) read_register (MACL_C_REGNUM
),
1811 (long) read_register (PR_C_REGNUM
),
1812 (long) read_register (T_C_REGNUM
));
1813 printf_filtered ("FPSCR=%08lx FPUL=%08lx\n",
1814 (long) read_register (FPSCR_C_REGNUM
),
1815 (long) read_register (FPUL_C_REGNUM
));
1817 for (i
= 0; i
< 16; i
= i
+ 4)
1818 printf_filtered ("\nR%d-R%d %08lx %08lx %08lx %08lx\n",
1820 (long) read_register (i
+ 0),
1821 (long) read_register (i
+ 1),
1822 (long) read_register (i
+ 2),
1823 (long) read_register (i
+ 3));
1825 printf_filtered ("\n");
1827 for (i
= 0; i
< 16; i
= i
+ 8)
1828 printf_filtered ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1830 (long) read_register (FP0_REGNUM
+ i
+ 0),
1831 (long) read_register (FP0_REGNUM
+ i
+ 1),
1832 (long) read_register (FP0_REGNUM
+ i
+ 2),
1833 (long) read_register (FP0_REGNUM
+ i
+ 3),
1834 (long) read_register (FP0_REGNUM
+ i
+ 4),
1835 (long) read_register (FP0_REGNUM
+ i
+ 5),
1836 (long) read_register (FP0_REGNUM
+ i
+ 6),
1837 (long) read_register (FP0_REGNUM
+ i
+ 7));
1840 /*FIXME!!! This only shows the registers for shmedia, excluding the
1841 pseudo registers. */
1843 sh64_show_regs (void)
1845 if (deprecated_selected_frame
1846 && pc_is_isa32 (get_frame_pc (deprecated_selected_frame
)))
1847 sh64_show_media_regs ();
1849 sh64_show_compact_regs ();
1854 SH MEDIA MODE (ISA 32)
1855 general registers (64-bit) 0-63
1856 0 r0, r1, r2, r3, r4, r5, r6, r7,
1857 64 r8, r9, r10, r11, r12, r13, r14, r15,
1858 128 r16, r17, r18, r19, r20, r21, r22, r23,
1859 192 r24, r25, r26, r27, r28, r29, r30, r31,
1860 256 r32, r33, r34, r35, r36, r37, r38, r39,
1861 320 r40, r41, r42, r43, r44, r45, r46, r47,
1862 384 r48, r49, r50, r51, r52, r53, r54, r55,
1863 448 r56, r57, r58, r59, r60, r61, r62, r63,
1868 status reg., saved status reg., saved pc reg. (64-bit) 65-67
1871 target registers (64-bit) 68-75
1872 544 tr0, tr1, tr2, tr3, tr4, tr5, tr6, tr7,
1874 floating point state control register (32-bit) 76
1877 single precision floating point registers (32-bit) 77-140
1878 612 fr0, fr1, fr2, fr3, fr4, fr5, fr6, fr7,
1879 644 fr8, fr9, fr10, fr11, fr12, fr13, fr14, fr15,
1880 676 fr16, fr17, fr18, fr19, fr20, fr21, fr22, fr23,
1881 708 fr24, fr25, fr26, fr27, fr28, fr29, fr30, fr31,
1882 740 fr32, fr33, fr34, fr35, fr36, fr37, fr38, fr39,
1883 772 fr40, fr41, fr42, fr43, fr44, fr45, fr46, fr47,
1884 804 fr48, fr49, fr50, fr51, fr52, fr53, fr54, fr55,
1885 836 fr56, fr57, fr58, fr59, fr60, fr61, fr62, fr63,
1887 TOTAL SPACE FOR REGISTERS: 868 bytes
1889 From here on they are all pseudo registers: no memory allocated.
1890 REGISTER_BYTE returns the register byte for the base register.
1892 double precision registers (pseudo) 141-172
1893 dr0, dr2, dr4, dr6, dr8, dr10, dr12, dr14,
1894 dr16, dr18, dr20, dr22, dr24, dr26, dr28, dr30,
1895 dr32, dr34, dr36, dr38, dr40, dr42, dr44, dr46,
1896 dr48, dr50, dr52, dr54, dr56, dr58, dr60, dr62,
1898 floating point pairs (pseudo) 173-204
1899 fp0, fp2, fp4, fp6, fp8, fp10, fp12, fp14,
1900 fp16, fp18, fp20, fp22, fp24, fp26, fp28, fp30,
1901 fp32, fp34, fp36, fp38, fp40, fp42, fp44, fp46,
1902 fp48, fp50, fp52, fp54, fp56, fp58, fp60, fp62,
1904 floating point vectors (4 floating point regs) (pseudo) 205-220
1905 fv0, fv4, fv8, fv12, fv16, fv20, fv24, fv28,
1906 fv32, fv36, fv40, fv44, fv48, fv52, fv56, fv60,
1908 SH COMPACT MODE (ISA 16) (all pseudo) 221-272
1909 r0_c, r1_c, r2_c, r3_c, r4_c, r5_c, r6_c, r7_c,
1910 r8_c, r9_c, r10_c, r11_c, r12_c, r13_c, r14_c, r15_c,
1912 gbr_c, mach_c, macl_c, pr_c, t_c,
1914 fr0_c, fr1_c, fr2_c, fr3_c, fr4_c, fr5_c, fr6_c, fr7_c,
1915 fr8_c, fr9_c, fr10_c, fr11_c, fr12_c, fr13_c, fr14_c, fr15_c
1916 dr0_c, dr2_c, dr4_c, dr6_c, dr8_c, dr10_c, dr12_c, dr14_c
1917 fv0_c, fv4_c, fv8_c, fv12_c
1921 sh_sh64_register_byte (int reg_nr
)
1923 int base_regnum
= -1;
1924 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1926 /* If it is a pseudo register, get the number of the first floating
1927 point register that is part of it. */
1928 if (reg_nr
>= DR0_REGNUM
1929 && reg_nr
<= DR_LAST_REGNUM
)
1930 base_regnum
= dr_reg_base_num (reg_nr
);
1932 else if (reg_nr
>= FPP0_REGNUM
1933 && reg_nr
<= FPP_LAST_REGNUM
)
1934 base_regnum
= fpp_reg_base_num (reg_nr
);
1936 else if (reg_nr
>= FV0_REGNUM
1937 && reg_nr
<= FV_LAST_REGNUM
)
1938 base_regnum
= fv_reg_base_num (reg_nr
);
1940 /* sh compact pseudo register. FPSCR is a pathological case, need to
1941 treat it as special. */
1942 else if ((reg_nr
>= R0_C_REGNUM
1943 && reg_nr
<= FV_LAST_C_REGNUM
)
1944 && reg_nr
!= FPSCR_C_REGNUM
)
1945 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
1947 /* Now return the offset in bytes within the register cache. */
1948 /* sh media pseudo register, i.e. any of DR, FFP, FV registers. */
1949 if (reg_nr
>= DR0_REGNUM
1950 && reg_nr
<= FV_LAST_REGNUM
)
1951 return (base_regnum
- FP0_REGNUM
+ 1) * 4
1952 + (TR7_REGNUM
+ 1) * 8;
1954 /* sh compact pseudo register: general register */
1955 if ((reg_nr
>= R0_C_REGNUM
1956 && reg_nr
<= R_LAST_C_REGNUM
))
1957 return (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1958 ? base_regnum
* 8 + 4
1961 /* sh compact pseudo register: */
1962 if (reg_nr
== PC_C_REGNUM
1963 || reg_nr
== GBR_C_REGNUM
1964 || reg_nr
== MACL_C_REGNUM
1965 || reg_nr
== PR_C_REGNUM
)
1966 return (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1967 ? base_regnum
* 8 + 4
1970 if (reg_nr
== MACH_C_REGNUM
)
1971 return base_regnum
* 8;
1973 if (reg_nr
== T_C_REGNUM
)
1974 return base_regnum
* 8; /* FIXME??? how do we get bit 0? Do we have to? */
1976 /* sh compact pseudo register: floating point register */
1977 else if (reg_nr
>= FP0_C_REGNUM
1978 && reg_nr
<= FV_LAST_C_REGNUM
)
1979 return (base_regnum
- FP0_REGNUM
) * 4
1980 + (TR7_REGNUM
+ 1) * 8 + 4;
1982 else if (reg_nr
== FPSCR_C_REGNUM
)
1983 /* This is complicated, for now return the beginning of the
1984 architectural FPSCR register. */
1985 return (TR7_REGNUM
+ 1) * 8;
1987 else if (reg_nr
== FPUL_C_REGNUM
)
1988 return ((base_regnum
- FP0_REGNUM
) * 4 +
1989 (TR7_REGNUM
+ 1) * 8 + 4);
1991 /* It is not a pseudo register. */
1992 /* It is a 64 bit register. */
1993 else if (reg_nr
<= TR7_REGNUM
)
1996 /* It is a 32 bit register. */
1997 else if (reg_nr
== FPSCR_REGNUM
)
1998 return (FPSCR_REGNUM
* 8);
2000 /* It is floating point 32-bit register */
2002 return ((TR7_REGNUM
+ 1) * 8
2003 + (reg_nr
- FP0_REGNUM
+ 1) * 4);
2007 sh_sh64_register_raw_size (int reg_nr
)
2009 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2011 if ((reg_nr
>= DR0_REGNUM
2012 && reg_nr
<= DR_LAST_REGNUM
)
2013 || (reg_nr
>= FPP0_REGNUM
2014 && reg_nr
<= FPP_LAST_REGNUM
)
2015 || (reg_nr
>= DR0_C_REGNUM
2016 && reg_nr
<= DR_LAST_C_REGNUM
)
2017 || (reg_nr
<= TR7_REGNUM
))
2020 else if ((reg_nr
>= FV0_REGNUM
2021 && reg_nr
<= FV_LAST_REGNUM
)
2022 || (reg_nr
>= FV0_C_REGNUM
2023 && reg_nr
<= FV_LAST_C_REGNUM
))
2026 else /* this covers also the 32-bit SH compact registers. */
2032 sh_sh64_register_virtual_size (int reg_nr
)
2034 if (reg_nr
>= FP0_REGNUM
2035 && reg_nr
<= FP_LAST_REGNUM
)
2041 static struct type
*
2042 sh_sh64_build_float_register_type (int high
)
2046 temp
= create_range_type (NULL
, builtin_type_int
, 0, high
);
2047 return create_array_type (NULL
, builtin_type_float
, temp
);
2050 static struct type
*
2051 sh_sh64_register_virtual_type (int reg_nr
)
2053 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2055 if ((reg_nr
>= FP0_REGNUM
2056 && reg_nr
<= FP_LAST_REGNUM
)
2057 || (reg_nr
>= FP0_C_REGNUM
2058 && reg_nr
<= FP_LAST_C_REGNUM
))
2059 return builtin_type_float
;
2060 else if ((reg_nr
>= DR0_REGNUM
2061 && reg_nr
<= DR_LAST_REGNUM
)
2062 || (reg_nr
>= DR0_C_REGNUM
2063 && reg_nr
<= DR_LAST_C_REGNUM
))
2064 return builtin_type_double
;
2065 else if (reg_nr
>= FPP0_REGNUM
2066 && reg_nr
<= FPP_LAST_REGNUM
)
2067 return sh_sh64_build_float_register_type (1);
2068 else if ((reg_nr
>= FV0_REGNUM
2069 && reg_nr
<= FV_LAST_REGNUM
)
2070 ||(reg_nr
>= FV0_C_REGNUM
2071 && reg_nr
<= FV_LAST_C_REGNUM
))
2072 return sh_sh64_build_float_register_type (3);
2073 else if (reg_nr
== FPSCR_REGNUM
)
2074 return builtin_type_int
;
2075 else if (reg_nr
>= R0_C_REGNUM
2076 && reg_nr
< FP0_C_REGNUM
)
2077 return builtin_type_int
;
2079 return builtin_type_long_long
;
2083 sh_sh64_register_convert_to_virtual (int regnum
, struct type
*type
,
2084 char *from
, char *to
)
2086 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2088 if (TARGET_BYTE_ORDER
!= BFD_ENDIAN_LITTLE
)
2090 /* It is a no-op. */
2091 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (regnum
));
2095 if ((regnum
>= DR0_REGNUM
2096 && regnum
<= DR_LAST_REGNUM
)
2097 || (regnum
>= DR0_C_REGNUM
2098 && regnum
<= DR_LAST_C_REGNUM
))
2101 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword
, from
, &val
);
2102 deprecated_store_floating(to
, TYPE_LENGTH(type
), val
);
2105 error("sh_register_convert_to_virtual called with non DR register number");
2109 sh_sh64_register_convert_to_raw (struct type
*type
, int regnum
,
2110 const void *from
, void *to
)
2112 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2114 if (TARGET_BYTE_ORDER
!= BFD_ENDIAN_LITTLE
)
2116 /* It is a no-op. */
2117 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (regnum
));
2121 if ((regnum
>= DR0_REGNUM
2122 && regnum
<= DR_LAST_REGNUM
)
2123 || (regnum
>= DR0_C_REGNUM
2124 && regnum
<= DR_LAST_C_REGNUM
))
2126 DOUBLEST val
= deprecated_extract_floating (from
, TYPE_LENGTH(type
));
2127 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword
, &val
, to
);
2130 error("sh_register_convert_to_raw called with non DR register number");
2134 sh64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
2135 int reg_nr
, void *buffer
)
2140 char temp_buffer
[MAX_REGISTER_SIZE
];
2141 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2143 if (reg_nr
>= DR0_REGNUM
2144 && reg_nr
<= DR_LAST_REGNUM
)
2146 base_regnum
= dr_reg_base_num (reg_nr
);
2148 /* Build the value in the provided buffer. */
2149 /* DR regs are double precision registers obtained by
2150 concatenating 2 single precision floating point registers. */
2151 for (portion
= 0; portion
< 2; portion
++)
2152 regcache_raw_read (regcache
, base_regnum
+ portion
,
2154 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2156 /* We must pay attention to the endiannes. */
2157 sh_sh64_register_convert_to_virtual (reg_nr
, DEPRECATED_REGISTER_VIRTUAL_TYPE (reg_nr
),
2158 temp_buffer
, buffer
);
2162 else if (reg_nr
>= FPP0_REGNUM
2163 && reg_nr
<= FPP_LAST_REGNUM
)
2165 base_regnum
= fpp_reg_base_num (reg_nr
);
2167 /* Build the value in the provided buffer. */
2168 /* FPP regs are pairs of single precision registers obtained by
2169 concatenating 2 single precision floating point registers. */
2170 for (portion
= 0; portion
< 2; portion
++)
2171 regcache_raw_read (regcache
, base_regnum
+ portion
,
2173 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2176 else if (reg_nr
>= FV0_REGNUM
2177 && reg_nr
<= FV_LAST_REGNUM
)
2179 base_regnum
= fv_reg_base_num (reg_nr
);
2181 /* Build the value in the provided buffer. */
2182 /* FV regs are vectors of single precision registers obtained by
2183 concatenating 4 single precision floating point registers. */
2184 for (portion
= 0; portion
< 4; portion
++)
2185 regcache_raw_read (regcache
, base_regnum
+ portion
,
2187 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2190 /* sh compact pseudo registers. 1-to-1 with a shmedia register */
2191 else if (reg_nr
>= R0_C_REGNUM
2192 && reg_nr
<= T_C_REGNUM
)
2194 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2196 /* Build the value in the provided buffer. */
2197 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
2198 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2200 memcpy (buffer
, temp_buffer
+ offset
, 4); /* get LOWER 32 bits only????*/
2203 else if (reg_nr
>= FP0_C_REGNUM
2204 && reg_nr
<= FP_LAST_C_REGNUM
)
2206 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2208 /* Build the value in the provided buffer. */
2209 /* Floating point registers map 1-1 to the media fp regs,
2210 they have the same size and endienness. */
2211 regcache_raw_read (regcache
, base_regnum
, buffer
);
2214 else if (reg_nr
>= DR0_C_REGNUM
2215 && reg_nr
<= DR_LAST_C_REGNUM
)
2217 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2219 /* DR_C regs are double precision registers obtained by
2220 concatenating 2 single precision floating point registers. */
2221 for (portion
= 0; portion
< 2; portion
++)
2222 regcache_raw_read (regcache
, base_regnum
+ portion
,
2224 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2226 /* We must pay attention to the endiannes. */
2227 sh_sh64_register_convert_to_virtual (reg_nr
, DEPRECATED_REGISTER_VIRTUAL_TYPE (reg_nr
),
2228 temp_buffer
, buffer
);
2231 else if (reg_nr
>= FV0_C_REGNUM
2232 && reg_nr
<= FV_LAST_C_REGNUM
)
2234 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2236 /* Build the value in the provided buffer. */
2237 /* FV_C regs are vectors of single precision registers obtained by
2238 concatenating 4 single precision floating point registers. */
2239 for (portion
= 0; portion
< 4; portion
++)
2240 regcache_raw_read (regcache
, base_regnum
+ portion
,
2242 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2245 else if (reg_nr
== FPSCR_C_REGNUM
)
2247 int fpscr_base_regnum
;
2249 unsigned int fpscr_value
;
2250 unsigned int sr_value
;
2251 unsigned int fpscr_c_value
;
2252 unsigned int fpscr_c_part1_value
;
2253 unsigned int fpscr_c_part2_value
;
2255 fpscr_base_regnum
= FPSCR_REGNUM
;
2256 sr_base_regnum
= SR_REGNUM
;
2258 /* Build the value in the provided buffer. */
2259 /* FPSCR_C is a very weird register that contains sparse bits
2260 from the FPSCR and the SR architectural registers.
2267 2-17 Bit 2-18 of FPSCR
2268 18-20 Bits 12,13,14 of SR
2272 /* Get FPSCR into a local buffer */
2273 regcache_raw_read (regcache
, fpscr_base_regnum
, temp_buffer
);
2274 /* Get value as an int. */
2275 fpscr_value
= extract_unsigned_integer (temp_buffer
, 4);
2276 /* Get SR into a local buffer */
2277 regcache_raw_read (regcache
, sr_base_regnum
, temp_buffer
);
2278 /* Get value as an int. */
2279 sr_value
= extract_unsigned_integer (temp_buffer
, 4);
2280 /* Build the new value. */
2281 fpscr_c_part1_value
= fpscr_value
& 0x3fffd;
2282 fpscr_c_part2_value
= (sr_value
& 0x7000) << 6;
2283 fpscr_c_value
= fpscr_c_part1_value
| fpscr_c_part2_value
;
2284 /* Store that in out buffer!!! */
2285 store_unsigned_integer (buffer
, 4, fpscr_c_value
);
2286 /* FIXME There is surely an endianness gotcha here. */
2289 else if (reg_nr
== FPUL_C_REGNUM
)
2291 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2293 /* FPUL_C register is floating point register 32,
2294 same size, same endianness. */
2295 regcache_raw_read (regcache
, base_regnum
, buffer
);
2300 sh64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
2301 int reg_nr
, const void *buffer
)
2303 int base_regnum
, portion
;
2305 char temp_buffer
[MAX_REGISTER_SIZE
];
2306 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2308 if (reg_nr
>= DR0_REGNUM
2309 && reg_nr
<= DR_LAST_REGNUM
)
2311 base_regnum
= dr_reg_base_num (reg_nr
);
2312 /* We must pay attention to the endiannes. */
2313 sh_sh64_register_convert_to_raw (DEPRECATED_REGISTER_VIRTUAL_TYPE (reg_nr
), reg_nr
,
2314 buffer
, temp_buffer
);
2317 /* Write the real regs for which this one is an alias. */
2318 for (portion
= 0; portion
< 2; portion
++)
2319 regcache_raw_write (regcache
, base_regnum
+ portion
,
2321 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2324 else if (reg_nr
>= FPP0_REGNUM
2325 && reg_nr
<= FPP_LAST_REGNUM
)
2327 base_regnum
= fpp_reg_base_num (reg_nr
);
2329 /* Write the real regs for which this one is an alias. */
2330 for (portion
= 0; portion
< 2; portion
++)
2331 regcache_raw_write (regcache
, base_regnum
+ portion
,
2333 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2336 else if (reg_nr
>= FV0_REGNUM
2337 && reg_nr
<= FV_LAST_REGNUM
)
2339 base_regnum
= fv_reg_base_num (reg_nr
);
2341 /* Write the real regs for which this one is an alias. */
2342 for (portion
= 0; portion
< 4; portion
++)
2343 regcache_raw_write (regcache
, base_regnum
+ portion
,
2345 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2348 /* sh compact general pseudo registers. 1-to-1 with a shmedia
2349 register but only 4 bytes of it. */
2350 else if (reg_nr
>= R0_C_REGNUM
2351 && reg_nr
<= T_C_REGNUM
)
2353 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2354 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
2355 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2359 /* Let's read the value of the base register into a temporary
2360 buffer, so that overwriting the last four bytes with the new
2361 value of the pseudo will leave the upper 4 bytes unchanged. */
2362 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
2363 /* Write as an 8 byte quantity */
2364 memcpy (temp_buffer
+ offset
, buffer
, 4);
2365 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
2368 /* sh floating point compact pseudo registers. 1-to-1 with a shmedia
2369 registers. Both are 4 bytes. */
2370 else if (reg_nr
>= FP0_C_REGNUM
2371 && reg_nr
<= FP_LAST_C_REGNUM
)
2373 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2374 regcache_raw_write (regcache
, base_regnum
, buffer
);
2377 else if (reg_nr
>= DR0_C_REGNUM
2378 && reg_nr
<= DR_LAST_C_REGNUM
)
2380 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2381 for (portion
= 0; portion
< 2; portion
++)
2383 /* We must pay attention to the endiannes. */
2384 sh_sh64_register_convert_to_raw (DEPRECATED_REGISTER_VIRTUAL_TYPE (reg_nr
), reg_nr
,
2385 buffer
, temp_buffer
);
2387 regcache_raw_write (regcache
, base_regnum
+ portion
,
2389 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2393 else if (reg_nr
>= FV0_C_REGNUM
2394 && reg_nr
<= FV_LAST_C_REGNUM
)
2396 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2398 for (portion
= 0; portion
< 4; portion
++)
2400 regcache_raw_write (regcache
, base_regnum
+ portion
,
2402 + DEPRECATED_REGISTER_RAW_SIZE (base_regnum
) * portion
));
2406 else if (reg_nr
== FPSCR_C_REGNUM
)
2408 int fpscr_base_regnum
;
2410 unsigned int fpscr_value
;
2411 unsigned int sr_value
;
2412 unsigned int old_fpscr_value
;
2413 unsigned int old_sr_value
;
2414 unsigned int fpscr_c_value
;
2415 unsigned int fpscr_mask
;
2416 unsigned int sr_mask
;
2418 fpscr_base_regnum
= FPSCR_REGNUM
;
2419 sr_base_regnum
= SR_REGNUM
;
2421 /* FPSCR_C is a very weird register that contains sparse bits
2422 from the FPSCR and the SR architectural registers.
2429 2-17 Bit 2-18 of FPSCR
2430 18-20 Bits 12,13,14 of SR
2434 /* Get value as an int. */
2435 fpscr_c_value
= extract_unsigned_integer (buffer
, 4);
2437 /* Build the new values. */
2438 fpscr_mask
= 0x0003fffd;
2439 sr_mask
= 0x001c0000;
2441 fpscr_value
= fpscr_c_value
& fpscr_mask
;
2442 sr_value
= (fpscr_value
& sr_mask
) >> 6;
2444 regcache_raw_read (regcache
, fpscr_base_regnum
, temp_buffer
);
2445 old_fpscr_value
= extract_unsigned_integer (temp_buffer
, 4);
2446 old_fpscr_value
&= 0xfffc0002;
2447 fpscr_value
|= old_fpscr_value
;
2448 store_unsigned_integer (temp_buffer
, 4, fpscr_value
);
2449 regcache_raw_write (regcache
, fpscr_base_regnum
, temp_buffer
);
2451 regcache_raw_read (regcache
, sr_base_regnum
, temp_buffer
);
2452 old_sr_value
= extract_unsigned_integer (temp_buffer
, 4);
2453 old_sr_value
&= 0xffff8fff;
2454 sr_value
|= old_sr_value
;
2455 store_unsigned_integer (temp_buffer
, 4, sr_value
);
2456 regcache_raw_write (regcache
, sr_base_regnum
, temp_buffer
);
2459 else if (reg_nr
== FPUL_C_REGNUM
)
2461 base_regnum
= sh64_compact_reg_base_num (reg_nr
);
2462 regcache_raw_write (regcache
, base_regnum
, buffer
);
2466 /* Floating point vector of 4 float registers. */
2468 do_fv_register_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
2471 int first_fp_reg_num
= fv_reg_base_num (fv_regnum
);
2472 fprintf_filtered (file
, "fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
2473 fv_regnum
- FV0_REGNUM
,
2474 (int) read_register (first_fp_reg_num
),
2475 (int) read_register (first_fp_reg_num
+ 1),
2476 (int) read_register (first_fp_reg_num
+ 2),
2477 (int) read_register (first_fp_reg_num
+ 3));
2480 /* Floating point vector of 4 float registers, compact mode. */
2482 do_fv_c_register_info (int fv_regnum
)
2484 int first_fp_reg_num
= sh64_compact_reg_base_num (fv_regnum
);
2485 printf_filtered ("fv%d_c\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
2486 fv_regnum
- FV0_C_REGNUM
,
2487 (int) read_register (first_fp_reg_num
),
2488 (int) read_register (first_fp_reg_num
+ 1),
2489 (int) read_register (first_fp_reg_num
+ 2),
2490 (int) read_register (first_fp_reg_num
+ 3));
2493 /* Pairs of single regs. The DR are instead double precision
2496 do_fpp_register_info (int fpp_regnum
)
2498 int first_fp_reg_num
= fpp_reg_base_num (fpp_regnum
);
2500 printf_filtered ("fpp%d\t0x%08x\t0x%08x\n",
2501 fpp_regnum
- FPP0_REGNUM
,
2502 (int) read_register (first_fp_reg_num
),
2503 (int) read_register (first_fp_reg_num
+ 1));
2506 /* Double precision registers. */
2508 do_dr_register_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
2511 int first_fp_reg_num
= dr_reg_base_num (dr_regnum
);
2513 fprintf_filtered (file
, "dr%d\t0x%08x%08x\n",
2514 dr_regnum
- DR0_REGNUM
,
2515 (int) read_register (first_fp_reg_num
),
2516 (int) read_register (first_fp_reg_num
+ 1));
2519 /* Double precision registers, compact mode. */
2521 do_dr_c_register_info (int dr_regnum
)
2523 int first_fp_reg_num
= sh64_compact_reg_base_num (dr_regnum
);
2525 printf_filtered ("dr%d_c\t0x%08x%08x\n",
2526 dr_regnum
- DR0_C_REGNUM
,
2527 (int) read_register (first_fp_reg_num
),
2528 (int) read_register (first_fp_reg_num
+1));
2531 /* General register in compact mode. */
2533 do_r_c_register_info (int r_c_regnum
)
2535 int regnum
= sh64_compact_reg_base_num (r_c_regnum
);
2537 printf_filtered ("r%d_c\t0x%08x\n",
2538 r_c_regnum
- R0_C_REGNUM
,
2539 /*FIXME!!!*/ (int) read_register (regnum
));
2542 /* FIXME:!! THIS SHOULD TAKE CARE OF GETTING THE RIGHT PORTION OF THE
2543 shmedia REGISTERS. */
2544 /* Control registers, compact mode. */
2546 do_cr_c_register_info (int cr_c_regnum
)
2548 switch (cr_c_regnum
)
2550 case 237: printf_filtered ("pc_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
2552 case 238: printf_filtered ("gbr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
2554 case 239: printf_filtered ("mach_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
2556 case 240: printf_filtered ("macl_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
2558 case 241: printf_filtered ("pr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
2560 case 242: printf_filtered ("t_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
2562 case 243: printf_filtered ("fpscr_c\t0x%08x\n", (int) read_register (cr_c_regnum
));
2564 case 244: printf_filtered ("fpul_c\t0x%08x\n", (int)read_register (cr_c_regnum
));
2570 sh_do_fp_register (struct gdbarch
*gdbarch
, struct ui_file
*file
, int regnum
)
2571 { /* do values for FP (float) regs */
2573 double flt
; /* double extracted from raw hex data */
2577 /* Allocate space for the float. */
2578 raw_buffer
= (char *) alloca (register_size (gdbarch
, FP0_REGNUM
));
2580 /* Get the data in raw format. */
2581 if (!frame_register_read (get_selected_frame (), regnum
, raw_buffer
))
2582 error ("can't read register %d (%s)", regnum
, REGISTER_NAME (regnum
));
2584 /* Get the register as a number */
2585 flt
= unpack_double (builtin_type_float
, raw_buffer
, &inv
);
2587 /* Print the name and some spaces. */
2588 fputs_filtered (REGISTER_NAME (regnum
), file
);
2589 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), file
);
2591 /* Print the value. */
2593 fprintf_filtered (file
, "<invalid float>");
2595 fprintf_filtered (file
, "%-10.9g", flt
);
2597 /* Print the fp register as hex. */
2598 fprintf_filtered (file
, "\t(raw 0x");
2599 for (j
= 0; j
< register_size (gdbarch
, regnum
); j
++)
2601 int idx
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? j
2602 : register_size (gdbarch
, regnum
) - 1 - j
;
2603 fprintf_filtered (file
, "%02x", (unsigned char) raw_buffer
[idx
]);
2605 fprintf_filtered (file
, ")");
2606 fprintf_filtered (file
, "\n");
2610 sh64_do_pseudo_register (int regnum
)
2612 /* All the sh64-compact mode registers are pseudo registers. */
2613 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2615 if (regnum
< NUM_REGS
2616 || regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS_SH_MEDIA
+ NUM_PSEUDO_REGS_SH_COMPACT
)
2617 internal_error (__FILE__
, __LINE__
,
2618 "Invalid pseudo register number %d\n", regnum
);
2620 else if ((regnum
>= DR0_REGNUM
2621 && regnum
<= DR_LAST_REGNUM
))
2622 do_dr_register_info (current_gdbarch
, gdb_stdout
, regnum
);
2624 else if ((regnum
>= DR0_C_REGNUM
2625 && regnum
<= DR_LAST_C_REGNUM
))
2626 do_dr_c_register_info (regnum
);
2628 else if ((regnum
>= FV0_REGNUM
2629 && regnum
<= FV_LAST_REGNUM
))
2630 do_fv_register_info (current_gdbarch
, gdb_stdout
, regnum
);
2632 else if ((regnum
>= FV0_C_REGNUM
2633 && regnum
<= FV_LAST_C_REGNUM
))
2634 do_fv_c_register_info (regnum
);
2636 else if (regnum
>= FPP0_REGNUM
2637 && regnum
<= FPP_LAST_REGNUM
)
2638 do_fpp_register_info (regnum
);
2640 else if (regnum
>= R0_C_REGNUM
2641 && regnum
<= R_LAST_C_REGNUM
)
2642 do_r_c_register_info (regnum
); /* FIXME, this function will not print the right format */
2644 else if (regnum
>= FP0_C_REGNUM
2645 && regnum
<= FP_LAST_C_REGNUM
)
2646 sh_do_fp_register (current_gdbarch
, gdb_stdout
, regnum
); /* this should work also for pseudoregs */
2648 else if (regnum
>= PC_C_REGNUM
2649 && regnum
<= FPUL_C_REGNUM
)
2650 do_cr_c_register_info (regnum
);
2655 sh_do_register (struct gdbarch
*gdbarch
, struct ui_file
*file
, int regnum
)
2657 char raw_buffer
[MAX_REGISTER_SIZE
];
2659 fputs_filtered (REGISTER_NAME (regnum
), file
);
2660 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum
)), file
);
2662 /* Get the data in raw format. */
2663 if (!frame_register_read (get_selected_frame (), regnum
, raw_buffer
))
2664 fprintf_filtered (file
, "*value not available*\n");
2666 val_print (gdbarch_register_type (gdbarch
, regnum
), raw_buffer
, 0, 0,
2667 file
, 'x', 1, 0, Val_pretty_default
);
2668 fprintf_filtered (file
, "\t");
2669 val_print (gdbarch_register_type (gdbarch
, regnum
), raw_buffer
, 0, 0,
2670 file
, 0, 1, 0, Val_pretty_default
);
2671 fprintf_filtered (file
, "\n");
2675 sh_print_register (struct gdbarch
*gdbarch
, struct ui_file
*file
, int regnum
)
2677 if (regnum
< 0 || regnum
>= NUM_REGS
+ NUM_PSEUDO_REGS
)
2678 internal_error (__FILE__
, __LINE__
,
2679 "Invalid register number %d\n", regnum
);
2681 else if (regnum
>= 0 && regnum
< NUM_REGS
)
2683 if (TYPE_CODE (gdbarch_register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
)
2684 sh_do_fp_register (gdbarch
, file
, regnum
); /* FP regs */
2686 sh_do_register (gdbarch
, file
, regnum
); /* All other regs */
2689 else if (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
2690 sh64_do_pseudo_register (regnum
);
2694 sh_print_registers_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
2695 struct frame_info
*frame
, int regnum
, int fpregs
)
2697 if (regnum
!= -1) /* do one specified register */
2699 if (*(REGISTER_NAME (regnum
)) == '\0')
2700 error ("Not a valid register for the current processor type");
2702 sh_print_register (gdbarch
, file
, regnum
);
2705 /* do all (or most) registers */
2708 while (regnum
< NUM_REGS
)
2710 /* If the register name is empty, it is undefined for this
2711 processor, so don't display anything. */
2712 if (REGISTER_NAME (regnum
) == NULL
2713 || *(REGISTER_NAME (regnum
)) == '\0')
2719 if (TYPE_CODE (gdbarch_register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
)
2723 /* true for "INFO ALL-REGISTERS" command */
2724 sh_do_fp_register (gdbarch
, file
, regnum
); /* FP regs */
2728 regnum
+= FP_LAST_REGNUM
- FP0_REGNUM
; /* skip FP regs */
2732 sh_do_register (gdbarch
, file
, regnum
); /* All other regs */
2738 while (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
2740 sh64_do_pseudo_register (regnum
);
2747 sh_compact_do_registers_info (int regnum
, int fpregs
)
2749 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2750 if (regnum
!= -1) /* do one specified register */
2752 if (*(REGISTER_NAME (regnum
)) == '\0')
2753 error ("Not a valid register for the current processor type");
2755 if (regnum
>= 0 && regnum
< R0_C_REGNUM
)
2756 error ("Not a valid register for the current processor mode.");
2758 sh_print_register (current_gdbarch
, gdb_stdout
, regnum
);
2761 /* do all compact registers */
2763 regnum
= R0_C_REGNUM
;
2764 while (regnum
< NUM_REGS
+ NUM_PSEUDO_REGS
)
2766 sh64_do_pseudo_register (regnum
);
2773 sh64_do_registers_info (int regnum
, int fpregs
)
2775 if (pc_is_isa32 (get_frame_pc (deprecated_selected_frame
)))
2776 sh_print_registers_info (current_gdbarch
, gdb_stdout
,
2777 deprecated_selected_frame
, regnum
, fpregs
);
2779 sh_compact_do_registers_info (regnum
, fpregs
);
2782 #ifdef SVR4_SHARED_LIBS
2784 /* Fetch (and possibly build) an appropriate link_map_offsets structure
2785 for native i386 linux targets using the struct offsets defined in
2786 link.h (but without actual reference to that file).
2788 This makes it possible to access i386-linux shared libraries from
2789 a gdb that was not built on an i386-linux host (for cross debugging).
2792 struct link_map_offsets
*
2793 sh_linux_svr4_fetch_link_map_offsets (void)
2795 static struct link_map_offsets lmo
;
2796 static struct link_map_offsets
*lmp
= 0;
2802 lmo
.r_debug_size
= 8; /* 20 not actual size but all we need */
2804 lmo
.r_map_offset
= 4;
2807 lmo
.link_map_size
= 20; /* 552 not actual size but all we need */
2809 lmo
.l_addr_offset
= 0;
2810 lmo
.l_addr_size
= 4;
2812 lmo
.l_name_offset
= 4;
2813 lmo
.l_name_size
= 4;
2815 lmo
.l_next_offset
= 12;
2816 lmo
.l_next_size
= 4;
2818 lmo
.l_prev_offset
= 16;
2819 lmo
.l_prev_size
= 4;
2824 #endif /* SVR4_SHARED_LIBS */
2826 gdbarch_init_ftype sh64_gdbarch_init
;
2829 sh64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2831 static LONGEST sh64_call_dummy_words
[] = {0};
2832 struct gdbarch
*gdbarch
;
2833 struct gdbarch_tdep
*tdep
;
2835 /* If there is already a candidate, use it. */
2836 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2838 return arches
->gdbarch
;
2840 /* None found, create a new architecture from the information
2842 tdep
= XMALLOC (struct gdbarch_tdep
);
2843 gdbarch
= gdbarch_alloc (&info
, tdep
);
2845 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2846 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2847 set_gdbarch_deprecated_init_frame_pc (gdbarch
, deprecated_init_frame_pc_default
);
2849 /* Determine the ABI */
2850 if (info
.abfd
&& bfd_get_arch_size (info
.abfd
) == 64)
2852 /* If the ABI is the 64-bit one, it can only be sh-media. */
2853 tdep
->sh_abi
= SH_ABI_64
;
2854 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2855 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2859 /* If the ABI is the 32-bit one it could be either media or
2861 tdep
->sh_abi
= SH_ABI_32
;
2862 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2863 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2866 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2867 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2868 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2869 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2870 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2871 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2873 set_gdbarch_sp_regnum (gdbarch
, 15);
2874 set_gdbarch_deprecated_fp_regnum (gdbarch
, 14);
2876 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_sh
);
2877 set_gdbarch_register_sim_regno (gdbarch
, legacy_register_sim_regno
);
2879 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2881 set_gdbarch_skip_prologue (gdbarch
, sh_skip_prologue
);
2882 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2883 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2884 set_gdbarch_function_start_offset (gdbarch
, 0);
2886 set_gdbarch_frame_args_skip (gdbarch
, 0);
2887 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
2888 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2890 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, sh_frame_saved_pc
);
2891 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, sh_saved_pc_after_call
);
2892 set_gdbarch_frame_align (gdbarch
, sh_frame_align
);
2894 set_gdbarch_num_pseudo_regs (gdbarch
, NUM_PSEUDO_REGS_SH_MEDIA
+ NUM_PSEUDO_REGS_SH_COMPACT
);
2895 set_gdbarch_fp0_regnum (gdbarch
, SIM_SH64_FR0_REGNUM
);
2896 set_gdbarch_pc_regnum (gdbarch
, 64);
2898 /* the number of real registers is the same whether we are in
2899 ISA16(compact) or ISA32(media). */
2900 set_gdbarch_num_regs (gdbarch
, SIM_SH64_NR_REGS
);
2901 set_gdbarch_deprecated_register_size (gdbarch
, 8); /*????*/
2902 set_gdbarch_deprecated_register_bytes (gdbarch
,
2903 ((SIM_SH64_NR_FP_REGS
+ 1) * 4)
2904 + (SIM_SH64_NR_REGS
- SIM_SH64_NR_FP_REGS
-1) * 8);
2906 set_gdbarch_register_name (gdbarch
, sh_sh64_register_name
);
2907 set_gdbarch_deprecated_register_virtual_type (gdbarch
, sh_sh64_register_virtual_type
);
2908 set_gdbarch_deprecated_store_return_value (gdbarch
, sh64_store_return_value
);
2909 set_gdbarch_deprecated_register_raw_size (gdbarch
, sh_sh64_register_raw_size
);
2910 set_gdbarch_deprecated_register_virtual_size (gdbarch
, sh_sh64_register_raw_size
);
2911 set_gdbarch_deprecated_register_byte (gdbarch
, sh_sh64_register_byte
);
2912 /* This seems awfully wrong!*/
2913 /*set_gdbarch_deprecated_max_register_raw_size (gdbarch, 8);*/
2914 /* should include the size of the pseudo regs. */
2915 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 4 * 4);
2916 /* Or should that go in the virtual_size? */
2917 /*set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 8);*/
2918 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 4 * 4);
2919 set_gdbarch_pseudo_register_read (gdbarch
, sh64_pseudo_register_read
);
2920 set_gdbarch_pseudo_register_write (gdbarch
, sh64_pseudo_register_write
);
2922 set_gdbarch_deprecated_do_registers_info (gdbarch
, sh64_do_registers_info
);
2923 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sh64_nofp_frame_init_saved_regs
);
2924 set_gdbarch_breakpoint_from_pc (gdbarch
, sh_sh64_breakpoint_from_pc
);
2925 set_gdbarch_deprecated_call_dummy_words (gdbarch
, sh64_call_dummy_words
);
2926 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch
, sizeof (sh64_call_dummy_words
));
2928 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, sh64_init_extra_frame_info
);
2929 set_gdbarch_deprecated_frame_chain (gdbarch
, sh64_frame_chain
);
2930 set_gdbarch_deprecated_get_saved_register (gdbarch
, sh64_get_saved_register
);
2931 set_gdbarch_deprecated_extract_return_value (gdbarch
, sh64_extract_return_value
);
2932 set_gdbarch_deprecated_push_arguments (gdbarch
, sh64_push_arguments
);
2933 set_gdbarch_deprecated_push_return_address (gdbarch
, sh64_push_return_address
);
2934 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, deprecated_write_sp
);
2935 set_gdbarch_deprecated_store_struct_return (gdbarch
, sh64_store_struct_return
);
2936 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sh64_extract_struct_value_address
);
2937 set_gdbarch_use_struct_convention (gdbarch
, sh64_use_struct_convention
);
2938 set_gdbarch_deprecated_pop_frame (gdbarch
, sh64_pop_frame
);
2939 set_gdbarch_elf_make_msymbol_special (gdbarch
,
2940 sh64_elf_make_msymbol_special
);
2942 /* Hook in ABI-specific overrides, if they have been registered. */
2943 gdbarch_init_osabi (info
, gdbarch
);