* mips-tdep.c: General cleanup. Delete all #if 0 code. Convert
[deliverable/binutils-gdb.git] / gdb / sparc-nat.c
1 /* Functions specific to running gdb native on a SPARC running SunOS4.
2 Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include "defs.h"
22 #include "inferior.h"
23 #include "target.h"
24 #include "gdbcore.h"
25
26 #include <signal.h>
27 #include <sys/ptrace.h>
28 #include <sys/wait.h>
29 #ifdef __linux__
30 #include <asm/reg.h>
31 #else
32 #include <machine/reg.h>
33 #endif
34 #include <sys/user.h>
35
36 /* We don't store all registers immediately when requested, since they
37 get sent over in large chunks anyway. Instead, we accumulate most
38 of the changes and send them over once. "deferred_stores" keeps
39 track of which sets of registers we have locally-changed copies of,
40 so we only need send the groups that have changed. */
41
42 #define INT_REGS 1
43 #define STACK_REGS 2
44 #define FP_REGS 4
45
46 static void fetch_core_registers (char *, unsigned int, int, CORE_ADDR);
47
48 /* Fetch one or more registers from the inferior. REGNO == -1 to get
49 them all. We actually fetch more than requested, when convenient,
50 marking them as valid so we won't fetch them again. */
51
52 void
53 fetch_inferior_registers (regno)
54 int regno;
55 {
56 struct regs inferior_registers;
57 struct fp_status inferior_fp_registers;
58 int i;
59
60 /* We should never be called with deferred stores, because a prerequisite
61 for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */
62 if (deferred_stores)
63 abort ();
64
65 DO_DEFERRED_STORES;
66
67 /* Global and Out regs are fetched directly, as well as the control
68 registers. If we're getting one of the in or local regs,
69 and the stack pointer has not yet been fetched,
70 we have to do that first, since they're found in memory relative
71 to the stack pointer. */
72 if (regno < O7_REGNUM /* including -1 */
73 || regno >= Y_REGNUM
74 || (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
75 {
76 if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
77 (PTRACE_ARG3_TYPE) & inferior_registers, 0))
78 perror ("ptrace_getregs");
79
80 registers[REGISTER_BYTE (0)] = 0;
81 memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
82 15 * REGISTER_RAW_SIZE (G0_REGNUM));
83 *(int *) &registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps;
84 *(int *) &registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
85 *(int *) &registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
86 *(int *) &registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;
87
88 for (i = G0_REGNUM; i <= O7_REGNUM; i++)
89 register_valid[i] = 1;
90 register_valid[Y_REGNUM] = 1;
91 register_valid[PS_REGNUM] = 1;
92 register_valid[PC_REGNUM] = 1;
93 register_valid[NPC_REGNUM] = 1;
94 /* If we don't set these valid, read_register_bytes() rereads
95 all the regs every time it is called! FIXME. */
96 register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */
97 register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */
98 register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */
99 }
100
101 /* Floating point registers */
102 if (regno == -1 ||
103 regno == FPS_REGNUM ||
104 (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
105 {
106 if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
107 (PTRACE_ARG3_TYPE) & inferior_fp_registers,
108 0))
109 perror ("ptrace_getfpregs");
110 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
111 sizeof inferior_fp_registers.fpu_fr);
112 memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
113 &inferior_fp_registers.Fpu_fsr,
114 sizeof (FPU_FSR_TYPE));
115 for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
116 register_valid[i] = 1;
117 register_valid[FPS_REGNUM] = 1;
118 }
119
120 /* These regs are saved on the stack by the kernel. Only read them
121 all (16 ptrace calls!) if we really need them. */
122 if (regno == -1)
123 {
124 target_read_memory (*(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)],
125 &registers[REGISTER_BYTE (L0_REGNUM)],
126 16 * REGISTER_RAW_SIZE (L0_REGNUM));
127 for (i = L0_REGNUM; i <= I7_REGNUM; i++)
128 register_valid[i] = 1;
129 }
130 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
131 {
132 CORE_ADDR sp = *(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)];
133 i = REGISTER_BYTE (regno);
134 if (register_valid[regno])
135 printf_unfiltered ("register %d valid and read\n", regno);
136 target_read_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
137 &registers[i], REGISTER_RAW_SIZE (regno));
138 register_valid[regno] = 1;
139 }
140 }
141
142 /* Store our register values back into the inferior.
143 If REGNO is -1, do this for all registers.
144 Otherwise, REGNO specifies which register (so we can save time). */
145
146 void
147 store_inferior_registers (regno)
148 int regno;
149 {
150 struct regs inferior_registers;
151 struct fp_status inferior_fp_registers;
152 int wanna_store = INT_REGS + STACK_REGS + FP_REGS;
153
154 /* First decide which pieces of machine-state we need to modify.
155 Default for regno == -1 case is all pieces. */
156 if (regno >= 0)
157 if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
158 {
159 wanna_store = FP_REGS;
160 }
161 else
162 {
163 if (regno == SP_REGNUM)
164 wanna_store = INT_REGS + STACK_REGS;
165 else if (regno < L0_REGNUM || regno > I7_REGNUM)
166 wanna_store = INT_REGS;
167 else if (regno == FPS_REGNUM)
168 wanna_store = FP_REGS;
169 else
170 wanna_store = STACK_REGS;
171 }
172
173 /* See if we're forcing the stores to happen now, or deferring. */
174 if (regno == -2)
175 {
176 wanna_store = deferred_stores;
177 deferred_stores = 0;
178 }
179 else
180 {
181 if (wanna_store == STACK_REGS)
182 {
183 /* Fall through and just store one stack reg. If we deferred
184 it, we'd have to store them all, or remember more info. */
185 }
186 else
187 {
188 deferred_stores |= wanna_store;
189 return;
190 }
191 }
192
193 if (wanna_store & STACK_REGS)
194 {
195 CORE_ADDR sp = *(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)];
196
197 if (regno < 0 || regno == SP_REGNUM)
198 {
199 if (!register_valid[L0_REGNUM + 5])
200 abort ();
201 target_write_memory (sp,
202 &registers[REGISTER_BYTE (L0_REGNUM)],
203 16 * REGISTER_RAW_SIZE (L0_REGNUM));
204 }
205 else
206 {
207 if (!register_valid[regno])
208 abort ();
209 target_write_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
210 &registers[REGISTER_BYTE (regno)],
211 REGISTER_RAW_SIZE (regno));
212 }
213
214 }
215
216 if (wanna_store & INT_REGS)
217 {
218 if (!register_valid[G1_REGNUM])
219 abort ();
220
221 memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
222 15 * REGISTER_RAW_SIZE (G1_REGNUM));
223
224 inferior_registers.r_ps =
225 *(int *) &registers[REGISTER_BYTE (PS_REGNUM)];
226 inferior_registers.r_pc =
227 *(int *) &registers[REGISTER_BYTE (PC_REGNUM)];
228 inferior_registers.r_npc =
229 *(int *) &registers[REGISTER_BYTE (NPC_REGNUM)];
230 inferior_registers.r_y =
231 *(int *) &registers[REGISTER_BYTE (Y_REGNUM)];
232
233 if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
234 (PTRACE_ARG3_TYPE) & inferior_registers, 0))
235 perror ("ptrace_setregs");
236 }
237
238 if (wanna_store & FP_REGS)
239 {
240 if (!register_valid[FP0_REGNUM + 9])
241 abort ();
242 memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
243 sizeof inferior_fp_registers.fpu_fr);
244 memcpy (&inferior_fp_registers.Fpu_fsr,
245 &registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
246 if (0 !=
247 ptrace (PTRACE_SETFPREGS, inferior_pid,
248 (PTRACE_ARG3_TYPE) & inferior_fp_registers, 0))
249 perror ("ptrace_setfpregs");
250 }
251 }
252
253
254 static void
255 fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
256 char *core_reg_sect;
257 unsigned core_reg_size;
258 int which;
259 CORE_ADDR ignore; /* reg addr, unused in this version */
260 {
261
262 if (which == 0)
263 {
264
265 /* Integer registers */
266
267 #define gregs ((struct regs *)core_reg_sect)
268 /* G0 *always* holds 0. */
269 *(int *) &registers[REGISTER_BYTE (0)] = 0;
270
271 /* The globals and output registers. */
272 memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1,
273 15 * REGISTER_RAW_SIZE (G1_REGNUM));
274 *(int *) &registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
275 *(int *) &registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
276 *(int *) &registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
277 *(int *) &registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;
278
279 /* My best guess at where to get the locals and input
280 registers is exactly where they usually are, right above
281 the stack pointer. If the core dump was caused by a bus error
282 from blowing away the stack pointer (as is possible) then this
283 won't work, but it's worth the try. */
284 {
285 int sp;
286
287 sp = *(int *) &registers[REGISTER_BYTE (SP_REGNUM)];
288 if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)],
289 16 * REGISTER_RAW_SIZE (L0_REGNUM)))
290 {
291 /* fprintf_unfiltered so user can still use gdb */
292 fprintf_unfiltered (gdb_stderr,
293 "Couldn't read input and local registers from core file\n");
294 }
295 }
296 }
297 else if (which == 2)
298 {
299
300 /* Floating point registers */
301
302 #define fpuregs ((struct fpu *) core_reg_sect)
303 if (core_reg_size >= sizeof (struct fpu))
304 {
305 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
306 sizeof (fpuregs->fpu_regs));
307 memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
308 sizeof (FPU_FSR_TYPE));
309 }
310 else
311 fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n");
312 }
313 }
314
315 int
316 kernel_u_size ()
317 {
318 return (sizeof (struct user));
319 }
320 \f
321
322 /* Register that we are able to handle sparc core file formats.
323 FIXME: is this really bfd_target_unknown_flavour? */
324
325 static struct core_fns sparc_core_fns =
326 {
327 bfd_target_unknown_flavour, /* core_flavour */
328 default_check_format, /* check_format */
329 default_core_sniffer, /* core_sniffer */
330 fetch_core_registers, /* core_read_registers */
331 NULL /* next */
332 };
333
334 void
335 _initialize_core_sparc ()
336 {
337 add_core_fns (&sparc_core_fns);
338 }
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