1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation,
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
27 #include "arch-utils.h"
33 #include "gdb_string.h"
38 #include <sys/procfs.h>
39 /* Prototypes for supply_gregset etc. */
44 #include "gdb_assert.h"
46 #include "symfile.h" /* for 'entry_point_address' */
49 * Some local macros that have multi-arch and non-multi-arch versions:
52 #if (GDB_MULTI_ARCH > 0)
54 /* Does the target have Floating Point registers? */
55 #define SPARC_HAS_FPU (gdbarch_tdep (current_gdbarch)->has_fpu)
56 /* Number of bytes devoted to Floating Point registers: */
57 #define FP_REGISTER_BYTES (gdbarch_tdep (current_gdbarch)->fp_register_bytes)
58 /* Highest numbered Floating Point register. */
59 #define FP_MAX_REGNUM (gdbarch_tdep (current_gdbarch)->fp_max_regnum)
60 /* Size of a general (integer) register: */
61 #define SPARC_INTREG_SIZE (gdbarch_tdep (current_gdbarch)->intreg_size)
62 /* Offset within the call dummy stack of the saved registers. */
63 #define DUMMY_REG_SAVE_OFFSET (gdbarch_tdep (current_gdbarch)->reg_save_offset)
65 #else /* non-multi-arch */
68 /* Does the target have Floating Point registers? */
70 // OBSOLETE #if defined(TARGET_SPARCLET) || defined(TARGET_SPARCLITE)
71 // OBSOLETE #define SPARC_HAS_FPU 0
73 // OBSOLETE #define SPARC_HAS_FPU 1
76 #define SPARC_HAS_FPU 1
78 /* Number of bytes devoted to Floating Point registers: */
79 #if (GDB_TARGET_IS_SPARC64)
80 #define FP_REGISTER_BYTES (64 * 4)
83 #define FP_REGISTER_BYTES (32 * 4)
85 #define FP_REGISTER_BYTES 0
89 /* Highest numbered Floating Point register. */
90 #if (GDB_TARGET_IS_SPARC64)
91 #define FP_MAX_REGNUM (FP0_REGNUM + 48)
93 #define FP_MAX_REGNUM (FP0_REGNUM + 32)
96 /* Size of a general (integer) register: */
97 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
99 /* Offset within the call dummy stack of the saved registers. */
100 #if (GDB_TARGET_IS_SPARC64)
101 #define DUMMY_REG_SAVE_OFFSET (128 + 16)
103 #define DUMMY_REG_SAVE_OFFSET 0x60
106 #endif /* GDB_MULTI_ARCH */
111 // OBSOLETE int has_fpu;
113 int fp_register_bytes
;
118 int call_dummy_call_offset
;
122 /* Now make GDB_TARGET_IS_SPARC64 a runtime test. */
123 /* FIXME MVS: or try testing bfd_arch_info.arch and bfd_arch_info.mach ...
124 * define GDB_TARGET_IS_SPARC64 \
125 * (TARGET_ARCHITECTURE->arch == bfd_arch_sparc && \
126 * (TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9 || \
127 * TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9a))
131 extern int stop_after_trap
;
133 /* We don't store all registers immediately when requested, since they
134 get sent over in large chunks anyway. Instead, we accumulate most
135 of the changes and send them over once. "deferred_stores" keeps
136 track of which sets of registers we have locally-changed copies of,
137 so we only need send the groups that have changed. */
139 int deferred_stores
= 0; /* Accumulated stores we want to do eventually. */
143 // OBSOLETE /* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
144 // OBSOLETE where instructions are big-endian and data are little-endian.
145 // OBSOLETE This flag is set when we detect that the target is of this type. */
147 // OBSOLETE int bi_endian = 0;
151 /* Fetch a single instruction. Even on bi-endian machines
152 such as sparc86x, instructions are always big-endian. */
155 fetch_instruction (CORE_ADDR pc
)
157 unsigned long retval
;
159 unsigned char buf
[4];
161 read_memory (pc
, buf
, sizeof (buf
));
163 /* Start at the most significant end of the integer, and work towards
164 the least significant. */
166 for (i
= 0; i
< sizeof (buf
); ++i
)
167 retval
= (retval
<< 8) | buf
[i
];
172 /* Branches with prediction are treated like their non-predicting cousins. */
173 /* FIXME: What about floating point branches? */
175 /* Macros to extract fields from sparc instructions. */
176 #define X_OP(i) (((i) >> 30) & 0x3)
177 #define X_RD(i) (((i) >> 25) & 0x1f)
178 #define X_A(i) (((i) >> 29) & 1)
179 #define X_COND(i) (((i) >> 25) & 0xf)
180 #define X_OP2(i) (((i) >> 22) & 0x7)
181 #define X_IMM22(i) ((i) & 0x3fffff)
182 #define X_OP3(i) (((i) >> 19) & 0x3f)
183 #define X_RS1(i) (((i) >> 14) & 0x1f)
184 #define X_I(i) (((i) >> 13) & 1)
185 #define X_IMM13(i) ((i) & 0x1fff)
186 /* Sign extension macros. */
187 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
188 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
189 #define X_CC(i) (((i) >> 20) & 3)
190 #define X_P(i) (((i) >> 19) & 1)
191 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
192 #define X_RCOND(i) (((i) >> 25) & 7)
193 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
194 #define X_FCN(i) (((i) >> 25) & 31)
198 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
, done_retry
201 /* Simulate single-step ptrace call for sun4. Code written by Gary
202 Beihl (beihl@mcc.com). */
204 /* npc4 and next_pc describe the situation at the time that the
205 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
206 static CORE_ADDR next_pc
, npc4
, target
;
207 static int brknpc4
, brktrg
;
208 typedef char binsn_quantum
[BREAKPOINT_MAX
];
209 static binsn_quantum break_mem
[3];
211 static branch_type
isbranch (long, CORE_ADDR
, CORE_ADDR
*);
213 /* single_step() is called just before we want to resume the inferior,
214 if we want to single-step it but there is no hardware or kernel single-step
215 support (as on all SPARCs). We find all the possible targets of the
216 coming instruction and breakpoint them.
218 single_step is also called just after the inferior stops. If we had
219 set up a simulated single-step, we undo our damage. */
222 sparc_software_single_step (enum target_signal ignore
, /* pid, but we don't need it */
223 int insert_breakpoints_p
)
229 if (insert_breakpoints_p
)
231 /* Always set breakpoint for NPC. */
232 next_pc
= read_register (NPC_REGNUM
);
233 npc4
= next_pc
+ 4; /* branch not taken */
235 target_insert_breakpoint (next_pc
, break_mem
[0]);
236 /* printf_unfiltered ("set break at %x\n",next_pc); */
238 pc
= read_register (PC_REGNUM
);
239 pc_instruction
= fetch_instruction (pc
);
240 br
= isbranch (pc_instruction
, pc
, &target
);
241 brknpc4
= brktrg
= 0;
245 /* Conditional annulled branch will either end up at
246 npc (if taken) or at npc+4 (if not taken).
249 target_insert_breakpoint (npc4
, break_mem
[1]);
251 else if (br
== baa
&& target
!= next_pc
)
253 /* Unconditional annulled branch will always end up at
256 target_insert_breakpoint (target
, break_mem
[2]);
258 else if (GDB_TARGET_IS_SPARC64
&& br
== done_retry
)
261 target_insert_breakpoint (target
, break_mem
[2]);
266 /* Remove breakpoints */
267 target_remove_breakpoint (next_pc
, break_mem
[0]);
270 target_remove_breakpoint (npc4
, break_mem
[1]);
273 target_remove_breakpoint (target
, break_mem
[2]);
277 struct frame_extra_info
282 /* Following fields only relevant for flat frames. */
285 /* Add this to ->frame to get the value of the stack pointer at the
286 time of the register saves. */
290 /* Call this for each newly created frame. For SPARC, we need to
291 calculate the bottom of the frame, and do some extra work if the
292 prologue has been generated via the -mflat option to GCC. In
293 particular, we need to know where the previous fp and the pc have
294 been stashed, since their exact position within the frame may vary. */
297 sparc_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
300 CORE_ADDR prologue_start
, prologue_end
;
303 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
304 frame_saved_regs_zalloc (fi
);
306 get_frame_extra_info (fi
)->bottom
=
308 ? (get_frame_base (fi
) == get_frame_base (get_next_frame (fi
))
309 ? get_frame_extra_info (get_next_frame (fi
))->bottom
310 : get_frame_base (get_next_frame (fi
)))
313 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
314 to create_new_frame. */
315 if (get_next_frame (fi
))
319 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
321 /* Compute ->frame as if not flat. If it is flat, we'll change
323 if (get_next_frame (get_next_frame (fi
)) != NULL
324 && ((get_frame_type (get_next_frame (get_next_frame (fi
))) == SIGTRAMP_FRAME
)
325 || deprecated_frame_in_dummy (get_next_frame (get_next_frame (fi
))))
326 && frameless_look_for_prologue (get_next_frame (fi
)))
328 /* A frameless function interrupted by a signal did not change
329 the frame pointer, fix up frame pointer accordingly. */
330 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
331 get_frame_extra_info (fi
)->bottom
=
332 get_frame_extra_info (get_next_frame (fi
))->bottom
;
336 /* Should we adjust for stack bias here? */
338 frame_read_unsigned_register (fi
, FP_REGNUM
, &tmp
);
339 deprecated_update_frame_base_hack (fi
, tmp
);
340 if (GDB_TARGET_IS_SPARC64
&& (get_frame_base (fi
) & 1))
341 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
) + 2047);
345 /* Decide whether this is a function with a ``flat register window''
346 frame. For such functions, the frame pointer is actually in %i7. */
347 get_frame_extra_info (fi
)->flat
= 0;
348 get_frame_extra_info (fi
)->in_prologue
= 0;
349 if (find_pc_partial_function (get_frame_pc (fi
), &name
, &prologue_start
, &prologue_end
))
351 /* See if the function starts with an add (which will be of a
352 negative number if a flat frame) to the sp. FIXME: Does not
353 handle large frames which will need more than one instruction
355 insn
= fetch_instruction (prologue_start
);
356 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
357 && X_I (insn
) && X_SIMM13 (insn
) < 0)
359 int offset
= X_SIMM13 (insn
);
361 /* Then look for a save of %i7 into the frame. */
362 insn
= fetch_instruction (prologue_start
+ 4);
366 && X_RS1 (insn
) == 14)
370 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
372 /* We definitely have a flat frame now. */
373 get_frame_extra_info (fi
)->flat
= 1;
375 get_frame_extra_info (fi
)->sp_offset
= offset
;
377 /* Overwrite the frame's address with the value in %i7. */
380 frame_read_unsigned_register (fi
, I7_REGNUM
, &tmp
);
381 deprecated_update_frame_base_hack (fi
, tmp
);
384 if (GDB_TARGET_IS_SPARC64
&& (get_frame_base (fi
) & 1))
385 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
) + 2047);
387 /* Record where the fp got saved. */
388 get_frame_extra_info (fi
)->fp_addr
=
389 get_frame_base (fi
) + get_frame_extra_info (fi
)->sp_offset
+ X_SIMM13 (insn
);
391 /* Also try to collect where the pc got saved to. */
392 get_frame_extra_info (fi
)->pc_addr
= 0;
393 insn
= fetch_instruction (prologue_start
+ 12);
397 && X_RS1 (insn
) == 14)
398 get_frame_extra_info (fi
)->pc_addr
=
399 get_frame_base (fi
) + get_frame_extra_info (fi
)->sp_offset
+ X_SIMM13 (insn
);
404 /* Check if the PC is in the function prologue before a SAVE
405 instruction has been executed yet. If so, set the frame
406 to the current value of the stack pointer and set
407 the in_prologue flag. */
409 struct symtab_and_line sal
;
411 sal
= find_pc_line (prologue_start
, 0);
412 if (sal
.line
== 0) /* no line info, use PC */
413 prologue_end
= get_frame_pc (fi
);
414 else if (sal
.end
< prologue_end
)
415 prologue_end
= sal
.end
;
416 if (get_frame_pc (fi
) < prologue_end
)
418 for (addr
= prologue_start
; addr
< get_frame_pc (fi
); addr
+= 4)
420 insn
= read_memory_integer (addr
, 4);
421 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
422 break; /* SAVE seen, stop searching */
424 if (addr
>= get_frame_pc (fi
))
426 get_frame_extra_info (fi
)->in_prologue
= 1;
427 deprecated_update_frame_base_hack (fi
, read_register (SP_REGNUM
));
432 if (get_next_frame (fi
) && get_frame_base (fi
) == 0)
434 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
435 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
436 deprecated_update_frame_pc_hack (fi
, get_frame_pc (get_next_frame (fi
)));
441 sparc_frame_chain (struct frame_info
*frame
)
443 /* Value that will cause DEPRECATED_FRAME_CHAIN_VALID to not worry
444 about the chain value. If it really is zero, we detect it later
445 in sparc_init_prev_frame.
447 Note: kevinb/2003-02-18: The constant 1 used to be returned here,
448 but, after some recent changes to legacy_frame_chain_valid(),
449 this value is no longer suitable for causing
450 legacy_frame_chain_valid() to "not worry about the chain value."
451 The constant ~0 (i.e, 0xfff...) causes the failing test in
452 legacy_frame_chain_valid() to succeed thus preserving the "not
453 worry" property. I had considered using something like
454 ``get_frame_base (frame) + 1''. However, I think a constant
455 value is better, because when debugging this problem, I knew that
456 something funny was going on as soon as I saw the constant 1
457 being used as the frame chain elsewhere in GDB. */
459 return ~ (CORE_ADDR
) 0;
463 sparc_extract_struct_value_address (char *regbuf
)
465 return extract_address (regbuf
+ REGISTER_BYTE (O0_REGNUM
),
466 REGISTER_RAW_SIZE (O0_REGNUM
));
469 /* Find the pc saved in frame FRAME. */
472 sparc_frame_saved_pc (struct frame_info
*frame
)
477 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
478 if ((get_frame_type (frame
) == SIGTRAMP_FRAME
))
480 /* This is the signal trampoline frame.
481 Get the saved PC from the sigcontext structure. */
483 #ifndef SIGCONTEXT_PC_OFFSET
484 #define SIGCONTEXT_PC_OFFSET 12
487 CORE_ADDR sigcontext_addr
;
489 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
492 scbuf
= alloca (TARGET_PTR_BIT
/ HOST_CHAR_BIT
);
494 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
495 as the third parameter. The offset to the saved pc is 12. */
496 find_pc_partial_function (get_frame_pc (frame
), &name
,
497 (CORE_ADDR
*) NULL
, (CORE_ADDR
*) NULL
);
498 if (name
&& STREQ (name
, "ucbsigvechandler"))
499 saved_pc_offset
= 12;
501 /* The sigcontext address is contained in register O2. */
504 frame_read_unsigned_register (frame
, O0_REGNUM
+ 2, &tmp
);
505 sigcontext_addr
= tmp
;
508 /* Don't cause a memory_error when accessing sigcontext in case the
509 stack layout has changed or the stack is corrupt. */
510 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
511 scbuf
, sizeof (scbuf
));
512 return extract_address (scbuf
, sizeof (scbuf
));
514 else if (get_frame_extra_info (frame
)->in_prologue
||
515 (get_next_frame (frame
) != NULL
&&
516 ((get_frame_type (get_next_frame (frame
)) == SIGTRAMP_FRAME
) ||
517 deprecated_frame_in_dummy (get_next_frame (frame
))) &&
518 frameless_look_for_prologue (frame
)))
520 /* A frameless function interrupted by a signal did not save
521 the PC, it is still in %o7. */
523 frame_read_unsigned_register (frame
, O7_REGNUM
, &tmp
);
524 return PC_ADJUST (tmp
);
526 if (get_frame_extra_info (frame
)->flat
)
527 addr
= get_frame_extra_info (frame
)->pc_addr
;
529 addr
= get_frame_extra_info (frame
)->bottom
+ FRAME_SAVED_I0
+
530 SPARC_INTREG_SIZE
* (I7_REGNUM
- I0_REGNUM
);
533 /* A flat frame leaf function might not save the PC anywhere,
534 just leave it in %o7. */
535 return PC_ADJUST (read_register (O7_REGNUM
));
537 read_memory (addr
, buf
, SPARC_INTREG_SIZE
);
538 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
541 /* Since an individual frame in the frame cache is defined by two
542 arguments (a frame pointer and a stack pointer), we need two
543 arguments to get info for an arbitrary stack frame. This routine
544 takes two arguments and makes the cached frames look as if these
545 two arguments defined a frame on the cache. This allows the rest
546 of info frame to extract the important arguments without
550 setup_arbitrary_frame (int argc
, CORE_ADDR
*argv
)
552 struct frame_info
*frame
;
555 error ("Sparc frame specifications require two arguments: fp and sp");
557 frame
= create_new_frame (argv
[0], 0);
560 internal_error (__FILE__
, __LINE__
,
561 "create_new_frame returned invalid frame");
563 get_frame_extra_info (frame
)->bottom
= argv
[1];
564 deprecated_update_frame_pc_hack (frame
, DEPRECATED_FRAME_SAVED_PC (frame
));
568 /* Given a pc value, skip it forward past the function prologue by
569 disassembling instructions that appear to be a prologue.
571 If FRAMELESS_P is set, we are only testing to see if the function
572 is frameless. This allows a quicker answer.
574 This routine should be more specific in its actions; making sure
575 that it uses the same register in the initial prologue section. */
577 static CORE_ADDR
examine_prologue (CORE_ADDR
, int, struct frame_info
*,
581 examine_prologue (CORE_ADDR start_pc
, int frameless_p
, struct frame_info
*fi
,
582 CORE_ADDR
*saved_regs
)
586 CORE_ADDR pc
= start_pc
;
589 insn
= fetch_instruction (pc
);
591 /* Recognize the `sethi' insn and record its destination. */
592 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
596 insn
= fetch_instruction (pc
);
599 /* Recognize an add immediate value to register to either %g1 or
600 the destination register recorded above. Actually, this might
601 well recognize several different arithmetic operations.
602 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
603 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
604 I imagine any compiler really does that, however). */
607 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
610 insn
= fetch_instruction (pc
);
613 /* Recognize any SAVE insn. */
614 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
617 if (frameless_p
) /* If the save is all we care about, */
618 return pc
; /* return before doing more work */
619 insn
= fetch_instruction (pc
);
621 /* Recognize add to %sp. */
622 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
625 if (frameless_p
) /* If the add is all we care about, */
626 return pc
; /* return before doing more work */
628 insn
= fetch_instruction (pc
);
629 /* Recognize store of frame pointer (i7). */
633 && X_RS1 (insn
) == 14)
636 insn
= fetch_instruction (pc
);
638 /* Recognize sub %sp, <anything>, %i7. */
641 && X_RS1 (insn
) == 14
642 && X_RD (insn
) == 31)
645 insn
= fetch_instruction (pc
);
654 /* Without a save or add instruction, it's not a prologue. */
659 /* Recognize stores into the frame from the input registers.
660 This recognizes all non alternate stores of an input register,
661 into a location offset from the frame pointer between
664 /* The above will fail for arguments that are promoted
665 (eg. shorts to ints or floats to doubles), because the compiler
666 will pass them in positive-offset frame space, but the prologue
667 will save them (after conversion) in negative frame space at an
668 unpredictable offset. Therefore I am going to remove the
669 restriction on the target-address of the save, on the theory
670 that any unbroken sequence of saves from input registers must
671 be part of the prologue. In un-optimized code (at least), I'm
672 fairly sure that the compiler would emit SOME other instruction
673 (eg. a move or add) before emitting another save that is actually
674 a part of the function body.
676 Besides, the reserved stack space is different for SPARC64 anyway.
681 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
682 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
683 && X_I (insn
) /* Immediate mode. */
684 && X_RS1 (insn
) == 30) /* Off of frame pointer. */
685 ; /* empty statement -- fall thru to end of loop */
686 else if (GDB_TARGET_IS_SPARC64
688 && (X_OP3 (insn
) & 0x3c) == 12 /* store, extended (64-bit) */
689 && (X_RD (insn
) & 0x18) == 0x18 /* input register */
690 && X_I (insn
) /* immediate mode */
691 && X_RS1 (insn
) == 30) /* off of frame pointer */
692 ; /* empty statement -- fall thru to end of loop */
693 else if (X_OP (insn
) == 3
694 && (X_OP3 (insn
) & 0x3c) == 36 /* store, floating-point */
695 && X_I (insn
) /* immediate mode */
696 && X_RS1 (insn
) == 30) /* off of frame pointer */
697 ; /* empty statement -- fall thru to end of loop */
700 && X_OP3 (insn
) == 4 /* store? */
701 && X_RS1 (insn
) == 14) /* off of frame pointer */
703 if (saved_regs
&& X_I (insn
))
704 saved_regs
[X_RD (insn
)] =
705 get_frame_base (fi
) + get_frame_extra_info (fi
)->sp_offset
+ X_SIMM13 (insn
);
710 insn
= fetch_instruction (pc
);
716 /* Advance PC across any function entry prologue instructions to reach
720 sparc_skip_prologue (CORE_ADDR start_pc
)
722 struct symtab_and_line sal
;
723 CORE_ADDR func_start
, func_end
;
725 /* This is the preferred method, find the end of the prologue by
726 using the debugging information. */
727 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
729 sal
= find_pc_line (func_start
, 0);
731 if (sal
.end
< func_end
732 && start_pc
<= sal
.end
)
736 /* Oh well, examine the code by hand. */
737 return examine_prologue (start_pc
, 0, NULL
, NULL
);
740 /* Is the prologue at IP frameless? */
743 sparc_prologue_frameless_p (CORE_ADDR ip
)
745 return ip
== examine_prologue (ip
, 1, NULL
, NULL
);
748 /* Check instruction at ADDR to see if it is a branch.
749 All non-annulled instructions will go to NPC or will trap.
750 Set *TARGET if we find a candidate branch; set to zero if not.
752 This isn't static as it's used by remote-sa.sparc.c. */
755 isbranch (long instruction
, CORE_ADDR addr
, CORE_ADDR
*target
)
757 branch_type val
= not_branch
;
758 long int offset
= 0; /* Must be signed for sign-extend. */
762 if (X_OP (instruction
) == 0
763 && (X_OP2 (instruction
) == 2
764 || X_OP2 (instruction
) == 6
765 || X_OP2 (instruction
) == 1
766 || X_OP2 (instruction
) == 3
767 || X_OP2 (instruction
) == 5
768 || (GDB_TARGET_IS_SPARC64
&& X_OP2 (instruction
) == 7)))
770 if (X_COND (instruction
) == 8)
771 val
= X_A (instruction
) ? baa
: ba
;
773 val
= X_A (instruction
) ? bicca
: bicc
;
774 switch (X_OP2 (instruction
))
777 if (!GDB_TARGET_IS_SPARC64
)
782 offset
= 4 * X_DISP22 (instruction
);
786 offset
= 4 * X_DISP19 (instruction
);
789 offset
= 4 * X_DISP16 (instruction
);
792 *target
= addr
+ offset
;
794 else if (GDB_TARGET_IS_SPARC64
795 && X_OP (instruction
) == 2
796 && X_OP3 (instruction
) == 62)
798 if (X_FCN (instruction
) == 0)
801 *target
= read_register (TNPC_REGNUM
);
804 else if (X_FCN (instruction
) == 1)
807 *target
= read_register (TPC_REGNUM
);
815 /* Find register number REGNUM relative to FRAME and put its
816 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
817 was optimized out (and thus can't be fetched). If the variable
818 was fetched from memory, set *ADDRP to where it was fetched from,
819 otherwise it was fetched from a register.
821 The argument RAW_BUFFER must point to aligned memory. */
824 sparc_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
825 struct frame_info
*frame
, int regnum
,
826 enum lval_type
*lval
)
828 struct frame_info
*frame1
;
831 if (!target_has_registers
)
832 error ("No registers.");
839 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
842 /* error ("No selected frame."); */
843 if (!target_has_registers
)
844 error ("The program has no registers now.");
845 if (deprecated_selected_frame
== NULL
)
846 error ("No selected frame.");
847 /* Try to use selected frame */
848 frame
= get_prev_frame (deprecated_selected_frame
);
850 error ("Cmd not meaningful in the outermost frame.");
854 frame1
= get_next_frame (frame
);
856 /* Get saved PC from the frame info if not in innermost frame. */
857 if (regnum
== PC_REGNUM
&& frame1
!= NULL
)
861 if (raw_buffer
!= NULL
)
863 /* Put it back in target format. */
864 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), get_frame_pc (frame
));
871 while (frame1
!= NULL
)
873 /* FIXME MVS: wrong test for dummy frame at entry. */
875 if (get_frame_pc (frame1
) >= (get_frame_extra_info (frame1
)->bottom
876 ? get_frame_extra_info (frame1
)->bottom
878 && get_frame_pc (frame1
) <= get_frame_base (frame1
))
880 /* Dummy frame. All but the window regs are in there somewhere.
881 The window registers are saved on the stack, just like in a
883 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
884 addr
= get_frame_base (frame1
) + (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
885 - (FP_REGISTER_BYTES
+ 8 * SPARC_INTREG_SIZE
);
886 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
887 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
888 is safe/cheap - there will always be a prev frame.
889 This is because frame1 is initialized to frame->next
890 (frame1->prev == frame) and is then advanced towards
891 the innermost (next) frame. */
892 addr
= (get_frame_extra_info (get_prev_frame (frame1
))->bottom
893 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
895 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
896 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
897 is safe/cheap - there will always be a prev frame.
898 This is because frame1 is initialized to frame->next
899 (frame1->prev == frame) and is then advanced towards
900 the innermost (next) frame. */
901 addr
= (get_frame_extra_info (get_prev_frame (frame1
))->bottom
902 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
904 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
905 addr
= get_frame_base (frame1
) + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
906 - (FP_REGISTER_BYTES
+ 16 * SPARC_INTREG_SIZE
);
907 else if (SPARC_HAS_FPU
&&
908 regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ 32)
909 addr
= get_frame_base (frame1
) + (regnum
- FP0_REGNUM
) * 4
910 - (FP_REGISTER_BYTES
);
911 else if (GDB_TARGET_IS_SPARC64
&& SPARC_HAS_FPU
&&
912 regnum
>= FP0_REGNUM
+ 32 && regnum
< FP_MAX_REGNUM
)
913 addr
= get_frame_base (frame1
) + 32 * 4 + (regnum
- FP0_REGNUM
- 32) * 8
914 - (FP_REGISTER_BYTES
);
915 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
916 addr
= get_frame_base (frame1
) + (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
917 - (FP_REGISTER_BYTES
+ 24 * SPARC_INTREG_SIZE
);
919 else if (get_frame_extra_info (frame1
)->flat
)
922 if (regnum
== RP_REGNUM
)
923 addr
= get_frame_extra_info (frame1
)->pc_addr
;
924 else if (regnum
== I7_REGNUM
)
925 addr
= get_frame_extra_info (frame1
)->fp_addr
;
928 CORE_ADDR func_start
;
931 regs
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
932 memset (regs
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
934 find_pc_partial_function (get_frame_pc (frame1
), NULL
, &func_start
, NULL
);
935 examine_prologue (func_start
, 0, frame1
, regs
);
941 /* Normal frame. Local and In registers are saved on stack. */
942 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
943 addr
= (get_frame_extra_info (get_prev_frame (frame1
))->bottom
944 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
946 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
947 addr
= (get_frame_extra_info (get_prev_frame (frame1
))->bottom
948 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
950 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
952 /* Outs become ins. */
954 frame_register (frame1
, (regnum
- O0_REGNUM
+ I0_REGNUM
),
955 optimized
, lval
, addrp
, &realnum
, raw_buffer
);
961 frame1
= get_next_frame (frame1
);
967 if (regnum
== SP_REGNUM
)
969 if (raw_buffer
!= NULL
)
971 /* Put it back in target format. */
972 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
978 if (raw_buffer
!= NULL
)
979 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
984 *lval
= lval_register
;
985 addr
= REGISTER_BYTE (regnum
);
986 if (raw_buffer
!= NULL
)
987 deprecated_read_register_gen (regnum
, raw_buffer
);
993 /* Push an empty stack frame, and record in it the current PC, regs, etc.
995 We save the non-windowed registers and the ins. The locals and outs
996 are new; they don't need to be saved. The i's and l's of
997 the last frame were already saved on the stack. */
999 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1001 /* See tm-sparc.h for how this is calculated. */
1003 #define DUMMY_STACK_REG_BUF_SIZE \
1004 (((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
1005 #define DUMMY_STACK_SIZE \
1006 (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
1009 sparc_push_dummy_frame (void)
1011 CORE_ADDR sp
, old_sp
;
1012 char *register_temp
;
1014 register_temp
= alloca (DUMMY_STACK_SIZE
);
1016 old_sp
= sp
= read_sp ();
1018 if (GDB_TARGET_IS_SPARC64
)
1020 /* PC, NPC, CCR, FSR, FPRS, Y, ASI */
1021 deprecated_read_register_bytes (REGISTER_BYTE (PC_REGNUM
),
1023 REGISTER_RAW_SIZE (PC_REGNUM
) * 7);
1024 deprecated_read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM
),
1025 ®ister_temp
[7 * SPARC_INTREG_SIZE
],
1026 REGISTER_RAW_SIZE (PSTATE_REGNUM
));
1027 /* FIXME: not sure what needs to be saved here. */
1031 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
1032 deprecated_read_register_bytes (REGISTER_BYTE (Y_REGNUM
),
1034 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
1037 deprecated_read_register_bytes (REGISTER_BYTE (O0_REGNUM
),
1038 ®ister_temp
[8 * SPARC_INTREG_SIZE
],
1039 SPARC_INTREG_SIZE
* 8);
1041 deprecated_read_register_bytes (REGISTER_BYTE (G0_REGNUM
),
1042 ®ister_temp
[16 * SPARC_INTREG_SIZE
],
1043 SPARC_INTREG_SIZE
* 8);
1046 deprecated_read_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1047 ®ister_temp
[24 * SPARC_INTREG_SIZE
],
1050 sp
-= DUMMY_STACK_SIZE
;
1052 DEPRECATED_DUMMY_WRITE_SP (sp
);
1054 write_memory (sp
+ DUMMY_REG_SAVE_OFFSET
, ®ister_temp
[0],
1055 DUMMY_STACK_REG_BUF_SIZE
);
1057 if (strcmp (target_shortname
, "sim") != 0)
1059 /* NOTE: cagney/2002-04-04: The code below originally contained
1060 GDB's _only_ call to write_fp(). That call was eliminated by
1061 inlining the corresponding code. For the 64 bit case, the
1062 old function (sparc64_write_fp) did the below although I'm
1063 not clear why. The same goes for why this is only done when
1064 the underlying target is a simulator. */
1065 if (GDB_TARGET_IS_SPARC64
)
1067 /* Target is a 64 bit SPARC. */
1068 CORE_ADDR oldfp
= read_register (FP_REGNUM
);
1070 write_register (FP_REGNUM
, old_sp
- 2047);
1072 write_register (FP_REGNUM
, old_sp
);
1076 /* Target is a 32 bit SPARC. */
1077 write_register (FP_REGNUM
, old_sp
);
1079 /* Set return address register for the call dummy to the current PC. */
1080 write_register (I7_REGNUM
, read_pc () - 8);
1084 /* The call dummy will write this value to FP before executing
1085 the 'save'. This ensures that register window flushes work
1086 correctly in the simulator. */
1087 write_register (G0_REGNUM
+ 1, read_register (FP_REGNUM
));
1089 /* The call dummy will write this value to FP after executing
1091 write_register (G0_REGNUM
+ 2, old_sp
);
1093 /* The call dummy will write this value to the return address (%i7) after
1094 executing the 'save'. */
1095 write_register (G0_REGNUM
+ 3, read_pc () - 8);
1097 /* Set the FP that the call dummy will be using after the 'save'.
1098 This makes backtraces from an inferior function call work properly. */
1099 write_register (FP_REGNUM
, old_sp
);
1103 /* sparc_frame_find_saved_regs (). This function is here only because
1104 pop_frame uses it. Note there is an interesting corner case which
1105 I think few ports of GDB get right--if you are popping a frame
1106 which does not save some register that *is* saved by a more inner
1107 frame (such a frame will never be a dummy frame because dummy
1108 frames save all registers).
1110 NOTE: cagney/2003-03-12: Since pop_frame has been rewritten to use
1111 frame_unwind_register() the need for this function is questionable.
1113 Stores, into an array of CORE_ADDR,
1114 the addresses of the saved registers of frame described by FRAME_INFO.
1115 This includes special registers such as pc and fp saved in special
1116 ways in the stack frame. sp is even more special:
1117 the address we return for it IS the sp for the next frame.
1119 Note that on register window machines, we are currently making the
1120 assumption that window registers are being saved somewhere in the
1121 frame in which they are being used. If they are stored in an
1122 inferior frame, find_saved_register will break.
1124 On the Sun 4, the only time all registers are saved is when
1125 a dummy frame is involved. Otherwise, the only saved registers
1126 are the LOCAL and IN registers which are saved as a result
1127 of the "save/restore" opcodes. This condition is determined
1128 by address rather than by value.
1130 The "pc" is not stored in a frame on the SPARC. (What is stored
1131 is a return address minus 8.) sparc_pop_frame knows how to
1132 deal with that. Other routines might or might not.
1134 See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
1135 about how this works. */
1137 static void sparc_frame_find_saved_regs (struct frame_info
*, CORE_ADDR
*);
1140 sparc_frame_find_saved_regs (struct frame_info
*fi
, CORE_ADDR
*saved_regs_addr
)
1142 register int regnum
;
1143 CORE_ADDR frame_addr
= get_frame_base (fi
);
1145 gdb_assert (fi
!= NULL
);
1147 memset (saved_regs_addr
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
1149 if (get_frame_pc (fi
) >= (get_frame_extra_info (fi
)->bottom
1150 ? get_frame_extra_info (fi
)->bottom
1152 && get_frame_pc (fi
) <= get_frame_base (fi
))
1154 /* Dummy frame. All but the window regs are in there somewhere. */
1155 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+ 7; regnum
++)
1156 saved_regs_addr
[regnum
] =
1157 frame_addr
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
1158 - DUMMY_STACK_REG_BUF_SIZE
+ 16 * SPARC_INTREG_SIZE
;
1160 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1161 saved_regs_addr
[regnum
] =
1162 frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1163 - DUMMY_STACK_REG_BUF_SIZE
+ 8 * SPARC_INTREG_SIZE
;
1166 for (regnum
= FP0_REGNUM
; regnum
< FP_MAX_REGNUM
; regnum
++)
1167 saved_regs_addr
[regnum
] = frame_addr
+ (regnum
- FP0_REGNUM
) * 4
1168 - DUMMY_STACK_REG_BUF_SIZE
+ 24 * SPARC_INTREG_SIZE
;
1170 if (GDB_TARGET_IS_SPARC64
)
1172 for (regnum
= PC_REGNUM
; regnum
< PC_REGNUM
+ 7; regnum
++)
1174 saved_regs_addr
[regnum
] =
1175 frame_addr
+ (regnum
- PC_REGNUM
) * SPARC_INTREG_SIZE
1176 - DUMMY_STACK_REG_BUF_SIZE
;
1178 saved_regs_addr
[PSTATE_REGNUM
] =
1179 frame_addr
+ 8 * SPARC_INTREG_SIZE
- DUMMY_STACK_REG_BUF_SIZE
;
1182 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
1183 saved_regs_addr
[regnum
] =
1184 frame_addr
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
1185 - DUMMY_STACK_REG_BUF_SIZE
;
1187 frame_addr
= (get_frame_extra_info (fi
)->bottom
1188 ? get_frame_extra_info (fi
)->bottom
1191 else if (get_frame_extra_info (fi
)->flat
)
1193 CORE_ADDR func_start
;
1194 find_pc_partial_function (get_frame_pc (fi
), NULL
, &func_start
, NULL
);
1195 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
1197 /* Flat register window frame. */
1198 saved_regs_addr
[RP_REGNUM
] = get_frame_extra_info (fi
)->pc_addr
;
1199 saved_regs_addr
[I7_REGNUM
] = get_frame_extra_info (fi
)->fp_addr
;
1203 /* Normal frame. Just Local and In registers */
1204 frame_addr
= (get_frame_extra_info (fi
)->bottom
1205 ? get_frame_extra_info (fi
)->bottom
1207 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; regnum
++)
1208 saved_regs_addr
[regnum
] =
1209 (frame_addr
+ (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
1211 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1212 saved_regs_addr
[regnum
] =
1213 (frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1216 if (get_next_frame (fi
))
1218 if (get_frame_extra_info (fi
)->flat
)
1220 saved_regs_addr
[O7_REGNUM
] = get_frame_extra_info (fi
)->pc_addr
;
1224 /* Pull off either the next frame pointer or the stack pointer */
1225 CORE_ADDR next_next_frame_addr
=
1226 (get_frame_extra_info (get_next_frame (fi
))->bottom
1227 ? get_frame_extra_info (get_next_frame (fi
))->bottom
1229 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 8; regnum
++)
1230 saved_regs_addr
[regnum
] =
1231 (next_next_frame_addr
1232 + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
1236 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
1237 /* FIXME -- should this adjust for the sparc64 offset? */
1238 saved_regs_addr
[SP_REGNUM
] = get_frame_base (fi
);
1241 /* Discard from the stack the innermost frame, restoring all saved registers.
1243 Note that the values stored in fsr by
1244 deprecated_get_frame_saved_regs are *in the context of the called
1245 frame*. What this means is that the i regs of fsr must be restored
1246 into the o regs of the (calling) frame that we pop into. We don't
1247 care about the output regs of the calling frame, since unless it's
1248 a dummy frame, it won't have any output regs in it.
1250 We never have to bother with %l (local) regs, since the called routine's
1251 locals get tossed, and the calling routine's locals are already saved
1254 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1257 sparc_pop_frame (void)
1259 register struct frame_info
*frame
= get_current_frame ();
1260 register CORE_ADDR pc
;
1265 fsr
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
1266 raw_buffer
= alloca (REGISTER_BYTES
);
1267 sparc_frame_find_saved_regs (frame
, &fsr
[0]);
1270 if (fsr
[FP0_REGNUM
])
1272 read_memory (fsr
[FP0_REGNUM
], raw_buffer
, FP_REGISTER_BYTES
);
1273 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1274 raw_buffer
, FP_REGISTER_BYTES
);
1276 if (!(GDB_TARGET_IS_SPARC64
))
1278 if (fsr
[FPS_REGNUM
])
1280 read_memory (fsr
[FPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1281 deprecated_write_register_gen (FPS_REGNUM
, raw_buffer
);
1283 if (fsr
[CPS_REGNUM
])
1285 read_memory (fsr
[CPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1286 deprecated_write_register_gen (CPS_REGNUM
, raw_buffer
);
1292 read_memory (fsr
[G1_REGNUM
], raw_buffer
, 7 * SPARC_INTREG_SIZE
);
1293 deprecated_write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
,
1294 7 * SPARC_INTREG_SIZE
);
1297 if (get_frame_extra_info (frame
)->flat
)
1299 /* Each register might or might not have been saved, need to test
1301 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
1303 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1304 SPARC_INTREG_SIZE
));
1305 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
1307 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1308 SPARC_INTREG_SIZE
));
1310 /* Handle all outs except stack pointer (o0-o5; o7). */
1311 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
1313 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1314 SPARC_INTREG_SIZE
));
1315 if (fsr
[O0_REGNUM
+ 7])
1316 write_register (O0_REGNUM
+ 7,
1317 read_memory_integer (fsr
[O0_REGNUM
+ 7],
1318 SPARC_INTREG_SIZE
));
1320 DEPRECATED_DUMMY_WRITE_SP (get_frame_base (frame
));
1322 else if (fsr
[I0_REGNUM
])
1328 reg_temp
= alloca (SPARC_INTREG_SIZE
* 16);
1330 read_memory (fsr
[I0_REGNUM
], raw_buffer
, 8 * SPARC_INTREG_SIZE
);
1332 /* Get the ins and locals which we are about to restore. Just
1333 moving the stack pointer is all that is really needed, except
1334 store_inferior_registers is then going to write the ins and
1335 locals from the registers array, so we need to muck with the
1337 sp
= fsr
[SP_REGNUM
];
1339 if (GDB_TARGET_IS_SPARC64
&& (sp
& 1))
1342 read_memory (sp
, reg_temp
, SPARC_INTREG_SIZE
* 16);
1344 /* Restore the out registers.
1345 Among other things this writes the new stack pointer. */
1346 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
1347 SPARC_INTREG_SIZE
* 8);
1349 deprecated_write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
1350 SPARC_INTREG_SIZE
* 16);
1353 if (!(GDB_TARGET_IS_SPARC64
))
1355 write_register (PS_REGNUM
,
1356 read_memory_integer (fsr
[PS_REGNUM
],
1357 REGISTER_RAW_SIZE (PS_REGNUM
)));
1360 write_register (Y_REGNUM
,
1361 read_memory_integer (fsr
[Y_REGNUM
],
1362 REGISTER_RAW_SIZE (Y_REGNUM
)));
1365 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1366 write_register (PC_REGNUM
,
1367 read_memory_integer (fsr
[PC_REGNUM
],
1368 REGISTER_RAW_SIZE (PC_REGNUM
)));
1369 if (fsr
[NPC_REGNUM
])
1370 write_register (NPC_REGNUM
,
1371 read_memory_integer (fsr
[NPC_REGNUM
],
1372 REGISTER_RAW_SIZE (NPC_REGNUM
)));
1374 else if (get_frame_extra_info (frame
)->flat
)
1376 if (get_frame_extra_info (frame
)->pc_addr
)
1377 pc
= PC_ADJUST ((CORE_ADDR
)
1378 read_memory_integer (get_frame_extra_info (frame
)->pc_addr
,
1379 REGISTER_RAW_SIZE (PC_REGNUM
)));
1382 /* I think this happens only in the innermost frame, if so then
1383 it is a complicated way of saying
1384 "pc = read_register (O7_REGNUM);". */
1386 frame_read_unsigned_register (frame
, O7_REGNUM
, &tmp
);
1387 pc
= PC_ADJUST (tmp
);
1390 write_register (PC_REGNUM
, pc
);
1391 write_register (NPC_REGNUM
, pc
+ 4);
1393 else if (fsr
[I7_REGNUM
])
1395 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1396 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
[I7_REGNUM
],
1397 SPARC_INTREG_SIZE
));
1398 write_register (PC_REGNUM
, pc
);
1399 write_register (NPC_REGNUM
, pc
+ 4);
1401 flush_cached_frames ();
1404 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1405 encodes the structure size being returned. If we detect such
1406 a fake insn, step past it. */
1409 sparc_pc_adjust (CORE_ADDR pc
)
1415 err
= target_read_memory (pc
+ 8, buf
, 4);
1416 insn
= extract_unsigned_integer (buf
, 4);
1417 if ((err
== 0) && (insn
& 0xffc00000) == 0)
1423 /* If pc is in a shared library trampoline, return its target.
1424 The SunOs 4.x linker rewrites the jump table entries for PIC
1425 compiled modules in the main executable to bypass the dynamic linker
1426 with jumps of the form
1429 and removes the corresponding jump table relocation entry in the
1430 dynamic relocations.
1431 find_solib_trampoline_target relies on the presence of the jump
1432 table relocation entry, so we have to detect these jump instructions
1436 sunos4_skip_trampoline_code (CORE_ADDR pc
)
1438 unsigned long insn1
;
1442 err
= target_read_memory (pc
, buf
, 4);
1443 insn1
= extract_unsigned_integer (buf
, 4);
1444 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
1446 unsigned long insn2
;
1448 err
= target_read_memory (pc
+ 4, buf
, 4);
1449 insn2
= extract_unsigned_integer (buf
, 4);
1450 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
1452 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
1453 int delta
= insn2
& 0x1fff;
1455 /* Sign extend the displacement. */
1458 return target_pc
+ delta
;
1461 return find_solib_trampoline_target (pc
);
1464 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1466 /* The /proc interface divides the target machine's register set up into
1467 two different sets, the general register set (gregset) and the floating
1468 point register set (fpregset). For each set, there is an ioctl to get
1469 the current register set and another ioctl to set the current values.
1471 The actual structure passed through the ioctl interface is, of course,
1472 naturally machine dependent, and is different for each set of registers.
1473 For the sparc for example, the general register set is typically defined
1476 typedef int gregset_t[38];
1482 and the floating point set by:
1484 typedef struct prfpregset {
1487 double pr_dregs[16];
1492 u_char pr_q_entrysize;
1497 These routines provide the packing and unpacking of gregset_t and
1498 fpregset_t formatted data.
1503 /* Given a pointer to a general register set in /proc format (gregset_t *),
1504 unpack the register contents and supply them as gdb's idea of the current
1508 supply_gregset (gdb_gregset_t
*gregsetp
)
1510 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1511 int regi
, offset
= 0;
1513 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1514 then the gregset may contain 64-bit ints while supply_register
1515 is expecting 32-bit ints. Compensate. */
1516 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1519 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1520 /* FIXME MVS: assumes the order of the first 32 elements... */
1521 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1523 supply_register (regi
, ((char *) (regp
+ regi
)) + offset
);
1526 /* These require a bit more care. */
1527 supply_register (PC_REGNUM
, ((char *) (regp
+ R_PC
)) + offset
);
1528 supply_register (NPC_REGNUM
, ((char *) (regp
+ R_nPC
)) + offset
);
1529 supply_register (Y_REGNUM
, ((char *) (regp
+ R_Y
)) + offset
);
1531 if (GDB_TARGET_IS_SPARC64
)
1534 supply_register (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1536 supply_register (CCR_REGNUM
, NULL
);
1539 supply_register (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1541 supply_register (FPRS_REGNUM
, NULL
);
1544 supply_register (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1546 supply_register (ASI_REGNUM
, NULL
);
1552 supply_register (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1554 supply_register (PS_REGNUM
, NULL
);
1557 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1558 Steal R_ASI and R_FPRS, and hope for the best! */
1560 #if !defined (R_WIM) && defined (R_ASI)
1564 #if !defined (R_TBR) && defined (R_FPRS)
1565 #define R_TBR R_FPRS
1569 supply_register (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1571 supply_register (WIM_REGNUM
, NULL
);
1575 supply_register (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1577 supply_register (TBR_REGNUM
, NULL
);
1581 /* Fill inaccessible registers with zero. */
1582 if (GDB_TARGET_IS_SPARC64
)
1585 * don't know how to get value of any of the following:
1587 supply_register (VER_REGNUM
, NULL
);
1588 supply_register (TICK_REGNUM
, NULL
);
1589 supply_register (PIL_REGNUM
, NULL
);
1590 supply_register (PSTATE_REGNUM
, NULL
);
1591 supply_register (TSTATE_REGNUM
, NULL
);
1592 supply_register (TBA_REGNUM
, NULL
);
1593 supply_register (TL_REGNUM
, NULL
);
1594 supply_register (TT_REGNUM
, NULL
);
1595 supply_register (TPC_REGNUM
, NULL
);
1596 supply_register (TNPC_REGNUM
, NULL
);
1597 supply_register (WSTATE_REGNUM
, NULL
);
1598 supply_register (CWP_REGNUM
, NULL
);
1599 supply_register (CANSAVE_REGNUM
, NULL
);
1600 supply_register (CANRESTORE_REGNUM
, NULL
);
1601 supply_register (CLEANWIN_REGNUM
, NULL
);
1602 supply_register (OTHERWIN_REGNUM
, NULL
);
1603 supply_register (ASR16_REGNUM
, NULL
);
1604 supply_register (ASR17_REGNUM
, NULL
);
1605 supply_register (ASR18_REGNUM
, NULL
);
1606 supply_register (ASR19_REGNUM
, NULL
);
1607 supply_register (ASR20_REGNUM
, NULL
);
1608 supply_register (ASR21_REGNUM
, NULL
);
1609 supply_register (ASR22_REGNUM
, NULL
);
1610 supply_register (ASR23_REGNUM
, NULL
);
1611 supply_register (ASR24_REGNUM
, NULL
);
1612 supply_register (ASR25_REGNUM
, NULL
);
1613 supply_register (ASR26_REGNUM
, NULL
);
1614 supply_register (ASR27_REGNUM
, NULL
);
1615 supply_register (ASR28_REGNUM
, NULL
);
1616 supply_register (ASR29_REGNUM
, NULL
);
1617 supply_register (ASR30_REGNUM
, NULL
);
1618 supply_register (ASR31_REGNUM
, NULL
);
1619 supply_register (ICC_REGNUM
, NULL
);
1620 supply_register (XCC_REGNUM
, NULL
);
1624 supply_register (CPS_REGNUM
, NULL
);
1629 fill_gregset (gdb_gregset_t
*gregsetp
, int regno
)
1631 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1632 int regi
, offset
= 0;
1634 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1635 then the gregset may contain 64-bit ints while supply_register
1636 is expecting 32-bit ints. Compensate. */
1637 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1640 for (regi
= 0; regi
<= R_I7
; regi
++)
1641 if ((regno
== -1) || (regno
== regi
))
1642 deprecated_read_register_gen (regi
, (char *) (regp
+ regi
) + offset
);
1644 if ((regno
== -1) || (regno
== PC_REGNUM
))
1645 deprecated_read_register_gen (PC_REGNUM
, (char *) (regp
+ R_PC
) + offset
);
1647 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1648 deprecated_read_register_gen (NPC_REGNUM
, (char *) (regp
+ R_nPC
) + offset
);
1650 if ((regno
== -1) || (regno
== Y_REGNUM
))
1651 deprecated_read_register_gen (Y_REGNUM
, (char *) (regp
+ R_Y
) + offset
);
1653 if (GDB_TARGET_IS_SPARC64
)
1656 if (regno
== -1 || regno
== CCR_REGNUM
)
1657 deprecated_read_register_gen (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1660 if (regno
== -1 || regno
== FPRS_REGNUM
)
1661 deprecated_read_register_gen (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1664 if (regno
== -1 || regno
== ASI_REGNUM
)
1665 deprecated_read_register_gen (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1671 if (regno
== -1 || regno
== PS_REGNUM
)
1672 deprecated_read_register_gen (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1675 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1676 Steal R_ASI and R_FPRS, and hope for the best! */
1678 #if !defined (R_WIM) && defined (R_ASI)
1682 #if !defined (R_TBR) && defined (R_FPRS)
1683 #define R_TBR R_FPRS
1687 if (regno
== -1 || regno
== WIM_REGNUM
)
1688 deprecated_read_register_gen (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1690 if (regno
== -1 || regno
== WIM_REGNUM
)
1691 deprecated_read_register_gen (WIM_REGNUM
, NULL
);
1695 if (regno
== -1 || regno
== TBR_REGNUM
)
1696 deprecated_read_register_gen (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1698 if (regno
== -1 || regno
== TBR_REGNUM
)
1699 deprecated_read_register_gen (TBR_REGNUM
, NULL
);
1704 /* Given a pointer to a floating point register set in /proc format
1705 (fpregset_t *), unpack the register contents and supply them as gdb's
1706 idea of the current floating point register values. */
1709 supply_fpregset (gdb_fpregset_t
*fpregsetp
)
1717 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1719 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1720 supply_register (regi
, from
);
1723 if (GDB_TARGET_IS_SPARC64
)
1726 * don't know how to get value of the following.
1728 supply_register (FSR_REGNUM
, NULL
); /* zero it out for now */
1729 supply_register (FCC0_REGNUM
, NULL
);
1730 supply_register (FCC1_REGNUM
, NULL
); /* don't know how to get value */
1731 supply_register (FCC2_REGNUM
, NULL
); /* don't know how to get value */
1732 supply_register (FCC3_REGNUM
, NULL
); /* don't know how to get value */
1736 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1740 /* Given a pointer to a floating point register set in /proc format
1741 (fpregset_t *), update the register specified by REGNO from gdb's idea
1742 of the current floating point register set. If REGNO is -1, update
1744 /* This will probably need some changes for sparc64. */
1747 fill_fpregset (gdb_fpregset_t
*fpregsetp
, int regno
)
1756 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1758 if ((regno
== -1) || (regno
== regi
))
1760 from
= (char *) &deprecated_registers
[REGISTER_BYTE (regi
)];
1761 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1762 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1766 if (!(GDB_TARGET_IS_SPARC64
)) /* FIXME: does Sparc64 have this register? */
1767 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1769 from
= (char *)&deprecated_registers
[REGISTER_BYTE (FPS_REGNUM
)];
1770 to
= (char *) &fpregsetp
->pr_fsr
;
1771 memcpy (to
, from
, REGISTER_RAW_SIZE (FPS_REGNUM
));
1775 #endif /* USE_PROC_FS */
1777 /* Because of Multi-arch, GET_LONGJMP_TARGET is always defined. So test
1778 for a definition of JB_PC. */
1781 /* Figure out where the longjmp will land. We expect that we have just entered
1782 longjmp and haven't yet setup the stack frame, so the args are still in the
1783 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1784 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1785 This routine returns true on success */
1788 get_longjmp_target (CORE_ADDR
*pc
)
1791 #define LONGJMP_TARGET_SIZE 4
1792 char buf
[LONGJMP_TARGET_SIZE
];
1794 jb_addr
= read_register (O0_REGNUM
);
1796 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1797 LONGJMP_TARGET_SIZE
))
1800 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1804 #endif /* GET_LONGJMP_TARGET */
1806 #ifdef STATIC_TRANSFORM_NAME
1807 /* SunPRO (3.0 at least), encodes the static variables. This is not
1808 related to C++ mangling, it is done for C too. */
1811 sunpro_static_transform_name (char *name
)
1816 /* For file-local statics there will be a dollar sign, a bunch
1817 of junk (the contents of which match a string given in the
1818 N_OPT), a period and the name. For function-local statics
1819 there will be a bunch of junk (which seems to change the
1820 second character from 'A' to 'B'), a period, the name of the
1821 function, and the name. So just skip everything before the
1823 p
= strrchr (name
, '.');
1829 #endif /* STATIC_TRANSFORM_NAME */
1832 /* Utilities for printing registers.
1833 Page numbers refer to the SPARC Architecture Manual. */
1835 static void dump_ccreg (char *, int);
1838 dump_ccreg (char *reg
, int val
)
1841 printf_unfiltered ("%s:%s,%s,%s,%s", reg
,
1842 val
& 8 ? "N" : "NN",
1843 val
& 4 ? "Z" : "NZ",
1844 val
& 2 ? "O" : "NO",
1845 val
& 1 ? "C" : "NC");
1849 decode_asi (int val
)
1855 return "ASI_NUCLEUS";
1857 return "ASI_NUCLEUS_LITTLE";
1859 return "ASI_AS_IF_USER_PRIMARY";
1861 return "ASI_AS_IF_USER_SECONDARY";
1863 return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1865 return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1867 return "ASI_PRIMARY";
1869 return "ASI_SECONDARY";
1871 return "ASI_PRIMARY_NOFAULT";
1873 return "ASI_SECONDARY_NOFAULT";
1875 return "ASI_PRIMARY_LITTLE";
1877 return "ASI_SECONDARY_LITTLE";
1879 return "ASI_PRIMARY_NOFAULT_LITTLE";
1881 return "ASI_SECONDARY_NOFAULT_LITTLE";
1887 /* Pretty print various registers. */
1888 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1891 sparc_print_register_hook (int regno
)
1895 /* Handle double/quad versions of lower 32 fp regs. */
1896 if (regno
>= FP0_REGNUM
&& regno
< FP0_REGNUM
+ 32
1897 && (regno
& 1) == 0)
1901 if (frame_register_read (deprecated_selected_frame
, regno
, value
)
1902 && frame_register_read (deprecated_selected_frame
, regno
+ 1, value
+ 4))
1904 printf_unfiltered ("\t");
1905 print_floating (value
, builtin_type_double
, gdb_stdout
);
1907 #if 0 /* FIXME: gdb doesn't handle long doubles */
1908 if ((regno
& 3) == 0)
1910 if (frame_register_read (deprecated_selected_frame
, regno
+ 2, value
+ 8)
1911 && frame_register_read (deprecated_selected_frame
, regno
+ 3, value
+ 12))
1913 printf_unfiltered ("\t");
1914 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1921 #if 0 /* FIXME: gdb doesn't handle long doubles */
1922 /* Print upper fp regs as long double if appropriate. */
1923 if (regno
>= FP0_REGNUM
+ 32 && regno
< FP_MAX_REGNUM
1924 /* We test for even numbered regs and not a multiple of 4 because
1925 the upper fp regs are recorded as doubles. */
1926 && (regno
& 1) == 0)
1930 if (frame_register_read (deprecated_selected_frame
, regno
, value
)
1931 && frame_register_read (deprecated_selected_frame
, regno
+ 1, value
+ 8))
1933 printf_unfiltered ("\t");
1934 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1940 /* FIXME: Some of these are priviledged registers.
1941 Not sure how they should be handled. */
1943 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1945 val
= read_register (regno
);
1948 if (GDB_TARGET_IS_SPARC64
)
1952 printf_unfiltered ("\t");
1953 dump_ccreg ("xcc", val
>> 4);
1954 printf_unfiltered (", ");
1955 dump_ccreg ("icc", val
& 15);
1958 printf ("\tfef:%d, du:%d, dl:%d",
1959 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1963 static char *fcc
[4] =
1964 {"=", "<", ">", "?"};
1965 static char *rd
[4] =
1966 {"N", "0", "+", "-"};
1967 /* Long, but I'd rather leave it as is and use a wide screen. */
1968 printf_filtered ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ",
1969 fcc
[BITS (10, 3)], fcc
[BITS (32, 3)],
1970 fcc
[BITS (34, 3)], fcc
[BITS (36, 3)],
1971 rd
[BITS (30, 3)], BITS (23, 31));
1972 printf_filtered ("ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1973 BITS (22, 1), BITS (17, 7), BITS (14, 7),
1974 BITS (13, 1), BITS (5, 31), BITS (0, 31));
1979 char *asi
= decode_asi (val
);
1981 printf ("\t%s", asi
);
1985 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1986 BITS (48, 0xffff), BITS (32, 0xffff),
1987 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1991 static char *mm
[4] =
1992 {"tso", "pso", "rso", "?"};
1993 printf_filtered ("\tcle:%d, tle:%d, mm:%s, red:%d, ",
1994 BITS (9, 1), BITS (8, 1),
1995 mm
[BITS (6, 3)], BITS (5, 1));
1996 printf_filtered ("pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1997 BITS (4, 1), BITS (3, 1), BITS (2, 1),
1998 BITS (1, 1), BITS (0, 1));
2002 /* FIXME: print all 4? */
2005 /* FIXME: print all 4? */
2008 /* FIXME: print all 4? */
2011 /* FIXME: print all 4? */
2014 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
2017 printf ("\t%d", BITS (0, 31));
2019 case CANSAVE_REGNUM
:
2020 printf ("\t%-2d before spill", BITS (0, 31));
2022 case CANRESTORE_REGNUM
:
2023 printf ("\t%-2d before fill", BITS (0, 31));
2025 case CLEANWIN_REGNUM
:
2026 printf ("\t%-2d before clean", BITS (0, 31));
2028 case OTHERWIN_REGNUM
:
2029 printf ("\t%d", BITS (0, 31));
2036 printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
2037 BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
2038 BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
2039 BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
2044 static char *fcc
[4] =
2045 {"=", "<", ">", "?"};
2046 static char *rd
[4] =
2047 {"N", "0", "+", "-"};
2048 /* Long, but I'd rather leave it as is and use a wide screen. */
2049 printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
2050 "fcc:%s, aexc:%d, cexc:%d",
2051 rd
[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
2052 BITS (14, 7), BITS (13, 1), fcc
[BITS (10, 3)], BITS (5, 31),
2062 sparc_print_registers (struct gdbarch
*gdbarch
,
2063 struct ui_file
*file
,
2064 struct frame_info
*frame
,
2065 int regnum
, int print_all
,
2066 void (*print_register_hook
) (int))
2069 const int numregs
= NUM_REGS
+ NUM_PSEUDO_REGS
;
2070 char *raw_buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2071 char *virtual_buffer
= alloca (MAX_REGISTER_VIRTUAL_SIZE
);
2073 for (i
= 0; i
< numregs
; i
++)
2075 /* Decide between printing all regs, non-float / vector regs, or
2081 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2083 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)))
2093 /* If the register name is empty, it is undefined for this
2094 processor, so don't display anything. */
2095 if (REGISTER_NAME (i
) == NULL
|| *(REGISTER_NAME (i
)) == '\0')
2098 fputs_filtered (REGISTER_NAME (i
), file
);
2099 print_spaces_filtered (15 - strlen (REGISTER_NAME (i
)), file
);
2101 /* Get the data in raw format. */
2102 if (! frame_register_read (frame
, i
, raw_buffer
))
2104 fprintf_filtered (file
, "*value not available*\n");
2108 /* FIXME: cagney/2002-08-03: This code shouldn't be necessary.
2109 The function frame_register_read() should have returned the
2110 pre-cooked register so no conversion is necessary. */
2111 /* Convert raw data to virtual format if necessary. */
2112 if (REGISTER_CONVERTIBLE (i
))
2114 REGISTER_CONVERT_TO_VIRTUAL (i
, REGISTER_VIRTUAL_TYPE (i
),
2115 raw_buffer
, virtual_buffer
);
2119 memcpy (virtual_buffer
, raw_buffer
,
2120 REGISTER_VIRTUAL_SIZE (i
));
2123 /* If virtual format is floating, print it that way, and in raw
2125 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2129 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2130 file
, 0, 1, 0, Val_pretty_default
);
2132 fprintf_filtered (file
, "\t(raw 0x");
2133 for (j
= 0; j
< REGISTER_RAW_SIZE (i
); j
++)
2136 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2139 idx
= REGISTER_RAW_SIZE (i
) - 1 - j
;
2140 fprintf_filtered (file
, "%02x", (unsigned char) raw_buffer
[idx
]);
2142 fprintf_filtered (file
, ")");
2146 /* Print the register in hex. */
2147 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2148 file
, 'x', 1, 0, Val_pretty_default
);
2149 /* If not a vector register, print it also according to its
2151 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)) == 0)
2153 fprintf_filtered (file
, "\t");
2154 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2155 file
, 0, 1, 0, Val_pretty_default
);
2159 /* Some sparc specific info. */
2160 if (print_register_hook
!= NULL
)
2161 print_register_hook (i
);
2163 fprintf_filtered (file
, "\n");
2168 sparc_print_registers_info (struct gdbarch
*gdbarch
,
2169 struct ui_file
*file
,
2170 struct frame_info
*frame
,
2171 int regnum
, int print_all
)
2173 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
,
2174 sparc_print_register_hook
);
2178 sparc_do_registers_info (int regnum
, int all
)
2180 sparc_print_registers_info (current_gdbarch
, gdb_stdout
, deprecated_selected_frame
,
2185 // OBSOLETE static void
2186 // OBSOLETE sparclet_print_registers_info (struct gdbarch *gdbarch,
2187 // OBSOLETE struct ui_file *file,
2188 // OBSOLETE struct frame_info *frame,
2189 // OBSOLETE int regnum, int print_all)
2191 // OBSOLETE sparc_print_registers (gdbarch, file, frame, regnum, print_all, NULL);
2195 // OBSOLETE sparclet_do_registers_info (int regnum, int all)
2197 // OBSOLETE sparclet_print_registers_info (current_gdbarch, gdb_stdout,
2198 // OBSOLETE deprecated_selected_frame, regnum, all);
2204 gdb_print_insn_sparc (bfd_vma memaddr
, disassemble_info
*info
)
2206 /* It's necessary to override mach again because print_insn messes it up. */
2207 info
->mach
= TARGET_ARCHITECTURE
->mach
;
2208 return print_insn_sparc (memaddr
, info
);
2211 /* The SPARC passes the arguments on the stack; arguments smaller
2212 than an int are promoted to an int. The first 6 words worth of
2213 args are also passed in registers o0 - o5. */
2216 sparc32_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2217 int struct_return
, CORE_ADDR struct_addr
)
2220 int accumulate_size
= 0;
2227 struct sparc_arg
*sparc_args
=
2228 (struct sparc_arg
*) alloca (nargs
* sizeof (struct sparc_arg
));
2229 struct sparc_arg
*m_arg
;
2231 /* Promote arguments if necessary, and calculate their stack offsets
2233 for (i
= 0, m_arg
= sparc_args
; i
< nargs
; i
++, m_arg
++)
2235 struct value
*arg
= args
[i
];
2236 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
2237 /* Cast argument to long if necessary as the compiler does it too. */
2238 switch (TYPE_CODE (arg_type
))
2241 case TYPE_CODE_BOOL
:
2242 case TYPE_CODE_CHAR
:
2243 case TYPE_CODE_RANGE
:
2244 case TYPE_CODE_ENUM
:
2245 if (TYPE_LENGTH (arg_type
) < TYPE_LENGTH (builtin_type_long
))
2247 arg_type
= builtin_type_long
;
2248 arg
= value_cast (arg_type
, arg
);
2254 m_arg
->len
= TYPE_LENGTH (arg_type
);
2255 m_arg
->offset
= accumulate_size
;
2256 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & ~3;
2257 m_arg
->contents
= VALUE_CONTENTS (arg
);
2260 /* Make room for the arguments on the stack. */
2261 accumulate_size
+= DEPRECATED_CALL_DUMMY_STACK_ADJUST
;
2262 sp
= ((sp
- accumulate_size
) & ~7) + DEPRECATED_CALL_DUMMY_STACK_ADJUST
;
2264 /* `Push' arguments on the stack. */
2265 for (i
= 0, oregnum
= 0, m_arg
= sparc_args
;
2269 write_memory (sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
2271 j
< m_arg
->len
&& oregnum
< 6;
2272 j
+= SPARC_INTREG_SIZE
, oregnum
++)
2273 deprecated_write_register_gen (O0_REGNUM
+ oregnum
, m_arg
->contents
+ j
);
2280 /* Extract from an array REGBUF containing the (raw) register state
2281 a function return value of type TYPE, and copy that, in virtual format,
2285 sparc32_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2287 int typelen
= TYPE_LENGTH (type
);
2288 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2290 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2291 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2294 ®buf
[O0_REGNUM
* regsize
+
2296 || TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
? 0
2297 : regsize
- typelen
)],
2302 /* Write into appropriate registers a function return value
2303 of type TYPE, given in virtual format. On SPARCs with FPUs,
2304 float values are returned in %f0 (and %f1). In all other cases,
2305 values are returned in register %o0. */
2308 sparc_store_return_value (struct type
*type
, char *valbuf
)
2313 buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2315 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2316 /* Floating-point values are returned in the register pair */
2317 /* formed by %f0 and %f1 (doubles are, anyway). */
2320 /* Other values are returned in register %o0. */
2323 /* Add leading zeros to the value. */
2324 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (regno
))
2326 memset (buffer
, 0, REGISTER_RAW_SIZE (regno
));
2327 memcpy (buffer
+ REGISTER_RAW_SIZE (regno
) - TYPE_LENGTH (type
), valbuf
,
2328 TYPE_LENGTH (type
));
2329 deprecated_write_register_gen (regno
, buffer
);
2332 deprecated_write_register_bytes (REGISTER_BYTE (regno
), valbuf
,
2333 TYPE_LENGTH (type
));
2337 // OBSOLETE extern void
2338 // OBSOLETE sparclet_store_return_value (struct type *type, char *valbuf)
2340 // OBSOLETE /* Other values are returned in register %o0. */
2341 // OBSOLETE deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM), valbuf,
2342 // OBSOLETE TYPE_LENGTH (type));
2347 #ifndef CALL_DUMMY_CALL_OFFSET
2348 #define CALL_DUMMY_CALL_OFFSET \
2349 (gdbarch_tdep (current_gdbarch)->call_dummy_call_offset)
2350 #endif /* CALL_DUMMY_CALL_OFFSET */
2352 /* Insert the function address into a call dummy instruction sequence
2355 For structs and unions, if the function was compiled with Sun cc,
2356 it expects 'unimp' after the call. But gcc doesn't use that
2357 (twisted) convention. So leave a nop there for gcc (FIX_CALL_DUMMY
2358 can assume it is operating on a pristine CALL_DUMMY, not one that
2359 has already been customized for a different function). */
2362 sparc_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
,
2363 struct type
*value_type
, int using_gcc
)
2367 /* Store the relative adddress of the target function into the
2368 'call' instruction. */
2369 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
, 4,
2371 | (((fun
- (pc
+ CALL_DUMMY_CALL_OFFSET
)) >> 2)
2374 /* If the called function returns an aggregate value, fill in the UNIMP
2375 instruction containing the size of the returned aggregate return value,
2376 which follows the call instruction.
2377 For details see the SPARC Architecture Manual Version 8, Appendix D.3.
2379 Adjust the call_dummy_breakpoint_offset for the bp_call_dummy breakpoint
2380 to the proper address in the call dummy, so that `finish' after a stop
2381 in a call dummy works.
2383 Tweeking current_gdbarch is not an optimal solution, but the call
2384 to sparc_fix_call_dummy is immediately followed by a call to
2385 call_function_by_hand, which is the only function where
2386 dummy_breakpoint_offset is actually used, if it is non-zero. */
2387 if (TYPE_CODE (value_type
) == TYPE_CODE_STRUCT
2388 || TYPE_CODE (value_type
) == TYPE_CODE_UNION
)
2390 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
+ 8, 4,
2391 TYPE_LENGTH (value_type
) & 0x1fff);
2392 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x30);
2395 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x2c);
2397 if (!(GDB_TARGET_IS_SPARC64
))
2399 /* If this is not a simulator target, change the first four
2400 instructions of the call dummy to NOPs. Those instructions
2401 include a 'save' instruction and are designed to work around
2402 problems with register window flushing in the simulator. */
2404 if (strcmp (target_shortname
, "sim") != 0)
2406 for (i
= 0; i
< 4; i
++)
2407 store_unsigned_integer (dummy
+ (i
* 4), 4, 0x01000000);
2412 // OBSOLETE /* If this is a bi-endian target, GDB has written the call dummy
2413 // OBSOLETE in little-endian order. We must byte-swap it back to big-endian. */
2414 // OBSOLETE if (bi_endian)
2416 // OBSOLETE for (i = 0; i < CALL_DUMMY_LENGTH; i += 4)
2418 // OBSOLETE char tmp = dummy[i];
2419 // OBSOLETE dummy[i] = dummy[i + 3];
2420 // OBSOLETE dummy[i + 3] = tmp;
2421 // OBSOLETE tmp = dummy[i + 1];
2422 // OBSOLETE dummy[i + 1] = dummy[i + 2];
2423 // OBSOLETE dummy[i + 2] = tmp;
2431 // OBSOLETE /* Set target byte order based on machine type. */
2433 // OBSOLETE static int
2434 // OBSOLETE sparc_target_architecture_hook (const bfd_arch_info_type *ap)
2436 // OBSOLETE int i, j;
2438 // OBSOLETE if (ap->mach == bfd_mach_sparc_sparclite_le)
2440 // OBSOLETE target_byte_order = BFD_ENDIAN_LITTLE;
2441 // OBSOLETE bi_endian = 1;
2444 // OBSOLETE bi_endian = 0;
2445 // OBSOLETE return 1;
2450 * Module "constructor" function.
2453 static struct gdbarch
* sparc_gdbarch_init (struct gdbarch_info info
,
2454 struct gdbarch_list
*arches
);
2455 static void sparc_dump_tdep (struct gdbarch
*, struct ui_file
*);
2458 _initialize_sparc_tdep (void)
2460 /* Hook us into the gdbarch mechanism. */
2461 gdbarch_register (bfd_arch_sparc
, sparc_gdbarch_init
, sparc_dump_tdep
);
2463 tm_print_insn
= gdb_print_insn_sparc
;
2464 tm_print_insn_info
.mach
= TM_PRINT_INSN_MACH
; /* Selects sparc/sparclite */
2465 /* OBSOLETE target_architecture_hook = sparc_target_architecture_hook; */
2468 /* Compensate for stack bias. Note that we currently don't handle
2469 mixed 32/64 bit code. */
2472 sparc64_read_sp (void)
2474 CORE_ADDR sp
= read_register (SP_REGNUM
);
2482 sparc64_read_fp (void)
2484 CORE_ADDR fp
= read_register (FP_REGNUM
);
2492 sparc64_write_sp (CORE_ADDR val
)
2494 CORE_ADDR oldsp
= read_register (SP_REGNUM
);
2496 write_register (SP_REGNUM
, val
- 2047);
2498 write_register (SP_REGNUM
, val
);
2501 /* The SPARC 64 ABI passes floating-point arguments in FP0 to FP31,
2502 and all other arguments in O0 to O5. They are also copied onto
2503 the stack in the correct places. Apparently (empirically),
2504 structs of less than 16 bytes are passed member-by-member in
2505 separate registers, but I am unable to figure out the algorithm.
2506 Some members go in floating point regs, but I don't know which.
2508 FIXME: Handle small structs (less than 16 bytes containing floats).
2510 The counting regimen for using both integer and FP registers
2511 for argument passing is rather odd -- a single counter is used
2512 for both; this means that if the arguments alternate between
2513 int and float, we will waste every other register of both types. */
2516 sparc64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2517 int struct_return
, CORE_ADDR struct_retaddr
)
2519 int i
, j
, register_counter
= 0;
2521 struct type
*sparc_intreg_type
=
2522 TYPE_LENGTH (builtin_type_long
) == SPARC_INTREG_SIZE
?
2523 builtin_type_long
: builtin_type_long_long
;
2525 sp
= (sp
& ~(((unsigned long) SPARC_INTREG_SIZE
) - 1UL));
2527 /* Figure out how much space we'll need. */
2528 for (i
= nargs
- 1; i
>= 0; i
--)
2530 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2531 struct value
*copyarg
= args
[i
];
2534 if (copylen
< SPARC_INTREG_SIZE
)
2536 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2537 copylen
= SPARC_INTREG_SIZE
;
2546 /* if STRUCT_RETURN, then first argument is the struct return location. */
2548 write_register (O0_REGNUM
+ register_counter
++, struct_retaddr
);
2550 /* Now write the arguments onto the stack, while writing FP
2551 arguments into the FP registers, and other arguments into the
2552 first six 'O' registers. */
2554 for (i
= 0; i
< nargs
; i
++)
2556 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2557 struct value
*copyarg
= args
[i
];
2558 enum type_code typecode
= TYPE_CODE (VALUE_TYPE (args
[i
]));
2561 if (typecode
== TYPE_CODE_INT
||
2562 typecode
== TYPE_CODE_BOOL
||
2563 typecode
== TYPE_CODE_CHAR
||
2564 typecode
== TYPE_CODE_RANGE
||
2565 typecode
== TYPE_CODE_ENUM
)
2566 if (len
< SPARC_INTREG_SIZE
)
2568 /* Small ints will all take up the size of one intreg on
2570 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2571 copylen
= SPARC_INTREG_SIZE
;
2574 write_memory (tempsp
, VALUE_CONTENTS (copyarg
), copylen
);
2577 /* Corner case: Structs consisting of a single float member are floats.
2578 * FIXME! I don't know about structs containing multiple floats!
2579 * Structs containing mixed floats and ints are even more weird.
2584 /* Separate float args from all other args. */
2585 if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2587 if (register_counter
< 16)
2589 /* This arg gets copied into a FP register. */
2593 case 4: /* Single-precision (float) */
2594 fpreg
= FP0_REGNUM
+ 2 * register_counter
+ 1;
2595 register_counter
+= 1;
2597 case 8: /* Double-precision (double) */
2598 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2599 register_counter
+= 1;
2601 case 16: /* Quad-precision (long double) */
2602 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2603 register_counter
+= 2;
2606 internal_error (__FILE__
, __LINE__
, "bad switch");
2608 deprecated_write_register_bytes (REGISTER_BYTE (fpreg
),
2609 VALUE_CONTENTS (args
[i
]),
2613 else /* all other args go into the first six 'o' registers */
2616 j
< len
&& register_counter
< 6;
2617 j
+= SPARC_INTREG_SIZE
)
2619 int oreg
= O0_REGNUM
+ register_counter
;
2621 deprecated_write_register_gen (oreg
, VALUE_CONTENTS (copyarg
) + j
);
2622 register_counter
+= 1;
2629 /* Values <= 32 bytes are returned in o0-o3 (floating-point values are
2630 returned in f0-f3). */
2633 sp64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
,
2636 int typelen
= TYPE_LENGTH (type
);
2637 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2639 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2641 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2645 if (TYPE_CODE (type
) != TYPE_CODE_STRUCT
2646 || (TYPE_LENGTH (type
) > 32))
2649 ®buf
[O0_REGNUM
* regsize
+
2650 (typelen
>= regsize
? 0 : regsize
- typelen
)],
2656 char *o0
= ®buf
[O0_REGNUM
* regsize
];
2657 char *f0
= ®buf
[FP0_REGNUM
* regsize
];
2660 for (x
= 0; x
< TYPE_NFIELDS (type
); x
++)
2662 struct field
*f
= &TYPE_FIELDS (type
)[x
];
2663 /* FIXME: We may need to handle static fields here. */
2664 int whichreg
= (f
->loc
.bitpos
+ bitoffset
) / 32;
2665 int remainder
= ((f
->loc
.bitpos
+ bitoffset
) % 32) / 8;
2666 int where
= (f
->loc
.bitpos
+ bitoffset
) / 8;
2667 int size
= TYPE_LENGTH (f
->type
);
2668 int typecode
= TYPE_CODE (f
->type
);
2670 if (typecode
== TYPE_CODE_STRUCT
)
2672 sp64_extract_return_value (f
->type
,
2675 bitoffset
+ f
->loc
.bitpos
);
2677 else if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2679 memcpy (valbuf
+ where
, &f0
[whichreg
* 4] + remainder
, size
);
2683 memcpy (valbuf
+ where
, &o0
[whichreg
* 4] + remainder
, size
);
2690 sparc64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2692 sp64_extract_return_value (type
, regbuf
, valbuf
, 0);
2696 // OBSOLETE extern void
2697 // OBSOLETE sparclet_extract_return_value (struct type *type,
2698 // OBSOLETE char *regbuf,
2699 // OBSOLETE char *valbuf)
2701 // OBSOLETE regbuf += REGISTER_RAW_SIZE (O0_REGNUM) * 8;
2702 // OBSOLETE if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (O0_REGNUM))
2703 // OBSOLETE regbuf += REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH (type);
2705 // OBSOLETE memcpy ((void *) valbuf, regbuf, TYPE_LENGTH (type));
2710 sparc32_stack_align (CORE_ADDR addr
)
2712 return ((addr
+ 7) & -8);
2716 sparc64_stack_align (CORE_ADDR addr
)
2718 return ((addr
+ 15) & -16);
2722 sparc_print_extra_frame_info (struct frame_info
*fi
)
2724 if (fi
&& get_frame_extra_info (fi
) && get_frame_extra_info (fi
)->flat
)
2725 printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n",
2726 paddr_nz (get_frame_extra_info (fi
)->pc_addr
),
2727 paddr_nz (get_frame_extra_info (fi
)->fp_addr
));
2730 /* MULTI_ARCH support */
2733 sparc32_register_name (int regno
)
2735 static char *register_names
[] =
2736 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2737 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2738 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2739 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2741 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2742 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2743 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2744 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2746 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
2750 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2753 return register_names
[regno
];
2757 sparc64_register_name (int regno
)
2759 static char *register_names
[] =
2760 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2761 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2762 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2763 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2765 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2766 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2767 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2768 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2769 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
2770 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
2772 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", "ver",
2773 "tick", "pil", "pstate", "tstate", "tba", "tl", "tt", "tpc",
2774 "tnpc", "wstate", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
2775 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", "asr22", "asr23",
2776 "asr24", "asr25", "asr26", "asr27", "asr28", "asr29", "asr30", "asr31",
2777 /* These are here at the end to simplify removing them if we have to. */
2778 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"
2782 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2785 return register_names
[regno
];
2789 // OBSOLETE static const char *
2790 // OBSOLETE sparclite_register_name (int regno)
2792 // OBSOLETE static char *register_names[] =
2793 // OBSOLETE { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2794 // OBSOLETE "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2795 // OBSOLETE "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2796 // OBSOLETE "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2798 // OBSOLETE "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2799 // OBSOLETE "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2800 // OBSOLETE "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2801 // OBSOLETE "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2803 // OBSOLETE "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",
2804 // OBSOLETE "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr"
2807 // OBSOLETE if (regno < 0 ||
2808 // OBSOLETE regno >= (sizeof (register_names) / sizeof (register_names[0])))
2809 // OBSOLETE return NULL;
2811 // OBSOLETE return register_names[regno];
2816 // OBSOLETE static const char *
2817 // OBSOLETE sparclet_register_name (int regno)
2819 // OBSOLETE static char *register_names[] =
2820 // OBSOLETE { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2821 // OBSOLETE "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2822 // OBSOLETE "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2823 // OBSOLETE "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2825 // OBSOLETE "", "", "", "", "", "", "", "", /* no floating point registers */
2826 // OBSOLETE "", "", "", "", "", "", "", "",
2827 // OBSOLETE "", "", "", "", "", "", "", "",
2828 // OBSOLETE "", "", "", "", "", "", "", "",
2830 // OBSOLETE "y", "psr", "wim", "tbr", "pc", "npc", "", "", /* no FPSR or CPSR */
2831 // OBSOLETE "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "",
2833 // OBSOLETE /* ASR15 ASR19 (don't display them) */
2834 // OBSOLETE "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22"
2835 // OBSOLETE /* None of the rest get displayed */
2837 // OBSOLETE "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7",
2838 // OBSOLETE "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15",
2839 // OBSOLETE "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23",
2840 // OBSOLETE "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31",
2842 // OBSOLETE #endif /* 0 */
2845 // OBSOLETE if (regno < 0 ||
2846 // OBSOLETE regno >= (sizeof (register_names) / sizeof (register_names[0])))
2847 // OBSOLETE return NULL;
2849 // OBSOLETE return register_names[regno];
2854 sparc_push_return_address (CORE_ADDR pc_unused
, CORE_ADDR sp
)
2856 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2858 /* The return PC of the dummy_frame is the former 'current' PC
2859 (where we were before we made the target function call).
2860 This is saved in %i7 by push_dummy_frame.
2862 We will save the 'call dummy location' (ie. the address
2863 to which the target function will return) in %o7.
2864 This address will actually be the program's entry point.
2865 There will be a special call_dummy breakpoint there. */
2867 write_register (O7_REGNUM
,
2868 CALL_DUMMY_ADDRESS () - 8);
2874 /* Should call_function allocate stack space for a struct return? */
2877 sparc64_use_struct_convention (int gcc_p
, struct type
*type
)
2879 return (TYPE_LENGTH (type
) > 32);
2882 /* Store the address of the place in which to copy the structure the
2883 subroutine will return. This is called from call_function_by_hand.
2884 The ultimate mystery is, tho, what is the value "16"?
2886 MVS: That's the offset from where the sp is now, to where the
2887 subroutine is gonna expect to find the struct return address. */
2890 sparc32_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2895 val
= alloca (SPARC_INTREG_SIZE
);
2896 store_unsigned_integer (val
, SPARC_INTREG_SIZE
, addr
);
2897 write_memory (sp
+ (16 * SPARC_INTREG_SIZE
), val
, SPARC_INTREG_SIZE
);
2899 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2901 /* Now adjust the value of the link register, which was previously
2902 stored by push_return_address. Functions that return structs are
2903 peculiar in that they return to link register + 12, rather than
2904 link register + 8. */
2906 o7
= read_register (O7_REGNUM
);
2907 write_register (O7_REGNUM
, o7
- 4);
2912 sparc64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2914 /* FIXME: V9 uses %o0 for this. */
2915 /* FIXME MVS: Only for small enough structs!!! */
2917 target_write_memory (sp
+ (16 * SPARC_INTREG_SIZE
),
2918 (char *) &addr
, SPARC_INTREG_SIZE
);
2920 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2922 /* Now adjust the value of the link register, which was previously
2923 stored by push_return_address. Functions that return structs are
2924 peculiar in that they return to link register + 12, rather than
2925 link register + 8. */
2927 write_register (O7_REGNUM
, read_register (O7_REGNUM
) - 4);
2932 /* Default target data type for register REGNO. */
2934 static struct type
*
2935 sparc32_register_virtual_type (int regno
)
2937 if (regno
== PC_REGNUM
||
2938 regno
== FP_REGNUM
||
2940 return builtin_type_unsigned_int
;
2942 return builtin_type_int
;
2944 return builtin_type_float
;
2945 return builtin_type_int
;
2948 static struct type
*
2949 sparc64_register_virtual_type (int regno
)
2951 if (regno
== PC_REGNUM
||
2952 regno
== FP_REGNUM
||
2954 return builtin_type_unsigned_long_long
;
2956 return builtin_type_long_long
;
2958 return builtin_type_float
;
2960 return builtin_type_double
;
2961 return builtin_type_long_long
;
2964 /* Number of bytes of storage in the actual machine representation for
2968 sparc32_register_size (int regno
)
2974 sparc64_register_size (int regno
)
2976 return (regno
< 32 ? 8 : regno
< 64 ? 4 : 8);
2979 /* Index within the `registers' buffer of the first byte of the space
2980 for register REGNO. */
2983 sparc32_register_byte (int regno
)
2989 sparc64_register_byte (int regno
)
2993 else if (regno
< 64)
2994 return 32 * 8 + (regno
- 32) * 4;
2995 else if (regno
< 80)
2996 return 32 * 8 + 32 * 4 + (regno
- 64) * 8;
2998 return 64 * 8 + (regno
- 80) * 8;
3001 /* Immediately after a function call, return the saved pc.
3002 Can't go through the frames for this because on some machines
3003 the new frame is not set up until the new function executes
3004 some instructions. */
3007 sparc_saved_pc_after_call (struct frame_info
*fi
)
3009 return sparc_pc_adjust (read_register (RP_REGNUM
));
3012 /* Convert registers between 'raw' and 'virtual' formats.
3013 They are the same on sparc, so there's nothing to do. */
3016 sparc_convert_to_virtual (int regnum
, struct type
*type
, char *from
, char *to
)
3017 { /* do nothing (should never be called) */
3021 sparc_convert_to_raw (struct type
*type
, int regnum
, char *from
, char *to
)
3022 { /* do nothing (should never be called) */
3025 /* Init saved regs: nothing to do, just a place-holder function. */
3028 sparc_frame_init_saved_regs (struct frame_info
*fi_ignored
)
3032 /* gdbarch fix call dummy:
3033 All this function does is rearrange the arguments before calling
3034 sparc_fix_call_dummy (which does the real work). */
3037 sparc_gdbarch_fix_call_dummy (char *dummy
,
3041 struct value
**args
,
3045 if (CALL_DUMMY_LOCATION
== ON_STACK
)
3046 sparc_fix_call_dummy (dummy
, pc
, fun
, type
, gcc_p
);
3049 /* CALL_DUMMY_ADDRESS: fetch the breakpoint address for a call dummy. */
3052 sparc_call_dummy_address (void)
3054 return (CALL_DUMMY_START_OFFSET
) + CALL_DUMMY_BREAKPOINT_OFFSET
;
3057 /* Supply the Y register number to those that need it. */
3060 sparc_y_regnum (void)
3062 return gdbarch_tdep (current_gdbarch
)->y_regnum
;
3066 sparc_reg_struct_has_addr (int gcc_p
, struct type
*type
)
3068 if (GDB_TARGET_IS_SPARC64
)
3069 return (TYPE_LENGTH (type
) > 32);
3071 return (gcc_p
!= 1);
3075 sparc_intreg_size (void)
3077 return SPARC_INTREG_SIZE
;
3081 sparc_return_value_on_stack (struct type
*type
)
3083 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&&
3084 TYPE_LENGTH (type
) > 8)
3091 * Gdbarch "constructor" function.
3094 #define SPARC32_CALL_DUMMY_ON_STACK
3096 #define SPARC_SP_REGNUM 14
3097 #define SPARC_FP_REGNUM 30
3098 #define SPARC_FP0_REGNUM 32
3099 #define SPARC32_NPC_REGNUM 69
3100 #define SPARC32_PC_REGNUM 68
3101 #define SPARC32_Y_REGNUM 64
3102 #define SPARC64_PC_REGNUM 80
3103 #define SPARC64_NPC_REGNUM 81
3104 #define SPARC64_Y_REGNUM 85
3106 static struct gdbarch
*
3107 sparc_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3109 struct gdbarch
*gdbarch
;
3110 struct gdbarch_tdep
*tdep
;
3112 static LONGEST call_dummy_32
[] =
3113 { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,
3114 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,
3115 0xd203a048, 0x40000000, 0xd003a044, 0x01000000,
3116 0x91d02001, 0x01000000
3118 static LONGEST call_dummy_64
[] =
3119 { 0x9de3bec0fd3fa7f7LL
, 0xf93fa7eff53fa7e7LL
,
3120 0xf13fa7dfed3fa7d7LL
, 0xe93fa7cfe53fa7c7LL
,
3121 0xe13fa7bfdd3fa7b7LL
, 0xd93fa7afd53fa7a7LL
,
3122 0xd13fa79fcd3fa797LL
, 0xc93fa78fc53fa787LL
,
3123 0xc13fa77fcc3fa777LL
, 0xc83fa76fc43fa767LL
,
3124 0xc03fa75ffc3fa757LL
, 0xf83fa74ff43fa747LL
,
3125 0xf03fa73f01000000LL
, 0x0100000001000000LL
,
3126 0x0100000091580000LL
, 0xd027a72b93500000LL
,
3127 0xd027a72791480000LL
, 0xd027a72391400000LL
,
3128 0xd027a71fda5ba8a7LL
, 0xd85ba89fd65ba897LL
,
3129 0xd45ba88fd25ba887LL
, 0x9fc02000d05ba87fLL
,
3130 0x0100000091d02001LL
, 0x0100000001000000LL
3132 static LONGEST call_dummy_nil
[] = {0};
3134 /* Try to determine the OS ABI of the object we are loading. */
3136 if (info
.abfd
!= NULL
3137 && info
.osabi
== GDB_OSABI_UNKNOWN
)
3139 /* If it's an ELF file, assume it's Solaris. */
3140 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
3141 info
.osabi
= GDB_OSABI_SOLARIS
;
3144 /* First see if there is already a gdbarch that can satisfy the request. */
3145 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3147 return arches
->gdbarch
;
3149 /* None found: is the request for a sparc architecture? */
3150 if (info
.bfd_arch_info
->arch
!= bfd_arch_sparc
)
3151 return NULL
; /* No; then it's not for us. */
3153 /* Yes: create a new gdbarch for the specified machine type. */
3154 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
3155 gdbarch
= gdbarch_alloc (&info
, tdep
);
3157 /* First set settings that are common for all sparc architectures. */
3158 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
3159 set_gdbarch_breakpoint_from_pc (gdbarch
, memory_breakpoint_from_pc
);
3160 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3161 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3162 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sparc_extract_struct_value_address
);
3163 set_gdbarch_fix_call_dummy (gdbarch
, sparc_gdbarch_fix_call_dummy
);
3164 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3165 set_gdbarch_fp_regnum (gdbarch
, SPARC_FP_REGNUM
);
3166 set_gdbarch_fp0_regnum (gdbarch
, SPARC_FP0_REGNUM
);
3167 set_gdbarch_deprecated_frame_chain (gdbarch
, sparc_frame_chain
);
3168 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, sparc_frame_init_saved_regs
);
3169 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
3170 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, sparc_frame_saved_pc
);
3171 set_gdbarch_frameless_function_invocation (gdbarch
,
3172 frameless_look_for_prologue
);
3173 set_gdbarch_deprecated_get_saved_register (gdbarch
, sparc_get_saved_register
);
3174 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, sparc_init_extra_frame_info
);
3175 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3176 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3177 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
3178 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3179 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 8);
3180 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 8);
3181 set_gdbarch_deprecated_pop_frame (gdbarch
, sparc_pop_frame
);
3182 set_gdbarch_deprecated_push_return_address (gdbarch
, sparc_push_return_address
);
3183 set_gdbarch_deprecated_push_dummy_frame (gdbarch
, sparc_push_dummy_frame
);
3184 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
3185 set_gdbarch_register_convert_to_raw (gdbarch
, sparc_convert_to_raw
);
3186 set_gdbarch_register_convert_to_virtual (gdbarch
,
3187 sparc_convert_to_virtual
);
3188 set_gdbarch_register_convertible (gdbarch
,
3189 generic_register_convertible_not
);
3190 set_gdbarch_reg_struct_has_addr (gdbarch
, sparc_reg_struct_has_addr
);
3191 set_gdbarch_return_value_on_stack (gdbarch
, sparc_return_value_on_stack
);
3192 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, sparc_saved_pc_after_call
);
3193 set_gdbarch_prologue_frameless_p (gdbarch
, sparc_prologue_frameless_p
);
3194 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
3195 set_gdbarch_skip_prologue (gdbarch
, sparc_skip_prologue
);
3196 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
);
3197 set_gdbarch_deprecated_use_generic_dummy_frames (gdbarch
, 0);
3198 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
3201 * Settings that depend only on 32/64 bit word size
3204 switch (info
.bfd_arch_info
->mach
)
3206 case bfd_mach_sparc
:
3208 // OBSOLETE case bfd_mach_sparc_sparclet:
3209 // OBSOLETE case bfd_mach_sparc_sparclite:
3211 case bfd_mach_sparc_v8plus
:
3212 case bfd_mach_sparc_v8plusa
:
3214 // OBSOLETE case bfd_mach_sparc_sparclite_le:
3216 /* 32-bit machine types: */
3218 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3219 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3220 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3221 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0x30);
3222 set_gdbarch_call_dummy_length (gdbarch
, 0x38);
3224 /* NOTE: cagney/2002-04-26: Based from info posted by Peter
3225 Schauer around Oct '99. Briefly, due to aspects of the SPARC
3226 ABI, it isn't possible to use ON_STACK with a strictly
3229 Peter Schauer writes ...
3231 No, any call from GDB to a user function returning a
3232 struct/union will fail miserably. Try this:
3251 for (i = 0; i < 4; i++)
3257 Set a breakpoint at the gx = sret () statement, run to it and
3258 issue a `print sret()'. It will not succed with your
3259 approach, and I doubt that continuing the program will work
3262 For details of the ABI see the Sparc Architecture Manual. I
3263 have Version 8 (Prentice Hall ISBN 0-13-825001-4) and the
3264 calling conventions for functions returning aggregate values
3265 are explained in Appendix D.3. */
3267 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3268 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_32
);
3270 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3271 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3273 set_gdbarch_deprecated_call_dummy_stack_adjust (gdbarch
, 68);
3274 set_gdbarch_frame_args_skip (gdbarch
, 68);
3275 set_gdbarch_function_start_offset (gdbarch
, 0);
3276 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3277 set_gdbarch_npc_regnum (gdbarch
, SPARC32_NPC_REGNUM
);
3278 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
);
3279 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3280 set_gdbarch_deprecated_push_arguments (gdbarch
, sparc32_push_arguments
);
3281 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
3282 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
3284 set_gdbarch_register_byte (gdbarch
, sparc32_register_byte
);
3285 set_gdbarch_register_raw_size (gdbarch
, sparc32_register_size
);
3286 set_gdbarch_register_size (gdbarch
, 4);
3287 set_gdbarch_register_virtual_size (gdbarch
, sparc32_register_size
);
3288 set_gdbarch_register_virtual_type (gdbarch
,
3289 sparc32_register_virtual_type
);
3290 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3291 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_32
));
3293 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3295 set_gdbarch_stack_align (gdbarch
, sparc32_stack_align
);
3296 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch
, 1);
3297 set_gdbarch_deprecated_store_struct_return (gdbarch
, sparc32_store_struct_return
);
3298 set_gdbarch_use_struct_convention (gdbarch
,
3299 generic_use_struct_convention
);
3300 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, generic_target_write_sp
);
3301 tdep
->y_regnum
= SPARC32_Y_REGNUM
;
3302 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 32;
3303 tdep
->intreg_size
= 4;
3304 tdep
->reg_save_offset
= 0x60;
3305 tdep
->call_dummy_call_offset
= 0x24;
3308 case bfd_mach_sparc_v9
:
3309 case bfd_mach_sparc_v9a
:
3310 /* 64-bit machine types: */
3311 default: /* Any new machine type is likely to be 64-bit. */
3313 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3314 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3315 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3316 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 8 * 4);
3317 set_gdbarch_call_dummy_length (gdbarch
, 192);
3318 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3319 set_gdbarch_call_dummy_start_offset (gdbarch
, 148);
3320 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_64
);
3322 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3323 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3325 set_gdbarch_deprecated_call_dummy_stack_adjust (gdbarch
, 128);
3326 set_gdbarch_frame_args_skip (gdbarch
, 136);
3327 set_gdbarch_function_start_offset (gdbarch
, 0);
3328 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3329 set_gdbarch_npc_regnum (gdbarch
, SPARC64_NPC_REGNUM
);
3330 set_gdbarch_pc_regnum (gdbarch
, SPARC64_PC_REGNUM
);
3331 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3332 set_gdbarch_deprecated_push_arguments (gdbarch
, sparc64_push_arguments
);
3333 /* NOTE different for at_entry */
3334 set_gdbarch_read_fp (gdbarch
, sparc64_read_fp
);
3335 set_gdbarch_read_sp (gdbarch
, sparc64_read_sp
);
3336 /* Some of the registers aren't 64 bits, but it's a lot simpler just
3337 to assume they all are (since most of them are). */
3338 set_gdbarch_register_byte (gdbarch
, sparc64_register_byte
);
3339 set_gdbarch_register_raw_size (gdbarch
, sparc64_register_size
);
3340 set_gdbarch_register_size (gdbarch
, 8);
3341 set_gdbarch_register_virtual_size (gdbarch
, sparc64_register_size
);
3342 set_gdbarch_register_virtual_type (gdbarch
,
3343 sparc64_register_virtual_type
);
3344 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3345 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_64
));
3347 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3349 set_gdbarch_stack_align (gdbarch
, sparc64_stack_align
);
3350 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch
, 1);
3351 set_gdbarch_deprecated_store_struct_return (gdbarch
, sparc64_store_struct_return
);
3352 set_gdbarch_use_struct_convention (gdbarch
,
3353 sparc64_use_struct_convention
);
3354 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, sparc64_write_sp
);
3355 tdep
->y_regnum
= SPARC64_Y_REGNUM
;
3356 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 48;
3357 tdep
->intreg_size
= 8;
3358 tdep
->reg_save_offset
= 0x90;
3359 tdep
->call_dummy_call_offset
= 148 + 4 * 5;
3364 * Settings that vary per-architecture:
3367 switch (info
.bfd_arch_info
->mach
)
3369 case bfd_mach_sparc
:
3370 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3371 set_gdbarch_num_regs (gdbarch
, 72);
3372 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3373 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3374 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3376 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3378 tdep
->fp_register_bytes
= 32 * 4;
3379 tdep
->print_insn_mach
= bfd_mach_sparc
;
3382 // OBSOLETE case bfd_mach_sparc_sparclet:
3383 // OBSOLETE set_gdbarch_deprecated_extract_return_value (gdbarch, sparclet_extract_return_value);
3384 // OBSOLETE set_gdbarch_num_regs (gdbarch, 32 + 32 + 8 + 8 + 8);
3385 // OBSOLETE set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4 + 8*4 + 8*4);
3386 // OBSOLETE set_gdbarch_register_name (gdbarch, sparclet_register_name);
3387 // OBSOLETE set_gdbarch_deprecated_store_return_value (gdbarch, sparclet_store_return_value);
3388 // OBSOLETE tdep->has_fpu = 0; /* (all but sparclet and sparclite) */
3389 // OBSOLETE tdep->fp_register_bytes = 0;
3390 // OBSOLETE tdep->print_insn_mach = bfd_mach_sparc_sparclet;
3394 // OBSOLETE case bfd_mach_sparc_sparclite:
3395 // OBSOLETE set_gdbarch_deprecated_extract_return_value (gdbarch, sparc32_extract_return_value);
3396 // OBSOLETE set_gdbarch_num_regs (gdbarch, 80);
3397 // OBSOLETE set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4 + 8*4);
3398 // OBSOLETE set_gdbarch_register_name (gdbarch, sparclite_register_name);
3399 // OBSOLETE set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3400 // OBSOLETE tdep->has_fpu = 0; /* (all but sparclet and sparclite) */
3401 // OBSOLETE tdep->fp_register_bytes = 0;
3402 // OBSOLETE tdep->print_insn_mach = bfd_mach_sparc_sparclite;
3405 case bfd_mach_sparc_v8plus
:
3406 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3407 set_gdbarch_num_regs (gdbarch
, 72);
3408 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3409 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3410 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3411 tdep
->print_insn_mach
= bfd_mach_sparc
;
3412 tdep
->fp_register_bytes
= 32 * 4;
3414 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3417 case bfd_mach_sparc_v8plusa
:
3418 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3419 set_gdbarch_num_regs (gdbarch
, 72);
3420 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3421 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3422 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3424 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3426 tdep
->fp_register_bytes
= 32 * 4;
3427 tdep
->print_insn_mach
= bfd_mach_sparc
;
3430 // OBSOLETE case bfd_mach_sparc_sparclite_le:
3431 // OBSOLETE set_gdbarch_deprecated_extract_return_value (gdbarch, sparc32_extract_return_value);
3432 // OBSOLETE set_gdbarch_num_regs (gdbarch, 80);
3433 // OBSOLETE set_gdbarch_register_bytes (gdbarch, 32*4 + 32*4 + 8*4 + 8*4);
3434 // OBSOLETE set_gdbarch_register_name (gdbarch, sparclite_register_name);
3435 // OBSOLETE set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3436 // OBSOLETE tdep->has_fpu = 0; /* (all but sparclet and sparclite) */
3437 // OBSOLETE tdep->fp_register_bytes = 0;
3438 // OBSOLETE tdep->print_insn_mach = bfd_mach_sparc_sparclite;
3441 case bfd_mach_sparc_v9
:
3442 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3443 set_gdbarch_num_regs (gdbarch
, 125);
3444 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3445 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3446 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3448 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3450 tdep
->fp_register_bytes
= 64 * 4;
3451 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3453 case bfd_mach_sparc_v9a
:
3454 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3455 set_gdbarch_num_regs (gdbarch
, 125);
3456 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3457 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3458 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3460 // OBSOLETE tdep->has_fpu = 1; /* (all but sparclet and sparclite) */
3462 tdep
->fp_register_bytes
= 64 * 4;
3463 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3467 /* Hook in OS ABI-specific overrides, if they have been registered. */
3468 gdbarch_init_osabi (info
, gdbarch
);
3474 sparc_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3476 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3482 // OBSOLETE fprintf_unfiltered (file, "sparc_dump_tdep: has_fpu = %d\n",
3483 // OBSOLETE tdep->has_fpu);
3485 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_register_bytes = %d\n",
3486 tdep
->fp_register_bytes
);
3487 fprintf_unfiltered (file
, "sparc_dump_tdep: y_regnum = %d\n",
3489 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_max_regnum = %d\n",
3490 tdep
->fp_max_regnum
);
3491 fprintf_unfiltered (file
, "sparc_dump_tdep: intreg_size = %d\n",
3493 fprintf_unfiltered (file
, "sparc_dump_tdep: reg_save_offset = %d\n",
3494 tdep
->reg_save_offset
);
3495 fprintf_unfiltered (file
, "sparc_dump_tdep: call_dummy_call_offset = %d\n",
3496 tdep
->call_dummy_call_offset
);
3497 fprintf_unfiltered (file
, "sparc_dump_tdep: print_insn_match = %d\n",
3498 tdep
->print_insn_mach
);