1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
29 #include <sys/procfs.h>
35 extern int stop_after_trap
;
37 /* We don't store all registers immediately when requested, since they
38 get sent over in large chunks anyway. Instead, we accumulate most
39 of the changes and send them over once. "deferred_stores" keeps
40 track of which sets of registers we have locally-changed copies of,
41 so we only need send the groups that have changed. */
43 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
45 /* Macros to extract fields from sparc instructions. */
46 #define X_OP(i) (((i) >> 30) & 0x3)
47 #define X_RD(i) (((i) >> 25) & 0x1f)
48 #define X_A(i) (((i) >> 29) & 1)
49 #define X_COND(i) (((i) >> 25) & 0xf)
50 #define X_OP2(i) (((i) >> 22) & 0x7)
51 #define X_IMM22(i) ((i) & 0x3fffff)
52 #define X_OP3(i) (((i) >> 19) & 0x3f)
53 #define X_RS1(i) (((i) >> 14) & 0x1f)
54 #define X_I(i) (((i) >> 13) & 1)
55 #define X_IMM13(i) ((i) & 0x1fff)
56 /* Sign extension macros. */
57 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
58 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
62 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
65 /* Simulate single-step ptrace call for sun4. Code written by Gary
66 Beihl (beihl@mcc.com). */
68 /* npc4 and next_pc describe the situation at the time that the
69 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
70 static CORE_ADDR next_pc
, npc4
, target
;
71 static int brknpc4
, brktrg
;
72 typedef char binsn_quantum
[BREAKPOINT_MAX
];
73 static binsn_quantum break_mem
[3];
75 /* Non-zero if we just simulated a single-step ptrace call. This is
76 needed because we cannot remove the breakpoints in the inferior
77 process until after the `wait' in `wait_for_inferior'. Used for
82 /* single_step() is called just before we want to resume the inferior,
83 if we want to single-step it but there is no hardware or kernel single-step
84 support (as on all SPARCs). We find all the possible targets of the
85 coming instruction and breakpoint them.
87 single_step is also called just after the inferior stops. If we had
88 set up a simulated single-step, we undo our damage. */
92 int ignore
; /* pid, but we don't need it */
94 branch_type br
, isannulled();
100 /* Always set breakpoint for NPC. */
101 next_pc
= read_register (NPC_REGNUM
);
102 npc4
= next_pc
+ 4; /* branch not taken */
104 target_insert_breakpoint (next_pc
, break_mem
[0]);
105 /* printf_unfiltered ("set break at %x\n",next_pc); */
107 pc
= read_register (PC_REGNUM
);
108 pc_instruction
= read_memory_integer (pc
, 4);
109 br
= isannulled (pc_instruction
, pc
, &target
);
110 brknpc4
= brktrg
= 0;
114 /* Conditional annulled branch will either end up at
115 npc (if taken) or at npc+4 (if not taken).
118 target_insert_breakpoint (npc4
, break_mem
[1]);
120 else if (br
== baa
&& target
!= next_pc
)
122 /* Unconditional annulled branch will always end up at
125 target_insert_breakpoint (target
, break_mem
[2]);
128 /* We are ready to let it go */
134 /* Remove breakpoints */
135 target_remove_breakpoint (next_pc
, break_mem
[0]);
138 target_remove_breakpoint (npc4
, break_mem
[1]);
141 target_remove_breakpoint (target
, break_mem
[2]);
147 /* Call this for each newly created frame. For SPARC, we need to calculate
148 the bottom of the frame, and do some extra work if the prologue
149 has been generated via the -mflat option to GCC. In particular,
150 we need to know where the previous fp and the pc have been stashed,
151 since their exact position within the frame may vary. */
154 sparc_init_extra_frame_info (fromleaf
, fi
)
156 struct frame_info
*fi
;
164 (fi
->frame
== fi
->next
->frame
? fi
->next
->bottom
: fi
->next
->frame
) :
165 read_register (SP_REGNUM
));
167 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
168 to create_new_frame. */
171 char buf
[MAX_REGISTER_RAW_SIZE
];
174 /* Compute ->frame as if not flat. If it is flat, we'll change
176 /* FIXME: If error reading memory, should just stop backtracing, rather
178 get_saved_register (buf
, 0, 0, fi
, FP_REGNUM
, 0);
179 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
182 /* Decide whether this is a function with a ``flat register window''
183 frame. For such functions, the frame pointer is actually in %i7. */
185 if (find_pc_partial_function (fi
->pc
, &name
, &addr
, NULL
))
187 /* See if the function starts with an add (which will be of a
188 negative number if a flat frame) to the sp. FIXME: Does not
189 handle large frames which will need more than one instruction
191 insn
= read_memory_integer (addr
, 4);
192 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
193 && X_I (insn
) && X_SIMM13 (insn
) < 0)
195 int offset
= X_SIMM13 (insn
);
197 /* Then look for a save of %i7 into the frame. */
198 insn
= read_memory_integer (addr
+ 4, 4);
202 && X_RS1 (insn
) == 14)
204 char buf
[MAX_REGISTER_RAW_SIZE
];
206 /* We definitely have a flat frame now. */
209 fi
->sp_offset
= offset
;
211 /* Overwrite the frame's address with the value in %i7. */
212 get_saved_register (buf
, 0, 0, fi
, I7_REGNUM
, 0);
213 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
215 /* Record where the fp got saved. */
216 fi
->fp_addr
= fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
218 /* Also try to collect where the pc got saved to. */
220 insn
= read_memory_integer (addr
+ 12, 4);
224 && X_RS1 (insn
) == 14)
225 fi
->pc_addr
= fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
229 if (fi
->next
&& fi
->frame
== 0)
231 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
232 fi
->frame
= fi
->next
->frame
;
233 fi
->pc
= fi
->next
->pc
;
238 sparc_frame_chain (frame
)
239 struct frame_info
*frame
;
241 /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
242 value. If it realy is zero, we detect it later in
243 sparc_init_prev_frame. */
248 sparc_extract_struct_value_address (regbuf
)
249 char regbuf
[REGISTER_BYTES
];
251 return read_memory_integer (((int *)(regbuf
))[SP_REGNUM
]+(16*4),
252 TARGET_PTR_BIT
/ TARGET_CHAR_BIT
);
255 /* Find the pc saved in frame FRAME. */
258 sparc_frame_saved_pc (frame
)
259 struct frame_info
*frame
;
261 char buf
[MAX_REGISTER_RAW_SIZE
];
264 if (frame
->signal_handler_caller
)
266 /* This is the signal trampoline frame.
267 Get the saved PC from the sigcontext structure. */
269 #ifndef SIGCONTEXT_PC_OFFSET
270 #define SIGCONTEXT_PC_OFFSET 12
273 CORE_ADDR sigcontext_addr
;
274 char scbuf
[TARGET_PTR_BIT
/ HOST_CHAR_BIT
];
275 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
278 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
279 as the third parameter. The offset to the saved pc is 12. */
280 find_pc_partial_function (frame
->pc
, &name
,
281 (CORE_ADDR
*)NULL
,(CORE_ADDR
*)NULL
);
282 if (name
&& STREQ (name
, "ucbsigvechandler"))
283 saved_pc_offset
= 12;
285 /* The sigcontext address is contained in register O2. */
286 get_saved_register (buf
, (int *)NULL
, (CORE_ADDR
*)NULL
,
287 frame
, O0_REGNUM
+ 2, (enum lval_type
*)NULL
);
288 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
));
290 /* Don't cause a memory_error when accessing sigcontext in case the
291 stack layout has changed or the stack is corrupt. */
292 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
293 scbuf
, sizeof (scbuf
));
294 return extract_address (scbuf
, sizeof (scbuf
));
297 addr
= frame
->pc_addr
;
299 addr
= frame
->bottom
+ FRAME_SAVED_I0
+
300 REGISTER_RAW_SIZE (I7_REGNUM
) * (I7_REGNUM
- I0_REGNUM
);
303 /* A flat frame leaf function might not save the PC anywhere,
304 just leave it in %o7. */
305 return PC_ADJUST (read_register (O7_REGNUM
));
307 read_memory (addr
, buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
308 return PC_ADJUST (extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
)));
311 /* Since an individual frame in the frame cache is defined by two
312 arguments (a frame pointer and a stack pointer), we need two
313 arguments to get info for an arbitrary stack frame. This routine
314 takes two arguments and makes the cached frames look as if these
315 two arguments defined a frame on the cache. This allows the rest
316 of info frame to extract the important arguments without
320 setup_arbitrary_frame (argc
, argv
)
324 struct frame_info
*frame
;
327 error ("Sparc frame specifications require two arguments: fp and sp");
329 frame
= create_new_frame (argv
[0], 0);
332 fatal ("internal: create_new_frame returned invalid frame");
334 frame
->bottom
= argv
[1];
335 frame
->pc
= FRAME_SAVED_PC (frame
);
339 /* Given a pc value, skip it forward past the function prologue by
340 disassembling instructions that appear to be a prologue.
342 If FRAMELESS_P is set, we are only testing to see if the function
343 is frameless. This allows a quicker answer.
345 This routine should be more specific in its actions; making sure
346 that it uses the same register in the initial prologue section. */
348 static CORE_ADDR examine_prologue
PARAMS ((CORE_ADDR
, int, struct frame_info
*,
349 struct frame_saved_regs
*));
352 examine_prologue (start_pc
, frameless_p
, fi
, saved_regs
)
355 struct frame_info
*fi
;
356 struct frame_saved_regs
*saved_regs
;
360 CORE_ADDR pc
= start_pc
;
363 insn
= read_memory_integer (pc
, 4);
365 /* Recognize the `sethi' insn and record its destination. */
366 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
370 insn
= read_memory_integer (pc
, 4);
373 /* Recognize an add immediate value to register to either %g1 or
374 the destination register recorded above. Actually, this might
375 well recognize several different arithmetic operations.
376 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
377 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
378 I imagine any compiler really does that, however). */
381 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
384 insn
= read_memory_integer (pc
, 4);
387 /* Recognize any SAVE insn. */
388 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
391 if (frameless_p
) /* If the save is all we care about, */
392 return pc
; /* return before doing more work */
393 insn
= read_memory_integer (pc
, 4);
395 /* Recognize add to %sp. */
396 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
399 if (frameless_p
) /* If the add is all we care about, */
400 return pc
; /* return before doing more work */
402 insn
= read_memory_integer (pc
, 4);
403 /* Recognize store of frame pointer (i7). */
407 && X_RS1 (insn
) == 14)
410 insn
= read_memory_integer (pc
, 4);
412 /* Recognize sub %sp, <anything>, %i7. */
415 && X_RS1 (insn
) == 14
416 && X_RD (insn
) == 31)
419 insn
= read_memory_integer (pc
, 4);
428 /* Without a save or add instruction, it's not a prologue. */
433 /* Recognize stores into the frame from the input registers.
434 This recognizes all non alternate stores of input register,
435 into a location offset from the frame pointer. */
436 if ((X_OP (insn
) == 3
437 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
438 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
439 && X_I (insn
) /* Immediate mode. */
440 && X_RS1 (insn
) == 30 /* Off of frame pointer. */
441 /* Into reserved stack space. */
442 && X_SIMM13 (insn
) >= 0x44
443 && X_SIMM13 (insn
) < 0x5b))
448 && X_RS1 (insn
) == 14
451 if (saved_regs
&& X_I (insn
))
452 saved_regs
->regs
[X_RD (insn
)] =
453 fi
->frame
+ fi
->sp_offset
+ X_SIMM13 (insn
);
458 insn
= read_memory_integer (pc
, 4);
465 skip_prologue (start_pc
, frameless_p
)
469 return examine_prologue (start_pc
, frameless_p
, NULL
, NULL
);
472 /* Check instruction at ADDR to see if it is an annulled branch.
473 All other instructions will go to NPC or will trap.
474 Set *TARGET if we find a candidate branch; set to zero if not. */
477 isannulled (instruction
, addr
, target
)
479 CORE_ADDR addr
, *target
;
481 branch_type val
= not_branch
;
482 long int offset
; /* Must be signed for sign-extend. */
486 if (X_OP (instruction
) == 0
487 && (X_OP2 (instruction
) == 2
488 || X_OP2 (instruction
) == 6
489 || X_OP2 (instruction
) == 7))
491 if (X_COND (instruction
) == 8)
492 val
= X_A (instruction
) ? baa
: ba
;
494 val
= X_A (instruction
) ? bicca
: bicc
;
495 offset
= 4 * X_DISP22 (instruction
);
496 *target
= addr
+ offset
;
502 /* Find register number REGNUM relative to FRAME and put its
503 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
504 was optimized out (and thus can't be fetched). If the variable
505 was fetched from memory, set *ADDRP to where it was fetched from,
506 otherwise it was fetched from a register.
508 The argument RAW_BUFFER must point to aligned memory. */
511 get_saved_register (raw_buffer
, optimized
, addrp
, frame
, regnum
, lval
)
515 struct frame_info
*frame
;
517 enum lval_type
*lval
;
519 struct frame_info
*frame1
;
526 frame1
= frame
->next
;
527 while (frame1
!= NULL
)
529 if (frame1
->pc
>= (frame1
->bottom
? frame1
->bottom
:
530 read_register (SP_REGNUM
))
531 && frame1
->pc
<= FRAME_FP (frame1
))
533 /* Dummy frame. All but the window regs are in there somewhere. */
534 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
535 addr
= frame1
->frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
536 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
537 addr
= frame1
->frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
538 else if (regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ 32)
539 addr
= frame1
->frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
540 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
541 addr
= frame1
->frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
543 else if (frame1
->flat
)
546 if (regnum
== RP_REGNUM
)
547 addr
= frame1
->pc_addr
;
548 else if (regnum
== I7_REGNUM
)
549 addr
= frame1
->fp_addr
;
552 CORE_ADDR func_start
;
553 struct frame_saved_regs regs
;
554 memset (®s
, 0, sizeof (regs
));
556 find_pc_partial_function (frame1
->pc
, NULL
, &func_start
, NULL
);
557 examine_prologue (func_start
, 0, frame1
, ®s
);
558 addr
= regs
.regs
[regnum
];
563 /* Normal frame. Local and In registers are saved on stack. */
564 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
565 addr
= (frame1
->prev
->bottom
566 + (regnum
- I0_REGNUM
) * REGISTER_RAW_SIZE (I0_REGNUM
)
568 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
569 addr
= (frame1
->prev
->bottom
570 + (regnum
- L0_REGNUM
) * REGISTER_RAW_SIZE (L0_REGNUM
)
572 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
574 /* Outs become ins. */
575 get_saved_register (raw_buffer
, optimized
, addrp
, frame1
,
576 (regnum
- O0_REGNUM
+ I0_REGNUM
), lval
);
582 frame1
= frame1
->next
;
588 if (regnum
== SP_REGNUM
)
590 if (raw_buffer
!= NULL
)
592 /* Put it back in target format. */
593 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
599 if (raw_buffer
!= NULL
)
600 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
605 *lval
= lval_register
;
606 addr
= REGISTER_BYTE (regnum
);
607 if (raw_buffer
!= NULL
)
608 read_register_gen (regnum
, raw_buffer
);
614 /* Push an empty stack frame, and record in it the current PC, regs, etc.
616 We save the non-windowed registers and the ins. The locals and outs
617 are new; they don't need to be saved. The i's and l's of
618 the last frame were already saved on the stack. */
620 /* Definitely see tm-sparc.h for more doc of the frame format here. */
623 sparc_push_dummy_frame ()
625 CORE_ADDR sp
, old_sp
;
626 char register_temp
[0x140];
628 old_sp
= sp
= read_register (SP_REGNUM
);
630 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
631 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), ®ister_temp
[0],
632 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
634 read_register_bytes (REGISTER_BYTE (O0_REGNUM
), ®ister_temp
[8 * 4],
635 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
637 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), ®ister_temp
[16 * 4],
638 REGISTER_RAW_SIZE (G0_REGNUM
) * 8);
640 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), ®ister_temp
[24 * 4],
641 REGISTER_RAW_SIZE (FP0_REGNUM
) * 32);
645 write_register (SP_REGNUM
, sp
);
647 write_memory (sp
+ 0x60, ®ister_temp
[0], (8 + 8 + 8 + 32) * 4);
649 write_register (FP_REGNUM
, old_sp
);
651 /* Set return address register for the call dummy to the current PC. */
652 write_register (I7_REGNUM
, read_pc() - 8);
655 /* sparc_frame_find_saved_regs (). This function is here only because
656 pop_frame uses it. Note there is an interesting corner case which
657 I think few ports of GDB get right--if you are popping a frame
658 which does not save some register that *is* saved by a more inner
659 frame (such a frame will never be a dummy frame because dummy
660 frames save all registers). Rewriting pop_frame to use
661 get_saved_register would solve this problem and also get rid of the
662 ugly duplication between sparc_frame_find_saved_regs and
665 Stores, into a struct frame_saved_regs,
666 the addresses of the saved registers of frame described by FRAME_INFO.
667 This includes special registers such as pc and fp saved in special
668 ways in the stack frame. sp is even more special:
669 the address we return for it IS the sp for the next frame.
671 Note that on register window machines, we are currently making the
672 assumption that window registers are being saved somewhere in the
673 frame in which they are being used. If they are stored in an
674 inferior frame, find_saved_register will break.
676 On the Sun 4, the only time all registers are saved is when
677 a dummy frame is involved. Otherwise, the only saved registers
678 are the LOCAL and IN registers which are saved as a result
679 of the "save/restore" opcodes. This condition is determined
680 by address rather than by value.
682 The "pc" is not stored in a frame on the SPARC. (What is stored
683 is a return address minus 8.) sparc_pop_frame knows how to
684 deal with that. Other routines might or might not.
686 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
687 about how this works. */
689 static void sparc_frame_find_saved_regs
PARAMS ((struct frame_info
*,
690 struct frame_saved_regs
*));
693 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
694 struct frame_info
*fi
;
695 struct frame_saved_regs
*saved_regs_addr
;
698 CORE_ADDR frame_addr
= FRAME_FP (fi
);
701 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
703 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
705 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
706 read_register (SP_REGNUM
))
707 && fi
->pc
<= FRAME_FP(fi
))
709 /* Dummy frame. All but the window regs are in there somewhere. */
710 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
711 saved_regs_addr
->regs
[regnum
] =
712 frame_addr
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
713 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
714 saved_regs_addr
->regs
[regnum
] =
715 frame_addr
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
716 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
717 saved_regs_addr
->regs
[regnum
] =
718 frame_addr
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
719 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
720 saved_regs_addr
->regs
[regnum
] =
721 frame_addr
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
722 frame_addr
= fi
->bottom
?
723 fi
->bottom
: read_register (SP_REGNUM
);
727 CORE_ADDR func_start
;
728 find_pc_partial_function (fi
->pc
, NULL
, &func_start
, NULL
);
729 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
731 /* Flat register window frame. */
732 saved_regs_addr
->regs
[RP_REGNUM
] = fi
->pc_addr
;
733 saved_regs_addr
->regs
[I7_REGNUM
] = fi
->fp_addr
;
737 /* Normal frame. Just Local and In registers */
738 frame_addr
= fi
->bottom
?
739 fi
->bottom
: read_register (SP_REGNUM
);
740 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+8; regnum
++)
741 saved_regs_addr
->regs
[regnum
] =
742 (frame_addr
+ (regnum
- L0_REGNUM
) * REGISTER_RAW_SIZE (L0_REGNUM
)
744 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
745 saved_regs_addr
->regs
[regnum
] =
746 (frame_addr
+ (regnum
- I0_REGNUM
) * REGISTER_RAW_SIZE (I0_REGNUM
)
753 saved_regs_addr
->regs
[O7_REGNUM
] = fi
->pc_addr
;
757 /* Pull off either the next frame pointer or the stack pointer */
758 CORE_ADDR next_next_frame_addr
=
761 read_register (SP_REGNUM
));
762 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
763 saved_regs_addr
->regs
[regnum
] =
764 (next_next_frame_addr
765 + (regnum
- O0_REGNUM
) * REGISTER_RAW_SIZE (O0_REGNUM
)
769 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
770 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
773 /* Discard from the stack the innermost frame, restoring all saved registers.
775 Note that the values stored in fsr by get_frame_saved_regs are *in
776 the context of the called frame*. What this means is that the i
777 regs of fsr must be restored into the o regs of the (calling) frame that
778 we pop into. We don't care about the output regs of the calling frame,
779 since unless it's a dummy frame, it won't have any output regs in it.
781 We never have to bother with %l (local) regs, since the called routine's
782 locals get tossed, and the calling routine's locals are already saved
785 /* Definitely see tm-sparc.h for more doc of the frame format here. */
790 register struct frame_info
*frame
= get_current_frame ();
791 register CORE_ADDR pc
;
792 struct frame_saved_regs fsr
;
793 char raw_buffer
[REGISTER_BYTES
];
796 sparc_frame_find_saved_regs (frame
, &fsr
);
797 if (fsr
.regs
[FP0_REGNUM
])
799 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
800 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
802 if (fsr
.regs
[FPS_REGNUM
])
804 read_memory (fsr
.regs
[FPS_REGNUM
], raw_buffer
, 4);
805 write_register_bytes (REGISTER_BYTE (FPS_REGNUM
), raw_buffer
, 4);
807 if (fsr
.regs
[CPS_REGNUM
])
809 read_memory (fsr
.regs
[CPS_REGNUM
], raw_buffer
, 4);
810 write_register_bytes (REGISTER_BYTE (CPS_REGNUM
), raw_buffer
, 4);
812 if (fsr
.regs
[G1_REGNUM
])
814 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
815 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
820 /* Each register might or might not have been saved, need to test
822 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
823 if (fsr
.regs
[regnum
])
824 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
825 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
826 if (fsr
.regs
[regnum
])
827 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
829 /* Handle all outs except stack pointer (o0-o5; o7). */
830 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
831 if (fsr
.regs
[regnum
])
832 write_register (regnum
, read_memory_integer (fsr
.regs
[regnum
], 4));
833 if (fsr
.regs
[O0_REGNUM
+ 7])
834 write_register (O0_REGNUM
+ 7,
835 read_memory_integer (fsr
.regs
[O0_REGNUM
+ 7], 4));
837 write_register (SP_REGNUM
, frame
->frame
);
839 else if (fsr
.regs
[I0_REGNUM
])
843 char reg_temp
[REGISTER_BYTES
];
845 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
847 /* Get the ins and locals which we are about to restore. Just
848 moving the stack pointer is all that is really needed, except
849 store_inferior_registers is then going to write the ins and
850 locals from the registers array, so we need to muck with the
852 sp
= fsr
.regs
[SP_REGNUM
];
853 read_memory (sp
, reg_temp
, REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
855 /* Restore the out registers.
856 Among other things this writes the new stack pointer. */
857 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
858 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
860 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
861 REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
863 if (fsr
.regs
[PS_REGNUM
])
864 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
865 if (fsr
.regs
[Y_REGNUM
])
866 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
867 if (fsr
.regs
[PC_REGNUM
])
869 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
870 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
871 if (fsr
.regs
[NPC_REGNUM
])
872 write_register (NPC_REGNUM
,
873 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
875 else if (frame
->flat
)
878 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (frame
->pc_addr
, 4));
881 /* I think this happens only in the innermost frame, if so then
882 it is a complicated way of saying
883 "pc = read_register (O7_REGNUM);". */
884 char buf
[MAX_REGISTER_RAW_SIZE
];
885 get_saved_register (buf
, 0, 0, frame
, O7_REGNUM
, 0);
886 pc
= PC_ADJUST (extract_address
887 (buf
, REGISTER_RAW_SIZE (O7_REGNUM
)));
890 write_register (PC_REGNUM
, pc
);
891 write_register (NPC_REGNUM
, pc
+ 4);
893 else if (fsr
.regs
[I7_REGNUM
])
895 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
896 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
897 write_register (PC_REGNUM
, pc
);
898 write_register (NPC_REGNUM
, pc
+ 4);
900 flush_cached_frames ();
903 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
904 encodes the structure size being returned. If we detect such
905 a fake insn, step past it. */
915 err
= target_read_memory (pc
+ 8, buf
, sizeof(long));
916 insn
= extract_unsigned_integer (buf
, 4);
917 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
923 /* If pc is in a shared library trampoline, return its target.
924 The SunOs 4.x linker rewrites the jump table entries for PIC
925 compiled modules in the main executable to bypass the dynamic linker
926 with jumps of the form
929 and removes the corresponding jump table relocation entry in the
931 find_solib_trampoline_target relies on the presence of the jump
932 table relocation entry, so we have to detect these jump instructions
936 sunos4_skip_trampoline_code (pc
)
943 err
= target_read_memory (pc
, buf
, 4);
944 insn1
= extract_unsigned_integer (buf
, 4);
945 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
949 err
= target_read_memory (pc
+ 4, buf
, 4);
950 insn2
= extract_unsigned_integer (buf
, 4);
951 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
953 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
954 int delta
= insn2
& 0x1fff;
956 /* Sign extend the displacement. */
959 return target_pc
+ delta
;
962 return find_solib_trampoline_target (pc
);
965 #ifdef USE_PROC_FS /* Target dependent support for /proc */
967 /* The /proc interface divides the target machine's register set up into
968 two different sets, the general register set (gregset) and the floating
969 point register set (fpregset). For each set, there is an ioctl to get
970 the current register set and another ioctl to set the current values.
972 The actual structure passed through the ioctl interface is, of course,
973 naturally machine dependent, and is different for each set of registers.
974 For the sparc for example, the general register set is typically defined
977 typedef int gregset_t[38];
983 and the floating point set by:
985 typedef struct prfpregset {
993 u_char pr_q_entrysize;
998 These routines provide the packing and unpacking of gregset_t and
999 fpregset_t formatted data.
1003 /* Given a pointer to a general register set in /proc format (gregset_t *),
1004 unpack the register contents and supply them as gdb's idea of the current
1008 supply_gregset (gregsetp
)
1009 prgregset_t
*gregsetp
;
1012 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1014 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1015 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1017 supply_register (regi
, (char *) (regp
+ regi
));
1020 /* These require a bit more care. */
1021 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
1022 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
1023 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
1024 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
1028 fill_gregset (gregsetp
, regno
)
1029 prgregset_t
*gregsetp
;
1033 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1034 extern char registers
[];
1036 for (regi
= 0 ; regi
<= R_I7
; regi
++)
1038 if ((regno
== -1) || (regno
== regi
))
1040 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
1043 if ((regno
== -1) || (regno
== PS_REGNUM
))
1045 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
1047 if ((regno
== -1) || (regno
== PC_REGNUM
))
1049 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
1051 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1053 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
1055 if ((regno
== -1) || (regno
== Y_REGNUM
))
1057 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
1061 #if defined (FP0_REGNUM)
1063 /* Given a pointer to a floating point register set in /proc format
1064 (fpregset_t *), unpack the register contents and supply them as gdb's
1065 idea of the current floating point register values. */
1068 supply_fpregset (fpregsetp
)
1069 prfpregset_t
*fpregsetp
;
1074 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
1076 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
1077 supply_register (regi
, from
);
1079 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1082 /* Given a pointer to a floating point register set in /proc format
1083 (fpregset_t *), update the register specified by REGNO from gdb's idea
1084 of the current floating point register set. If REGNO is -1, update
1088 fill_fpregset (fpregsetp
, regno
)
1089 prfpregset_t
*fpregsetp
;
1095 extern char registers
[];
1097 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
1099 if ((regno
== -1) || (regno
== regi
))
1101 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
1102 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
1103 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1106 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1108 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
1112 #endif /* defined (FP0_REGNUM) */
1114 #endif /* USE_PROC_FS */
1117 #ifdef GET_LONGJMP_TARGET
1119 /* Figure out where the longjmp will land. We expect that we have just entered
1120 longjmp and haven't yet setup the stack frame, so the args are still in the
1121 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1122 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1123 This routine returns true on success */
1126 get_longjmp_target (pc
)
1130 #define LONGJMP_TARGET_SIZE 4
1131 char buf
[LONGJMP_TARGET_SIZE
];
1133 jb_addr
= read_register (O0_REGNUM
);
1135 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1136 LONGJMP_TARGET_SIZE
))
1139 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1143 #endif /* GET_LONGJMP_TARGET */