* gdb.texinfo (Remote Protocol): Document v and vCont.
[deliverable/binutils-gdb.git] / gdb / sparc-tdep.c
1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation,
5 Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
25
26 #include "defs.h"
27 #include "arch-utils.h"
28 #include "frame.h"
29 #include "inferior.h"
30 #include "target.h"
31 #include "value.h"
32 #include "bfd.h"
33 #include "gdb_string.h"
34 #include "regcache.h"
35 #include "osabi.h"
36 #include "dis-asm.h"
37
38 #include "sparc-tdep.h"
39
40 #ifdef USE_PROC_FS
41 #include <sys/procfs.h>
42 /* Prototypes for supply_gregset etc. */
43 #include "gregset.h"
44 #endif
45
46 #include "gdbcore.h"
47 #include "gdb_assert.h"
48
49 #include "symfile.h" /* for 'entry_point_address' */
50
51 /*
52 * Some local macros that have multi-arch and non-multi-arch versions:
53 */
54
55 #define SPARC_HAS_FPU 1
56 /* Number of bytes devoted to Floating Point registers: */
57 #define FP_REGISTER_BYTES (gdbarch_tdep (current_gdbarch)->fp_register_bytes)
58 /* Highest numbered Floating Point register. */
59 #define FP_MAX_REGNUM (gdbarch_tdep (current_gdbarch)->fp_max_regnum)
60 /* Size of a general (integer) register: */
61 #define SPARC_INTREG_SIZE (gdbarch_tdep (current_gdbarch)->intreg_size)
62 /* Offset within the call dummy stack of the saved registers. */
63 #define DUMMY_REG_SAVE_OFFSET (gdbarch_tdep (current_gdbarch)->reg_save_offset)
64
65 struct gdbarch_tdep
66 {
67 int fp_register_bytes;
68 int y_regnum;
69 int fp_max_regnum;
70 int intreg_size;
71 int reg_save_offset;
72 int call_dummy_call_offset;
73 int print_insn_mach;
74 };
75
76 /* Now make GDB_TARGET_IS_SPARC64 a runtime test. */
77 /* FIXME MVS: or try testing bfd_arch_info.arch and bfd_arch_info.mach ...
78 * define GDB_TARGET_IS_SPARC64 \
79 * (TARGET_ARCHITECTURE->arch == bfd_arch_sparc && \
80 * (TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9 || \
81 * TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9a))
82 */
83
84 /* We don't store all registers immediately when requested, since they
85 get sent over in large chunks anyway. Instead, we accumulate most
86 of the changes and send them over once. "deferred_stores" keeps
87 track of which sets of registers we have locally-changed copies of,
88 so we only need send the groups that have changed. */
89
90 int deferred_stores = 0; /* Accumulated stores we want to do eventually. */
91
92
93 const unsigned char *
94 sparc_breakpoint_from_pc (CORE_ADDR *pc, int *len)
95 {
96 static const char breakpoint[] = {0x91, 0xd0, 0x20, 0x01};
97 (*len) = sizeof (breakpoint);
98 return breakpoint;
99 }
100
101 /* Fetch a single instruction. Even on bi-endian machines
102 such as sparc86x, instructions are always big-endian. */
103
104 static unsigned long
105 fetch_instruction (CORE_ADDR pc)
106 {
107 unsigned long retval;
108 int i;
109 unsigned char buf[4];
110
111 read_memory (pc, buf, sizeof (buf));
112
113 /* Start at the most significant end of the integer, and work towards
114 the least significant. */
115 retval = 0;
116 for (i = 0; i < sizeof (buf); ++i)
117 retval = (retval << 8) | buf[i];
118 return retval;
119 }
120
121
122 /* Branches with prediction are treated like their non-predicting cousins. */
123 /* FIXME: What about floating point branches? */
124
125 /* Macros to extract fields from sparc instructions. */
126 #define X_OP(i) (((i) >> 30) & 0x3)
127 #define X_RD(i) (((i) >> 25) & 0x1f)
128 #define X_A(i) (((i) >> 29) & 1)
129 #define X_COND(i) (((i) >> 25) & 0xf)
130 #define X_OP2(i) (((i) >> 22) & 0x7)
131 #define X_IMM22(i) ((i) & 0x3fffff)
132 #define X_OP3(i) (((i) >> 19) & 0x3f)
133 #define X_RS1(i) (((i) >> 14) & 0x1f)
134 #define X_I(i) (((i) >> 13) & 1)
135 #define X_IMM13(i) ((i) & 0x1fff)
136 /* Sign extension macros. */
137 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
138 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
139 #define X_CC(i) (((i) >> 20) & 3)
140 #define X_P(i) (((i) >> 19) & 1)
141 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
142 #define X_RCOND(i) (((i) >> 25) & 7)
143 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
144 #define X_FCN(i) (((i) >> 25) & 31)
145
146 typedef enum
147 {
148 Error, not_branch, bicc, bicca, ba, baa, ticc, ta, done_retry
149 } branch_type;
150
151 /* Simulate single-step ptrace call for sun4. Code written by Gary
152 Beihl (beihl@mcc.com). */
153
154 /* npc4 and next_pc describe the situation at the time that the
155 step-breakpoint was set, not necessary the current value of DEPRECATED_NPC_REGNUM. */
156 static CORE_ADDR next_pc, npc4, target;
157 static int brknpc4, brktrg;
158 typedef char binsn_quantum[BREAKPOINT_MAX];
159 static binsn_quantum break_mem[3];
160
161 static branch_type isbranch (long, CORE_ADDR, CORE_ADDR *);
162
163 /* single_step() is called just before we want to resume the inferior,
164 if we want to single-step it but there is no hardware or kernel single-step
165 support (as on all SPARCs). We find all the possible targets of the
166 coming instruction and breakpoint them.
167
168 single_step is also called just after the inferior stops. If we had
169 set up a simulated single-step, we undo our damage. */
170
171 void
172 sparc_software_single_step (enum target_signal ignore, /* pid, but we don't need it */
173 int insert_breakpoints_p)
174 {
175 branch_type br;
176 CORE_ADDR pc;
177 long pc_instruction;
178
179 if (insert_breakpoints_p)
180 {
181 /* Always set breakpoint for NPC. */
182 next_pc = read_register (DEPRECATED_NPC_REGNUM);
183 npc4 = next_pc + 4; /* branch not taken */
184
185 target_insert_breakpoint (next_pc, break_mem[0]);
186 /* printf_unfiltered ("set break at %x\n",next_pc); */
187
188 pc = read_register (PC_REGNUM);
189 pc_instruction = fetch_instruction (pc);
190 br = isbranch (pc_instruction, pc, &target);
191 brknpc4 = brktrg = 0;
192
193 if (br == bicca)
194 {
195 /* Conditional annulled branch will either end up at
196 npc (if taken) or at npc+4 (if not taken).
197 Trap npc+4. */
198 brknpc4 = 1;
199 target_insert_breakpoint (npc4, break_mem[1]);
200 }
201 else if (br == baa && target != next_pc)
202 {
203 /* Unconditional annulled branch will always end up at
204 the target. */
205 brktrg = 1;
206 target_insert_breakpoint (target, break_mem[2]);
207 }
208 else if (GDB_TARGET_IS_SPARC64 && br == done_retry)
209 {
210 brktrg = 1;
211 target_insert_breakpoint (target, break_mem[2]);
212 }
213 }
214 else
215 {
216 /* Remove breakpoints */
217 target_remove_breakpoint (next_pc, break_mem[0]);
218
219 if (brknpc4)
220 target_remove_breakpoint (npc4, break_mem[1]);
221
222 if (brktrg)
223 target_remove_breakpoint (target, break_mem[2]);
224 }
225 }
226 \f
227 struct frame_extra_info
228 {
229 CORE_ADDR bottom;
230 int in_prologue;
231 int flat;
232 /* Following fields only relevant for flat frames. */
233 CORE_ADDR pc_addr;
234 CORE_ADDR fp_addr;
235 /* Add this to ->frame to get the value of the stack pointer at the
236 time of the register saves. */
237 int sp_offset;
238 };
239
240 /* Call this for each newly created frame. For SPARC, we need to
241 calculate the bottom of the frame, and do some extra work if the
242 prologue has been generated via the -mflat option to GCC. In
243 particular, we need to know where the previous fp and the pc have
244 been stashed, since their exact position within the frame may vary. */
245
246 void
247 sparc_init_extra_frame_info (int fromleaf, struct frame_info *fi)
248 {
249 char *name;
250 CORE_ADDR prologue_start, prologue_end;
251 int insn;
252
253 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
254 frame_saved_regs_zalloc (fi);
255
256 get_frame_extra_info (fi)->bottom =
257 (get_next_frame (fi)
258 ? (get_frame_base (fi) == get_frame_base (get_next_frame (fi))
259 ? get_frame_extra_info (get_next_frame (fi))->bottom
260 : get_frame_base (get_next_frame (fi)))
261 : read_sp ());
262
263 /* If fi->next is NULL, then we already set ->frame by passing
264 deprecated_read_fp() to create_new_frame. */
265 if (get_next_frame (fi))
266 {
267 char buf[MAX_REGISTER_SIZE];
268
269 /* Compute ->frame as if not flat. If it is flat, we'll change
270 it later. */
271 if (get_next_frame (get_next_frame (fi)) != NULL
272 && ((get_frame_type (get_next_frame (get_next_frame (fi))) == SIGTRAMP_FRAME)
273 || deprecated_frame_in_dummy (get_next_frame (get_next_frame (fi))))
274 && frameless_look_for_prologue (get_next_frame (fi)))
275 {
276 /* A frameless function interrupted by a signal did not change
277 the frame pointer, fix up frame pointer accordingly. */
278 deprecated_update_frame_base_hack (fi, get_frame_base (get_next_frame (fi)));
279 get_frame_extra_info (fi)->bottom =
280 get_frame_extra_info (get_next_frame (fi))->bottom;
281 }
282 else
283 {
284 /* Should we adjust for stack bias here? */
285 ULONGEST tmp;
286 tmp = get_frame_register_unsigned (fi, DEPRECATED_FP_REGNUM);
287 deprecated_update_frame_base_hack (fi, tmp);
288 if (GDB_TARGET_IS_SPARC64 && (get_frame_base (fi) & 1))
289 deprecated_update_frame_base_hack (fi, get_frame_base (fi) + 2047);
290 }
291 }
292
293 /* Decide whether this is a function with a ``flat register window''
294 frame. For such functions, the frame pointer is actually in %i7. */
295 get_frame_extra_info (fi)->flat = 0;
296 get_frame_extra_info (fi)->in_prologue = 0;
297 if (find_pc_partial_function (get_frame_pc (fi), &name, &prologue_start, &prologue_end))
298 {
299 /* See if the function starts with an add (which will be of a
300 negative number if a flat frame) to the sp. FIXME: Does not
301 handle large frames which will need more than one instruction
302 to adjust the sp. */
303 insn = fetch_instruction (prologue_start);
304 if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0
305 && X_I (insn) && X_SIMM13 (insn) < 0)
306 {
307 int offset = X_SIMM13 (insn);
308
309 /* Then look for a save of %i7 into the frame. */
310 insn = fetch_instruction (prologue_start + 4);
311 if (X_OP (insn) == 3
312 && X_RD (insn) == 31
313 && X_OP3 (insn) == 4
314 && X_RS1 (insn) == 14)
315 {
316 char buf[MAX_REGISTER_SIZE];
317
318 /* We definitely have a flat frame now. */
319 get_frame_extra_info (fi)->flat = 1;
320
321 get_frame_extra_info (fi)->sp_offset = offset;
322
323 /* Overwrite the frame's address with the value in %i7. */
324 {
325 ULONGEST tmp;
326 tmp = get_frame_register_unsigned (fi, I7_REGNUM);
327 deprecated_update_frame_base_hack (fi, tmp);
328 }
329
330 if (GDB_TARGET_IS_SPARC64 && (get_frame_base (fi) & 1))
331 deprecated_update_frame_base_hack (fi, get_frame_base (fi) + 2047);
332
333 /* Record where the fp got saved. */
334 get_frame_extra_info (fi)->fp_addr =
335 get_frame_base (fi) + get_frame_extra_info (fi)->sp_offset + X_SIMM13 (insn);
336
337 /* Also try to collect where the pc got saved to. */
338 get_frame_extra_info (fi)->pc_addr = 0;
339 insn = fetch_instruction (prologue_start + 12);
340 if (X_OP (insn) == 3
341 && X_RD (insn) == 15
342 && X_OP3 (insn) == 4
343 && X_RS1 (insn) == 14)
344 get_frame_extra_info (fi)->pc_addr =
345 get_frame_base (fi) + get_frame_extra_info (fi)->sp_offset + X_SIMM13 (insn);
346 }
347 }
348 else
349 {
350 /* Check if the PC is in the function prologue before a SAVE
351 instruction has been executed yet. If so, set the frame
352 to the current value of the stack pointer and set
353 the in_prologue flag. */
354 CORE_ADDR addr;
355 struct symtab_and_line sal;
356
357 sal = find_pc_line (prologue_start, 0);
358 if (sal.line == 0) /* no line info, use PC */
359 prologue_end = get_frame_pc (fi);
360 else if (sal.end < prologue_end)
361 prologue_end = sal.end;
362 if (get_frame_pc (fi) < prologue_end)
363 {
364 for (addr = prologue_start; addr < get_frame_pc (fi); addr += 4)
365 {
366 insn = read_memory_integer (addr, 4);
367 if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3c)
368 break; /* SAVE seen, stop searching */
369 }
370 if (addr >= get_frame_pc (fi))
371 {
372 get_frame_extra_info (fi)->in_prologue = 1;
373 deprecated_update_frame_base_hack (fi, read_register (SP_REGNUM));
374 }
375 }
376 }
377 }
378 if (get_next_frame (fi) && get_frame_base (fi) == 0)
379 {
380 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
381 deprecated_update_frame_base_hack (fi, get_frame_base (get_next_frame (fi)));
382 deprecated_update_frame_pc_hack (fi, get_frame_pc (get_next_frame (fi)));
383 }
384 }
385
386 CORE_ADDR
387 sparc_frame_chain (struct frame_info *frame)
388 {
389 /* Value that will cause DEPRECATED_FRAME_CHAIN_VALID to not worry
390 about the chain value. If it really is zero, we detect it later
391 in sparc_init_prev_frame.
392
393 Note: kevinb/2003-02-18: The constant 1 used to be returned here,
394 but, after some recent changes to legacy_frame_chain_valid(),
395 this value is no longer suitable for causing
396 legacy_frame_chain_valid() to "not worry about the chain value."
397 The constant ~0 (i.e, 0xfff...) causes the failing test in
398 legacy_frame_chain_valid() to succeed thus preserving the "not
399 worry" property. I had considered using something like
400 ``get_frame_base (frame) + 1''. However, I think a constant
401 value is better, because when debugging this problem, I knew that
402 something funny was going on as soon as I saw the constant 1
403 being used as the frame chain elsewhere in GDB. */
404
405 return ~ (CORE_ADDR) 0;
406 }
407
408 /* Find the pc saved in frame FRAME. */
409
410 CORE_ADDR
411 sparc_frame_saved_pc (struct frame_info *frame)
412 {
413 char buf[MAX_REGISTER_SIZE];
414 CORE_ADDR addr;
415
416 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
417 {
418 /* This is the signal trampoline frame.
419 Get the saved PC from the sigcontext structure. */
420
421 #ifndef SIGCONTEXT_PC_OFFSET
422 #define SIGCONTEXT_PC_OFFSET 12
423 #endif
424
425 CORE_ADDR sigcontext_addr;
426 char *scbuf;
427 int saved_pc_offset = SIGCONTEXT_PC_OFFSET;
428 char *name = NULL;
429
430 scbuf = alloca (TARGET_PTR_BIT / HOST_CHAR_BIT);
431
432 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
433 as the third parameter. The offset to the saved pc is 12. */
434 find_pc_partial_function (get_frame_pc (frame), &name,
435 (CORE_ADDR *) NULL, (CORE_ADDR *) NULL);
436 if (name && STREQ (name, "ucbsigvechandler"))
437 saved_pc_offset = 12;
438
439 /* The sigcontext address is contained in register O2. */
440 {
441 ULONGEST tmp;
442 tmp = get_frame_register_unsigned (frame, O0_REGNUM + 2);
443 sigcontext_addr = tmp;
444 }
445
446 /* Don't cause a memory_error when accessing sigcontext in case the
447 stack layout has changed or the stack is corrupt. */
448 target_read_memory (sigcontext_addr + saved_pc_offset,
449 scbuf, sizeof (scbuf));
450 return extract_unsigned_integer (scbuf, sizeof (scbuf));
451 }
452 else if (get_frame_extra_info (frame)->in_prologue ||
453 (get_next_frame (frame) != NULL &&
454 ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME) ||
455 deprecated_frame_in_dummy (get_next_frame (frame))) &&
456 frameless_look_for_prologue (frame)))
457 {
458 /* A frameless function interrupted by a signal did not save
459 the PC, it is still in %o7. */
460 ULONGEST tmp;
461 tmp = get_frame_register_unsigned (frame, O7_REGNUM);
462 return PC_ADJUST (tmp);
463 }
464 if (get_frame_extra_info (frame)->flat)
465 addr = get_frame_extra_info (frame)->pc_addr;
466 else
467 addr = get_frame_extra_info (frame)->bottom + FRAME_SAVED_I0 +
468 SPARC_INTREG_SIZE * (I7_REGNUM - I0_REGNUM);
469
470 if (addr == 0)
471 /* A flat frame leaf function might not save the PC anywhere,
472 just leave it in %o7. */
473 return PC_ADJUST (read_register (O7_REGNUM));
474
475 read_memory (addr, buf, SPARC_INTREG_SIZE);
476 return PC_ADJUST (extract_unsigned_integer (buf, SPARC_INTREG_SIZE));
477 }
478
479 /* Since an individual frame in the frame cache is defined by two
480 arguments (a frame pointer and a stack pointer), we need two
481 arguments to get info for an arbitrary stack frame. This routine
482 takes two arguments and makes the cached frames look as if these
483 two arguments defined a frame on the cache. This allows the rest
484 of info frame to extract the important arguments without
485 difficulty. */
486
487 struct frame_info *
488 setup_arbitrary_frame (int argc, CORE_ADDR *argv)
489 {
490 struct frame_info *frame;
491
492 if (argc != 2)
493 error ("Sparc frame specifications require two arguments: fp and sp");
494
495 frame = create_new_frame (argv[0], 0);
496
497 if (!frame)
498 internal_error (__FILE__, __LINE__,
499 "create_new_frame returned invalid frame");
500
501 get_frame_extra_info (frame)->bottom = argv[1];
502 deprecated_update_frame_pc_hack (frame, DEPRECATED_FRAME_SAVED_PC (frame));
503 return frame;
504 }
505
506 /* Given a pc value, skip it forward past the function prologue by
507 disassembling instructions that appear to be a prologue.
508
509 If FRAMELESS_P is set, we are only testing to see if the function
510 is frameless. This allows a quicker answer.
511
512 This routine should be more specific in its actions; making sure
513 that it uses the same register in the initial prologue section. */
514
515 static CORE_ADDR examine_prologue (CORE_ADDR, int, struct frame_info *,
516 CORE_ADDR *);
517
518 static CORE_ADDR
519 examine_prologue (CORE_ADDR start_pc, int frameless_p, struct frame_info *fi,
520 CORE_ADDR *saved_regs)
521 {
522 int insn;
523 int dest = -1;
524 CORE_ADDR pc = start_pc;
525 int is_flat = 0;
526
527 insn = fetch_instruction (pc);
528
529 /* Recognize the `sethi' insn and record its destination. */
530 if (X_OP (insn) == 0 && X_OP2 (insn) == 4)
531 {
532 dest = X_RD (insn);
533 pc += 4;
534 insn = fetch_instruction (pc);
535 }
536
537 /* Recognize an add immediate value to register to either %g1 or
538 the destination register recorded above. Actually, this might
539 well recognize several different arithmetic operations.
540 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
541 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
542 I imagine any compiler really does that, however). */
543 if (X_OP (insn) == 2
544 && X_I (insn)
545 && (X_RD (insn) == 1 || X_RD (insn) == dest))
546 {
547 pc += 4;
548 insn = fetch_instruction (pc);
549 }
550
551 /* Recognize any SAVE insn. */
552 if (X_OP (insn) == 2 && X_OP3 (insn) == 60)
553 {
554 pc += 4;
555 if (frameless_p) /* If the save is all we care about, */
556 return pc; /* return before doing more work */
557 insn = fetch_instruction (pc);
558 }
559 /* Recognize add to %sp. */
560 else if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0)
561 {
562 pc += 4;
563 if (frameless_p) /* If the add is all we care about, */
564 return pc; /* return before doing more work */
565 is_flat = 1;
566 insn = fetch_instruction (pc);
567 /* Recognize store of frame pointer (i7). */
568 if (X_OP (insn) == 3
569 && X_RD (insn) == 31
570 && X_OP3 (insn) == 4
571 && X_RS1 (insn) == 14)
572 {
573 pc += 4;
574 insn = fetch_instruction (pc);
575
576 /* Recognize sub %sp, <anything>, %i7. */
577 if (X_OP (insn) == 2
578 && X_OP3 (insn) == 4
579 && X_RS1 (insn) == 14
580 && X_RD (insn) == 31)
581 {
582 pc += 4;
583 insn = fetch_instruction (pc);
584 }
585 else
586 return pc;
587 }
588 else
589 return pc;
590 }
591 else
592 /* Without a save or add instruction, it's not a prologue. */
593 return start_pc;
594
595 while (1)
596 {
597 /* Recognize stores into the frame from the input registers.
598 This recognizes all non alternate stores of an input register,
599 into a location offset from the frame pointer between
600 +68 and +92. */
601
602 /* The above will fail for arguments that are promoted
603 (eg. shorts to ints or floats to doubles), because the compiler
604 will pass them in positive-offset frame space, but the prologue
605 will save them (after conversion) in negative frame space at an
606 unpredictable offset. Therefore I am going to remove the
607 restriction on the target-address of the save, on the theory
608 that any unbroken sequence of saves from input registers must
609 be part of the prologue. In un-optimized code (at least), I'm
610 fairly sure that the compiler would emit SOME other instruction
611 (eg. a move or add) before emitting another save that is actually
612 a part of the function body.
613
614 Besides, the reserved stack space is different for SPARC64 anyway.
615
616 MVS 4/23/2000 */
617
618 if (X_OP (insn) == 3
619 && (X_OP3 (insn) & 0x3c) == 4 /* Store, non-alternate. */
620 && (X_RD (insn) & 0x18) == 0x18 /* Input register. */
621 && X_I (insn) /* Immediate mode. */
622 && X_RS1 (insn) == 30) /* Off of frame pointer. */
623 ; /* empty statement -- fall thru to end of loop */
624 else if (GDB_TARGET_IS_SPARC64
625 && X_OP (insn) == 3
626 && (X_OP3 (insn) & 0x3c) == 12 /* store, extended (64-bit) */
627 && (X_RD (insn) & 0x18) == 0x18 /* input register */
628 && X_I (insn) /* immediate mode */
629 && X_RS1 (insn) == 30) /* off of frame pointer */
630 ; /* empty statement -- fall thru to end of loop */
631 else if (X_OP (insn) == 3
632 && (X_OP3 (insn) & 0x3c) == 36 /* store, floating-point */
633 && X_I (insn) /* immediate mode */
634 && X_RS1 (insn) == 30) /* off of frame pointer */
635 ; /* empty statement -- fall thru to end of loop */
636 else if (is_flat
637 && X_OP (insn) == 3
638 && X_OP3 (insn) == 4 /* store? */
639 && X_RS1 (insn) == 14) /* off of frame pointer */
640 {
641 if (saved_regs && X_I (insn))
642 saved_regs[X_RD (insn)] =
643 get_frame_base (fi) + get_frame_extra_info (fi)->sp_offset + X_SIMM13 (insn);
644 }
645 else
646 break;
647 pc += 4;
648 insn = fetch_instruction (pc);
649 }
650
651 return pc;
652 }
653
654 /* Advance PC across any function entry prologue instructions to reach
655 some "real" code. */
656
657 CORE_ADDR
658 sparc_skip_prologue (CORE_ADDR start_pc)
659 {
660 struct symtab_and_line sal;
661 CORE_ADDR func_start, func_end;
662
663 /* This is the preferred method, find the end of the prologue by
664 using the debugging information. */
665 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
666 {
667 sal = find_pc_line (func_start, 0);
668
669 if (sal.end < func_end
670 && start_pc <= sal.end)
671 return sal.end;
672 }
673
674 /* Oh well, examine the code by hand. */
675 return examine_prologue (start_pc, 0, NULL, NULL);
676 }
677
678 /* Is the prologue at IP frameless? */
679
680 int
681 sparc_prologue_frameless_p (CORE_ADDR ip)
682 {
683 return ip == examine_prologue (ip, 1, NULL, NULL);
684 }
685
686 /* Check instruction at ADDR to see if it is a branch.
687 All non-annulled instructions will go to NPC or will trap.
688 Set *TARGET if we find a candidate branch; set to zero if not.
689
690 This isn't static as it's used by remote-sa.sparc.c. */
691
692 static branch_type
693 isbranch (long instruction, CORE_ADDR addr, CORE_ADDR *target)
694 {
695 branch_type val = not_branch;
696 long int offset = 0; /* Must be signed for sign-extend. */
697
698 *target = 0;
699
700 if (X_OP (instruction) == 0
701 && (X_OP2 (instruction) == 2
702 || X_OP2 (instruction) == 6
703 || X_OP2 (instruction) == 1
704 || X_OP2 (instruction) == 3
705 || X_OP2 (instruction) == 5
706 || (GDB_TARGET_IS_SPARC64 && X_OP2 (instruction) == 7)))
707 {
708 if (X_COND (instruction) == 8)
709 val = X_A (instruction) ? baa : ba;
710 else
711 val = X_A (instruction) ? bicca : bicc;
712 switch (X_OP2 (instruction))
713 {
714 case 7:
715 if (!GDB_TARGET_IS_SPARC64)
716 break;
717 /* else fall thru */
718 case 2:
719 case 6:
720 offset = 4 * X_DISP22 (instruction);
721 break;
722 case 1:
723 case 5:
724 offset = 4 * X_DISP19 (instruction);
725 break;
726 case 3:
727 offset = 4 * X_DISP16 (instruction);
728 break;
729 }
730 *target = addr + offset;
731 }
732 else if (GDB_TARGET_IS_SPARC64
733 && X_OP (instruction) == 2
734 && X_OP3 (instruction) == 62)
735 {
736 if (X_FCN (instruction) == 0)
737 {
738 /* done */
739 *target = read_register (TNPC_REGNUM);
740 val = done_retry;
741 }
742 else if (X_FCN (instruction) == 1)
743 {
744 /* retry */
745 *target = read_register (TPC_REGNUM);
746 val = done_retry;
747 }
748 }
749
750 return val;
751 }
752 \f
753 /* Find register number REGNUM relative to FRAME and put its
754 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
755 was optimized out (and thus can't be fetched). If the variable
756 was fetched from memory, set *ADDRP to where it was fetched from,
757 otherwise it was fetched from a register.
758
759 The argument RAW_BUFFER must point to aligned memory. */
760
761 void
762 sparc_get_saved_register (char *raw_buffer, int *optimized, CORE_ADDR *addrp,
763 struct frame_info *frame, int regnum,
764 enum lval_type *lval)
765 {
766 struct frame_info *frame1;
767 CORE_ADDR addr;
768
769 if (!target_has_registers)
770 error ("No registers.");
771
772 if (optimized)
773 *optimized = 0;
774
775 addr = 0;
776
777 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
778 if (frame == NULL)
779 {
780 /* error ("No selected frame."); */
781 if (!target_has_registers)
782 error ("The program has no registers now.");
783 if (deprecated_selected_frame == NULL)
784 error ("No selected frame.");
785 /* Try to use selected frame */
786 frame = get_prev_frame (deprecated_selected_frame);
787 if (frame == 0)
788 error ("Cmd not meaningful in the outermost frame.");
789 }
790
791
792 frame1 = get_next_frame (frame);
793
794 /* Get saved PC from the frame info if not in innermost frame. */
795 if (regnum == PC_REGNUM && frame1 != NULL)
796 {
797 if (lval != NULL)
798 *lval = not_lval;
799 if (raw_buffer != NULL)
800 {
801 /* Put it back in target format. */
802 store_unsigned_integer (raw_buffer, DEPRECATED_REGISTER_RAW_SIZE (regnum), get_frame_pc (frame));
803 }
804 if (addrp != NULL)
805 *addrp = 0;
806 return;
807 }
808
809 while (frame1 != NULL)
810 {
811 /* FIXME MVS: wrong test for dummy frame at entry. */
812
813 if (get_frame_pc (frame1) >= (get_frame_extra_info (frame1)->bottom
814 ? get_frame_extra_info (frame1)->bottom
815 : read_sp ())
816 && get_frame_pc (frame1) <= get_frame_base (frame1))
817 {
818 /* Dummy frame. All but the window regs are in there somewhere.
819 The window registers are saved on the stack, just like in a
820 normal frame. */
821 if (regnum >= G1_REGNUM && regnum < G1_REGNUM + 7)
822 addr = get_frame_base (frame1) + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE
823 - (FP_REGISTER_BYTES + 8 * SPARC_INTREG_SIZE);
824 else if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8)
825 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
826 is safe/cheap - there will always be a prev frame.
827 This is because frame1 is initialized to frame->next
828 (frame1->prev == frame) and is then advanced towards
829 the innermost (next) frame. */
830 addr = (get_frame_extra_info (get_prev_frame (frame1))->bottom
831 + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
832 + FRAME_SAVED_I0);
833 else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8)
834 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
835 is safe/cheap - there will always be a prev frame.
836 This is because frame1 is initialized to frame->next
837 (frame1->prev == frame) and is then advanced towards
838 the innermost (next) frame. */
839 addr = (get_frame_extra_info (get_prev_frame (frame1))->bottom
840 + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
841 + FRAME_SAVED_L0);
842 else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8)
843 addr = get_frame_base (frame1) + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE
844 - (FP_REGISTER_BYTES + 16 * SPARC_INTREG_SIZE);
845 else if (SPARC_HAS_FPU &&
846 regnum >= FP0_REGNUM && regnum < FP0_REGNUM + 32)
847 addr = get_frame_base (frame1) + (regnum - FP0_REGNUM) * 4
848 - (FP_REGISTER_BYTES);
849 else if (GDB_TARGET_IS_SPARC64 && SPARC_HAS_FPU &&
850 regnum >= FP0_REGNUM + 32 && regnum < FP_MAX_REGNUM)
851 addr = get_frame_base (frame1) + 32 * 4 + (regnum - FP0_REGNUM - 32) * 8
852 - (FP_REGISTER_BYTES);
853 else if (regnum >= Y_REGNUM && regnum < NUM_REGS)
854 addr = get_frame_base (frame1) + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE
855 - (FP_REGISTER_BYTES + 24 * SPARC_INTREG_SIZE);
856 }
857 else if (get_frame_extra_info (frame1)->flat)
858 {
859
860 if (regnum == RP_REGNUM)
861 addr = get_frame_extra_info (frame1)->pc_addr;
862 else if (regnum == I7_REGNUM)
863 addr = get_frame_extra_info (frame1)->fp_addr;
864 else
865 {
866 CORE_ADDR func_start;
867 CORE_ADDR *regs;
868
869 regs = alloca (NUM_REGS * sizeof (CORE_ADDR));
870 memset (regs, 0, NUM_REGS * sizeof (CORE_ADDR));
871
872 find_pc_partial_function (get_frame_pc (frame1), NULL, &func_start, NULL);
873 examine_prologue (func_start, 0, frame1, regs);
874 addr = regs[regnum];
875 }
876 }
877 else
878 {
879 /* Normal frame. Local and In registers are saved on stack. */
880 if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8)
881 addr = (get_frame_extra_info (get_prev_frame (frame1))->bottom
882 + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
883 + FRAME_SAVED_I0);
884 else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8)
885 addr = (get_frame_extra_info (get_prev_frame (frame1))->bottom
886 + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
887 + FRAME_SAVED_L0);
888 else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8)
889 {
890 /* Outs become ins. */
891 int realnum;
892 frame_register (frame1, (regnum - O0_REGNUM + I0_REGNUM),
893 optimized, lval, addrp, &realnum, raw_buffer);
894 return;
895 }
896 }
897 if (addr != 0)
898 break;
899 frame1 = get_next_frame (frame1);
900 }
901 if (addr != 0)
902 {
903 if (lval != NULL)
904 *lval = lval_memory;
905 if (regnum == SP_REGNUM)
906 {
907 if (raw_buffer != NULL)
908 {
909 /* Put it back in target format. */
910 store_unsigned_integer (raw_buffer, DEPRECATED_REGISTER_RAW_SIZE (regnum), addr);
911 }
912 if (addrp != NULL)
913 *addrp = 0;
914 return;
915 }
916 if (raw_buffer != NULL)
917 read_memory (addr, raw_buffer, DEPRECATED_REGISTER_RAW_SIZE (regnum));
918 }
919 else
920 {
921 if (lval != NULL)
922 *lval = lval_register;
923 addr = DEPRECATED_REGISTER_BYTE (regnum);
924 if (raw_buffer != NULL)
925 deprecated_read_register_gen (regnum, raw_buffer);
926 }
927 if (addrp != NULL)
928 *addrp = addr;
929 }
930
931 /* Push an empty stack frame, and record in it the current PC, regs, etc.
932
933 We save the non-windowed registers and the ins. The locals and outs
934 are new; they don't need to be saved. The i's and l's of
935 the last frame were already saved on the stack. */
936
937 /* Definitely see tm-sparc.h for more doc of the frame format here. */
938
939 /* See tm-sparc.h for how this is calculated. */
940
941 #define DUMMY_STACK_REG_BUF_SIZE \
942 (((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
943 #define DUMMY_STACK_SIZE \
944 (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
945
946 void
947 sparc_push_dummy_frame (void)
948 {
949 CORE_ADDR sp, old_sp;
950 char *register_temp;
951
952 register_temp = alloca (DUMMY_STACK_SIZE);
953
954 old_sp = sp = read_sp ();
955
956 if (GDB_TARGET_IS_SPARC64)
957 {
958 /* PC, NPC, CCR, FSR, FPRS, Y, ASI */
959 deprecated_read_register_bytes (DEPRECATED_REGISTER_BYTE (PC_REGNUM),
960 &register_temp[0],
961 DEPRECATED_REGISTER_RAW_SIZE (PC_REGNUM) * 7);
962 deprecated_read_register_bytes (DEPRECATED_REGISTER_BYTE (PSTATE_REGNUM),
963 &register_temp[7 * SPARC_INTREG_SIZE],
964 DEPRECATED_REGISTER_RAW_SIZE (PSTATE_REGNUM));
965 /* FIXME: not sure what needs to be saved here. */
966 }
967 else
968 {
969 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
970 deprecated_read_register_bytes (DEPRECATED_REGISTER_BYTE (Y_REGNUM),
971 &register_temp[0],
972 DEPRECATED_REGISTER_RAW_SIZE (Y_REGNUM) * 8);
973 }
974
975 deprecated_read_register_bytes (DEPRECATED_REGISTER_BYTE (O0_REGNUM),
976 &register_temp[8 * SPARC_INTREG_SIZE],
977 SPARC_INTREG_SIZE * 8);
978
979 deprecated_read_register_bytes (DEPRECATED_REGISTER_BYTE (G0_REGNUM),
980 &register_temp[16 * SPARC_INTREG_SIZE],
981 SPARC_INTREG_SIZE * 8);
982
983 if (SPARC_HAS_FPU)
984 deprecated_read_register_bytes (DEPRECATED_REGISTER_BYTE (FP0_REGNUM),
985 &register_temp[24 * SPARC_INTREG_SIZE],
986 FP_REGISTER_BYTES);
987
988 sp -= DUMMY_STACK_SIZE;
989
990 DEPRECATED_DUMMY_WRITE_SP (sp);
991
992 write_memory (sp + DUMMY_REG_SAVE_OFFSET, &register_temp[0],
993 DUMMY_STACK_REG_BUF_SIZE);
994
995 if (strcmp (target_shortname, "sim") != 0)
996 {
997 /* NOTE: cagney/2002-04-04: The code below originally contained
998 GDB's _only_ call to write_fp(). That call was eliminated by
999 inlining the corresponding code. For the 64 bit case, the
1000 old function (sparc64_write_fp) did the below although I'm
1001 not clear why. The same goes for why this is only done when
1002 the underlying target is a simulator. */
1003 if (GDB_TARGET_IS_SPARC64)
1004 {
1005 /* Target is a 64 bit SPARC. */
1006 CORE_ADDR oldfp = read_register (DEPRECATED_FP_REGNUM);
1007 if (oldfp & 1)
1008 write_register (DEPRECATED_FP_REGNUM, old_sp - 2047);
1009 else
1010 write_register (DEPRECATED_FP_REGNUM, old_sp);
1011 }
1012 else
1013 {
1014 /* Target is a 32 bit SPARC. */
1015 write_register (DEPRECATED_FP_REGNUM, old_sp);
1016 }
1017 /* Set return address register for the call dummy to the current PC. */
1018 write_register (I7_REGNUM, read_pc () - 8);
1019 }
1020 else
1021 {
1022 /* The call dummy will write this value to FP before executing
1023 the 'save'. This ensures that register window flushes work
1024 correctly in the simulator. */
1025 write_register (G0_REGNUM + 1, read_register (DEPRECATED_FP_REGNUM));
1026
1027 /* The call dummy will write this value to FP after executing
1028 the 'save'. */
1029 write_register (G0_REGNUM + 2, old_sp);
1030
1031 /* The call dummy will write this value to the return address (%i7) after
1032 executing the 'save'. */
1033 write_register (G0_REGNUM + 3, read_pc () - 8);
1034
1035 /* Set the FP that the call dummy will be using after the 'save'.
1036 This makes backtraces from an inferior function call work properly. */
1037 write_register (DEPRECATED_FP_REGNUM, old_sp);
1038 }
1039 }
1040
1041 /* sparc_frame_find_saved_regs (). This function is here only because
1042 pop_frame uses it. Note there is an interesting corner case which
1043 I think few ports of GDB get right--if you are popping a frame
1044 which does not save some register that *is* saved by a more inner
1045 frame (such a frame will never be a dummy frame because dummy
1046 frames save all registers).
1047
1048 NOTE: cagney/2003-03-12: Since pop_frame has been rewritten to use
1049 frame_unwind_register() the need for this function is questionable.
1050
1051 Stores, into an array of CORE_ADDR,
1052 the addresses of the saved registers of frame described by FRAME_INFO.
1053 This includes special registers such as pc and fp saved in special
1054 ways in the stack frame. sp is even more special:
1055 the address we return for it IS the sp for the next frame.
1056
1057 Note that on register window machines, we are currently making the
1058 assumption that window registers are being saved somewhere in the
1059 frame in which they are being used. If they are stored in an
1060 inferior frame, find_saved_register will break.
1061
1062 On the Sun 4, the only time all registers are saved is when
1063 a dummy frame is involved. Otherwise, the only saved registers
1064 are the LOCAL and IN registers which are saved as a result
1065 of the "save/restore" opcodes. This condition is determined
1066 by address rather than by value.
1067
1068 The "pc" is not stored in a frame on the SPARC. (What is stored
1069 is a return address minus 8.) sparc_pop_frame knows how to
1070 deal with that. Other routines might or might not.
1071
1072 See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
1073 about how this works. */
1074
1075 static void sparc_frame_find_saved_regs (struct frame_info *, CORE_ADDR *);
1076
1077 static void
1078 sparc_frame_find_saved_regs (struct frame_info *fi, CORE_ADDR *saved_regs_addr)
1079 {
1080 int regnum;
1081 CORE_ADDR frame_addr = get_frame_base (fi);
1082
1083 gdb_assert (fi != NULL);
1084
1085 memset (saved_regs_addr, 0, NUM_REGS * sizeof (CORE_ADDR));
1086
1087 if (get_frame_pc (fi) >= (get_frame_extra_info (fi)->bottom
1088 ? get_frame_extra_info (fi)->bottom
1089 : read_sp ())
1090 && get_frame_pc (fi) <= get_frame_base (fi))
1091 {
1092 /* Dummy frame. All but the window regs are in there somewhere. */
1093 for (regnum = G1_REGNUM; regnum < G1_REGNUM + 7; regnum++)
1094 saved_regs_addr[regnum] =
1095 frame_addr + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE
1096 - DUMMY_STACK_REG_BUF_SIZE + 16 * SPARC_INTREG_SIZE;
1097
1098 for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; regnum++)
1099 saved_regs_addr[regnum] =
1100 frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
1101 - DUMMY_STACK_REG_BUF_SIZE + 8 * SPARC_INTREG_SIZE;
1102
1103 if (SPARC_HAS_FPU)
1104 for (regnum = FP0_REGNUM; regnum < FP_MAX_REGNUM; regnum++)
1105 saved_regs_addr[regnum] = frame_addr + (regnum - FP0_REGNUM) * 4
1106 - DUMMY_STACK_REG_BUF_SIZE + 24 * SPARC_INTREG_SIZE;
1107
1108 if (GDB_TARGET_IS_SPARC64)
1109 {
1110 for (regnum = PC_REGNUM; regnum < PC_REGNUM + 7; regnum++)
1111 {
1112 saved_regs_addr[regnum] =
1113 frame_addr + (regnum - PC_REGNUM) * SPARC_INTREG_SIZE
1114 - DUMMY_STACK_REG_BUF_SIZE;
1115 }
1116 saved_regs_addr[PSTATE_REGNUM] =
1117 frame_addr + 8 * SPARC_INTREG_SIZE - DUMMY_STACK_REG_BUF_SIZE;
1118 }
1119 else
1120 for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++)
1121 saved_regs_addr[regnum] =
1122 frame_addr + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE
1123 - DUMMY_STACK_REG_BUF_SIZE;
1124
1125 frame_addr = (get_frame_extra_info (fi)->bottom
1126 ? get_frame_extra_info (fi)->bottom
1127 : read_sp ());
1128 }
1129 else if (get_frame_extra_info (fi)->flat)
1130 {
1131 CORE_ADDR func_start;
1132 find_pc_partial_function (get_frame_pc (fi), NULL, &func_start, NULL);
1133 examine_prologue (func_start, 0, fi, saved_regs_addr);
1134
1135 /* Flat register window frame. */
1136 saved_regs_addr[RP_REGNUM] = get_frame_extra_info (fi)->pc_addr;
1137 saved_regs_addr[I7_REGNUM] = get_frame_extra_info (fi)->fp_addr;
1138 }
1139 else
1140 {
1141 /* Normal frame. Just Local and In registers */
1142 frame_addr = (get_frame_extra_info (fi)->bottom
1143 ? get_frame_extra_info (fi)->bottom
1144 : read_sp ());
1145 for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; regnum++)
1146 saved_regs_addr[regnum] =
1147 (frame_addr + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
1148 + FRAME_SAVED_L0);
1149 for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; regnum++)
1150 saved_regs_addr[regnum] =
1151 (frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
1152 + FRAME_SAVED_I0);
1153 }
1154 if (get_next_frame (fi))
1155 {
1156 if (get_frame_extra_info (fi)->flat)
1157 {
1158 saved_regs_addr[O7_REGNUM] = get_frame_extra_info (fi)->pc_addr;
1159 }
1160 else
1161 {
1162 /* Pull off either the next frame pointer or the stack pointer */
1163 CORE_ADDR next_next_frame_addr =
1164 (get_frame_extra_info (get_next_frame (fi))->bottom
1165 ? get_frame_extra_info (get_next_frame (fi))->bottom
1166 : read_sp ());
1167 for (regnum = O0_REGNUM; regnum < O0_REGNUM + 8; regnum++)
1168 saved_regs_addr[regnum] =
1169 (next_next_frame_addr
1170 + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE
1171 + FRAME_SAVED_I0);
1172 }
1173 }
1174 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
1175 /* FIXME -- should this adjust for the sparc64 offset? */
1176 saved_regs_addr[SP_REGNUM] = get_frame_base (fi);
1177 }
1178
1179 /* Discard from the stack the innermost frame, restoring all saved registers.
1180
1181 Note that the values stored in fsr by
1182 deprecated_get_frame_saved_regs are *in the context of the called
1183 frame*. What this means is that the i regs of fsr must be restored
1184 into the o regs of the (calling) frame that we pop into. We don't
1185 care about the output regs of the calling frame, since unless it's
1186 a dummy frame, it won't have any output regs in it.
1187
1188 We never have to bother with %l (local) regs, since the called routine's
1189 locals get tossed, and the calling routine's locals are already saved
1190 on its stack. */
1191
1192 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1193
1194 void
1195 sparc_pop_frame (void)
1196 {
1197 struct frame_info *frame = get_current_frame ();
1198 CORE_ADDR pc;
1199 CORE_ADDR *fsr;
1200 char *raw_buffer;
1201 int regnum;
1202
1203 fsr = alloca (NUM_REGS * sizeof (CORE_ADDR));
1204 raw_buffer = alloca (DEPRECATED_REGISTER_BYTES);
1205 sparc_frame_find_saved_regs (frame, &fsr[0]);
1206 if (SPARC_HAS_FPU)
1207 {
1208 if (fsr[FP0_REGNUM])
1209 {
1210 read_memory (fsr[FP0_REGNUM], raw_buffer, FP_REGISTER_BYTES);
1211 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (FP0_REGNUM),
1212 raw_buffer, FP_REGISTER_BYTES);
1213 }
1214 if (!(GDB_TARGET_IS_SPARC64))
1215 {
1216 if (fsr[FPS_REGNUM])
1217 {
1218 read_memory (fsr[FPS_REGNUM], raw_buffer, SPARC_INTREG_SIZE);
1219 deprecated_write_register_gen (FPS_REGNUM, raw_buffer);
1220 }
1221 if (fsr[CPS_REGNUM])
1222 {
1223 read_memory (fsr[CPS_REGNUM], raw_buffer, SPARC_INTREG_SIZE);
1224 deprecated_write_register_gen (CPS_REGNUM, raw_buffer);
1225 }
1226 }
1227 }
1228 if (fsr[G1_REGNUM])
1229 {
1230 read_memory (fsr[G1_REGNUM], raw_buffer, 7 * SPARC_INTREG_SIZE);
1231 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (G1_REGNUM), raw_buffer,
1232 7 * SPARC_INTREG_SIZE);
1233 }
1234
1235 if (get_frame_extra_info (frame)->flat)
1236 {
1237 /* Each register might or might not have been saved, need to test
1238 individually. */
1239 for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; ++regnum)
1240 if (fsr[regnum])
1241 write_register (regnum, read_memory_integer (fsr[regnum],
1242 SPARC_INTREG_SIZE));
1243 for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; ++regnum)
1244 if (fsr[regnum])
1245 write_register (regnum, read_memory_integer (fsr[regnum],
1246 SPARC_INTREG_SIZE));
1247
1248 /* Handle all outs except stack pointer (o0-o5; o7). */
1249 for (regnum = O0_REGNUM; regnum < O0_REGNUM + 6; ++regnum)
1250 if (fsr[regnum])
1251 write_register (regnum, read_memory_integer (fsr[regnum],
1252 SPARC_INTREG_SIZE));
1253 if (fsr[O0_REGNUM + 7])
1254 write_register (O0_REGNUM + 7,
1255 read_memory_integer (fsr[O0_REGNUM + 7],
1256 SPARC_INTREG_SIZE));
1257
1258 DEPRECATED_DUMMY_WRITE_SP (get_frame_base (frame));
1259 }
1260 else if (fsr[I0_REGNUM])
1261 {
1262 CORE_ADDR sp;
1263
1264 char *reg_temp;
1265
1266 reg_temp = alloca (SPARC_INTREG_SIZE * 16);
1267
1268 read_memory (fsr[I0_REGNUM], raw_buffer, 8 * SPARC_INTREG_SIZE);
1269
1270 /* Get the ins and locals which we are about to restore. Just
1271 moving the stack pointer is all that is really needed, except
1272 store_inferior_registers is then going to write the ins and
1273 locals from the registers array, so we need to muck with the
1274 registers array. */
1275 sp = fsr[SP_REGNUM];
1276
1277 if (GDB_TARGET_IS_SPARC64 && (sp & 1))
1278 sp += 2047;
1279
1280 read_memory (sp, reg_temp, SPARC_INTREG_SIZE * 16);
1281
1282 /* Restore the out registers.
1283 Among other things this writes the new stack pointer. */
1284 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (O0_REGNUM), raw_buffer,
1285 SPARC_INTREG_SIZE * 8);
1286
1287 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (L0_REGNUM), reg_temp,
1288 SPARC_INTREG_SIZE * 16);
1289 }
1290
1291 if (!(GDB_TARGET_IS_SPARC64))
1292 if (fsr[PS_REGNUM])
1293 write_register (PS_REGNUM,
1294 read_memory_integer (fsr[PS_REGNUM],
1295 DEPRECATED_REGISTER_RAW_SIZE (PS_REGNUM)));
1296
1297 if (fsr[Y_REGNUM])
1298 write_register (Y_REGNUM,
1299 read_memory_integer (fsr[Y_REGNUM],
1300 DEPRECATED_REGISTER_RAW_SIZE (Y_REGNUM)));
1301 if (fsr[PC_REGNUM])
1302 {
1303 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1304 write_register (PC_REGNUM,
1305 read_memory_integer (fsr[PC_REGNUM],
1306 DEPRECATED_REGISTER_RAW_SIZE (PC_REGNUM)));
1307 if (fsr[DEPRECATED_NPC_REGNUM])
1308 write_register (DEPRECATED_NPC_REGNUM,
1309 read_memory_integer (fsr[DEPRECATED_NPC_REGNUM],
1310 DEPRECATED_REGISTER_RAW_SIZE (DEPRECATED_NPC_REGNUM)));
1311 }
1312 else if (get_frame_extra_info (frame)->flat)
1313 {
1314 if (get_frame_extra_info (frame)->pc_addr)
1315 pc = PC_ADJUST ((CORE_ADDR)
1316 read_memory_integer (get_frame_extra_info (frame)->pc_addr,
1317 DEPRECATED_REGISTER_RAW_SIZE (PC_REGNUM)));
1318 else
1319 {
1320 /* I think this happens only in the innermost frame, if so then
1321 it is a complicated way of saying
1322 "pc = read_register (O7_REGNUM);". */
1323 ULONGEST tmp;
1324 tmp = get_frame_register_unsigned (frame, O7_REGNUM);
1325 pc = PC_ADJUST (tmp);
1326 }
1327
1328 write_register (PC_REGNUM, pc);
1329 write_register (DEPRECATED_NPC_REGNUM, pc + 4);
1330 }
1331 else if (fsr[I7_REGNUM])
1332 {
1333 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1334 pc = PC_ADJUST ((CORE_ADDR) read_memory_integer (fsr[I7_REGNUM],
1335 SPARC_INTREG_SIZE));
1336 write_register (PC_REGNUM, pc);
1337 write_register (DEPRECATED_NPC_REGNUM, pc + 4);
1338 }
1339 flush_cached_frames ();
1340 }
1341
1342 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1343 encodes the structure size being returned. If we detect such
1344 a fake insn, step past it. */
1345
1346 CORE_ADDR
1347 sparc_pc_adjust (CORE_ADDR pc)
1348 {
1349 unsigned long insn;
1350 char buf[4];
1351 int err;
1352
1353 err = target_read_memory (pc + 8, buf, 4);
1354 insn = extract_unsigned_integer (buf, 4);
1355 if ((err == 0) && (insn & 0xffc00000) == 0)
1356 return pc + 12;
1357 else
1358 return pc + 8;
1359 }
1360
1361 /* If pc is in a shared library trampoline, return its target.
1362 The SunOs 4.x linker rewrites the jump table entries for PIC
1363 compiled modules in the main executable to bypass the dynamic linker
1364 with jumps of the form
1365 sethi %hi(addr),%g1
1366 jmp %g1+%lo(addr)
1367 and removes the corresponding jump table relocation entry in the
1368 dynamic relocations.
1369 find_solib_trampoline_target relies on the presence of the jump
1370 table relocation entry, so we have to detect these jump instructions
1371 by hand. */
1372
1373 CORE_ADDR
1374 sunos4_skip_trampoline_code (CORE_ADDR pc)
1375 {
1376 unsigned long insn1;
1377 char buf[4];
1378 int err;
1379
1380 err = target_read_memory (pc, buf, 4);
1381 insn1 = extract_unsigned_integer (buf, 4);
1382 if (err == 0 && (insn1 & 0xffc00000) == 0x03000000)
1383 {
1384 unsigned long insn2;
1385
1386 err = target_read_memory (pc + 4, buf, 4);
1387 insn2 = extract_unsigned_integer (buf, 4);
1388 if (err == 0 && (insn2 & 0xffffe000) == 0x81c06000)
1389 {
1390 CORE_ADDR target_pc = (insn1 & 0x3fffff) << 10;
1391 int delta = insn2 & 0x1fff;
1392
1393 /* Sign extend the displacement. */
1394 if (delta & 0x1000)
1395 delta |= ~0x1fff;
1396 return target_pc + delta;
1397 }
1398 }
1399 return find_solib_trampoline_target (pc);
1400 }
1401 \f
1402 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1403 /* *INDENT-OFF* */
1404 /* The /proc interface divides the target machine's register set up into
1405 two different sets, the general register set (gregset) and the floating
1406 point register set (fpregset). For each set, there is an ioctl to get
1407 the current register set and another ioctl to set the current values.
1408
1409 The actual structure passed through the ioctl interface is, of course,
1410 naturally machine dependent, and is different for each set of registers.
1411 For the sparc for example, the general register set is typically defined
1412 by:
1413
1414 typedef int gregset_t[38];
1415
1416 #define R_G0 0
1417 ...
1418 #define R_TBR 37
1419
1420 and the floating point set by:
1421
1422 typedef struct prfpregset {
1423 union {
1424 u_long pr_regs[32];
1425 double pr_dregs[16];
1426 } pr_fr;
1427 void * pr_filler;
1428 u_long pr_fsr;
1429 u_char pr_qcnt;
1430 u_char pr_q_entrysize;
1431 u_char pr_en;
1432 u_long pr_q[64];
1433 } prfpregset_t;
1434
1435 These routines provide the packing and unpacking of gregset_t and
1436 fpregset_t formatted data.
1437
1438 */
1439 /* *INDENT-ON* */
1440
1441 /* Given a pointer to a general register set in /proc format (gregset_t *),
1442 unpack the register contents and supply them as gdb's idea of the current
1443 register values. */
1444
1445 void
1446 supply_gregset (gdb_gregset_t *gregsetp)
1447 {
1448 prgreg_t *regp = (prgreg_t *) gregsetp;
1449 int regi, offset = 0;
1450
1451 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1452 then the gregset may contain 64-bit ints while supply_register
1453 is expecting 32-bit ints. Compensate. */
1454 if (sizeof (regp[0]) == 8 && SPARC_INTREG_SIZE == 4)
1455 offset = 4;
1456
1457 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1458 /* FIXME MVS: assumes the order of the first 32 elements... */
1459 for (regi = G0_REGNUM; regi <= I7_REGNUM; regi++)
1460 {
1461 supply_register (regi, ((char *) (regp + regi)) + offset);
1462 }
1463
1464 /* These require a bit more care. */
1465 supply_register (PC_REGNUM, ((char *) (regp + R_PC)) + offset);
1466 supply_register (DEPRECATED_NPC_REGNUM, ((char *) (regp + R_nPC)) + offset);
1467 supply_register (Y_REGNUM, ((char *) (regp + R_Y)) + offset);
1468
1469 if (GDB_TARGET_IS_SPARC64)
1470 {
1471 #ifdef R_CCR
1472 supply_register (CCR_REGNUM, ((char *) (regp + R_CCR)) + offset);
1473 #else
1474 supply_register (CCR_REGNUM, NULL);
1475 #endif
1476 #ifdef R_FPRS
1477 supply_register (FPRS_REGNUM, ((char *) (regp + R_FPRS)) + offset);
1478 #else
1479 supply_register (FPRS_REGNUM, NULL);
1480 #endif
1481 #ifdef R_ASI
1482 supply_register (ASI_REGNUM, ((char *) (regp + R_ASI)) + offset);
1483 #else
1484 supply_register (ASI_REGNUM, NULL);
1485 #endif
1486 }
1487 else /* sparc32 */
1488 {
1489 #ifdef R_PS
1490 supply_register (PS_REGNUM, ((char *) (regp + R_PS)) + offset);
1491 #else
1492 supply_register (PS_REGNUM, NULL);
1493 #endif
1494
1495 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1496 Steal R_ASI and R_FPRS, and hope for the best! */
1497
1498 #if !defined (R_WIM) && defined (R_ASI)
1499 #define R_WIM R_ASI
1500 #endif
1501
1502 #if !defined (R_TBR) && defined (R_FPRS)
1503 #define R_TBR R_FPRS
1504 #endif
1505
1506 #if defined (R_WIM)
1507 supply_register (WIM_REGNUM, ((char *) (regp + R_WIM)) + offset);
1508 #else
1509 supply_register (WIM_REGNUM, NULL);
1510 #endif
1511
1512 #if defined (R_TBR)
1513 supply_register (TBR_REGNUM, ((char *) (regp + R_TBR)) + offset);
1514 #else
1515 supply_register (TBR_REGNUM, NULL);
1516 #endif
1517 }
1518
1519 /* Fill inaccessible registers with zero. */
1520 if (GDB_TARGET_IS_SPARC64)
1521 {
1522 /*
1523 * don't know how to get value of any of the following:
1524 */
1525 supply_register (VER_REGNUM, NULL);
1526 supply_register (TICK_REGNUM, NULL);
1527 supply_register (PIL_REGNUM, NULL);
1528 supply_register (PSTATE_REGNUM, NULL);
1529 supply_register (TSTATE_REGNUM, NULL);
1530 supply_register (TBA_REGNUM, NULL);
1531 supply_register (TL_REGNUM, NULL);
1532 supply_register (TT_REGNUM, NULL);
1533 supply_register (TPC_REGNUM, NULL);
1534 supply_register (TNPC_REGNUM, NULL);
1535 supply_register (WSTATE_REGNUM, NULL);
1536 supply_register (CWP_REGNUM, NULL);
1537 supply_register (CANSAVE_REGNUM, NULL);
1538 supply_register (CANRESTORE_REGNUM, NULL);
1539 supply_register (CLEANWIN_REGNUM, NULL);
1540 supply_register (OTHERWIN_REGNUM, NULL);
1541 supply_register (ASR16_REGNUM, NULL);
1542 supply_register (ASR17_REGNUM, NULL);
1543 supply_register (ASR18_REGNUM, NULL);
1544 supply_register (ASR19_REGNUM, NULL);
1545 supply_register (ASR20_REGNUM, NULL);
1546 supply_register (ASR21_REGNUM, NULL);
1547 supply_register (ASR22_REGNUM, NULL);
1548 supply_register (ASR23_REGNUM, NULL);
1549 supply_register (ASR24_REGNUM, NULL);
1550 supply_register (ASR25_REGNUM, NULL);
1551 supply_register (ASR26_REGNUM, NULL);
1552 supply_register (ASR27_REGNUM, NULL);
1553 supply_register (ASR28_REGNUM, NULL);
1554 supply_register (ASR29_REGNUM, NULL);
1555 supply_register (ASR30_REGNUM, NULL);
1556 supply_register (ASR31_REGNUM, NULL);
1557 supply_register (ICC_REGNUM, NULL);
1558 supply_register (XCC_REGNUM, NULL);
1559 }
1560 else
1561 {
1562 supply_register (CPS_REGNUM, NULL);
1563 }
1564 }
1565
1566 void
1567 fill_gregset (gdb_gregset_t *gregsetp, int regno)
1568 {
1569 prgreg_t *regp = (prgreg_t *) gregsetp;
1570 int regi, offset = 0;
1571
1572 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1573 then the gregset may contain 64-bit ints while supply_register
1574 is expecting 32-bit ints. Compensate. */
1575 if (sizeof (regp[0]) == 8 && SPARC_INTREG_SIZE == 4)
1576 offset = 4;
1577
1578 for (regi = 0; regi <= R_I7; regi++)
1579 if ((regno == -1) || (regno == regi))
1580 deprecated_read_register_gen (regi, (char *) (regp + regi) + offset);
1581
1582 if ((regno == -1) || (regno == PC_REGNUM))
1583 deprecated_read_register_gen (PC_REGNUM, (char *) (regp + R_PC) + offset);
1584
1585 if ((regno == -1) || (regno == DEPRECATED_NPC_REGNUM))
1586 deprecated_read_register_gen (DEPRECATED_NPC_REGNUM, (char *) (regp + R_nPC) + offset);
1587
1588 if ((regno == -1) || (regno == Y_REGNUM))
1589 deprecated_read_register_gen (Y_REGNUM, (char *) (regp + R_Y) + offset);
1590
1591 if (GDB_TARGET_IS_SPARC64)
1592 {
1593 #ifdef R_CCR
1594 if (regno == -1 || regno == CCR_REGNUM)
1595 deprecated_read_register_gen (CCR_REGNUM, ((char *) (regp + R_CCR)) + offset);
1596 #endif
1597 #ifdef R_FPRS
1598 if (regno == -1 || regno == FPRS_REGNUM)
1599 deprecated_read_register_gen (FPRS_REGNUM, ((char *) (regp + R_FPRS)) + offset);
1600 #endif
1601 #ifdef R_ASI
1602 if (regno == -1 || regno == ASI_REGNUM)
1603 deprecated_read_register_gen (ASI_REGNUM, ((char *) (regp + R_ASI)) + offset);
1604 #endif
1605 }
1606 else /* sparc32 */
1607 {
1608 #ifdef R_PS
1609 if (regno == -1 || regno == PS_REGNUM)
1610 deprecated_read_register_gen (PS_REGNUM, ((char *) (regp + R_PS)) + offset);
1611 #endif
1612
1613 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1614 Steal R_ASI and R_FPRS, and hope for the best! */
1615
1616 #if !defined (R_WIM) && defined (R_ASI)
1617 #define R_WIM R_ASI
1618 #endif
1619
1620 #if !defined (R_TBR) && defined (R_FPRS)
1621 #define R_TBR R_FPRS
1622 #endif
1623
1624 #if defined (R_WIM)
1625 if (regno == -1 || regno == WIM_REGNUM)
1626 deprecated_read_register_gen (WIM_REGNUM, ((char *) (regp + R_WIM)) + offset);
1627 #else
1628 if (regno == -1 || regno == WIM_REGNUM)
1629 deprecated_read_register_gen (WIM_REGNUM, NULL);
1630 #endif
1631
1632 #if defined (R_TBR)
1633 if (regno == -1 || regno == TBR_REGNUM)
1634 deprecated_read_register_gen (TBR_REGNUM, ((char *) (regp + R_TBR)) + offset);
1635 #else
1636 if (regno == -1 || regno == TBR_REGNUM)
1637 deprecated_read_register_gen (TBR_REGNUM, NULL);
1638 #endif
1639 }
1640 }
1641
1642 /* Given a pointer to a floating point register set in /proc format
1643 (fpregset_t *), unpack the register contents and supply them as gdb's
1644 idea of the current floating point register values. */
1645
1646 void
1647 supply_fpregset (gdb_fpregset_t *fpregsetp)
1648 {
1649 int regi;
1650 char *from;
1651
1652 if (!SPARC_HAS_FPU)
1653 return;
1654
1655 for (regi = FP0_REGNUM; regi < FP_MAX_REGNUM; regi++)
1656 {
1657 from = (char *) &fpregsetp->pr_fr.pr_regs[regi - FP0_REGNUM];
1658 supply_register (regi, from);
1659 }
1660
1661 if (GDB_TARGET_IS_SPARC64)
1662 {
1663 /*
1664 * don't know how to get value of the following.
1665 */
1666 supply_register (FSR_REGNUM, NULL); /* zero it out for now */
1667 supply_register (FCC0_REGNUM, NULL);
1668 supply_register (FCC1_REGNUM, NULL); /* don't know how to get value */
1669 supply_register (FCC2_REGNUM, NULL); /* don't know how to get value */
1670 supply_register (FCC3_REGNUM, NULL); /* don't know how to get value */
1671 }
1672 else
1673 {
1674 supply_register (FPS_REGNUM, (char *) &(fpregsetp->pr_fsr));
1675 }
1676 }
1677
1678 /* Given a pointer to a floating point register set in /proc format
1679 (fpregset_t *), update the register specified by REGNO from gdb's idea
1680 of the current floating point register set. If REGNO is -1, update
1681 them all. */
1682 /* This will probably need some changes for sparc64. */
1683
1684 void
1685 fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
1686 {
1687 int regi;
1688 char *to;
1689 char *from;
1690
1691 if (!SPARC_HAS_FPU)
1692 return;
1693
1694 for (regi = FP0_REGNUM; regi < FP_MAX_REGNUM; regi++)
1695 {
1696 if ((regno == -1) || (regno == regi))
1697 {
1698 from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regi)];
1699 to = (char *) &fpregsetp->pr_fr.pr_regs[regi - FP0_REGNUM];
1700 memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regi));
1701 }
1702 }
1703
1704 if (!(GDB_TARGET_IS_SPARC64)) /* FIXME: does Sparc64 have this register? */
1705 if ((regno == -1) || (regno == FPS_REGNUM))
1706 {
1707 from = (char *)&deprecated_registers[DEPRECATED_REGISTER_BYTE (FPS_REGNUM)];
1708 to = (char *) &fpregsetp->pr_fsr;
1709 memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (FPS_REGNUM));
1710 }
1711 }
1712
1713 #endif /* USE_PROC_FS */
1714
1715 /* Because of Multi-arch, GET_LONGJMP_TARGET is always defined. So test
1716 for a definition of JB_PC. */
1717 #ifdef JB_PC
1718
1719 /* Figure out where the longjmp will land. We expect that we have just entered
1720 longjmp and haven't yet setup the stack frame, so the args are still in the
1721 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1722 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1723 This routine returns true on success */
1724
1725 int
1726 get_longjmp_target (CORE_ADDR *pc)
1727 {
1728 CORE_ADDR jb_addr;
1729 #define LONGJMP_TARGET_SIZE 4
1730 char buf[LONGJMP_TARGET_SIZE];
1731
1732 jb_addr = read_register (O0_REGNUM);
1733
1734 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
1735 LONGJMP_TARGET_SIZE))
1736 return 0;
1737
1738 *pc = extract_unsigned_integer (buf, LONGJMP_TARGET_SIZE);
1739
1740 return 1;
1741 }
1742 #endif /* GET_LONGJMP_TARGET */
1743 \f
1744 #ifdef STATIC_TRANSFORM_NAME
1745 /* SunPRO (3.0 at least), encodes the static variables. This is not
1746 related to C++ mangling, it is done for C too. */
1747
1748 char *
1749 sunpro_static_transform_name (char *name)
1750 {
1751 char *p;
1752 if (name[0] == '$')
1753 {
1754 /* For file-local statics there will be a dollar sign, a bunch
1755 of junk (the contents of which match a string given in the
1756 N_OPT), a period and the name. For function-local statics
1757 there will be a bunch of junk (which seems to change the
1758 second character from 'A' to 'B'), a period, the name of the
1759 function, and the name. So just skip everything before the
1760 last period. */
1761 p = strrchr (name, '.');
1762 if (p != NULL)
1763 name = p + 1;
1764 }
1765 return name;
1766 }
1767 #endif /* STATIC_TRANSFORM_NAME */
1768 \f
1769
1770 /* Utilities for printing registers.
1771 Page numbers refer to the SPARC Architecture Manual. */
1772
1773 static void dump_ccreg (char *, int);
1774
1775 static void
1776 dump_ccreg (char *reg, int val)
1777 {
1778 /* page 41 */
1779 printf_unfiltered ("%s:%s,%s,%s,%s", reg,
1780 val & 8 ? "N" : "NN",
1781 val & 4 ? "Z" : "NZ",
1782 val & 2 ? "O" : "NO",
1783 val & 1 ? "C" : "NC");
1784 }
1785
1786 static char *
1787 decode_asi (int val)
1788 {
1789 /* page 72 */
1790 switch (val)
1791 {
1792 case 4:
1793 return "ASI_NUCLEUS";
1794 case 0x0c:
1795 return "ASI_NUCLEUS_LITTLE";
1796 case 0x10:
1797 return "ASI_AS_IF_USER_PRIMARY";
1798 case 0x11:
1799 return "ASI_AS_IF_USER_SECONDARY";
1800 case 0x18:
1801 return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1802 case 0x19:
1803 return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1804 case 0x80:
1805 return "ASI_PRIMARY";
1806 case 0x81:
1807 return "ASI_SECONDARY";
1808 case 0x82:
1809 return "ASI_PRIMARY_NOFAULT";
1810 case 0x83:
1811 return "ASI_SECONDARY_NOFAULT";
1812 case 0x88:
1813 return "ASI_PRIMARY_LITTLE";
1814 case 0x89:
1815 return "ASI_SECONDARY_LITTLE";
1816 case 0x8a:
1817 return "ASI_PRIMARY_NOFAULT_LITTLE";
1818 case 0x8b:
1819 return "ASI_SECONDARY_NOFAULT_LITTLE";
1820 default:
1821 return NULL;
1822 }
1823 }
1824
1825 /* Pretty print various registers. */
1826 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1827
1828 static void
1829 sparc_print_register_hook (int regno)
1830 {
1831 ULONGEST val;
1832
1833 /* Handle double/quad versions of lower 32 fp regs. */
1834 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32
1835 && (regno & 1) == 0)
1836 {
1837 char value[16];
1838
1839 if (frame_register_read (deprecated_selected_frame, regno, value)
1840 && frame_register_read (deprecated_selected_frame, regno + 1, value + 4))
1841 {
1842 printf_unfiltered ("\t");
1843 print_floating (value, builtin_type_double, gdb_stdout);
1844 }
1845 #if 0 /* FIXME: gdb doesn't handle long doubles */
1846 if ((regno & 3) == 0)
1847 {
1848 if (frame_register_read (deprecated_selected_frame, regno + 2, value + 8)
1849 && frame_register_read (deprecated_selected_frame, regno + 3, value + 12))
1850 {
1851 printf_unfiltered ("\t");
1852 print_floating (value, builtin_type_long_double, gdb_stdout);
1853 }
1854 }
1855 #endif
1856 return;
1857 }
1858
1859 #if 0 /* FIXME: gdb doesn't handle long doubles */
1860 /* Print upper fp regs as long double if appropriate. */
1861 if (regno >= FP0_REGNUM + 32 && regno < FP_MAX_REGNUM
1862 /* We test for even numbered regs and not a multiple of 4 because
1863 the upper fp regs are recorded as doubles. */
1864 && (regno & 1) == 0)
1865 {
1866 char value[16];
1867
1868 if (frame_register_read (deprecated_selected_frame, regno, value)
1869 && frame_register_read (deprecated_selected_frame, regno + 1, value + 8))
1870 {
1871 printf_unfiltered ("\t");
1872 print_floating (value, builtin_type_long_double, gdb_stdout);
1873 }
1874 return;
1875 }
1876 #endif
1877
1878 /* FIXME: Some of these are priviledged registers.
1879 Not sure how they should be handled. */
1880
1881 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1882
1883 val = read_register (regno);
1884
1885 /* pages 40 - 60 */
1886 if (GDB_TARGET_IS_SPARC64)
1887 switch (regno)
1888 {
1889 case CCR_REGNUM:
1890 printf_unfiltered ("\t");
1891 dump_ccreg ("xcc", val >> 4);
1892 printf_unfiltered (", ");
1893 dump_ccreg ("icc", val & 15);
1894 break;
1895 case FPRS_REGNUM:
1896 printf ("\tfef:%d, du:%d, dl:%d",
1897 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1898 break;
1899 case FSR_REGNUM:
1900 {
1901 static char *fcc[4] =
1902 {"=", "<", ">", "?"};
1903 static char *rd[4] =
1904 {"N", "0", "+", "-"};
1905 /* Long, but I'd rather leave it as is and use a wide screen. */
1906 printf_filtered ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ",
1907 fcc[BITS (10, 3)], fcc[BITS (32, 3)],
1908 fcc[BITS (34, 3)], fcc[BITS (36, 3)],
1909 rd[BITS (30, 3)], BITS (23, 31));
1910 printf_filtered ("ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1911 BITS (22, 1), BITS (17, 7), BITS (14, 7),
1912 BITS (13, 1), BITS (5, 31), BITS (0, 31));
1913 break;
1914 }
1915 case ASI_REGNUM:
1916 {
1917 char *asi = decode_asi (val);
1918 if (asi != NULL)
1919 printf ("\t%s", asi);
1920 break;
1921 }
1922 case VER_REGNUM:
1923 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1924 BITS (48, 0xffff), BITS (32, 0xffff),
1925 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1926 break;
1927 case PSTATE_REGNUM:
1928 {
1929 static char *mm[4] =
1930 {"tso", "pso", "rso", "?"};
1931 printf_filtered ("\tcle:%d, tle:%d, mm:%s, red:%d, ",
1932 BITS (9, 1), BITS (8, 1),
1933 mm[BITS (6, 3)], BITS (5, 1));
1934 printf_filtered ("pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1935 BITS (4, 1), BITS (3, 1), BITS (2, 1),
1936 BITS (1, 1), BITS (0, 1));
1937 break;
1938 }
1939 case TSTATE_REGNUM:
1940 /* FIXME: print all 4? */
1941 break;
1942 case TT_REGNUM:
1943 /* FIXME: print all 4? */
1944 break;
1945 case TPC_REGNUM:
1946 /* FIXME: print all 4? */
1947 break;
1948 case TNPC_REGNUM:
1949 /* FIXME: print all 4? */
1950 break;
1951 case WSTATE_REGNUM:
1952 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
1953 break;
1954 case CWP_REGNUM:
1955 printf ("\t%d", BITS (0, 31));
1956 break;
1957 case CANSAVE_REGNUM:
1958 printf ("\t%-2d before spill", BITS (0, 31));
1959 break;
1960 case CANRESTORE_REGNUM:
1961 printf ("\t%-2d before fill", BITS (0, 31));
1962 break;
1963 case CLEANWIN_REGNUM:
1964 printf ("\t%-2d before clean", BITS (0, 31));
1965 break;
1966 case OTHERWIN_REGNUM:
1967 printf ("\t%d", BITS (0, 31));
1968 break;
1969 }
1970 else /* Sparc32 */
1971 switch (regno)
1972 {
1973 case PS_REGNUM:
1974 printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
1975 BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
1976 BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
1977 BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
1978 BITS (0, 31));
1979 break;
1980 case FPS_REGNUM:
1981 {
1982 static char *fcc[4] =
1983 {"=", "<", ">", "?"};
1984 static char *rd[4] =
1985 {"N", "0", "+", "-"};
1986 /* Long, but I'd rather leave it as is and use a wide screen. */
1987 printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
1988 "fcc:%s, aexc:%d, cexc:%d",
1989 rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
1990 BITS (14, 7), BITS (13, 1), fcc[BITS (10, 3)], BITS (5, 31),
1991 BITS (0, 31));
1992 break;
1993 }
1994 }
1995
1996 #undef BITS
1997 }
1998
1999 static void
2000 sparc_print_registers (struct gdbarch *gdbarch,
2001 struct ui_file *file,
2002 struct frame_info *frame,
2003 int regnum, int print_all,
2004 void (*print_register_hook) (int))
2005 {
2006 int i;
2007 const int numregs = NUM_REGS + NUM_PSEUDO_REGS;
2008 char raw_buffer[MAX_REGISTER_SIZE];
2009 char virtual_buffer[MAX_REGISTER_SIZE];
2010
2011 for (i = 0; i < numregs; i++)
2012 {
2013 /* Decide between printing all regs, non-float / vector regs, or
2014 specific reg. */
2015 if (regnum == -1)
2016 {
2017 if (!print_all)
2018 {
2019 if (TYPE_CODE (DEPRECATED_REGISTER_VIRTUAL_TYPE (i)) == TYPE_CODE_FLT)
2020 continue;
2021 if (TYPE_VECTOR (DEPRECATED_REGISTER_VIRTUAL_TYPE (i)))
2022 continue;
2023 }
2024 }
2025 else
2026 {
2027 if (i != regnum)
2028 continue;
2029 }
2030
2031 /* If the register name is empty, it is undefined for this
2032 processor, so don't display anything. */
2033 if (REGISTER_NAME (i) == NULL || *(REGISTER_NAME (i)) == '\0')
2034 continue;
2035
2036 fputs_filtered (REGISTER_NAME (i), file);
2037 print_spaces_filtered (15 - strlen (REGISTER_NAME (i)), file);
2038
2039 /* Get the data in raw format. */
2040 if (! frame_register_read (frame, i, raw_buffer))
2041 {
2042 fprintf_filtered (file, "*value not available*\n");
2043 continue;
2044 }
2045
2046 memcpy (virtual_buffer, raw_buffer, DEPRECATED_REGISTER_VIRTUAL_SIZE (i));
2047
2048 /* If virtual format is floating, print it that way, and in raw
2049 hex. */
2050 if (TYPE_CODE (DEPRECATED_REGISTER_VIRTUAL_TYPE (i)) == TYPE_CODE_FLT)
2051 {
2052 int j;
2053
2054 val_print (DEPRECATED_REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
2055 file, 0, 1, 0, Val_pretty_default);
2056
2057 fprintf_filtered (file, "\t(raw 0x");
2058 for (j = 0; j < DEPRECATED_REGISTER_RAW_SIZE (i); j++)
2059 {
2060 int idx;
2061 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
2062 idx = j;
2063 else
2064 idx = DEPRECATED_REGISTER_RAW_SIZE (i) - 1 - j;
2065 fprintf_filtered (file, "%02x", (unsigned char) raw_buffer[idx]);
2066 }
2067 fprintf_filtered (file, ")");
2068 }
2069 else
2070 {
2071 /* Print the register in hex. */
2072 val_print (DEPRECATED_REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
2073 file, 'x', 1, 0, Val_pretty_default);
2074 /* If not a vector register, print it also according to its
2075 natural format. */
2076 if (TYPE_VECTOR (DEPRECATED_REGISTER_VIRTUAL_TYPE (i)) == 0)
2077 {
2078 fprintf_filtered (file, "\t");
2079 val_print (DEPRECATED_REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
2080 file, 0, 1, 0, Val_pretty_default);
2081 }
2082 }
2083
2084 /* Some sparc specific info. */
2085 if (print_register_hook != NULL)
2086 print_register_hook (i);
2087
2088 fprintf_filtered (file, "\n");
2089 }
2090 }
2091
2092 static void
2093 sparc_print_registers_info (struct gdbarch *gdbarch,
2094 struct ui_file *file,
2095 struct frame_info *frame,
2096 int regnum, int print_all)
2097 {
2098 sparc_print_registers (gdbarch, file, frame, regnum, print_all,
2099 sparc_print_register_hook);
2100 }
2101
2102 void
2103 sparc_do_registers_info (int regnum, int all)
2104 {
2105 sparc_print_registers_info (current_gdbarch, gdb_stdout, deprecated_selected_frame,
2106 regnum, all);
2107 }
2108
2109 #define SPARC_F0_REGNUM FP0_REGNUM /* %f0 */
2110 #define SPARC_F1_REGNUM (FP0_REGNUM + 1)/* %f1 */
2111 #define SPARC_O0_REGNUM O0_REGNUM /* %o0 */
2112 #define SPARC_O1_REGNUM O1_REGNUM /* %o1 */
2113
2114 /* Push the arguments onto the stack and into the appropriate registers. */
2115
2116 static CORE_ADDR
2117 sparc32_do_push_arguments (struct regcache *regcache, int nargs,
2118 struct value **args, CORE_ADDR sp)
2119 {
2120 CORE_ADDR *addr;
2121 int size = 0;
2122 int i;
2123
2124 /* Structure, union and quad-precision arguments are passed by
2125 reference. We allocate space for these arguments on the stack
2126 and record their addresses in an array. Array elements for
2127 arguments that are passed by value will be set to zero.*/
2128 addr = alloca (nargs * sizeof (CORE_ADDR));
2129
2130 for (i = nargs - 1; i >= 0; i--)
2131 {
2132 struct type *type = VALUE_ENCLOSING_TYPE (args[i]);
2133 enum type_code code = TYPE_CODE (type);
2134 int len = TYPE_LENGTH (type);
2135
2136 /* Push the contents of structure, union and quad-precision
2137 arguments on the stack. */
2138 if (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION || len > 8)
2139 {
2140 /* Keep the stack doubleword aligned. */
2141 sp -= (len + 7) & ~7;
2142 write_memory (sp, VALUE_CONTENTS_ALL (args[i]), len);
2143 addr[i] = sp;
2144 size += 4;
2145 }
2146 else
2147 {
2148 addr[i] = 0;
2149 size += (len > 4) ? 8 : 4;
2150 }
2151 }
2152
2153 /* The needed space for outgoing arguments should be a multiple of 4. */
2154 gdb_assert (size % 4 == 0);
2155
2156 /* Make sure we reserve space for the first six words of arguments
2157 in the stack frame, even if we don't need them. */
2158 if (size < 24)
2159 sp -= (24 - size);
2160
2161 /* Make sure we end up with a doubleword aligned stack in the end.
2162 Reserve an extra word if necessary in order to accomplish this. */
2163 if ((sp - size) % 8 == 0)
2164 sp -= 4;
2165
2166 /* Now push the arguments onto the stack. */
2167 for (i = nargs - 1; i >=0; i--)
2168 {
2169 char buf[8];
2170 int len;
2171
2172 if (addr[i])
2173 {
2174 store_unsigned_integer (buf, 4, addr[i]);
2175 len = 4;
2176 }
2177 else
2178 {
2179 struct value *arg = args[i];
2180
2181 len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
2182
2183 /* Expand signed and unsigned bytes and halfwords as needed. */
2184 if (len < 4)
2185 {
2186 arg = value_cast (builtin_type_long, arg);
2187 len = 4;
2188 }
2189 else if (len > 4 && len < 8)
2190 {
2191 arg = value_cast (builtin_type_long_long, arg);
2192 len = 4;
2193 }
2194
2195 gdb_assert (len == 4 || len == 8);
2196 memcpy (buf, VALUE_CONTENTS_ALL (arg), len);
2197 }
2198
2199 /* We always write the argument word on the stack. */
2200 sp -= len;
2201 write_memory (sp, buf, len);
2202
2203 /* If this argument occupies one of the first 6 words, write it
2204 into the appropriate register too. */
2205 size -= len;
2206 if (size < 24)
2207 {
2208 int regnum = SPARC_O0_REGNUM + (size / 4);
2209
2210 regcache_cooked_write (regcache, regnum, buf);
2211 if (len == 8 && size < 20)
2212 regcache_cooked_write (regcache, regnum + 1, buf + 4);
2213 }
2214 }
2215
2216 /* Reserve space for the struct/union return value pointer. */
2217 sp -= 4;
2218
2219 /* Stack should be doubleword aligned at this point. */
2220 gdb_assert (sp % 8 == 0);
2221
2222 /* Return the adjusted stack pointer. */
2223 return sp;
2224 }
2225
2226 /* The SPARC passes the arguments on the stack; arguments smaller
2227 than an int are promoted to an int. The first 6 words worth of
2228 args are also passed in registers o0 - o5. */
2229
2230 CORE_ADDR
2231 sparc32_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
2232 int struct_return, CORE_ADDR struct_addr)
2233 {
2234 sp = sparc32_do_push_arguments (current_regcache, nargs, args, sp);
2235
2236 /* FIXME: kettenis/20030525: We don't let this function set the
2237 struct/union return pointer just yet. */
2238 #if 0
2239 if (struct_return)
2240 {
2241 char buf[4];
2242
2243 /* The space for the struct/union return value pointer has
2244 already been reserved. */
2245 store_unsigned_integer (buf, 4, struct_addr);
2246 write (sp, buf, 4);
2247 }
2248
2249 return sp;
2250 #else
2251 return sp + 4;
2252 #endif
2253 }
2254
2255 /* Extract from REGCACHE a function return value of type TYPE and copy
2256 that into VALBUF.
2257
2258 Note that REGCACHE specifies the register values for the frame of
2259 the calling function. This means that we need to fetch the value
2260 form %o0 and %o1, which correspond to %i0 and %i1 in the frame of
2261 the called function. */
2262
2263 void
2264 sparc32_extract_return_value (struct type *type, struct regcache *regcache,
2265 void *valbuf)
2266 {
2267 int len = TYPE_LENGTH (type);
2268 char buf[8];
2269
2270 if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
2271 {
2272 if (len == 4 || len == 8)
2273 {
2274 regcache_cooked_read (regcache, SPARC_F0_REGNUM, buf);
2275 regcache_cooked_read (regcache, SPARC_F1_REGNUM, buf + 4);
2276 memcpy (valbuf, buf, len);
2277 return;
2278 }
2279 else
2280 internal_error (__FILE__, __LINE__, "\
2281 Cannot extract floating-point return value of %d bytes long.", len);
2282 }
2283
2284 if (len <= 4)
2285 {
2286 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
2287 memcpy (valbuf, buf + 4 - len, len);
2288 }
2289 else if (len <= 8)
2290 {
2291 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
2292 regcache_cooked_read (regcache, SPARC_O1_REGNUM, buf + 4);
2293 memcpy (valbuf, buf + 8 - len, len);
2294 }
2295 else
2296 internal_error (__FILE__, __LINE__,
2297 "Cannot extract return value of %d bytes long.", len);
2298 }
2299
2300 /* Write into REGBUF a function return value VALBUF of type TYPE. */
2301
2302 void
2303 sparc32_store_return_value (struct type *type, struct regcache *regcache,
2304 const void *valbuf)
2305 {
2306 int len = TYPE_LENGTH (type);
2307 char buf[8];
2308
2309 if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
2310 {
2311 const char *buf = valbuf;
2312
2313 if (len == 4)
2314 {
2315 regcache_cooked_write (regcache, SPARC_F0_REGNUM, buf);
2316 return;
2317 }
2318 else if (len == 8)
2319 {
2320 regcache_cooked_write (regcache, SPARC_F0_REGNUM, buf);
2321 regcache_cooked_write (regcache, SPARC_F1_REGNUM, buf + 4);
2322 return;
2323 }
2324 else
2325 internal_error (__FILE__, __LINE__, "\
2326 Cannot extract floating-point return value of %d bytes long.", len);
2327 }
2328
2329 /* Add leading zeros to the value. */
2330 memset (buf, 0, sizeof buf);
2331
2332 if (len <= 4)
2333 {
2334 memcpy (buf + 4 - len, valbuf, len);
2335 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
2336 }
2337 else if (len <= 8)
2338 {
2339 memcpy (buf + 8 - len, valbuf, len);
2340 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
2341 regcache_cooked_write (regcache, SPARC_O1_REGNUM, buf);
2342 }
2343 else
2344 internal_error (__FILE__, __LINE__,
2345 "Cannot extract return value of %d bytes long.", len);
2346 }
2347
2348 /* Extract from REGCACHE the address in which a function should return
2349 its structure value. */
2350
2351 CORE_ADDR
2352 sparc_extract_struct_value_address (struct regcache *regcache)
2353 {
2354 ULONGEST addr;
2355
2356 regcache_cooked_read_unsigned (regcache, SPARC_O0_REGNUM, &addr);
2357 return addr;
2358 }
2359
2360 /* FIXME: kettenis/2003/05/24: Still used for sparc64. */
2361
2362 static void
2363 sparc_store_return_value (struct type *type, char *valbuf)
2364 {
2365 int regno;
2366 char buffer[MAX_REGISTER_SIZE];
2367
2368 if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
2369 /* Floating-point values are returned in the register pair */
2370 /* formed by %f0 and %f1 (doubles are, anyway). */
2371 regno = FP0_REGNUM;
2372 else
2373 /* Other values are returned in register %o0. */
2374 regno = O0_REGNUM;
2375
2376 /* Add leading zeros to the value. */
2377 if (TYPE_LENGTH (type) < DEPRECATED_REGISTER_RAW_SIZE (regno))
2378 {
2379 memset (buffer, 0, DEPRECATED_REGISTER_RAW_SIZE (regno));
2380 memcpy (buffer + DEPRECATED_REGISTER_RAW_SIZE (regno) - TYPE_LENGTH (type), valbuf,
2381 TYPE_LENGTH (type));
2382 deprecated_write_register_gen (regno, buffer);
2383 }
2384 else
2385 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (regno), valbuf,
2386 TYPE_LENGTH (type));
2387 }
2388
2389 #ifndef CALL_DUMMY_CALL_OFFSET
2390 #define CALL_DUMMY_CALL_OFFSET \
2391 (gdbarch_tdep (current_gdbarch)->call_dummy_call_offset)
2392 #endif /* CALL_DUMMY_CALL_OFFSET */
2393
2394 /* Insert the function address into a call dummy instruction sequence
2395 stored at DUMMY.
2396
2397 For structs and unions, if the function was compiled with Sun cc,
2398 it expects 'unimp' after the call. But gcc doesn't use that
2399 (twisted) convention. So leave a nop there for gcc
2400 (DEPRECATED_FIX_CALL_DUMMY can assume it is operating on a pristine
2401 CALL_DUMMY, not one that has already been customized for a
2402 different function). */
2403
2404 void
2405 sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
2406 struct type *value_type, int using_gcc)
2407 {
2408 int i;
2409
2410 /* Store the relative adddress of the target function into the
2411 'call' instruction. */
2412 store_unsigned_integer (dummy + CALL_DUMMY_CALL_OFFSET, 4,
2413 (0x40000000
2414 | (((fun - (pc + CALL_DUMMY_CALL_OFFSET)) >> 2)
2415 & 0x3fffffff)));
2416
2417 /* If the called function returns an aggregate value, fill in the UNIMP
2418 instruction containing the size of the returned aggregate return value,
2419 which follows the call instruction.
2420 For details see the SPARC Architecture Manual Version 8, Appendix D.3.
2421
2422 Adjust the call_dummy_breakpoint_offset for the bp_call_dummy breakpoint
2423 to the proper address in the call dummy, so that `finish' after a stop
2424 in a call dummy works.
2425
2426 Tweeking current_gdbarch is not an optimal solution, but the call
2427 to sparc_fix_call_dummy is immediately followed by a call to
2428 call_function_by_hand, which is the only function where
2429 dummy_breakpoint_offset is actually used, if it is non-zero. */
2430 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
2431 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
2432 {
2433 store_unsigned_integer (dummy + CALL_DUMMY_CALL_OFFSET + 8, 4,
2434 TYPE_LENGTH (value_type) & 0x1fff);
2435 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch, 0x30);
2436 }
2437 else
2438 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch, 0x2c);
2439
2440 if (!(GDB_TARGET_IS_SPARC64))
2441 {
2442 /* If this is not a simulator target, change the first four
2443 instructions of the call dummy to NOPs. Those instructions
2444 include a 'save' instruction and are designed to work around
2445 problems with register window flushing in the simulator. */
2446
2447 if (strcmp (target_shortname, "sim") != 0)
2448 {
2449 for (i = 0; i < 4; i++)
2450 store_unsigned_integer (dummy + (i * 4), 4, 0x01000000);
2451 }
2452 }
2453 }
2454
2455 /*
2456 * Module "constructor" function.
2457 */
2458
2459 static struct gdbarch * sparc_gdbarch_init (struct gdbarch_info info,
2460 struct gdbarch_list *arches);
2461 static void sparc_dump_tdep (struct gdbarch *, struct ui_file *);
2462
2463 extern initialize_file_ftype _initialize_sparc_tdep; /* -Wmissing-prototypes */
2464
2465 void
2466 _initialize_sparc_tdep (void)
2467 {
2468 /* Hook us into the gdbarch mechanism. */
2469 gdbarch_register (bfd_arch_sparc, sparc_gdbarch_init, sparc_dump_tdep);
2470 }
2471
2472 /* Compensate for stack bias. Note that we currently don't handle
2473 mixed 32/64 bit code. */
2474
2475 static CORE_ADDR
2476 sparc64_read_sp (void)
2477 {
2478 CORE_ADDR sp = read_register (SP_REGNUM);
2479
2480 if (sp & 1)
2481 sp += 2047;
2482 return sp;
2483 }
2484
2485 static CORE_ADDR
2486 sparc64_read_fp (void)
2487 {
2488 CORE_ADDR fp = read_register (DEPRECATED_FP_REGNUM);
2489
2490 if (fp & 1)
2491 fp += 2047;
2492 return fp;
2493 }
2494
2495 static void
2496 sparc64_write_sp (CORE_ADDR val)
2497 {
2498 CORE_ADDR oldsp = read_register (SP_REGNUM);
2499 if (oldsp & 1)
2500 write_register (SP_REGNUM, val - 2047);
2501 else
2502 write_register (SP_REGNUM, val);
2503 }
2504
2505 /* The SPARC 64 ABI passes floating-point arguments in FP0 to FP31,
2506 and all other arguments in O0 to O5. They are also copied onto
2507 the stack in the correct places. Apparently (empirically),
2508 structs of less than 16 bytes are passed member-by-member in
2509 separate registers, but I am unable to figure out the algorithm.
2510 Some members go in floating point regs, but I don't know which.
2511
2512 FIXME: Handle small structs (less than 16 bytes containing floats).
2513
2514 The counting regimen for using both integer and FP registers
2515 for argument passing is rather odd -- a single counter is used
2516 for both; this means that if the arguments alternate between
2517 int and float, we will waste every other register of both types. */
2518
2519 static CORE_ADDR
2520 sparc64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
2521 int struct_return, CORE_ADDR struct_retaddr)
2522 {
2523 int i, j, register_counter = 0;
2524 CORE_ADDR tempsp;
2525 struct type *sparc_intreg_type =
2526 TYPE_LENGTH (builtin_type_long) == SPARC_INTREG_SIZE ?
2527 builtin_type_long : builtin_type_long_long;
2528
2529 sp = (sp & ~(((unsigned long) SPARC_INTREG_SIZE) - 1UL));
2530
2531 /* Figure out how much space we'll need. */
2532 for (i = nargs - 1; i >= 0; i--)
2533 {
2534 int len = TYPE_LENGTH (check_typedef (VALUE_TYPE (args[i])));
2535 struct value *copyarg = args[i];
2536 int copylen = len;
2537
2538 if (copylen < SPARC_INTREG_SIZE)
2539 {
2540 copyarg = value_cast (sparc_intreg_type, copyarg);
2541 copylen = SPARC_INTREG_SIZE;
2542 }
2543 sp -= copylen;
2544 }
2545
2546 /* Round down. */
2547 sp = sp & ~7;
2548 tempsp = sp;
2549
2550 /* if STRUCT_RETURN, then first argument is the struct return location. */
2551 if (struct_return)
2552 write_register (O0_REGNUM + register_counter++, struct_retaddr);
2553
2554 /* Now write the arguments onto the stack, while writing FP
2555 arguments into the FP registers, and other arguments into the
2556 first six 'O' registers. */
2557
2558 for (i = 0; i < nargs; i++)
2559 {
2560 int len = TYPE_LENGTH (check_typedef (VALUE_TYPE (args[i])));
2561 struct value *copyarg = args[i];
2562 enum type_code typecode = TYPE_CODE (VALUE_TYPE (args[i]));
2563 int copylen = len;
2564
2565 if (typecode == TYPE_CODE_INT ||
2566 typecode == TYPE_CODE_BOOL ||
2567 typecode == TYPE_CODE_CHAR ||
2568 typecode == TYPE_CODE_RANGE ||
2569 typecode == TYPE_CODE_ENUM)
2570 if (len < SPARC_INTREG_SIZE)
2571 {
2572 /* Small ints will all take up the size of one intreg on
2573 the stack. */
2574 copyarg = value_cast (sparc_intreg_type, copyarg);
2575 copylen = SPARC_INTREG_SIZE;
2576 }
2577
2578 write_memory (tempsp, VALUE_CONTENTS (copyarg), copylen);
2579 tempsp += copylen;
2580
2581 /* Corner case: Structs consisting of a single float member are floats.
2582 * FIXME! I don't know about structs containing multiple floats!
2583 * Structs containing mixed floats and ints are even more weird.
2584 */
2585
2586
2587
2588 /* Separate float args from all other args. */
2589 if (typecode == TYPE_CODE_FLT && SPARC_HAS_FPU)
2590 {
2591 if (register_counter < 16)
2592 {
2593 /* This arg gets copied into a FP register. */
2594 int fpreg;
2595
2596 switch (len) {
2597 case 4: /* Single-precision (float) */
2598 fpreg = FP0_REGNUM + 2 * register_counter + 1;
2599 register_counter += 1;
2600 break;
2601 case 8: /* Double-precision (double) */
2602 fpreg = FP0_REGNUM + 2 * register_counter;
2603 register_counter += 1;
2604 break;
2605 case 16: /* Quad-precision (long double) */
2606 fpreg = FP0_REGNUM + 2 * register_counter;
2607 register_counter += 2;
2608 break;
2609 default:
2610 internal_error (__FILE__, __LINE__, "bad switch");
2611 }
2612 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (fpreg),
2613 VALUE_CONTENTS (args[i]),
2614 len);
2615 }
2616 }
2617 else /* all other args go into the first six 'o' registers */
2618 {
2619 for (j = 0;
2620 j < len && register_counter < 6;
2621 j += SPARC_INTREG_SIZE)
2622 {
2623 int oreg = O0_REGNUM + register_counter;
2624
2625 deprecated_write_register_gen (oreg, VALUE_CONTENTS (copyarg) + j);
2626 register_counter += 1;
2627 }
2628 }
2629 }
2630 return sp;
2631 }
2632
2633 /* Values <= 32 bytes are returned in o0-o3 (floating-point values are
2634 returned in f0-f3). */
2635
2636 static void
2637 sp64_extract_return_value (struct type *type, char *regbuf, char *valbuf,
2638 int bitoffset)
2639 {
2640 int typelen = TYPE_LENGTH (type);
2641 int regsize = DEPRECATED_REGISTER_RAW_SIZE (O0_REGNUM);
2642
2643 if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
2644 {
2645 memcpy (valbuf, &regbuf[DEPRECATED_REGISTER_BYTE (FP0_REGNUM)], typelen);
2646 return;
2647 }
2648
2649 if (TYPE_CODE (type) != TYPE_CODE_STRUCT
2650 || (TYPE_LENGTH (type) > 32))
2651 {
2652 memcpy (valbuf,
2653 &regbuf[O0_REGNUM * regsize +
2654 (typelen >= regsize ? 0 : regsize - typelen)],
2655 typelen);
2656 return;
2657 }
2658 else
2659 {
2660 char *o0 = &regbuf[O0_REGNUM * regsize];
2661 char *f0 = &regbuf[FP0_REGNUM * regsize];
2662 int x;
2663
2664 for (x = 0; x < TYPE_NFIELDS (type); x++)
2665 {
2666 struct field *f = &TYPE_FIELDS (type)[x];
2667 /* FIXME: We may need to handle static fields here. */
2668 int whichreg = (f->loc.bitpos + bitoffset) / 32;
2669 int remainder = ((f->loc.bitpos + bitoffset) % 32) / 8;
2670 int where = (f->loc.bitpos + bitoffset) / 8;
2671 int size = TYPE_LENGTH (f->type);
2672 int typecode = TYPE_CODE (f->type);
2673
2674 if (typecode == TYPE_CODE_STRUCT)
2675 {
2676 sp64_extract_return_value (f->type,
2677 regbuf,
2678 valbuf,
2679 bitoffset + f->loc.bitpos);
2680 }
2681 else if (typecode == TYPE_CODE_FLT && SPARC_HAS_FPU)
2682 {
2683 memcpy (valbuf + where, &f0[whichreg * 4] + remainder, size);
2684 }
2685 else
2686 {
2687 memcpy (valbuf + where, &o0[whichreg * 4] + remainder, size);
2688 }
2689 }
2690 }
2691 }
2692
2693 static void
2694 sparc64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
2695 {
2696 sp64_extract_return_value (type, regbuf, valbuf, 0);
2697 }
2698
2699 extern CORE_ADDR
2700 sparc32_stack_align (CORE_ADDR addr)
2701 {
2702 return ((addr + 7) & -8);
2703 }
2704
2705 static CORE_ADDR
2706 sparc64_stack_align (CORE_ADDR addr)
2707 {
2708 return ((addr + 15) & -16);
2709 }
2710
2711 extern void
2712 sparc_print_extra_frame_info (struct frame_info *fi)
2713 {
2714 if (fi && get_frame_extra_info (fi) && get_frame_extra_info (fi)->flat)
2715 printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n",
2716 paddr_nz (get_frame_extra_info (fi)->pc_addr),
2717 paddr_nz (get_frame_extra_info (fi)->fp_addr));
2718 }
2719
2720 static const char *
2721 sparc32_register_name (int regno)
2722 {
2723 static char *register_names[] =
2724 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2725 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2726 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2727 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2728
2729 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2730 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2731 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2732 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2733
2734 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
2735 };
2736
2737 if (regno < 0 ||
2738 regno >= (sizeof (register_names) / sizeof (register_names[0])))
2739 return NULL;
2740 else
2741 return register_names[regno];
2742 }
2743
2744 static const char *
2745 sparc64_register_name (int regno)
2746 {
2747 static char *register_names[] =
2748 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2749 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2750 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2751 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2752
2753 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2754 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2755 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2756 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2757 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
2758 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
2759
2760 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", "ver",
2761 "tick", "pil", "pstate", "tstate", "tba", "tl", "tt", "tpc",
2762 "tnpc", "wstate", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
2763 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", "asr22", "asr23",
2764 "asr24", "asr25", "asr26", "asr27", "asr28", "asr29", "asr30", "asr31",
2765 /* These are here at the end to simplify removing them if we have to. */
2766 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"
2767 };
2768
2769 if (regno < 0 ||
2770 regno >= (sizeof (register_names) / sizeof (register_names[0])))
2771 return NULL;
2772 else
2773 return register_names[regno];
2774 }
2775
2776 static CORE_ADDR
2777 sparc_push_return_address (CORE_ADDR pc_unused, CORE_ADDR sp)
2778 {
2779 if (CALL_DUMMY_LOCATION == AT_ENTRY_POINT)
2780 {
2781 /* The return PC of the dummy_frame is the former 'current' PC
2782 (where we were before we made the target function call).
2783 This is saved in %i7 by push_dummy_frame.
2784
2785 We will save the 'call dummy location' (ie. the address
2786 to which the target function will return) in %o7.
2787 This address will actually be the program's entry point.
2788 There will be a special call_dummy breakpoint there. */
2789
2790 if (DEPRECATED_CALL_DUMMY_ADDRESS_P ())
2791 write_register (O7_REGNUM, DEPRECATED_CALL_DUMMY_ADDRESS () - 8);
2792 else
2793 write_register (O7_REGNUM, entry_point_address () - 8);
2794 }
2795
2796 return sp;
2797 }
2798
2799 /* Should call_function allocate stack space for a struct return? */
2800
2801 static int
2802 sparc64_use_struct_convention (int gcc_p, struct type *type)
2803 {
2804 return (TYPE_LENGTH (type) > 32);
2805 }
2806
2807 /* Store the address of the place in which to copy the structure the
2808 subroutine will return. This is called from call_function_by_hand.
2809 The ultimate mystery is, tho, what is the value "16"?
2810
2811 MVS: That's the offset from where the sp is now, to where the
2812 subroutine is gonna expect to find the struct return address. */
2813
2814 static void
2815 sparc32_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
2816 {
2817 char *val;
2818 CORE_ADDR o7;
2819
2820 val = alloca (SPARC_INTREG_SIZE);
2821 store_unsigned_integer (val, SPARC_INTREG_SIZE, addr);
2822 write_memory (sp + (16 * SPARC_INTREG_SIZE), val, SPARC_INTREG_SIZE);
2823
2824 if (CALL_DUMMY_LOCATION == AT_ENTRY_POINT)
2825 {
2826 /* Now adjust the value of the link register, which was previously
2827 stored by push_return_address. Functions that return structs are
2828 peculiar in that they return to link register + 12, rather than
2829 link register + 8. */
2830
2831 o7 = read_register (O7_REGNUM);
2832 write_register (O7_REGNUM, o7 - 4);
2833 }
2834 }
2835
2836 static void
2837 sparc64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
2838 {
2839 /* FIXME: V9 uses %o0 for this. */
2840 /* FIXME MVS: Only for small enough structs!!! */
2841
2842 target_write_memory (sp + (16 * SPARC_INTREG_SIZE),
2843 (char *) &addr, SPARC_INTREG_SIZE);
2844 #if 0
2845 if (CALL_DUMMY_LOCATION == AT_ENTRY_POINT)
2846 {
2847 /* Now adjust the value of the link register, which was previously
2848 stored by push_return_address. Functions that return structs are
2849 peculiar in that they return to link register + 12, rather than
2850 link register + 8. */
2851
2852 write_register (O7_REGNUM, read_register (O7_REGNUM) - 4);
2853 }
2854 #endif
2855 }
2856
2857 /* Default target data type for register REGNO. */
2858
2859 static struct type *
2860 sparc32_register_virtual_type (int regno)
2861 {
2862 if (regno == PC_REGNUM ||
2863 regno == DEPRECATED_FP_REGNUM ||
2864 regno == SP_REGNUM)
2865 return builtin_type_unsigned_int;
2866 if (regno < 32)
2867 return builtin_type_int;
2868 if (regno < 64)
2869 return builtin_type_float;
2870 return builtin_type_int;
2871 }
2872
2873 static struct type *
2874 sparc64_register_virtual_type (int regno)
2875 {
2876 if (regno == PC_REGNUM ||
2877 regno == DEPRECATED_FP_REGNUM ||
2878 regno == SP_REGNUM)
2879 return builtin_type_unsigned_long_long;
2880 if (regno < 32)
2881 return builtin_type_long_long;
2882 if (regno < 64)
2883 return builtin_type_float;
2884 if (regno < 80)
2885 return builtin_type_double;
2886 return builtin_type_long_long;
2887 }
2888
2889 /* Number of bytes of storage in the actual machine representation for
2890 register REGNO. */
2891
2892 static int
2893 sparc32_register_size (int regno)
2894 {
2895 return 4;
2896 }
2897
2898 static int
2899 sparc64_register_size (int regno)
2900 {
2901 return (regno < 32 ? 8 : regno < 64 ? 4 : 8);
2902 }
2903
2904 /* Index within the `registers' buffer of the first byte of the space
2905 for register REGNO. */
2906
2907 static int
2908 sparc32_register_byte (int regno)
2909 {
2910 return (regno * 4);
2911 }
2912
2913 static int
2914 sparc64_register_byte (int regno)
2915 {
2916 if (regno < 32)
2917 return regno * 8;
2918 else if (regno < 64)
2919 return 32 * 8 + (regno - 32) * 4;
2920 else if (regno < 80)
2921 return 32 * 8 + 32 * 4 + (regno - 64) * 8;
2922 else
2923 return 64 * 8 + (regno - 80) * 8;
2924 }
2925
2926 /* Immediately after a function call, return the saved pc.
2927 Can't go through the frames for this because on some machines
2928 the new frame is not set up until the new function executes
2929 some instructions. */
2930
2931 static CORE_ADDR
2932 sparc_saved_pc_after_call (struct frame_info *fi)
2933 {
2934 return sparc_pc_adjust (read_register (RP_REGNUM));
2935 }
2936
2937 /* Init saved regs: nothing to do, just a place-holder function. */
2938
2939 static void
2940 sparc_frame_init_saved_regs (struct frame_info *fi_ignored)
2941 { /* no-op */
2942 }
2943
2944 /* gdbarch fix call dummy:
2945 All this function does is rearrange the arguments before calling
2946 sparc_fix_call_dummy (which does the real work). */
2947
2948 static void
2949 sparc_gdbarch_fix_call_dummy (char *dummy,
2950 CORE_ADDR pc,
2951 CORE_ADDR fun,
2952 int nargs,
2953 struct value **args,
2954 struct type *type,
2955 int gcc_p)
2956 {
2957 if (CALL_DUMMY_LOCATION == ON_STACK)
2958 sparc_fix_call_dummy (dummy, pc, fun, type, gcc_p);
2959 }
2960
2961 /* DEPRECATED_CALL_DUMMY_ADDRESS: fetch the breakpoint address for a
2962 call dummy. */
2963
2964 static CORE_ADDR
2965 sparc_call_dummy_address (void)
2966 {
2967 return (DEPRECATED_CALL_DUMMY_START_OFFSET) + DEPRECATED_CALL_DUMMY_BREAKPOINT_OFFSET;
2968 }
2969
2970 /* Supply the Y register number to those that need it. */
2971
2972 int
2973 sparc_y_regnum (void)
2974 {
2975 return gdbarch_tdep (current_gdbarch)->y_regnum;
2976 }
2977
2978 int
2979 sparc_reg_struct_has_addr (int gcc_p, struct type *type)
2980 {
2981 if (GDB_TARGET_IS_SPARC64)
2982 return (TYPE_LENGTH (type) > 32);
2983 else
2984 return (gcc_p != 1);
2985 }
2986
2987 int
2988 sparc_intreg_size (void)
2989 {
2990 return SPARC_INTREG_SIZE;
2991 }
2992
2993 static int
2994 sparc_return_value_on_stack (struct type *type)
2995 {
2996 if (TYPE_CODE (type) == TYPE_CODE_FLT &&
2997 TYPE_LENGTH (type) > 8)
2998 return 1;
2999 else
3000 return 0;
3001 }
3002
3003 /* Get the ith function argument for the current function. */
3004 static CORE_ADDR
3005 sparc_fetch_pointer_argument (struct frame_info *frame, int argi,
3006 struct type *type)
3007 {
3008 CORE_ADDR addr;
3009 get_frame_register (frame, O0_REGNUM + argi, &addr);
3010 return addr;
3011 }
3012
3013 /*
3014 * Gdbarch "constructor" function.
3015 */
3016
3017 #define SPARC32_CALL_DUMMY_ON_STACK
3018
3019 #define SPARC_SP_REGNUM 14
3020 #define SPARC_FP_REGNUM 30
3021 #define SPARC_FP0_REGNUM 32
3022 #define SPARC32_NPC_REGNUM 69
3023 #define SPARC32_PC_REGNUM 68
3024 #define SPARC32_Y_REGNUM 64
3025 #define SPARC64_PC_REGNUM 80
3026 #define SPARC64_NPC_REGNUM 81
3027 #define SPARC64_Y_REGNUM 85
3028
3029 static struct gdbarch *
3030 sparc_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3031 {
3032 struct gdbarch *gdbarch;
3033 struct gdbarch_tdep *tdep;
3034
3035 static LONGEST call_dummy_32[] =
3036 { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,
3037 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,
3038 0xd203a048, 0x40000000, 0xd003a044, 0x01000000,
3039 0x91d02001, 0x01000000
3040 };
3041 static LONGEST call_dummy_64[] =
3042 { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,
3043 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,
3044 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,
3045 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,
3046 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,
3047 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,
3048 0xf03fa73f01000000LL, 0x0100000001000000LL,
3049 0x0100000091580000LL, 0xd027a72b93500000LL,
3050 0xd027a72791480000LL, 0xd027a72391400000LL,
3051 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,
3052 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,
3053 0x0100000091d02001LL, 0x0100000001000000LL
3054 };
3055 static LONGEST call_dummy_nil[] = {0};
3056
3057 /* Try to determine the OS ABI of the object we are loading. */
3058
3059 if (info.abfd != NULL
3060 && info.osabi == GDB_OSABI_UNKNOWN)
3061 {
3062 /* If it's an ELF file, assume it's Solaris. */
3063 if (bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
3064 info.osabi = GDB_OSABI_SOLARIS;
3065 }
3066
3067 /* First see if there is already a gdbarch that can satisfy the request. */
3068 arches = gdbarch_list_lookup_by_info (arches, &info);
3069 if (arches != NULL)
3070 return arches->gdbarch;
3071
3072 /* None found: is the request for a sparc architecture? */
3073 if (info.bfd_arch_info->arch != bfd_arch_sparc)
3074 return NULL; /* No; then it's not for us. */
3075
3076 /* Yes: create a new gdbarch for the specified machine type. */
3077 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
3078 gdbarch = gdbarch_alloc (&info, tdep);
3079
3080 /* First set settings that are common for all sparc architectures. */
3081 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
3082 set_gdbarch_breakpoint_from_pc (gdbarch, sparc_breakpoint_from_pc);
3083 set_gdbarch_decr_pc_after_break (gdbarch, 0);
3084 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
3085 set_gdbarch_extract_struct_value_address (gdbarch,
3086 sparc_extract_struct_value_address);
3087 set_gdbarch_deprecated_fix_call_dummy (gdbarch, sparc_gdbarch_fix_call_dummy);
3088 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
3089 set_gdbarch_deprecated_fp_regnum (gdbarch, SPARC_FP_REGNUM);
3090 set_gdbarch_fp0_regnum (gdbarch, SPARC_FP0_REGNUM);
3091 set_gdbarch_deprecated_frame_chain (gdbarch, sparc_frame_chain);
3092 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, sparc_frame_init_saved_regs);
3093 set_gdbarch_deprecated_frame_saved_pc (gdbarch, sparc_frame_saved_pc);
3094 set_gdbarch_frameless_function_invocation (gdbarch,
3095 frameless_look_for_prologue);
3096 set_gdbarch_deprecated_get_saved_register (gdbarch, sparc_get_saved_register);
3097 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, sparc_init_extra_frame_info);
3098 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
3099 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
3100 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
3101 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
3102 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 8);
3103 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 8);
3104 set_gdbarch_deprecated_pop_frame (gdbarch, sparc_pop_frame);
3105 set_gdbarch_deprecated_push_return_address (gdbarch, sparc_push_return_address);
3106 set_gdbarch_deprecated_push_dummy_frame (gdbarch, sparc_push_dummy_frame);
3107 set_gdbarch_deprecated_reg_struct_has_addr
3108 (gdbarch, sparc_reg_struct_has_addr);
3109 set_gdbarch_return_value_on_stack (gdbarch, sparc_return_value_on_stack);
3110 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, sparc_saved_pc_after_call);
3111 set_gdbarch_prologue_frameless_p (gdbarch, sparc_prologue_frameless_p);
3112 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
3113 set_gdbarch_skip_prologue (gdbarch, sparc_skip_prologue);
3114 set_gdbarch_sp_regnum (gdbarch, SPARC_SP_REGNUM);
3115 set_gdbarch_deprecated_use_generic_dummy_frames (gdbarch, 0);
3116 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
3117
3118 /* Helper for function argument information. */
3119 set_gdbarch_fetch_pointer_argument (gdbarch, sparc_fetch_pointer_argument);
3120
3121 /*
3122 * Settings that depend only on 32/64 bit word size
3123 */
3124
3125 switch (info.bfd_arch_info->mach)
3126 {
3127 case bfd_mach_sparc:
3128 case bfd_mach_sparc_v8plus:
3129 case bfd_mach_sparc_v8plusa:
3130 /* 32-bit machine types: */
3131
3132 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3133 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_on_stack);
3134 set_gdbarch_deprecated_call_dummy_address (gdbarch, sparc_call_dummy_address);
3135 set_gdbarch_deprecated_call_dummy_breakpoint_offset (gdbarch, 0x30);
3136 set_gdbarch_deprecated_call_dummy_length (gdbarch, 0x38);
3137
3138 /* NOTE: cagney/2003-05-01: Using the just added push_dummy_code
3139 architecture method, it is now possible to implement a
3140 generic dummy frames based inferior function call that stores
3141 the breakpoint (and struct info) on the stack. Further, by
3142 treating a SIGSEG at a breakpoint as equivalent to a SIGTRAP
3143 it is even possible to make this work when the stack is
3144 no-execute.
3145
3146 NOTE: cagney/2002-04-26: Based from info posted by Peter
3147 Schauer around Oct '99. Briefly, due to aspects of the SPARC
3148 ABI, it isn't possible to use ON_STACK with a strictly
3149 compliant compiler.
3150
3151 Peter Schauer writes ...
3152
3153 No, any call from GDB to a user function returning a
3154 struct/union will fail miserably. Try this:
3155
3156 *NOINDENT*
3157 struct x
3158 {
3159 int a[4];
3160 };
3161
3162 struct x gx;
3163
3164 struct x
3165 sret ()
3166 {
3167 return gx;
3168 }
3169
3170 main ()
3171 {
3172 int i;
3173 for (i = 0; i < 4; i++)
3174 gx.a[i] = i + 1;
3175 gx = sret ();
3176 }
3177 *INDENT*
3178
3179 Set a breakpoint at the gx = sret () statement, run to it and
3180 issue a `print sret()'. It will not succed with your
3181 approach, and I doubt that continuing the program will work
3182 as well.
3183
3184 For details of the ABI see the Sparc Architecture Manual. I
3185 have Version 8 (Prentice Hall ISBN 0-13-825001-4) and the
3186 calling conventions for functions returning aggregate values
3187 are explained in Appendix D.3. */
3188
3189 set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
3190 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_32);
3191 #else
3192 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
3193 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_nil);
3194 #endif
3195 set_gdbarch_deprecated_call_dummy_stack_adjust (gdbarch, 68);
3196 set_gdbarch_frame_args_skip (gdbarch, 68);
3197 set_gdbarch_function_start_offset (gdbarch, 0);
3198 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
3199 set_gdbarch_deprecated_npc_regnum (gdbarch, SPARC32_NPC_REGNUM);
3200 set_gdbarch_pc_regnum (gdbarch, SPARC32_PC_REGNUM);
3201 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
3202 set_gdbarch_deprecated_push_arguments (gdbarch, sparc32_push_arguments);
3203
3204 set_gdbarch_deprecated_register_byte (gdbarch, sparc32_register_byte);
3205 set_gdbarch_deprecated_register_raw_size (gdbarch, sparc32_register_size);
3206 set_gdbarch_deprecated_register_size (gdbarch, 4);
3207 set_gdbarch_deprecated_register_virtual_size (gdbarch, sparc32_register_size);
3208 set_gdbarch_deprecated_register_virtual_type (gdbarch, sparc32_register_virtual_type);
3209 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3210 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (call_dummy_32));
3211 #else
3212 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0);
3213 #endif
3214 set_gdbarch_deprecated_stack_align (gdbarch, sparc32_stack_align);
3215 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch, 1);
3216 set_gdbarch_deprecated_store_struct_return (gdbarch, sparc32_store_struct_return);
3217 set_gdbarch_use_struct_convention (gdbarch,
3218 generic_use_struct_convention);
3219 set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
3220 tdep->y_regnum = SPARC32_Y_REGNUM;
3221 tdep->fp_max_regnum = SPARC_FP0_REGNUM + 32;
3222 tdep->intreg_size = 4;
3223 tdep->reg_save_offset = 0x60;
3224 tdep->call_dummy_call_offset = 0x24;
3225 break;
3226
3227 case bfd_mach_sparc_v9:
3228 case bfd_mach_sparc_v9a:
3229 /* 64-bit machine types: */
3230 default: /* Any new machine type is likely to be 64-bit. */
3231
3232 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3233 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_on_stack);
3234 set_gdbarch_deprecated_call_dummy_address (gdbarch, sparc_call_dummy_address);
3235 set_gdbarch_deprecated_call_dummy_breakpoint_offset (gdbarch, 8 * 4);
3236 set_gdbarch_deprecated_call_dummy_length (gdbarch, 192);
3237 set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
3238 set_gdbarch_deprecated_call_dummy_start_offset (gdbarch, 148);
3239 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_64);
3240 #else
3241 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
3242 set_gdbarch_deprecated_call_dummy_words (gdbarch, call_dummy_nil);
3243 #endif
3244 set_gdbarch_deprecated_call_dummy_stack_adjust (gdbarch, 128);
3245 set_gdbarch_frame_args_skip (gdbarch, 136);
3246 set_gdbarch_function_start_offset (gdbarch, 0);
3247 set_gdbarch_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
3248 set_gdbarch_deprecated_npc_regnum (gdbarch, SPARC64_NPC_REGNUM);
3249 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM);
3250 set_gdbarch_ptr_bit (gdbarch, 8 * TARGET_CHAR_BIT);
3251 set_gdbarch_deprecated_push_arguments (gdbarch, sparc64_push_arguments);
3252 /* NOTE different for at_entry */
3253 set_gdbarch_deprecated_target_read_fp (gdbarch, sparc64_read_fp);
3254 set_gdbarch_read_sp (gdbarch, sparc64_read_sp);
3255 /* Some of the registers aren't 64 bits, but it's a lot simpler just
3256 to assume they all are (since most of them are). */
3257 set_gdbarch_deprecated_register_byte (gdbarch, sparc64_register_byte);
3258 set_gdbarch_deprecated_register_raw_size (gdbarch, sparc64_register_size);
3259 set_gdbarch_deprecated_register_size (gdbarch, 8);
3260 set_gdbarch_deprecated_register_virtual_size (gdbarch, sparc64_register_size);
3261 set_gdbarch_deprecated_register_virtual_type (gdbarch, sparc64_register_virtual_type);
3262 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3263 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (call_dummy_64));
3264 #else
3265 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0);
3266 #endif
3267 set_gdbarch_deprecated_stack_align (gdbarch, sparc64_stack_align);
3268 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch, 1);
3269 set_gdbarch_deprecated_store_struct_return (gdbarch, sparc64_store_struct_return);
3270 set_gdbarch_use_struct_convention (gdbarch,
3271 sparc64_use_struct_convention);
3272 set_gdbarch_deprecated_dummy_write_sp (gdbarch, sparc64_write_sp);
3273 tdep->y_regnum = SPARC64_Y_REGNUM;
3274 tdep->fp_max_regnum = SPARC_FP0_REGNUM + 48;
3275 tdep->intreg_size = 8;
3276 tdep->reg_save_offset = 0x90;
3277 tdep->call_dummy_call_offset = 148 + 4 * 5;
3278 break;
3279 }
3280
3281 /*
3282 * Settings that vary per-architecture:
3283 */
3284
3285 switch (info.bfd_arch_info->mach)
3286 {
3287 case bfd_mach_sparc:
3288 set_gdbarch_extract_return_value (gdbarch, sparc32_extract_return_value);
3289 set_gdbarch_store_return_value (gdbarch, sparc32_store_return_value);
3290 set_gdbarch_num_regs (gdbarch, 72);
3291 set_gdbarch_deprecated_register_bytes (gdbarch, 32*4 + 32*4 + 8*4);
3292 set_gdbarch_register_name (gdbarch, sparc32_register_name);
3293 tdep->fp_register_bytes = 32 * 4;
3294 tdep->print_insn_mach = bfd_mach_sparc;
3295 break;
3296 case bfd_mach_sparc_v8plus:
3297 set_gdbarch_extract_return_value (gdbarch, sparc32_extract_return_value);
3298 set_gdbarch_store_return_value (gdbarch, sparc32_store_return_value);
3299 set_gdbarch_num_regs (gdbarch, 72);
3300 set_gdbarch_deprecated_register_bytes (gdbarch, 32*4 + 32*4 + 8*4);
3301 set_gdbarch_register_name (gdbarch, sparc32_register_name);
3302 tdep->print_insn_mach = bfd_mach_sparc;
3303 tdep->fp_register_bytes = 32 * 4;
3304 break;
3305 case bfd_mach_sparc_v8plusa:
3306 set_gdbarch_extract_return_value (gdbarch, sparc32_extract_return_value);
3307 set_gdbarch_store_return_value (gdbarch, sparc32_store_return_value);
3308 set_gdbarch_num_regs (gdbarch, 72);
3309 set_gdbarch_deprecated_register_bytes (gdbarch, 32*4 + 32*4 + 8*4);
3310 set_gdbarch_register_name (gdbarch, sparc32_register_name);
3311 tdep->fp_register_bytes = 32 * 4;
3312 tdep->print_insn_mach = bfd_mach_sparc;
3313 break;
3314 case bfd_mach_sparc_v9:
3315 set_gdbarch_deprecated_extract_return_value (gdbarch, sparc64_extract_return_value);
3316 set_gdbarch_num_regs (gdbarch, 125);
3317 set_gdbarch_deprecated_register_bytes (gdbarch, 32*8 + 32*8 + 45*8);
3318 set_gdbarch_register_name (gdbarch, sparc64_register_name);
3319 set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3320 tdep->fp_register_bytes = 64 * 4;
3321 tdep->print_insn_mach = bfd_mach_sparc_v9a;
3322 break;
3323 case bfd_mach_sparc_v9a:
3324 set_gdbarch_deprecated_extract_return_value (gdbarch, sparc64_extract_return_value);
3325 set_gdbarch_num_regs (gdbarch, 125);
3326 set_gdbarch_deprecated_register_bytes (gdbarch, 32*8 + 32*8 + 45*8);
3327 set_gdbarch_register_name (gdbarch, sparc64_register_name);
3328 set_gdbarch_deprecated_store_return_value (gdbarch, sparc_store_return_value);
3329 tdep->fp_register_bytes = 64 * 4;
3330 tdep->print_insn_mach = bfd_mach_sparc_v9a;
3331 break;
3332 }
3333
3334 set_gdbarch_print_insn (gdbarch, print_insn_sparc);
3335
3336 /* Hook in OS ABI-specific overrides, if they have been registered. */
3337 gdbarch_init_osabi (info, gdbarch);
3338
3339 return gdbarch;
3340 }
3341
3342 static void
3343 sparc_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
3344 {
3345 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
3346
3347 if (tdep == NULL)
3348 return;
3349
3350 fprintf_unfiltered (file, "sparc_dump_tdep: fp_register_bytes = %d\n",
3351 tdep->fp_register_bytes);
3352 fprintf_unfiltered (file, "sparc_dump_tdep: y_regnum = %d\n",
3353 tdep->y_regnum);
3354 fprintf_unfiltered (file, "sparc_dump_tdep: fp_max_regnum = %d\n",
3355 tdep->fp_max_regnum);
3356 fprintf_unfiltered (file, "sparc_dump_tdep: intreg_size = %d\n",
3357 tdep->intreg_size);
3358 fprintf_unfiltered (file, "sparc_dump_tdep: reg_save_offset = %d\n",
3359 tdep->reg_save_offset);
3360 fprintf_unfiltered (file, "sparc_dump_tdep: call_dummy_call_offset = %d\n",
3361 tdep->call_dummy_call_offset);
3362 fprintf_unfiltered (file, "sparc_dump_tdep: print_insn_match = %d\n",
3363 tdep->print_insn_mach);
3364 }
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