1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "ieee-float.h"
27 #include "symfile.h" /* for objfiles.h */
28 #include "objfiles.h" /* for find_pc_section */
31 #include <sys/procfs.h>
37 extern int stop_after_trap
;
39 /* We don't store all registers immediately when requested, since they
40 get sent over in large chunks anyway. Instead, we accumulate most
41 of the changes and send them over once. "deferred_stores" keeps
42 track of which sets of registers we have locally-changed copies of,
43 so we only need send the groups that have changed. */
45 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
49 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
52 /* Simulate single-step ptrace call for sun4. Code written by Gary
53 Beihl (beihl@mcc.com). */
55 /* npc4 and next_pc describe the situation at the time that the
56 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
57 static CORE_ADDR next_pc
, npc4
, target
;
58 static int brknpc4
, brktrg
;
59 typedef char binsn_quantum
[BREAKPOINT_MAX
];
60 static binsn_quantum break_mem
[3];
62 /* Non-zero if we just simulated a single-step ptrace call. This is
63 needed because we cannot remove the breakpoints in the inferior
64 process until after the `wait' in `wait_for_inferior'. Used for
69 /* single_step() is called just before we want to resume the inferior,
70 if we want to single-step it but there is no hardware or kernel single-step
71 support (as on all SPARCs). We find all the possible targets of the
72 coming instruction and breakpoint them.
74 single_step is also called just after the inferior stops. If we had
75 set up a simulated single-step, we undo our damage. */
79 int ignore
; /* pid, but we don't need it */
81 branch_type br
, isannulled();
87 /* Always set breakpoint for NPC. */
88 next_pc
= read_register (NPC_REGNUM
);
89 npc4
= next_pc
+ 4; /* branch not taken */
91 target_insert_breakpoint (next_pc
, break_mem
[0]);
92 /* printf_unfiltered ("set break at %x\n",next_pc); */
94 pc
= read_register (PC_REGNUM
);
95 pc_instruction
= read_memory_integer (pc
, sizeof(pc_instruction
));
96 br
= isannulled (pc_instruction
, pc
, &target
);
101 /* Conditional annulled branch will either end up at
102 npc (if taken) or at npc+4 (if not taken).
105 target_insert_breakpoint (npc4
, break_mem
[1]);
107 else if (br
== baa
&& target
!= next_pc
)
109 /* Unconditional annulled branch will always end up at
112 target_insert_breakpoint (target
, break_mem
[2]);
115 /* We are ready to let it go */
121 /* Remove breakpoints */
122 target_remove_breakpoint (next_pc
, break_mem
[0]);
125 target_remove_breakpoint (npc4
, break_mem
[1]);
128 target_remove_breakpoint (target
, break_mem
[2]);
134 #define FRAME_SAVED_L0 0 /* Byte offset from SP */
135 #define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (0)) /* Byte offset from SP */
138 sparc_frame_chain (thisframe
)
141 char buf
[MAX_REGISTER_RAW_SIZE
];
145 addr
= thisframe
->frame
+ FRAME_SAVED_I0
+
146 REGISTER_RAW_SIZE (FP_REGNUM
) * (FP_REGNUM
- I0_REGNUM
);
147 err
= target_read_memory (addr
, buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
150 return extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
154 sparc_extract_struct_value_address (regbuf
)
155 char regbuf
[REGISTER_BYTES
];
157 return read_memory_integer (((int *)(regbuf
))[SP_REGNUM
]+(16*4),
158 TARGET_PTR_BIT
/ TARGET_CHAR_BIT
);
161 /* Find the pc saved in frame FRAME. */
164 frame_saved_pc (frame
)
167 char buf
[MAX_REGISTER_RAW_SIZE
];
170 addr
= (frame
->bottom
+ FRAME_SAVED_I0
+
171 REGISTER_RAW_SIZE (I7_REGNUM
) * (I7_REGNUM
- I0_REGNUM
));
172 read_memory (addr
, buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
173 return PC_ADJUST (extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
)));
177 * Since an individual frame in the frame cache is defined by two
178 * arguments (a frame pointer and a stack pointer), we need two
179 * arguments to get info for an arbitrary stack frame. This routine
180 * takes two arguments and makes the cached frames look as if these
181 * two arguments defined a frame on the cache. This allows the rest
182 * of info frame to extract the important arguments without
186 setup_arbitrary_frame (argc
, argv
)
193 error ("Sparc frame specifications require two arguments: fp and sp");
195 fid
= create_new_frame (argv
[0], 0);
198 fatal ("internal: create_new_frame returned invalid frame id");
200 fid
->bottom
= argv
[1];
201 fid
->pc
= FRAME_SAVED_PC (fid
);
205 /* Given a pc value, skip it forward past the function prologue by
206 disassembling instructions that appear to be a prologue.
208 If FRAMELESS_P is set, we are only testing to see if the function
209 is frameless. This allows a quicker answer.
211 This routine should be more specific in its actions; making sure
212 that it uses the same register in the initial prologue section. */
214 skip_prologue (start_pc
, frameless_p
)
220 unsigned long int code
;
226 unsigned int imm22
:22;
235 unsigned int simm13
:13;
240 CORE_ADDR pc
= start_pc
;
242 x
.i
= read_memory_integer (pc
, 4);
244 /* Recognize the `sethi' insn and record its destination. */
245 if (x
.sethi
.op
== 0 && x
.sethi
.op2
== 4)
249 x
.i
= read_memory_integer (pc
, 4);
252 /* Recognize an add immediate value to register to either %g1 or
253 the destination register recorded above. Actually, this might
254 well recognize several different arithmetic operations.
255 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
256 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
257 I imagine any compiler really does that, however). */
258 if (x
.add
.op
== 2 && x
.add
.i
&& (x
.add
.rd
== 1 || x
.add
.rd
== dest
))
261 x
.i
= read_memory_integer (pc
, 4);
264 /* This recognizes any SAVE insn. But why do the XOR and then
265 the compare? That's identical to comparing against 60 (as long
266 as there isn't any sign extension). */
267 if (x
.add
.op
== 2 && (x
.add
.op3
^ 32) == 28)
270 if (frameless_p
) /* If the save is all we care about, */
271 return pc
; /* return before doing more work */
272 x
.i
= read_memory_integer (pc
, 4);
276 /* Without a save instruction, it's not a prologue. */
280 /* Now we need to recognize stores into the frame from the input
281 registers. This recognizes all non alternate stores of input
282 register, into a location offset from the frame pointer. */
284 && (x
.add
.op3
& 0x3c) == 4 /* Store, non-alternate. */
285 && (x
.add
.rd
& 0x18) == 0x18 /* Input register. */
286 && x
.add
.i
/* Immediate mode. */
287 && x
.add
.rs1
== 30 /* Off of frame pointer. */
288 /* Into reserved stack space. */
289 && x
.add
.simm13
>= 0x44
290 && x
.add
.simm13
< 0x5b)
293 x
.i
= read_memory_integer (pc
, 4);
298 /* Check instruction at ADDR to see if it is an annulled branch.
299 All other instructions will go to NPC or will trap.
300 Set *TARGET if we find a canidate branch; set to zero if not. */
303 isannulled (instruction
, addr
, target
)
305 CORE_ADDR addr
, *target
;
307 branch_type val
= not_branch
;
308 long int offset
; /* Must be signed for sign-extend. */
311 unsigned long int code
;
318 unsigned int disp22
:22;
323 insn
.code
= instruction
;
326 && (insn
.b
.op2
== 2 || insn
.b
.op2
== 6 || insn
.b
.op2
== 7))
328 if (insn
.b
.cond
== 8)
329 val
= insn
.b
.a
? baa
: ba
;
331 val
= insn
.b
.a
? bicca
: bicc
;
332 offset
= 4 * ((int) (insn
.b
.disp22
<< 10) >> 10);
333 *target
= addr
+ offset
;
339 /* sparc_frame_find_saved_regs ()
341 Stores, into a struct frame_saved_regs,
342 the addresses of the saved registers of frame described by FRAME_INFO.
343 This includes special registers such as pc and fp saved in special
344 ways in the stack frame. sp is even more special:
345 the address we return for it IS the sp for the next frame.
347 Note that on register window machines, we are currently making the
348 assumption that window registers are being saved somewhere in the
349 frame in which they are being used. If they are stored in an
350 inferior frame, find_saved_register will break.
352 On the Sun 4, the only time all registers are saved is when
353 a dummy frame is involved. Otherwise, the only saved registers
354 are the LOCAL and IN registers which are saved as a result
355 of the "save/restore" opcodes. This condition is determined
356 by address rather than by value.
358 The "pc" is not stored in a frame on the SPARC. (What is stored
359 is a return address minus 8.) sparc_pop_frame knows how to
360 deal with that. Other routines might or might not.
362 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
363 about how this works. */
366 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
367 struct frame_info
*fi
;
368 struct frame_saved_regs
*saved_regs_addr
;
371 FRAME_ADDR frame
= FRAME_FP(fi
);
372 FRAME fid
= FRAME_INFO_ID (fi
);
375 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
377 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
379 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
380 read_register (SP_REGNUM
))
381 && fi
->pc
<= FRAME_FP(fi
))
383 /* Dummy frame. All but the window regs are in there somewhere. */
384 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
385 saved_regs_addr
->regs
[regnum
] =
386 frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
387 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
388 saved_regs_addr
->regs
[regnum
] =
389 frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
390 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
391 saved_regs_addr
->regs
[regnum
] =
392 frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
393 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
394 saved_regs_addr
->regs
[regnum
] =
395 frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
397 fi
->bottom
: read_register (SP_REGNUM
);
401 /* Normal frame. Just Local and In registers */
403 fi
->bottom
: read_register (SP_REGNUM
);
404 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+16; regnum
++)
405 saved_regs_addr
->regs
[regnum
] = frame
+ (regnum
-L0_REGNUM
) * 4;
409 /* Pull off either the next frame pointer or the stack pointer */
410 FRAME_ADDR next_next_frame
=
413 read_register (SP_REGNUM
));
414 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
415 saved_regs_addr
->regs
[regnum
] = next_next_frame
+ regnum
* 4;
417 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
418 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
421 /* Push an empty stack frame, and record in it the current PC, regs, etc.
423 We save the non-windowed registers and the ins. The locals and outs
424 are new; they don't need to be saved. The i's and l's of
425 the last frame were already saved on the stack. */
427 /* Definitely see tm-sparc.h for more doc of the frame format here. */
430 sparc_push_dummy_frame ()
432 CORE_ADDR sp
, old_sp
;
433 char register_temp
[0x140];
435 old_sp
= sp
= read_register (SP_REGNUM
);
437 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
438 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), ®ister_temp
[0],
439 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
441 read_register_bytes (REGISTER_BYTE (O0_REGNUM
), ®ister_temp
[8 * 4],
442 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
444 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), ®ister_temp
[16 * 4],
445 REGISTER_RAW_SIZE (G0_REGNUM
) * 8);
447 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), ®ister_temp
[24 * 4],
448 REGISTER_RAW_SIZE (FP0_REGNUM
) * 32);
452 write_register (SP_REGNUM
, sp
);
454 write_memory (sp
+ 0x60, ®ister_temp
[0], (8 + 8 + 8 + 32) * 4);
456 write_register (FP_REGNUM
, old_sp
);
458 /* Set return address register for the call dummy to the current PC. */
459 write_register (I7_REGNUM
, read_pc() - 8);
462 /* Discard from the stack the innermost frame, restoring all saved registers.
464 Note that the values stored in fsr by get_frame_saved_regs are *in
465 the context of the called frame*. What this means is that the i
466 regs of fsr must be restored into the o regs of the (calling) frame that
467 we pop into. We don't care about the output regs of the calling frame,
468 since unless it's a dummy frame, it won't have any output regs in it.
470 We never have to bother with %l (local) regs, since the called routine's
471 locals get tossed, and the calling routine's locals are already saved
474 /* Definitely see tm-sparc.h for more doc of the frame format here. */
479 register FRAME frame
= get_current_frame ();
480 register CORE_ADDR pc
;
481 struct frame_saved_regs fsr
;
482 struct frame_info
*fi
;
483 char raw_buffer
[REGISTER_BYTES
];
485 fi
= get_frame_info (frame
);
486 get_frame_saved_regs (fi
, &fsr
);
487 if (fsr
.regs
[FP0_REGNUM
])
489 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
490 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
492 if (fsr
.regs
[FPS_REGNUM
])
494 read_memory (fsr
.regs
[FPS_REGNUM
], raw_buffer
, 4);
495 write_register_bytes (REGISTER_BYTE (FPS_REGNUM
), raw_buffer
, 4);
497 if (fsr
.regs
[CPS_REGNUM
])
499 read_memory (fsr
.regs
[CPS_REGNUM
], raw_buffer
, 4);
500 write_register_bytes (REGISTER_BYTE (CPS_REGNUM
), raw_buffer
, 4);
502 if (fsr
.regs
[G1_REGNUM
])
504 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
505 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
507 if (fsr
.regs
[I0_REGNUM
])
511 char reg_temp
[REGISTER_BYTES
];
513 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
515 /* Get the ins and locals which we are about to restore. Just
516 moving the stack pointer is all that is really needed, except
517 store_inferior_registers is then going to write the ins and
518 locals from the registers array, so we need to muck with the
520 sp
= fsr
.regs
[SP_REGNUM
];
521 read_memory (sp
, reg_temp
, REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
523 /* Restore the out registers.
524 Among other things this writes the new stack pointer. */
525 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
526 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
528 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
529 REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
531 if (fsr
.regs
[PS_REGNUM
])
532 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
533 if (fsr
.regs
[Y_REGNUM
])
534 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
535 if (fsr
.regs
[PC_REGNUM
])
537 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
538 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
539 if (fsr
.regs
[NPC_REGNUM
])
540 write_register (NPC_REGNUM
,
541 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
543 else if (fsr
.regs
[I7_REGNUM
])
545 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
546 pc
= PC_ADJUST (read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
547 write_register (PC_REGNUM
, pc
);
548 write_register (NPC_REGNUM
, pc
+ 4);
550 flush_cached_frames ();
551 set_current_frame ( create_new_frame (read_register (FP_REGNUM
),
555 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
556 encodes the structure size being returned. If we detect such
557 a fake insn, step past it. */
567 err
= target_read_memory (pc
+ 8, buf
, sizeof(long));
568 insn
= extract_unsigned_integer (buf
, 4);
569 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
576 /* Structure of SPARC extended floating point numbers.
577 This information is not currently used by GDB, since no current SPARC
578 implementations support extended float. */
580 const struct ext_format ext_format_sparc
= {
581 /* tot sbyte smask expbyte manbyte */
582 16, 0, 0x80, 0,1, 4,8, /* sparc */
585 #ifdef USE_PROC_FS /* Target dependent support for /proc */
587 /* The /proc interface divides the target machine's register set up into
588 two different sets, the general register set (gregset) and the floating
589 point register set (fpregset). For each set, there is an ioctl to get
590 the current register set and another ioctl to set the current values.
592 The actual structure passed through the ioctl interface is, of course,
593 naturally machine dependent, and is different for each set of registers.
594 For the sparc for example, the general register set is typically defined
597 typedef int gregset_t[38];
603 and the floating point set by:
605 typedef struct prfpregset {
613 u_char pr_q_entrysize;
618 These routines provide the packing and unpacking of gregset_t and
619 fpregset_t formatted data.
624 /* Given a pointer to a general register set in /proc format (gregset_t *),
625 unpack the register contents and supply them as gdb's idea of the current
629 supply_gregset (gregsetp
)
630 prgregset_t
*gregsetp
;
633 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
635 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
636 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
638 supply_register (regi
, (char *) (regp
+ regi
));
641 /* These require a bit more care. */
642 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
643 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
644 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
645 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
649 fill_gregset (gregsetp
, regno
)
650 prgregset_t
*gregsetp
;
654 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
655 extern char registers
[];
657 for (regi
= 0 ; regi
<= R_I7
; regi
++)
659 if ((regno
== -1) || (regno
== regi
))
661 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
664 if ((regno
== -1) || (regno
== PS_REGNUM
))
666 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
668 if ((regno
== -1) || (regno
== PC_REGNUM
))
670 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
672 if ((regno
== -1) || (regno
== NPC_REGNUM
))
674 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
676 if ((regno
== -1) || (regno
== Y_REGNUM
))
678 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
682 #if defined (FP0_REGNUM)
684 /* Given a pointer to a floating point register set in /proc format
685 (fpregset_t *), unpack the register contents and supply them as gdb's
686 idea of the current floating point register values. */
689 supply_fpregset (fpregsetp
)
690 prfpregset_t
*fpregsetp
;
695 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
697 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
698 supply_register (regi
, from
);
700 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
703 /* Given a pointer to a floating point register set in /proc format
704 (fpregset_t *), update the register specified by REGNO from gdb's idea
705 of the current floating point register set. If REGNO is -1, update
709 fill_fpregset (fpregsetp
, regno
)
710 prfpregset_t
*fpregsetp
;
716 extern char registers
[];
718 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
720 if ((regno
== -1) || (regno
== regi
))
722 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
723 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
724 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
727 if ((regno
== -1) || (regno
== FPS_REGNUM
))
729 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
733 #endif /* defined (FP0_REGNUM) */
735 #endif /* USE_PROC_FS */
738 #ifdef GET_LONGJMP_TARGET
740 /* Figure out where the longjmp will land. We expect that we have just entered
741 longjmp and haven't yet setup the stack frame, so the args are still in the
742 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
743 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
744 This routine returns true on success */
747 get_longjmp_target(pc
)
751 #define LONGJMP_TARGET_SIZE 4
752 char buf
[LONGJMP_TARGET_SIZE
];
754 jb_addr
= read_register(O0_REGNUM
);
756 if (target_read_memory(jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
757 LONGJMP_TARGET_SIZE
))
760 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
764 #endif /* GET_LONGJMP_TARGET */
766 /* So far used only for sparc solaris. In sparc solaris, we recognize
767 a trampoline by it's section name. That is, if the pc is in a
768 section named ".plt" then we are in a trampline. */
771 in_solib_trampoline(pc
, name
)
775 struct obj_section
*s
;
778 s
= find_pc_section(pc
);
781 && s
->sec_ptr
->name
!= NULL
782 && STREQ (s
->sec_ptr
->name
, ".plt"));