1 /* Target-dependent code for SPARC.
3 Copyright 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 #include "arch-utils.h"
25 #include "floatformat.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
39 #include "gdb_assert.h"
40 #include "gdb_string.h"
42 #include "sparc-tdep.h"
46 /* This file implements the SPARC 32-bit ABI as defined by the section
47 "Low-Level System Information" of the SPARC Compliance Definition
48 (SCD) 2.4.1, which is the 32-bit System V psABI for SPARC. The SCD
49 lists changes with respect to the original 32-bit psABI as defined
50 in the "System V ABI, SPARC Processor Supplement".
52 Note that if we talk about SunOS, we mean SunOS 4.x, which was
53 BSD-based, which is sometimes (retroactively?) referred to as
54 Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
55 above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
56 suffering from severe version number inflation). Solaris 2.x is
57 also known as SunOS 5.x, since that's what uname(1) says. Solaris
60 /* Please use the sparc32_-prefix for 32-bit specific code, the
61 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
62 code that can handle both. The 64-bit specific code lives in
63 sparc64-tdep.c; don't add any here. */
65 /* The SPARC Floating-Point Quad-Precision format is similar to
66 big-endian IA-64 Quad-recision format. */
67 #define floatformat_sparc_quad floatformat_ia64_quad_big
69 /* The stack pointer is offset from the stack frame by a BIAS of 2047
70 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
71 hosts, so undefine it first. */
75 /* Macros to extract fields from SPARC instructions. */
76 #define X_OP(i) (((i) >> 30) & 0x3)
77 #define X_RD(i) (((i) >> 25) & 0x1f)
78 #define X_A(i) (((i) >> 29) & 1)
79 #define X_COND(i) (((i) >> 25) & 0xf)
80 #define X_OP2(i) (((i) >> 22) & 0x7)
81 #define X_IMM22(i) ((i) & 0x3fffff)
82 #define X_OP3(i) (((i) >> 19) & 0x3f)
83 #define X_RS1(i) (((i) >> 14) & 0x1f)
84 #define X_I(i) (((i) >> 13) & 1)
85 /* Sign extension macros. */
86 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
87 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
88 #define X_SIMM13(i) ((((i) & 0x1fff) ^ 0x1000) - 0x1000)
90 /* Fetch the instruction at PC. Instructions are always big-endian
91 even if the processor operates in little-endian mode. */
94 sparc_fetch_instruction (CORE_ADDR pc
)
100 /* If we can't read the instruction at PC, return zero. */
101 if (target_read_memory (pc
, buf
, sizeof (buf
)))
105 for (i
= 0; i
< sizeof (buf
); i
++)
106 insn
= (insn
<< 8) | buf
[i
];
111 /* Return non-zero if the instruction corresponding to PC is an "unimp"
115 sparc_is_unimp_insn (CORE_ADDR pc
)
117 const unsigned long insn
= sparc_fetch_instruction (pc
);
119 return ((insn
& 0xc1c00000) == 0);
122 /* OpenBSD/sparc includes StackGhost, which according to the author's
123 website http://stackghost.cerias.purdue.edu "... transparently and
124 automatically protects applications' stack frames; more
125 specifically, it guards the return pointers. The protection
126 mechanisms require no application source or binary modification and
127 imposes only a negligible performance penalty."
129 The same website provides the following description of how
132 "StackGhost interfaces with the kernel trap handler that would
133 normally write out registers to the stack and the handler that
134 would read them back in. By XORing a cookie into the
135 return-address saved in the user stack when it is actually written
136 to the stack, and then XOR it out when the return-address is pulled
137 from the stack, StackGhost can cause attacker corrupted return
138 pointers to behave in a manner the attacker cannot predict.
139 StackGhost can also use several unused bits in the return pointer
140 to detect a smashed return pointer and abort the process."
142 For GDB this means that whenever we're reading %i7 from a stack
143 frame's window save area, we'll have to XOR the cookie.
145 More information on StackGuard can be found on in:
147 Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
148 Stack Protection." 2001. Published in USENIX Security Symposium
151 /* Fetch StackGhost Per-Process XOR cookie. */
154 sparc_fetch_wcookie (void)
156 struct target_ops
*ops
= ¤t_target
;
160 len
= target_read_partial (ops
, TARGET_OBJECT_WCOOKIE
, NULL
, buf
, 0, 8);
164 /* We should have either an 32-bit or an 64-bit cookie. */
165 gdb_assert (len
== 4 || len
== 8);
167 return extract_unsigned_integer (buf
, len
);
171 /* Return the contents if register REGNUM as an address. */
174 sparc_address_from_register (int regnum
)
178 regcache_cooked_read_unsigned (current_regcache
, regnum
, &addr
);
183 /* The functions on this page are intended to be used to classify
184 function arguments. */
186 /* Check whether TYPE is "Integral or Pointer". */
189 sparc_integral_or_pointer_p (const struct type
*type
)
191 switch (TYPE_CODE (type
))
197 case TYPE_CODE_RANGE
:
199 /* We have byte, half-word, word and extended-word/doubleword
200 integral types. The doubleword is an extension to the
201 original 32-bit ABI by the SCD 2.4.x. */
202 int len
= TYPE_LENGTH (type
);
203 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
209 /* Allow either 32-bit or 64-bit pointers. */
210 int len
= TYPE_LENGTH (type
);
211 return (len
== 4 || len
== 8);
221 /* Check whether TYPE is "Floating". */
224 sparc_floating_p (const struct type
*type
)
226 switch (TYPE_CODE (type
))
230 int len
= TYPE_LENGTH (type
);
231 return (len
== 4 || len
== 8 || len
== 16);
240 /* Check whether TYPE is "Structure or Union". */
243 sparc_structure_or_union_p (const struct type
*type
)
245 switch (TYPE_CODE (type
))
247 case TYPE_CODE_STRUCT
:
248 case TYPE_CODE_UNION
:
257 /* Register information. */
259 static const char *sparc32_register_names
[] =
261 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
262 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
263 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
264 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
266 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
267 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
268 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
269 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
271 "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
274 /* Total number of registers. */
275 #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
277 /* We provide the aliases %d0..%d30 for the floating registers as
278 "psuedo" registers. */
280 static const char *sparc32_pseudo_register_names
[] =
282 "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
283 "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
286 /* Total number of pseudo registers. */
287 #define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
289 /* Return the name of register REGNUM. */
292 sparc32_register_name (int regnum
)
294 if (regnum
>= 0 && regnum
< SPARC32_NUM_REGS
)
295 return sparc32_register_names
[regnum
];
297 if (regnum
< SPARC32_NUM_REGS
+ SPARC32_NUM_PSEUDO_REGS
)
298 return sparc32_pseudo_register_names
[regnum
- SPARC32_NUM_REGS
];
303 /* Return the GDB type object for the "standard" data type of data in
307 sparc32_register_type (struct gdbarch
*gdbarch
, int regnum
)
309 if (regnum
>= SPARC_F0_REGNUM
&& regnum
<= SPARC_F31_REGNUM
)
310 return builtin_type_float
;
312 if (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
)
313 return builtin_type_double
;
315 if (regnum
== SPARC_SP_REGNUM
|| regnum
== SPARC_FP_REGNUM
)
316 return builtin_type_void_data_ptr
;
318 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
319 return builtin_type_void_func_ptr
;
321 return builtin_type_int32
;
325 sparc32_pseudo_register_read (struct gdbarch
*gdbarch
,
326 struct regcache
*regcache
,
327 int regnum
, void *buf
)
329 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
331 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
332 regcache_raw_read (regcache
, regnum
, buf
);
333 regcache_raw_read (regcache
, regnum
+ 1, ((char *)buf
) + 4);
337 sparc32_pseudo_register_write (struct gdbarch
*gdbarch
,
338 struct regcache
*regcache
,
339 int regnum
, const void *buf
)
341 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
343 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
344 regcache_raw_write (regcache
, regnum
, buf
);
345 regcache_raw_write (regcache
, regnum
+ 1, ((const char *)buf
) + 4);
350 sparc32_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
,
351 CORE_ADDR funcaddr
, int using_gcc
,
352 struct value
**args
, int nargs
,
353 struct type
*value_type
,
354 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
359 if (using_struct_return (value_type
, using_gcc
))
363 /* This is an UNIMP instruction. */
364 store_unsigned_integer (buf
, 4, TYPE_LENGTH (value_type
) & 0x1fff);
365 write_memory (sp
- 8, buf
, 4);
373 sparc32_store_arguments (struct regcache
*regcache
, int nargs
,
374 struct value
**args
, CORE_ADDR sp
,
375 int struct_return
, CORE_ADDR struct_addr
)
377 /* Number of words in the "parameter array". */
378 int num_elements
= 0;
382 for (i
= 0; i
< nargs
; i
++)
384 struct type
*type
= value_type (args
[i
]);
385 int len
= TYPE_LENGTH (type
);
387 if (sparc_structure_or_union_p (type
)
388 || (sparc_floating_p (type
) && len
== 16))
390 /* Structure, Union and Quad-Precision Arguments. */
393 /* Use doubleword alignment for these values. That's always
394 correct, and wasting a few bytes shouldn't be a problem. */
397 write_memory (sp
, VALUE_CONTENTS (args
[i
]), len
);
398 args
[i
] = value_from_pointer (lookup_pointer_type (type
), sp
);
401 else if (sparc_floating_p (type
))
403 /* Floating arguments. */
404 gdb_assert (len
== 4 || len
== 8);
405 num_elements
+= (len
/ 4);
409 /* Integral and pointer arguments. */
410 gdb_assert (sparc_integral_or_pointer_p (type
));
413 args
[i
] = value_cast (builtin_type_int32
, args
[i
]);
414 num_elements
+= ((len
+ 3) / 4);
418 /* Always allocate at least six words. */
419 sp
-= max (6, num_elements
) * 4;
421 /* The psABI says that "Software convention requires space for the
422 struct/union return value pointer, even if the word is unused." */
425 /* The psABI says that "Although software convention and the
426 operating system require every stack frame to be doubleword
430 for (i
= 0; i
< nargs
; i
++)
432 char *valbuf
= VALUE_CONTENTS (args
[i
]);
433 struct type
*type
= value_type (args
[i
]);
434 int len
= TYPE_LENGTH (type
);
436 gdb_assert (len
== 4 || len
== 8);
440 int regnum
= SPARC_O0_REGNUM
+ element
;
442 regcache_cooked_write (regcache
, regnum
, valbuf
);
443 if (len
> 4 && element
< 5)
444 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
+ 4);
447 /* Always store the argument in memory. */
448 write_memory (sp
+ 4 + element
* 4, valbuf
, len
);
452 gdb_assert (element
== num_elements
);
458 store_unsigned_integer (buf
, 4, struct_addr
);
459 write_memory (sp
, buf
, 4);
466 sparc32_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
467 struct regcache
*regcache
, CORE_ADDR bp_addr
,
468 int nargs
, struct value
**args
, CORE_ADDR sp
,
469 int struct_return
, CORE_ADDR struct_addr
)
471 CORE_ADDR call_pc
= (struct_return
? (bp_addr
- 12) : (bp_addr
- 8));
473 /* Set return address. */
474 regcache_cooked_write_unsigned (regcache
, SPARC_O7_REGNUM
, call_pc
);
476 /* Set up function arguments. */
477 sp
= sparc32_store_arguments (regcache
, nargs
, args
, sp
,
478 struct_return
, struct_addr
);
480 /* Allocate the 16-word window save area. */
483 /* Stack should be doubleword aligned at this point. */
484 gdb_assert (sp
% 8 == 0);
486 /* Finally, update the stack pointer. */
487 regcache_cooked_write_unsigned (regcache
, SPARC_SP_REGNUM
, sp
);
493 /* Use the program counter to determine the contents and size of a
494 breakpoint instruction. Return a pointer to a string of bytes that
495 encode a breakpoint instruction, store the length of the string in
496 *LEN and optionally adjust *PC to point to the correct memory
497 location for inserting the breakpoint. */
499 static const unsigned char *
500 sparc_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
502 static unsigned char break_insn
[] = { 0x91, 0xd0, 0x20, 0x01 };
504 *len
= sizeof (break_insn
);
509 /* Allocate and initialize a frame cache. */
511 static struct sparc_frame_cache
*
512 sparc_alloc_frame_cache (void)
514 struct sparc_frame_cache
*cache
;
517 cache
= FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache
);
523 /* Frameless until proven otherwise. */
524 cache
->frameless_p
= 1;
526 cache
->struct_return_p
= 0;
532 sparc_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
533 struct sparc_frame_cache
*cache
)
535 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
540 if (current_pc
<= pc
)
543 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
544 SPARC the linker usually defines a symbol (typically
545 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
546 This symbol makes us end up here with PC pointing at the start of
547 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
548 would do our normal prologue analysis, we would probably conclude
549 that we've got a frame when in reality we don't, since the
550 dynamic linker patches up the first PLT with some code that
551 starts with a SAVE instruction. Patch up PC such that it points
552 at the start of our PLT entry. */
553 if (tdep
->plt_entry_size
> 0 && in_plt_section (current_pc
, NULL
))
554 pc
= current_pc
- ((current_pc
- pc
) % tdep
->plt_entry_size
);
556 insn
= sparc_fetch_instruction (pc
);
558 /* Recognize a SETHI insn and record its destination. */
559 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 0x04)
564 insn
= sparc_fetch_instruction (pc
+ 4);
567 /* Allow for an arithmetic operation on DEST or %g1. */
568 if (X_OP (insn
) == 2 && X_I (insn
)
569 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
573 insn
= sparc_fetch_instruction (pc
+ 8);
576 /* Check for the SAVE instruction that sets up the frame. */
577 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
579 cache
->frameless_p
= 0;
580 return pc
+ offset
+ 4;
587 sparc_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
589 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
590 return frame_unwind_register_unsigned (next_frame
, tdep
->pc_regnum
);
593 /* Return PC of first real instruction of the function starting at
597 sparc32_skip_prologue (CORE_ADDR start_pc
)
599 struct symtab_and_line sal
;
600 CORE_ADDR func_start
, func_end
;
601 struct sparc_frame_cache cache
;
603 /* This is the preferred method, find the end of the prologue by
604 using the debugging information. */
605 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
607 sal
= find_pc_line (func_start
, 0);
609 if (sal
.end
< func_end
610 && start_pc
<= sal
.end
)
614 start_pc
= sparc_analyze_prologue (start_pc
, 0xffffffffUL
, &cache
);
616 /* The psABI says that "Although the first 6 words of arguments
617 reside in registers, the standard stack frame reserves space for
618 them.". It also suggests that a function may use that space to
619 "write incoming arguments 0 to 5" into that space, and that's
620 indeed what GCC seems to be doing. In that case GCC will
621 generate debug information that points to the stack slots instead
622 of the registers, so we should consider the instructions that
623 write out these incoming arguments onto the stack. Of course we
624 only need to do this if we have a stack frame. */
626 while (!cache
.frameless_p
)
628 unsigned long insn
= sparc_fetch_instruction (start_pc
);
630 /* Recognize instructions that store incoming arguments in
631 %i0...%i5 into the corresponding stack slot. */
632 if (X_OP (insn
) == 3 && (X_OP3 (insn
) & 0x3c) == 0x04 && X_I (insn
)
633 && (X_RD (insn
) >= 24 && X_RD (insn
) <= 29) && X_RS1 (insn
) == 30
634 && X_SIMM13 (insn
) == 68 + (X_RD (insn
) - 24) * 4)
648 struct sparc_frame_cache
*
649 sparc_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
651 struct sparc_frame_cache
*cache
;
656 cache
= sparc_alloc_frame_cache ();
659 cache
->pc
= frame_func_unwind (next_frame
);
662 CORE_ADDR addr_in_block
= frame_unwind_address_in_block (next_frame
);
663 sparc_analyze_prologue (cache
->pc
, addr_in_block
, cache
);
666 if (cache
->frameless_p
)
668 /* This function is frameless, so %fp (%i6) holds the frame
669 pointer for our calling frame. Use %sp (%o6) as this frame's
672 frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
676 /* For normal frames, %fp (%i6) holds the frame pointer, the
677 base address for the current stack frame. */
679 frame_unwind_register_unsigned (next_frame
, SPARC_FP_REGNUM
);
685 struct sparc_frame_cache
*
686 sparc32_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
688 struct sparc_frame_cache
*cache
;
694 cache
= sparc_frame_cache (next_frame
, this_cache
);
696 sym
= find_pc_function (cache
->pc
);
699 struct type
*type
= check_typedef (SYMBOL_TYPE (sym
));
700 enum type_code code
= TYPE_CODE (type
);
702 if (code
== TYPE_CODE_FUNC
|| code
== TYPE_CODE_METHOD
)
704 type
= check_typedef (TYPE_TARGET_TYPE (type
));
705 if (sparc_structure_or_union_p (type
)
706 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
707 cache
->struct_return_p
= 1;
712 /* There is no debugging information for this function to
713 help us determine whether this function returns a struct
714 or not. So we rely on another heuristic which is to check
715 the instruction at the return address and see if this is
716 an "unimp" instruction. If it is, then it is a struct-return
719 int regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
721 pc
= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
722 if (sparc_is_unimp_insn (pc
))
723 cache
->struct_return_p
= 1;
730 sparc32_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
731 struct frame_id
*this_id
)
733 struct sparc_frame_cache
*cache
=
734 sparc32_frame_cache (next_frame
, this_cache
);
736 /* This marks the outermost frame. */
737 if (cache
->base
== 0)
740 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
744 sparc32_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
745 int regnum
, int *optimizedp
,
746 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
747 int *realnump
, void *valuep
)
749 struct sparc_frame_cache
*cache
=
750 sparc32_frame_cache (next_frame
, this_cache
);
752 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
760 CORE_ADDR pc
= (regnum
== SPARC32_NPC_REGNUM
) ? 4 : 0;
762 /* If this functions has a Structure, Union or
763 Quad-Precision return value, we have to skip the UNIMP
764 instruction that encodes the size of the structure. */
765 if (cache
->struct_return_p
)
768 regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
769 pc
+= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
770 store_unsigned_integer (valuep
, 4, pc
);
775 /* Handle StackGhost. */
777 ULONGEST wcookie
= sparc_fetch_wcookie ();
779 if (wcookie
!= 0 && !cache
->frameless_p
&& regnum
== SPARC_I7_REGNUM
)
787 CORE_ADDR addr
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
790 /* Read the value in from memory. */
791 i7
= get_frame_memory_unsigned (next_frame
, addr
, 4);
792 store_unsigned_integer (valuep
, 4, i7
^ wcookie
);
798 /* The previous frame's `local' and `in' registers have been saved
799 in the register save area. */
800 if (!cache
->frameless_p
801 && regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
)
804 *lvalp
= lval_memory
;
805 *addrp
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
809 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
811 /* Read the value in from memory. */
812 read_memory (*addrp
, valuep
, register_size (gdbarch
, regnum
));
817 /* The previous frame's `out' registers are accessable as the
818 current frame's `in' registers. */
819 if (!cache
->frameless_p
820 && regnum
>= SPARC_O0_REGNUM
&& regnum
<= SPARC_O7_REGNUM
)
821 regnum
+= (SPARC_I0_REGNUM
- SPARC_O0_REGNUM
);
824 *lvalp
= lval_register
;
828 frame_unwind_register (next_frame
, (*realnump
), valuep
);
831 static const struct frame_unwind sparc32_frame_unwind
=
834 sparc32_frame_this_id
,
835 sparc32_frame_prev_register
838 static const struct frame_unwind
*
839 sparc32_frame_sniffer (struct frame_info
*next_frame
)
841 return &sparc32_frame_unwind
;
846 sparc32_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
848 struct sparc_frame_cache
*cache
=
849 sparc32_frame_cache (next_frame
, this_cache
);
854 static const struct frame_base sparc32_frame_base
=
856 &sparc32_frame_unwind
,
857 sparc32_frame_base_address
,
858 sparc32_frame_base_address
,
859 sparc32_frame_base_address
862 static struct frame_id
863 sparc_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
867 sp
= frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
868 return frame_id_build (sp
, frame_pc_unwind (next_frame
));
872 /* Extract from an array REGBUF containing the (raw) register state, a
873 function return value of TYPE, and copy that into VALBUF. */
876 sparc32_extract_return_value (struct type
*type
, struct regcache
*regcache
,
879 int len
= TYPE_LENGTH (type
);
882 gdb_assert (!sparc_structure_or_union_p (type
));
883 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
885 if (sparc_floating_p (type
))
887 /* Floating return values. */
888 regcache_cooked_read (regcache
, SPARC_F0_REGNUM
, buf
);
890 regcache_cooked_read (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
891 memcpy (valbuf
, buf
, len
);
895 /* Integral and pointer return values. */
896 gdb_assert (sparc_integral_or_pointer_p (type
));
898 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
, buf
);
901 regcache_cooked_read (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
902 gdb_assert (len
== 8);
903 memcpy (valbuf
, buf
, 8);
907 /* Just stripping off any unused bytes should preserve the
908 signed-ness just fine. */
909 memcpy (valbuf
, buf
+ 4 - len
, len
);
914 /* Write into the appropriate registers a function return value stored
915 in VALBUF of type TYPE. */
918 sparc32_store_return_value (struct type
*type
, struct regcache
*regcache
,
921 int len
= TYPE_LENGTH (type
);
924 gdb_assert (!sparc_structure_or_union_p (type
));
925 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
927 if (sparc_floating_p (type
))
929 /* Floating return values. */
930 memcpy (buf
, valbuf
, len
);
931 regcache_cooked_write (regcache
, SPARC_F0_REGNUM
, buf
);
933 regcache_cooked_write (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
937 /* Integral and pointer return values. */
938 gdb_assert (sparc_integral_or_pointer_p (type
));
942 gdb_assert (len
== 8);
943 memcpy (buf
, valbuf
, 8);
944 regcache_cooked_write (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
948 /* ??? Do we need to do any sign-extension here? */
949 memcpy (buf
+ 4 - len
, valbuf
, len
);
951 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
, buf
);
955 static enum return_value_convention
956 sparc32_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
957 struct regcache
*regcache
, void *readbuf
,
958 const void *writebuf
)
960 if (sparc_structure_or_union_p (type
)
961 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
962 return RETURN_VALUE_STRUCT_CONVENTION
;
965 sparc32_extract_return_value (type
, regcache
, readbuf
);
967 sparc32_store_return_value (type
, regcache
, writebuf
);
969 return RETURN_VALUE_REGISTER_CONVENTION
;
973 /* NOTE: cagney/2004-01-17: For the moment disable this method. The
974 architecture and CORE-gdb will need new code (and a replacement for
975 DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS) before this can be made to
976 work robustly. Here is a possible function signature: */
977 /* NOTE: cagney/2004-01-17: So far only the 32-bit SPARC ABI has been
978 identifed as having a way to robustly recover the address of a
979 struct-convention return-value (after the function has returned).
980 For all other ABIs so far examined, the calling convention makes no
981 guarenteed that the register containing the return-value will be
982 preserved and hence that the return-value's address can be
984 /* Extract from REGCACHE, which contains the (raw) register state, the
985 address in which a function should return its structure value, as a
989 sparc32_extract_struct_value_address (struct regcache
*regcache
)
993 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
994 return read_memory_unsigned_integer (sp
+ 64, 4);
999 sparc32_stabs_argument_has_addr (struct gdbarch
*gdbarch
, struct type
*type
)
1001 return (sparc_structure_or_union_p (type
)
1002 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16));
1006 /* The SPARC Architecture doesn't have hardware single-step support,
1007 and most operating systems don't implement it either, so we provide
1008 software single-step mechanism. */
1011 sparc_analyze_control_transfer (CORE_ADDR pc
, CORE_ADDR
*npc
)
1013 unsigned long insn
= sparc_fetch_instruction (pc
);
1014 int conditional_p
= X_COND (insn
) & 0x7;
1016 long offset
= 0; /* Must be signed for sign-extend. */
1018 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 3 && (insn
& 0x1000000) == 0)
1020 /* Branch on Integer Register with Prediction (BPr). */
1024 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 6)
1026 /* Branch on Floating-Point Condition Codes (FBfcc). */
1028 offset
= 4 * X_DISP22 (insn
);
1030 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 5)
1032 /* Branch on Floating-Point Condition Codes with Prediction
1035 offset
= 4 * X_DISP19 (insn
);
1037 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 2)
1039 /* Branch on Integer Condition Codes (Bicc). */
1041 offset
= 4 * X_DISP22 (insn
);
1043 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 1)
1045 /* Branch on Integer Condition Codes with Prediction (BPcc). */
1047 offset
= 4 * X_DISP19 (insn
);
1050 /* FIXME: Handle DONE and RETRY instructions. */
1052 /* FIXME: Handle the Trap instruction. */
1058 /* For conditional branches, return nPC + 4 iff the annul
1060 return (X_A (insn
) ? *npc
+ 4 : 0);
1064 /* For unconditional branches, return the target if its
1065 specified condition is "always" and return nPC + 4 if the
1066 condition is "never". If the annul bit is 1, set *NPC to
1068 if (X_COND (insn
) == 0x0)
1069 pc
= *npc
, offset
= 4;
1073 gdb_assert (offset
!= 0);
1082 sparc_software_single_step (enum target_signal sig
, int insert_breakpoints_p
)
1084 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1085 static CORE_ADDR npc
, nnpc
;
1086 static char npc_save
[4], nnpc_save
[4];
1088 if (insert_breakpoints_p
)
1090 CORE_ADDR pc
, orig_npc
;
1092 pc
= sparc_address_from_register (tdep
->pc_regnum
);
1093 orig_npc
= npc
= sparc_address_from_register (tdep
->npc_regnum
);
1095 /* Analyze the instruction at PC. */
1096 nnpc
= sparc_analyze_control_transfer (pc
, &npc
);
1098 target_insert_breakpoint (npc
, npc_save
);
1100 target_insert_breakpoint (nnpc
, nnpc_save
);
1102 /* Assert that we have set at least one breakpoint, and that
1103 they're not set at the same spot - unless we're going
1104 from here straight to NULL, i.e. a call or jump to 0. */
1105 gdb_assert (npc
!= 0 || nnpc
!= 0 || orig_npc
== 0);
1106 gdb_assert (nnpc
!= npc
|| orig_npc
== 0);
1111 target_remove_breakpoint (npc
, npc_save
);
1113 target_remove_breakpoint (nnpc
, nnpc_save
);
1118 sparc_write_pc (CORE_ADDR pc
, ptid_t ptid
)
1120 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1122 write_register_pid (tdep
->pc_regnum
, pc
, ptid
);
1123 write_register_pid (tdep
->npc_regnum
, pc
+ 4, ptid
);
1126 /* Unglobalize NAME. */
1129 sparc_stabs_unglobalize_name (char *name
)
1131 /* The Sun compilers (Sun ONE Studio, Forte Developer, Sun WorkShop,
1132 SunPRO) convert file static variables into global values, a
1133 process known as globalization. In order to do this, the
1134 compiler will create a unique prefix and prepend it to each file
1135 static variable. For static variables within a function, this
1136 globalization prefix is followed by the function name (nested
1137 static variables within a function are supposed to generate a
1138 warning message, and are left alone). The procedure is
1139 documented in the Stabs Interface Manual, which is distrubuted
1140 with the compilers, although version 4.0 of the manual seems to
1141 be incorrect in some places, at least for SPARC. The
1142 globalization prefix is encoded into an N_OPT stab, with the form
1143 "G=<prefix>". The globalization prefix always seems to start
1144 with a dollar sign '$'; a dot '.' is used as a seperator. So we
1145 simply strip everything up until the last dot. */
1149 char *p
= strrchr (name
, '.');
1158 /* Return the appropriate register set for the core section identified
1159 by SECT_NAME and SECT_SIZE. */
1161 const struct regset
*
1162 sparc_regset_from_core_section (struct gdbarch
*gdbarch
,
1163 const char *sect_name
, size_t sect_size
)
1165 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1167 if (strcmp (sect_name
, ".reg") == 0 && sect_size
>= tdep
->sizeof_gregset
)
1168 return tdep
->gregset
;
1170 if (strcmp (sect_name
, ".reg2") == 0 && sect_size
>= tdep
->sizeof_fpregset
)
1171 return tdep
->fpregset
;
1177 static struct gdbarch
*
1178 sparc32_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1180 struct gdbarch_tdep
*tdep
;
1181 struct gdbarch
*gdbarch
;
1183 /* If there is already a candidate, use it. */
1184 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1186 return arches
->gdbarch
;
1188 /* Allocate space for the new architecture. */
1189 tdep
= XMALLOC (struct gdbarch_tdep
);
1190 gdbarch
= gdbarch_alloc (&info
, tdep
);
1192 tdep
->pc_regnum
= SPARC32_PC_REGNUM
;
1193 tdep
->npc_regnum
= SPARC32_NPC_REGNUM
;
1194 tdep
->gregset
= NULL
;
1195 tdep
->sizeof_gregset
= 0;
1196 tdep
->fpregset
= NULL
;
1197 tdep
->sizeof_fpregset
= 0;
1198 tdep
->plt_entry_size
= 0;
1200 set_gdbarch_long_double_bit (gdbarch
, 128);
1201 set_gdbarch_long_double_format (gdbarch
, &floatformat_sparc_quad
);
1203 set_gdbarch_num_regs (gdbarch
, SPARC32_NUM_REGS
);
1204 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
1205 set_gdbarch_register_type (gdbarch
, sparc32_register_type
);
1206 set_gdbarch_num_pseudo_regs (gdbarch
, SPARC32_NUM_PSEUDO_REGS
);
1207 set_gdbarch_pseudo_register_read (gdbarch
, sparc32_pseudo_register_read
);
1208 set_gdbarch_pseudo_register_write (gdbarch
, sparc32_pseudo_register_write
);
1210 /* Register numbers of various important registers. */
1211 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
); /* %sp */
1212 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
); /* %pc */
1213 set_gdbarch_fp0_regnum (gdbarch
, SPARC_F0_REGNUM
); /* %f0 */
1215 /* Call dummy code. */
1216 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1217 set_gdbarch_push_dummy_code (gdbarch
, sparc32_push_dummy_code
);
1218 set_gdbarch_push_dummy_call (gdbarch
, sparc32_push_dummy_call
);
1220 set_gdbarch_return_value (gdbarch
, sparc32_return_value
);
1221 set_gdbarch_stabs_argument_has_addr
1222 (gdbarch
, sparc32_stabs_argument_has_addr
);
1224 set_gdbarch_skip_prologue (gdbarch
, sparc32_skip_prologue
);
1226 /* Stack grows downward. */
1227 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1229 set_gdbarch_breakpoint_from_pc (gdbarch
, sparc_breakpoint_from_pc
);
1231 set_gdbarch_frame_args_skip (gdbarch
, 8);
1233 set_gdbarch_print_insn (gdbarch
, print_insn_sparc
);
1235 set_gdbarch_software_single_step (gdbarch
, sparc_software_single_step
);
1236 set_gdbarch_write_pc (gdbarch
, sparc_write_pc
);
1238 set_gdbarch_unwind_dummy_id (gdbarch
, sparc_unwind_dummy_id
);
1240 set_gdbarch_unwind_pc (gdbarch
, sparc_unwind_pc
);
1242 frame_base_set_default (gdbarch
, &sparc32_frame_base
);
1244 /* Hook in ABI-specific overrides, if they have been registered. */
1245 gdbarch_init_osabi (info
, gdbarch
);
1247 frame_unwind_append_sniffer (gdbarch
, sparc32_frame_sniffer
);
1249 /* If we have register sets, enable the generic core file support. */
1251 set_gdbarch_regset_from_core_section (gdbarch
,
1252 sparc_regset_from_core_section
);
1257 /* Helper functions for dealing with register windows. */
1260 sparc_supply_rwindow (struct regcache
*regcache
, CORE_ADDR sp
, int regnum
)
1268 /* Registers are 64-bit. */
1271 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1273 if (regnum
== i
|| regnum
== -1)
1275 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1276 regcache_raw_supply (regcache
, i
, buf
);
1282 /* Registers are 32-bit. Toss any sign-extension of the stack
1286 /* Clear out the top half of the temporary buffer, and put the
1287 register value in the bottom half if we're in 64-bit mode. */
1288 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1294 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1296 if (regnum
== i
|| regnum
== -1)
1298 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1301 /* Handle StackGhost. */
1302 if (i
== SPARC_I7_REGNUM
)
1304 ULONGEST wcookie
= sparc_fetch_wcookie ();
1305 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1307 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1310 regcache_raw_supply (regcache
, i
, buf
);
1317 sparc_collect_rwindow (const struct regcache
*regcache
,
1318 CORE_ADDR sp
, int regnum
)
1326 /* Registers are 64-bit. */
1329 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1331 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1333 regcache_raw_collect (regcache
, i
, buf
);
1334 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1340 /* Registers are 32-bit. Toss any sign-extension of the stack
1344 /* Only use the bottom half if we're in 64-bit mode. */
1345 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1348 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1350 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1352 regcache_raw_collect (regcache
, i
, buf
);
1354 /* Handle StackGhost. */
1355 if (i
== SPARC_I7_REGNUM
)
1357 ULONGEST wcookie
= sparc_fetch_wcookie ();
1358 ULONGEST i7
= extract_unsigned_integer (buf
+ offset
, 4);
1360 store_unsigned_integer (buf
+ offset
, 4, i7
^ wcookie
);
1363 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1370 /* Helper functions for dealing with register sets. */
1373 sparc32_supply_gregset (const struct sparc_gregset
*gregset
,
1374 struct regcache
*regcache
,
1375 int regnum
, const void *gregs
)
1377 const char *regs
= gregs
;
1380 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1381 regcache_raw_supply (regcache
, SPARC32_PSR_REGNUM
,
1382 regs
+ gregset
->r_psr_offset
);
1384 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1385 regcache_raw_supply (regcache
, SPARC32_PC_REGNUM
,
1386 regs
+ gregset
->r_pc_offset
);
1388 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1389 regcache_raw_supply (regcache
, SPARC32_NPC_REGNUM
,
1390 regs
+ gregset
->r_npc_offset
);
1392 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1393 regcache_raw_supply (regcache
, SPARC32_Y_REGNUM
,
1394 regs
+ gregset
->r_y_offset
);
1396 if (regnum
== SPARC_G0_REGNUM
|| regnum
== -1)
1397 regcache_raw_supply (regcache
, SPARC_G0_REGNUM
, NULL
);
1399 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1401 int offset
= gregset
->r_g1_offset
;
1403 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1405 if (regnum
== i
|| regnum
== -1)
1406 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1411 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1413 /* Not all of the register set variants include Locals and
1414 Inputs. For those that don't, we read them off the stack. */
1415 if (gregset
->r_l0_offset
== -1)
1419 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1420 sparc_supply_rwindow (regcache
, sp
, regnum
);
1424 int offset
= gregset
->r_l0_offset
;
1426 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1428 if (regnum
== i
|| regnum
== -1)
1429 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1437 sparc32_collect_gregset (const struct sparc_gregset
*gregset
,
1438 const struct regcache
*regcache
,
1439 int regnum
, void *gregs
)
1444 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1445 regcache_raw_collect (regcache
, SPARC32_PSR_REGNUM
,
1446 regs
+ gregset
->r_psr_offset
);
1448 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1449 regcache_raw_collect (regcache
, SPARC32_PC_REGNUM
,
1450 regs
+ gregset
->r_pc_offset
);
1452 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1453 regcache_raw_collect (regcache
, SPARC32_NPC_REGNUM
,
1454 regs
+ gregset
->r_npc_offset
);
1456 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1457 regcache_raw_collect (regcache
, SPARC32_Y_REGNUM
,
1458 regs
+ gregset
->r_y_offset
);
1460 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1462 int offset
= gregset
->r_g1_offset
;
1464 /* %g0 is always zero. */
1465 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1467 if (regnum
== i
|| regnum
== -1)
1468 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1473 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1475 /* Not all of the register set variants include Locals and
1476 Inputs. For those that don't, we read them off the stack. */
1477 if (gregset
->r_l0_offset
!= -1)
1479 int offset
= gregset
->r_l0_offset
;
1481 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1483 if (regnum
== i
|| regnum
== -1)
1484 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1492 sparc32_supply_fpregset (struct regcache
*regcache
,
1493 int regnum
, const void *fpregs
)
1495 const char *regs
= fpregs
;
1498 for (i
= 0; i
< 32; i
++)
1500 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1501 regcache_raw_supply (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1504 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1505 regcache_raw_supply (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1509 sparc32_collect_fpregset (const struct regcache
*regcache
,
1510 int regnum
, void *fpregs
)
1512 char *regs
= fpregs
;
1515 for (i
= 0; i
< 32; i
++)
1517 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1518 regcache_raw_collect (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1521 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1522 regcache_raw_collect (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1528 /* From <machine/reg.h>. */
1529 const struct sparc_gregset sparc32_sunos4_gregset
=
1542 /* Provide a prototype to silence -Wmissing-prototypes. */
1543 void _initialize_sparc_tdep (void);
1546 _initialize_sparc_tdep (void)
1548 register_gdbarch_init (bfd_arch_sparc
, sparc32_gdbarch_init
);