1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
29 #include <sys/procfs.h>
35 extern int stop_after_trap
;
37 /* We don't store all registers immediately when requested, since they
38 get sent over in large chunks anyway. Instead, we accumulate most
39 of the changes and send them over once. "deferred_stores" keeps
40 track of which sets of registers we have locally-changed copies of,
41 so we only need send the groups that have changed. */
43 int deferred_stores
= 0; /* Cumulates stores we want to do eventually. */
47 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
50 /* Simulate single-step ptrace call for sun4. Code written by Gary
51 Beihl (beihl@mcc.com). */
53 /* npc4 and next_pc describe the situation at the time that the
54 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
55 static CORE_ADDR next_pc
, npc4
, target
;
56 static int brknpc4
, brktrg
;
57 typedef char binsn_quantum
[BREAKPOINT_MAX
];
58 static binsn_quantum break_mem
[3];
60 /* Non-zero if we just simulated a single-step ptrace call. This is
61 needed because we cannot remove the breakpoints in the inferior
62 process until after the `wait' in `wait_for_inferior'. Used for
67 /* single_step() is called just before we want to resume the inferior,
68 if we want to single-step it but there is no hardware or kernel single-step
69 support (as on all SPARCs). We find all the possible targets of the
70 coming instruction and breakpoint them.
72 single_step is also called just after the inferior stops. If we had
73 set up a simulated single-step, we undo our damage. */
77 int ignore
; /* pid, but we don't need it */
79 branch_type br
, isannulled();
85 /* Always set breakpoint for NPC. */
86 next_pc
= read_register (NPC_REGNUM
);
87 npc4
= next_pc
+ 4; /* branch not taken */
89 target_insert_breakpoint (next_pc
, break_mem
[0]);
90 /* printf_unfiltered ("set break at %x\n",next_pc); */
92 pc
= read_register (PC_REGNUM
);
93 pc_instruction
= read_memory_integer (pc
, sizeof(pc_instruction
));
94 br
= isannulled (pc_instruction
, pc
, &target
);
99 /* Conditional annulled branch will either end up at
100 npc (if taken) or at npc+4 (if not taken).
103 target_insert_breakpoint (npc4
, break_mem
[1]);
105 else if (br
== baa
&& target
!= next_pc
)
107 /* Unconditional annulled branch will always end up at
110 target_insert_breakpoint (target
, break_mem
[2]);
113 /* We are ready to let it go */
119 /* Remove breakpoints */
120 target_remove_breakpoint (next_pc
, break_mem
[0]);
123 target_remove_breakpoint (npc4
, break_mem
[1]);
126 target_remove_breakpoint (target
, break_mem
[2]);
133 sparc_frame_chain (thisframe
)
136 char buf
[MAX_REGISTER_RAW_SIZE
];
140 addr
= thisframe
->frame
+ FRAME_SAVED_I0
+
141 REGISTER_RAW_SIZE (FP_REGNUM
) * (FP_REGNUM
- I0_REGNUM
);
142 err
= target_read_memory (addr
, buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
145 return extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
149 sparc_extract_struct_value_address (regbuf
)
150 char regbuf
[REGISTER_BYTES
];
152 return read_memory_integer (((int *)(regbuf
))[SP_REGNUM
]+(16*4),
153 TARGET_PTR_BIT
/ TARGET_CHAR_BIT
);
156 /* Find the pc saved in frame FRAME. */
159 sparc_frame_saved_pc (frame
)
162 char buf
[MAX_REGISTER_RAW_SIZE
];
165 if (frame
->signal_handler_caller
)
167 /* This is the signal trampoline frame.
168 Get the saved PC from the sigcontext structure. */
170 #ifndef SIGCONTEXT_PC_OFFSET
171 #define SIGCONTEXT_PC_OFFSET 12
174 CORE_ADDR sigcontext_addr
;
175 char scbuf
[TARGET_PTR_BIT
/ HOST_CHAR_BIT
];
176 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
179 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
180 as the third parameter. The offset to the saved pc is 12. */
181 find_pc_partial_function (frame
->pc
, &name
,
182 (CORE_ADDR
*)NULL
,(CORE_ADDR
*)NULL
);
183 if (name
&& STREQ (name
, "ucbsigvechandler"))
184 saved_pc_offset
= 12;
186 /* The sigcontext address is contained in register O2. */
187 get_saved_register (buf
, (int *)NULL
, (CORE_ADDR
*)NULL
,
188 frame
, O0_REGNUM
+ 2, (enum lval_type
*)NULL
);
189 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
));
191 /* Don't cause a memory_error when accessing sigcontext in case the
192 stack layout has changed or the stack is corrupt. */
193 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
194 scbuf
, sizeof (scbuf
));
195 return extract_address (scbuf
, sizeof (scbuf
));
197 addr
= (frame
->bottom
+ FRAME_SAVED_I0
+
198 REGISTER_RAW_SIZE (I7_REGNUM
) * (I7_REGNUM
- I0_REGNUM
));
199 read_memory (addr
, buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
200 return PC_ADJUST (extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
)));
204 * Since an individual frame in the frame cache is defined by two
205 * arguments (a frame pointer and a stack pointer), we need two
206 * arguments to get info for an arbitrary stack frame. This routine
207 * takes two arguments and makes the cached frames look as if these
208 * two arguments defined a frame on the cache. This allows the rest
209 * of info frame to extract the important arguments without
213 setup_arbitrary_frame (argc
, argv
)
220 error ("Sparc frame specifications require two arguments: fp and sp");
222 fid
= create_new_frame (argv
[0], 0);
225 fatal ("internal: create_new_frame returned invalid frame id");
227 fid
->bottom
= argv
[1];
228 fid
->pc
= FRAME_SAVED_PC (fid
);
232 /* Given a pc value, skip it forward past the function prologue by
233 disassembling instructions that appear to be a prologue.
235 If FRAMELESS_P is set, we are only testing to see if the function
236 is frameless. This allows a quicker answer.
238 This routine should be more specific in its actions; making sure
239 that it uses the same register in the initial prologue section. */
241 skip_prologue (start_pc
, frameless_p
)
247 unsigned long int code
;
253 unsigned int imm22
:22;
262 unsigned int simm13
:13;
267 CORE_ADDR pc
= start_pc
;
269 x
.i
= read_memory_integer (pc
, 4);
271 /* Recognize the `sethi' insn and record its destination. */
272 if (x
.sethi
.op
== 0 && x
.sethi
.op2
== 4)
276 x
.i
= read_memory_integer (pc
, 4);
279 /* Recognize an add immediate value to register to either %g1 or
280 the destination register recorded above. Actually, this might
281 well recognize several different arithmetic operations.
282 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
283 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
284 I imagine any compiler really does that, however). */
285 if (x
.add
.op
== 2 && x
.add
.i
&& (x
.add
.rd
== 1 || x
.add
.rd
== dest
))
288 x
.i
= read_memory_integer (pc
, 4);
291 /* This recognizes any SAVE insn. But why do the XOR and then
292 the compare? That's identical to comparing against 60 (as long
293 as there isn't any sign extension). */
294 if (x
.add
.op
== 2 && (x
.add
.op3
^ 32) == 28)
297 if (frameless_p
) /* If the save is all we care about, */
298 return pc
; /* return before doing more work */
299 x
.i
= read_memory_integer (pc
, 4);
303 /* Without a save instruction, it's not a prologue. */
307 /* Now we need to recognize stores into the frame from the input
308 registers. This recognizes all non alternate stores of input
309 register, into a location offset from the frame pointer. */
311 && (x
.add
.op3
& 0x3c) == 4 /* Store, non-alternate. */
312 && (x
.add
.rd
& 0x18) == 0x18 /* Input register. */
313 && x
.add
.i
/* Immediate mode. */
314 && x
.add
.rs1
== 30 /* Off of frame pointer. */
315 /* Into reserved stack space. */
316 && x
.add
.simm13
>= 0x44
317 && x
.add
.simm13
< 0x5b)
320 x
.i
= read_memory_integer (pc
, 4);
325 /* Check instruction at ADDR to see if it is an annulled branch.
326 All other instructions will go to NPC or will trap.
327 Set *TARGET if we find a canidate branch; set to zero if not. */
330 isannulled (instruction
, addr
, target
)
332 CORE_ADDR addr
, *target
;
334 branch_type val
= not_branch
;
335 long int offset
; /* Must be signed for sign-extend. */
338 unsigned long int code
;
345 unsigned int disp22
:22;
350 insn
.code
= instruction
;
353 && (insn
.b
.op2
== 2 || insn
.b
.op2
== 6 || insn
.b
.op2
== 7))
355 if (insn
.b
.cond
== 8)
356 val
= insn
.b
.a
? baa
: ba
;
358 val
= insn
.b
.a
? bicca
: bicc
;
359 offset
= 4 * ((int) (insn
.b
.disp22
<< 10) >> 10);
360 *target
= addr
+ offset
;
366 /* sparc_frame_find_saved_regs ()
368 Stores, into a struct frame_saved_regs,
369 the addresses of the saved registers of frame described by FRAME_INFO.
370 This includes special registers such as pc and fp saved in special
371 ways in the stack frame. sp is even more special:
372 the address we return for it IS the sp for the next frame.
374 Note that on register window machines, we are currently making the
375 assumption that window registers are being saved somewhere in the
376 frame in which they are being used. If they are stored in an
377 inferior frame, find_saved_register will break.
379 On the Sun 4, the only time all registers are saved is when
380 a dummy frame is involved. Otherwise, the only saved registers
381 are the LOCAL and IN registers which are saved as a result
382 of the "save/restore" opcodes. This condition is determined
383 by address rather than by value.
385 The "pc" is not stored in a frame on the SPARC. (What is stored
386 is a return address minus 8.) sparc_pop_frame knows how to
387 deal with that. Other routines might or might not.
389 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
390 about how this works. */
393 sparc_frame_find_saved_regs (fi
, saved_regs_addr
)
394 struct frame_info
*fi
;
395 struct frame_saved_regs
*saved_regs_addr
;
398 FRAME_ADDR frame
= FRAME_FP(fi
);
399 FRAME fid
= FRAME_INFO_ID (fi
);
402 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
404 memset (saved_regs_addr
, 0, sizeof (*saved_regs_addr
));
406 if (fi
->pc
>= (fi
->bottom
? fi
->bottom
:
407 read_register (SP_REGNUM
))
408 && fi
->pc
<= FRAME_FP(fi
))
410 /* Dummy frame. All but the window regs are in there somewhere. */
411 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+7; regnum
++)
412 saved_regs_addr
->regs
[regnum
] =
413 frame
+ (regnum
- G0_REGNUM
) * 4 - 0xa0;
414 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+8; regnum
++)
415 saved_regs_addr
->regs
[regnum
] =
416 frame
+ (regnum
- I0_REGNUM
) * 4 - 0xc0;
417 for (regnum
= FP0_REGNUM
; regnum
< FP0_REGNUM
+ 32; regnum
++)
418 saved_regs_addr
->regs
[regnum
] =
419 frame
+ (regnum
- FP0_REGNUM
) * 4 - 0x80;
420 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
421 saved_regs_addr
->regs
[regnum
] =
422 frame
+ (regnum
- Y_REGNUM
) * 4 - 0xe0;
424 fi
->bottom
: read_register (SP_REGNUM
);
428 /* Normal frame. Just Local and In registers */
430 fi
->bottom
: read_register (SP_REGNUM
);
431 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+16; regnum
++)
432 saved_regs_addr
->regs
[regnum
] =
433 frame
+ (regnum
- L0_REGNUM
) * REGISTER_RAW_SIZE (L0_REGNUM
);
437 /* Pull off either the next frame pointer or the stack pointer */
438 FRAME_ADDR next_next_frame
=
441 read_register (SP_REGNUM
));
442 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+8; regnum
++)
443 saved_regs_addr
->regs
[regnum
] =
444 next_next_frame
+ regnum
* REGISTER_RAW_SIZE (O0_REGNUM
);
446 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
447 saved_regs_addr
->regs
[SP_REGNUM
] = FRAME_FP (fi
);
450 /* Push an empty stack frame, and record in it the current PC, regs, etc.
452 We save the non-windowed registers and the ins. The locals and outs
453 are new; they don't need to be saved. The i's and l's of
454 the last frame were already saved on the stack. */
456 /* Definitely see tm-sparc.h for more doc of the frame format here. */
459 sparc_push_dummy_frame ()
461 CORE_ADDR sp
, old_sp
;
462 char register_temp
[0x140];
464 old_sp
= sp
= read_register (SP_REGNUM
);
466 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
467 read_register_bytes (REGISTER_BYTE (Y_REGNUM
), ®ister_temp
[0],
468 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
470 read_register_bytes (REGISTER_BYTE (O0_REGNUM
), ®ister_temp
[8 * 4],
471 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
473 read_register_bytes (REGISTER_BYTE (G0_REGNUM
), ®ister_temp
[16 * 4],
474 REGISTER_RAW_SIZE (G0_REGNUM
) * 8);
476 read_register_bytes (REGISTER_BYTE (FP0_REGNUM
), ®ister_temp
[24 * 4],
477 REGISTER_RAW_SIZE (FP0_REGNUM
) * 32);
481 write_register (SP_REGNUM
, sp
);
483 write_memory (sp
+ 0x60, ®ister_temp
[0], (8 + 8 + 8 + 32) * 4);
485 write_register (FP_REGNUM
, old_sp
);
487 /* Set return address register for the call dummy to the current PC. */
488 write_register (I7_REGNUM
, read_pc() - 8);
491 /* Discard from the stack the innermost frame, restoring all saved registers.
493 Note that the values stored in fsr by get_frame_saved_regs are *in
494 the context of the called frame*. What this means is that the i
495 regs of fsr must be restored into the o regs of the (calling) frame that
496 we pop into. We don't care about the output regs of the calling frame,
497 since unless it's a dummy frame, it won't have any output regs in it.
499 We never have to bother with %l (local) regs, since the called routine's
500 locals get tossed, and the calling routine's locals are already saved
503 /* Definitely see tm-sparc.h for more doc of the frame format here. */
508 register FRAME frame
= get_current_frame ();
509 register CORE_ADDR pc
;
510 struct frame_saved_regs fsr
;
511 struct frame_info
*fi
;
512 char raw_buffer
[REGISTER_BYTES
];
514 fi
= get_frame_info (frame
);
515 get_frame_saved_regs (fi
, &fsr
);
516 if (fsr
.regs
[FP0_REGNUM
])
518 read_memory (fsr
.regs
[FP0_REGNUM
], raw_buffer
, 32 * 4);
519 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
), raw_buffer
, 32 * 4);
521 if (fsr
.regs
[FPS_REGNUM
])
523 read_memory (fsr
.regs
[FPS_REGNUM
], raw_buffer
, 4);
524 write_register_bytes (REGISTER_BYTE (FPS_REGNUM
), raw_buffer
, 4);
526 if (fsr
.regs
[CPS_REGNUM
])
528 read_memory (fsr
.regs
[CPS_REGNUM
], raw_buffer
, 4);
529 write_register_bytes (REGISTER_BYTE (CPS_REGNUM
), raw_buffer
, 4);
531 if (fsr
.regs
[G1_REGNUM
])
533 read_memory (fsr
.regs
[G1_REGNUM
], raw_buffer
, 7 * 4);
534 write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
, 7 * 4);
536 if (fsr
.regs
[I0_REGNUM
])
540 char reg_temp
[REGISTER_BYTES
];
542 read_memory (fsr
.regs
[I0_REGNUM
], raw_buffer
, 8 * 4);
544 /* Get the ins and locals which we are about to restore. Just
545 moving the stack pointer is all that is really needed, except
546 store_inferior_registers is then going to write the ins and
547 locals from the registers array, so we need to muck with the
549 sp
= fsr
.regs
[SP_REGNUM
];
550 read_memory (sp
, reg_temp
, REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
552 /* Restore the out registers.
553 Among other things this writes the new stack pointer. */
554 write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
555 REGISTER_RAW_SIZE (O0_REGNUM
) * 8);
557 write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
558 REGISTER_RAW_SIZE (L0_REGNUM
) * 16);
560 if (fsr
.regs
[PS_REGNUM
])
561 write_register (PS_REGNUM
, read_memory_integer (fsr
.regs
[PS_REGNUM
], 4));
562 if (fsr
.regs
[Y_REGNUM
])
563 write_register (Y_REGNUM
, read_memory_integer (fsr
.regs
[Y_REGNUM
], 4));
564 if (fsr
.regs
[PC_REGNUM
])
566 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
567 write_register (PC_REGNUM
, read_memory_integer (fsr
.regs
[PC_REGNUM
], 4));
568 if (fsr
.regs
[NPC_REGNUM
])
569 write_register (NPC_REGNUM
,
570 read_memory_integer (fsr
.regs
[NPC_REGNUM
], 4));
572 else if (fsr
.regs
[I7_REGNUM
])
574 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
575 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
.regs
[I7_REGNUM
], 4));
576 write_register (PC_REGNUM
, pc
);
577 write_register (NPC_REGNUM
, pc
+ 4);
579 flush_cached_frames ();
582 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
583 encodes the structure size being returned. If we detect such
584 a fake insn, step past it. */
594 err
= target_read_memory (pc
+ 8, buf
, sizeof(long));
595 insn
= extract_unsigned_integer (buf
, 4);
596 if ((err
== 0) && (insn
& 0xfffffe00) == 0)
602 #ifdef USE_PROC_FS /* Target dependent support for /proc */
604 /* The /proc interface divides the target machine's register set up into
605 two different sets, the general register set (gregset) and the floating
606 point register set (fpregset). For each set, there is an ioctl to get
607 the current register set and another ioctl to set the current values.
609 The actual structure passed through the ioctl interface is, of course,
610 naturally machine dependent, and is different for each set of registers.
611 For the sparc for example, the general register set is typically defined
614 typedef int gregset_t[38];
620 and the floating point set by:
622 typedef struct prfpregset {
630 u_char pr_q_entrysize;
635 These routines provide the packing and unpacking of gregset_t and
636 fpregset_t formatted data.
641 /* Given a pointer to a general register set in /proc format (gregset_t *),
642 unpack the register contents and supply them as gdb's idea of the current
646 supply_gregset (gregsetp
)
647 prgregset_t
*gregsetp
;
650 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
652 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
653 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
655 supply_register (regi
, (char *) (regp
+ regi
));
658 /* These require a bit more care. */
659 supply_register (PS_REGNUM
, (char *) (regp
+ R_PS
));
660 supply_register (PC_REGNUM
, (char *) (regp
+ R_PC
));
661 supply_register (NPC_REGNUM
,(char *) (regp
+ R_nPC
));
662 supply_register (Y_REGNUM
, (char *) (regp
+ R_Y
));
666 fill_gregset (gregsetp
, regno
)
667 prgregset_t
*gregsetp
;
671 register prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
672 extern char registers
[];
674 for (regi
= 0 ; regi
<= R_I7
; regi
++)
676 if ((regno
== -1) || (regno
== regi
))
678 *(regp
+ regi
) = *(int *) ®isters
[REGISTER_BYTE (regi
)];
681 if ((regno
== -1) || (regno
== PS_REGNUM
))
683 *(regp
+ R_PS
) = *(int *) ®isters
[REGISTER_BYTE (PS_REGNUM
)];
685 if ((regno
== -1) || (regno
== PC_REGNUM
))
687 *(regp
+ R_PC
) = *(int *) ®isters
[REGISTER_BYTE (PC_REGNUM
)];
689 if ((regno
== -1) || (regno
== NPC_REGNUM
))
691 *(regp
+ R_nPC
) = *(int *) ®isters
[REGISTER_BYTE (NPC_REGNUM
)];
693 if ((regno
== -1) || (regno
== Y_REGNUM
))
695 *(regp
+ R_Y
) = *(int *) ®isters
[REGISTER_BYTE (Y_REGNUM
)];
699 #if defined (FP0_REGNUM)
701 /* Given a pointer to a floating point register set in /proc format
702 (fpregset_t *), unpack the register contents and supply them as gdb's
703 idea of the current floating point register values. */
706 supply_fpregset (fpregsetp
)
707 prfpregset_t
*fpregsetp
;
712 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
714 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
715 supply_register (regi
, from
);
717 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
720 /* Given a pointer to a floating point register set in /proc format
721 (fpregset_t *), update the register specified by REGNO from gdb's idea
722 of the current floating point register set. If REGNO is -1, update
726 fill_fpregset (fpregsetp
, regno
)
727 prfpregset_t
*fpregsetp
;
733 extern char registers
[];
735 for (regi
= FP0_REGNUM
; regi
< FP0_REGNUM
+32 ; regi
++)
737 if ((regno
== -1) || (regno
== regi
))
739 from
= (char *) ®isters
[REGISTER_BYTE (regi
)];
740 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
-FP0_REGNUM
];
741 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
744 if ((regno
== -1) || (regno
== FPS_REGNUM
))
746 fpregsetp
->pr_fsr
= *(int *) ®isters
[REGISTER_BYTE (FPS_REGNUM
)];
750 #endif /* defined (FP0_REGNUM) */
752 #endif /* USE_PROC_FS */
755 #ifdef GET_LONGJMP_TARGET
757 /* Figure out where the longjmp will land. We expect that we have just entered
758 longjmp and haven't yet setup the stack frame, so the args are still in the
759 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
760 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
761 This routine returns true on success */
764 get_longjmp_target(pc
)
768 #define LONGJMP_TARGET_SIZE 4
769 char buf
[LONGJMP_TARGET_SIZE
];
771 jb_addr
= read_register(O0_REGNUM
);
773 if (target_read_memory(jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
774 LONGJMP_TARGET_SIZE
))
777 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
781 #endif /* GET_LONGJMP_TARGET */