1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation,
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
27 #include "arch-utils.h"
33 #include "gdb_string.h"
38 #include <sys/procfs.h>
39 /* Prototypes for supply_gregset etc. */
45 #include "symfile.h" /* for 'entry_point_address' */
48 * Some local macros that have multi-arch and non-multi-arch versions:
51 #if (GDB_MULTI_ARCH > 0)
53 /* Does the target have Floating Point registers? */
54 #define SPARC_HAS_FPU (gdbarch_tdep (current_gdbarch)->has_fpu)
55 /* Number of bytes devoted to Floating Point registers: */
56 #define FP_REGISTER_BYTES (gdbarch_tdep (current_gdbarch)->fp_register_bytes)
57 /* Highest numbered Floating Point register. */
58 #define FP_MAX_REGNUM (gdbarch_tdep (current_gdbarch)->fp_max_regnum)
59 /* Size of a general (integer) register: */
60 #define SPARC_INTREG_SIZE (gdbarch_tdep (current_gdbarch)->intreg_size)
61 /* Offset within the call dummy stack of the saved registers. */
62 #define DUMMY_REG_SAVE_OFFSET (gdbarch_tdep (current_gdbarch)->reg_save_offset)
64 #else /* non-multi-arch */
67 /* Does the target have Floating Point registers? */
68 #if defined(TARGET_SPARCLET) || defined(TARGET_SPARCLITE)
69 #define SPARC_HAS_FPU 0
71 #define SPARC_HAS_FPU 1
74 /* Number of bytes devoted to Floating Point registers: */
75 #if (GDB_TARGET_IS_SPARC64)
76 #define FP_REGISTER_BYTES (64 * 4)
79 #define FP_REGISTER_BYTES (32 * 4)
81 #define FP_REGISTER_BYTES 0
85 /* Highest numbered Floating Point register. */
86 #if (GDB_TARGET_IS_SPARC64)
87 #define FP_MAX_REGNUM (FP0_REGNUM + 48)
89 #define FP_MAX_REGNUM (FP0_REGNUM + 32)
92 /* Size of a general (integer) register: */
93 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
95 /* Offset within the call dummy stack of the saved registers. */
96 #if (GDB_TARGET_IS_SPARC64)
97 #define DUMMY_REG_SAVE_OFFSET (128 + 16)
99 #define DUMMY_REG_SAVE_OFFSET 0x60
102 #endif /* GDB_MULTI_ARCH */
107 int fp_register_bytes
;
112 int call_dummy_call_offset
;
115 enum gdb_osabi osabi
;
118 /* Now make GDB_TARGET_IS_SPARC64 a runtime test. */
119 /* FIXME MVS: or try testing bfd_arch_info.arch and bfd_arch_info.mach ...
120 * define GDB_TARGET_IS_SPARC64 \
121 * (TARGET_ARCHITECTURE->arch == bfd_arch_sparc && \
122 * (TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9 || \
123 * TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9a))
127 extern int stop_after_trap
;
129 /* We don't store all registers immediately when requested, since they
130 get sent over in large chunks anyway. Instead, we accumulate most
131 of the changes and send them over once. "deferred_stores" keeps
132 track of which sets of registers we have locally-changed copies of,
133 so we only need send the groups that have changed. */
135 int deferred_stores
= 0; /* Accumulated stores we want to do eventually. */
138 /* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
139 where instructions are big-endian and data are little-endian.
140 This flag is set when we detect that the target is of this type. */
145 /* Fetch a single instruction. Even on bi-endian machines
146 such as sparc86x, instructions are always big-endian. */
149 fetch_instruction (CORE_ADDR pc
)
151 unsigned long retval
;
153 unsigned char buf
[4];
155 read_memory (pc
, buf
, sizeof (buf
));
157 /* Start at the most significant end of the integer, and work towards
158 the least significant. */
160 for (i
= 0; i
< sizeof (buf
); ++i
)
161 retval
= (retval
<< 8) | buf
[i
];
166 /* Branches with prediction are treated like their non-predicting cousins. */
167 /* FIXME: What about floating point branches? */
169 /* Macros to extract fields from sparc instructions. */
170 #define X_OP(i) (((i) >> 30) & 0x3)
171 #define X_RD(i) (((i) >> 25) & 0x1f)
172 #define X_A(i) (((i) >> 29) & 1)
173 #define X_COND(i) (((i) >> 25) & 0xf)
174 #define X_OP2(i) (((i) >> 22) & 0x7)
175 #define X_IMM22(i) ((i) & 0x3fffff)
176 #define X_OP3(i) (((i) >> 19) & 0x3f)
177 #define X_RS1(i) (((i) >> 14) & 0x1f)
178 #define X_I(i) (((i) >> 13) & 1)
179 #define X_IMM13(i) ((i) & 0x1fff)
180 /* Sign extension macros. */
181 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
182 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
183 #define X_CC(i) (((i) >> 20) & 3)
184 #define X_P(i) (((i) >> 19) & 1)
185 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
186 #define X_RCOND(i) (((i) >> 25) & 7)
187 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
188 #define X_FCN(i) (((i) >> 25) & 31)
192 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
, done_retry
195 /* Simulate single-step ptrace call for sun4. Code written by Gary
196 Beihl (beihl@mcc.com). */
198 /* npc4 and next_pc describe the situation at the time that the
199 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
200 static CORE_ADDR next_pc
, npc4
, target
;
201 static int brknpc4
, brktrg
;
202 typedef char binsn_quantum
[BREAKPOINT_MAX
];
203 static binsn_quantum break_mem
[3];
205 static branch_type
isbranch (long, CORE_ADDR
, CORE_ADDR
*);
207 /* single_step() is called just before we want to resume the inferior,
208 if we want to single-step it but there is no hardware or kernel single-step
209 support (as on all SPARCs). We find all the possible targets of the
210 coming instruction and breakpoint them.
212 single_step is also called just after the inferior stops. If we had
213 set up a simulated single-step, we undo our damage. */
216 sparc_software_single_step (enum target_signal ignore
, /* pid, but we don't need it */
217 int insert_breakpoints_p
)
223 if (insert_breakpoints_p
)
225 /* Always set breakpoint for NPC. */
226 next_pc
= read_register (NPC_REGNUM
);
227 npc4
= next_pc
+ 4; /* branch not taken */
229 target_insert_breakpoint (next_pc
, break_mem
[0]);
230 /* printf_unfiltered ("set break at %x\n",next_pc); */
232 pc
= read_register (PC_REGNUM
);
233 pc_instruction
= fetch_instruction (pc
);
234 br
= isbranch (pc_instruction
, pc
, &target
);
235 brknpc4
= brktrg
= 0;
239 /* Conditional annulled branch will either end up at
240 npc (if taken) or at npc+4 (if not taken).
243 target_insert_breakpoint (npc4
, break_mem
[1]);
245 else if (br
== baa
&& target
!= next_pc
)
247 /* Unconditional annulled branch will always end up at
250 target_insert_breakpoint (target
, break_mem
[2]);
252 else if (GDB_TARGET_IS_SPARC64
&& br
== done_retry
)
255 target_insert_breakpoint (target
, break_mem
[2]);
260 /* Remove breakpoints */
261 target_remove_breakpoint (next_pc
, break_mem
[0]);
264 target_remove_breakpoint (npc4
, break_mem
[1]);
267 target_remove_breakpoint (target
, break_mem
[2]);
271 struct frame_extra_info
276 /* Following fields only relevant for flat frames. */
279 /* Add this to ->frame to get the value of the stack pointer at the
280 time of the register saves. */
284 /* Call this for each newly created frame. For SPARC, we need to
285 calculate the bottom of the frame, and do some extra work if the
286 prologue has been generated via the -mflat option to GCC. In
287 particular, we need to know where the previous fp and the pc have
288 been stashed, since their exact position within the frame may vary. */
291 sparc_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
294 CORE_ADDR prologue_start
, prologue_end
;
297 fi
->extra_info
= (struct frame_extra_info
*)
298 frame_obstack_alloc (sizeof (struct frame_extra_info
));
299 frame_saved_regs_zalloc (fi
);
301 fi
->extra_info
->bottom
=
303 (fi
->frame
== fi
->next
->frame
? fi
->next
->extra_info
->bottom
:
304 fi
->next
->frame
) : read_sp ());
306 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
307 to create_new_frame. */
312 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
314 /* Compute ->frame as if not flat. If it is flat, we'll change
316 if (fi
->next
->next
!= NULL
317 && ((get_frame_type (fi
->next
->next
) == SIGTRAMP_FRAME
)
318 || deprecated_frame_in_dummy (fi
->next
->next
))
319 && frameless_look_for_prologue (fi
->next
))
321 /* A frameless function interrupted by a signal did not change
322 the frame pointer, fix up frame pointer accordingly. */
323 fi
->frame
= get_frame_base (fi
->next
);
324 fi
->extra_info
->bottom
= fi
->next
->extra_info
->bottom
;
328 /* Should we adjust for stack bias here? */
329 get_saved_register (buf
, 0, 0, fi
, FP_REGNUM
, 0);
330 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
));
332 if (GDB_TARGET_IS_SPARC64
&& (fi
->frame
& 1))
337 /* Decide whether this is a function with a ``flat register window''
338 frame. For such functions, the frame pointer is actually in %i7. */
339 fi
->extra_info
->flat
= 0;
340 fi
->extra_info
->in_prologue
= 0;
341 if (find_pc_partial_function (fi
->pc
, &name
, &prologue_start
, &prologue_end
))
343 /* See if the function starts with an add (which will be of a
344 negative number if a flat frame) to the sp. FIXME: Does not
345 handle large frames which will need more than one instruction
347 insn
= fetch_instruction (prologue_start
);
348 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
349 && X_I (insn
) && X_SIMM13 (insn
) < 0)
351 int offset
= X_SIMM13 (insn
);
353 /* Then look for a save of %i7 into the frame. */
354 insn
= fetch_instruction (prologue_start
+ 4);
358 && X_RS1 (insn
) == 14)
362 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
364 /* We definitely have a flat frame now. */
365 fi
->extra_info
->flat
= 1;
367 fi
->extra_info
->sp_offset
= offset
;
369 /* Overwrite the frame's address with the value in %i7. */
370 get_saved_register (buf
, 0, 0, fi
, I7_REGNUM
, 0);
371 fi
->frame
= extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
));
373 if (GDB_TARGET_IS_SPARC64
&& (fi
->frame
& 1))
376 /* Record where the fp got saved. */
377 fi
->extra_info
->fp_addr
=
378 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
380 /* Also try to collect where the pc got saved to. */
381 fi
->extra_info
->pc_addr
= 0;
382 insn
= fetch_instruction (prologue_start
+ 12);
386 && X_RS1 (insn
) == 14)
387 fi
->extra_info
->pc_addr
=
388 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
393 /* Check if the PC is in the function prologue before a SAVE
394 instruction has been executed yet. If so, set the frame
395 to the current value of the stack pointer and set
396 the in_prologue flag. */
398 struct symtab_and_line sal
;
400 sal
= find_pc_line (prologue_start
, 0);
401 if (sal
.line
== 0) /* no line info, use PC */
402 prologue_end
= fi
->pc
;
403 else if (sal
.end
< prologue_end
)
404 prologue_end
= sal
.end
;
405 if (fi
->pc
< prologue_end
)
407 for (addr
= prologue_start
; addr
< fi
->pc
; addr
+= 4)
409 insn
= read_memory_integer (addr
, 4);
410 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
411 break; /* SAVE seen, stop searching */
415 fi
->extra_info
->in_prologue
= 1;
416 fi
->frame
= read_register (SP_REGNUM
);
421 if (fi
->next
&& fi
->frame
== 0)
423 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
424 fi
->frame
= fi
->next
->frame
;
425 fi
->pc
= fi
->next
->pc
;
430 sparc_frame_chain (struct frame_info
*frame
)
432 /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
433 value. If it really is zero, we detect it later in
434 sparc_init_prev_frame. */
435 return (CORE_ADDR
) 1;
439 sparc_extract_struct_value_address (char *regbuf
)
441 return extract_address (regbuf
+ REGISTER_BYTE (O0_REGNUM
),
442 REGISTER_RAW_SIZE (O0_REGNUM
));
445 /* Find the pc saved in frame FRAME. */
448 sparc_frame_saved_pc (struct frame_info
*frame
)
453 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
454 if ((get_frame_type (frame
) == SIGTRAMP_FRAME
))
456 /* This is the signal trampoline frame.
457 Get the saved PC from the sigcontext structure. */
459 #ifndef SIGCONTEXT_PC_OFFSET
460 #define SIGCONTEXT_PC_OFFSET 12
463 CORE_ADDR sigcontext_addr
;
465 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
468 scbuf
= alloca (TARGET_PTR_BIT
/ HOST_CHAR_BIT
);
470 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
471 as the third parameter. The offset to the saved pc is 12. */
472 find_pc_partial_function (frame
->pc
, &name
,
473 (CORE_ADDR
*) NULL
, (CORE_ADDR
*) NULL
);
474 if (name
&& STREQ (name
, "ucbsigvechandler"))
475 saved_pc_offset
= 12;
477 /* The sigcontext address is contained in register O2. */
478 get_saved_register (buf
, (int *) NULL
, (CORE_ADDR
*) NULL
,
479 frame
, O0_REGNUM
+ 2, (enum lval_type
*) NULL
);
480 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
+ 2));
482 /* Don't cause a memory_error when accessing sigcontext in case the
483 stack layout has changed or the stack is corrupt. */
484 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
485 scbuf
, sizeof (scbuf
));
486 return extract_address (scbuf
, sizeof (scbuf
));
488 else if (frame
->extra_info
->in_prologue
||
489 (frame
->next
!= NULL
&&
490 ((get_frame_type (frame
->next
) == SIGTRAMP_FRAME
) ||
491 deprecated_frame_in_dummy (frame
->next
)) &&
492 frameless_look_for_prologue (frame
)))
494 /* A frameless function interrupted by a signal did not save
495 the PC, it is still in %o7. */
496 get_saved_register (buf
, (int *) NULL
, (CORE_ADDR
*) NULL
,
497 frame
, O7_REGNUM
, (enum lval_type
*) NULL
);
498 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
500 if (frame
->extra_info
->flat
)
501 addr
= frame
->extra_info
->pc_addr
;
503 addr
= frame
->extra_info
->bottom
+ FRAME_SAVED_I0
+
504 SPARC_INTREG_SIZE
* (I7_REGNUM
- I0_REGNUM
);
507 /* A flat frame leaf function might not save the PC anywhere,
508 just leave it in %o7. */
509 return PC_ADJUST (read_register (O7_REGNUM
));
511 read_memory (addr
, buf
, SPARC_INTREG_SIZE
);
512 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
515 /* Since an individual frame in the frame cache is defined by two
516 arguments (a frame pointer and a stack pointer), we need two
517 arguments to get info for an arbitrary stack frame. This routine
518 takes two arguments and makes the cached frames look as if these
519 two arguments defined a frame on the cache. This allows the rest
520 of info frame to extract the important arguments without
524 setup_arbitrary_frame (int argc
, CORE_ADDR
*argv
)
526 struct frame_info
*frame
;
529 error ("Sparc frame specifications require two arguments: fp and sp");
531 frame
= create_new_frame (argv
[0], 0);
534 internal_error (__FILE__
, __LINE__
,
535 "create_new_frame returned invalid frame");
537 frame
->extra_info
->bottom
= argv
[1];
538 frame
->pc
= FRAME_SAVED_PC (frame
);
542 /* Given a pc value, skip it forward past the function prologue by
543 disassembling instructions that appear to be a prologue.
545 If FRAMELESS_P is set, we are only testing to see if the function
546 is frameless. This allows a quicker answer.
548 This routine should be more specific in its actions; making sure
549 that it uses the same register in the initial prologue section. */
551 static CORE_ADDR
examine_prologue (CORE_ADDR
, int, struct frame_info
*,
555 examine_prologue (CORE_ADDR start_pc
, int frameless_p
, struct frame_info
*fi
,
556 CORE_ADDR
*saved_regs
)
560 CORE_ADDR pc
= start_pc
;
563 insn
= fetch_instruction (pc
);
565 /* Recognize the `sethi' insn and record its destination. */
566 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
570 insn
= fetch_instruction (pc
);
573 /* Recognize an add immediate value to register to either %g1 or
574 the destination register recorded above. Actually, this might
575 well recognize several different arithmetic operations.
576 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
577 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
578 I imagine any compiler really does that, however). */
581 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
584 insn
= fetch_instruction (pc
);
587 /* Recognize any SAVE insn. */
588 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
591 if (frameless_p
) /* If the save is all we care about, */
592 return pc
; /* return before doing more work */
593 insn
= fetch_instruction (pc
);
595 /* Recognize add to %sp. */
596 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
599 if (frameless_p
) /* If the add is all we care about, */
600 return pc
; /* return before doing more work */
602 insn
= fetch_instruction (pc
);
603 /* Recognize store of frame pointer (i7). */
607 && X_RS1 (insn
) == 14)
610 insn
= fetch_instruction (pc
);
612 /* Recognize sub %sp, <anything>, %i7. */
615 && X_RS1 (insn
) == 14
616 && X_RD (insn
) == 31)
619 insn
= fetch_instruction (pc
);
628 /* Without a save or add instruction, it's not a prologue. */
633 /* Recognize stores into the frame from the input registers.
634 This recognizes all non alternate stores of an input register,
635 into a location offset from the frame pointer between
638 /* The above will fail for arguments that are promoted
639 (eg. shorts to ints or floats to doubles), because the compiler
640 will pass them in positive-offset frame space, but the prologue
641 will save them (after conversion) in negative frame space at an
642 unpredictable offset. Therefore I am going to remove the
643 restriction on the target-address of the save, on the theory
644 that any unbroken sequence of saves from input registers must
645 be part of the prologue. In un-optimized code (at least), I'm
646 fairly sure that the compiler would emit SOME other instruction
647 (eg. a move or add) before emitting another save that is actually
648 a part of the function body.
650 Besides, the reserved stack space is different for SPARC64 anyway.
655 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
656 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
657 && X_I (insn
) /* Immediate mode. */
658 && X_RS1 (insn
) == 30) /* Off of frame pointer. */
659 ; /* empty statement -- fall thru to end of loop */
660 else if (GDB_TARGET_IS_SPARC64
662 && (X_OP3 (insn
) & 0x3c) == 12 /* store, extended (64-bit) */
663 && (X_RD (insn
) & 0x18) == 0x18 /* input register */
664 && X_I (insn
) /* immediate mode */
665 && X_RS1 (insn
) == 30) /* off of frame pointer */
666 ; /* empty statement -- fall thru to end of loop */
667 else if (X_OP (insn
) == 3
668 && (X_OP3 (insn
) & 0x3c) == 36 /* store, floating-point */
669 && X_I (insn
) /* immediate mode */
670 && X_RS1 (insn
) == 30) /* off of frame pointer */
671 ; /* empty statement -- fall thru to end of loop */
674 && X_OP3 (insn
) == 4 /* store? */
675 && X_RS1 (insn
) == 14) /* off of frame pointer */
677 if (saved_regs
&& X_I (insn
))
678 saved_regs
[X_RD (insn
)] =
679 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
684 insn
= fetch_instruction (pc
);
690 /* Advance PC across any function entry prologue instructions to reach
694 sparc_skip_prologue (CORE_ADDR start_pc
)
696 struct symtab_and_line sal
;
697 CORE_ADDR func_start
, func_end
;
699 /* This is the preferred method, find the end of the prologue by
700 using the debugging information. */
701 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
703 sal
= find_pc_line (func_start
, 0);
705 if (sal
.end
< func_end
706 && start_pc
<= sal
.end
)
710 /* Oh well, examine the code by hand. */
711 return examine_prologue (start_pc
, 0, NULL
, NULL
);
714 /* Is the prologue at IP frameless? */
717 sparc_prologue_frameless_p (CORE_ADDR ip
)
719 return ip
== examine_prologue (ip
, 1, NULL
, NULL
);
722 /* Check instruction at ADDR to see if it is a branch.
723 All non-annulled instructions will go to NPC or will trap.
724 Set *TARGET if we find a candidate branch; set to zero if not.
726 This isn't static as it's used by remote-sa.sparc.c. */
729 isbranch (long instruction
, CORE_ADDR addr
, CORE_ADDR
*target
)
731 branch_type val
= not_branch
;
732 long int offset
= 0; /* Must be signed for sign-extend. */
736 if (X_OP (instruction
) == 0
737 && (X_OP2 (instruction
) == 2
738 || X_OP2 (instruction
) == 6
739 || X_OP2 (instruction
) == 1
740 || X_OP2 (instruction
) == 3
741 || X_OP2 (instruction
) == 5
742 || (GDB_TARGET_IS_SPARC64
&& X_OP2 (instruction
) == 7)))
744 if (X_COND (instruction
) == 8)
745 val
= X_A (instruction
) ? baa
: ba
;
747 val
= X_A (instruction
) ? bicca
: bicc
;
748 switch (X_OP2 (instruction
))
751 if (!GDB_TARGET_IS_SPARC64
)
756 offset
= 4 * X_DISP22 (instruction
);
760 offset
= 4 * X_DISP19 (instruction
);
763 offset
= 4 * X_DISP16 (instruction
);
766 *target
= addr
+ offset
;
768 else if (GDB_TARGET_IS_SPARC64
769 && X_OP (instruction
) == 2
770 && X_OP3 (instruction
) == 62)
772 if (X_FCN (instruction
) == 0)
775 *target
= read_register (TNPC_REGNUM
);
778 else if (X_FCN (instruction
) == 1)
781 *target
= read_register (TPC_REGNUM
);
789 /* Find register number REGNUM relative to FRAME and put its
790 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
791 was optimized out (and thus can't be fetched). If the variable
792 was fetched from memory, set *ADDRP to where it was fetched from,
793 otherwise it was fetched from a register.
795 The argument RAW_BUFFER must point to aligned memory. */
798 sparc_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
799 struct frame_info
*frame
, int regnum
,
800 enum lval_type
*lval
)
802 struct frame_info
*frame1
;
805 if (!target_has_registers
)
806 error ("No registers.");
813 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
816 /* error ("No selected frame."); */
817 if (!target_has_registers
)
818 error ("The program has no registers now.");
819 if (selected_frame
== NULL
)
820 error ("No selected frame.");
821 /* Try to use selected frame */
822 frame
= get_prev_frame (selected_frame
);
824 error ("Cmd not meaningful in the outermost frame.");
828 frame1
= frame
->next
;
830 /* Get saved PC from the frame info if not in innermost frame. */
831 if (regnum
== PC_REGNUM
&& frame1
!= NULL
)
835 if (raw_buffer
!= NULL
)
837 /* Put it back in target format. */
838 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), frame
->pc
);
845 while (frame1
!= NULL
)
847 /* FIXME MVS: wrong test for dummy frame at entry. */
849 if (frame1
->pc
>= (frame1
->extra_info
->bottom
?
850 frame1
->extra_info
->bottom
: read_sp ())
851 && frame1
->pc
<= get_frame_base (frame1
))
853 /* Dummy frame. All but the window regs are in there somewhere.
854 The window registers are saved on the stack, just like in a
856 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
857 addr
= frame1
->frame
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
858 - (FP_REGISTER_BYTES
+ 8 * SPARC_INTREG_SIZE
);
859 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
860 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
861 is safe/cheap - there will always be a prev frame.
862 This is because frame1 is initialized to frame->next
863 (frame1->prev == frame) and is then advanced towards
864 the innermost (next) frame. */
865 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
866 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
868 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
869 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
870 is safe/cheap - there will always be a prev frame.
871 This is because frame1 is initialized to frame->next
872 (frame1->prev == frame) and is then advanced towards
873 the innermost (next) frame. */
874 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
875 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
877 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
878 addr
= frame1
->frame
+ (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
879 - (FP_REGISTER_BYTES
+ 16 * SPARC_INTREG_SIZE
);
880 else if (SPARC_HAS_FPU
&&
881 regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ 32)
882 addr
= frame1
->frame
+ (regnum
- FP0_REGNUM
) * 4
883 - (FP_REGISTER_BYTES
);
884 else if (GDB_TARGET_IS_SPARC64
&& SPARC_HAS_FPU
&&
885 regnum
>= FP0_REGNUM
+ 32 && regnum
< FP_MAX_REGNUM
)
886 addr
= frame1
->frame
+ 32 * 4 + (regnum
- FP0_REGNUM
- 32) * 8
887 - (FP_REGISTER_BYTES
);
888 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
889 addr
= frame1
->frame
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
890 - (FP_REGISTER_BYTES
+ 24 * SPARC_INTREG_SIZE
);
892 else if (frame1
->extra_info
->flat
)
895 if (regnum
== RP_REGNUM
)
896 addr
= frame1
->extra_info
->pc_addr
;
897 else if (regnum
== I7_REGNUM
)
898 addr
= frame1
->extra_info
->fp_addr
;
901 CORE_ADDR func_start
;
904 regs
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
905 memset (regs
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
907 find_pc_partial_function (frame1
->pc
, NULL
, &func_start
, NULL
);
908 examine_prologue (func_start
, 0, frame1
, regs
);
914 /* Normal frame. Local and In registers are saved on stack. */
915 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
916 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
917 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
919 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
920 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
921 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
923 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
925 /* Outs become ins. */
926 get_saved_register (raw_buffer
, optimized
, addrp
, frame1
,
927 (regnum
- O0_REGNUM
+ I0_REGNUM
), lval
);
933 frame1
= frame1
->next
;
939 if (regnum
== SP_REGNUM
)
941 if (raw_buffer
!= NULL
)
943 /* Put it back in target format. */
944 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
950 if (raw_buffer
!= NULL
)
951 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
956 *lval
= lval_register
;
957 addr
= REGISTER_BYTE (regnum
);
958 if (raw_buffer
!= NULL
)
959 deprecated_read_register_gen (regnum
, raw_buffer
);
965 /* Push an empty stack frame, and record in it the current PC, regs, etc.
967 We save the non-windowed registers and the ins. The locals and outs
968 are new; they don't need to be saved. The i's and l's of
969 the last frame were already saved on the stack. */
971 /* Definitely see tm-sparc.h for more doc of the frame format here. */
973 /* See tm-sparc.h for how this is calculated. */
975 #define DUMMY_STACK_REG_BUF_SIZE \
976 (((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
977 #define DUMMY_STACK_SIZE \
978 (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
981 sparc_push_dummy_frame (void)
983 CORE_ADDR sp
, old_sp
;
986 register_temp
= alloca (DUMMY_STACK_SIZE
);
988 old_sp
= sp
= read_sp ();
990 if (GDB_TARGET_IS_SPARC64
)
992 /* PC, NPC, CCR, FSR, FPRS, Y, ASI */
993 deprecated_read_register_bytes (REGISTER_BYTE (PC_REGNUM
),
995 REGISTER_RAW_SIZE (PC_REGNUM
) * 7);
996 deprecated_read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM
),
997 ®ister_temp
[7 * SPARC_INTREG_SIZE
],
998 REGISTER_RAW_SIZE (PSTATE_REGNUM
));
999 /* FIXME: not sure what needs to be saved here. */
1003 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
1004 deprecated_read_register_bytes (REGISTER_BYTE (Y_REGNUM
),
1006 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
1009 deprecated_read_register_bytes (REGISTER_BYTE (O0_REGNUM
),
1010 ®ister_temp
[8 * SPARC_INTREG_SIZE
],
1011 SPARC_INTREG_SIZE
* 8);
1013 deprecated_read_register_bytes (REGISTER_BYTE (G0_REGNUM
),
1014 ®ister_temp
[16 * SPARC_INTREG_SIZE
],
1015 SPARC_INTREG_SIZE
* 8);
1018 deprecated_read_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1019 ®ister_temp
[24 * SPARC_INTREG_SIZE
],
1022 sp
-= DUMMY_STACK_SIZE
;
1026 write_memory (sp
+ DUMMY_REG_SAVE_OFFSET
, ®ister_temp
[0],
1027 DUMMY_STACK_REG_BUF_SIZE
);
1029 if (strcmp (target_shortname
, "sim") != 0)
1031 /* NOTE: cagney/2002-04-04: The code below originally contained
1032 GDB's _only_ call to write_fp(). That call was eliminated by
1033 inlining the corresponding code. For the 64 bit case, the
1034 old function (sparc64_write_fp) did the below although I'm
1035 not clear why. The same goes for why this is only done when
1036 the underlying target is a simulator. */
1037 if (GDB_TARGET_IS_SPARC64
)
1039 /* Target is a 64 bit SPARC. */
1040 CORE_ADDR oldfp
= read_register (FP_REGNUM
);
1042 write_register (FP_REGNUM
, old_sp
- 2047);
1044 write_register (FP_REGNUM
, old_sp
);
1048 /* Target is a 32 bit SPARC. */
1049 write_register (FP_REGNUM
, old_sp
);
1051 /* Set return address register for the call dummy to the current PC. */
1052 write_register (I7_REGNUM
, read_pc () - 8);
1056 /* The call dummy will write this value to FP before executing
1057 the 'save'. This ensures that register window flushes work
1058 correctly in the simulator. */
1059 write_register (G0_REGNUM
+ 1, read_register (FP_REGNUM
));
1061 /* The call dummy will write this value to FP after executing
1063 write_register (G0_REGNUM
+ 2, old_sp
);
1065 /* The call dummy will write this value to the return address (%i7) after
1066 executing the 'save'. */
1067 write_register (G0_REGNUM
+ 3, read_pc () - 8);
1069 /* Set the FP that the call dummy will be using after the 'save'.
1070 This makes backtraces from an inferior function call work properly. */
1071 write_register (FP_REGNUM
, old_sp
);
1075 /* sparc_frame_find_saved_regs (). This function is here only because
1076 pop_frame uses it. Note there is an interesting corner case which
1077 I think few ports of GDB get right--if you are popping a frame
1078 which does not save some register that *is* saved by a more inner
1079 frame (such a frame will never be a dummy frame because dummy
1080 frames save all registers). Rewriting pop_frame to use
1081 get_saved_register would solve this problem and also get rid of the
1082 ugly duplication between sparc_frame_find_saved_regs and
1085 Stores, into an array of CORE_ADDR,
1086 the addresses of the saved registers of frame described by FRAME_INFO.
1087 This includes special registers such as pc and fp saved in special
1088 ways in the stack frame. sp is even more special:
1089 the address we return for it IS the sp for the next frame.
1091 Note that on register window machines, we are currently making the
1092 assumption that window registers are being saved somewhere in the
1093 frame in which they are being used. If they are stored in an
1094 inferior frame, find_saved_register will break.
1096 On the Sun 4, the only time all registers are saved is when
1097 a dummy frame is involved. Otherwise, the only saved registers
1098 are the LOCAL and IN registers which are saved as a result
1099 of the "save/restore" opcodes. This condition is determined
1100 by address rather than by value.
1102 The "pc" is not stored in a frame on the SPARC. (What is stored
1103 is a return address minus 8.) sparc_pop_frame knows how to
1104 deal with that. Other routines might or might not.
1106 See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
1107 about how this works. */
1109 static void sparc_frame_find_saved_regs (struct frame_info
*, CORE_ADDR
*);
1112 sparc_frame_find_saved_regs (struct frame_info
*fi
, CORE_ADDR
*saved_regs_addr
)
1114 register int regnum
;
1115 CORE_ADDR frame_addr
= get_frame_base (fi
);
1118 internal_error (__FILE__
, __LINE__
,
1119 "Bad frame info struct in FRAME_FIND_SAVED_REGS");
1121 memset (saved_regs_addr
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
1123 if (fi
->pc
>= (fi
->extra_info
->bottom
?
1124 fi
->extra_info
->bottom
: read_sp ())
1125 && fi
->pc
<= get_frame_base (fi
))
1127 /* Dummy frame. All but the window regs are in there somewhere. */
1128 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+ 7; regnum
++)
1129 saved_regs_addr
[regnum
] =
1130 frame_addr
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
1131 - DUMMY_STACK_REG_BUF_SIZE
+ 16 * SPARC_INTREG_SIZE
;
1133 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1134 saved_regs_addr
[regnum
] =
1135 frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1136 - DUMMY_STACK_REG_BUF_SIZE
+ 8 * SPARC_INTREG_SIZE
;
1139 for (regnum
= FP0_REGNUM
; regnum
< FP_MAX_REGNUM
; regnum
++)
1140 saved_regs_addr
[regnum
] = frame_addr
+ (regnum
- FP0_REGNUM
) * 4
1141 - DUMMY_STACK_REG_BUF_SIZE
+ 24 * SPARC_INTREG_SIZE
;
1143 if (GDB_TARGET_IS_SPARC64
)
1145 for (regnum
= PC_REGNUM
; regnum
< PC_REGNUM
+ 7; regnum
++)
1147 saved_regs_addr
[regnum
] =
1148 frame_addr
+ (regnum
- PC_REGNUM
) * SPARC_INTREG_SIZE
1149 - DUMMY_STACK_REG_BUF_SIZE
;
1151 saved_regs_addr
[PSTATE_REGNUM
] =
1152 frame_addr
+ 8 * SPARC_INTREG_SIZE
- DUMMY_STACK_REG_BUF_SIZE
;
1155 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
1156 saved_regs_addr
[regnum
] =
1157 frame_addr
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
1158 - DUMMY_STACK_REG_BUF_SIZE
;
1160 frame_addr
= fi
->extra_info
->bottom
?
1161 fi
->extra_info
->bottom
: read_sp ();
1163 else if (fi
->extra_info
->flat
)
1165 CORE_ADDR func_start
;
1166 find_pc_partial_function (fi
->pc
, NULL
, &func_start
, NULL
);
1167 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
1169 /* Flat register window frame. */
1170 saved_regs_addr
[RP_REGNUM
] = fi
->extra_info
->pc_addr
;
1171 saved_regs_addr
[I7_REGNUM
] = fi
->extra_info
->fp_addr
;
1175 /* Normal frame. Just Local and In registers */
1176 frame_addr
= fi
->extra_info
->bottom
?
1177 fi
->extra_info
->bottom
: read_sp ();
1178 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; regnum
++)
1179 saved_regs_addr
[regnum
] =
1180 (frame_addr
+ (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
1182 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1183 saved_regs_addr
[regnum
] =
1184 (frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1189 if (fi
->extra_info
->flat
)
1191 saved_regs_addr
[O7_REGNUM
] = fi
->extra_info
->pc_addr
;
1195 /* Pull off either the next frame pointer or the stack pointer */
1196 CORE_ADDR next_next_frame_addr
=
1197 (fi
->next
->extra_info
->bottom
?
1198 fi
->next
->extra_info
->bottom
: read_sp ());
1199 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 8; regnum
++)
1200 saved_regs_addr
[regnum
] =
1201 (next_next_frame_addr
1202 + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
1206 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
1207 /* FIXME -- should this adjust for the sparc64 offset? */
1208 saved_regs_addr
[SP_REGNUM
] = get_frame_base (fi
);
1211 /* Discard from the stack the innermost frame, restoring all saved registers.
1213 Note that the values stored in fsr by get_frame_saved_regs are *in
1214 the context of the called frame*. What this means is that the i
1215 regs of fsr must be restored into the o regs of the (calling) frame that
1216 we pop into. We don't care about the output regs of the calling frame,
1217 since unless it's a dummy frame, it won't have any output regs in it.
1219 We never have to bother with %l (local) regs, since the called routine's
1220 locals get tossed, and the calling routine's locals are already saved
1223 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1226 sparc_pop_frame (void)
1228 register struct frame_info
*frame
= get_current_frame ();
1229 register CORE_ADDR pc
;
1234 fsr
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
1235 raw_buffer
= alloca (REGISTER_BYTES
);
1236 sparc_frame_find_saved_regs (frame
, &fsr
[0]);
1239 if (fsr
[FP0_REGNUM
])
1241 read_memory (fsr
[FP0_REGNUM
], raw_buffer
, FP_REGISTER_BYTES
);
1242 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1243 raw_buffer
, FP_REGISTER_BYTES
);
1245 if (!(GDB_TARGET_IS_SPARC64
))
1247 if (fsr
[FPS_REGNUM
])
1249 read_memory (fsr
[FPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1250 deprecated_write_register_gen (FPS_REGNUM
, raw_buffer
);
1252 if (fsr
[CPS_REGNUM
])
1254 read_memory (fsr
[CPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1255 deprecated_write_register_gen (CPS_REGNUM
, raw_buffer
);
1261 read_memory (fsr
[G1_REGNUM
], raw_buffer
, 7 * SPARC_INTREG_SIZE
);
1262 deprecated_write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
,
1263 7 * SPARC_INTREG_SIZE
);
1266 if (frame
->extra_info
->flat
)
1268 /* Each register might or might not have been saved, need to test
1270 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
1272 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1273 SPARC_INTREG_SIZE
));
1274 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
1276 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1277 SPARC_INTREG_SIZE
));
1279 /* Handle all outs except stack pointer (o0-o5; o7). */
1280 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
1282 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1283 SPARC_INTREG_SIZE
));
1284 if (fsr
[O0_REGNUM
+ 7])
1285 write_register (O0_REGNUM
+ 7,
1286 read_memory_integer (fsr
[O0_REGNUM
+ 7],
1287 SPARC_INTREG_SIZE
));
1289 write_sp (frame
->frame
);
1291 else if (fsr
[I0_REGNUM
])
1297 reg_temp
= alloca (SPARC_INTREG_SIZE
* 16);
1299 read_memory (fsr
[I0_REGNUM
], raw_buffer
, 8 * SPARC_INTREG_SIZE
);
1301 /* Get the ins and locals which we are about to restore. Just
1302 moving the stack pointer is all that is really needed, except
1303 store_inferior_registers is then going to write the ins and
1304 locals from the registers array, so we need to muck with the
1306 sp
= fsr
[SP_REGNUM
];
1308 if (GDB_TARGET_IS_SPARC64
&& (sp
& 1))
1311 read_memory (sp
, reg_temp
, SPARC_INTREG_SIZE
* 16);
1313 /* Restore the out registers.
1314 Among other things this writes the new stack pointer. */
1315 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
1316 SPARC_INTREG_SIZE
* 8);
1318 deprecated_write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
1319 SPARC_INTREG_SIZE
* 16);
1322 if (!(GDB_TARGET_IS_SPARC64
))
1324 write_register (PS_REGNUM
,
1325 read_memory_integer (fsr
[PS_REGNUM
],
1326 REGISTER_RAW_SIZE (PS_REGNUM
)));
1329 write_register (Y_REGNUM
,
1330 read_memory_integer (fsr
[Y_REGNUM
],
1331 REGISTER_RAW_SIZE (Y_REGNUM
)));
1334 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1335 write_register (PC_REGNUM
,
1336 read_memory_integer (fsr
[PC_REGNUM
],
1337 REGISTER_RAW_SIZE (PC_REGNUM
)));
1338 if (fsr
[NPC_REGNUM
])
1339 write_register (NPC_REGNUM
,
1340 read_memory_integer (fsr
[NPC_REGNUM
],
1341 REGISTER_RAW_SIZE (NPC_REGNUM
)));
1343 else if (frame
->extra_info
->flat
)
1345 if (frame
->extra_info
->pc_addr
)
1346 pc
= PC_ADJUST ((CORE_ADDR
)
1347 read_memory_integer (frame
->extra_info
->pc_addr
,
1348 REGISTER_RAW_SIZE (PC_REGNUM
)));
1351 /* I think this happens only in the innermost frame, if so then
1352 it is a complicated way of saying
1353 "pc = read_register (O7_REGNUM);". */
1356 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
1357 get_saved_register (buf
, 0, 0, frame
, O7_REGNUM
, 0);
1358 pc
= PC_ADJUST (extract_address
1359 (buf
, REGISTER_RAW_SIZE (O7_REGNUM
)));
1362 write_register (PC_REGNUM
, pc
);
1363 write_register (NPC_REGNUM
, pc
+ 4);
1365 else if (fsr
[I7_REGNUM
])
1367 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1368 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
[I7_REGNUM
],
1369 SPARC_INTREG_SIZE
));
1370 write_register (PC_REGNUM
, pc
);
1371 write_register (NPC_REGNUM
, pc
+ 4);
1373 flush_cached_frames ();
1376 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1377 encodes the structure size being returned. If we detect such
1378 a fake insn, step past it. */
1381 sparc_pc_adjust (CORE_ADDR pc
)
1387 err
= target_read_memory (pc
+ 8, buf
, 4);
1388 insn
= extract_unsigned_integer (buf
, 4);
1389 if ((err
== 0) && (insn
& 0xffc00000) == 0)
1395 /* If pc is in a shared library trampoline, return its target.
1396 The SunOs 4.x linker rewrites the jump table entries for PIC
1397 compiled modules in the main executable to bypass the dynamic linker
1398 with jumps of the form
1401 and removes the corresponding jump table relocation entry in the
1402 dynamic relocations.
1403 find_solib_trampoline_target relies on the presence of the jump
1404 table relocation entry, so we have to detect these jump instructions
1408 sunos4_skip_trampoline_code (CORE_ADDR pc
)
1410 unsigned long insn1
;
1414 err
= target_read_memory (pc
, buf
, 4);
1415 insn1
= extract_unsigned_integer (buf
, 4);
1416 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
1418 unsigned long insn2
;
1420 err
= target_read_memory (pc
+ 4, buf
, 4);
1421 insn2
= extract_unsigned_integer (buf
, 4);
1422 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
1424 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
1425 int delta
= insn2
& 0x1fff;
1427 /* Sign extend the displacement. */
1430 return target_pc
+ delta
;
1433 return find_solib_trampoline_target (pc
);
1436 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1438 /* The /proc interface divides the target machine's register set up into
1439 two different sets, the general register set (gregset) and the floating
1440 point register set (fpregset). For each set, there is an ioctl to get
1441 the current register set and another ioctl to set the current values.
1443 The actual structure passed through the ioctl interface is, of course,
1444 naturally machine dependent, and is different for each set of registers.
1445 For the sparc for example, the general register set is typically defined
1448 typedef int gregset_t[38];
1454 and the floating point set by:
1456 typedef struct prfpregset {
1459 double pr_dregs[16];
1464 u_char pr_q_entrysize;
1469 These routines provide the packing and unpacking of gregset_t and
1470 fpregset_t formatted data.
1475 /* Given a pointer to a general register set in /proc format (gregset_t *),
1476 unpack the register contents and supply them as gdb's idea of the current
1480 supply_gregset (gdb_gregset_t
*gregsetp
)
1482 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1483 int regi
, offset
= 0;
1485 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1486 then the gregset may contain 64-bit ints while supply_register
1487 is expecting 32-bit ints. Compensate. */
1488 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1491 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1492 /* FIXME MVS: assumes the order of the first 32 elements... */
1493 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1495 supply_register (regi
, ((char *) (regp
+ regi
)) + offset
);
1498 /* These require a bit more care. */
1499 supply_register (PC_REGNUM
, ((char *) (regp
+ R_PC
)) + offset
);
1500 supply_register (NPC_REGNUM
, ((char *) (regp
+ R_nPC
)) + offset
);
1501 supply_register (Y_REGNUM
, ((char *) (regp
+ R_Y
)) + offset
);
1503 if (GDB_TARGET_IS_SPARC64
)
1506 supply_register (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1508 supply_register (CCR_REGNUM
, NULL
);
1511 supply_register (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1513 supply_register (FPRS_REGNUM
, NULL
);
1516 supply_register (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1518 supply_register (ASI_REGNUM
, NULL
);
1524 supply_register (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1526 supply_register (PS_REGNUM
, NULL
);
1529 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1530 Steal R_ASI and R_FPRS, and hope for the best! */
1532 #if !defined (R_WIM) && defined (R_ASI)
1536 #if !defined (R_TBR) && defined (R_FPRS)
1537 #define R_TBR R_FPRS
1541 supply_register (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1543 supply_register (WIM_REGNUM
, NULL
);
1547 supply_register (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1549 supply_register (TBR_REGNUM
, NULL
);
1553 /* Fill inaccessible registers with zero. */
1554 if (GDB_TARGET_IS_SPARC64
)
1557 * don't know how to get value of any of the following:
1559 supply_register (VER_REGNUM
, NULL
);
1560 supply_register (TICK_REGNUM
, NULL
);
1561 supply_register (PIL_REGNUM
, NULL
);
1562 supply_register (PSTATE_REGNUM
, NULL
);
1563 supply_register (TSTATE_REGNUM
, NULL
);
1564 supply_register (TBA_REGNUM
, NULL
);
1565 supply_register (TL_REGNUM
, NULL
);
1566 supply_register (TT_REGNUM
, NULL
);
1567 supply_register (TPC_REGNUM
, NULL
);
1568 supply_register (TNPC_REGNUM
, NULL
);
1569 supply_register (WSTATE_REGNUM
, NULL
);
1570 supply_register (CWP_REGNUM
, NULL
);
1571 supply_register (CANSAVE_REGNUM
, NULL
);
1572 supply_register (CANRESTORE_REGNUM
, NULL
);
1573 supply_register (CLEANWIN_REGNUM
, NULL
);
1574 supply_register (OTHERWIN_REGNUM
, NULL
);
1575 supply_register (ASR16_REGNUM
, NULL
);
1576 supply_register (ASR17_REGNUM
, NULL
);
1577 supply_register (ASR18_REGNUM
, NULL
);
1578 supply_register (ASR19_REGNUM
, NULL
);
1579 supply_register (ASR20_REGNUM
, NULL
);
1580 supply_register (ASR21_REGNUM
, NULL
);
1581 supply_register (ASR22_REGNUM
, NULL
);
1582 supply_register (ASR23_REGNUM
, NULL
);
1583 supply_register (ASR24_REGNUM
, NULL
);
1584 supply_register (ASR25_REGNUM
, NULL
);
1585 supply_register (ASR26_REGNUM
, NULL
);
1586 supply_register (ASR27_REGNUM
, NULL
);
1587 supply_register (ASR28_REGNUM
, NULL
);
1588 supply_register (ASR29_REGNUM
, NULL
);
1589 supply_register (ASR30_REGNUM
, NULL
);
1590 supply_register (ASR31_REGNUM
, NULL
);
1591 supply_register (ICC_REGNUM
, NULL
);
1592 supply_register (XCC_REGNUM
, NULL
);
1596 supply_register (CPS_REGNUM
, NULL
);
1601 fill_gregset (gdb_gregset_t
*gregsetp
, int regno
)
1603 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1604 int regi
, offset
= 0;
1606 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1607 then the gregset may contain 64-bit ints while supply_register
1608 is expecting 32-bit ints. Compensate. */
1609 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1612 for (regi
= 0; regi
<= R_I7
; regi
++)
1613 if ((regno
== -1) || (regno
== regi
))
1614 deprecated_read_register_gen (regi
, (char *) (regp
+ regi
) + offset
);
1616 if ((regno
== -1) || (regno
== PC_REGNUM
))
1617 deprecated_read_register_gen (PC_REGNUM
, (char *) (regp
+ R_PC
) + offset
);
1619 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1620 deprecated_read_register_gen (NPC_REGNUM
, (char *) (regp
+ R_nPC
) + offset
);
1622 if ((regno
== -1) || (regno
== Y_REGNUM
))
1623 deprecated_read_register_gen (Y_REGNUM
, (char *) (regp
+ R_Y
) + offset
);
1625 if (GDB_TARGET_IS_SPARC64
)
1628 if (regno
== -1 || regno
== CCR_REGNUM
)
1629 deprecated_read_register_gen (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1632 if (regno
== -1 || regno
== FPRS_REGNUM
)
1633 deprecated_read_register_gen (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1636 if (regno
== -1 || regno
== ASI_REGNUM
)
1637 deprecated_read_register_gen (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1643 if (regno
== -1 || regno
== PS_REGNUM
)
1644 deprecated_read_register_gen (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1647 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1648 Steal R_ASI and R_FPRS, and hope for the best! */
1650 #if !defined (R_WIM) && defined (R_ASI)
1654 #if !defined (R_TBR) && defined (R_FPRS)
1655 #define R_TBR R_FPRS
1659 if (regno
== -1 || regno
== WIM_REGNUM
)
1660 deprecated_read_register_gen (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1662 if (regno
== -1 || regno
== WIM_REGNUM
)
1663 deprecated_read_register_gen (WIM_REGNUM
, NULL
);
1667 if (regno
== -1 || regno
== TBR_REGNUM
)
1668 deprecated_read_register_gen (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1670 if (regno
== -1 || regno
== TBR_REGNUM
)
1671 deprecated_read_register_gen (TBR_REGNUM
, NULL
);
1676 /* Given a pointer to a floating point register set in /proc format
1677 (fpregset_t *), unpack the register contents and supply them as gdb's
1678 idea of the current floating point register values. */
1681 supply_fpregset (gdb_fpregset_t
*fpregsetp
)
1689 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1691 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1692 supply_register (regi
, from
);
1695 if (GDB_TARGET_IS_SPARC64
)
1698 * don't know how to get value of the following.
1700 supply_register (FSR_REGNUM
, NULL
); /* zero it out for now */
1701 supply_register (FCC0_REGNUM
, NULL
);
1702 supply_register (FCC1_REGNUM
, NULL
); /* don't know how to get value */
1703 supply_register (FCC2_REGNUM
, NULL
); /* don't know how to get value */
1704 supply_register (FCC3_REGNUM
, NULL
); /* don't know how to get value */
1708 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1712 /* Given a pointer to a floating point register set in /proc format
1713 (fpregset_t *), update the register specified by REGNO from gdb's idea
1714 of the current floating point register set. If REGNO is -1, update
1716 /* This will probably need some changes for sparc64. */
1719 fill_fpregset (gdb_fpregset_t
*fpregsetp
, int regno
)
1728 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1730 if ((regno
== -1) || (regno
== regi
))
1732 from
= (char *) &deprecated_registers
[REGISTER_BYTE (regi
)];
1733 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1734 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1738 if (!(GDB_TARGET_IS_SPARC64
)) /* FIXME: does Sparc64 have this register? */
1739 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1741 from
= (char *)&deprecated_registers
[REGISTER_BYTE (FPS_REGNUM
)];
1742 to
= (char *) &fpregsetp
->pr_fsr
;
1743 memcpy (to
, from
, REGISTER_RAW_SIZE (FPS_REGNUM
));
1747 #endif /* USE_PROC_FS */
1749 /* Because of Multi-arch, GET_LONGJMP_TARGET is always defined. So test
1750 for a definition of JB_PC. */
1753 /* Figure out where the longjmp will land. We expect that we have just entered
1754 longjmp and haven't yet setup the stack frame, so the args are still in the
1755 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1756 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1757 This routine returns true on success */
1760 get_longjmp_target (CORE_ADDR
*pc
)
1763 #define LONGJMP_TARGET_SIZE 4
1764 char buf
[LONGJMP_TARGET_SIZE
];
1766 jb_addr
= read_register (O0_REGNUM
);
1768 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1769 LONGJMP_TARGET_SIZE
))
1772 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1776 #endif /* GET_LONGJMP_TARGET */
1778 #ifdef STATIC_TRANSFORM_NAME
1779 /* SunPRO (3.0 at least), encodes the static variables. This is not
1780 related to C++ mangling, it is done for C too. */
1783 sunpro_static_transform_name (char *name
)
1788 /* For file-local statics there will be a dollar sign, a bunch
1789 of junk (the contents of which match a string given in the
1790 N_OPT), a period and the name. For function-local statics
1791 there will be a bunch of junk (which seems to change the
1792 second character from 'A' to 'B'), a period, the name of the
1793 function, and the name. So just skip everything before the
1795 p
= strrchr (name
, '.');
1801 #endif /* STATIC_TRANSFORM_NAME */
1804 /* Utilities for printing registers.
1805 Page numbers refer to the SPARC Architecture Manual. */
1807 static void dump_ccreg (char *, int);
1810 dump_ccreg (char *reg
, int val
)
1813 printf_unfiltered ("%s:%s,%s,%s,%s", reg
,
1814 val
& 8 ? "N" : "NN",
1815 val
& 4 ? "Z" : "NZ",
1816 val
& 2 ? "O" : "NO",
1817 val
& 1 ? "C" : "NC");
1821 decode_asi (int val
)
1827 return "ASI_NUCLEUS";
1829 return "ASI_NUCLEUS_LITTLE";
1831 return "ASI_AS_IF_USER_PRIMARY";
1833 return "ASI_AS_IF_USER_SECONDARY";
1835 return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1837 return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1839 return "ASI_PRIMARY";
1841 return "ASI_SECONDARY";
1843 return "ASI_PRIMARY_NOFAULT";
1845 return "ASI_SECONDARY_NOFAULT";
1847 return "ASI_PRIMARY_LITTLE";
1849 return "ASI_SECONDARY_LITTLE";
1851 return "ASI_PRIMARY_NOFAULT_LITTLE";
1853 return "ASI_SECONDARY_NOFAULT_LITTLE";
1859 /* PRINT_REGISTER_HOOK routine.
1860 Pretty print various registers. */
1861 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1864 sparc_print_register_hook (int regno
)
1868 /* Handle double/quad versions of lower 32 fp regs. */
1869 if (regno
>= FP0_REGNUM
&& regno
< FP0_REGNUM
+ 32
1870 && (regno
& 1) == 0)
1874 if (frame_register_read (selected_frame
, regno
, value
)
1875 && frame_register_read (selected_frame
, regno
+ 1, value
+ 4))
1877 printf_unfiltered ("\t");
1878 print_floating (value
, builtin_type_double
, gdb_stdout
);
1880 #if 0 /* FIXME: gdb doesn't handle long doubles */
1881 if ((regno
& 3) == 0)
1883 if (frame_register_read (selected_frame
, regno
+ 2, value
+ 8)
1884 && frame_register_read (selected_frame
, regno
+ 3, value
+ 12))
1886 printf_unfiltered ("\t");
1887 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1894 #if 0 /* FIXME: gdb doesn't handle long doubles */
1895 /* Print upper fp regs as long double if appropriate. */
1896 if (regno
>= FP0_REGNUM
+ 32 && regno
< FP_MAX_REGNUM
1897 /* We test for even numbered regs and not a multiple of 4 because
1898 the upper fp regs are recorded as doubles. */
1899 && (regno
& 1) == 0)
1903 if (frame_register_read (selected_frame
, regno
, value
)
1904 && frame_register_read (selected_frame
, regno
+ 1, value
+ 8))
1906 printf_unfiltered ("\t");
1907 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1913 /* FIXME: Some of these are priviledged registers.
1914 Not sure how they should be handled. */
1916 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1918 val
= read_register (regno
);
1921 if (GDB_TARGET_IS_SPARC64
)
1925 printf_unfiltered ("\t");
1926 dump_ccreg ("xcc", val
>> 4);
1927 printf_unfiltered (", ");
1928 dump_ccreg ("icc", val
& 15);
1931 printf ("\tfef:%d, du:%d, dl:%d",
1932 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1936 static char *fcc
[4] =
1937 {"=", "<", ">", "?"};
1938 static char *rd
[4] =
1939 {"N", "0", "+", "-"};
1940 /* Long, but I'd rather leave it as is and use a wide screen. */
1941 printf_filtered ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ",
1942 fcc
[BITS (10, 3)], fcc
[BITS (32, 3)],
1943 fcc
[BITS (34, 3)], fcc
[BITS (36, 3)],
1944 rd
[BITS (30, 3)], BITS (23, 31));
1945 printf_filtered ("ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1946 BITS (22, 1), BITS (17, 7), BITS (14, 7),
1947 BITS (13, 1), BITS (5, 31), BITS (0, 31));
1952 char *asi
= decode_asi (val
);
1954 printf ("\t%s", asi
);
1958 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1959 BITS (48, 0xffff), BITS (32, 0xffff),
1960 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1964 static char *mm
[4] =
1965 {"tso", "pso", "rso", "?"};
1966 printf_filtered ("\tcle:%d, tle:%d, mm:%s, red:%d, ",
1967 BITS (9, 1), BITS (8, 1),
1968 mm
[BITS (6, 3)], BITS (5, 1));
1969 printf_filtered ("pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1970 BITS (4, 1), BITS (3, 1), BITS (2, 1),
1971 BITS (1, 1), BITS (0, 1));
1975 /* FIXME: print all 4? */
1978 /* FIXME: print all 4? */
1981 /* FIXME: print all 4? */
1984 /* FIXME: print all 4? */
1987 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
1990 printf ("\t%d", BITS (0, 31));
1992 case CANSAVE_REGNUM
:
1993 printf ("\t%-2d before spill", BITS (0, 31));
1995 case CANRESTORE_REGNUM
:
1996 printf ("\t%-2d before fill", BITS (0, 31));
1998 case CLEANWIN_REGNUM
:
1999 printf ("\t%-2d before clean", BITS (0, 31));
2001 case OTHERWIN_REGNUM
:
2002 printf ("\t%d", BITS (0, 31));
2009 printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
2010 BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
2011 BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
2012 BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
2017 static char *fcc
[4] =
2018 {"=", "<", ">", "?"};
2019 static char *rd
[4] =
2020 {"N", "0", "+", "-"};
2021 /* Long, but I'd rather leave it as is and use a wide screen. */
2022 printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
2023 "fcc:%s, aexc:%d, cexc:%d",
2024 rd
[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
2025 BITS (14, 7), BITS (13, 1), fcc
[BITS (10, 3)], BITS (5, 31),
2035 sparc_print_registers (struct gdbarch
*gdbarch
,
2036 struct ui_file
*file
,
2037 struct frame_info
*frame
,
2038 int regnum
, int print_all
,
2039 void (*print_register_hook
) (int))
2042 const int numregs
= NUM_REGS
+ NUM_PSEUDO_REGS
;
2043 char *raw_buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2044 char *virtual_buffer
= alloca (MAX_REGISTER_VIRTUAL_SIZE
);
2046 for (i
= 0; i
< numregs
; i
++)
2048 /* Decide between printing all regs, non-float / vector regs, or
2054 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2056 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)))
2066 /* If the register name is empty, it is undefined for this
2067 processor, so don't display anything. */
2068 if (REGISTER_NAME (i
) == NULL
|| *(REGISTER_NAME (i
)) == '\0')
2071 fputs_filtered (REGISTER_NAME (i
), file
);
2072 print_spaces_filtered (15 - strlen (REGISTER_NAME (i
)), file
);
2074 /* Get the data in raw format. */
2075 if (! frame_register_read (frame
, i
, raw_buffer
))
2077 fprintf_filtered (file
, "*value not available*\n");
2081 /* FIXME: cagney/2002-08-03: This code shouldn't be necessary.
2082 The function frame_register_read() should have returned the
2083 pre-cooked register so no conversion is necessary. */
2084 /* Convert raw data to virtual format if necessary. */
2085 if (REGISTER_CONVERTIBLE (i
))
2087 REGISTER_CONVERT_TO_VIRTUAL (i
, REGISTER_VIRTUAL_TYPE (i
),
2088 raw_buffer
, virtual_buffer
);
2092 memcpy (virtual_buffer
, raw_buffer
,
2093 REGISTER_VIRTUAL_SIZE (i
));
2096 /* If virtual format is floating, print it that way, and in raw
2098 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2102 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2103 file
, 0, 1, 0, Val_pretty_default
);
2105 fprintf_filtered (file
, "\t(raw 0x");
2106 for (j
= 0; j
< REGISTER_RAW_SIZE (i
); j
++)
2109 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2112 idx
= REGISTER_RAW_SIZE (i
) - 1 - j
;
2113 fprintf_filtered (file
, "%02x", (unsigned char) raw_buffer
[idx
]);
2115 fprintf_filtered (file
, ")");
2119 /* Print the register in hex. */
2120 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2121 file
, 'x', 1, 0, Val_pretty_default
);
2122 /* If not a vector register, print it also according to its
2124 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)) == 0)
2126 fprintf_filtered (file
, "\t");
2127 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2128 file
, 0, 1, 0, Val_pretty_default
);
2132 /* Some sparc specific info. */
2133 if (print_register_hook
!= NULL
)
2134 print_register_hook (i
);
2136 fprintf_filtered (file
, "\n");
2141 sparc_print_registers_info (struct gdbarch
*gdbarch
,
2142 struct ui_file
*file
,
2143 struct frame_info
*frame
,
2144 int regnum
, int print_all
)
2146 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
,
2147 sparc_print_register_hook
);
2151 sparc_do_registers_info (int regnum
, int all
)
2153 sparc_print_registers_info (current_gdbarch
, gdb_stdout
, selected_frame
,
2158 sparclet_print_registers_info (struct gdbarch
*gdbarch
,
2159 struct ui_file
*file
,
2160 struct frame_info
*frame
,
2161 int regnum
, int print_all
)
2163 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
, NULL
);
2167 sparclet_do_registers_info (int regnum
, int all
)
2169 sparclet_print_registers_info (current_gdbarch
, gdb_stdout
, selected_frame
,
2175 gdb_print_insn_sparc (bfd_vma memaddr
, disassemble_info
*info
)
2177 /* It's necessary to override mach again because print_insn messes it up. */
2178 info
->mach
= TARGET_ARCHITECTURE
->mach
;
2179 return print_insn_sparc (memaddr
, info
);
2182 /* The SPARC passes the arguments on the stack; arguments smaller
2183 than an int are promoted to an int. The first 6 words worth of
2184 args are also passed in registers o0 - o5. */
2187 sparc32_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2188 int struct_return
, CORE_ADDR struct_addr
)
2191 int accumulate_size
= 0;
2198 struct sparc_arg
*sparc_args
=
2199 (struct sparc_arg
*) alloca (nargs
* sizeof (struct sparc_arg
));
2200 struct sparc_arg
*m_arg
;
2202 /* Promote arguments if necessary, and calculate their stack offsets
2204 for (i
= 0, m_arg
= sparc_args
; i
< nargs
; i
++, m_arg
++)
2206 struct value
*arg
= args
[i
];
2207 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
2208 /* Cast argument to long if necessary as the compiler does it too. */
2209 switch (TYPE_CODE (arg_type
))
2212 case TYPE_CODE_BOOL
:
2213 case TYPE_CODE_CHAR
:
2214 case TYPE_CODE_RANGE
:
2215 case TYPE_CODE_ENUM
:
2216 if (TYPE_LENGTH (arg_type
) < TYPE_LENGTH (builtin_type_long
))
2218 arg_type
= builtin_type_long
;
2219 arg
= value_cast (arg_type
, arg
);
2225 m_arg
->len
= TYPE_LENGTH (arg_type
);
2226 m_arg
->offset
= accumulate_size
;
2227 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & ~3;
2228 m_arg
->contents
= VALUE_CONTENTS (arg
);
2231 /* Make room for the arguments on the stack. */
2232 accumulate_size
+= CALL_DUMMY_STACK_ADJUST
;
2233 sp
= ((sp
- accumulate_size
) & ~7) + CALL_DUMMY_STACK_ADJUST
;
2235 /* `Push' arguments on the stack. */
2236 for (i
= 0, oregnum
= 0, m_arg
= sparc_args
;
2240 write_memory (sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
2242 j
< m_arg
->len
&& oregnum
< 6;
2243 j
+= SPARC_INTREG_SIZE
, oregnum
++)
2244 deprecated_write_register_gen (O0_REGNUM
+ oregnum
, m_arg
->contents
+ j
);
2251 /* Extract from an array REGBUF containing the (raw) register state
2252 a function return value of type TYPE, and copy that, in virtual format,
2256 sparc32_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2258 int typelen
= TYPE_LENGTH (type
);
2259 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2261 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2262 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2265 ®buf
[O0_REGNUM
* regsize
+
2267 || TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
? 0
2268 : regsize
- typelen
)],
2273 /* Write into appropriate registers a function return value
2274 of type TYPE, given in virtual format. On SPARCs with FPUs,
2275 float values are returned in %f0 (and %f1). In all other cases,
2276 values are returned in register %o0. */
2279 sparc_store_return_value (struct type
*type
, char *valbuf
)
2284 buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2286 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2287 /* Floating-point values are returned in the register pair */
2288 /* formed by %f0 and %f1 (doubles are, anyway). */
2291 /* Other values are returned in register %o0. */
2294 /* Add leading zeros to the value. */
2295 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (regno
))
2297 memset (buffer
, 0, REGISTER_RAW_SIZE (regno
));
2298 memcpy (buffer
+ REGISTER_RAW_SIZE (regno
) - TYPE_LENGTH (type
), valbuf
,
2299 TYPE_LENGTH (type
));
2300 deprecated_write_register_gen (regno
, buffer
);
2303 deprecated_write_register_bytes (REGISTER_BYTE (regno
), valbuf
,
2304 TYPE_LENGTH (type
));
2308 sparclet_store_return_value (struct type
*type
, char *valbuf
)
2310 /* Other values are returned in register %o0. */
2311 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), valbuf
,
2312 TYPE_LENGTH (type
));
2316 #ifndef CALL_DUMMY_CALL_OFFSET
2317 #define CALL_DUMMY_CALL_OFFSET \
2318 (gdbarch_tdep (current_gdbarch)->call_dummy_call_offset)
2319 #endif /* CALL_DUMMY_CALL_OFFSET */
2321 /* Insert the function address into a call dummy instruction sequence
2324 For structs and unions, if the function was compiled with Sun cc,
2325 it expects 'unimp' after the call. But gcc doesn't use that
2326 (twisted) convention. So leave a nop there for gcc (FIX_CALL_DUMMY
2327 can assume it is operating on a pristine CALL_DUMMY, not one that
2328 has already been customized for a different function). */
2331 sparc_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
,
2332 struct type
*value_type
, int using_gcc
)
2336 /* Store the relative adddress of the target function into the
2337 'call' instruction. */
2338 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
, 4,
2340 | (((fun
- (pc
+ CALL_DUMMY_CALL_OFFSET
)) >> 2)
2343 /* If the called function returns an aggregate value, fill in the UNIMP
2344 instruction containing the size of the returned aggregate return value,
2345 which follows the call instruction.
2346 For details see the SPARC Architecture Manual Version 8, Appendix D.3.
2348 Adjust the call_dummy_breakpoint_offset for the bp_call_dummy breakpoint
2349 to the proper address in the call dummy, so that `finish' after a stop
2350 in a call dummy works.
2351 Tweeking current_gdbarch is not an optimal solution, but the call to
2352 sparc_fix_call_dummy is immediately followed by a call to run_stack_dummy,
2353 which is the only function where dummy_breakpoint_offset is actually
2354 used, if it is non-zero. */
2355 if (TYPE_CODE (value_type
) == TYPE_CODE_STRUCT
2356 || TYPE_CODE (value_type
) == TYPE_CODE_UNION
)
2358 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
+ 8, 4,
2359 TYPE_LENGTH (value_type
) & 0x1fff);
2360 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x30);
2363 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x2c);
2365 if (!(GDB_TARGET_IS_SPARC64
))
2367 /* If this is not a simulator target, change the first four
2368 instructions of the call dummy to NOPs. Those instructions
2369 include a 'save' instruction and are designed to work around
2370 problems with register window flushing in the simulator. */
2372 if (strcmp (target_shortname
, "sim") != 0)
2374 for (i
= 0; i
< 4; i
++)
2375 store_unsigned_integer (dummy
+ (i
* 4), 4, 0x01000000);
2379 /* If this is a bi-endian target, GDB has written the call dummy
2380 in little-endian order. We must byte-swap it back to big-endian. */
2383 for (i
= 0; i
< CALL_DUMMY_LENGTH
; i
+= 4)
2385 char tmp
= dummy
[i
];
2386 dummy
[i
] = dummy
[i
+ 3];
2389 dummy
[i
+ 1] = dummy
[i
+ 2];
2396 /* Set target byte order based on machine type. */
2399 sparc_target_architecture_hook (const bfd_arch_info_type
*ap
)
2403 if (ap
->mach
== bfd_mach_sparc_sparclite_le
)
2405 target_byte_order
= BFD_ENDIAN_LITTLE
;
2415 * Module "constructor" function.
2418 static struct gdbarch
* sparc_gdbarch_init (struct gdbarch_info info
,
2419 struct gdbarch_list
*arches
);
2420 static void sparc_dump_tdep (struct gdbarch
*, struct ui_file
*);
2423 _initialize_sparc_tdep (void)
2425 /* Hook us into the gdbarch mechanism. */
2426 gdbarch_register (bfd_arch_sparc
, sparc_gdbarch_init
, sparc_dump_tdep
);
2428 tm_print_insn
= gdb_print_insn_sparc
;
2429 tm_print_insn_info
.mach
= TM_PRINT_INSN_MACH
; /* Selects sparc/sparclite */
2430 target_architecture_hook
= sparc_target_architecture_hook
;
2433 /* Compensate for stack bias. Note that we currently don't handle
2434 mixed 32/64 bit code. */
2437 sparc64_read_sp (void)
2439 CORE_ADDR sp
= read_register (SP_REGNUM
);
2447 sparc64_read_fp (void)
2449 CORE_ADDR fp
= read_register (FP_REGNUM
);
2457 sparc64_write_sp (CORE_ADDR val
)
2459 CORE_ADDR oldsp
= read_register (SP_REGNUM
);
2461 write_register (SP_REGNUM
, val
- 2047);
2463 write_register (SP_REGNUM
, val
);
2466 /* The SPARC 64 ABI passes floating-point arguments in FP0 to FP31,
2467 and all other arguments in O0 to O5. They are also copied onto
2468 the stack in the correct places. Apparently (empirically),
2469 structs of less than 16 bytes are passed member-by-member in
2470 separate registers, but I am unable to figure out the algorithm.
2471 Some members go in floating point regs, but I don't know which.
2473 FIXME: Handle small structs (less than 16 bytes containing floats).
2475 The counting regimen for using both integer and FP registers
2476 for argument passing is rather odd -- a single counter is used
2477 for both; this means that if the arguments alternate between
2478 int and float, we will waste every other register of both types. */
2481 sparc64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2482 int struct_return
, CORE_ADDR struct_retaddr
)
2484 int i
, j
, register_counter
= 0;
2486 struct type
*sparc_intreg_type
=
2487 TYPE_LENGTH (builtin_type_long
) == SPARC_INTREG_SIZE
?
2488 builtin_type_long
: builtin_type_long_long
;
2490 sp
= (sp
& ~(((unsigned long) SPARC_INTREG_SIZE
) - 1UL));
2492 /* Figure out how much space we'll need. */
2493 for (i
= nargs
- 1; i
>= 0; i
--)
2495 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2496 struct value
*copyarg
= args
[i
];
2499 if (copylen
< SPARC_INTREG_SIZE
)
2501 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2502 copylen
= SPARC_INTREG_SIZE
;
2511 /* if STRUCT_RETURN, then first argument is the struct return location. */
2513 write_register (O0_REGNUM
+ register_counter
++, struct_retaddr
);
2515 /* Now write the arguments onto the stack, while writing FP
2516 arguments into the FP registers, and other arguments into the
2517 first six 'O' registers. */
2519 for (i
= 0; i
< nargs
; i
++)
2521 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2522 struct value
*copyarg
= args
[i
];
2523 enum type_code typecode
= TYPE_CODE (VALUE_TYPE (args
[i
]));
2526 if (typecode
== TYPE_CODE_INT
||
2527 typecode
== TYPE_CODE_BOOL
||
2528 typecode
== TYPE_CODE_CHAR
||
2529 typecode
== TYPE_CODE_RANGE
||
2530 typecode
== TYPE_CODE_ENUM
)
2531 if (len
< SPARC_INTREG_SIZE
)
2533 /* Small ints will all take up the size of one intreg on
2535 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2536 copylen
= SPARC_INTREG_SIZE
;
2539 write_memory (tempsp
, VALUE_CONTENTS (copyarg
), copylen
);
2542 /* Corner case: Structs consisting of a single float member are floats.
2543 * FIXME! I don't know about structs containing multiple floats!
2544 * Structs containing mixed floats and ints are even more weird.
2549 /* Separate float args from all other args. */
2550 if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2552 if (register_counter
< 16)
2554 /* This arg gets copied into a FP register. */
2558 case 4: /* Single-precision (float) */
2559 fpreg
= FP0_REGNUM
+ 2 * register_counter
+ 1;
2560 register_counter
+= 1;
2562 case 8: /* Double-precision (double) */
2563 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2564 register_counter
+= 1;
2566 case 16: /* Quad-precision (long double) */
2567 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2568 register_counter
+= 2;
2571 internal_error (__FILE__
, __LINE__
, "bad switch");
2573 deprecated_write_register_bytes (REGISTER_BYTE (fpreg
),
2574 VALUE_CONTENTS (args
[i
]),
2578 else /* all other args go into the first six 'o' registers */
2581 j
< len
&& register_counter
< 6;
2582 j
+= SPARC_INTREG_SIZE
)
2584 int oreg
= O0_REGNUM
+ register_counter
;
2586 deprecated_write_register_gen (oreg
, VALUE_CONTENTS (copyarg
) + j
);
2587 register_counter
+= 1;
2594 /* Values <= 32 bytes are returned in o0-o3 (floating-point values are
2595 returned in f0-f3). */
2598 sp64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
,
2601 int typelen
= TYPE_LENGTH (type
);
2602 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2604 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2606 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2610 if (TYPE_CODE (type
) != TYPE_CODE_STRUCT
2611 || (TYPE_LENGTH (type
) > 32))
2614 ®buf
[O0_REGNUM
* regsize
+
2615 (typelen
>= regsize
? 0 : regsize
- typelen
)],
2621 char *o0
= ®buf
[O0_REGNUM
* regsize
];
2622 char *f0
= ®buf
[FP0_REGNUM
* regsize
];
2625 for (x
= 0; x
< TYPE_NFIELDS (type
); x
++)
2627 struct field
*f
= &TYPE_FIELDS (type
)[x
];
2628 /* FIXME: We may need to handle static fields here. */
2629 int whichreg
= (f
->loc
.bitpos
+ bitoffset
) / 32;
2630 int remainder
= ((f
->loc
.bitpos
+ bitoffset
) % 32) / 8;
2631 int where
= (f
->loc
.bitpos
+ bitoffset
) / 8;
2632 int size
= TYPE_LENGTH (f
->type
);
2633 int typecode
= TYPE_CODE (f
->type
);
2635 if (typecode
== TYPE_CODE_STRUCT
)
2637 sp64_extract_return_value (f
->type
,
2640 bitoffset
+ f
->loc
.bitpos
);
2642 else if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2644 memcpy (valbuf
+ where
, &f0
[whichreg
* 4] + remainder
, size
);
2648 memcpy (valbuf
+ where
, &o0
[whichreg
* 4] + remainder
, size
);
2655 sparc64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2657 sp64_extract_return_value (type
, regbuf
, valbuf
, 0);
2661 sparclet_extract_return_value (struct type
*type
,
2665 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) * 8;
2666 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (O0_REGNUM
))
2667 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) - TYPE_LENGTH (type
);
2669 memcpy ((void *) valbuf
, regbuf
, TYPE_LENGTH (type
));
2674 sparc32_stack_align (CORE_ADDR addr
)
2676 return ((addr
+ 7) & -8);
2680 sparc64_stack_align (CORE_ADDR addr
)
2682 return ((addr
+ 15) & -16);
2686 sparc_print_extra_frame_info (struct frame_info
*fi
)
2688 if (fi
&& fi
->extra_info
&& fi
->extra_info
->flat
)
2689 printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n",
2690 paddr_nz (fi
->extra_info
->pc_addr
),
2691 paddr_nz (fi
->extra_info
->fp_addr
));
2694 /* MULTI_ARCH support */
2697 sparc32_register_name (int regno
)
2699 static char *register_names
[] =
2700 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2701 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2702 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2703 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2705 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2706 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2707 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2708 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2710 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
2714 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2717 return register_names
[regno
];
2721 sparc64_register_name (int regno
)
2723 static char *register_names
[] =
2724 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2725 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2726 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2727 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2729 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2730 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2731 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2732 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2733 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
2734 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
2736 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", "ver",
2737 "tick", "pil", "pstate", "tstate", "tba", "tl", "tt", "tpc",
2738 "tnpc", "wstate", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
2739 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", "asr22", "asr23",
2740 "asr24", "asr25", "asr26", "asr27", "asr28", "asr29", "asr30", "asr31",
2741 /* These are here at the end to simplify removing them if we have to. */
2742 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"
2746 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2749 return register_names
[regno
];
2753 sparclite_register_name (int regno
)
2755 static char *register_names
[] =
2756 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2757 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2758 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2759 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2761 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2762 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2763 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2764 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2766 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",
2767 "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr"
2771 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2774 return register_names
[regno
];
2778 sparclet_register_name (int regno
)
2780 static char *register_names
[] =
2781 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2782 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2783 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2784 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2786 "", "", "", "", "", "", "", "", /* no floating point registers */
2787 "", "", "", "", "", "", "", "",
2788 "", "", "", "", "", "", "", "",
2789 "", "", "", "", "", "", "", "",
2791 "y", "psr", "wim", "tbr", "pc", "npc", "", "", /* no FPSR or CPSR */
2792 "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "",
2794 /* ASR15 ASR19 (don't display them) */
2795 "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22"
2796 /* None of the rest get displayed */
2798 "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7",
2799 "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15",
2800 "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23",
2801 "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31",
2807 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2810 return register_names
[regno
];
2814 sparc_push_return_address (CORE_ADDR pc_unused
, CORE_ADDR sp
)
2816 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2818 /* The return PC of the dummy_frame is the former 'current' PC
2819 (where we were before we made the target function call).
2820 This is saved in %i7 by push_dummy_frame.
2822 We will save the 'call dummy location' (ie. the address
2823 to which the target function will return) in %o7.
2824 This address will actually be the program's entry point.
2825 There will be a special call_dummy breakpoint there. */
2827 write_register (O7_REGNUM
,
2828 CALL_DUMMY_ADDRESS () - 8);
2834 /* Should call_function allocate stack space for a struct return? */
2837 sparc64_use_struct_convention (int gcc_p
, struct type
*type
)
2839 return (TYPE_LENGTH (type
) > 32);
2842 /* Store the address of the place in which to copy the structure the
2843 subroutine will return. This is called from call_function_by_hand.
2844 The ultimate mystery is, tho, what is the value "16"?
2846 MVS: That's the offset from where the sp is now, to where the
2847 subroutine is gonna expect to find the struct return address. */
2850 sparc32_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2855 val
= alloca (SPARC_INTREG_SIZE
);
2856 store_unsigned_integer (val
, SPARC_INTREG_SIZE
, addr
);
2857 write_memory (sp
+ (16 * SPARC_INTREG_SIZE
), val
, SPARC_INTREG_SIZE
);
2859 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2861 /* Now adjust the value of the link register, which was previously
2862 stored by push_return_address. Functions that return structs are
2863 peculiar in that they return to link register + 12, rather than
2864 link register + 8. */
2866 o7
= read_register (O7_REGNUM
);
2867 write_register (O7_REGNUM
, o7
- 4);
2872 sparc64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2874 /* FIXME: V9 uses %o0 for this. */
2875 /* FIXME MVS: Only for small enough structs!!! */
2877 target_write_memory (sp
+ (16 * SPARC_INTREG_SIZE
),
2878 (char *) &addr
, SPARC_INTREG_SIZE
);
2880 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2882 /* Now adjust the value of the link register, which was previously
2883 stored by push_return_address. Functions that return structs are
2884 peculiar in that they return to link register + 12, rather than
2885 link register + 8. */
2887 write_register (O7_REGNUM
, read_register (O7_REGNUM
) - 4);
2892 /* Default target data type for register REGNO. */
2894 static struct type
*
2895 sparc32_register_virtual_type (int regno
)
2897 if (regno
== PC_REGNUM
||
2898 regno
== FP_REGNUM
||
2900 return builtin_type_unsigned_int
;
2902 return builtin_type_int
;
2904 return builtin_type_float
;
2905 return builtin_type_int
;
2908 static struct type
*
2909 sparc64_register_virtual_type (int regno
)
2911 if (regno
== PC_REGNUM
||
2912 regno
== FP_REGNUM
||
2914 return builtin_type_unsigned_long_long
;
2916 return builtin_type_long_long
;
2918 return builtin_type_float
;
2920 return builtin_type_double
;
2921 return builtin_type_long_long
;
2924 /* Number of bytes of storage in the actual machine representation for
2928 sparc32_register_size (int regno
)
2934 sparc64_register_size (int regno
)
2936 return (regno
< 32 ? 8 : regno
< 64 ? 4 : 8);
2939 /* Index within the `registers' buffer of the first byte of the space
2940 for register REGNO. */
2943 sparc32_register_byte (int regno
)
2949 sparc64_register_byte (int regno
)
2953 else if (regno
< 64)
2954 return 32 * 8 + (regno
- 32) * 4;
2955 else if (regno
< 80)
2956 return 32 * 8 + 32 * 4 + (regno
- 64) * 8;
2958 return 64 * 8 + (regno
- 80) * 8;
2961 /* Immediately after a function call, return the saved pc.
2962 Can't go through the frames for this because on some machines
2963 the new frame is not set up until the new function executes
2964 some instructions. */
2967 sparc_saved_pc_after_call (struct frame_info
*fi
)
2969 return sparc_pc_adjust (read_register (RP_REGNUM
));
2972 /* Convert registers between 'raw' and 'virtual' formats.
2973 They are the same on sparc, so there's nothing to do. */
2976 sparc_convert_to_virtual (int regnum
, struct type
*type
, char *from
, char *to
)
2977 { /* do nothing (should never be called) */
2981 sparc_convert_to_raw (struct type
*type
, int regnum
, char *from
, char *to
)
2982 { /* do nothing (should never be called) */
2985 /* Init saved regs: nothing to do, just a place-holder function. */
2988 sparc_frame_init_saved_regs (struct frame_info
*fi_ignored
)
2992 /* gdbarch fix call dummy:
2993 All this function does is rearrange the arguments before calling
2994 sparc_fix_call_dummy (which does the real work). */
2997 sparc_gdbarch_fix_call_dummy (char *dummy
,
3001 struct value
**args
,
3005 if (CALL_DUMMY_LOCATION
== ON_STACK
)
3006 sparc_fix_call_dummy (dummy
, pc
, fun
, type
, gcc_p
);
3009 /* Coerce float to double: a no-op. */
3012 sparc_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
3017 /* CALL_DUMMY_ADDRESS: fetch the breakpoint address for a call dummy. */
3020 sparc_call_dummy_address (void)
3022 return (CALL_DUMMY_START_OFFSET
) + CALL_DUMMY_BREAKPOINT_OFFSET
;
3025 /* Supply the Y register number to those that need it. */
3028 sparc_y_regnum (void)
3030 return gdbarch_tdep (current_gdbarch
)->y_regnum
;
3034 sparc_reg_struct_has_addr (int gcc_p
, struct type
*type
)
3036 if (GDB_TARGET_IS_SPARC64
)
3037 return (TYPE_LENGTH (type
) > 32);
3039 return (gcc_p
!= 1);
3043 sparc_intreg_size (void)
3045 return SPARC_INTREG_SIZE
;
3049 sparc_return_value_on_stack (struct type
*type
)
3051 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&&
3052 TYPE_LENGTH (type
) > 8)
3059 * Gdbarch "constructor" function.
3062 #define SPARC32_CALL_DUMMY_ON_STACK
3064 #define SPARC_SP_REGNUM 14
3065 #define SPARC_FP_REGNUM 30
3066 #define SPARC_FP0_REGNUM 32
3067 #define SPARC32_NPC_REGNUM 69
3068 #define SPARC32_PC_REGNUM 68
3069 #define SPARC32_Y_REGNUM 64
3070 #define SPARC64_PC_REGNUM 80
3071 #define SPARC64_NPC_REGNUM 81
3072 #define SPARC64_Y_REGNUM 85
3074 static struct gdbarch
*
3075 sparc_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3077 struct gdbarch
*gdbarch
;
3078 struct gdbarch_tdep
*tdep
;
3079 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
3081 static LONGEST call_dummy_32
[] =
3082 { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,
3083 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,
3084 0xd203a048, 0x40000000, 0xd003a044, 0x01000000,
3085 0x91d02001, 0x01000000
3087 static LONGEST call_dummy_64
[] =
3088 { 0x9de3bec0fd3fa7f7LL
, 0xf93fa7eff53fa7e7LL
,
3089 0xf13fa7dfed3fa7d7LL
, 0xe93fa7cfe53fa7c7LL
,
3090 0xe13fa7bfdd3fa7b7LL
, 0xd93fa7afd53fa7a7LL
,
3091 0xd13fa79fcd3fa797LL
, 0xc93fa78fc53fa787LL
,
3092 0xc13fa77fcc3fa777LL
, 0xc83fa76fc43fa767LL
,
3093 0xc03fa75ffc3fa757LL
, 0xf83fa74ff43fa747LL
,
3094 0xf03fa73f01000000LL
, 0x0100000001000000LL
,
3095 0x0100000091580000LL
, 0xd027a72b93500000LL
,
3096 0xd027a72791480000LL
, 0xd027a72391400000LL
,
3097 0xd027a71fda5ba8a7LL
, 0xd85ba89fd65ba897LL
,
3098 0xd45ba88fd25ba887LL
, 0x9fc02000d05ba87fLL
,
3099 0x0100000091d02001LL
, 0x0100000001000000LL
3101 static LONGEST call_dummy_nil
[] = {0};
3103 /* Try to determine the OS ABI of the object we are loading. */
3105 if (info
.abfd
!= NULL
)
3107 osabi
= gdbarch_lookup_osabi (info
.abfd
);
3108 if (osabi
== GDB_OSABI_UNKNOWN
)
3110 /* If it's an ELF file, assume it's Solaris. */
3111 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
3112 osabi
= GDB_OSABI_SOLARIS
;
3116 /* First see if there is already a gdbarch that can satisfy the request. */
3117 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3119 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
3121 /* Make sure the ABI selection matches. */
3122 tdep
= gdbarch_tdep (arches
->gdbarch
);
3123 if (tdep
&& tdep
->osabi
== osabi
)
3124 return arches
->gdbarch
;
3127 /* None found: is the request for a sparc architecture? */
3128 if (info
.bfd_arch_info
->arch
!= bfd_arch_sparc
)
3129 return NULL
; /* No; then it's not for us. */
3131 /* Yes: create a new gdbarch for the specified machine type. */
3132 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
3133 gdbarch
= gdbarch_alloc (&info
, tdep
);
3135 tdep
->osabi
= osabi
;
3137 /* First set settings that are common for all sparc architectures. */
3138 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
3139 set_gdbarch_breakpoint_from_pc (gdbarch
, memory_breakpoint_from_pc
);
3140 set_gdbarch_coerce_float_to_double (gdbarch
,
3141 sparc_coerce_float_to_double
);
3142 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
3143 set_gdbarch_call_dummy_p (gdbarch
, 1);
3144 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 1);
3145 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3146 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3147 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sparc_extract_struct_value_address
);
3148 set_gdbarch_fix_call_dummy (gdbarch
, sparc_gdbarch_fix_call_dummy
);
3149 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3150 set_gdbarch_fp_regnum (gdbarch
, SPARC_FP_REGNUM
);
3151 set_gdbarch_fp0_regnum (gdbarch
, SPARC_FP0_REGNUM
);
3152 set_gdbarch_frame_chain (gdbarch
, sparc_frame_chain
);
3153 set_gdbarch_frame_init_saved_regs (gdbarch
, sparc_frame_init_saved_regs
);
3154 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
3155 set_gdbarch_frame_saved_pc (gdbarch
, sparc_frame_saved_pc
);
3156 set_gdbarch_frameless_function_invocation (gdbarch
,
3157 frameless_look_for_prologue
);
3158 set_gdbarch_get_saved_register (gdbarch
, sparc_get_saved_register
);
3159 set_gdbarch_init_extra_frame_info (gdbarch
, sparc_init_extra_frame_info
);
3160 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3161 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3162 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
3163 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3164 set_gdbarch_max_register_raw_size (gdbarch
, 8);
3165 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
3166 set_gdbarch_pop_frame (gdbarch
, sparc_pop_frame
);
3167 set_gdbarch_push_return_address (gdbarch
, sparc_push_return_address
);
3168 set_gdbarch_push_dummy_frame (gdbarch
, sparc_push_dummy_frame
);
3169 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
3170 set_gdbarch_register_convert_to_raw (gdbarch
, sparc_convert_to_raw
);
3171 set_gdbarch_register_convert_to_virtual (gdbarch
,
3172 sparc_convert_to_virtual
);
3173 set_gdbarch_register_convertible (gdbarch
,
3174 generic_register_convertible_not
);
3175 set_gdbarch_reg_struct_has_addr (gdbarch
, sparc_reg_struct_has_addr
);
3176 set_gdbarch_return_value_on_stack (gdbarch
, sparc_return_value_on_stack
);
3177 set_gdbarch_saved_pc_after_call (gdbarch
, sparc_saved_pc_after_call
);
3178 set_gdbarch_prologue_frameless_p (gdbarch
, sparc_prologue_frameless_p
);
3179 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
3180 set_gdbarch_skip_prologue (gdbarch
, sparc_skip_prologue
);
3181 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
);
3182 set_gdbarch_use_generic_dummy_frames (gdbarch
, 0);
3183 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
3186 * Settings that depend only on 32/64 bit word size
3189 switch (info
.bfd_arch_info
->mach
)
3191 case bfd_mach_sparc
:
3192 case bfd_mach_sparc_sparclet
:
3193 case bfd_mach_sparc_sparclite
:
3194 case bfd_mach_sparc_v8plus
:
3195 case bfd_mach_sparc_v8plusa
:
3196 case bfd_mach_sparc_sparclite_le
:
3197 /* 32-bit machine types: */
3199 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3200 set_gdbarch_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3201 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3202 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0x30);
3203 set_gdbarch_call_dummy_length (gdbarch
, 0x38);
3205 /* NOTE: cagney/2002-04-26: Based from info posted by Peter
3206 Schauer around Oct '99. Briefly, due to aspects of the SPARC
3207 ABI, it isn't possible to use ON_STACK with a strictly
3210 Peter Schauer writes ...
3212 No, any call from GDB to a user function returning a
3213 struct/union will fail miserably. Try this:
3232 for (i = 0; i < 4; i++)
3238 Set a breakpoint at the gx = sret () statement, run to it and
3239 issue a `print sret()'. It will not succed with your
3240 approach, and I doubt that continuing the program will work
3243 For details of the ABI see the Sparc Architecture Manual. I
3244 have Version 8 (Prentice Hall ISBN 0-13-825001-4) and the
3245 calling conventions for functions returning aggregate values
3246 are explained in Appendix D.3. */
3248 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3249 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_32
);
3251 set_gdbarch_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3252 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3253 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3254 set_gdbarch_call_dummy_length (gdbarch
, 0);
3255 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3257 set_gdbarch_call_dummy_stack_adjust (gdbarch
, 68);
3258 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3259 set_gdbarch_frame_args_skip (gdbarch
, 68);
3260 set_gdbarch_function_start_offset (gdbarch
, 0);
3261 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3262 set_gdbarch_npc_regnum (gdbarch
, SPARC32_NPC_REGNUM
);
3263 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
);
3264 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3265 set_gdbarch_push_arguments (gdbarch
, sparc32_push_arguments
);
3266 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
3267 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
3269 set_gdbarch_register_byte (gdbarch
, sparc32_register_byte
);
3270 set_gdbarch_register_raw_size (gdbarch
, sparc32_register_size
);
3271 set_gdbarch_register_size (gdbarch
, 4);
3272 set_gdbarch_register_virtual_size (gdbarch
, sparc32_register_size
);
3273 set_gdbarch_register_virtual_type (gdbarch
,
3274 sparc32_register_virtual_type
);
3275 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3276 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_32
));
3278 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3280 set_gdbarch_stack_align (gdbarch
, sparc32_stack_align
);
3281 set_gdbarch_store_struct_return (gdbarch
, sparc32_store_struct_return
);
3282 set_gdbarch_use_struct_convention (gdbarch
,
3283 generic_use_struct_convention
);
3284 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
3285 tdep
->y_regnum
= SPARC32_Y_REGNUM
;
3286 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 32;
3287 tdep
->intreg_size
= 4;
3288 tdep
->reg_save_offset
= 0x60;
3289 tdep
->call_dummy_call_offset
= 0x24;
3292 case bfd_mach_sparc_v9
:
3293 case bfd_mach_sparc_v9a
:
3294 /* 64-bit machine types: */
3295 default: /* Any new machine type is likely to be 64-bit. */
3297 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3298 set_gdbarch_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3299 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3300 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 8 * 4);
3301 set_gdbarch_call_dummy_length (gdbarch
, 192);
3302 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3303 set_gdbarch_call_dummy_start_offset (gdbarch
, 148);
3304 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_64
);
3306 set_gdbarch_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3307 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3308 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3309 set_gdbarch_call_dummy_length (gdbarch
, 0);
3310 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3311 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3313 set_gdbarch_call_dummy_stack_adjust (gdbarch
, 128);
3314 set_gdbarch_frame_args_skip (gdbarch
, 136);
3315 set_gdbarch_function_start_offset (gdbarch
, 0);
3316 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3317 set_gdbarch_npc_regnum (gdbarch
, SPARC64_NPC_REGNUM
);
3318 set_gdbarch_pc_regnum (gdbarch
, SPARC64_PC_REGNUM
);
3319 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3320 set_gdbarch_push_arguments (gdbarch
, sparc64_push_arguments
);
3321 /* NOTE different for at_entry */
3322 set_gdbarch_read_fp (gdbarch
, sparc64_read_fp
);
3323 set_gdbarch_read_sp (gdbarch
, sparc64_read_sp
);
3324 /* Some of the registers aren't 64 bits, but it's a lot simpler just
3325 to assume they all are (since most of them are). */
3326 set_gdbarch_register_byte (gdbarch
, sparc64_register_byte
);
3327 set_gdbarch_register_raw_size (gdbarch
, sparc64_register_size
);
3328 set_gdbarch_register_size (gdbarch
, 8);
3329 set_gdbarch_register_virtual_size (gdbarch
, sparc64_register_size
);
3330 set_gdbarch_register_virtual_type (gdbarch
,
3331 sparc64_register_virtual_type
);
3332 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3333 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_64
));
3335 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3337 set_gdbarch_stack_align (gdbarch
, sparc64_stack_align
);
3338 set_gdbarch_store_struct_return (gdbarch
, sparc64_store_struct_return
);
3339 set_gdbarch_use_struct_convention (gdbarch
,
3340 sparc64_use_struct_convention
);
3341 set_gdbarch_write_sp (gdbarch
, sparc64_write_sp
);
3342 tdep
->y_regnum
= SPARC64_Y_REGNUM
;
3343 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 48;
3344 tdep
->intreg_size
= 8;
3345 tdep
->reg_save_offset
= 0x90;
3346 tdep
->call_dummy_call_offset
= 148 + 4 * 5;
3351 * Settings that vary per-architecture:
3354 switch (info
.bfd_arch_info
->mach
)
3356 case bfd_mach_sparc
:
3357 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3358 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3359 set_gdbarch_num_regs (gdbarch
, 72);
3360 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3361 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3362 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3363 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3364 tdep
->fp_register_bytes
= 32 * 4;
3365 tdep
->print_insn_mach
= bfd_mach_sparc
;
3367 case bfd_mach_sparc_sparclet
:
3368 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparclet_extract_return_value
);
3369 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3370 set_gdbarch_num_regs (gdbarch
, 32 + 32 + 8 + 8 + 8);
3371 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4 + 8*4);
3372 set_gdbarch_register_name (gdbarch
, sparclet_register_name
);
3373 set_gdbarch_deprecated_store_return_value (gdbarch
, sparclet_store_return_value
);
3374 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3375 tdep
->fp_register_bytes
= 0;
3376 tdep
->print_insn_mach
= bfd_mach_sparc_sparclet
;
3378 case bfd_mach_sparc_sparclite
:
3379 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3380 set_gdbarch_frame_chain_valid (gdbarch
, func_frame_chain_valid
);
3381 set_gdbarch_num_regs (gdbarch
, 80);
3382 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3383 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3384 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3385 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3386 tdep
->fp_register_bytes
= 0;
3387 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3389 case bfd_mach_sparc_v8plus
:
3390 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3391 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3392 set_gdbarch_num_regs (gdbarch
, 72);
3393 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3394 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3395 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3396 tdep
->print_insn_mach
= bfd_mach_sparc
;
3397 tdep
->fp_register_bytes
= 32 * 4;
3398 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3400 case bfd_mach_sparc_v8plusa
:
3401 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3402 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3403 set_gdbarch_num_regs (gdbarch
, 72);
3404 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3405 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3406 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3407 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3408 tdep
->fp_register_bytes
= 32 * 4;
3409 tdep
->print_insn_mach
= bfd_mach_sparc
;
3411 case bfd_mach_sparc_sparclite_le
:
3412 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3413 set_gdbarch_frame_chain_valid (gdbarch
, func_frame_chain_valid
);
3414 set_gdbarch_num_regs (gdbarch
, 80);
3415 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3416 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3417 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3418 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3419 tdep
->fp_register_bytes
= 0;
3420 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3422 case bfd_mach_sparc_v9
:
3423 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3424 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3425 set_gdbarch_num_regs (gdbarch
, 125);
3426 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3427 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3428 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3429 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3430 tdep
->fp_register_bytes
= 64 * 4;
3431 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3433 case bfd_mach_sparc_v9a
:
3434 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3435 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3436 set_gdbarch_num_regs (gdbarch
, 125);
3437 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3438 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3439 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3440 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3441 tdep
->fp_register_bytes
= 64 * 4;
3442 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3446 /* Hook in OS ABI-specific overrides, if they have been registered. */
3447 gdbarch_init_osabi (info
, gdbarch
, osabi
);
3453 sparc_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3455 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3460 fprintf_unfiltered (file
, "sparc_dump_tdep: OS ABI = %s\n",
3461 gdbarch_osabi_name (tdep
->osabi
));