* sparc64-tdep.c (sparc64_store_floating_fields): If TYPE is a
[deliverable/binutils-gdb.git] / gdb / sparc64-tdep.c
1 /* Target-dependent code for UltraSPARC.
2
3 Copyright 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "defs.h"
23 #include "arch-utils.h"
24 #include "floatformat.h"
25 #include "frame.h"
26 #include "frame-base.h"
27 #include "frame-unwind.h"
28 #include "gdbcore.h"
29 #include "gdbtypes.h"
30 #include "inferior.h"
31 #include "symtab.h"
32 #include "objfiles.h"
33 #include "osabi.h"
34 #include "regcache.h"
35 #include "target.h"
36 #include "value.h"
37
38 #include "gdb_assert.h"
39 #include "gdb_string.h"
40
41 #include "sparc64-tdep.h"
42
43 /* This file implements the The SPARC 64-bit ABI as defined by the
44 section "Low-Level System Information" of the SPARC Compliance
45 Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
46 SPARC. */
47
48 /* Please use the sparc32_-prefix for 32-bit specific code, the
49 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
50 code can handle both. */
51 \f
52 /* The functions on this page are intended to be used to classify
53 function arguments. */
54
55 /* Return the contents if register REGNUM as an address. */
56
57 static CORE_ADDR
58 sparc_address_from_register (int regnum)
59 {
60 ULONGEST addr;
61
62 regcache_cooked_read_unsigned (current_regcache, regnum, &addr);
63 return addr;
64 }
65
66 /* Check whether TYPE is "Integral or Pointer". */
67
68 static int
69 sparc64_integral_or_pointer_p (const struct type *type)
70 {
71 switch (TYPE_CODE (type))
72 {
73 case TYPE_CODE_INT:
74 case TYPE_CODE_BOOL:
75 case TYPE_CODE_CHAR:
76 case TYPE_CODE_ENUM:
77 case TYPE_CODE_RANGE:
78 {
79 int len = TYPE_LENGTH (type);
80 gdb_assert (len == 1 || len == 2 || len == 4 || len == 8);
81 }
82 return 1;
83 case TYPE_CODE_PTR:
84 case TYPE_CODE_REF:
85 {
86 int len = TYPE_LENGTH (type);
87 gdb_assert (len == 8);
88 }
89 return 1;
90 default:
91 break;
92 }
93
94 return 0;
95 }
96
97 /* Check whether TYPE is "Floating". */
98
99 static int
100 sparc64_floating_p (const struct type *type)
101 {
102 switch (TYPE_CODE (type))
103 {
104 case TYPE_CODE_FLT:
105 {
106 int len = TYPE_LENGTH (type);
107 gdb_assert (len == 4 || len == 8 || len == 16);
108 }
109 return 1;
110 default:
111 break;
112 }
113
114 return 0;
115 }
116
117 /* Check whether TYPE is "Structure or Union". */
118
119 static int
120 sparc64_structure_or_union_p (const struct type *type)
121 {
122 switch (TYPE_CODE (type))
123 {
124 case TYPE_CODE_STRUCT:
125 case TYPE_CODE_UNION:
126 return 1;
127 default:
128 break;
129 }
130
131 return 0;
132 }
133
134 /* Register information. */
135
136 struct sparc64_register_info
137 {
138 char *name;
139 struct type **type;
140 };
141
142 static struct sparc64_register_info sparc64_register_info[] =
143 {
144 { "g0", &builtin_type_int64 },
145 { "g1", &builtin_type_int64 },
146 { "g2", &builtin_type_int64 },
147 { "g3", &builtin_type_int64 },
148 { "g4", &builtin_type_int64 },
149 { "g5", &builtin_type_int64 },
150 { "g6", &builtin_type_int64 },
151 { "g7", &builtin_type_int64 },
152
153 { "o0", &builtin_type_int64 },
154 { "o1", &builtin_type_int64 },
155 { "o2", &builtin_type_int64 },
156 { "o3", &builtin_type_int64 },
157 { "o4", &builtin_type_int64 },
158 { "o5", &builtin_type_int64 },
159 { "sp", &builtin_type_void_data_ptr },
160 { "o7", &builtin_type_int64 },
161
162 { "l0", &builtin_type_int64 },
163 { "l1", &builtin_type_int64 },
164 { "l2", &builtin_type_int64 },
165 { "l3", &builtin_type_int64 },
166 { "l4", &builtin_type_int64 },
167 { "l5", &builtin_type_int64 },
168 { "l6", &builtin_type_int64 },
169 { "l7", &builtin_type_int64 },
170
171 { "i0", &builtin_type_int64 },
172 { "i1", &builtin_type_int64 },
173 { "i2", &builtin_type_int64 },
174 { "i3", &builtin_type_int64 },
175 { "i4", &builtin_type_int64 },
176 { "i5", &builtin_type_int64 },
177 { "fp", &builtin_type_void_data_ptr },
178 { "i7", &builtin_type_int64 },
179
180 { "f0", &builtin_type_float },
181 { "f1", &builtin_type_float },
182 { "f2", &builtin_type_float },
183 { "f3", &builtin_type_float },
184 { "f4", &builtin_type_float },
185 { "f5", &builtin_type_float },
186 { "f6", &builtin_type_float },
187 { "f7", &builtin_type_float },
188 { "f8", &builtin_type_float },
189 { "f9", &builtin_type_float },
190 { "f10", &builtin_type_float },
191 { "f11", &builtin_type_float },
192 { "f12", &builtin_type_float },
193 { "f13", &builtin_type_float },
194 { "f14", &builtin_type_float },
195 { "f15", &builtin_type_float },
196 { "f16", &builtin_type_float },
197 { "f17", &builtin_type_float },
198 { "f18", &builtin_type_float },
199 { "f19", &builtin_type_float },
200 { "f20", &builtin_type_float },
201 { "f21", &builtin_type_float },
202 { "f22", &builtin_type_float },
203 { "f23", &builtin_type_float },
204 { "f24", &builtin_type_float },
205 { "f25", &builtin_type_float },
206 { "f26", &builtin_type_float },
207 { "f27", &builtin_type_float },
208 { "f28", &builtin_type_float },
209 { "f29", &builtin_type_float },
210 { "f30", &builtin_type_float },
211 { "f31", &builtin_type_float },
212 { "f32", &builtin_type_double },
213 { "f34", &builtin_type_double },
214 { "f36", &builtin_type_double },
215 { "f38", &builtin_type_double },
216 { "f40", &builtin_type_double },
217 { "f42", &builtin_type_double },
218 { "f44", &builtin_type_double },
219 { "f46", &builtin_type_double },
220 { "f48", &builtin_type_double },
221 { "f50", &builtin_type_double },
222 { "f52", &builtin_type_double },
223 { "f54", &builtin_type_double },
224 { "f56", &builtin_type_double },
225 { "f58", &builtin_type_double },
226 { "f60", &builtin_type_double },
227 { "f62", &builtin_type_double },
228
229 { "pc", &builtin_type_void_func_ptr },
230 { "npc", &builtin_type_void_func_ptr },
231
232 /* This raw register contains the contents of %cwp, %pstate, %asi
233 and %ccr as laid out in a %tstate register. */
234 /* FIXME: Give it a name until we start using register groups. */
235 { "state", &builtin_type_int64 },
236
237 { "fsr", &builtin_type_int64 },
238 { "fprs", &builtin_type_int64 },
239
240 /* "Although Y is a 64-bit register, its high-order 32 bits are
241 reserved and always read as 0." */
242 { "y", &builtin_type_int64 }
243 };
244
245 /* Total number of registers. */
246 #define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
247
248 /* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
249 registers as "psuedo" registers. */
250
251 static struct sparc64_register_info sparc64_pseudo_register_info[] =
252 {
253 { "cwp", &builtin_type_int64 },
254 { "pstate", &builtin_type_int64 },
255 { "asi", &builtin_type_int64 },
256 { "ccr", &builtin_type_int64 },
257
258 { "d0", &builtin_type_double },
259 { "d2", &builtin_type_double },
260 { "d4", &builtin_type_double },
261 { "d6", &builtin_type_double },
262 { "d8", &builtin_type_double },
263 { "d10", &builtin_type_double },
264 { "d12", &builtin_type_double },
265 { "d14", &builtin_type_double },
266 { "d16", &builtin_type_double },
267 { "d18", &builtin_type_double },
268 { "d20", &builtin_type_double },
269 { "d22", &builtin_type_double },
270 { "d24", &builtin_type_double },
271 { "d26", &builtin_type_double },
272 { "d28", &builtin_type_double },
273 { "d30", &builtin_type_double },
274 { "d32", &builtin_type_double },
275 { "d34", &builtin_type_double },
276 { "d36", &builtin_type_double },
277 { "d38", &builtin_type_double },
278 { "d40", &builtin_type_double },
279 { "d42", &builtin_type_double },
280 { "d44", &builtin_type_double },
281 { "d46", &builtin_type_double },
282 { "d48", &builtin_type_double },
283 { "d50", &builtin_type_double },
284 { "d52", &builtin_type_double },
285 { "d54", &builtin_type_double },
286 { "d56", &builtin_type_double },
287 { "d58", &builtin_type_double },
288 { "d60", &builtin_type_double },
289 { "d62", &builtin_type_double },
290
291 { "q0", &builtin_type_long_double },
292 { "q4", &builtin_type_long_double },
293 { "q8", &builtin_type_long_double },
294 { "q12", &builtin_type_long_double },
295 { "q16", &builtin_type_long_double },
296 { "q20", &builtin_type_long_double },
297 { "q24", &builtin_type_long_double },
298 { "q28", &builtin_type_long_double },
299 { "q32", &builtin_type_long_double },
300 { "q36", &builtin_type_long_double },
301 { "q40", &builtin_type_long_double },
302 { "q44", &builtin_type_long_double },
303 { "q48", &builtin_type_long_double },
304 { "q52", &builtin_type_long_double },
305 { "q56", &builtin_type_long_double },
306 { "q60", &builtin_type_long_double }
307 };
308
309 /* Total number of pseudo registers. */
310 #define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
311
312 /* Return the name of register REGNUM. */
313
314 static const char *
315 sparc64_register_name (int regnum)
316 {
317 if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
318 return sparc64_register_info[regnum].name;
319
320 if (regnum >= SPARC64_NUM_REGS
321 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
322 return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
323
324 return NULL;
325 }
326
327 /* Return the GDB type object for the "standard" data type of data in
328 register REGNUM. */
329
330 static struct type *
331 sparc64_register_type (struct gdbarch *gdbarch, int regnum)
332 {
333 if (regnum >= SPARC64_NUM_REGS
334 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
335 return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
336
337 gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
338 return *sparc64_register_info[regnum].type;
339 }
340
341 static void
342 sparc64_pseudo_register_read (struct gdbarch *gdbarch,
343 struct regcache *regcache,
344 int regnum, void *buf)
345 {
346 gdb_assert (regnum >= SPARC64_NUM_REGS);
347
348 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
349 {
350 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
351 regcache_raw_read (regcache, regnum, buf);
352 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
353 }
354 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
355 {
356 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
357 regcache_raw_read (regcache, regnum, buf);
358 }
359 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
360 {
361 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
362 regcache_raw_read (regcache, regnum, buf);
363 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
364 regcache_raw_read (regcache, regnum + 2, ((char *)buf) + 8);
365 regcache_raw_read (regcache, regnum + 3, ((char *)buf) + 12);
366 }
367 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
368 {
369 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
370 regcache_raw_read (regcache, regnum, buf);
371 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 8);
372 }
373 else if (regnum == SPARC64_CWP_REGNUM
374 || regnum == SPARC64_PSTATE_REGNUM
375 || regnum == SPARC64_ASI_REGNUM
376 || regnum == SPARC64_CCR_REGNUM)
377 {
378 ULONGEST state;
379
380 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
381 switch (regnum)
382 {
383 case SPARC64_CWP_REGNUM:
384 state = (state >> 0) & ((1 << 5) - 1);
385 break;
386 case SPARC64_PSTATE_REGNUM:
387 state = (state >> 8) & ((1 << 12) - 1);
388 break;
389 case SPARC64_ASI_REGNUM:
390 state = (state >> 24) & ((1 << 8) - 1);
391 break;
392 case SPARC64_CCR_REGNUM:
393 state = (state >> 32) & ((1 << 8) - 1);
394 break;
395 }
396 store_unsigned_integer (buf, 8, state);
397 }
398 }
399
400 static void
401 sparc64_pseudo_register_write (struct gdbarch *gdbarch,
402 struct regcache *regcache,
403 int regnum, const void *buf)
404 {
405 gdb_assert (regnum >= SPARC64_NUM_REGS);
406
407 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
408 {
409 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
410 regcache_raw_write (regcache, regnum, buf);
411 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
412 }
413 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
414 {
415 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
416 regcache_raw_write (regcache, regnum, buf);
417 }
418 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
419 {
420 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
421 regcache_raw_write (regcache, regnum, buf);
422 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
423 regcache_raw_write (regcache, regnum + 2, ((const char *)buf) + 8);
424 regcache_raw_write (regcache, regnum + 3, ((const char *)buf) + 12);
425 }
426 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
427 {
428 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
429 regcache_raw_write (regcache, regnum, buf);
430 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 8);
431 }
432 else if (regnum == SPARC64_CWP_REGNUM
433 || regnum == SPARC64_PSTATE_REGNUM
434 || regnum == SPARC64_ASI_REGNUM
435 || regnum == SPARC64_CCR_REGNUM)
436 {
437 ULONGEST state, bits;
438
439 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
440 bits = extract_unsigned_integer (buf, 8);
441 switch (regnum)
442 {
443 case SPARC64_CWP_REGNUM:
444 state |= ((bits & ((1 << 5) - 1)) << 0);
445 break;
446 case SPARC64_PSTATE_REGNUM:
447 state |= ((bits & ((1 << 12) - 1)) << 8);
448 break;
449 case SPARC64_ASI_REGNUM:
450 state |= ((bits & ((1 << 8) - 1)) << 24);
451 break;
452 case SPARC64_CCR_REGNUM:
453 state |= ((bits & ((1 << 8) - 1)) << 32);
454 break;
455 }
456 regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
457 }
458 }
459 \f
460
461 /* Return PC of first real instruction of the function starting at
462 START_PC. */
463
464 static CORE_ADDR
465 sparc64_skip_prologue (CORE_ADDR start_pc)
466 {
467 struct symtab_and_line sal;
468 CORE_ADDR func_start, func_end;
469 struct sparc_frame_cache cache;
470
471 /* This is the preferred method, find the end of the prologue by
472 using the debugging information. */
473 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
474 {
475 sal = find_pc_line (func_start, 0);
476
477 if (sal.end < func_end
478 && start_pc <= sal.end)
479 return sal.end;
480 }
481
482 return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache);
483 }
484
485 /* Normal frames. */
486
487 static struct sparc_frame_cache *
488 sparc64_frame_cache (struct frame_info *next_frame, void **this_cache)
489 {
490 return sparc_frame_cache (next_frame, this_cache);
491 }
492
493 static void
494 sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache,
495 struct frame_id *this_id)
496 {
497 struct sparc_frame_cache *cache =
498 sparc64_frame_cache (next_frame, this_cache);
499
500 /* This marks the outermost frame. */
501 if (cache->base == 0)
502 return;
503
504 (*this_id) = frame_id_build (cache->base, cache->pc);
505 }
506
507 static void
508 sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
509 int regnum, int *optimizedp,
510 enum lval_type *lvalp, CORE_ADDR *addrp,
511 int *realnump, void *valuep)
512 {
513 struct sparc_frame_cache *cache =
514 sparc64_frame_cache (next_frame, this_cache);
515
516 if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
517 {
518 *optimizedp = 0;
519 *lvalp = not_lval;
520 *addrp = 0;
521 *realnump = -1;
522 if (valuep)
523 {
524 CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0;
525
526 regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
527 pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
528 store_unsigned_integer (valuep, 8, pc);
529 }
530 return;
531 }
532
533 /* The previous frame's `local' and `in' registers have been saved
534 in the register save area. */
535 if (!cache->frameless_p
536 && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
537 {
538 *optimizedp = 0;
539 *lvalp = lval_memory;
540 *addrp = cache->base + BIAS + (regnum - SPARC_L0_REGNUM) * 8;
541 *realnump = -1;
542 if (valuep)
543 {
544 struct gdbarch *gdbarch = get_frame_arch (next_frame);
545
546 /* Read the value in from memory. */
547 read_memory (*addrp, valuep, register_size (gdbarch, regnum));
548 }
549 return;
550 }
551
552 /* The previous frame's `out' registers are accessable as the
553 current frame's `in' registers. */
554 if (!cache->frameless_p
555 && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
556 regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
557
558 frame_register_unwind (next_frame, regnum,
559 optimizedp, lvalp, addrp, realnump, valuep);
560 }
561
562 static const struct frame_unwind sparc64_frame_unwind =
563 {
564 NORMAL_FRAME,
565 sparc64_frame_this_id,
566 sparc64_frame_prev_register
567 };
568
569 static const struct frame_unwind *
570 sparc64_frame_sniffer (struct frame_info *next_frame)
571 {
572 return &sparc64_frame_unwind;
573 }
574 \f
575
576 static CORE_ADDR
577 sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache)
578 {
579 struct sparc_frame_cache *cache =
580 sparc64_frame_cache (next_frame, this_cache);
581
582 /* ??? Should we take BIAS into account here? */
583 return cache->base;
584 }
585
586 static const struct frame_base sparc64_frame_base =
587 {
588 &sparc64_frame_unwind,
589 sparc64_frame_base_address,
590 sparc64_frame_base_address,
591 sparc64_frame_base_address
592 };
593 \f
594 /* Check whether TYPE must be 16-byte aligned. */
595
596 static int
597 sparc64_16_byte_align_p (struct type *type)
598 {
599 if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16)
600 return 1;
601
602 if (sparc64_structure_or_union_p (type))
603 {
604 int i;
605
606 for (i = 0; i < TYPE_NFIELDS (type); i++)
607 {
608 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
609
610 if (sparc64_16_byte_align_p (subtype))
611 return 1;
612 }
613 }
614
615 return 0;
616 }
617
618 /* Store floating fields of element ELEMENT of an "parameter array"
619 that has type TYPE and is stored at BITPOS in VALBUF in the
620 apropriate registers of REGCACHE. This function can be called
621 recursively and therefore handles floating types in addition to
622 structures. */
623
624 static void
625 sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
626 char *valbuf, int element, int bitpos)
627 {
628 gdb_assert (element < 16);
629
630 if (sparc64_floating_p (type))
631 {
632 int len = TYPE_LENGTH (type);
633 int regnum;
634
635 if (len == 16)
636 {
637 gdb_assert (bitpos == 0);
638 gdb_assert ((element % 2) == 0);
639
640 regnum = SPARC64_Q0_REGNUM + element / 2;
641 regcache_cooked_write (regcache, regnum, valbuf);
642 }
643 else if (len == 8)
644 {
645 gdb_assert (bitpos == 0 || bitpos == 64);
646
647 regnum = SPARC64_D0_REGNUM + element + bitpos / 64;
648 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
649 }
650 else
651 {
652 gdb_assert (len == 4);
653 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128);
654
655 regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32;
656 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
657 }
658 }
659 else if (sparc64_structure_or_union_p (type))
660 {
661 int i;
662
663 for (i = 0; i < TYPE_NFIELDS (type); i++)
664 {
665 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
666 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
667
668 sparc64_store_floating_fields (regcache, subtype, valbuf,
669 element, subpos);
670 }
671
672 /* GCC has an interesting bug. If TYPE is a structure that has
673 a single `float' member, GCC doesn't treat it as a structure
674 at all, but rather as an ordinary `float' argument. This
675 argument will be stored in %f1, as required by the psABI.
676 However, as a member of a structure the psABI requires it to
677 be stored in. To appease GCC, if a structure has only a
678 single `float' member, we store its value in %f1 too. */
679 if (TYPE_NFIELDS (type) == 1)
680 {
681 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
682
683 if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
684 regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf);
685 }
686 }
687 }
688
689 /* Fetch floating fields from a variable of type TYPE from the
690 appropriate registers for BITPOS in REGCACHE and store it at BITPOS
691 in VALBUF. This function can be called recursively and therefore
692 handles floating types in addition to structures. */
693
694 static void
695 sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
696 char *valbuf, int bitpos)
697 {
698 if (sparc64_floating_p (type))
699 {
700 int len = TYPE_LENGTH (type);
701 int regnum;
702
703 if (len == 16)
704 {
705 gdb_assert (bitpos == 0 || bitpos == 128);
706
707 regnum = SPARC64_Q0_REGNUM + bitpos / 128;
708 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
709 }
710 else if (len == 8)
711 {
712 gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256);
713
714 regnum = SPARC64_D0_REGNUM + bitpos / 64;
715 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
716 }
717 else
718 {
719 gdb_assert (len == 4);
720 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256);
721
722 regnum = SPARC_F0_REGNUM + bitpos / 32;
723 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
724 }
725 }
726 else if (sparc64_structure_or_union_p (type))
727 {
728 int i;
729
730 for (i = 0; i < TYPE_NFIELDS (type); i++)
731 {
732 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
733 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
734
735 sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);
736 }
737 }
738 }
739
740 /* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
741 non-zero) in REGCACHE and on the stack (starting from address SP). */
742
743 static CORE_ADDR
744 sparc64_store_arguments (struct regcache *regcache, int nargs,
745 struct value **args, CORE_ADDR sp,
746 int struct_return, CORE_ADDR struct_addr)
747 {
748 /* Number of extended words in the "parameter array". */
749 int num_elements = 0;
750 int element = 0;
751 int i;
752
753 /* Take BIAS into account. */
754 sp += BIAS;
755
756 /* First we calculate the number of extended words in the "parameter
757 array". While doing so we also convert some of the arguments. */
758
759 if (struct_return)
760 num_elements++;
761
762 for (i = 0; i < nargs; i++)
763 {
764 struct type *type = VALUE_TYPE (args[i]);
765 int len = TYPE_LENGTH (type);
766
767 if (sparc64_structure_or_union_p (type))
768 {
769 /* Structure or Union arguments. */
770 if (len <= 16)
771 {
772 if (num_elements % 2 && sparc64_16_byte_align_p (type))
773 num_elements++;
774 num_elements += ((len + 7) / 8);
775 }
776 else
777 {
778 /* The psABI says that "Structures or unions larger than
779 sixteen bytes are copied by the caller and passed
780 indirectly; the caller will pass the address of a
781 correctly aligned structure value. This sixty-four
782 bit address will occupy one word in the parameter
783 array, and may be promoted to an %o register like any
784 other pointer value." Allocate memory for these
785 values on the stack. */
786 sp -= len;
787
788 /* Use 16-byte alignment for these values. That's
789 always correct, and wasting a few bytes shouldn't be
790 a problem. */
791 sp &= ~0xf;
792
793 write_memory (sp, VALUE_CONTENTS (args[i]), len);
794 args[i] = value_from_pointer (lookup_pointer_type (type), sp);
795 num_elements++;
796 }
797 }
798 else if (sparc64_floating_p (type))
799 {
800 /* Floating arguments. */
801
802 if (len == 16)
803 {
804 /* The psABI says that "Each quad-precision parameter
805 value will be assigned to two extended words in the
806 parameter array. */
807 num_elements += 2;
808
809 /* The psABI says that "Long doubles must be
810 quad-aligned, and thus a hole might be introduced
811 into the parameter array to force alignment." Skip
812 an element if necessary. */
813 if (num_elements % 2)
814 num_elements++;
815 }
816 else
817 num_elements++;
818 }
819 else
820 {
821 /* Integral and pointer arguments. */
822 gdb_assert (sparc64_integral_or_pointer_p (type));
823
824 /* The psABI says that "Each argument value of integral type
825 smaller than an extended word will be widened by the
826 caller to an extended word according to the signed-ness
827 of the argument type." */
828 if (len < 8)
829 args[i] = value_cast (builtin_type_int64, args[i]);
830 num_elements++;
831 }
832 }
833
834 /* Allocate the "parameter array". */
835 sp -= num_elements * 8;
836
837 /* The psABI says that "Every stack frame must be 16-byte aligned." */
838 sp &= ~0xf;
839
840 /* Now we store the arguments in to the "paramater array". Some
841 Integer or Pointer arguments and Structure or Union arguments
842 will be passed in %o registers. Some Floating arguments and
843 floating members of structures are passed in floating-point
844 registers. However, for functions with variable arguments,
845 floating arguments are stored in an %0 register, and for
846 functions without a prototype floating arguments are stored in
847 both a floating-point and an %o registers, or a floating-point
848 register and memory. To simplify the logic here we always pass
849 arguments in memory, an %o register, and a floating-point
850 register if appropriate. This should be no problem since the
851 contents of any unused memory or registers in the "parameter
852 array" are undefined. */
853
854 if (struct_return)
855 {
856 regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr);
857 element++;
858 }
859
860 for (i = 0; i < nargs; i++)
861 {
862 char *valbuf = VALUE_CONTENTS (args[i]);
863 struct type *type = VALUE_TYPE (args[i]);
864 int len = TYPE_LENGTH (type);
865 int regnum = -1;
866 char buf[16];
867
868 if (sparc64_structure_or_union_p (type))
869 {
870 /* Structure or Union arguments. */
871 gdb_assert (len <= 16);
872 memset (buf, 0, sizeof (buf));
873 valbuf = memcpy (buf, valbuf, len);
874
875 if (element % 2 && sparc64_16_byte_align_p (type))
876 element++;
877
878 if (element < 6)
879 {
880 regnum = SPARC_O0_REGNUM + element;
881 if (len > 8 && element < 5)
882 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
883 }
884
885 if (element < 16)
886 sparc64_store_floating_fields (regcache, type, valbuf, element, 0);
887 }
888 else if (sparc64_floating_p (type))
889 {
890 /* Floating arguments. */
891 if (len == 16)
892 {
893 if (element % 2)
894 element++;
895 if (element < 16)
896 regnum = SPARC64_Q0_REGNUM + element / 2;
897 }
898 else if (len == 8)
899 {
900 if (element < 16)
901 regnum = SPARC64_D0_REGNUM + element;
902 }
903 else
904 {
905 /* The psABI says "Each single-precision parameter value
906 will be assigned to one extended word in the
907 parameter array, and right-justified within that
908 word; the left half (even floatregister) is
909 undefined." Even though the psABI says that "the
910 left half is undefined", set it to zero here. */
911 memset (buf, 0, 4);
912 valbuf = memcpy (buf + 4, valbuf, 4);
913 len = 8;
914 if (element < 16)
915 regnum = SPARC64_D0_REGNUM;
916 }
917 }
918 else
919 {
920 /* Integral and pointer arguments. */
921 gdb_assert (len == 8);
922 if (element < 6)
923 regnum = SPARC_O0_REGNUM + element;
924 }
925
926 if (regnum != -1)
927 {
928 regcache_cooked_write (regcache, regnum, valbuf);
929
930 /* If we're storing the value in a floating-point register,
931 also store it in the corresponding %0 register(s). */
932 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM)
933 {
934 gdb_assert (element < 6);
935 regnum = SPARC_O0_REGNUM + element;
936 regcache_cooked_write (regcache, regnum, valbuf);
937 }
938 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM)
939 {
940 gdb_assert (element < 6);
941 regnum = SPARC_O0_REGNUM + element;
942 regcache_cooked_write (regcache, regnum, valbuf);
943 regcache_cooked_write (regcache, regnum + 1, valbuf);
944 }
945 }
946
947 /* Always store the argument in memeory. */
948 write_memory (sp + element * 8, valbuf, len);
949 element += ((len + 7) / 8);
950 }
951
952 gdb_assert (element == num_elements);
953
954 /* Take BIAS into account. */
955 sp -= BIAS;
956 return sp;
957 }
958
959 static CORE_ADDR
960 sparc64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
961 struct regcache *regcache, CORE_ADDR bp_addr,
962 int nargs, struct value **args, CORE_ADDR sp,
963 int struct_return, CORE_ADDR struct_addr)
964 {
965 /* Set return address. */
966 regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8);
967
968 /* Set up function arguments. */
969 sp = sparc64_store_arguments (regcache, nargs, args, sp,
970 struct_return, struct_addr);
971
972 /* Allocate the register save area. */
973 sp -= 16 * 8;
974
975 /* Stack should be 16-byte aligned at this point. */
976 gdb_assert ((sp + BIAS) % 16 == 0);
977
978 /* Finally, update the stack pointer. */
979 regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
980
981 return sp;
982 }
983 \f
984
985 /* Extract from an array REGBUF containing the (raw) register state, a
986 function return value of TYPE, and copy that into VALBUF. */
987
988 static void
989 sparc64_extract_return_value (struct type *type, struct regcache *regcache,
990 void *valbuf)
991 {
992 int len = TYPE_LENGTH (type);
993 char buf[32];
994 int i;
995
996 if (sparc64_structure_or_union_p (type))
997 {
998 /* Structure or Union return values. */
999 gdb_assert (len <= 32);
1000
1001 for (i = 0; i < ((len + 7) / 8); i++)
1002 regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
1003 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1004 sparc64_extract_floating_fields (regcache, type, buf, 0);
1005 memcpy (valbuf, buf, len);
1006 }
1007 else if (sparc64_floating_p (type))
1008 {
1009 /* Floating return values. */
1010 for (i = 0; i < len / 4; i++)
1011 regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1012 memcpy (valbuf, buf, len);
1013 }
1014 else
1015 {
1016 /* Integral and pointer return values. */
1017 gdb_assert (sparc64_integral_or_pointer_p (type));
1018
1019 /* Just stripping off any unused bytes should preserve the
1020 signed-ness just fine. */
1021 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
1022 memcpy (valbuf, buf + 8 - len, len);
1023 }
1024 }
1025
1026 /* Write into the appropriate registers a function return value stored
1027 in VALBUF of type TYPE. */
1028
1029 static void
1030 sparc64_store_return_value (struct type *type, struct regcache *regcache,
1031 const void *valbuf)
1032 {
1033 int len = TYPE_LENGTH (type);
1034 char buf[16];
1035 int i;
1036
1037 if (sparc64_structure_or_union_p (type))
1038 {
1039 /* Structure or Union return values. */
1040 gdb_assert (len <= 32);
1041
1042 /* Simplify matters by storing the complete value (including
1043 floating members) into %o0 and %o1. Floating members are
1044 also store in the appropriate floating-point registers. */
1045 memset (buf, 0, sizeof (buf));
1046 memcpy (buf, valbuf, len);
1047 for (i = 0; i < ((len + 7) / 8); i++)
1048 regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
1049 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1050 sparc64_store_floating_fields (regcache, type, buf, 0, 0);
1051 }
1052 else if (sparc64_floating_p (type))
1053 {
1054 /* Floating return values. */
1055 memcpy (buf, valbuf, len);
1056 for (i = 0; i < len / 4; i++)
1057 regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1058 }
1059 else
1060 {
1061 /* Integral and pointer return values. */
1062 gdb_assert (sparc64_integral_or_pointer_p (type));
1063
1064 /* ??? Do we need to do any sign-extension here? */
1065 memset (buf, 0, 8);
1066 memcpy (buf + 8 - len, valbuf, len);
1067 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
1068 }
1069 }
1070
1071 static enum return_value_convention
1072 sparc64_return_value (struct gdbarch *gdbarch, struct type *type,
1073 struct regcache *regcache, void *readbuf,
1074 const void *writebuf)
1075 {
1076 if (TYPE_LENGTH (type) > 32)
1077 return RETURN_VALUE_STRUCT_CONVENTION;
1078
1079 if (readbuf)
1080 sparc64_extract_return_value (type, regcache, readbuf);
1081 if (writebuf)
1082 sparc64_store_return_value (type, regcache, writebuf);
1083
1084 return RETURN_VALUE_REGISTER_CONVENTION;
1085 }
1086 \f
1087
1088 void
1089 sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1090 {
1091 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1092
1093 tdep->pc_regnum = SPARC64_PC_REGNUM;
1094 tdep->npc_regnum = SPARC64_NPC_REGNUM;
1095
1096 /* This is what all the fuss is about. */
1097 set_gdbarch_long_bit (gdbarch, 64);
1098 set_gdbarch_long_long_bit (gdbarch, 64);
1099 set_gdbarch_ptr_bit (gdbarch, 64);
1100
1101 set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
1102 set_gdbarch_register_name (gdbarch, sparc64_register_name);
1103 set_gdbarch_register_type (gdbarch, sparc64_register_type);
1104 set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
1105 set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
1106 set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
1107
1108 /* Register numbers of various important registers. */
1109 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
1110
1111 /* Call dummy code. */
1112 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1113 set_gdbarch_push_dummy_code (gdbarch, NULL);
1114 set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
1115
1116 set_gdbarch_return_value (gdbarch, sparc64_return_value);
1117 set_gdbarch_return_value_on_stack
1118 (gdbarch, generic_return_value_on_stack_not);
1119 set_gdbarch_stabs_argument_has_addr
1120 (gdbarch, default_stabs_argument_has_addr);
1121
1122 set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
1123
1124 frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
1125 frame_base_set_default (gdbarch, &sparc64_frame_base);
1126 }
1127 \f
1128
1129 /* Helper functions for dealing with register sets. */
1130
1131 #define TSTATE_CWP 0x000000000000001fULL
1132 #define TSTATE_ICC 0x0000000f00000000ULL
1133 #define TSTATE_XCC 0x000000f000000000ULL
1134
1135 #define PSR_S 0x00000080
1136 #define PSR_ICC 0x00f00000
1137 #define PSR_VERS 0x0f000000
1138 #define PSR_IMPL 0xf0000000
1139 #define PSR_V8PLUS 0xff000000
1140 #define PSR_XCC 0x000f0000
1141
1142 void
1143 sparc64_supply_gregset (const struct sparc_gregset *gregset,
1144 struct regcache *regcache,
1145 int regnum, const void *gregs)
1146 {
1147 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1148 const char *regs = gregs;
1149 int i;
1150
1151 if (sparc32)
1152 {
1153 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1154 {
1155 int offset = gregset->r_tstate_offset;
1156 ULONGEST tstate, psr;
1157 char buf[4];
1158
1159 tstate = extract_unsigned_integer (regs + offset, 8);
1160 psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12)
1161 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS);
1162 store_unsigned_integer (buf, 4, psr);
1163 regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf);
1164 }
1165
1166 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1167 regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1168 regs + gregset->r_pc_offset + 4);
1169
1170 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1171 regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1172 regs + gregset->r_npc_offset + 4);
1173
1174 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
1175 {
1176 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1177 regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset);
1178 }
1179 }
1180 else
1181 {
1182 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1183 regcache_raw_supply (regcache, SPARC64_STATE_REGNUM,
1184 regs + gregset->r_tstate_offset);
1185
1186 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1187 regcache_raw_supply (regcache, SPARC64_PC_REGNUM,
1188 regs + gregset->r_pc_offset);
1189
1190 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1191 regcache_raw_supply (regcache, SPARC64_NPC_REGNUM,
1192 regs + gregset->r_npc_offset);
1193
1194 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
1195 {
1196 char buf[8];
1197
1198 memset (buf, 0, 8);
1199 memcpy (buf + 8 - gregset->r_y_size,
1200 regs + gregset->r_y_offset, gregset->r_y_size);
1201 regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf);
1202 }
1203
1204 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1205 && gregset->r_fprs_offset != -1)
1206 regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM,
1207 regs + gregset->r_fprs_offset);
1208 }
1209
1210 if (regnum == SPARC_G0_REGNUM || regnum == -1)
1211 regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1212
1213 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1214 {
1215 int offset = gregset->r_g1_offset;
1216
1217 if (sparc32)
1218 offset += 4;
1219
1220 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1221 {
1222 if (regnum == i || regnum == -1)
1223 regcache_raw_supply (regcache, i, regs + offset);
1224 offset += 8;
1225 }
1226 }
1227
1228 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1229 {
1230 /* Not all of the register set variants include Locals and
1231 Inputs. For those that don't, we read them off the stack. */
1232 if (gregset->r_l0_offset == -1)
1233 {
1234 ULONGEST sp;
1235
1236 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1237 sparc_supply_rwindow (regcache, sp, regnum);
1238 }
1239 else
1240 {
1241 int offset = gregset->r_l0_offset;
1242
1243 if (sparc32)
1244 offset += 4;
1245
1246 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1247 {
1248 if (regnum == i || regnum == -1)
1249 regcache_raw_supply (regcache, i, regs + offset);
1250 offset += 8;
1251 }
1252 }
1253 }
1254 }
1255
1256 void
1257 sparc64_collect_gregset (const struct sparc_gregset *gregset,
1258 const struct regcache *regcache,
1259 int regnum, void *gregs)
1260 {
1261 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1262 char *regs = gregs;
1263 int i;
1264
1265 if (sparc32)
1266 {
1267 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1268 {
1269 int offset = gregset->r_tstate_offset;
1270 ULONGEST tstate, psr;
1271 char buf[8];
1272
1273 tstate = extract_unsigned_integer (regs + offset, 8);
1274 regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf);
1275 psr = extract_unsigned_integer (buf, 4);
1276 tstate |= (psr & PSR_ICC) << 12;
1277 if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS)
1278 tstate |= (psr & PSR_XCC) << 20;
1279 store_unsigned_integer (buf, 8, tstate);
1280 memcpy (regs + offset, buf, 8);
1281 }
1282
1283 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1284 regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1285 regs + gregset->r_pc_offset + 4);
1286
1287 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1288 regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1289 regs + gregset->r_npc_offset + 4);
1290
1291 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
1292 {
1293 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1294 regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset);
1295 }
1296 }
1297 else
1298 {
1299 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1300 regcache_raw_collect (regcache, SPARC64_STATE_REGNUM,
1301 regs + gregset->r_tstate_offset);
1302
1303 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1304 regcache_raw_collect (regcache, SPARC64_PC_REGNUM,
1305 regs + gregset->r_pc_offset);
1306
1307 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1308 regcache_raw_collect (regcache, SPARC64_NPC_REGNUM,
1309 regs + gregset->r_npc_offset);
1310
1311 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
1312 {
1313 char buf[8];
1314
1315 regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf);
1316 memcpy (regs + gregset->r_y_offset,
1317 buf + 8 - gregset->r_y_size, gregset->r_y_size);
1318 }
1319
1320 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1321 && gregset->r_fprs_offset != -1)
1322 regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM,
1323 regs + gregset->r_fprs_offset);
1324
1325 }
1326
1327 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1328 {
1329 int offset = gregset->r_g1_offset;
1330
1331 if (sparc32)
1332 offset += 4;
1333
1334 /* %g0 is always zero. */
1335 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1336 {
1337 if (regnum == i || regnum == -1)
1338 regcache_raw_collect (regcache, i, regs + offset);
1339 offset += 8;
1340 }
1341 }
1342
1343 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1344 {
1345 /* Not all of the register set variants include Locals and
1346 Inputs. For those that don't, we read them off the stack. */
1347 if (gregset->r_l0_offset != -1)
1348 {
1349 int offset = gregset->r_l0_offset;
1350
1351 if (sparc32)
1352 offset += 4;
1353
1354 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1355 {
1356 if (regnum == i || regnum == -1)
1357 regcache_raw_collect (regcache, i, regs + offset);
1358 offset += 8;
1359 }
1360 }
1361 }
1362 }
1363
1364 void
1365 sparc64_supply_fpregset (struct regcache *regcache,
1366 int regnum, const void *fpregs)
1367 {
1368 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1369 const char *regs = fpregs;
1370 int i;
1371
1372 for (i = 0; i < 32; i++)
1373 {
1374 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1375 regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1376 }
1377
1378 if (sparc32)
1379 {
1380 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1381 regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
1382 regs + (32 * 4) + (16 * 8) + 4);
1383 }
1384 else
1385 {
1386 for (i = 0; i < 16; i++)
1387 {
1388 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1389 regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i,
1390 regs + (32 * 4) + (i * 8));
1391 }
1392
1393 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1394 regcache_raw_supply (regcache, SPARC64_FSR_REGNUM,
1395 regs + (32 * 4) + (16 * 8));
1396 }
1397 }
1398
1399 void
1400 sparc64_collect_fpregset (const struct regcache *regcache,
1401 int regnum, void *fpregs)
1402 {
1403 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1404 char *regs = fpregs;
1405 int i;
1406
1407 for (i = 0; i < 32; i++)
1408 {
1409 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1410 regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1411 }
1412
1413 if (sparc32)
1414 {
1415 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1416 regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
1417 regs + (32 * 4) + (16 * 8) + 4);
1418 }
1419 else
1420 {
1421 for (i = 0; i < 16; i++)
1422 {
1423 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1424 regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i,
1425 regs + (32 * 4) + (i * 8));
1426 }
1427
1428 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1429 regcache_raw_collect (regcache, SPARC64_FSR_REGNUM,
1430 regs + (32 * 4) + (16 * 8));
1431 }
1432 }
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