1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
3 Free Software Foundation, Inc.
5 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
6 Based on a port by Sid Manning <sid@us.ibm.com>.
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
28 #include "gdb_string.h"
29 #include "gdb_assert.h"
31 #include "frame-unwind.h"
32 #include "frame-base.h"
33 #include "trad-frame.h"
42 #include "reggroups.h"
43 #include "floatformat.h"
48 #include "exceptions.h"
52 /* The list of available "set spu " and "show spu " commands. */
53 static struct cmd_list_element
*setspucmdlist
= NULL
;
54 static struct cmd_list_element
*showspucmdlist
= NULL
;
56 /* Whether to stop for new SPE contexts. */
57 static int spu_stop_on_load_p
= 0;
58 /* Whether to automatically flush the SW-managed cache. */
59 static int spu_auto_flush_cache_p
= 1;
62 /* The tdep structure. */
65 /* The spufs ID identifying our address space. */
68 /* SPU-specific vector type. */
69 struct type
*spu_builtin_type_vec128
;
73 /* SPU-specific vector type. */
75 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
77 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
79 if (!tdep
->spu_builtin_type_vec128
)
81 const struct builtin_type
*bt
= builtin_type (gdbarch
);
84 t
= arch_composite_type (gdbarch
,
85 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
86 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
87 append_composite_type_field (t
, "v2_int64",
88 init_vector_type (bt
->builtin_int64
, 2));
89 append_composite_type_field (t
, "v4_int32",
90 init_vector_type (bt
->builtin_int32
, 4));
91 append_composite_type_field (t
, "v8_int16",
92 init_vector_type (bt
->builtin_int16
, 8));
93 append_composite_type_field (t
, "v16_int8",
94 init_vector_type (bt
->builtin_int8
, 16));
95 append_composite_type_field (t
, "v2_double",
96 init_vector_type (bt
->builtin_double
, 2));
97 append_composite_type_field (t
, "v4_float",
98 init_vector_type (bt
->builtin_float
, 4));
101 TYPE_NAME (t
) = "spu_builtin_type_vec128";
103 tdep
->spu_builtin_type_vec128
= t
;
106 return tdep
->spu_builtin_type_vec128
;
110 /* The list of available "info spu " commands. */
111 static struct cmd_list_element
*infospucmdlist
= NULL
;
116 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
118 static char *register_names
[] =
120 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
121 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
122 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
123 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
124 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
125 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
126 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
127 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
128 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
129 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
130 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
131 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
132 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
133 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
134 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
135 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
136 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
141 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
144 return register_names
[reg_nr
];
148 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
150 if (reg_nr
< SPU_NUM_GPRS
)
151 return spu_builtin_type_vec128 (gdbarch
);
156 return builtin_type (gdbarch
)->builtin_uint32
;
159 return builtin_type (gdbarch
)->builtin_func_ptr
;
162 return builtin_type (gdbarch
)->builtin_data_ptr
;
164 case SPU_FPSCR_REGNUM
:
165 return builtin_type (gdbarch
)->builtin_uint128
;
167 case SPU_SRR0_REGNUM
:
168 return builtin_type (gdbarch
)->builtin_uint32
;
170 case SPU_LSLR_REGNUM
:
171 return builtin_type (gdbarch
)->builtin_uint32
;
173 case SPU_DECR_REGNUM
:
174 return builtin_type (gdbarch
)->builtin_uint32
;
176 case SPU_DECR_STATUS_REGNUM
:
177 return builtin_type (gdbarch
)->builtin_uint32
;
180 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
184 /* Pseudo registers for preferred slots - stack pointer. */
186 static enum register_status
187 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
190 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
191 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
192 enum register_status status
;
197 status
= regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
198 if (status
!= REG_VALID
)
200 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
201 memset (reg
, 0, sizeof reg
);
202 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
205 store_unsigned_integer (buf
, 4, byte_order
, strtoulst (reg
, NULL
, 16));
209 static enum register_status
210 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
211 int regnum
, gdb_byte
*buf
)
216 enum register_status status
;
221 status
= regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
222 if (status
!= REG_VALID
)
224 memcpy (buf
, reg
, 4);
227 case SPU_FPSCR_REGNUM
:
228 status
= regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
229 if (status
!= REG_VALID
)
231 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
232 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
235 case SPU_SRR0_REGNUM
:
236 return spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
238 case SPU_LSLR_REGNUM
:
239 return spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
241 case SPU_DECR_REGNUM
:
242 return spu_pseudo_register_read_spu (regcache
, "decr", buf
);
244 case SPU_DECR_STATUS_REGNUM
:
245 return spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
248 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
253 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
256 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
257 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
262 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
263 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
264 xsnprintf (reg
, sizeof reg
, "0x%s",
265 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
266 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
267 reg
, 0, strlen (reg
));
271 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
272 int regnum
, const gdb_byte
*buf
)
281 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
282 memcpy (reg
, buf
, 4);
283 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
286 case SPU_FPSCR_REGNUM
:
287 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
288 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
289 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
292 case SPU_SRR0_REGNUM
:
293 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
296 case SPU_LSLR_REGNUM
:
297 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
300 case SPU_DECR_REGNUM
:
301 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
304 case SPU_DECR_STATUS_REGNUM
:
305 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
309 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
313 /* Value conversion -- access scalar values at the preferred slot. */
315 static struct value
*
316 spu_value_from_register (struct type
*type
, int regnum
,
317 struct frame_info
*frame
)
319 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
320 int len
= TYPE_LENGTH (type
);
322 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
324 int preferred_slot
= len
< 4 ? 4 - len
: 0;
325 set_value_offset (value
, preferred_slot
);
331 /* Register groups. */
334 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
335 struct reggroup
*group
)
337 /* Registers displayed via 'info regs'. */
338 if (group
== general_reggroup
)
341 /* Registers displayed via 'info float'. */
342 if (group
== float_reggroup
)
345 /* Registers that need to be saved/restored in order to
346 push or pop frames. */
347 if (group
== save_reggroup
|| group
== restore_reggroup
)
350 return default_register_reggroup_p (gdbarch
, regnum
, group
);
354 /* Address handling. */
357 spu_gdbarch_id (struct gdbarch
*gdbarch
)
359 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
362 /* The objfile architecture of a standalone SPU executable does not
363 provide an SPU ID. Retrieve it from the objfile's relocated
364 address range in this special case. */
366 && symfile_objfile
&& symfile_objfile
->obfd
367 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
368 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
369 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
375 spu_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
377 if (dwarf2_addr_class
== 1)
378 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
384 spu_address_class_type_flags_to_name (struct gdbarch
*gdbarch
, int type_flags
)
386 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
393 spu_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
394 const char *name
, int *type_flags_ptr
)
396 if (strcmp (name
, "__ea") == 0)
398 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
406 spu_address_to_pointer (struct gdbarch
*gdbarch
,
407 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
409 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
410 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
411 SPUADDR_ADDR (addr
));
415 spu_pointer_to_address (struct gdbarch
*gdbarch
,
416 struct type
*type
, const gdb_byte
*buf
)
418 int id
= spu_gdbarch_id (gdbarch
);
419 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
421 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
423 /* Do not convert __ea pointers. */
424 if (TYPE_ADDRESS_CLASS_1 (type
))
427 return addr
? SPUADDR (id
, addr
) : 0;
431 spu_integer_to_address (struct gdbarch
*gdbarch
,
432 struct type
*type
, const gdb_byte
*buf
)
434 int id
= spu_gdbarch_id (gdbarch
);
435 ULONGEST addr
= unpack_long (type
, buf
);
437 return SPUADDR (id
, addr
);
441 /* Decoding SPU instructions. */
478 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
480 if ((insn
>> 21) == op
)
483 *ra
= (insn
>> 7) & 127;
484 *rb
= (insn
>> 14) & 127;
492 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
494 if ((insn
>> 28) == op
)
496 *rt
= (insn
>> 21) & 127;
497 *ra
= (insn
>> 7) & 127;
498 *rb
= (insn
>> 14) & 127;
507 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
509 if ((insn
>> 21) == op
)
512 *ra
= (insn
>> 7) & 127;
513 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
521 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
523 if ((insn
>> 24) == op
)
526 *ra
= (insn
>> 7) & 127;
527 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
535 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
537 if ((insn
>> 23) == op
)
540 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
548 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
550 if ((insn
>> 25) == op
)
553 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
561 is_branch (unsigned int insn
, int *offset
, int *reg
)
565 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
566 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
567 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
568 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
569 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
570 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
572 *reg
= SPU_PC_REGNUM
;
577 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
578 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
585 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
586 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
587 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
588 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
589 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
590 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
600 /* Prolog parsing. */
602 struct spu_prologue_data
604 /* Stack frame size. -1 if analysis was unsuccessful. */
607 /* How to find the CFA. The CFA is equal to SP at function entry. */
611 /* Offset relative to CFA where a register is saved. -1 if invalid. */
612 int reg_offset
[SPU_NUM_GPRS
];
616 spu_analyze_prologue (struct gdbarch
*gdbarch
,
617 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
618 struct spu_prologue_data
*data
)
620 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
625 int reg_immed
[SPU_NUM_GPRS
];
627 CORE_ADDR prolog_pc
= start_pc
;
632 /* Initialize DATA to default values. */
635 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
636 data
->cfa_offset
= 0;
638 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
639 data
->reg_offset
[i
] = -1;
641 /* Set up REG_IMMED array. This is non-zero for a register if we know its
642 preferred slot currently holds this immediate value. */
643 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
646 /* Scan instructions until the first branch.
648 The following instructions are important prolog components:
650 - The first instruction to set up the stack pointer.
651 - The first instruction to set up the frame pointer.
652 - The first instruction to save the link register.
653 - The first instruction to save the backchain.
655 We return the instruction after the latest of these four,
656 or the incoming PC if none is found. The first instruction
657 to set up the stack pointer also defines the frame size.
659 Note that instructions saving incoming arguments to their stack
660 slots are not counted as important, because they are hard to
661 identify with certainty. This should not matter much, because
662 arguments are relevant only in code compiled with debug data,
663 and in such code the GDB core will advance until the first source
664 line anyway, using SAL data.
666 For purposes of stack unwinding, we analyze the following types
667 of instructions in addition:
669 - Any instruction adding to the current frame pointer.
670 - Any instruction loading an immediate constant into a register.
671 - Any instruction storing a register onto the stack.
673 These are used to compute the CFA and REG_OFFSET output. */
675 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
678 int rt
, ra
, rb
, rc
, immed
;
680 if (target_read_memory (pc
, buf
, 4))
682 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
684 /* AI is the typical instruction to set up a stack frame.
685 It is also used to initialize the frame pointer. */
686 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
688 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
689 data
->cfa_offset
-= immed
;
691 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
699 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
705 data
->cfa_reg
= SPU_FP_REGNUM
;
706 data
->cfa_offset
-= immed
;
710 /* A is used to set up stack frames of size >= 512 bytes.
711 If we have tracked the contents of the addend register,
712 we can handle this as well. */
713 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
715 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
717 if (reg_immed
[rb
] != 0)
718 data
->cfa_offset
-= reg_immed
[rb
];
720 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
723 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
729 if (reg_immed
[rb
] != 0)
730 data
->size
= -reg_immed
[rb
];
734 /* We need to track IL and ILA used to load immediate constants
735 in case they are later used as input to an A instruction. */
736 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
738 reg_immed
[rt
] = immed
;
740 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
744 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
746 reg_immed
[rt
] = immed
& 0x3ffff;
748 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
752 /* STQD is used to save registers to the stack. */
753 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
755 if (ra
== data
->cfa_reg
)
756 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
758 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
765 if (ra
== SPU_RAW_SP_REGNUM
766 && (found_sp
? immed
== 0 : rt
== SPU_RAW_SP_REGNUM
)
774 /* _start uses SELB to set up the stack pointer. */
775 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
777 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
781 /* We terminate if we find a branch. */
782 else if (is_branch (insn
, &immed
, &ra
))
787 /* If we successfully parsed until here, and didn't find any instruction
788 modifying SP, we assume we have a frameless function. */
792 /* Return cooked instead of raw SP. */
793 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
794 data
->cfa_reg
= SPU_SP_REGNUM
;
799 /* Return the first instruction after the prologue starting at PC. */
801 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
803 struct spu_prologue_data data
;
804 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
807 /* Return the frame pointer in use at address PC. */
809 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
810 int *reg
, LONGEST
*offset
)
812 struct spu_prologue_data data
;
813 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
815 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
817 /* The 'frame pointer' address is CFA minus frame size. */
819 *offset
= data
.cfa_offset
- data
.size
;
823 /* ??? We don't really know ... */
824 *reg
= SPU_SP_REGNUM
;
829 /* Return true if we are in the function's epilogue, i.e. after the
830 instruction that destroyed the function's stack frame.
832 1) scan forward from the point of execution:
833 a) If you find an instruction that modifies the stack pointer
834 or transfers control (except a return), execution is not in
836 b) Stop scanning if you find a return instruction or reach the
837 end of the function or reach the hard limit for the size of
839 2) scan backward from the point of execution:
840 a) If you find an instruction that modifies the stack pointer,
841 execution *is* in an epilogue, return.
842 b) Stop scanning if you reach an instruction that transfers
843 control or the beginning of the function or reach the hard
844 limit for the size of an epilogue. */
847 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
849 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
850 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
853 int rt
, ra
, rb
, rc
, immed
;
855 /* Find the search limits based on function boundaries and hard limit.
856 We assume the epilogue can be up to 64 instructions long. */
858 const int spu_max_epilogue_size
= 64 * 4;
860 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
863 if (pc
- func_start
< spu_max_epilogue_size
)
864 epilogue_start
= func_start
;
866 epilogue_start
= pc
- spu_max_epilogue_size
;
868 if (func_end
- pc
< spu_max_epilogue_size
)
869 epilogue_end
= func_end
;
871 epilogue_end
= pc
+ spu_max_epilogue_size
;
873 /* Scan forward until next 'bi $0'. */
875 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
877 if (target_read_memory (scan_pc
, buf
, 4))
879 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
881 if (is_branch (insn
, &immed
, &ra
))
883 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
889 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
890 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
891 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
893 if (rt
== SPU_RAW_SP_REGNUM
)
898 if (scan_pc
>= epilogue_end
)
901 /* Scan backward until adjustment to stack pointer (R1). */
903 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
905 if (target_read_memory (scan_pc
, buf
, 4))
907 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
909 if (is_branch (insn
, &immed
, &ra
))
912 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
913 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
914 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
916 if (rt
== SPU_RAW_SP_REGNUM
)
925 /* Normal stack frames. */
927 struct spu_unwind_cache
930 CORE_ADDR frame_base
;
931 CORE_ADDR local_base
;
933 struct trad_frame_saved_reg
*saved_regs
;
936 static struct spu_unwind_cache
*
937 spu_frame_unwind_cache (struct frame_info
*this_frame
,
938 void **this_prologue_cache
)
940 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
941 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
942 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
943 struct spu_unwind_cache
*info
;
944 struct spu_prologue_data data
;
945 CORE_ADDR id
= tdep
->id
;
948 if (*this_prologue_cache
)
949 return *this_prologue_cache
;
951 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
952 *this_prologue_cache
= info
;
953 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
954 info
->frame_base
= 0;
955 info
->local_base
= 0;
957 /* Find the start of the current function, and analyze its prologue. */
958 info
->func
= get_frame_func (this_frame
);
961 /* Fall back to using the current PC as frame ID. */
962 info
->func
= get_frame_pc (this_frame
);
966 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
969 /* If successful, use prologue analysis data. */
970 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
975 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
976 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
977 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
978 cfa
= SPUADDR (id
, cfa
);
980 /* Call-saved register slots. */
981 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
982 if (i
== SPU_LR_REGNUM
983 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
984 if (data
.reg_offset
[i
] != -1)
985 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
988 info
->frame_base
= cfa
;
989 info
->local_base
= cfa
- data
.size
;
992 /* Otherwise, fall back to reading the backchain link. */
1000 /* Get local store limit. */
1001 lslr
= get_frame_register_unsigned (this_frame
, SPU_LSLR_REGNUM
);
1003 lslr
= (ULONGEST
) -1;
1005 /* Get the backchain. */
1006 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1007 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
1010 /* A zero backchain terminates the frame chain. Also, sanity
1011 check against the local store size limit. */
1012 if (status
&& backchain
> 0 && backchain
<= lslr
)
1014 /* Assume the link register is saved into its slot. */
1015 if (backchain
+ 16 <= lslr
)
1016 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
,
1020 info
->frame_base
= SPUADDR (id
, backchain
);
1021 info
->local_base
= SPUADDR (id
, reg
);
1025 /* If we didn't find a frame, we cannot determine SP / return address. */
1026 if (info
->frame_base
== 0)
1029 /* The previous SP is equal to the CFA. */
1030 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
1031 SPUADDR_ADDR (info
->frame_base
));
1033 /* Read full contents of the unwound link register in order to
1034 be able to determine the return address. */
1035 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
1036 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
1038 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
1040 /* Normally, the return address is contained in the slot 0 of the
1041 link register, and slots 1-3 are zero. For an overlay return,
1042 slot 0 contains the address of the overlay manager return stub,
1043 slot 1 contains the partition number of the overlay section to
1044 be returned to, and slot 2 contains the return address within
1045 that section. Return the latter address in that case. */
1046 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
1047 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1048 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
1050 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1051 extract_unsigned_integer (buf
, 4, byte_order
));
1057 spu_frame_this_id (struct frame_info
*this_frame
,
1058 void **this_prologue_cache
, struct frame_id
*this_id
)
1060 struct spu_unwind_cache
*info
=
1061 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1063 if (info
->frame_base
== 0)
1066 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1069 static struct value
*
1070 spu_frame_prev_register (struct frame_info
*this_frame
,
1071 void **this_prologue_cache
, int regnum
)
1073 struct spu_unwind_cache
*info
1074 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1076 /* Special-case the stack pointer. */
1077 if (regnum
== SPU_RAW_SP_REGNUM
)
1078 regnum
= SPU_SP_REGNUM
;
1080 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1083 static const struct frame_unwind spu_frame_unwind
= {
1086 spu_frame_prev_register
,
1088 default_frame_sniffer
1092 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1094 struct spu_unwind_cache
*info
1095 = spu_frame_unwind_cache (this_frame
, this_cache
);
1096 return info
->local_base
;
1099 static const struct frame_base spu_frame_base
= {
1101 spu_frame_base_address
,
1102 spu_frame_base_address
,
1103 spu_frame_base_address
1107 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1109 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1110 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1111 /* Mask off interrupt enable bit. */
1112 return SPUADDR (tdep
->id
, pc
& -4);
1116 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1118 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1119 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1120 return SPUADDR (tdep
->id
, sp
);
1124 spu_read_pc (struct regcache
*regcache
)
1126 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1128 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1129 /* Mask off interrupt enable bit. */
1130 return SPUADDR (tdep
->id
, pc
& -4);
1134 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1136 /* Keep interrupt enabled state unchanged. */
1138 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1139 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1140 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1144 /* Cell/B.E. cross-architecture unwinder support. */
1146 struct spu2ppu_cache
1148 struct frame_id frame_id
;
1149 struct regcache
*regcache
;
1152 static struct gdbarch
*
1153 spu2ppu_prev_arch (struct frame_info
*this_frame
, void **this_cache
)
1155 struct spu2ppu_cache
*cache
= *this_cache
;
1156 return get_regcache_arch (cache
->regcache
);
1160 spu2ppu_this_id (struct frame_info
*this_frame
,
1161 void **this_cache
, struct frame_id
*this_id
)
1163 struct spu2ppu_cache
*cache
= *this_cache
;
1164 *this_id
= cache
->frame_id
;
1167 static struct value
*
1168 spu2ppu_prev_register (struct frame_info
*this_frame
,
1169 void **this_cache
, int regnum
)
1171 struct spu2ppu_cache
*cache
= *this_cache
;
1172 struct gdbarch
*gdbarch
= get_regcache_arch (cache
->regcache
);
1175 buf
= alloca (register_size (gdbarch
, regnum
));
1176 regcache_cooked_read (cache
->regcache
, regnum
, buf
);
1177 return frame_unwind_got_bytes (this_frame
, regnum
, buf
);
1181 spu2ppu_sniffer (const struct frame_unwind
*self
,
1182 struct frame_info
*this_frame
, void **this_prologue_cache
)
1184 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1185 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1186 CORE_ADDR base
, func
, backchain
;
1189 if (gdbarch_bfd_arch_info (target_gdbarch
)->arch
== bfd_arch_spu
)
1192 base
= get_frame_sp (this_frame
);
1193 func
= get_frame_pc (this_frame
);
1194 if (target_read_memory (base
, buf
, 4))
1196 backchain
= extract_unsigned_integer (buf
, 4, byte_order
);
1200 struct frame_info
*fi
;
1202 struct spu2ppu_cache
*cache
1203 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache
);
1205 cache
->frame_id
= frame_id_build (base
+ 16, func
);
1207 for (fi
= get_next_frame (this_frame
); fi
; fi
= get_next_frame (fi
))
1208 if (gdbarch_bfd_arch_info (get_frame_arch (fi
))->arch
!= bfd_arch_spu
)
1213 cache
->regcache
= frame_save_as_regcache (fi
);
1214 *this_prologue_cache
= cache
;
1219 struct regcache
*regcache
;
1220 regcache
= get_thread_arch_regcache (inferior_ptid
, target_gdbarch
);
1221 cache
->regcache
= regcache_dup (regcache
);
1222 *this_prologue_cache
= cache
;
1231 spu2ppu_dealloc_cache (struct frame_info
*self
, void *this_cache
)
1233 struct spu2ppu_cache
*cache
= this_cache
;
1234 regcache_xfree (cache
->regcache
);
1237 static const struct frame_unwind spu2ppu_unwind
= {
1240 spu2ppu_prev_register
,
1243 spu2ppu_dealloc_cache
,
1248 /* Function calling convention. */
1251 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1257 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1258 struct value
**args
, int nargs
, struct type
*value_type
,
1259 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1260 struct regcache
*regcache
)
1262 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1263 sp
= (sp
- 4) & ~15;
1264 /* Store the address of that breakpoint */
1266 /* The call starts at the callee's entry point. */
1273 spu_scalar_value_p (struct type
*type
)
1275 switch (TYPE_CODE (type
))
1278 case TYPE_CODE_ENUM
:
1279 case TYPE_CODE_RANGE
:
1280 case TYPE_CODE_CHAR
:
1281 case TYPE_CODE_BOOL
:
1284 return TYPE_LENGTH (type
) <= 16;
1292 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1293 struct type
*type
, const gdb_byte
*in
)
1295 int len
= TYPE_LENGTH (type
);
1297 if (spu_scalar_value_p (type
))
1299 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1300 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1306 regcache_cooked_write (regcache
, regnum
++, in
);
1312 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1317 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1318 struct type
*type
, gdb_byte
*out
)
1320 int len
= TYPE_LENGTH (type
);
1322 if (spu_scalar_value_p (type
))
1324 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1325 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1331 regcache_cooked_read (regcache
, regnum
++, out
);
1337 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1342 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1343 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1344 int nargs
, struct value
**args
, CORE_ADDR sp
,
1345 int struct_return
, CORE_ADDR struct_addr
)
1347 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1350 int regnum
= SPU_ARG1_REGNUM
;
1354 /* Set the return address. */
1355 memset (buf
, 0, sizeof buf
);
1356 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1357 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1359 /* If STRUCT_RETURN is true, then the struct return address (in
1360 STRUCT_ADDR) will consume the first argument-passing register.
1361 Both adjust the register count and store that value. */
1364 memset (buf
, 0, sizeof buf
);
1365 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1366 regcache_cooked_write (regcache
, regnum
++, buf
);
1369 /* Fill in argument registers. */
1370 for (i
= 0; i
< nargs
; i
++)
1372 struct value
*arg
= args
[i
];
1373 struct type
*type
= check_typedef (value_type (arg
));
1374 const gdb_byte
*contents
= value_contents (arg
);
1375 int len
= TYPE_LENGTH (type
);
1376 int n_regs
= align_up (len
, 16) / 16;
1378 /* If the argument doesn't wholly fit into registers, it and
1379 all subsequent arguments go to the stack. */
1380 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1386 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1390 /* Overflow arguments go to the stack. */
1391 if (stack_arg
!= -1)
1395 /* Allocate all required stack size. */
1396 for (i
= stack_arg
; i
< nargs
; i
++)
1398 struct type
*type
= check_typedef (value_type (args
[i
]));
1399 sp
-= align_up (TYPE_LENGTH (type
), 16);
1402 /* Fill in stack arguments. */
1404 for (i
= stack_arg
; i
< nargs
; i
++)
1406 struct value
*arg
= args
[i
];
1407 struct type
*type
= check_typedef (value_type (arg
));
1408 int len
= TYPE_LENGTH (type
);
1411 if (spu_scalar_value_p (type
))
1412 preferred_slot
= len
< 4 ? 4 - len
: 0;
1416 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1417 ap
+= align_up (TYPE_LENGTH (type
), 16);
1421 /* Allocate stack frame header. */
1424 /* Store stack back chain. */
1425 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1426 target_write_memory (sp
, buf
, 16);
1428 /* Finally, update all slots of the SP register. */
1429 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1430 for (i
= 0; i
< 4; i
++)
1432 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1433 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1435 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1440 static struct frame_id
1441 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1443 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1444 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1445 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1446 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1449 /* Function return value access. */
1451 static enum return_value_convention
1452 spu_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1453 struct type
*type
, struct regcache
*regcache
,
1454 gdb_byte
*out
, const gdb_byte
*in
)
1456 enum return_value_convention rvc
;
1457 int opencl_vector
= 0;
1460 && TYPE_CALLING_CONVENTION (func_type
) == DW_CC_GDB_IBM_OpenCL
1461 && TYPE_CODE (type
) == TYPE_CODE_ARRAY
1462 && TYPE_VECTOR (type
))
1465 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1466 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1468 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1474 case RETURN_VALUE_REGISTER_CONVENTION
:
1475 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1476 regcache_cooked_write_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, in
);
1478 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1481 case RETURN_VALUE_STRUCT_CONVENTION
:
1482 error (_("Cannot set function return value."));
1490 case RETURN_VALUE_REGISTER_CONVENTION
:
1491 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1492 regcache_cooked_read_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, out
);
1494 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1497 case RETURN_VALUE_STRUCT_CONVENTION
:
1498 error (_("Function return value unknown."));
1509 static const gdb_byte
*
1510 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
,
1511 CORE_ADDR
* pcptr
, int *lenptr
)
1513 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1515 *lenptr
= sizeof breakpoint
;
1520 spu_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
1521 struct bp_target_info
*bp_tgt
)
1523 /* We work around a problem in combined Cell/B.E. debugging here. Consider
1524 that in a combined application, we have some breakpoints inserted in SPU
1525 code, and now the application forks (on the PPU side). GDB common code
1526 will assume that the fork system call copied all breakpoints into the new
1527 process' address space, and that all those copies now need to be removed
1528 (see breakpoint.c:detach_breakpoints).
1530 While this is certainly true for PPU side breakpoints, it is not true
1531 for SPU side breakpoints. fork will clone the SPU context file
1532 descriptors, so that all the existing SPU contexts are in accessible
1533 in the new process. However, the contents of the SPU contexts themselves
1534 are *not* cloned. Therefore the effect of detach_breakpoints is to
1535 remove SPU breakpoints from the *original* SPU context's local store
1536 -- this is not the correct behaviour.
1538 The workaround is to check whether the PID we are asked to remove this
1539 breakpoint from (i.e. ptid_get_pid (inferior_ptid)) is different from the
1540 PID of the current inferior (i.e. current_inferior ()->pid). This is only
1541 true in the context of detach_breakpoints. If so, we simply do nothing.
1542 [ Note that for the fork child process, it does not matter if breakpoints
1543 remain inserted, because those SPU contexts are not runnable anyway --
1544 the Linux kernel allows only the original process to invoke spu_run. */
1546 if (ptid_get_pid (inferior_ptid
) != current_inferior ()->pid
)
1549 return default_memory_remove_breakpoint (gdbarch
, bp_tgt
);
1553 /* Software single-stepping support. */
1556 spu_software_single_step (struct frame_info
*frame
)
1558 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1559 struct address_space
*aspace
= get_frame_address_space (frame
);
1560 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1561 CORE_ADDR pc
, next_pc
;
1567 pc
= get_frame_pc (frame
);
1569 if (target_read_memory (pc
, buf
, 4))
1571 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1573 /* Get local store limit. */
1574 lslr
= get_frame_register_unsigned (frame
, SPU_LSLR_REGNUM
);
1576 lslr
= (ULONGEST
) -1;
1578 /* Next sequential instruction is at PC + 4, except if the current
1579 instruction is a PPE-assisted call, in which case it is at PC + 8.
1580 Wrap around LS limit to be on the safe side. */
1581 if ((insn
& 0xffffff00) == 0x00002100)
1582 next_pc
= (SPUADDR_ADDR (pc
) + 8) & lslr
;
1584 next_pc
= (SPUADDR_ADDR (pc
) + 4) & lslr
;
1586 insert_single_step_breakpoint (gdbarch
,
1587 aspace
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1589 if (is_branch (insn
, &offset
, ®
))
1591 CORE_ADDR target
= offset
;
1593 if (reg
== SPU_PC_REGNUM
)
1594 target
+= SPUADDR_ADDR (pc
);
1599 if (get_frame_register_bytes (frame
, reg
, 0, 4, buf
,
1601 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1605 error (_("Could not determine address of "
1606 "single-step breakpoint."));
1608 throw_error (NOT_AVAILABLE_ERROR
,
1609 _("Could not determine address of "
1610 "single-step breakpoint."));
1614 target
= target
& lslr
;
1615 if (target
!= next_pc
)
1616 insert_single_step_breakpoint (gdbarch
, aspace
,
1617 SPUADDR (SPUADDR_SPU (pc
), target
));
1624 /* Longjmp support. */
1627 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1629 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1630 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1631 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1636 /* Jump buffer is pointed to by the argument register $r3. */
1637 if (!get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
,
1641 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1642 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1645 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1646 *pc
= SPUADDR (tdep
->id
, *pc
);
1653 struct spu_dis_asm_data
1655 struct gdbarch
*gdbarch
;
1660 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1662 struct spu_dis_asm_data
*data
= info
->application_data
;
1663 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1667 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1669 /* The opcodes disassembler does 18-bit address arithmetic. Make
1670 sure the SPU ID encoded in the high bits is added back when we
1671 call print_address. */
1672 struct disassemble_info spu_info
= *info
;
1673 struct spu_dis_asm_data data
;
1674 data
.gdbarch
= info
->application_data
;
1675 data
.id
= SPUADDR_SPU (memaddr
);
1677 spu_info
.application_data
= &data
;
1678 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1679 return print_insn_spu (memaddr
, &spu_info
);
1683 /* Target overlays for the SPU overlay manager.
1685 See the documentation of simple_overlay_update for how the
1686 interface is supposed to work.
1688 Data structures used by the overlay manager:
1696 } _ovly_table[]; -- one entry per overlay section
1698 struct ovly_buf_table
1701 } _ovly_buf_table[]; -- one entry per overlay buffer
1703 _ovly_table should never change.
1705 Both tables are aligned to a 16-byte boundary, the symbols
1706 _ovly_table and _ovly_buf_table are of type STT_OBJECT and their
1707 size set to the size of the respective array. buf in _ovly_table is
1708 an index into _ovly_buf_table.
1710 mapped is an index into _ovly_table. Both the mapped and buf indices start
1711 from one to reference the first entry in their respective tables. */
1713 /* Using the per-objfile private data mechanism, we store for each
1714 objfile an array of "struct spu_overlay_table" structures, one
1715 for each obj_section of the objfile. This structure holds two
1716 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1717 is *not* an overlay section. If it is non-zero, it represents
1718 a target address. The overlay section is mapped iff the target
1719 integer at this location equals MAPPED_VAL. */
1721 static const struct objfile_data
*spu_overlay_data
;
1723 struct spu_overlay_table
1725 CORE_ADDR mapped_ptr
;
1726 CORE_ADDR mapped_val
;
1729 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1730 the _ovly_table data structure from the target and initialize the
1731 spu_overlay_table data structure from it. */
1732 static struct spu_overlay_table
*
1733 spu_get_overlay_table (struct objfile
*objfile
)
1735 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1736 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1737 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1738 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1739 unsigned ovly_table_size
, ovly_buf_table_size
;
1740 struct spu_overlay_table
*tbl
;
1741 struct obj_section
*osect
;
1745 tbl
= objfile_data (objfile
, spu_overlay_data
);
1749 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1750 if (!ovly_table_msym
)
1753 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table",
1755 if (!ovly_buf_table_msym
)
1758 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1759 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1761 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1762 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1764 ovly_table
= xmalloc (ovly_table_size
);
1765 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1767 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1768 objfile
->sections_end
- objfile
->sections
,
1769 struct spu_overlay_table
);
1771 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1773 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1775 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1777 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1779 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1782 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1785 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1786 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1787 && pos
== osect
->the_bfd_section
->filepos
)
1789 int ndx
= osect
- objfile
->sections
;
1790 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1791 tbl
[ndx
].mapped_val
= i
+ 1;
1797 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1801 /* Read _ovly_buf_table entry from the target to dermine whether
1802 OSECT is currently mapped, and update the mapped state. */
1804 spu_overlay_update_osect (struct obj_section
*osect
)
1806 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1807 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1808 struct spu_overlay_table
*ovly_table
;
1811 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1815 ovly_table
+= osect
- osect
->objfile
->sections
;
1816 if (ovly_table
->mapped_ptr
== 0)
1819 id
= SPUADDR_SPU (obj_section_addr (osect
));
1820 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1822 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1825 /* If OSECT is NULL, then update all sections' mapped state.
1826 If OSECT is non-NULL, then update only OSECT's mapped state. */
1828 spu_overlay_update (struct obj_section
*osect
)
1830 /* Just one section. */
1832 spu_overlay_update_osect (osect
);
1837 struct objfile
*objfile
;
1839 ALL_OBJSECTIONS (objfile
, osect
)
1840 if (section_is_overlay (osect
))
1841 spu_overlay_update_osect (osect
);
1845 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1846 If there is one, go through all sections and make sure for non-
1847 overlay sections LMA equals VMA, while for overlay sections LMA
1848 is larger than SPU_OVERLAY_LMA. */
1850 spu_overlay_new_objfile (struct objfile
*objfile
)
1852 struct spu_overlay_table
*ovly_table
;
1853 struct obj_section
*osect
;
1855 /* If we've already touched this file, do nothing. */
1856 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1859 /* Consider only SPU objfiles. */
1860 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1863 /* Check if this objfile has overlays. */
1864 ovly_table
= spu_get_overlay_table (objfile
);
1868 /* Now go and fiddle with all the LMAs. */
1869 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1871 bfd
*obfd
= objfile
->obfd
;
1872 asection
*bsect
= osect
->the_bfd_section
;
1873 int ndx
= osect
- objfile
->sections
;
1875 if (ovly_table
[ndx
].mapped_ptr
== 0)
1876 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1878 bfd_section_lma (obfd
, bsect
) = SPU_OVERLAY_LMA
+ bsect
->filepos
;
1883 /* Insert temporary breakpoint on "main" function of newly loaded
1884 SPE context OBJFILE. */
1886 spu_catch_start (struct objfile
*objfile
)
1888 struct minimal_symbol
*minsym
;
1889 struct symtab
*symtab
;
1893 /* Do this only if requested by "set spu stop-on-load on". */
1894 if (!spu_stop_on_load_p
)
1897 /* Consider only SPU objfiles. */
1898 if (!objfile
|| bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1901 /* The main objfile is handled differently. */
1902 if (objfile
== symfile_objfile
)
1905 /* There can be multiple symbols named "main". Search for the
1906 "main" in *this* objfile. */
1907 minsym
= lookup_minimal_symbol ("main", NULL
, objfile
);
1911 /* If we have debugging information, try to use it -- this
1912 will allow us to properly skip the prologue. */
1913 pc
= SYMBOL_VALUE_ADDRESS (minsym
);
1914 symtab
= find_pc_sect_symtab (pc
, SYMBOL_OBJ_SECTION (minsym
));
1917 struct blockvector
*bv
= BLOCKVECTOR (symtab
);
1918 struct block
*block
= BLOCKVECTOR_BLOCK (bv
, GLOBAL_BLOCK
);
1920 struct symtab_and_line sal
;
1922 sym
= lookup_block_symbol (block
, "main", VAR_DOMAIN
);
1925 fixup_symbol_section (sym
, objfile
);
1926 sal
= find_function_start_sal (sym
, 1);
1931 /* Use a numerical address for the set_breakpoint command to avoid having
1932 the breakpoint re-set incorrectly. */
1933 xsnprintf (buf
, sizeof buf
, "*%s", core_addr_to_string (pc
));
1934 create_breakpoint (get_objfile_arch (objfile
), buf
/* arg */,
1935 NULL
/* cond_string */, -1 /* thread */,
1936 0 /* parse_condition_and_thread */, 1 /* tempflag */,
1937 bp_breakpoint
/* type_wanted */,
1938 0 /* ignore_count */,
1939 AUTO_BOOLEAN_FALSE
/* pending_break_support */,
1940 NULL
/* ops */, 0 /* from_tty */, 1 /* enabled */,
1945 /* Look up OBJFILE loaded into FRAME's SPU context. */
1946 static struct objfile
*
1947 spu_objfile_from_frame (struct frame_info
*frame
)
1949 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1950 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1951 struct objfile
*obj
;
1953 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1958 if (obj
->sections
!= obj
->sections_end
1959 && SPUADDR_SPU (obj_section_addr (obj
->sections
)) == tdep
->id
)
1966 /* Flush cache for ea pointer access if available. */
1968 flush_ea_cache (void)
1970 struct minimal_symbol
*msymbol
;
1971 struct objfile
*obj
;
1973 if (!has_stack_frames ())
1976 obj
= spu_objfile_from_frame (get_current_frame ());
1980 /* Lookup inferior function __cache_flush. */
1981 msymbol
= lookup_minimal_symbol ("__cache_flush", NULL
, obj
);
1982 if (msymbol
!= NULL
)
1987 type
= objfile_type (obj
)->builtin_void
;
1988 type
= lookup_function_type (type
);
1989 type
= lookup_pointer_type (type
);
1990 addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
1992 call_function_by_hand (value_from_pointer (type
, addr
), 0, NULL
);
1996 /* This handler is called when the inferior has stopped. If it is stopped in
1997 SPU architecture then flush the ea cache if used. */
1999 spu_attach_normal_stop (struct bpstats
*bs
, int print_frame
)
2001 if (!spu_auto_flush_cache_p
)
2004 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
2005 re-entering this function when __cache_flush stops. */
2006 spu_auto_flush_cache_p
= 0;
2008 spu_auto_flush_cache_p
= 1;
2012 /* "info spu" commands. */
2015 info_spu_event_command (char *args
, int from_tty
)
2017 struct frame_info
*frame
= get_selected_frame (NULL
);
2018 ULONGEST event_status
= 0;
2019 ULONGEST event_mask
= 0;
2020 struct cleanup
*chain
;
2026 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2027 error (_("\"info spu\" is only supported on the SPU architecture."));
2029 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2031 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
2032 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2033 buf
, 0, (sizeof (buf
) - 1));
2035 error (_("Could not read event_status."));
2037 event_status
= strtoulst (buf
, NULL
, 16);
2039 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
2040 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2041 buf
, 0, (sizeof (buf
) - 1));
2043 error (_("Could not read event_mask."));
2045 event_mask
= strtoulst (buf
, NULL
, 16);
2047 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoEvent");
2049 if (ui_out_is_mi_like_p (uiout
))
2051 ui_out_field_fmt (uiout
, "event_status",
2052 "0x%s", phex_nz (event_status
, 4));
2053 ui_out_field_fmt (uiout
, "event_mask",
2054 "0x%s", phex_nz (event_mask
, 4));
2058 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
2059 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
2062 do_cleanups (chain
);
2066 info_spu_signal_command (char *args
, int from_tty
)
2068 struct frame_info
*frame
= get_selected_frame (NULL
);
2069 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2070 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2071 ULONGEST signal1
= 0;
2072 ULONGEST signal1_type
= 0;
2073 int signal1_pending
= 0;
2074 ULONGEST signal2
= 0;
2075 ULONGEST signal2_type
= 0;
2076 int signal2_pending
= 0;
2077 struct cleanup
*chain
;
2083 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2084 error (_("\"info spu\" is only supported on the SPU architecture."));
2086 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2088 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
2089 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2091 error (_("Could not read signal1."));
2094 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
2095 signal1_pending
= 1;
2098 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
2099 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2100 buf
, 0, (sizeof (buf
) - 1));
2102 error (_("Could not read signal1_type."));
2104 signal1_type
= strtoulst (buf
, NULL
, 16);
2106 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
2107 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2109 error (_("Could not read signal2."));
2112 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
2113 signal2_pending
= 1;
2116 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
2117 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2118 buf
, 0, (sizeof (buf
) - 1));
2120 error (_("Could not read signal2_type."));
2122 signal2_type
= strtoulst (buf
, NULL
, 16);
2124 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoSignal");
2126 if (ui_out_is_mi_like_p (uiout
))
2128 ui_out_field_int (uiout
, "signal1_pending", signal1_pending
);
2129 ui_out_field_fmt (uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
2130 ui_out_field_int (uiout
, "signal1_type", signal1_type
);
2131 ui_out_field_int (uiout
, "signal2_pending", signal2_pending
);
2132 ui_out_field_fmt (uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
2133 ui_out_field_int (uiout
, "signal2_type", signal2_type
);
2137 if (signal1_pending
)
2138 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
2140 printf_filtered (_("Signal 1 not pending "));
2143 printf_filtered (_("(Type Or)\n"));
2145 printf_filtered (_("(Type Overwrite)\n"));
2147 if (signal2_pending
)
2148 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
2150 printf_filtered (_("Signal 2 not pending "));
2153 printf_filtered (_("(Type Or)\n"));
2155 printf_filtered (_("(Type Overwrite)\n"));
2158 do_cleanups (chain
);
2162 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
2163 const char *field
, const char *msg
)
2165 struct cleanup
*chain
;
2171 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 1, nr
, "mbox");
2173 ui_out_table_header (uiout
, 32, ui_left
, field
, msg
);
2174 ui_out_table_body (uiout
);
2176 for (i
= 0; i
< nr
; i
++)
2178 struct cleanup
*val_chain
;
2180 val_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "mbox");
2181 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
2182 ui_out_field_fmt (uiout
, field
, "0x%s", phex (val
, 4));
2183 do_cleanups (val_chain
);
2185 if (!ui_out_is_mi_like_p (uiout
))
2186 printf_filtered ("\n");
2189 do_cleanups (chain
);
2193 info_spu_mailbox_command (char *args
, int from_tty
)
2195 struct frame_info
*frame
= get_selected_frame (NULL
);
2196 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2197 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2198 struct cleanup
*chain
;
2204 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2205 error (_("\"info spu\" is only supported on the SPU architecture."));
2207 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2209 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoMailbox");
2211 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
2212 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2213 buf
, 0, sizeof buf
);
2215 error (_("Could not read mbox_info."));
2217 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2218 "mbox", "SPU Outbound Mailbox");
2220 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
2221 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2222 buf
, 0, sizeof buf
);
2224 error (_("Could not read ibox_info."));
2226 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2227 "ibox", "SPU Outbound Interrupt Mailbox");
2229 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
2230 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2231 buf
, 0, sizeof buf
);
2233 error (_("Could not read wbox_info."));
2235 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2236 "wbox", "SPU Inbound Mailbox");
2238 do_cleanups (chain
);
2242 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
2244 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
2245 return (word
>> (63 - last
)) & mask
;
2249 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
2251 static char *spu_mfc_opcode
[256] =
2253 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2254 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2255 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2256 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2257 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
2258 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2259 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
2260 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2261 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
2262 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2263 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2264 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2265 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2266 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2267 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2268 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2269 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2270 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
2271 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2272 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2273 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
2274 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2275 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
2276 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2277 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2278 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
2279 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2280 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2281 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2282 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2283 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2284 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2287 int *seq
= alloca (nr
* sizeof (int));
2289 struct cleanup
*chain
;
2293 /* Determine sequence in which to display (valid) entries. */
2294 for (i
= 0; i
< nr
; i
++)
2296 /* Search for the first valid entry all of whose
2297 dependencies are met. */
2298 for (j
= 0; j
< nr
; j
++)
2300 ULONGEST mfc_cq_dw3
;
2301 ULONGEST dependencies
;
2303 if (done
& (1 << (nr
- 1 - j
)))
2307 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
2308 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
2311 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
2312 if ((dependencies
& done
) != dependencies
)
2316 done
|= 1 << (nr
- 1 - j
);
2327 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 10, nr
, "dma_cmd");
2329 ui_out_table_header (uiout
, 7, ui_left
, "opcode", "Opcode");
2330 ui_out_table_header (uiout
, 3, ui_left
, "tag", "Tag");
2331 ui_out_table_header (uiout
, 3, ui_left
, "tid", "TId");
2332 ui_out_table_header (uiout
, 3, ui_left
, "rid", "RId");
2333 ui_out_table_header (uiout
, 18, ui_left
, "ea", "EA");
2334 ui_out_table_header (uiout
, 7, ui_left
, "lsa", "LSA");
2335 ui_out_table_header (uiout
, 7, ui_left
, "size", "Size");
2336 ui_out_table_header (uiout
, 7, ui_left
, "lstaddr", "LstAddr");
2337 ui_out_table_header (uiout
, 7, ui_left
, "lstsize", "LstSize");
2338 ui_out_table_header (uiout
, 1, ui_left
, "error_p", "E");
2340 ui_out_table_body (uiout
);
2342 for (i
= 0; i
< nr
; i
++)
2344 struct cleanup
*cmd_chain
;
2345 ULONGEST mfc_cq_dw0
;
2346 ULONGEST mfc_cq_dw1
;
2347 ULONGEST mfc_cq_dw2
;
2348 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
2349 int lsa
, size
, list_lsa
, list_size
, mfc_lsa
, mfc_size
;
2351 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
2353 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2354 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2357 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
2359 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2361 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2363 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2364 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2365 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2366 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2367 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2368 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2369 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2371 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2372 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2374 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2375 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2376 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2377 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2378 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2379 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2381 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "cmd");
2383 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2384 ui_out_field_string (uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2386 ui_out_field_int (uiout
, "opcode", mfc_cmd_opcode
);
2388 ui_out_field_int (uiout
, "tag", mfc_cmd_tag
);
2389 ui_out_field_int (uiout
, "tid", tclass_id
);
2390 ui_out_field_int (uiout
, "rid", rclass_id
);
2393 ui_out_field_fmt (uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2395 ui_out_field_skip (uiout
, "ea");
2397 ui_out_field_fmt (uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2399 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
<< 4);
2401 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
);
2405 ui_out_field_fmt (uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2406 ui_out_field_fmt (uiout
, "lstsize", "0x%05x", list_size
<< 3);
2410 ui_out_field_skip (uiout
, "lstaddr");
2411 ui_out_field_skip (uiout
, "lstsize");
2415 ui_out_field_string (uiout
, "error_p", "*");
2417 ui_out_field_skip (uiout
, "error_p");
2419 do_cleanups (cmd_chain
);
2421 if (!ui_out_is_mi_like_p (uiout
))
2422 printf_filtered ("\n");
2425 do_cleanups (chain
);
2429 info_spu_dma_command (char *args
, int from_tty
)
2431 struct frame_info
*frame
= get_selected_frame (NULL
);
2432 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2433 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2434 ULONGEST dma_info_type
;
2435 ULONGEST dma_info_mask
;
2436 ULONGEST dma_info_status
;
2437 ULONGEST dma_info_stall_and_notify
;
2438 ULONGEST dma_info_atomic_command_status
;
2439 struct cleanup
*chain
;
2445 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2446 error (_("\"info spu\" is only supported on the SPU architecture."));
2448 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2450 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2451 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2452 buf
, 0, 40 + 16 * 32);
2454 error (_("Could not read dma_info."));
2457 = extract_unsigned_integer (buf
, 8, byte_order
);
2459 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2461 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2462 dma_info_stall_and_notify
2463 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2464 dma_info_atomic_command_status
2465 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2467 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoDMA");
2469 if (ui_out_is_mi_like_p (uiout
))
2471 ui_out_field_fmt (uiout
, "dma_info_type", "0x%s",
2472 phex_nz (dma_info_type
, 4));
2473 ui_out_field_fmt (uiout
, "dma_info_mask", "0x%s",
2474 phex_nz (dma_info_mask
, 4));
2475 ui_out_field_fmt (uiout
, "dma_info_status", "0x%s",
2476 phex_nz (dma_info_status
, 4));
2477 ui_out_field_fmt (uiout
, "dma_info_stall_and_notify", "0x%s",
2478 phex_nz (dma_info_stall_and_notify
, 4));
2479 ui_out_field_fmt (uiout
, "dma_info_atomic_command_status", "0x%s",
2480 phex_nz (dma_info_atomic_command_status
, 4));
2484 const char *query_msg
= _("no query pending");
2486 if (dma_info_type
& 4)
2487 switch (dma_info_type
& 3)
2489 case 1: query_msg
= _("'any' query pending"); break;
2490 case 2: query_msg
= _("'all' query pending"); break;
2491 default: query_msg
= _("undefined query type"); break;
2494 printf_filtered (_("Tag-Group Status 0x%s\n"),
2495 phex (dma_info_status
, 4));
2496 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2497 phex (dma_info_mask
, 4), query_msg
);
2498 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2499 phex (dma_info_stall_and_notify
, 4));
2500 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2501 phex (dma_info_atomic_command_status
, 4));
2502 printf_filtered ("\n");
2505 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2506 do_cleanups (chain
);
2510 info_spu_proxydma_command (char *args
, int from_tty
)
2512 struct frame_info
*frame
= get_selected_frame (NULL
);
2513 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2514 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2515 ULONGEST dma_info_type
;
2516 ULONGEST dma_info_mask
;
2517 ULONGEST dma_info_status
;
2518 struct cleanup
*chain
;
2524 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2525 error (_("\"info spu\" is only supported on the SPU architecture."));
2527 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2529 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2530 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2531 buf
, 0, 24 + 8 * 32);
2533 error (_("Could not read proxydma_info."));
2535 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2536 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2537 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2539 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoProxyDMA");
2541 if (ui_out_is_mi_like_p (uiout
))
2543 ui_out_field_fmt (uiout
, "proxydma_info_type", "0x%s",
2544 phex_nz (dma_info_type
, 4));
2545 ui_out_field_fmt (uiout
, "proxydma_info_mask", "0x%s",
2546 phex_nz (dma_info_mask
, 4));
2547 ui_out_field_fmt (uiout
, "proxydma_info_status", "0x%s",
2548 phex_nz (dma_info_status
, 4));
2552 const char *query_msg
;
2554 switch (dma_info_type
& 3)
2556 case 0: query_msg
= _("no query pending"); break;
2557 case 1: query_msg
= _("'any' query pending"); break;
2558 case 2: query_msg
= _("'all' query pending"); break;
2559 default: query_msg
= _("undefined query type"); break;
2562 printf_filtered (_("Tag-Group Status 0x%s\n"),
2563 phex (dma_info_status
, 4));
2564 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2565 phex (dma_info_mask
, 4), query_msg
);
2566 printf_filtered ("\n");
2569 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2570 do_cleanups (chain
);
2574 info_spu_command (char *args
, int from_tty
)
2576 printf_unfiltered (_("\"info spu\" must be followed by "
2577 "the name of an SPU facility.\n"));
2578 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2582 /* Root of all "set spu "/"show spu " commands. */
2585 show_spu_command (char *args
, int from_tty
)
2587 help_list (showspucmdlist
, "show spu ", all_commands
, gdb_stdout
);
2591 set_spu_command (char *args
, int from_tty
)
2593 help_list (setspucmdlist
, "set spu ", all_commands
, gdb_stdout
);
2597 show_spu_stop_on_load (struct ui_file
*file
, int from_tty
,
2598 struct cmd_list_element
*c
, const char *value
)
2600 fprintf_filtered (file
, _("Stopping for new SPE threads is %s.\n"),
2605 show_spu_auto_flush_cache (struct ui_file
*file
, int from_tty
,
2606 struct cmd_list_element
*c
, const char *value
)
2608 fprintf_filtered (file
, _("Automatic software-cache flush is %s.\n"),
2613 /* Set up gdbarch struct. */
2615 static struct gdbarch
*
2616 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2618 struct gdbarch
*gdbarch
;
2619 struct gdbarch_tdep
*tdep
;
2622 /* Which spufs ID was requested as address space? */
2624 id
= *(int *)info
.tdep_info
;
2625 /* For objfile architectures of SPU solibs, decode the ID from the name.
2626 This assumes the filename convention employed by solib-spu.c. */
2629 char *name
= strrchr (info
.abfd
->filename
, '@');
2631 sscanf (name
, "@0x%*x <%d>", &id
);
2634 /* Find a candidate among extant architectures. */
2635 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2637 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2639 tdep
= gdbarch_tdep (arches
->gdbarch
);
2640 if (tdep
&& tdep
->id
== id
)
2641 return arches
->gdbarch
;
2644 /* None found, so create a new architecture. */
2645 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2647 gdbarch
= gdbarch_alloc (&info
, tdep
);
2650 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2653 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2654 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2655 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2656 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2657 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2658 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2659 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2660 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2661 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2662 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2663 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2664 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2667 set_gdbarch_char_signed (gdbarch
, 0);
2668 set_gdbarch_ptr_bit (gdbarch
, 32);
2669 set_gdbarch_addr_bit (gdbarch
, 32);
2670 set_gdbarch_short_bit (gdbarch
, 16);
2671 set_gdbarch_int_bit (gdbarch
, 32);
2672 set_gdbarch_long_bit (gdbarch
, 32);
2673 set_gdbarch_long_long_bit (gdbarch
, 64);
2674 set_gdbarch_float_bit (gdbarch
, 32);
2675 set_gdbarch_double_bit (gdbarch
, 64);
2676 set_gdbarch_long_double_bit (gdbarch
, 64);
2677 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2678 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2679 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2681 /* Address handling. */
2682 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2683 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2684 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2685 set_gdbarch_address_class_type_flags (gdbarch
, spu_address_class_type_flags
);
2686 set_gdbarch_address_class_type_flags_to_name
2687 (gdbarch
, spu_address_class_type_flags_to_name
);
2688 set_gdbarch_address_class_name_to_type_flags
2689 (gdbarch
, spu_address_class_name_to_type_flags
);
2692 /* Inferior function calls. */
2693 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2694 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2695 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2696 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2697 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2698 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2699 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2701 /* Frame handling. */
2702 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2703 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2704 frame_base_set_default (gdbarch
, &spu_frame_base
);
2705 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2706 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2707 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2708 set_gdbarch_frame_args_skip (gdbarch
, 0);
2709 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2710 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2712 /* Cell/B.E. cross-architecture unwinder support. */
2713 frame_unwind_prepend_unwinder (gdbarch
, &spu2ppu_unwind
);
2716 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2717 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2718 set_gdbarch_memory_remove_breakpoint (gdbarch
, spu_memory_remove_breakpoint
);
2719 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2720 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2721 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2724 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2729 /* Provide a prototype to silence -Wmissing-prototypes. */
2730 extern initialize_file_ftype _initialize_spu_tdep
;
2733 _initialize_spu_tdep (void)
2735 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2737 /* Add ourselves to objfile event chain. */
2738 observer_attach_new_objfile (spu_overlay_new_objfile
);
2739 spu_overlay_data
= register_objfile_data ();
2741 /* Install spu stop-on-load handler. */
2742 observer_attach_new_objfile (spu_catch_start
);
2744 /* Add ourselves to normal_stop event chain. */
2745 observer_attach_normal_stop (spu_attach_normal_stop
);
2747 /* Add root prefix command for all "set spu"/"show spu" commands. */
2748 add_prefix_cmd ("spu", no_class
, set_spu_command
,
2749 _("Various SPU specific commands."),
2750 &setspucmdlist
, "set spu ", 0, &setlist
);
2751 add_prefix_cmd ("spu", no_class
, show_spu_command
,
2752 _("Various SPU specific commands."),
2753 &showspucmdlist
, "show spu ", 0, &showlist
);
2755 /* Toggle whether or not to add a temporary breakpoint at the "main"
2756 function of new SPE contexts. */
2757 add_setshow_boolean_cmd ("stop-on-load", class_support
,
2758 &spu_stop_on_load_p
, _("\
2759 Set whether to stop for new SPE threads."),
2761 Show whether to stop for new SPE threads."),
2763 Use \"on\" to give control to the user when a new SPE thread\n\
2764 enters its \"main\" function.\n\
2765 Use \"off\" to disable stopping for new SPE threads."),
2767 show_spu_stop_on_load
,
2768 &setspucmdlist
, &showspucmdlist
);
2770 /* Toggle whether or not to automatically flush the software-managed
2771 cache whenever SPE execution stops. */
2772 add_setshow_boolean_cmd ("auto-flush-cache", class_support
,
2773 &spu_auto_flush_cache_p
, _("\
2774 Set whether to automatically flush the software-managed cache."),
2776 Show whether to automatically flush the software-managed cache."),
2778 Use \"on\" to automatically flush the software-managed cache\n\
2779 whenever SPE execution stops.\n\
2780 Use \"off\" to never automatically flush the software-managed cache."),
2782 show_spu_auto_flush_cache
,
2783 &setspucmdlist
, &showspucmdlist
);
2785 /* Add root prefix command for all "info spu" commands. */
2786 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2787 _("Various SPU specific commands."),
2788 &infospucmdlist
, "info spu ", 0, &infolist
);
2790 /* Add various "info spu" commands. */
2791 add_cmd ("event", class_info
, info_spu_event_command
,
2792 _("Display SPU event facility status.\n"),
2794 add_cmd ("signal", class_info
, info_spu_signal_command
,
2795 _("Display SPU signal notification facility status.\n"),
2797 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2798 _("Display SPU mailbox facility status.\n"),
2800 add_cmd ("dma", class_info
, info_spu_dma_command
,
2801 _("Display MFC DMA status.\n"),
2803 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2804 _("Display MFC Proxy-DMA status.\n"),