1 /* Target-dependent code for the Tilera TILE-Gx processor.
3 Copyright (C) 2012-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "frame-base.h"
23 #include "frame-unwind.h"
24 #include "dwarf2-frame.h"
25 #include "trad-frame.h"
33 #include "arch-utils.h"
34 #include "floatformat.h"
39 #include "linux-tdep.h"
41 #include "solib-svr4.h"
42 #include "tilegx-tdep.h"
43 #include "opcode/tilegx.h"
45 #include "common/byte-vector.h"
47 struct tilegx_frame_cache
54 /* Table of saved registers. */
55 struct trad_frame_saved_reg
*saved_regs
;
58 /* Register state values used by analyze_prologue. */
61 REVERSE_STATE_REGISTER
,
66 /* Register state used by analyze_prologue(). */
67 struct tilegx_reverse_regs
70 enum reverse_state state
;
73 static const struct tilegx_reverse_regs
74 template_reverse_regs
[TILEGX_NUM_PHYS_REGS
] =
76 { TILEGX_R0_REGNUM
, REVERSE_STATE_REGISTER
},
77 { TILEGX_R1_REGNUM
, REVERSE_STATE_REGISTER
},
78 { TILEGX_R2_REGNUM
, REVERSE_STATE_REGISTER
},
79 { TILEGX_R3_REGNUM
, REVERSE_STATE_REGISTER
},
80 { TILEGX_R4_REGNUM
, REVERSE_STATE_REGISTER
},
81 { TILEGX_R5_REGNUM
, REVERSE_STATE_REGISTER
},
82 { TILEGX_R6_REGNUM
, REVERSE_STATE_REGISTER
},
83 { TILEGX_R7_REGNUM
, REVERSE_STATE_REGISTER
},
84 { TILEGX_R8_REGNUM
, REVERSE_STATE_REGISTER
},
85 { TILEGX_R9_REGNUM
, REVERSE_STATE_REGISTER
},
86 { TILEGX_R10_REGNUM
, REVERSE_STATE_REGISTER
},
87 { TILEGX_R11_REGNUM
, REVERSE_STATE_REGISTER
},
88 { TILEGX_R12_REGNUM
, REVERSE_STATE_REGISTER
},
89 { TILEGX_R13_REGNUM
, REVERSE_STATE_REGISTER
},
90 { TILEGX_R14_REGNUM
, REVERSE_STATE_REGISTER
},
91 { TILEGX_R15_REGNUM
, REVERSE_STATE_REGISTER
},
92 { TILEGX_R16_REGNUM
, REVERSE_STATE_REGISTER
},
93 { TILEGX_R17_REGNUM
, REVERSE_STATE_REGISTER
},
94 { TILEGX_R18_REGNUM
, REVERSE_STATE_REGISTER
},
95 { TILEGX_R19_REGNUM
, REVERSE_STATE_REGISTER
},
96 { TILEGX_R20_REGNUM
, REVERSE_STATE_REGISTER
},
97 { TILEGX_R21_REGNUM
, REVERSE_STATE_REGISTER
},
98 { TILEGX_R22_REGNUM
, REVERSE_STATE_REGISTER
},
99 { TILEGX_R23_REGNUM
, REVERSE_STATE_REGISTER
},
100 { TILEGX_R24_REGNUM
, REVERSE_STATE_REGISTER
},
101 { TILEGX_R25_REGNUM
, REVERSE_STATE_REGISTER
},
102 { TILEGX_R26_REGNUM
, REVERSE_STATE_REGISTER
},
103 { TILEGX_R27_REGNUM
, REVERSE_STATE_REGISTER
},
104 { TILEGX_R28_REGNUM
, REVERSE_STATE_REGISTER
},
105 { TILEGX_R29_REGNUM
, REVERSE_STATE_REGISTER
},
106 { TILEGX_R30_REGNUM
, REVERSE_STATE_REGISTER
},
107 { TILEGX_R31_REGNUM
, REVERSE_STATE_REGISTER
},
108 { TILEGX_R32_REGNUM
, REVERSE_STATE_REGISTER
},
109 { TILEGX_R33_REGNUM
, REVERSE_STATE_REGISTER
},
110 { TILEGX_R34_REGNUM
, REVERSE_STATE_REGISTER
},
111 { TILEGX_R35_REGNUM
, REVERSE_STATE_REGISTER
},
112 { TILEGX_R36_REGNUM
, REVERSE_STATE_REGISTER
},
113 { TILEGX_R37_REGNUM
, REVERSE_STATE_REGISTER
},
114 { TILEGX_R38_REGNUM
, REVERSE_STATE_REGISTER
},
115 { TILEGX_R39_REGNUM
, REVERSE_STATE_REGISTER
},
116 { TILEGX_R40_REGNUM
, REVERSE_STATE_REGISTER
},
117 { TILEGX_R41_REGNUM
, REVERSE_STATE_REGISTER
},
118 { TILEGX_R42_REGNUM
, REVERSE_STATE_REGISTER
},
119 { TILEGX_R43_REGNUM
, REVERSE_STATE_REGISTER
},
120 { TILEGX_R44_REGNUM
, REVERSE_STATE_REGISTER
},
121 { TILEGX_R45_REGNUM
, REVERSE_STATE_REGISTER
},
122 { TILEGX_R46_REGNUM
, REVERSE_STATE_REGISTER
},
123 { TILEGX_R47_REGNUM
, REVERSE_STATE_REGISTER
},
124 { TILEGX_R48_REGNUM
, REVERSE_STATE_REGISTER
},
125 { TILEGX_R49_REGNUM
, REVERSE_STATE_REGISTER
},
126 { TILEGX_R50_REGNUM
, REVERSE_STATE_REGISTER
},
127 { TILEGX_R51_REGNUM
, REVERSE_STATE_REGISTER
},
128 { TILEGX_R52_REGNUM
, REVERSE_STATE_REGISTER
},
129 { TILEGX_TP_REGNUM
, REVERSE_STATE_REGISTER
},
130 { TILEGX_SP_REGNUM
, REVERSE_STATE_REGISTER
},
131 { TILEGX_LR_REGNUM
, REVERSE_STATE_REGISTER
},
132 { 0, REVERSE_STATE_UNKNOWN
},
133 { 0, REVERSE_STATE_UNKNOWN
},
134 { 0, REVERSE_STATE_UNKNOWN
},
135 { 0, REVERSE_STATE_UNKNOWN
},
136 { 0, REVERSE_STATE_UNKNOWN
},
137 { 0, REVERSE_STATE_UNKNOWN
},
138 { 0, REVERSE_STATE_UNKNOWN
},
139 { TILEGX_ZERO_REGNUM
, REVERSE_STATE_VALUE
}
142 /* Implement the "register_name" gdbarch method. */
145 tilegx_register_name (struct gdbarch
*gdbarch
, int regnum
)
147 static const char *const register_names
[TILEGX_NUM_REGS
] =
149 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
150 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
151 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
152 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
153 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
154 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
155 "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr",
156 "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero",
160 if (regnum
< 0 || regnum
>= TILEGX_NUM_REGS
)
161 internal_error (__FILE__
, __LINE__
,
162 "tilegx_register_name: invalid register number %d",
165 return register_names
[regnum
];
168 /* This is the implementation of gdbarch method register_type. */
171 tilegx_register_type (struct gdbarch
*gdbarch
, int regnum
)
173 if (regnum
== TILEGX_PC_REGNUM
)
174 return builtin_type (gdbarch
)->builtin_func_ptr
;
176 return builtin_type (gdbarch
)->builtin_uint64
;
179 /* This is the implementation of gdbarch method dwarf2_reg_to_regnum. */
182 tilegx_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int num
)
187 /* Makes the decision of whether a given type is a scalar type.
188 Scalar types are returned in the registers r2-r11 as they fit. */
191 tilegx_type_is_scalar (struct type
*t
)
193 return (TYPE_CODE(t
) != TYPE_CODE_STRUCT
194 && TYPE_CODE(t
) != TYPE_CODE_UNION
195 && TYPE_CODE(t
) != TYPE_CODE_ARRAY
);
198 /* Returns non-zero if the given struct type will be returned using
199 a special convention, rather than the normal function return method.
200 Used in the context of the "return" command, and target function
201 calls from the debugger. */
204 tilegx_use_struct_convention (struct type
*type
)
206 /* Only scalars which fit in R0 - R9 can be returned in registers.
207 Otherwise, they are returned via a pointer passed in R0. */
208 return (!tilegx_type_is_scalar (type
)
209 && (TYPE_LENGTH (type
) > (1 + TILEGX_R9_REGNUM
- TILEGX_R0_REGNUM
)
213 /* Find a function's return value in the appropriate registers (in
214 REGCACHE), and copy it into VALBUF. */
217 tilegx_extract_return_value (struct type
*type
, struct regcache
*regcache
,
220 int len
= TYPE_LENGTH (type
);
221 int i
, regnum
= TILEGX_R0_REGNUM
;
223 for (i
= 0; i
< len
; i
+= tilegx_reg_size
)
224 regcache_raw_read (regcache
, regnum
++, valbuf
+ i
);
227 /* Copy the function return value from VALBUF into the proper
228 location for a function return.
229 Called only in the context of the "return" command. */
232 tilegx_store_return_value (struct type
*type
, struct regcache
*regcache
,
235 if (TYPE_LENGTH (type
) < tilegx_reg_size
)
237 /* Add leading zeros to the (little-endian) value. */
238 gdb_byte buf
[tilegx_reg_size
] = { 0 };
240 memcpy (buf
, valbuf
, TYPE_LENGTH (type
));
241 regcache_raw_write (regcache
, TILEGX_R0_REGNUM
, buf
);
245 int len
= TYPE_LENGTH (type
);
246 int i
, regnum
= TILEGX_R0_REGNUM
;
248 for (i
= 0; i
< len
; i
+= tilegx_reg_size
)
249 regcache_raw_write (regcache
, regnum
++, (gdb_byte
*) valbuf
+ i
);
253 /* This is the implementation of gdbarch method return_value. */
255 static enum return_value_convention
256 tilegx_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
257 struct type
*type
, struct regcache
*regcache
,
258 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
260 if (tilegx_use_struct_convention (type
))
261 return RETURN_VALUE_STRUCT_CONVENTION
;
263 tilegx_store_return_value (type
, regcache
, writebuf
);
265 tilegx_extract_return_value (type
, regcache
, readbuf
);
266 return RETURN_VALUE_REGISTER_CONVENTION
;
269 /* This is the implementation of gdbarch method frame_align. */
272 tilegx_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
278 /* Implement the "push_dummy_call" gdbarch method. */
281 tilegx_push_dummy_call (struct gdbarch
*gdbarch
,
282 struct value
*function
,
283 struct regcache
*regcache
,
284 CORE_ADDR bp_addr
, int nargs
,
286 CORE_ADDR sp
, int struct_return
,
287 CORE_ADDR struct_addr
)
289 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
290 CORE_ADDR stack_dest
= sp
;
291 int argreg
= TILEGX_R0_REGNUM
;
293 int typelen
, slacklen
;
294 static const gdb_byte four_zero_words
[16] = { 0 };
296 /* If struct_return is 1, then the struct return address will
297 consume one argument-passing register. */
299 regcache_cooked_write_unsigned (regcache
, argreg
++, struct_addr
);
301 /* Arguments are passed in R0 - R9, and as soon as an argument
302 will not fit completely in the remaining registers, then it,
303 and all remaining arguments, are put on the stack. */
304 for (i
= 0; i
< nargs
&& argreg
<= TILEGX_R9_REGNUM
; i
++)
307 typelen
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
309 if (typelen
> (TILEGX_R9_REGNUM
- argreg
+ 1) * tilegx_reg_size
)
312 /* Put argument into registers wordwise. */
313 val
= value_contents (args
[i
]);
314 for (j
= 0; j
< typelen
; j
+= tilegx_reg_size
)
316 /* ISSUE: Why special handling for "typelen = 4x + 1"?
317 I don't ever see "typelen" values except 4 and 8. */
318 int n
= (typelen
- j
== 1) ? 1 : tilegx_reg_size
;
319 ULONGEST w
= extract_unsigned_integer (val
+ j
, n
, byte_order
);
321 regcache_cooked_write_unsigned (regcache
, argreg
++, w
);
326 stack_dest
= tilegx_frame_align (gdbarch
, stack_dest
);
328 /* Loop backwards through remaining arguments and push them on
329 the stack, word aligned. */
330 for (j
= nargs
- 1; j
>= i
; j
--)
332 const gdb_byte
*contents
= value_contents (args
[j
]);
334 typelen
= TYPE_LENGTH (value_enclosing_type (args
[j
]));
335 slacklen
= align_up (typelen
, 8) - typelen
;
336 gdb::byte_vector
val (typelen
+ slacklen
);
337 memcpy (val
.data (), contents
, typelen
);
338 memset (val
.data () + typelen
, 0, slacklen
);
340 /* Now write data to the stack. The stack grows downwards. */
341 stack_dest
-= typelen
+ slacklen
;
342 write_memory (stack_dest
, val
.data (), typelen
+ slacklen
);
345 /* Add 16 bytes for linkage space to the stack. */
346 stack_dest
= stack_dest
- 16;
347 write_memory (stack_dest
, four_zero_words
, 16);
349 /* Update stack pointer. */
350 regcache_cooked_write_unsigned (regcache
, TILEGX_SP_REGNUM
, stack_dest
);
352 /* Set the return address register to point to the entry point of
353 the program, where a breakpoint lies in wait. */
354 regcache_cooked_write_unsigned (regcache
, TILEGX_LR_REGNUM
, bp_addr
);
360 /* Decode the instructions within the given address range.
361 Decide when we must have reached the end of the function prologue.
362 If a frame_info pointer is provided, fill in its saved_regs etc.
363 Returns the address of the first instruction after the prologue.
364 NOTE: This is often called with start_addr being the start of some
365 function, and end_addr being the current PC. */
368 tilegx_analyze_prologue (struct gdbarch
* gdbarch
,
369 CORE_ADDR start_addr
, CORE_ADDR end_addr
,
370 struct tilegx_frame_cache
*cache
,
371 struct frame_info
*next_frame
)
373 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
375 CORE_ADDR prolog_end
= end_addr
;
376 gdb_byte instbuf
[32 * TILEGX_BUNDLE_SIZE_IN_BYTES
];
377 CORE_ADDR instbuf_start
;
378 unsigned int instbuf_size
;
381 struct tilegx_decoded_instruction
382 decoded
[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE
];
384 struct tilegx_reverse_regs reverse_frame
[TILEGX_NUM_PHYS_REGS
];
385 struct tilegx_reverse_regs
386 new_reverse_frame
[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE
];
387 int dest_regs
[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE
];
388 int reverse_frame_valid
, prolog_done
, branch_seen
, lr_saved_on_stack_p
;
389 LONGEST prev_sp_value
;
392 if (start_addr
>= end_addr
393 || (start_addr
% TILEGX_BUNDLE_ALIGNMENT_IN_BYTES
) != 0)
396 /* Initialize the reverse frame. This maps the CURRENT frame's
397 registers to the outer frame's registers (the frame on the
398 stack goes the other way). */
399 memcpy (&reverse_frame
, &template_reverse_regs
, sizeof (reverse_frame
));
404 lr_saved_on_stack_p
= 0;
406 /* To cut down on round-trip overhead, we fetch multiple bundles
407 at once. These variables describe the range of memory we have
412 for (next_addr
= start_addr
;
413 next_addr
< end_addr
;
414 next_addr
+= TILEGX_BUNDLE_SIZE_IN_BYTES
)
416 /* Retrieve the next instruction. */
417 if (next_addr
- instbuf_start
>= instbuf_size
)
419 /* Figure out how many bytes to fetch. Don't span a page
420 boundary since that might cause an unnecessary memory
422 unsigned int size_on_same_page
= 4096 - (next_addr
& 4095);
424 instbuf_size
= sizeof instbuf
;
426 if (instbuf_size
> size_on_same_page
)
427 instbuf_size
= size_on_same_page
;
429 instbuf_size
= std::min ((CORE_ADDR
) instbuf_size
,
430 (end_addr
- next_addr
));
431 instbuf_start
= next_addr
;
433 status
= safe_frame_unwind_memory (next_frame
, instbuf_start
,
434 instbuf
, instbuf_size
);
436 memory_error (TARGET_XFER_E_IO
, next_addr
);
439 reverse_frame_valid
= 0;
441 bundle
= extract_unsigned_integer (&instbuf
[next_addr
- instbuf_start
],
444 num_insns
= parse_insn_tilegx (bundle
, next_addr
, decoded
);
446 for (i
= 0; i
< num_insns
; i
++)
448 struct tilegx_decoded_instruction
*this_insn
= &decoded
[i
];
449 long long *operands
= this_insn
->operand_values
;
450 const struct tilegx_opcode
*opcode
= this_insn
->opcode
;
452 switch (opcode
->mnemonic
)
456 && reverse_frame
[operands
[0]].state
== REVERSE_STATE_VALUE
457 && reverse_frame
[operands
[1]].state
458 == REVERSE_STATE_REGISTER
)
460 LONGEST saved_address
= reverse_frame
[operands
[0]].value
;
461 unsigned saved_register
462 = (unsigned) reverse_frame
[operands
[1]].value
;
464 /* realreg >= 0 and addr != -1 indicates that the
465 value of saved_register is in memory location
466 saved_address. The value of realreg is not
467 meaningful in this case but it must be >= 0.
469 cache
->saved_regs
[saved_register
].realreg
= saved_register
;
470 cache
->saved_regs
[saved_register
].addr
= saved_address
;
473 && (operands
[0] == TILEGX_SP_REGNUM
)
474 && (operands
[1] == TILEGX_LR_REGNUM
))
475 lr_saved_on_stack_p
= 1;
477 case TILEGX_OPC_ADDI
:
478 case TILEGX_OPC_ADDLI
:
480 && operands
[0] == TILEGX_SP_REGNUM
481 && operands
[1] == TILEGX_SP_REGNUM
482 && reverse_frame
[operands
[1]].state
== REVERSE_STATE_REGISTER
)
484 /* Special case. We're fixing up the stack frame. */
485 uint64_t hopefully_sp
486 = (unsigned) reverse_frame
[operands
[1]].value
;
487 short op2_as_short
= (short) operands
[2];
488 signed char op2_as_char
= (signed char) operands
[2];
490 /* Fix up the sign-extension. */
491 if (opcode
->mnemonic
== TILEGX_OPC_ADDI
)
492 op2_as_short
= op2_as_char
;
493 prev_sp_value
= (cache
->saved_regs
[hopefully_sp
].addr
496 new_reverse_frame
[i
].state
= REVERSE_STATE_VALUE
;
497 new_reverse_frame
[i
].value
498 = cache
->saved_regs
[hopefully_sp
].addr
;
499 trad_frame_set_value (cache
->saved_regs
,
500 hopefully_sp
, prev_sp_value
);
504 short op2_as_short
= (short) operands
[2];
505 signed char op2_as_char
= (signed char) operands
[2];
507 /* Fix up the sign-extension. */
508 if (opcode
->mnemonic
== TILEGX_OPC_ADDI
)
509 op2_as_short
= op2_as_char
;
511 new_reverse_frame
[i
] = reverse_frame
[operands
[1]];
512 if (new_reverse_frame
[i
].state
== REVERSE_STATE_VALUE
)
513 new_reverse_frame
[i
].value
+= op2_as_short
;
515 new_reverse_frame
[i
].state
= REVERSE_STATE_UNKNOWN
;
517 reverse_frame_valid
|= 1 << i
;
518 dest_regs
[i
] = operands
[0];
521 if (reverse_frame
[operands
[1]].state
== REVERSE_STATE_VALUE
522 && reverse_frame
[operands
[2]].state
== REVERSE_STATE_VALUE
)
524 /* We have values -- we can do this. */
525 new_reverse_frame
[i
] = reverse_frame
[operands
[2]];
526 new_reverse_frame
[i
].value
527 += reverse_frame
[operands
[i
]].value
;
531 /* We don't know anything about the values. Punt. */
532 new_reverse_frame
[i
].state
= REVERSE_STATE_UNKNOWN
;
534 reverse_frame_valid
|= 1 << i
;
535 dest_regs
[i
] = operands
[0];
537 case TILEGX_OPC_MOVE
:
538 new_reverse_frame
[i
] = reverse_frame
[operands
[1]];
539 reverse_frame_valid
|= 1 << i
;
540 dest_regs
[i
] = operands
[0];
542 case TILEGX_OPC_MOVEI
:
543 case TILEGX_OPC_MOVELI
:
544 new_reverse_frame
[i
].state
= REVERSE_STATE_VALUE
;
545 new_reverse_frame
[i
].value
= operands
[1];
546 reverse_frame_valid
|= 1 << i
;
547 dest_regs
[i
] = operands
[0];
550 if (reverse_frame
[operands
[1]].state
== REVERSE_STATE_VALUE
)
552 /* We have a value in A -- we can do this. */
553 new_reverse_frame
[i
] = reverse_frame
[operands
[1]];
554 new_reverse_frame
[i
].value
555 = reverse_frame
[operands
[1]].value
| operands
[2];
557 else if (operands
[2] == 0)
559 /* This is a move. */
560 new_reverse_frame
[i
] = reverse_frame
[operands
[1]];
564 /* We don't know anything about the values. Punt. */
565 new_reverse_frame
[i
].state
= REVERSE_STATE_UNKNOWN
;
567 reverse_frame_valid
|= 1 << i
;
568 dest_regs
[i
] = operands
[0];
571 if (reverse_frame
[operands
[1]].state
== REVERSE_STATE_VALUE
572 && reverse_frame
[operands
[1]].value
== 0)
574 /* This is a move. */
575 new_reverse_frame
[i
] = reverse_frame
[operands
[2]];
577 else if (reverse_frame
[operands
[2]].state
== REVERSE_STATE_VALUE
578 && reverse_frame
[operands
[2]].value
== 0)
580 /* This is a move. */
581 new_reverse_frame
[i
] = reverse_frame
[operands
[1]];
585 /* We don't know anything about the values. Punt. */
586 new_reverse_frame
[i
].state
= REVERSE_STATE_UNKNOWN
;
588 reverse_frame_valid
|= 1 << i
;
589 dest_regs
[i
] = operands
[0];
592 if (reverse_frame
[operands
[1]].state
== REVERSE_STATE_VALUE
593 && reverse_frame
[operands
[2]].state
== REVERSE_STATE_VALUE
)
595 /* We have values -- we can do this. */
596 new_reverse_frame
[i
] = reverse_frame
[operands
[1]];
597 new_reverse_frame
[i
].value
598 -= reverse_frame
[operands
[2]].value
;
602 /* We don't know anything about the values. Punt. */
603 new_reverse_frame
[i
].state
= REVERSE_STATE_UNKNOWN
;
605 reverse_frame_valid
|= 1 << i
;
606 dest_regs
[i
] = operands
[0];
609 case TILEGX_OPC_FNOP
:
610 case TILEGX_OPC_INFO
:
611 case TILEGX_OPC_INFOL
:
612 /* Nothing to see here, move on.
613 Note that real NOP is treated as a 'real' instruction
614 because someone must have intended that it be there.
615 It therefore terminates the prolog. */
621 case TILEGX_OPC_BEQZ
:
622 case TILEGX_OPC_BEQZT
:
623 case TILEGX_OPC_BGEZ
:
624 case TILEGX_OPC_BGEZT
:
625 case TILEGX_OPC_BGTZ
:
626 case TILEGX_OPC_BGTZT
:
627 case TILEGX_OPC_BLBC
:
628 case TILEGX_OPC_BLBCT
:
629 case TILEGX_OPC_BLBS
:
630 case TILEGX_OPC_BLBST
:
631 case TILEGX_OPC_BLEZ
:
632 case TILEGX_OPC_BLEZT
:
633 case TILEGX_OPC_BLTZ
:
634 case TILEGX_OPC_BLTZT
:
635 case TILEGX_OPC_BNEZ
:
636 case TILEGX_OPC_BNEZT
:
638 case TILEGX_OPC_IRET
:
639 case TILEGX_OPC_JALR
:
640 case TILEGX_OPC_JALRP
:
643 case TILEGX_OPC_SWINT0
:
644 case TILEGX_OPC_SWINT1
:
645 case TILEGX_OPC_SWINT2
:
646 case TILEGX_OPC_SWINT3
:
647 /* We're really done -- this is a branch. */
652 /* We don't know or care what this instruction is.
653 All we know is that it isn't part of a prolog, and if
654 there's a destination register, we're trashing it. */
656 for (j
= 0; j
< opcode
->num_operands
; j
++)
658 if (this_insn
->operands
[j
]->is_dest_reg
)
660 dest_regs
[i
] = operands
[j
];
661 new_reverse_frame
[i
].state
= REVERSE_STATE_UNKNOWN
;
662 reverse_frame_valid
|= 1 << i
;
670 /* Now update the reverse frames. */
671 for (i
= 0; i
< num_insns
; i
++)
673 /* ISSUE: Does this properly handle "network" registers? */
674 if ((reverse_frame_valid
& (1 << i
))
675 && dest_regs
[i
] != TILEGX_ZERO_REGNUM
)
676 reverse_frame
[dest_regs
[i
]] = new_reverse_frame
[i
];
679 if (prev_sp_value
!= 0)
681 /* GCC uses R52 as a frame pointer. Have we seen "move r52, sp"? */
682 if (reverse_frame
[TILEGX_R52_REGNUM
].state
== REVERSE_STATE_REGISTER
683 && reverse_frame
[TILEGX_R52_REGNUM
].value
== TILEGX_SP_REGNUM
)
685 reverse_frame
[TILEGX_R52_REGNUM
].state
= REVERSE_STATE_VALUE
;
686 reverse_frame
[TILEGX_R52_REGNUM
].value
= prev_sp_value
;
692 if (prolog_done
&& prolog_end
== end_addr
)
694 /* We found non-prolog code. As such, _this_ instruction
695 is the one after the prolog. We keep processing, because
696 there may be more prolog code in there, but this is what
698 /* ISSUE: There may not have actually been a prologue, and
699 we may have simply skipped some random instructions. */
700 prolog_end
= next_addr
;
704 /* We saw a branch. The prolog absolutely must be over. */
709 if (prolog_end
== end_addr
&& cache
)
711 /* We may have terminated the prolog early, and we're certainly
712 at THIS point right now. It's possible that the values of
713 registers we need are currently actually in other registers
714 (and haven't been written to memory yet). Go find them. */
715 for (i
= 0; i
< TILEGX_NUM_PHYS_REGS
; i
++)
717 if (reverse_frame
[i
].state
== REVERSE_STATE_REGISTER
718 && reverse_frame
[i
].value
!= i
)
720 unsigned saved_register
= (unsigned) reverse_frame
[i
].value
;
722 cache
->saved_regs
[saved_register
].realreg
= i
;
723 cache
->saved_regs
[saved_register
].addr
= (LONGEST
) -1;
728 if (lr_saved_on_stack_p
)
730 cache
->saved_regs
[TILEGX_LR_REGNUM
].realreg
= TILEGX_LR_REGNUM
;
731 cache
->saved_regs
[TILEGX_LR_REGNUM
].addr
=
732 cache
->saved_regs
[TILEGX_SP_REGNUM
].addr
;
738 /* This is the implementation of gdbarch method skip_prologue. */
741 tilegx_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
743 CORE_ADDR func_start
, end_pc
;
744 struct obj_section
*s
;
746 /* This is the preferred method, find the end of the prologue by
747 using the debugging information. */
748 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, NULL
))
750 CORE_ADDR post_prologue_pc
751 = skip_prologue_using_sal (gdbarch
, func_start
);
753 if (post_prologue_pc
!= 0)
754 return std::max (start_pc
, post_prologue_pc
);
757 /* Don't straddle a section boundary. */
758 s
= find_pc_section (start_pc
);
759 end_pc
= start_pc
+ 8 * TILEGX_BUNDLE_SIZE_IN_BYTES
;
761 end_pc
= std::min (end_pc
, obj_section_endaddr (s
));
763 /* Otherwise, try to skip prologue the hard way. */
764 return tilegx_analyze_prologue (gdbarch
,
770 /* This is the implementation of gdbarch method stack_frame_destroyed_p. */
773 tilegx_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
775 CORE_ADDR func_addr
= 0, func_end
= 0;
777 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
779 CORE_ADDR addr
= func_end
- TILEGX_BUNDLE_SIZE_IN_BYTES
;
781 /* FIXME: Find the actual epilogue. */
782 /* HACK: Just assume the final bundle is the "ret" instruction". */
789 /* This is the implementation of gdbarch method get_longjmp_target. */
792 tilegx_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
794 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
795 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
799 jb_addr
= get_frame_register_unsigned (frame
, TILEGX_R0_REGNUM
);
801 /* TileGX jmp_buf contains 32 elements of type __uint_reg_t which
802 has a size of 8 bytes. The return address is stored in the 25th
804 if (target_read_memory (jb_addr
+ 25 * 8, buf
, 8))
807 *pc
= extract_unsigned_integer (buf
, 8, byte_order
);
812 /* by assigning the 'faultnum' reg in kernel pt_regs with this value,
813 kernel do_signal will not check r0. see tilegx kernel/signal.c
815 #define INT_SWINT_1_SIGRETURN (~0)
817 /* Implement the "write_pc" gdbarch method. */
820 tilegx_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
822 regcache_cooked_write_unsigned (regcache
, TILEGX_PC_REGNUM
, pc
);
824 /* We must be careful with modifying the program counter. If we
825 just interrupted a system call, the kernel might try to restart
826 it when we resume the inferior. On restarting the system call,
827 the kernel will try backing up the program counter even though it
828 no longer points at the system call. This typically results in a
829 SIGSEGV or SIGILL. We can prevent this by writing INT_SWINT_1_SIGRETURN
830 in the "faultnum" pseudo-register.
832 Note that "faultnum" is saved when setting up a dummy call frame.
833 This means that it is properly restored when that frame is
834 popped, and that the interrupted system call will be restarted
835 when we resume the inferior on return from a function call from
836 within GDB. In all other cases the system call will not be
838 regcache_cooked_write_unsigned (regcache
, TILEGX_FAULTNUM_REGNUM
,
839 INT_SWINT_1_SIGRETURN
);
842 /* 64-bit pattern for a { bpt ; nop } bundle. */
843 constexpr gdb_byte tilegx_break_insn
[] =
844 { 0x00, 0x50, 0x48, 0x51, 0xae, 0x44, 0x6a, 0x28 };
846 typedef BP_MANIPULATION (tilegx_break_insn
) tilegx_breakpoint
;
850 static struct tilegx_frame_cache
*
851 tilegx_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
853 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
854 struct tilegx_frame_cache
*cache
;
855 CORE_ADDR current_pc
;
858 return (struct tilegx_frame_cache
*) *this_cache
;
860 cache
= FRAME_OBSTACK_ZALLOC (struct tilegx_frame_cache
);
862 cache
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
864 cache
->start_pc
= get_frame_func (this_frame
);
865 current_pc
= get_frame_pc (this_frame
);
867 cache
->base
= get_frame_register_unsigned (this_frame
, TILEGX_SP_REGNUM
);
868 trad_frame_set_value (cache
->saved_regs
, TILEGX_SP_REGNUM
, cache
->base
);
871 tilegx_analyze_prologue (gdbarch
, cache
->start_pc
, current_pc
,
874 cache
->saved_regs
[TILEGX_PC_REGNUM
] = cache
->saved_regs
[TILEGX_LR_REGNUM
];
879 /* Retrieve the value of REGNUM in FRAME. */
882 tilegx_frame_prev_register (struct frame_info
*this_frame
,
886 struct tilegx_frame_cache
*info
=
887 tilegx_frame_cache (this_frame
, this_cache
);
889 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
,
893 /* Build frame id. */
896 tilegx_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
897 struct frame_id
*this_id
)
899 struct tilegx_frame_cache
*info
=
900 tilegx_frame_cache (this_frame
, this_cache
);
902 /* This marks the outermost frame. */
906 (*this_id
) = frame_id_build (info
->base
, info
->start_pc
);
910 tilegx_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
912 struct tilegx_frame_cache
*cache
=
913 tilegx_frame_cache (this_frame
, this_cache
);
918 static const struct frame_unwind tilegx_frame_unwind
= {
920 default_frame_unwind_stop_reason
,
921 tilegx_frame_this_id
,
922 tilegx_frame_prev_register
,
923 NULL
, /* const struct frame_data *unwind_data */
924 default_frame_sniffer
, /* frame_sniffer_ftype *sniffer */
925 NULL
/* frame_prev_pc_ftype *prev_pc */
928 static const struct frame_base tilegx_frame_base
= {
929 &tilegx_frame_unwind
,
930 tilegx_frame_base_address
,
931 tilegx_frame_base_address
,
932 tilegx_frame_base_address
936 tilegx_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
938 return frame_unwind_register_unsigned (next_frame
, TILEGX_SP_REGNUM
);
942 tilegx_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
944 return frame_unwind_register_unsigned (next_frame
, TILEGX_PC_REGNUM
);
947 static struct frame_id
948 tilegx_unwind_dummy_id (struct gdbarch
*gdbarch
,
949 struct frame_info
*this_frame
)
953 sp
= get_frame_register_unsigned (this_frame
, TILEGX_SP_REGNUM
);
954 return frame_id_build (sp
, get_frame_pc (this_frame
));
958 /* We cannot read/write the "special" registers. */
961 tilegx_cannot_reference_register (struct gdbarch
*gdbarch
, int regno
)
963 if (regno
>= 0 && regno
< TILEGX_NUM_EASY_REGS
)
965 else if (regno
== TILEGX_PC_REGNUM
966 || regno
== TILEGX_FAULTNUM_REGNUM
)
972 static struct gdbarch
*
973 tilegx_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
975 struct gdbarch
*gdbarch
;
978 /* Handle arch_size == 32 or 64. Default to 64. */
980 arch_size
= bfd_get_arch_size (info
.abfd
);
982 /* Try to find a pre-existing architecture. */
983 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
985 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
987 /* We only have two flavors -- just make sure arch_size matches. */
988 if (gdbarch_ptr_bit (arches
->gdbarch
) == arch_size
)
989 return (arches
->gdbarch
);
992 gdbarch
= gdbarch_alloc (&info
, NULL
);
994 /* Basic register fields and methods, datatype sizes and stuff. */
996 /* There are 64 physical registers which can be referenced by
997 instructions (although only 56 of them can actually be
998 debugged) and 1 magic register (the PC). The other three
999 magic registers (ex1, syscall, orig_r0) which are known to
1000 "ptrace" are ignored by "gdb". Note that we simply pretend
1001 that there are 65 registers, and no "pseudo registers". */
1002 set_gdbarch_num_regs (gdbarch
, TILEGX_NUM_REGS
);
1003 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
1005 set_gdbarch_sp_regnum (gdbarch
, TILEGX_SP_REGNUM
);
1006 set_gdbarch_pc_regnum (gdbarch
, TILEGX_PC_REGNUM
);
1008 set_gdbarch_register_name (gdbarch
, tilegx_register_name
);
1009 set_gdbarch_register_type (gdbarch
, tilegx_register_type
);
1011 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1012 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1013 set_gdbarch_long_bit (gdbarch
, arch_size
);
1014 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1016 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1017 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1018 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1020 set_gdbarch_ptr_bit (gdbarch
, arch_size
);
1021 set_gdbarch_addr_bit (gdbarch
, arch_size
);
1023 set_gdbarch_cannot_fetch_register (gdbarch
,
1024 tilegx_cannot_reference_register
);
1025 set_gdbarch_cannot_store_register (gdbarch
,
1026 tilegx_cannot_reference_register
);
1028 /* Stack grows down. */
1029 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1032 set_gdbarch_unwind_sp (gdbarch
, tilegx_unwind_sp
);
1033 set_gdbarch_unwind_pc (gdbarch
, tilegx_unwind_pc
);
1034 set_gdbarch_dummy_id (gdbarch
, tilegx_unwind_dummy_id
);
1035 set_gdbarch_frame_align (gdbarch
, tilegx_frame_align
);
1036 frame_base_set_default (gdbarch
, &tilegx_frame_base
);
1038 set_gdbarch_skip_prologue (gdbarch
, tilegx_skip_prologue
);
1040 set_gdbarch_stack_frame_destroyed_p (gdbarch
, tilegx_stack_frame_destroyed_p
);
1042 /* Map debug registers into internal register numbers. */
1043 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, tilegx_dwarf2_reg_to_regnum
);
1045 /* These values and methods are used when gdb calls a target function. */
1046 set_gdbarch_push_dummy_call (gdbarch
, tilegx_push_dummy_call
);
1047 set_gdbarch_get_longjmp_target (gdbarch
, tilegx_get_longjmp_target
);
1048 set_gdbarch_write_pc (gdbarch
, tilegx_write_pc
);
1049 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
1050 tilegx_breakpoint::kind_from_pc
);
1051 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
1052 tilegx_breakpoint::bp_from_kind
);
1053 set_gdbarch_return_value (gdbarch
, tilegx_return_value
);
1055 gdbarch_init_osabi (info
, gdbarch
);
1057 dwarf2_append_unwinders (gdbarch
);
1058 frame_unwind_append_unwinder (gdbarch
, &tilegx_frame_unwind
);
1064 _initialize_tilegx_tdep (void)
1066 register_gdbarch_init (bfd_arch_tilegx
, tilegx_gdbarch_init
);