2002-04-30 Michael Snyder <msnyder@redhat.com>
[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c
1 /* Target-dependent code for the x86-64 for GDB, the GNU debugger.
2
3 Copyright 2001, 2002 Free Software Foundation, Inc.
4
5 Contributed by Jiri Smid, SuSE Labs.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 #include "defs.h"
25 #include "inferior.h"
26 #include "gdbcore.h"
27 #include "gdbcmd.h"
28 #include "arch-utils.h"
29 #include "regcache.h"
30 #include "symfile.h"
31 #include "x86-64-tdep.h"
32 #include "dwarf2cfi.h"
33 #include "gdb_assert.h"
34
35 /* Register numbers of various important registers. */
36 #define RAX_REGNUM 0
37 #define RDX_REGNUM 3
38 #define RDI_REGNUM 5
39 #define EFLAGS_REGNUM 17
40 #define XMM1_REGNUM 39
41
42 struct register_info
43 {
44 int size;
45 char *name;
46 struct type **type;
47 };
48
49 /* x86_64_register_raw_size_table[i] is the number of bytes of storage in
50 GDB's register array occupied by register i. */
51 static struct register_info x86_64_register_info_table[] = {
52 /* 0 */ {8, "rax", &builtin_type_int64},
53 /* 1 */ {8, "rbx", &builtin_type_int64},
54 /* 2 */ {8, "rcx", &builtin_type_int64},
55 /* 3 */ {8, "rdx", &builtin_type_int64},
56 /* 4 */ {8, "rsi", &builtin_type_int64},
57 /* 5 */ {8, "rdi", &builtin_type_int64},
58 /* 6 */ {8, "rbp", &builtin_type_void_func_ptr},
59 /* 7 */ {8, "rsp", &builtin_type_void_func_ptr},
60 /* 8 */ {8, "r8", &builtin_type_int64},
61 /* 9 */ {8, "r9", &builtin_type_int64},
62 /* 10 */ {8, "r10", &builtin_type_int64},
63 /* 11 */ {8, "r11", &builtin_type_int64},
64 /* 12 */ {8, "r12", &builtin_type_int64},
65 /* 13 */ {8, "r13", &builtin_type_int64},
66 /* 14 */ {8, "r14", &builtin_type_int64},
67 /* 15 */ {8, "r15", &builtin_type_int64},
68 /* 16 */ {8, "rip", &builtin_type_void_func_ptr},
69 /* 17 */ {4, "eflags", &builtin_type_int32},
70 /* 18 */ {4, "ds", &builtin_type_int32},
71 /* 19 */ {4, "es", &builtin_type_int32},
72 /* 20 */ {4, "fs", &builtin_type_int32},
73 /* 21 */ {4, "gs", &builtin_type_int32},
74 /* 22 */ {10, "st0", &builtin_type_i387_ext},
75 /* 23 */ {10, "st1", &builtin_type_i387_ext},
76 /* 24 */ {10, "st2", &builtin_type_i387_ext},
77 /* 25 */ {10, "st3", &builtin_type_i387_ext},
78 /* 26 */ {10, "st4", &builtin_type_i387_ext},
79 /* 27 */ {10, "st5", &builtin_type_i387_ext},
80 /* 28 */ {10, "st6", &builtin_type_i387_ext},
81 /* 29 */ {10, "st7", &builtin_type_i387_ext},
82 /* 30 */ {4, "fctrl", &builtin_type_int32},
83 /* 31 */ {4, "fstat", &builtin_type_int32},
84 /* 32 */ {4, "ftag", &builtin_type_int32},
85 /* 33 */ {4, "fiseg", &builtin_type_int32},
86 /* 34 */ {4, "fioff", &builtin_type_int32},
87 /* 35 */ {4, "foseg", &builtin_type_int32},
88 /* 36 */ {4, "fooff", &builtin_type_int32},
89 /* 37 */ {4, "fop", &builtin_type_int32},
90 /* 38 */ {16, "xmm0", &builtin_type_v4sf},
91 /* 39 */ {16, "xmm1", &builtin_type_v4sf},
92 /* 40 */ {16, "xmm2", &builtin_type_v4sf},
93 /* 41 */ {16, "xmm3", &builtin_type_v4sf},
94 /* 42 */ {16, "xmm4", &builtin_type_v4sf},
95 /* 43 */ {16, "xmm5", &builtin_type_v4sf},
96 /* 44 */ {16, "xmm6", &builtin_type_v4sf},
97 /* 45 */ {16, "xmm7", &builtin_type_v4sf},
98 /* 46 */ {16, "xmm8", &builtin_type_v4sf},
99 /* 47 */ {16, "xmm9", &builtin_type_v4sf},
100 /* 48 */ {16, "xmm10", &builtin_type_v4sf},
101 /* 49 */ {16, "xmm11", &builtin_type_v4sf},
102 /* 50 */ {16, "xmm12", &builtin_type_v4sf},
103 /* 51 */ {16, "xmm13", &builtin_type_v4sf},
104 /* 52 */ {16, "xmm14", &builtin_type_v4sf},
105 /* 53 */ {16, "xmm15", &builtin_type_v4sf},
106 /* 54 */ {4, "mxcsr", &builtin_type_int32}
107 };
108
109 /* Number of all registers */
110 #define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \
111 sizeof (x86_64_register_info_table[0]))
112
113 /* Number of general registers. */
114 #define X86_64_NUM_GREGS (22)
115
116 int x86_64_num_regs = X86_64_NUM_REGS;
117 int x86_64_num_gregs = X86_64_NUM_GREGS;
118
119 /* Did we already print a note about frame pointer? */
120 int omit_fp_note_printed = 0;
121
122 /* Number of bytes of storage in the actual machine representation for
123 register REGNO. */
124 int
125 x86_64_register_raw_size (int regno)
126 {
127 return x86_64_register_info_table[regno].size;
128 }
129
130 /* x86_64_register_byte_table[i] is the offset into the register file of the
131 start of register number i. We initialize this from
132 x86_64_register_info_table. */
133 int x86_64_register_byte_table[X86_64_NUM_REGS];
134
135 /* Index within `registers' of the first byte of the space for register REGNO. */
136 int
137 x86_64_register_byte (int regno)
138 {
139 return x86_64_register_byte_table[regno];
140 }
141
142 /* Return the GDB type object for the "standard" data type of data in
143 register N. */
144 static struct type *
145 x86_64_register_virtual_type (int regno)
146 {
147 return *x86_64_register_info_table[regno].type;
148 }
149
150 /* x86_64_register_convertible is true if register N's virtual format is
151 different from its raw format. Note that this definition assumes
152 that the host supports IEEE 32-bit floats, since it doesn't say
153 that SSE registers need conversion. Even if we can't find a
154 counterexample, this is still sloppy. */
155 int
156 x86_64_register_convertible (int regno)
157 {
158 return IS_FP_REGNUM (regno);
159 }
160
161 /* Convert data from raw format for register REGNUM in buffer FROM to
162 virtual format with type TYPE in buffer TO. In principle both
163 formats are identical except that the virtual format has two extra
164 bytes appended that aren't used. We set these to zero. */
165 void
166 x86_64_register_convert_to_virtual (int regnum, struct type *type,
167 char *from, char *to)
168 {
169 char buf[12];
170 DOUBLEST d;
171 /* We only support floating-point values. */
172 if (TYPE_CODE (type) != TYPE_CODE_FLT)
173 {
174 warning ("Cannot convert floating-point register value "
175 "to non-floating-point type.");
176 memset (to, 0, TYPE_LENGTH (type));
177 return;
178 }
179 /* First add the necessary padding. */
180 memcpy (buf, from, FPU_REG_RAW_SIZE);
181 memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE);
182 /* Convert to TYPE. This should be a no-op, if TYPE is equivalent
183 to the extended floating-point format used by the FPU. */
184 convert_typed_floating (to, type, buf,
185 x86_64_register_virtual_type (regnum));
186 }
187
188 /* Convert data from virtual format with type TYPE in buffer FROM to
189 raw format for register REGNUM in buffer TO. Simply omit the two
190 unused bytes. */
191
192 void
193 x86_64_register_convert_to_raw (struct type *type, int regnum,
194 char *from, char *to)
195 {
196 gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12);
197 /* Simply omit the two unused bytes. */
198 memcpy (to, from, FPU_REG_RAW_SIZE);
199 }
200
201 /* This is the variable that is set with "set disassembly-flavour", and
202 its legitimate values. */
203 static const char att_flavour[] = "att";
204 static const char intel_flavour[] = "intel";
205 static const char *valid_flavours[] = {
206 att_flavour,
207 intel_flavour,
208 NULL
209 };
210 static const char *disassembly_flavour = att_flavour;
211
212 static CORE_ADDR
213 x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
214 {
215 char buf[8];
216
217 store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
218
219 write_memory (sp - 8, buf, 8);
220 return sp - 8;
221 }
222
223 void
224 x86_64_pop_frame (void)
225 {
226 generic_pop_current_frame (cfi_pop_frame);
227 }
228 \f
229
230 /* The returning of values is done according to the special algorithm.
231 Some types are returned in registers an some (big structures) in memory.
232 See ABI for details.
233 */
234
235 #define MAX_CLASSES 4
236
237 enum x86_64_reg_class
238 {
239 X86_64_NO_CLASS,
240 X86_64_INTEGER_CLASS,
241 X86_64_INTEGERSI_CLASS,
242 X86_64_SSE_CLASS,
243 X86_64_SSESF_CLASS,
244 X86_64_SSEDF_CLASS,
245 X86_64_SSEUP_CLASS,
246 X86_64_X87_CLASS,
247 X86_64_X87UP_CLASS,
248 X86_64_MEMORY_CLASS
249 };
250
251 /* Return the union class of CLASS1 and CLASS2.
252 See the x86-64 ABI for details. */
253
254 static enum x86_64_reg_class
255 merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
256 {
257 /* Rule #1: If both classes are equal, this is the resulting class. */
258 if (class1 == class2)
259 return class1;
260
261 /* Rule #2: If one of the classes is NO_CLASS, the resulting class is
262 the other class. */
263 if (class1 == X86_64_NO_CLASS)
264 return class2;
265 if (class2 == X86_64_NO_CLASS)
266 return class1;
267
268 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
269 if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
270 return X86_64_MEMORY_CLASS;
271
272 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
273 if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
274 || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
275 return X86_64_INTEGERSI_CLASS;
276 if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
277 || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
278 return X86_64_INTEGER_CLASS;
279
280 /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
281 if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
282 || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
283 return X86_64_MEMORY_CLASS;
284
285 /* Rule #6: Otherwise class SSE is used. */
286 return X86_64_SSE_CLASS;
287 }
288
289
290 /* Classify the argument type.
291 CLASSES will be filled by the register class used to pass each word
292 of the operand. The number of words is returned. In case the parameter
293 should be passed in memory, 0 is returned. As a special case for zero
294 sized containers, classes[0] will be NO_CLASS and 1 is returned.
295
296 See the x86-64 PS ABI for details.
297 */
298
299 static int
300 classify_argument (struct type *type,
301 enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
302 {
303 int bytes = TYPE_LENGTH (type);
304 int words = (bytes + 8 - 1) / 8;
305
306 switch (TYPE_CODE (type))
307 {
308 case TYPE_CODE_ARRAY:
309 case TYPE_CODE_STRUCT:
310 case TYPE_CODE_UNION:
311 {
312 int i;
313 enum x86_64_reg_class subclasses[MAX_CLASSES];
314
315 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
316 if (bytes > 16)
317 return 0;
318
319 for (i = 0; i < words; i++)
320 classes[i] = X86_64_NO_CLASS;
321
322 /* Zero sized arrays or structures are NO_CLASS. We return 0 to
323 signalize memory class, so handle it as special case. */
324 if (!words)
325 {
326 classes[0] = X86_64_NO_CLASS;
327 return 1;
328 }
329 switch (TYPE_CODE (type))
330 {
331 case TYPE_CODE_STRUCT:
332 {
333 int j;
334 for (j = 0; j < type->nfields; ++j)
335 {
336 int num = classify_argument (type->fields[j].type,
337 subclasses,
338 (type->fields[j].loc.bitpos
339 + bit_offset) % 256);
340 if (!num)
341 return 0;
342 for (i = 0; i < num; i++)
343 {
344 int pos =
345 (type->fields[j].loc.bitpos + bit_offset) / 8 / 8;
346 classes[i + pos] =
347 merge_classes (subclasses[i], classes[i + pos]);
348 }
349 }
350 }
351 break;
352 case TYPE_CODE_ARRAY:
353 {
354 int num;
355
356 num = classify_argument (type->target_type,
357 subclasses, bit_offset);
358 if (!num)
359 return 0;
360
361 /* The partial classes are now full classes. */
362 if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
363 subclasses[0] = X86_64_SSE_CLASS;
364 if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
365 subclasses[0] = X86_64_INTEGER_CLASS;
366
367 for (i = 0; i < words; i++)
368 classes[i] = subclasses[i % num];
369 }
370 break;
371 case TYPE_CODE_UNION:
372 {
373 int j;
374 {
375 for (j = 0; j < type->nfields; ++j)
376 {
377 int num;
378 num = classify_argument (type->fields[j].type,
379 subclasses, bit_offset);
380 if (!num)
381 return 0;
382 for (i = 0; i < num; i++)
383 classes[i] = merge_classes (subclasses[i], classes[i]);
384 }
385 }
386 }
387 break;
388 }
389 /* Final merger cleanup. */
390 for (i = 0; i < words; i++)
391 {
392 /* If one class is MEMORY, everything should be passed in
393 memory. */
394 if (classes[i] == X86_64_MEMORY_CLASS)
395 return 0;
396
397 /* The X86_64_SSEUP_CLASS should be always preceeded by
398 X86_64_SSE_CLASS. */
399 if (classes[i] == X86_64_SSEUP_CLASS
400 && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
401 classes[i] = X86_64_SSE_CLASS;
402
403 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
404 if (classes[i] == X86_64_X87UP_CLASS
405 && (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
406 classes[i] = X86_64_SSE_CLASS;
407 }
408 return words;
409 }
410 break;
411 case TYPE_CODE_FLT:
412 switch (bytes)
413 {
414 case 4:
415 if (!(bit_offset % 64))
416 classes[0] = X86_64_SSESF_CLASS;
417 else
418 classes[0] = X86_64_SSE_CLASS;
419 return 1;
420 case 8:
421 classes[0] = X86_64_SSEDF_CLASS;
422 return 1;
423 case 16:
424 classes[0] = X86_64_X87_CLASS;
425 classes[1] = X86_64_X87UP_CLASS;
426 return 2;
427 }
428 break;
429 case TYPE_CODE_INT:
430 case TYPE_CODE_PTR:
431 switch (bytes)
432 {
433 case 1:
434 case 2:
435 case 4:
436 case 8:
437 if (bytes * 8 + bit_offset <= 32)
438 classes[0] = X86_64_INTEGERSI_CLASS;
439 else
440 classes[0] = X86_64_INTEGER_CLASS;
441 return 1;
442 case 16:
443 classes[0] = classes[1] = X86_64_INTEGER_CLASS;
444 return 2;
445 default:
446 break;
447 }
448 case TYPE_CODE_VOID:
449 return 0;
450 }
451 internal_error (__FILE__, __LINE__,
452 "classify_argument: unknown argument type");
453 }
454
455 /* Examine the argument and return set number of register required in each
456 class. Return 0 ifif parameter should be passed in memory. */
457
458 static int
459 examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
460 int n, int *int_nregs, int *sse_nregs)
461 {
462 *int_nregs = 0;
463 *sse_nregs = 0;
464 if (!n)
465 return 0;
466 for (n--; n >= 0; n--)
467 switch (classes[n])
468 {
469 case X86_64_INTEGER_CLASS:
470 case X86_64_INTEGERSI_CLASS:
471 (*int_nregs)++;
472 break;
473 case X86_64_SSE_CLASS:
474 case X86_64_SSESF_CLASS:
475 case X86_64_SSEDF_CLASS:
476 (*sse_nregs)++;
477 break;
478 case X86_64_NO_CLASS:
479 case X86_64_SSEUP_CLASS:
480 case X86_64_X87_CLASS:
481 case X86_64_X87UP_CLASS:
482 break;
483 case X86_64_MEMORY_CLASS:
484 internal_error (__FILE__, __LINE__,
485 "examine_argument: unexpected memory class");
486 }
487 return 1;
488 }
489
490 #define RET_INT_REGS 2
491 #define RET_SSE_REGS 2
492
493 /* Check if the structure in value_type is returned in registers or in
494 memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
495 EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
496 will be used. */
497 int
498 x86_64_use_struct_convention (int gcc_p, struct type *value_type)
499 {
500 enum x86_64_reg_class class[MAX_CLASSES];
501 int n = classify_argument (value_type, class, 0);
502 int needed_intregs;
503 int needed_sseregs;
504
505 return (!n ||
506 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
507 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
508 }
509
510
511 /* Extract from an array REGBUF containing the (raw) register state, a
512 function return value of TYPE, and copy that, in virtual format,
513 into VALBUF. */
514
515 void
516 x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
517 {
518 enum x86_64_reg_class class[MAX_CLASSES];
519 int n = classify_argument (type, class, 0);
520 int needed_intregs;
521 int needed_sseregs;
522 int intreg = 0;
523 int ssereg = 0;
524 int offset = 0;
525 int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
526 int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
527
528 if (!n ||
529 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
530 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
531 { /* memory class */
532 CORE_ADDR addr;
533 memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
534 read_memory (addr, valbuf, TYPE_LENGTH (type));
535 return;
536 }
537 else
538 {
539 int i;
540 for (i = 0; i < n; i++)
541 {
542 switch (class[i])
543 {
544 case X86_64_NO_CLASS:
545 break;
546 case X86_64_INTEGER_CLASS:
547 memcpy (valbuf + offset,
548 regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
549 8);
550 offset += 8;
551 intreg += 2;
552 break;
553 case X86_64_INTEGERSI_CLASS:
554 memcpy (valbuf + offset,
555 regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
556 offset += 8;
557 intreg++;
558 break;
559 case X86_64_SSEDF_CLASS:
560 case X86_64_SSESF_CLASS:
561 case X86_64_SSE_CLASS:
562 memcpy (valbuf + offset,
563 regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
564 8);
565 offset += 8;
566 ssereg += 2;
567 break;
568 case X86_64_SSEUP_CLASS:
569 memcpy (valbuf + offset + 8,
570 regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
571 offset += 8;
572 ssereg++;
573 break;
574 case X86_64_X87_CLASS:
575 memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
576 8);
577 offset += 8;
578 break;
579 case X86_64_X87UP_CLASS:
580 memcpy (valbuf + offset,
581 regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
582 offset += 8;
583 break;
584 case X86_64_MEMORY_CLASS:
585 default:
586 internal_error (__FILE__, __LINE__,
587 "Unexpected argument class");
588 }
589 }
590 }
591 }
592
593 /* Handled by unwind informations. */
594 static void
595 x86_64_frame_init_saved_regs (struct frame_info *fi)
596 {
597 }
598
599 #define INT_REGS 6
600 #define SSE_REGS 16
601
602 CORE_ADDR
603 x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
604 int struct_return, CORE_ADDR struct_addr)
605 {
606 int intreg = 0;
607 int ssereg = 0;
608 int i;
609 static int int_parameter_registers[INT_REGS] = {
610 5 /* RDI */ , 4 /* RSI */ ,
611 3 /* RDX */ , 2 /* RCX */ ,
612 8 /* R8 */ , 9 /* R9 */
613 };
614 /* XMM0 - XMM15 */
615 static int sse_parameter_registers[SSE_REGS] = {
616 XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2,
617 XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6,
618 XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10,
619 XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14
620 };
621 int stack_values_count = 0;
622 int *stack_values;
623 stack_values = alloca (nargs * sizeof (int));
624 for (i = 0; i < nargs; i++)
625 {
626 enum x86_64_reg_class class[MAX_CLASSES];
627 int n = classify_argument (args[i]->type, class, 0);
628 int needed_intregs;
629 int needed_sseregs;
630
631 if (!n ||
632 !examine_argument (class, n, &needed_intregs, &needed_sseregs)
633 || intreg / 2 + needed_intregs > INT_REGS
634 || ssereg / 2 + needed_sseregs > SSE_REGS)
635 { /* memory class */
636 stack_values[stack_values_count++] = i;
637 }
638 else
639 {
640 int j;
641 for (j = 0; j < n; j++)
642 {
643 int offset = 0;
644 switch (class[j])
645 {
646 case X86_64_NO_CLASS:
647 break;
648 case X86_64_INTEGER_CLASS:
649 write_register_gen (int_parameter_registers
650 [(intreg + 1) / 2],
651 VALUE_CONTENTS_ALL (args[i]) + offset);
652 offset += 8;
653 intreg += 2;
654 break;
655 case X86_64_INTEGERSI_CLASS:
656 write_register_gen (int_parameter_registers[intreg / 2],
657 VALUE_CONTENTS_ALL (args[i]) + offset);
658 offset += 8;
659 intreg++;
660 break;
661 case X86_64_SSEDF_CLASS:
662 case X86_64_SSESF_CLASS:
663 case X86_64_SSE_CLASS:
664 write_register_gen (sse_parameter_registers
665 [(ssereg + 1) / 2],
666 VALUE_CONTENTS_ALL (args[i]) + offset);
667 offset += 8;
668 ssereg += 2;
669 break;
670 case X86_64_SSEUP_CLASS:
671 write_register_gen (sse_parameter_registers[ssereg / 2],
672 VALUE_CONTENTS_ALL (args[i]) + offset);
673 offset += 8;
674 ssereg++;
675 break;
676 case X86_64_X87_CLASS:
677 case X86_64_MEMORY_CLASS:
678 stack_values[stack_values_count++] = i;
679 break;
680 case X86_64_X87UP_CLASS:
681 break;
682 default:
683 internal_error (__FILE__, __LINE__,
684 "Unexpected argument class");
685 }
686 intreg += intreg % 2;
687 ssereg += ssereg % 2;
688 }
689 }
690 }
691 while (--stack_values_count >= 0)
692 {
693 struct value *arg = args[stack_values[stack_values_count]];
694 int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
695 len += 7;
696 len -= len % 8;
697 sp -= len;
698 write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
699 }
700 return sp;
701 }
702
703 /* Write into the appropriate registers a function return value stored
704 in VALBUF of type TYPE, given in virtual format. */
705 void
706 x86_64_store_return_value (struct type *type, char *valbuf)
707 {
708 int len = TYPE_LENGTH (type);
709
710 if (TYPE_CODE_FLT == TYPE_CODE (type))
711 {
712 /* Floating-point return values can be found in %st(0). */
713 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
714 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
715 {
716 /* Copy straight over. */
717 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
718 FPU_REG_RAW_SIZE);
719 }
720 else
721 {
722 char buf[FPU_REG_RAW_SIZE];
723 DOUBLEST val;
724
725 /* Convert the value found in VALBUF to the extended
726 floating point format used by the FPU. This is probably
727 not exactly how it would happen on the target itself, but
728 it is the best we can do. */
729 val = extract_floating (valbuf, TYPE_LENGTH (type));
730 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
731 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
732 FPU_REG_RAW_SIZE);
733 }
734 }
735 else
736 {
737 int low_size = REGISTER_RAW_SIZE (0);
738 int high_size = REGISTER_RAW_SIZE (1);
739
740 if (len <= low_size)
741 write_register_bytes (REGISTER_BYTE (0), valbuf, len);
742 else if (len <= (low_size + high_size))
743 {
744 write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
745 write_register_bytes (REGISTER_BYTE (1),
746 valbuf + low_size, len - low_size);
747 }
748 else
749 internal_error (__FILE__, __LINE__,
750 "Cannot store return value of %d bytes long.", len);
751 }
752 }
753 \f
754
755 static char *
756 x86_64_register_name (int reg_nr)
757 {
758 if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS)
759 return NULL;
760 return x86_64_register_info_table[reg_nr].name;
761 }
762 \f
763
764
765 /* We have two flavours of disassembly. The machinery on this page
766 deals with switching between those. */
767
768 static int
769 gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
770 {
771 if (disassembly_flavour == att_flavour)
772 return print_insn_i386_att (memaddr, info);
773 else if (disassembly_flavour == intel_flavour)
774 return print_insn_i386_intel (memaddr, info);
775 /* Never reached -- disassembly_flavour is always either att_flavour
776 or intel_flavour. */
777 internal_error (__FILE__, __LINE__, "failed internal consistency check");
778 }
779 \f
780
781 /* Store the address of the place in which to copy the structure the
782 subroutine will return. This is called from call_function. */
783 void
784 x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
785 {
786 write_register (RDI_REGNUM, addr);
787 }
788
789 int
790 x86_64_frameless_function_invocation (struct frame_info *frame)
791 {
792 return 0;
793 }
794
795 /* If a function with debugging information and known beginning
796 is detected, we will return pc of the next line in the source
797 code. With this approach we effectively skip the prolog. */
798
799 #define PROLOG_BUFSIZE 4
800 CORE_ADDR
801 x86_64_skip_prologue (CORE_ADDR pc)
802 {
803 int i, firstline, currline;
804 struct symtab_and_line v_sal;
805 struct symbol *v_function;
806 CORE_ADDR salendaddr = 0, endaddr = 0;
807
808 /* We will handle only functions beginning with:
809 55 pushq %rbp
810 48 89 e5 movq %rsp,%rbp
811 */
812 unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 },
813 prolog_buf[PROLOG_BUFSIZE];
814
815 read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE);
816
817 /* First check, whether pc points to pushq %rbp. If not,
818 * print a recommendation to enable frame pointer. */
819 if (prolog_expect[0] != prolog_buf[0])
820 {
821 if (!omit_fp_note_printed)
822 {
823 printf_filtered
824 ("NOTE: This function doesn't seem to have a valid prologue.\n"
825 " Try to add -fno-omit-frame-pointer tou your gcc's CFLAGS.\n");
826 omit_fp_note_printed++;
827 }
828 return pc;
829 }
830 /* Valid prolog continues with movq %rsp,%rbp. */
831 for (i = 1; i < PROLOG_BUFSIZE; i++)
832 if (prolog_expect[i] != prolog_buf[i])
833 return pc + 1; /* First instruction after pushq %rbp. */
834
835 v_function = find_pc_function (pc);
836 v_sal = find_pc_line (pc, 0);
837
838 /* If pc doesn't point to a function with debuginfo,
839 some of the following may be NULL. */
840 if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab)
841 return pc;
842
843 firstline = v_sal.line;
844 currline = firstline;
845 salendaddr = v_sal.end;
846 endaddr = v_function->ginfo.value.block->endaddr;
847
848 for (i = 0; i < v_sal.symtab->linetable->nitems; i++)
849 if (v_sal.symtab->linetable->item[i].line > firstline
850 && v_sal.symtab->linetable->item[i].pc >= salendaddr
851 && v_sal.symtab->linetable->item[i].pc < endaddr)
852 {
853 pc = v_sal.symtab->linetable->item[i].pc;
854 currline = v_sal.symtab->linetable->item[i].line;
855 break;
856 }
857
858 return pc;
859 }
860
861 /* Sequence of bytes for breakpoint instruction. */
862 static unsigned char *
863 x86_64_breakpoint_from_pc (CORE_ADDR * pc, int *lenptr)
864 {
865 static unsigned char breakpoint[] = { 0xcc };
866 *lenptr = 1;
867 return breakpoint;
868 }
869
870 static struct gdbarch *
871 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
872 {
873 struct gdbarch *gdbarch;
874 struct gdbarch_tdep *tdep;
875 int i, sum;
876
877 /* Find a candidate among the list of pre-declared architectures. */
878 for (arches = gdbarch_list_lookup_by_info (arches, &info);
879 arches != NULL;
880 arches = gdbarch_list_lookup_by_info (arches->next, &info))
881 {
882 switch (info.bfd_arch_info->mach)
883 {
884 case bfd_mach_x86_64:
885 case bfd_mach_x86_64_intel_syntax:
886 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
887 {
888 case bfd_mach_x86_64:
889 case bfd_mach_x86_64_intel_syntax:
890 return arches->gdbarch;
891 case bfd_mach_i386_i386:
892 case bfd_mach_i386_i8086:
893 case bfd_mach_i386_i386_intel_syntax:
894 break;
895 default:
896 internal_error (__FILE__, __LINE__,
897 "i386_gdbarch_init: unknown machine type");
898 }
899 break;
900 case bfd_mach_i386_i386:
901 case bfd_mach_i386_i8086:
902 case bfd_mach_i386_i386_intel_syntax:
903 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
904 {
905 case bfd_mach_x86_64:
906 case bfd_mach_x86_64_intel_syntax:
907 break;
908 case bfd_mach_i386_i386:
909 case bfd_mach_i386_i8086:
910 case bfd_mach_i386_i386_intel_syntax:
911 return arches->gdbarch;
912 default:
913 internal_error (__FILE__, __LINE__,
914 "i386_gdbarch_init: unknown machine type");
915 }
916 break;
917 default:
918 internal_error (__FILE__, __LINE__,
919 "i386_gdbarch_init: unknown machine type");
920 }
921 }
922
923 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
924 gdbarch = gdbarch_alloc (&info, tdep);
925
926 switch (info.bfd_arch_info->mach)
927 {
928 case bfd_mach_x86_64:
929 case bfd_mach_x86_64_intel_syntax:
930 tdep->num_xmm_regs = 16;
931 break;
932 case bfd_mach_i386_i386:
933 case bfd_mach_i386_i8086:
934 case bfd_mach_i386_i386_intel_syntax:
935 /* This is place for definition of i386 target vector. */
936 break;
937 default:
938 internal_error (__FILE__, __LINE__,
939 "i386_gdbarch_init: unknown machine type");
940 }
941
942 set_gdbarch_long_bit (gdbarch, 64);
943 set_gdbarch_long_long_bit (gdbarch, 64);
944 set_gdbarch_ptr_bit (gdbarch, 64);
945
946 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
947
948 set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
949 set_gdbarch_register_name (gdbarch, x86_64_register_name);
950 set_gdbarch_register_size (gdbarch, 8);
951 set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
952 set_gdbarch_max_register_raw_size (gdbarch, 16);
953 set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
954
955 /* Total amount of space needed to store our copies of the machine's register
956 (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
957 for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++)
958 sum += x86_64_register_info_table[i].size;
959 set_gdbarch_register_bytes (gdbarch, sum);
960 set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size);
961 set_gdbarch_max_register_virtual_size (gdbarch, 16);
962
963 set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
964
965 set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
966 set_gdbarch_register_convert_to_virtual (gdbarch,
967 x86_64_register_convert_to_virtual);
968 set_gdbarch_register_convert_to_raw (gdbarch,
969 x86_64_register_convert_to_raw);
970
971 /* Register numbers of various important registers. */
972 set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
973 set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
974 set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
975
976 set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* First FPU floating-point register. */
977
978 set_gdbarch_read_fp (gdbarch, cfi_read_fp);
979
980 /* Discard from the stack the innermost frame, restoring all registers. */
981 set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
982
983 /* FRAME_CHAIN takes a frame's nominal address and produces the frame's
984 chain-pointer. */
985 set_gdbarch_frame_chain (gdbarch, cfi_frame_chain);
986
987 set_gdbarch_frameless_function_invocation (gdbarch,
988 x86_64_frameless_function_invocation);
989 set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
990
991 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
992 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
993
994 /* Return number of bytes at start of arglist that are not really args. */
995 set_gdbarch_frame_args_skip (gdbarch, 8);
996
997 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
998
999 /* Frame pc initialization is handled by unwind informations. */
1000 set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc);
1001
1002 /* Initialization of unwind informations. */
1003 set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
1004
1005 /* Getting saved registers is handled by unwind informations. */
1006 set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
1007
1008 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
1009
1010 /* Cons up virtual frame pointer for trace */
1011 set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
1012
1013
1014 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
1015
1016 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1017 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1018 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1019 set_gdbarch_call_dummy_length (gdbarch, 0);
1020 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1021 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1022 set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
1023 set_gdbarch_call_dummy_words (gdbarch, 0);
1024 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1025 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1026 set_gdbarch_call_dummy_p (gdbarch, 1);
1027 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1028 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1029 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1030 set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
1031 set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
1032
1033 /* Return number of args passed to a frame, no way to tell. */
1034 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1035 /* Don't use default structure extract routine */
1036 set_gdbarch_extract_struct_value_address (gdbarch, 0);
1037
1038 /* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
1039 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
1040 the case when structure is returned in registers. */
1041 set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
1042
1043 /* Store the address of the place in which to copy the structure the
1044 subroutine will return. This is called from call_function. */
1045 set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
1046
1047 /* Extract from an array REGBUF containing the (raw) register state
1048 a function return value of type TYPE, and copy that, in virtual format,
1049 into VALBUF. */
1050 set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value);
1051
1052
1053 /* Write into the appropriate registers a function return value stored
1054 in VALBUF of type TYPE, given in virtual format. */
1055 set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value);
1056 \f
1057
1058 /* Offset from address of function to start of its code. */
1059 set_gdbarch_function_start_offset (gdbarch, 0);
1060
1061 set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
1062
1063 set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
1064
1065 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1066
1067 set_gdbarch_breakpoint_from_pc (gdbarch,
1068 (gdbarch_breakpoint_from_pc_ftype *)
1069 x86_64_breakpoint_from_pc);
1070
1071
1072 /* Amount PC must be decremented by after a breakpoint. This is often the
1073 number of bytes in BREAKPOINT but not always. */
1074 set_gdbarch_decr_pc_after_break (gdbarch, 1);
1075
1076 /* Use dwarf2 debug frame informations. */
1077 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
1078 return gdbarch;
1079 }
1080
1081 void
1082 _initialize_x86_64_tdep (void)
1083 {
1084 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
1085
1086 /* Initialize the table saying where each register starts in the
1087 register file. */
1088 {
1089 int i, offset;
1090
1091 offset = 0;
1092 for (i = 0; i < X86_64_NUM_REGS; i++)
1093 {
1094 x86_64_register_byte_table[i] = offset;
1095 offset += x86_64_register_info_table[i].size;
1096 }
1097 }
1098
1099 tm_print_insn = gdb_print_insn_x86_64;
1100 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
1101
1102 /* Add the variable that controls the disassembly flavour. */
1103 {
1104 struct cmd_list_element *new_cmd;
1105
1106 new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
1107 valid_flavours, &disassembly_flavour, "\
1108 Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
1109 and the default value is \"att\".", &setlist);
1110 add_show_from_set (new_cmd, &showlist);
1111 }
1112 }
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