1 /* Target-dependent code for the x86-64 for GDB, the GNU debugger.
3 Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
28 #include "frame-base.h"
29 #include "frame-unwind.h"
37 #include "gdb_assert.h"
39 #include "x86-64-tdep.h"
40 #include "i387-tdep.h"
42 /* Register numbers of various important registers. */
44 #define X86_64_RAX_REGNUM 0 /* %rax */
45 #define X86_64_RDX_REGNUM 3 /* %rdx */
46 #define X86_64_RDI_REGNUM 5 /* %rdi */
47 #define X86_64_RBP_REGNUM 6 /* %rbp */
48 #define X86_64_RSP_REGNUM 7 /* %rsp */
49 #define X86_64_RIP_REGNUM 16 /* %rip */
50 #define X86_64_EFLAGS_REGNUM 17 /* %eflags */
51 #define X86_64_ST0_REGNUM 22 /* %st0 */
52 #define X86_64_XMM0_REGNUM 38 /* %xmm0 */
53 #define X86_64_XMM1_REGNUM 39 /* %xmm1 */
55 struct x86_64_register_info
61 static struct x86_64_register_info x86_64_register_info
[] =
63 { "rax", &builtin_type_int64
},
64 { "rbx", &builtin_type_int64
},
65 { "rcx", &builtin_type_int64
},
66 { "rdx", &builtin_type_int64
},
67 { "rsi", &builtin_type_int64
},
68 { "rdi", &builtin_type_int64
},
69 { "rbp", &builtin_type_void_data_ptr
},
70 { "rsp", &builtin_type_void_data_ptr
},
72 /* %r8 is indeed register number 8. */
73 { "r8", &builtin_type_int64
},
74 { "r9", &builtin_type_int64
},
75 { "r10", &builtin_type_int64
},
76 { "r11", &builtin_type_int64
},
77 { "r12", &builtin_type_int64
},
78 { "r13", &builtin_type_int64
},
79 { "r14", &builtin_type_int64
},
80 { "r15", &builtin_type_int64
},
81 { "rip", &builtin_type_void_func_ptr
},
82 { "eflags", &builtin_type_int32
},
83 { "ds", &builtin_type_int32
},
84 { "es", &builtin_type_int32
},
85 { "fs", &builtin_type_int32
},
86 { "gs", &builtin_type_int32
},
88 /* %st0 is register number 22. */
89 { "st0", &builtin_type_i387_ext
},
90 { "st1", &builtin_type_i387_ext
},
91 { "st2", &builtin_type_i387_ext
},
92 { "st3", &builtin_type_i387_ext
},
93 { "st4", &builtin_type_i387_ext
},
94 { "st5", &builtin_type_i387_ext
},
95 { "st6", &builtin_type_i387_ext
},
96 { "st7", &builtin_type_i387_ext
},
97 { "fctrl", &builtin_type_int32
},
98 { "fstat", &builtin_type_int32
},
99 { "ftag", &builtin_type_int32
},
100 { "fiseg", &builtin_type_int32
},
101 { "fioff", &builtin_type_int32
},
102 { "foseg", &builtin_type_int32
},
103 { "fooff", &builtin_type_int32
},
104 { "fop", &builtin_type_int32
},
106 /* %xmm0 is register number 38. */
107 { "xmm0", &builtin_type_v4sf
},
108 { "xmm1", &builtin_type_v4sf
},
109 { "xmm2", &builtin_type_v4sf
},
110 { "xmm3", &builtin_type_v4sf
},
111 { "xmm4", &builtin_type_v4sf
},
112 { "xmm5", &builtin_type_v4sf
},
113 { "xmm6", &builtin_type_v4sf
},
114 { "xmm7", &builtin_type_v4sf
},
115 { "xmm8", &builtin_type_v4sf
},
116 { "xmm9", &builtin_type_v4sf
},
117 { "xmm10", &builtin_type_v4sf
},
118 { "xmm11", &builtin_type_v4sf
},
119 { "xmm12", &builtin_type_v4sf
},
120 { "xmm13", &builtin_type_v4sf
},
121 { "xmm14", &builtin_type_v4sf
},
122 { "xmm15", &builtin_type_v4sf
},
123 { "mxcsr", &builtin_type_int32
}
126 /* Total number of registers. */
127 #define X86_64_NUM_REGS \
128 (sizeof (x86_64_register_info) / sizeof (x86_64_register_info[0]))
130 /* Return the name of register REGNUM. */
133 x86_64_register_name (int regnum
)
135 if (regnum
>= 0 && regnum
< X86_64_NUM_REGS
)
136 return x86_64_register_info
[regnum
].name
;
141 /* Return the GDB type object for the "standard" data type of data in
145 x86_64_register_type (struct gdbarch
*gdbarch
, int regnum
)
147 gdb_assert (regnum
>= 0 && regnum
< X86_64_NUM_REGS
);
149 return *x86_64_register_info
[regnum
].type
;
152 /* DWARF Register Number Mapping as defined in the System V psABI,
155 static int x86_64_dwarf_regmap
[] =
157 /* General Purpose Registers RAX, RDX, RCX, RBX, RSI, RDI. */
158 X86_64_RAX_REGNUM
, X86_64_RDX_REGNUM
, 3, 2,
159 4, X86_64_RDI_REGNUM
,
161 /* Frame Pointer Register RBP. */
164 /* Stack Pointer Register RSP. */
167 /* Extended Integer Registers 8 - 15. */
168 8, 9, 10, 11, 12, 13, 14, 15,
170 /* Return Address RA. Not mapped. */
173 /* SSE Registers 0 - 7. */
174 X86_64_XMM0_REGNUM
+ 0, X86_64_XMM1_REGNUM
,
175 X86_64_XMM0_REGNUM
+ 2, X86_64_XMM0_REGNUM
+ 3,
176 X86_64_XMM0_REGNUM
+ 4, X86_64_XMM0_REGNUM
+ 5,
177 X86_64_XMM0_REGNUM
+ 6, X86_64_XMM0_REGNUM
+ 7,
179 /* Extended SSE Registers 8 - 15. */
180 X86_64_XMM0_REGNUM
+ 8, X86_64_XMM0_REGNUM
+ 9,
181 X86_64_XMM0_REGNUM
+ 10, X86_64_XMM0_REGNUM
+ 11,
182 X86_64_XMM0_REGNUM
+ 12, X86_64_XMM0_REGNUM
+ 13,
183 X86_64_XMM0_REGNUM
+ 14, X86_64_XMM0_REGNUM
+ 15,
185 /* Floating Point Registers 0-7. */
186 X86_64_ST0_REGNUM
+ 0, X86_64_ST0_REGNUM
+ 1,
187 X86_64_ST0_REGNUM
+ 2, X86_64_ST0_REGNUM
+ 3,
188 X86_64_ST0_REGNUM
+ 4, X86_64_ST0_REGNUM
+ 5,
189 X86_64_ST0_REGNUM
+ 6, X86_64_ST0_REGNUM
+ 7
192 static const int x86_64_dwarf_regmap_len
=
193 (sizeof (x86_64_dwarf_regmap
) / sizeof (x86_64_dwarf_regmap
[0]));
195 /* Convert DWARF register number REG to the appropriate register
196 number used by GDB. */
199 x86_64_dwarf_reg_to_regnum (int reg
)
203 if (reg
>= 0 || reg
< x86_64_dwarf_regmap_len
)
204 regnum
= x86_64_dwarf_regmap
[reg
];
207 warning ("Unmapped DWARF Register #%d encountered\n", reg
);
213 /* The returning of values is done according to the special algorithm.
214 Some types are returned in registers an some (big structures) in
215 memory. See the System V psABI for details. */
217 #define MAX_CLASSES 4
219 enum x86_64_reg_class
222 X86_64_INTEGER_CLASS
,
223 X86_64_INTEGERSI_CLASS
,
233 /* Return the union class of CLASS1 and CLASS2.
234 See the System V psABI for details. */
236 static enum x86_64_reg_class
237 merge_classes (enum x86_64_reg_class class1
, enum x86_64_reg_class class2
)
239 /* Rule (a): If both classes are equal, this is the resulting class. */
240 if (class1
== class2
)
243 /* Rule (b): If one of the classes is NO_CLASS, the resulting class
244 is the other class. */
245 if (class1
== X86_64_NO_CLASS
)
247 if (class2
== X86_64_NO_CLASS
)
250 /* Rule (c): If one of the classes is MEMORY, the result is MEMORY. */
251 if (class1
== X86_64_MEMORY_CLASS
|| class2
== X86_64_MEMORY_CLASS
)
252 return X86_64_MEMORY_CLASS
;
254 /* Rule (d): If one of the classes is INTEGER, the result is INTEGER. */
255 if ((class1
== X86_64_INTEGERSI_CLASS
&& class2
== X86_64_SSESF_CLASS
)
256 || (class2
== X86_64_INTEGERSI_CLASS
&& class1
== X86_64_SSESF_CLASS
))
257 return X86_64_INTEGERSI_CLASS
;
258 if (class1
== X86_64_INTEGER_CLASS
|| class1
== X86_64_INTEGERSI_CLASS
259 || class2
== X86_64_INTEGER_CLASS
|| class2
== X86_64_INTEGERSI_CLASS
)
260 return X86_64_INTEGER_CLASS
;
262 /* Rule (e): If one of the classes is X87 or X87UP class, MEMORY is
264 if (class1
== X86_64_X87_CLASS
|| class1
== X86_64_X87UP_CLASS
265 || class2
== X86_64_X87_CLASS
|| class2
== X86_64_X87UP_CLASS
)
266 return X86_64_MEMORY_CLASS
;
268 /* Rule (f): Otherwise class SSE is used. */
269 return X86_64_SSE_CLASS
;
272 /* Classify the argument type. CLASSES will be filled by the register
273 class used to pass each word of the operand. The number of words
274 is returned. In case the parameter should be passed in memory, 0
275 is returned. As a special case for zero sized containers,
276 classes[0] will be NO_CLASS and 1 is returned.
278 See the System V psABI for details. */
281 classify_argument (struct type
*type
,
282 enum x86_64_reg_class classes
[MAX_CLASSES
], int bit_offset
)
284 int bytes
= TYPE_LENGTH (type
);
285 int words
= (bytes
+ 8 - 1) / 8;
287 switch (TYPE_CODE (type
))
289 case TYPE_CODE_ARRAY
:
290 case TYPE_CODE_STRUCT
:
291 case TYPE_CODE_UNION
:
294 enum x86_64_reg_class subclasses
[MAX_CLASSES
];
296 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
300 for (i
= 0; i
< words
; i
++)
301 classes
[i
] = X86_64_NO_CLASS
;
303 /* Zero sized arrays or structures are NO_CLASS. We return 0
304 to signalize memory class, so handle it as special case. */
307 classes
[0] = X86_64_NO_CLASS
;
310 switch (TYPE_CODE (type
))
312 case TYPE_CODE_STRUCT
:
315 for (j
= 0; j
< TYPE_NFIELDS (type
); ++j
)
317 int num
= classify_argument (TYPE_FIELDS (type
)[j
].type
,
319 (TYPE_FIELDS (type
)[j
].loc
.
320 bitpos
+ bit_offset
) % 256);
323 for (i
= 0; i
< num
; i
++)
326 (TYPE_FIELDS (type
)[j
].loc
.bitpos
+
329 merge_classes (subclasses
[i
], classes
[i
+ pos
]);
334 case TYPE_CODE_ARRAY
:
338 num
= classify_argument (TYPE_TARGET_TYPE (type
),
339 subclasses
, bit_offset
);
343 /* The partial classes are now full classes. */
344 if (subclasses
[0] == X86_64_SSESF_CLASS
&& bytes
!= 4)
345 subclasses
[0] = X86_64_SSE_CLASS
;
346 if (subclasses
[0] == X86_64_INTEGERSI_CLASS
&& bytes
!= 4)
347 subclasses
[0] = X86_64_INTEGER_CLASS
;
349 for (i
= 0; i
< words
; i
++)
350 classes
[i
] = subclasses
[i
% num
];
353 case TYPE_CODE_UNION
:
357 for (j
= 0; j
< TYPE_NFIELDS (type
); ++j
)
360 num
= classify_argument (TYPE_FIELDS (type
)[j
].type
,
361 subclasses
, bit_offset
);
364 for (i
= 0; i
< num
; i
++)
365 classes
[i
] = merge_classes (subclasses
[i
], classes
[i
]);
373 /* Final merger cleanup. */
374 for (i
= 0; i
< words
; i
++)
376 /* If one class is MEMORY, everything should be passed in
378 if (classes
[i
] == X86_64_MEMORY_CLASS
)
381 /* The X86_64_SSEUP_CLASS should be always preceeded by
383 if (classes
[i
] == X86_64_SSEUP_CLASS
384 && (i
== 0 || classes
[i
- 1] != X86_64_SSE_CLASS
))
385 classes
[i
] = X86_64_SSE_CLASS
;
387 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
388 if (classes
[i
] == X86_64_X87UP_CLASS
389 && (i
== 0 || classes
[i
- 1] != X86_64_X87_CLASS
))
390 classes
[i
] = X86_64_SSE_CLASS
;
399 if (!(bit_offset
% 64))
400 classes
[0] = X86_64_SSESF_CLASS
;
402 classes
[0] = X86_64_SSE_CLASS
;
405 classes
[0] = X86_64_SSEDF_CLASS
;
408 classes
[0] = X86_64_X87_CLASS
;
409 classes
[1] = X86_64_X87UP_CLASS
;
423 if (bytes
* 8 + bit_offset
<= 32)
424 classes
[0] = X86_64_INTEGERSI_CLASS
;
426 classes
[0] = X86_64_INTEGER_CLASS
;
429 classes
[0] = classes
[1] = X86_64_INTEGER_CLASS
;
436 default: /* Avoid warning. */
439 internal_error (__FILE__
, __LINE__
,
440 "classify_argument: unknown argument type");
443 /* Examine the argument and set *INT_NREGS and *SSE_NREGS to the
444 number of registers required based on the information passed in
445 CLASSES. Return 0 if parameter should be passed in memory. */
448 examine_argument (enum x86_64_reg_class classes
[MAX_CLASSES
],
449 int n
, int *int_nregs
, int *sse_nregs
)
455 for (n
--; n
>= 0; n
--)
458 case X86_64_INTEGER_CLASS
:
459 case X86_64_INTEGERSI_CLASS
:
462 case X86_64_SSE_CLASS
:
463 case X86_64_SSESF_CLASS
:
464 case X86_64_SSEDF_CLASS
:
467 case X86_64_NO_CLASS
:
468 case X86_64_SSEUP_CLASS
:
469 case X86_64_X87_CLASS
:
470 case X86_64_X87UP_CLASS
:
472 case X86_64_MEMORY_CLASS
:
473 internal_error (__FILE__
, __LINE__
,
474 "examine_argument: unexpected memory class");
479 #define RET_INT_REGS 2
480 #define RET_SSE_REGS 2
482 /* Check if the structure in value_type is returned in registers or in
483 memory. If this function returns 1, GDB will call
484 STORE_STRUCT_RETURN and EXTRACT_STRUCT_VALUE_ADDRESS else
485 STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE will be used. */
488 x86_64_use_struct_convention (int gcc_p
, struct type
*value_type
)
490 enum x86_64_reg_class
class[MAX_CLASSES
];
491 int n
= classify_argument (value_type
, class, 0);
496 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
) ||
497 needed_intregs
> RET_INT_REGS
|| needed_sseregs
> RET_SSE_REGS
);
500 /* Extract from an array REGBUF containing the (raw) register state, a
501 function return value of TYPE, and copy that, in virtual format,
505 x86_64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
508 enum x86_64_reg_class
class[MAX_CLASSES
];
509 int n
= classify_argument (type
, class, 0);
515 int ret_int_r
[RET_INT_REGS
] = { X86_64_RAX_REGNUM
, X86_64_RDX_REGNUM
};
516 int ret_sse_r
[RET_SSE_REGS
] = { X86_64_XMM0_REGNUM
, X86_64_XMM1_REGNUM
};
519 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
) ||
520 needed_intregs
> RET_INT_REGS
|| needed_sseregs
> RET_SSE_REGS
)
523 regcache_cooked_read (regcache
, X86_64_RAX_REGNUM
, &addr
);
524 read_memory (addr
, valbuf
, TYPE_LENGTH (type
));
530 for (i
= 0; i
< n
; i
++)
534 case X86_64_NO_CLASS
:
536 case X86_64_INTEGER_CLASS
:
537 regcache_cooked_read (regcache
, ret_int_r
[(intreg
+ 1) / 2],
538 (char *) valbuf
+ offset
);
542 case X86_64_INTEGERSI_CLASS
:
543 regcache_cooked_read_part (regcache
, ret_int_r
[intreg
/ 2],
544 0, 4, (char *) valbuf
+ offset
);
548 case X86_64_SSEDF_CLASS
:
549 case X86_64_SSESF_CLASS
:
550 case X86_64_SSE_CLASS
:
551 regcache_cooked_read_part (regcache
,
552 ret_sse_r
[(ssereg
+ 1) / 2], 0, 8,
553 (char *) valbuf
+ offset
);
557 case X86_64_SSEUP_CLASS
:
558 regcache_cooked_read_part (regcache
, ret_sse_r
[ssereg
/ 2],
559 0, 8, (char *) valbuf
+ offset
);
563 case X86_64_X87_CLASS
:
564 regcache_cooked_read_part (regcache
, X86_64_ST0_REGNUM
,
565 0, 8, (char *) valbuf
+ offset
);
568 case X86_64_X87UP_CLASS
:
569 regcache_cooked_read_part (regcache
, X86_64_ST0_REGNUM
,
570 8, 2, (char *) valbuf
+ offset
);
573 case X86_64_MEMORY_CLASS
:
575 internal_error (__FILE__
, __LINE__
,
576 "Unexpected argument class");
586 x86_64_push_arguments (struct regcache
*regcache
, int nargs
,
587 struct value
**args
, CORE_ADDR sp
)
592 static int int_parameter_registers
[INT_REGS
] =
594 X86_64_RDI_REGNUM
, 4, /* %rdi, %rsi */
595 X86_64_RDX_REGNUM
, 2, /* %rdx, %rcx */
599 static int sse_parameter_registers
[SSE_REGS
] =
601 X86_64_XMM0_REGNUM
+ 0, X86_64_XMM1_REGNUM
,
602 X86_64_XMM0_REGNUM
+ 2, X86_64_XMM0_REGNUM
+ 3,
603 X86_64_XMM0_REGNUM
+ 4, X86_64_XMM0_REGNUM
+ 5,
604 X86_64_XMM0_REGNUM
+ 6, X86_64_XMM0_REGNUM
+ 7,
606 int stack_values_count
= 0;
608 stack_values
= alloca (nargs
* sizeof (int));
609 for (i
= 0; i
< nargs
; i
++)
611 enum x86_64_reg_class
class[MAX_CLASSES
];
612 int n
= classify_argument (args
[i
]->type
, class, 0);
617 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
)
618 || intreg
/ 2 + needed_intregs
> INT_REGS
619 || ssereg
/ 2 + needed_sseregs
> SSE_REGS
)
621 stack_values
[stack_values_count
++] = i
;
626 for (j
= 0; j
< n
; j
++)
631 case X86_64_NO_CLASS
:
633 case X86_64_INTEGER_CLASS
:
634 regcache_cooked_write
635 (regcache
, int_parameter_registers
[(intreg
+ 1) / 2],
636 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
640 case X86_64_INTEGERSI_CLASS
:
642 LONGEST val
= extract_signed_integer
643 (VALUE_CONTENTS_ALL (args
[i
]) + offset
, 4);
644 regcache_cooked_write_signed
645 (regcache
, int_parameter_registers
[intreg
/ 2], val
);
651 case X86_64_SSEDF_CLASS
:
652 case X86_64_SSESF_CLASS
:
653 case X86_64_SSE_CLASS
:
654 regcache_cooked_write
655 (regcache
, sse_parameter_registers
[(ssereg
+ 1) / 2],
656 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
660 case X86_64_SSEUP_CLASS
:
661 regcache_cooked_write
662 (regcache
, sse_parameter_registers
[ssereg
/ 2],
663 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
667 case X86_64_X87_CLASS
:
668 case X86_64_MEMORY_CLASS
:
669 stack_values
[stack_values_count
++] = i
;
671 case X86_64_X87UP_CLASS
:
674 internal_error (__FILE__
, __LINE__
,
675 "Unexpected argument class");
677 intreg
+= intreg
% 2;
678 ssereg
+= ssereg
% 2;
683 /* Push any remaining arguments onto the stack. */
684 while (--stack_values_count
>= 0)
686 struct value
*arg
= args
[stack_values
[stack_values_count
]];
687 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg
));
689 /* Make sure the stack stays eightbyte-aligned. */
690 sp
-= (len
+ 7) & ~7;
691 write_memory (sp
, VALUE_CONTENTS_ALL (arg
), len
);
697 /* Write into the appropriate registers a function return value stored
698 in VALBUF of type TYPE, given in virtual format. */
701 x86_64_store_return_value (struct type
*type
, struct regcache
*regcache
,
704 int len
= TYPE_LENGTH (type
);
706 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
709 char buf
[FPU_REG_RAW_SIZE
];
711 /* Returning floating-point values is a bit tricky. Apart from
712 storing the return value in %st(0), we have to simulate the
713 state of the FPU at function return point. */
715 /* Convert the value found in VALBUF to the extended
716 floating-point format used by the FPU. This is probably
717 not exactly how it would happen on the target itself, but
718 it is the best we can do. */
719 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
720 regcache_raw_write (regcache
, X86_64_ST0_REGNUM
, buf
);
722 /* Set the top of the floating-point register stack to 7. The
723 actual value doesn't really matter, but 7 is what a normal
724 function return would end up with if the program started out
725 with a freshly initialized FPU. */
726 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
728 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
730 /* Mark %st(1) through %st(7) as empty. Since we set the top of
731 the floating-point register stack to 7, the appropriate value
732 for the tag word is 0x3fff. */
733 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
737 int low_size
= REGISTER_RAW_SIZE (0);
738 int high_size
= REGISTER_RAW_SIZE (1);
741 regcache_cooked_write_part (regcache
, 0, 0, len
, valbuf
);
742 else if (len
<= (low_size
+ high_size
))
744 regcache_cooked_write_part (regcache
, 0, 0, low_size
, valbuf
);
745 regcache_cooked_write_part (regcache
, 1, 0,
747 (const char *) valbuf
+ low_size
);
750 internal_error (__FILE__
, __LINE__
,
751 "Cannot store return value of %d bytes long.", len
);
757 x86_64_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
758 struct regcache
*regcache
, CORE_ADDR bp_addr
,
759 int nargs
, struct value
**args
, CORE_ADDR sp
,
760 int struct_return
, CORE_ADDR struct_addr
)
764 /* Pass arguments. */
765 sp
= x86_64_push_arguments (regcache
, nargs
, args
, sp
);
767 /* Pass "hidden" argument". */
770 store_unsigned_integer (buf
, 8, struct_addr
);
771 regcache_cooked_write (regcache
, X86_64_RDI_REGNUM
, buf
);
774 /* Store return address. */
776 store_unsigned_integer (buf
, 8, bp_addr
);
777 write_memory (sp
, buf
, 8);
779 /* Finally, update the stack pointer... */
780 store_unsigned_integer (buf
, 8, sp
);
781 regcache_cooked_write (regcache
, X86_64_RSP_REGNUM
, buf
);
783 /* ...and fake a frame pointer. */
784 regcache_cooked_write (regcache
, X86_64_RBP_REGNUM
, buf
);
790 /* The maximum number of saved registers. This should include %rip. */
791 #define X86_64_NUM_SAVED_REGS X86_64_NUM_GREGS
793 struct x86_64_frame_cache
800 /* Saved registers. */
801 CORE_ADDR saved_regs
[X86_64_NUM_SAVED_REGS
];
804 /* Do we have a frame? */
808 /* Allocate and initialize a frame cache. */
810 static struct x86_64_frame_cache
*
811 x86_64_alloc_frame_cache (void)
813 struct x86_64_frame_cache
*cache
;
816 cache
= FRAME_OBSTACK_ZALLOC (struct x86_64_frame_cache
);
820 cache
->sp_offset
= -8;
823 /* Saved registers. We initialize these to -1 since zero is a valid
824 offset (that's where %rbp is supposed to be stored). */
825 for (i
= 0; i
< X86_64_NUM_SAVED_REGS
; i
++)
826 cache
->saved_regs
[i
] = -1;
829 /* Frameless until proven otherwise. */
830 cache
->frameless_p
= 1;
835 /* Do a limited analysis of the prologue at PC and update CACHE
836 accordingly. Bail out early if CURRENT_PC is reached. Return the
837 address where the analysis stopped.
839 We will handle only functions beginning with:
842 movq %rsp, %rbp 0x48 0x89 0xe5
844 Any function that doesn't start with this sequence will be assumed
845 to have no prologue and thus no valid frame pointer in %rbp. */
848 x86_64_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
849 struct x86_64_frame_cache
*cache
)
851 static unsigned char proto
[3] = { 0x48, 0x89, 0xe5 };
852 unsigned char buf
[3];
855 if (current_pc
<= pc
)
858 op
= read_memory_unsigned_integer (pc
, 1);
860 if (op
== 0x55) /* pushq %rbp */
862 /* Take into account that we've executed the `pushq %rbp' that
863 starts this instruction sequence. */
864 cache
->saved_regs
[X86_64_RBP_REGNUM
] = 0;
865 cache
->sp_offset
+= 8;
867 /* If that's all, return now. */
868 if (current_pc
<= pc
+ 1)
871 /* Check for `movq %rsp, %rbp'. */
872 read_memory (pc
+ 1, buf
, 3);
873 if (memcmp (buf
, proto
, 3) != 0)
876 /* OK, we actually have a frame. */
877 cache
->frameless_p
= 0;
884 /* Return PC of first real instruction. */
887 x86_64_skip_prologue (CORE_ADDR start_pc
)
889 struct x86_64_frame_cache cache
;
892 pc
= x86_64_analyze_prologue (start_pc
, 0xffffffffffffffff, &cache
);
893 if (cache
.frameless_p
)
902 static struct x86_64_frame_cache
*
903 x86_64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
905 struct x86_64_frame_cache
*cache
;
912 cache
= x86_64_alloc_frame_cache ();
915 frame_unwind_register (next_frame
, X86_64_RBP_REGNUM
, buf
);
916 cache
->base
= extract_unsigned_integer (buf
, 8);
917 if (cache
->base
== 0)
920 /* For normal frames, %rip is stored at 8(%rbp). */
921 cache
->saved_regs
[X86_64_RIP_REGNUM
] = 8;
923 cache
->pc
= frame_func_unwind (next_frame
);
925 x86_64_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
927 if (cache
->frameless_p
)
929 /* We didn't find a valid frame, which means that CACHE->base
930 currently holds the frame pointer for our calling frame. If
931 we're at the start of a function, or somewhere half-way its
932 prologue, the function's frame probably hasn't been fully
933 setup yet. Try to reconstruct the base address for the stack
934 frame by looking at the stack pointer. For truly "frameless"
935 functions this might work too. */
937 frame_unwind_register (next_frame
, X86_64_RSP_REGNUM
, buf
);
938 cache
->base
= extract_unsigned_integer (buf
, 8) + cache
->sp_offset
;
941 /* Now that we have the base address for the stack frame we can
942 calculate the value of %rsp in the calling frame. */
943 cache
->saved_sp
= cache
->base
+ 16;
945 /* Adjust all the saved registers such that they contain addresses
946 instead of offsets. */
947 for (i
= 0; i
< X86_64_NUM_SAVED_REGS
; i
++)
948 if (cache
->saved_regs
[i
] != -1)
949 cache
->saved_regs
[i
] += cache
->base
;
955 x86_64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
956 struct frame_id
*this_id
)
958 struct x86_64_frame_cache
*cache
=
959 x86_64_frame_cache (next_frame
, this_cache
);
961 /* This marks the outermost frame. */
962 if (cache
->base
== 0)
965 (*this_id
) = frame_id_build (cache
->base
+ 16, cache
->pc
);
969 x86_64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
970 int regnum
, int *optimizedp
,
971 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
972 int *realnump
, void *valuep
)
974 struct x86_64_frame_cache
*cache
=
975 x86_64_frame_cache (next_frame
, this_cache
);
977 gdb_assert (regnum
>= 0);
979 if (regnum
== SP_REGNUM
&& cache
->saved_sp
)
987 /* Store the value. */
988 store_unsigned_integer (valuep
, 8, cache
->saved_sp
);
993 if (regnum
< X86_64_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
996 *lvalp
= lval_memory
;
997 *addrp
= cache
->saved_regs
[regnum
];
1001 /* Read the value in from memory. */
1002 read_memory (*addrp
, valuep
,
1003 register_size (current_gdbarch
, regnum
));
1008 frame_register_unwind (next_frame
, regnum
,
1009 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1012 static const struct frame_unwind x86_64_frame_unwind
=
1015 x86_64_frame_this_id
,
1016 x86_64_frame_prev_register
1019 static const struct frame_unwind
*
1020 x86_64_frame_p (CORE_ADDR pc
)
1022 return &x86_64_frame_unwind
;
1026 /* Signal trampolines. */
1028 /* FIXME: kettenis/20030419: Perhaps, we can unify the 32-bit and
1029 64-bit variants. This would require using identical frame caches
1030 on both platforms. */
1032 static struct x86_64_frame_cache
*
1033 x86_64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1035 struct x86_64_frame_cache
*cache
;
1036 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1044 cache
= x86_64_alloc_frame_cache ();
1046 frame_unwind_register (next_frame
, X86_64_RSP_REGNUM
, buf
);
1047 cache
->base
= extract_unsigned_integer (buf
, 8) - 8;
1049 addr
= tdep
->sigcontext_addr (next_frame
);
1050 gdb_assert (tdep
->sc_reg_offset
);
1051 gdb_assert (tdep
->sc_num_regs
<= X86_64_NUM_SAVED_REGS
);
1052 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1053 if (tdep
->sc_reg_offset
[i
] != -1)
1054 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1056 *this_cache
= cache
;
1061 x86_64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1062 void **this_cache
, struct frame_id
*this_id
)
1064 struct x86_64_frame_cache
*cache
=
1065 x86_64_sigtramp_frame_cache (next_frame
, this_cache
);
1067 (*this_id
) = frame_id_build (cache
->base
+ 16, frame_pc_unwind (next_frame
));
1071 x86_64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1073 int regnum
, int *optimizedp
,
1074 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1075 int *realnump
, void *valuep
)
1077 /* Make sure we've initialized the cache. */
1078 x86_64_sigtramp_frame_cache (next_frame
, this_cache
);
1080 x86_64_frame_prev_register (next_frame
, this_cache
, regnum
,
1081 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1084 static const struct frame_unwind x86_64_sigtramp_frame_unwind
=
1087 x86_64_sigtramp_frame_this_id
,
1088 x86_64_sigtramp_frame_prev_register
1091 static const struct frame_unwind
*
1092 x86_64_sigtramp_frame_p (CORE_ADDR pc
)
1096 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1097 if (PC_IN_SIGTRAMP (pc
, name
))
1099 gdb_assert (gdbarch_tdep (current_gdbarch
)->sigcontext_addr
);
1101 return &x86_64_sigtramp_frame_unwind
;
1109 x86_64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1111 struct x86_64_frame_cache
*cache
=
1112 x86_64_frame_cache (next_frame
, this_cache
);
1117 static const struct frame_base x86_64_frame_base
=
1119 &x86_64_frame_unwind
,
1120 x86_64_frame_base_address
,
1121 x86_64_frame_base_address
,
1122 x86_64_frame_base_address
1126 x86_64_save_dummy_frame_tos (CORE_ADDR sp
)
1128 generic_save_dummy_frame_tos (sp
+ 16);
1131 static struct frame_id
1132 x86_64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1137 frame_unwind_register (next_frame
, X86_64_RBP_REGNUM
, buf
);
1138 fp
= extract_unsigned_integer (buf
, 8);
1140 return frame_id_build (fp
+ 16, frame_pc_unwind (next_frame
));
1144 x86_64_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1146 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1148 /* The x86-64 has 16 SSE registers. */
1149 tdep
->num_xmm_regs
= 16;
1151 /* This is what all the fuss is about. */
1152 set_gdbarch_long_bit (gdbarch
, 64);
1153 set_gdbarch_long_long_bit (gdbarch
, 64);
1154 set_gdbarch_ptr_bit (gdbarch
, 64);
1156 /* In contrast to the i386, on the x86-64 a `long double' actually
1157 takes up 128 bits, even though it's still based on the i387
1158 extended floating-point format which has only 80 significant bits. */
1159 set_gdbarch_long_double_bit (gdbarch
, 128);
1161 set_gdbarch_num_regs (gdbarch
, X86_64_NUM_REGS
);
1162 set_gdbarch_register_name (gdbarch
, x86_64_register_name
);
1163 set_gdbarch_register_type (gdbarch
, x86_64_register_type
);
1165 /* Register numbers of various important registers. */
1166 set_gdbarch_sp_regnum (gdbarch
, X86_64_RSP_REGNUM
); /* %rsp */
1167 set_gdbarch_pc_regnum (gdbarch
, X86_64_RIP_REGNUM
); /* %rip */
1168 set_gdbarch_ps_regnum (gdbarch
, X86_64_EFLAGS_REGNUM
); /* %eflags */
1169 set_gdbarch_fp0_regnum (gdbarch
, X86_64_ST0_REGNUM
); /* %st(0) */
1171 /* The "default" register numbering scheme for the x86-64 is
1172 referred to as the "DWARF Register Number Mapping" in the System
1173 V psABI. The preferred debugging format for all known x86-64
1174 targets is actually DWARF2, and GCC doesn't seem to support DWARF
1175 (that is DWARF-1), but we provide the same mapping just in case.
1176 This mapping is also used for stabs, which GCC does support. */
1177 set_gdbarch_stab_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1178 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1179 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1181 /* We don't override SDB_REG_RO_REGNUM, since COFF doesn't seem to
1182 be in use on any of the supported x86-64 targets. */
1184 /* Call dummy code. */
1185 set_gdbarch_push_dummy_call (gdbarch
, x86_64_push_dummy_call
);
1187 set_gdbarch_extract_return_value (gdbarch
, x86_64_extract_return_value
);
1188 set_gdbarch_store_return_value (gdbarch
, x86_64_store_return_value
);
1189 /* Override, since this is handled by x86_64_extract_return_value. */
1190 set_gdbarch_extract_struct_value_address (gdbarch
, NULL
);
1191 set_gdbarch_use_struct_convention (gdbarch
, x86_64_use_struct_convention
);
1193 set_gdbarch_skip_prologue (gdbarch
, x86_64_skip_prologue
);
1195 /* Avoid wiring in the MMX registers for now. */
1196 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
1198 set_gdbarch_unwind_dummy_id (gdbarch
, x86_64_unwind_dummy_id
);
1199 set_gdbarch_save_dummy_frame_tos (gdbarch
, x86_64_save_dummy_frame_tos
);
1201 /* FIXME: kettenis/20021026: This is ELF-specific. Fine for now,
1202 since all supported x86-64 targets are ELF, but that might change
1204 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1206 frame_unwind_append_predicate (gdbarch
, x86_64_sigtramp_frame_p
);
1207 frame_unwind_append_predicate (gdbarch
, x86_64_frame_p
);
1208 frame_base_set_default (gdbarch
, &x86_64_frame_base
);
1212 #define I387_FISEG_REGNUM FISEG_REGNUM
1213 #define I387_FOSEG_REGNUM FOSEG_REGNUM
1215 /* The 64-bit FXSAVE format differs from the 32-bit format in the
1216 sense that the instruction pointer and data pointer are simply
1217 64-bit offsets into the code segment and the data segment instead
1218 of a selector offset pair. The functions below store the upper 32
1219 bits of these pointers (instead of just the 16-bits of the segment
1222 /* Fill GDB's register array with the floating-point and SSE register
1223 values in *FXSAVE. This function masks off any of the reserved
1227 x86_64_supply_fxsave (char *fxsave
)
1229 i387_supply_fxsave (fxsave
);
1233 supply_register (I387_FISEG_REGNUM
, fxsave
+ 12);
1234 supply_register (I387_FOSEG_REGNUM
, fxsave
+ 20);
1238 /* Fill register REGNUM (if it is a floating-point or SSE register) in
1239 *FXSAVE with the value in GDB's register array. If REGNUM is -1, do
1240 this for all registers. This function doesn't touch any of the
1241 reserved bits in *FXSAVE. */
1244 x86_64_fill_fxsave (char *fxsave
, int regnum
)
1246 i387_fill_fxsave (fxsave
, regnum
);
1248 if (regnum
== -1 || regnum
== I387_FISEG_REGNUM
)
1249 regcache_collect (regnum
, fxsave
+ 12);
1250 if (regnum
== -1 || regnum
== I387_FOSEG_REGNUM
)
1251 regcache_collect (regnum
, fxsave
+ 20);