* config/i386/x86-64linux.mh: New file.
[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c
1 /* Target-dependent code for the x86-64 for GDB, the GNU debugger.
2 Copyright 2001
3 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "inferior.h"
25 #include "gdbcore.h"
26 #include "gdbcmd.h"
27 #include "arch-utils.h"
28 #include "regcache.h"
29 #include "symfile.h"
30 #include "x86-64-tdep.h"
31 #include "dwarf2cfi.h"
32
33
34 /* Register numbers of various important registers. */
35 #define RAX_REGNUM 0
36 #define RDX_REGNUM 1
37 #define RDI_REGNUM 5
38 #define EFLAGS_REGNUM 17
39 #define XMM1_REGNUM 35
40
41 /* x86_64_register_raw_size_table[i] is the number of bytes of storage in
42 GDB's register array occupied by register i. */
43 int x86_64_register_raw_size_table[X86_64_NUM_REGS] = {
44 8, 8, 8, 8,
45 8, 8, 8, 8,
46 8, 8, 8, 8,
47 8, 8, 8, 8,
48 8, 4,
49 10, 10, 10, 10,
50 10, 10, 10, 10,
51 4, 4, 4, 4,
52 4, 4, 4, 4,
53 16, 16, 16, 16,
54 16, 16, 16, 16,
55 16, 16, 16, 16,
56 16, 16, 16, 16,
57 4
58 };
59
60 /* Number of bytes of storage in the actual machine representation for
61 register REGNO. */
62 int
63 x86_64_register_raw_size (int regno)
64 {
65 return x86_64_register_raw_size_table[regno];
66 }
67
68 /* x86_64_register_byte_table[i] is the offset into the register file of the
69 start of register number i. We initialize this from
70 x86_64_register_raw_size_table. */
71 int x86_64_register_byte_table[X86_64_NUM_REGS];
72
73 /* Index within `registers' of the first byte of the space for register REGNO. */
74 int
75 x86_64_register_byte (int regno)
76 {
77 return x86_64_register_byte_table[regno];
78 }
79
80 /* Return the GDB type object for the "standard" data type of data in
81 register N. */
82 static struct type *
83 x86_64_register_virtual_type (int regno)
84 {
85 if (regno == PC_REGNUM || regno == SP_REGNUM)
86 return lookup_pointer_type (builtin_type_void);
87 if (IS_FP_REGNUM (regno))
88 return builtin_type_long_double;
89 if (IS_SSE_REGNUM (regno))
90 return builtin_type_v4sf;
91 if (IS_FPU_CTRL_REGNUM (regno) || regno == MXCSR_REGNUM
92 || regno == EFLAGS_REGNUM)
93 return builtin_type_int;
94 return builtin_type_long;
95 }
96
97 /* Number of bytes of storage in the program's representation
98 for register REGNO. */
99 int
100 x86_64_register_virtual_size (int regno)
101 {
102 return (TYPE_LENGTH (x86_64_register_virtual_type (regno)));
103 }
104
105 /* x86_64_register_convertible is true if register N's virtual format is
106 different from its raw format. Note that this definition assumes
107 that the host supports IEEE 32-bit floats, since it doesn't say
108 that SSE registers need conversion. Even if we can't find a
109 counterexample, this is still sloppy. */
110 int
111 x86_64_register_convertible (int regno)
112 {
113 return IS_FP_REGNUM (regno);
114 }
115
116 /* Convert data from raw format for register REGNUM in buffer FROM to
117 virtual format with type TYPE in buffer TO. In principle both
118 formats are identical except that the virtual format has two extra
119 bytes appended that aren't used. We set these to zero. */
120 void
121 x86_64_register_convert_to_virtual (int regnum, struct type *type,
122 char *from, char *to)
123 {
124 /* Copy straight over, but take care of the padding. */
125 memcpy (to, from, FPU_REG_RAW_SIZE);
126 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
127 }
128
129 /* Convert data from virtual format with type TYPE in buffer FROM to
130 raw format for register REGNUM in buffer TO. Simply omit the two
131 unused bytes. */
132
133 void
134 x86_64_register_convert_to_raw (struct type *type, int regnum,
135 char *from, char *to)
136 {
137 memcpy (to, from, FPU_REG_RAW_SIZE);
138 }
139 \f
140
141 /* This is the variable that is set with "set disassembly-flavour", and
142 its legitimate values. */
143 static const char att_flavour[] = "att";
144 static const char intel_flavour[] = "intel";
145 static const char *valid_flavours[] = {
146 att_flavour,
147 intel_flavour,
148 NULL
149 };
150 static const char *disassembly_flavour = att_flavour;
151
152 static CORE_ADDR
153 x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
154 {
155 char buf[8];
156
157 store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
158
159 write_memory (sp - 8, buf, 8);
160 return sp - 8;
161 }
162
163 void
164 x86_64_pop_frame (void)
165 {
166 generic_pop_current_frame (cfi_pop_frame);
167 }
168 \f
169
170 /* The returning of values is done according to the special algorithm.
171 Some types are returned in registers an some (big structures) in memory.
172 See ABI for details.
173 */
174
175 #define MAX_CLASSES 4
176
177 enum x86_64_reg_class
178 {
179 X86_64_NO_CLASS,
180 X86_64_INTEGER_CLASS,
181 X86_64_INTEGERSI_CLASS,
182 X86_64_SSE_CLASS,
183 X86_64_SSESF_CLASS,
184 X86_64_SSEDF_CLASS,
185 X86_64_SSEUP_CLASS,
186 X86_64_X87_CLASS,
187 X86_64_X87UP_CLASS,
188 X86_64_MEMORY_CLASS
189 };
190
191 /* Return the union class of CLASS1 and CLASS2.
192 See the x86-64 ABI for details. */
193
194 static enum x86_64_reg_class
195 merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
196 {
197 /* Rule #1: If both classes are equal, this is the resulting class. */
198 if (class1 == class2)
199 return class1;
200
201 /* Rule #2: If one of the classes is NO_CLASS, the resulting class is
202 the other class. */
203 if (class1 == X86_64_NO_CLASS)
204 return class2;
205 if (class2 == X86_64_NO_CLASS)
206 return class1;
207
208 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
209 if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
210 return X86_64_MEMORY_CLASS;
211
212 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
213 if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
214 || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
215 return X86_64_INTEGERSI_CLASS;
216 if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
217 || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
218 return X86_64_INTEGER_CLASS;
219
220 /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
221 if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
222 || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
223 return X86_64_MEMORY_CLASS;
224
225 /* Rule #6: Otherwise class SSE is used. */
226 return X86_64_SSE_CLASS;
227 }
228
229
230 /* Classify the argument type.
231 CLASSES will be filled by the register class used to pass each word
232 of the operand. The number of words is returned. In case the parameter
233 should be passed in memory, 0 is returned. As a special case for zero
234 sized containers, classes[0] will be NO_CLASS and 1 is returned.
235
236 See the x86-64 PS ABI for details.
237 */
238
239 static int
240 classify_argument (struct type *type,
241 enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
242 {
243 int bytes = TYPE_LENGTH (type);
244 int words = (bytes + 8 - 1) / 8;
245
246 switch (TYPE_CODE (type))
247 {
248 case TYPE_CODE_ARRAY:
249 case TYPE_CODE_STRUCT:
250 case TYPE_CODE_UNION:
251 {
252 int i;
253 enum x86_64_reg_class subclasses[MAX_CLASSES];
254
255 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
256 if (bytes > 16)
257 return 0;
258
259 for (i = 0; i < words; i++)
260 classes[i] = X86_64_NO_CLASS;
261
262 /* Zero sized arrays or structures are NO_CLASS. We return 0 to
263 signalize memory class, so handle it as special case. */
264 if (!words)
265 {
266 classes[0] = X86_64_NO_CLASS;
267 return 1;
268 }
269 switch (TYPE_CODE (type))
270 {
271 case TYPE_CODE_STRUCT:
272 {
273 int j;
274 for (j = 0; j < type->nfields; ++j)
275 {
276 int num = classify_argument (type->fields[j].type,
277 subclasses,
278 (type->fields[j].loc.bitpos
279 + bit_offset) % 256);
280 if (!num)
281 return 0;
282 for (i = 0; i < num; i++)
283 {
284 int pos =
285 (type->fields[j].loc.bitpos + bit_offset) / 8 / 8;
286 classes[i + pos] =
287 merge_classes (subclasses[i], classes[i + pos]);
288 }
289 }
290 }
291 break;
292 case TYPE_CODE_ARRAY:
293 {
294 int num;
295
296 num = classify_argument (type->target_type,
297 subclasses, bit_offset);
298 if (!num)
299 return 0;
300
301 /* The partial classes are now full classes. */
302 if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
303 subclasses[0] = X86_64_SSE_CLASS;
304 if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
305 subclasses[0] = X86_64_INTEGER_CLASS;
306
307 for (i = 0; i < words; i++)
308 classes[i] = subclasses[i % num];
309 }
310 break;
311 case TYPE_CODE_UNION:
312 {
313 int j;
314 {
315 for (j = 0; j < type->nfields; ++j)
316 {
317 int num;
318 num = classify_argument (type->fields[j].type,
319 subclasses, bit_offset);
320 if (!num)
321 return 0;
322 for (i = 0; i < num; i++)
323 classes[i] = merge_classes (subclasses[i], classes[i]);
324 }
325 }
326 }
327 break;
328 }
329 /* Final merger cleanup. */
330 for (i = 0; i < words; i++)
331 {
332 /* If one class is MEMORY, everything should be passed in
333 memory. */
334 if (classes[i] == X86_64_MEMORY_CLASS)
335 return 0;
336
337 /* The X86_64_SSEUP_CLASS should be always preceeded by
338 X86_64_SSE_CLASS. */
339 if (classes[i] == X86_64_SSEUP_CLASS
340 && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
341 classes[i] = X86_64_SSE_CLASS;
342
343 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
344 if (classes[i] == X86_64_X87UP_CLASS
345 && (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
346 classes[i] = X86_64_SSE_CLASS;
347 }
348 return words;
349 }
350 break;
351 case TYPE_CODE_FLT:
352 switch (bytes)
353 {
354 case 4:
355 if (!(bit_offset % 64))
356 classes[0] = X86_64_SSESF_CLASS;
357 else
358 classes[0] = X86_64_SSE_CLASS;
359 return 1;
360 case 8:
361 classes[0] = X86_64_SSEDF_CLASS;
362 return 1;
363 case 16:
364 classes[0] = X86_64_X87_CLASS;
365 classes[1] = X86_64_X87UP_CLASS;
366 return 2;
367 }
368 break;
369 case TYPE_CODE_INT:
370 case TYPE_CODE_PTR:
371 switch (bytes)
372 {
373 case 1:
374 case 2:
375 case 4:
376 case 8:
377 if (bytes * 8 + bit_offset <= 32)
378 classes[0] = X86_64_INTEGERSI_CLASS;
379 else
380 classes[0] = X86_64_INTEGER_CLASS;
381 return 1;
382 case 16:
383 classes[0] = classes[1] = X86_64_INTEGER_CLASS;
384 return 2;
385 default:
386 break;
387 }
388 case TYPE_CODE_VOID:
389 return 0;
390 }
391 internal_error (__FILE__, __LINE__, "classify_argument: unknown argument type");
392 }
393
394 /* Examine the argument and return set number of register required in each
395 class. Return 0 ifif parameter should be passed in memory. */
396
397 static int
398 examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
399 int n, int *int_nregs, int *sse_nregs)
400 {
401 *int_nregs = 0;
402 *sse_nregs = 0;
403 if (!n)
404 return 0;
405 for (n--; n >= 0; n--)
406 switch (classes[n])
407 {
408 case X86_64_INTEGER_CLASS:
409 case X86_64_INTEGERSI_CLASS:
410 (*int_nregs)++;
411 break;
412 case X86_64_SSE_CLASS:
413 case X86_64_SSESF_CLASS:
414 case X86_64_SSEDF_CLASS:
415 (*sse_nregs)++;
416 break;
417 case X86_64_NO_CLASS:
418 case X86_64_SSEUP_CLASS:
419 case X86_64_X87_CLASS:
420 case X86_64_X87UP_CLASS:
421 break;
422 case X86_64_MEMORY_CLASS:
423 internal_error (__FILE__, __LINE__, "examine_argument: unexpected memory class");
424 }
425 return 1;
426 }
427
428 #define RET_INT_REGS 2
429 #define RET_SSE_REGS 2
430
431 /* Check if the structure in value_type is returned in registers or in
432 memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
433 EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
434 will be used. */
435 int
436 x86_64_use_struct_convention (int gcc_p, struct type *value_type)
437 {
438 enum x86_64_reg_class class[MAX_CLASSES];
439 int n = classify_argument (value_type, class, 0);
440 int needed_intregs;
441 int needed_sseregs;
442
443 return (!n ||
444 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
445 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
446 }
447
448
449 /* Extract from an array REGBUF containing the (raw) register state, a
450 function return value of TYPE, and copy that, in virtual format,
451 into VALBUF. */
452
453 void
454 x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
455 {
456 enum x86_64_reg_class class[MAX_CLASSES];
457 int n = classify_argument (type, class, 0);
458 int needed_intregs;
459 int needed_sseregs;
460 int intreg = 0;
461 int ssereg = 0;
462 int offset = 0;
463 int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
464 int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
465
466 if (!n ||
467 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
468 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
469 { /* memory class */
470 CORE_ADDR addr;
471 memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
472 read_memory (addr, valbuf, TYPE_LENGTH (type));
473 return;
474 }
475 else
476 {
477 int i;
478 for (i = 0; i < n; i++)
479 {
480 switch (class[i])
481 {
482 case X86_64_NO_CLASS:
483 break;
484 case X86_64_INTEGER_CLASS:
485 memcpy (valbuf + offset,
486 regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
487 8);
488 offset += 8;
489 intreg += 2;
490 break;
491 case X86_64_INTEGERSI_CLASS:
492 memcpy (valbuf + offset,
493 regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
494 offset += 8;
495 intreg++;
496 break;
497 case X86_64_SSEDF_CLASS:
498 case X86_64_SSESF_CLASS:
499 case X86_64_SSE_CLASS:
500 memcpy (valbuf + offset,
501 regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
502 8);
503 offset += 8;
504 ssereg += 2;
505 break;
506 case X86_64_SSEUP_CLASS:
507 memcpy (valbuf + offset + 8,
508 regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
509 offset += 8;
510 ssereg++;
511 break;
512 case X86_64_X87_CLASS:
513 memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
514 8);
515 offset += 8;
516 break;
517 case X86_64_X87UP_CLASS:
518 memcpy (valbuf + offset,
519 regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
520 offset += 8;
521 break;
522 case X86_64_MEMORY_CLASS:
523 default:
524 internal_error (__FILE__, __LINE__,
525 "Unexpected argument class");
526 }
527 }
528 }
529 }
530
531 /* Handled by unwind informations. */
532 static void
533 x86_64_frame_init_saved_regs (struct frame_info *fi)
534 {
535 }
536
537 #define INT_REGS 6
538 #define SSE_REGS 16
539
540 /* Push onto the stack the specified value VALUE. Pad it correctly for
541 it to be an argument to a function. */
542
543 static CORE_ADDR
544 value_push (register CORE_ADDR sp, value_ptr arg)
545 {
546 register int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
547 register int container_len = len;
548
549 /* How big is the container we're going to put this value in? */
550 if (PARM_BOUNDARY)
551 container_len = ((len + PARM_BOUNDARY / TARGET_CHAR_BIT - 1)
552 & ~(PARM_BOUNDARY / TARGET_CHAR_BIT - 1));
553
554 sp -= container_len;
555 write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
556
557 return sp;
558 }
559
560 CORE_ADDR
561 x86_64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
562 int struct_return, CORE_ADDR struct_addr)
563 {
564 int intreg = 0;
565 int ssereg = 0;
566 int i;
567 static int int_parameter_registers[INT_REGS] = {5 /*RDI*/, 4 /*RSI*/,
568 1 /*RDX*/, 2 /*RCX*/,
569 8 /*R8 */, 9 /*R9 */};
570 /* XMM0 - XMM15 */
571 static int sse_parameter_registers[SSE_REGS] = {34, 35, 36, 37,
572 38, 39, 40, 41,
573 42, 43, 44, 45,
574 46, 47, 48, 49};
575 for (i = 0; i < nargs; i++)
576 {
577 enum x86_64_reg_class class[MAX_CLASSES];
578 int n = classify_argument (args[i]->type, class, 0);
579 int needed_intregs;
580 int needed_sseregs;
581
582 if (!n ||
583 !examine_argument (class, n, &needed_intregs, &needed_sseregs)
584 || intreg + needed_intregs > INT_REGS
585 || ssereg + needed_sseregs > SSE_REGS)
586 { /* memory class */
587 sp = value_push (sp, args[i]);
588 }
589 else
590 {
591 int j;
592 for (j = 0; j < n; j++)
593 {
594 int offset = 0;
595 switch (class[j])
596 {
597 case X86_64_NO_CLASS:
598 break;
599 case X86_64_INTEGER_CLASS:
600 write_register_gen (int_parameter_registers[(intreg + 1) / 2],
601 VALUE_CONTENTS_ALL (args[i]) + offset);
602 offset += 8;
603 intreg += 2;
604 break;
605 case X86_64_INTEGERSI_CLASS:
606 write_register_gen (int_parameter_registers[intreg / 2],
607 VALUE_CONTENTS_ALL (args[i]) + offset);
608 offset += 8;
609 intreg++;
610 break;
611 case X86_64_SSEDF_CLASS:
612 case X86_64_SSESF_CLASS:
613 case X86_64_SSE_CLASS:
614 write_register_gen (sse_parameter_registers[(ssereg + 1) / 2],
615 VALUE_CONTENTS_ALL (args[i]) + offset);
616 offset += 8;
617 ssereg += 2;
618 break;
619 case X86_64_SSEUP_CLASS:
620 write_register_gen (sse_parameter_registers[ssereg / 2],
621 VALUE_CONTENTS_ALL (args[i]) + offset);
622 offset += 8;
623 ssereg++;
624 break;
625 case X86_64_X87_CLASS:
626 case X86_64_X87UP_CLASS:
627 case X86_64_MEMORY_CLASS:
628 sp = value_push (sp, args[i]);
629 break;
630 default:
631 internal_error (__FILE__, __LINE__,
632 "Unexpected argument class");
633 }
634 intreg += intreg % 2;
635 ssereg += ssereg % 2;
636 }
637 }
638 }
639 return sp;
640 }
641
642 /* Write into the appropriate registers a function return value stored
643 in VALBUF of type TYPE, given in virtual format. */
644 void
645 x86_64_store_return_value (struct type *type, char *valbuf)
646 {
647 int len = TYPE_LENGTH (type);
648
649 if (TYPE_CODE_FLT == TYPE_CODE (type))
650 {
651 /* Floating-point return values can be found in %st(0). */
652 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
653 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
654 {
655 /* Copy straight over. */
656 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
657 FPU_REG_RAW_SIZE);
658 }
659 else
660 {
661 char buf[FPU_REG_RAW_SIZE];
662 DOUBLEST val;
663
664 /* Convert the value found in VALBUF to the extended
665 floating point format used by the FPU. This is probably
666 not exactly how it would happen on the target itself, but
667 it is the best we can do. */
668 val = extract_floating (valbuf, TYPE_LENGTH (type));
669 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
670 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
671 FPU_REG_RAW_SIZE);
672 }
673 }
674 else
675 {
676 int low_size = REGISTER_RAW_SIZE (0);
677 int high_size = REGISTER_RAW_SIZE (1);
678
679 if (len <= low_size)
680 write_register_bytes (REGISTER_BYTE (0), valbuf, len);
681 else if (len <= (low_size + high_size))
682 {
683 write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
684 write_register_bytes (REGISTER_BYTE (1),
685 valbuf + low_size, len - low_size);
686 }
687 else
688 internal_error (__FILE__, __LINE__,
689 "Cannot store return value of %d bytes long.", len);
690 }
691 }
692 \f
693
694 static char *
695 x86_64_register_name (int reg_nr)
696 {
697 static char *register_names[] = {
698 "rax", "rdx", "rcx", "rbx",
699 "rsi", "rdi", "rbp", "rsp",
700 "r8", "r9", "r10", "r11",
701 "r12", "r13", "r14", "r15",
702 "rip", "eflags",
703 "st0", "st1", "st2", "st3",
704 "st4", "st5", "st6", "st7",
705 "fctrl", "fstat", "ftag", "fiseg",
706 "fioff", "foseg", "fooff", "fop",
707 "xmm0", "xmm1", "xmm2", "xmm3",
708 "xmm4", "xmm5", "xmm6", "xmm7",
709 "xmm8", "xmm9", "xmm10", "xmm11",
710 "xmm12", "xmm13", "xmm14", "xmm15",
711 "mxcsr"
712 };
713 if (reg_nr < 0)
714 return NULL;
715 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
716 return NULL;
717 return register_names[reg_nr];
718 }
719 \f
720
721
722 /* We have two flavours of disassembly. The machinery on this page
723 deals with switching between those. */
724
725 static int
726 gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
727 {
728 if (disassembly_flavour == att_flavour)
729 return print_insn_i386_att (memaddr, info);
730 else if (disassembly_flavour == intel_flavour)
731 return print_insn_i386_intel (memaddr, info);
732 /* Never reached -- disassembly_flavour is always either att_flavour
733 or intel_flavour. */
734 internal_error (__FILE__, __LINE__, "failed internal consistency check");
735 }
736 \f
737
738 /* Store the address of the place in which to copy the structure the
739 subroutine will return. This is called from call_function. */
740 void
741 x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
742 {
743 write_register (RDI_REGNUM, addr);
744 }
745
746 int
747 x86_64_frameless_function_invocation (struct frame_info *frame)
748 {
749 return 0;
750 }
751
752 /* On x86_64 there are no reasonable prologs. */
753 CORE_ADDR
754 x86_64_skip_prologue (CORE_ADDR pc)
755 {
756 return pc;
757 }
758
759 /* Sequence of bytes for breakpoint instruction. */
760 static unsigned char *
761 x86_64_breakpoint_from_pc (CORE_ADDR *pc, int *lenptr)
762 {
763 static unsigned char breakpoint[] = { 0xcc };
764 *lenptr = 1;
765 return breakpoint;
766 }
767
768 static struct gdbarch *
769 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
770 {
771 struct gdbarch *gdbarch;
772 struct gdbarch_tdep *tdep;
773
774 /* Find a candidate among the list of pre-declared architectures. */
775 for (arches = gdbarch_list_lookup_by_info (arches, &info);
776 arches != NULL;
777 arches = gdbarch_list_lookup_by_info (arches->next, &info))
778 {
779 switch (info.bfd_arch_info->mach)
780 {
781 case bfd_mach_x86_64:
782 case bfd_mach_x86_64_intel_syntax:
783 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
784 {
785 case bfd_mach_x86_64:
786 case bfd_mach_x86_64_intel_syntax:
787 return arches->gdbarch;
788 case bfd_mach_i386_i386:
789 case bfd_mach_i386_i8086:
790 case bfd_mach_i386_i386_intel_syntax:
791 break;
792 default:
793 internal_error (__FILE__, __LINE__,
794 "i386_gdbarch_init: unknown machine type");
795 }
796 break;
797 case bfd_mach_i386_i386:
798 case bfd_mach_i386_i8086:
799 case bfd_mach_i386_i386_intel_syntax:
800 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
801 {
802 case bfd_mach_x86_64:
803 case bfd_mach_x86_64_intel_syntax:
804 break;
805 case bfd_mach_i386_i386:
806 case bfd_mach_i386_i8086:
807 case bfd_mach_i386_i386_intel_syntax:
808 return arches->gdbarch;
809 default:
810 internal_error (__FILE__, __LINE__,
811 "i386_gdbarch_init: unknown machine type");
812 }
813 break;
814 default:
815 internal_error (__FILE__, __LINE__,
816 "i386_gdbarch_init: unknown machine type");
817 }
818 }
819
820 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
821 gdbarch = gdbarch_alloc (&info, tdep);
822
823 switch (info.bfd_arch_info->mach)
824 {
825 case bfd_mach_x86_64:
826 case bfd_mach_x86_64_intel_syntax:
827 tdep->last_fpu_regnum = 25;
828 tdep->first_xmm_regnum = 34;
829 tdep->last_xmm_regnum = 49;
830 tdep->mxcsr_regnum = 50;
831 tdep->first_fpu_ctrl_regnum = 26;
832 break;
833 case bfd_mach_i386_i386:
834 case bfd_mach_i386_i8086:
835 case bfd_mach_i386_i386_intel_syntax:
836 /* This is place for definition of i386 target vector. */
837 break;
838 default:
839 internal_error (__FILE__, __LINE__,
840 "i386_gdbarch_init: unknown machine type");
841 }
842
843 set_gdbarch_long_bit (gdbarch, 64);
844 set_gdbarch_long_long_bit (gdbarch, 64);
845 set_gdbarch_ptr_bit (gdbarch, 64);
846
847 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
848 set_gdbarch_ieee_float (gdbarch, 1);
849
850
851 set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
852 set_gdbarch_register_name (gdbarch, x86_64_register_name);
853 set_gdbarch_register_size (gdbarch, 8);
854 set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
855 set_gdbarch_max_register_raw_size (gdbarch, 16);
856 set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
857 /* Total amount of space needed to store our copies of the machine's register
858 (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
859 set_gdbarch_register_bytes (gdbarch,
860 (18 * 8) + (8 * 10) + (8 * 4) + (8 * 16 + 4));
861 set_gdbarch_register_virtual_size (gdbarch, x86_64_register_virtual_size);
862 set_gdbarch_max_register_virtual_size (gdbarch, 16);
863
864 set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
865
866 set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
867 set_gdbarch_register_convert_to_virtual (gdbarch,
868 x86_64_register_convert_to_virtual);
869 set_gdbarch_register_convert_to_raw (gdbarch,
870 x86_64_register_convert_to_raw);
871
872 /* Register numbers of various important registers. */
873 set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
874 set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
875 set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
876
877 set_gdbarch_fp0_regnum (gdbarch, 18); /* First FPU floating-point register. */
878
879 set_gdbarch_read_fp (gdbarch, cfi_read_fp);
880 set_gdbarch_write_fp (gdbarch, cfi_write_fp);
881
882 /* Discard from the stack the innermost frame, restoring all registers. */
883 set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
884
885 /* FRAME_CHAIN takes a frame's nominal address and produces the frame's
886 chain-pointer. */
887 set_gdbarch_frame_chain (gdbarch, cfi_frame_chain);
888
889 set_gdbarch_frameless_function_invocation (gdbarch,
890 x86_64_frameless_function_invocation);
891 set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
892
893 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
894 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
895
896 /* Return number of bytes at start of arglist that are not really args. */
897 set_gdbarch_frame_args_skip (gdbarch, 8);
898
899 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
900
901 /* Frame pc initialization is handled by unwind informations. */
902 set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc);
903
904 /* Initialization of unwind informations. */
905 set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
906
907 /* Getting saved registers is handled by unwind informations. */
908 set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
909
910 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
911
912 /* Cons up virtual frame pointer for trace */
913 set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
914
915
916 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
917
918 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
919 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
920 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
921 set_gdbarch_call_dummy_length (gdbarch, 0);
922 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
923 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
924 set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
925 set_gdbarch_call_dummy_words (gdbarch, 0);
926 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
927 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
928 set_gdbarch_call_dummy_p (gdbarch, 1);
929 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
930 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
931 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
932 set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
933 set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
934
935 /* Return number of args passed to a frame, no way to tell. */
936 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
937 /* Don't use default structure extract routine */
938 set_gdbarch_extract_struct_value_address (gdbarch, 0);
939
940 /* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
941 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
942 the case when structure is returned in registers. */
943 set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
944
945 /* Store the address of the place in which to copy the structure the
946 subroutine will return. This is called from call_function. */
947 set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
948
949 /* Extract from an array REGBUF containing the (raw) register state
950 a function return value of type TYPE, and copy that, in virtual format,
951 into VALBUF. */
952 set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value);
953
954
955 /* Write into the appropriate registers a function return value stored
956 in VALBUF of type TYPE, given in virtual format. */
957 set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value);
958 \f
959
960 /* Offset from address of function to start of its code. */
961 set_gdbarch_function_start_offset (gdbarch, 0);
962
963 set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
964
965 set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
966
967 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
968
969 set_gdbarch_breakpoint_from_pc (gdbarch, x86_64_breakpoint_from_pc);
970
971
972 /* Amount PC must be decremented by after a breakpoint. This is often the
973 number of bytes in BREAKPOINT but not always. */
974 set_gdbarch_decr_pc_after_break (gdbarch, 1);
975
976 return gdbarch;
977 }
978
979 void
980 _initialize_x86_64_tdep (void)
981 {
982 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
983
984 /* Initialize the table saying where each register starts in the
985 register file. */
986 {
987 int i, offset;
988
989 offset = 0;
990 for (i = 0; i < X86_64_NUM_REGS; i++)
991 {
992 x86_64_register_byte_table[i] = offset;
993 offset += x86_64_register_raw_size_table[i];
994 }
995 }
996
997 tm_print_insn = gdb_print_insn_x86_64;
998 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
999
1000 /* Add the variable that controls the disassembly flavour. */
1001 {
1002 struct cmd_list_element *new_cmd;
1003
1004 new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
1005 valid_flavours, &disassembly_flavour, "\
1006 Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
1007 and the default value is \"att\".", &setlist);
1008 add_show_from_set (new_cmd, &showlist);
1009 }
1010 }
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