gdbserver/linux-mips-low.cc

   1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2020 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 #include "nat/gdb_ptrace.h"
  23 #include <endian.h>
  24
  25 #include "nat/mips-linux-watch.h"
  26 #include "gdb_proc_service.h"
  27
  28 /* Linux target op definitions for the MIPS architecture.  */
  29
  30 class mips_target : public linux_process_target
  31 {
  32 public:
  33
  34   const regs_info *get_regs_info () override;
  35
  36 protected:
  37
  38   void low_arch_setup () override;
  39
  40   bool low_cannot_fetch_register (int regno) override;
  41
  42   bool low_cannot_store_register (int regno) override;
  43 };
  44
  45 /* The singleton target ops object.  */
  46
  47 static mips_target the_mips_target;
  48
  49 /* Defined in auto-generated file mips-linux.c.  */
  50 void init_registers_mips_linux (void);
  51 extern const struct target_desc *tdesc_mips_linux;
  52
  53 /* Defined in auto-generated file mips-dsp-linux.c.  */
  54 void init_registers_mips_dsp_linux (void);
  55 extern const struct target_desc *tdesc_mips_dsp_linux;
  56
  57 /* Defined in auto-generated file mips64-linux.c.  */
  58 void init_registers_mips64_linux (void);
  59 extern const struct target_desc *tdesc_mips64_linux;
  60
  61 /* Defined in auto-generated file mips64-dsp-linux.c.  */
  62 void init_registers_mips64_dsp_linux (void);
  63 extern const struct target_desc *tdesc_mips64_dsp_linux;
  64
  65 #ifdef __mips64
  66 #define tdesc_mips_linux tdesc_mips64_linux
  67 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
  68 #endif
  69
  70 #ifndef PTRACE_GET_THREAD_AREA
  71 #define PTRACE_GET_THREAD_AREA 25
  72 #endif
  73
  74 #ifdef HAVE_SYS_REG_H
  75 #include <sys/reg.h>
  76 #endif
  77
  78 #define mips_num_regs 73
  79 #define mips_dsp_num_regs 80
  80
  81 #include <asm/ptrace.h>
  82
  83 #ifndef DSP_BASE
  84 #define DSP_BASE 71
  85 #define DSP_CONTROL 77
  86 #endif
  87
  88 union mips_register
  89 {
  90   unsigned char buf[8];
  91
  92   /* Deliberately signed, for proper sign extension.  */
  93   int reg32;
  94   long long reg64;
  95 };
  96
  97 /* Return the ptrace ``address'' of register REGNO. */
  98
  99 #define mips_base_regs                                                  \
 100   -1,  1,  2,  3,  4,  5,  6,  7,                                       \
 101   8,  9,  10, 11, 12, 13, 14, 15,                                       \
 102   16, 17, 18, 19, 20, 21, 22, 23,                                       \
 103   24, 25, 26, 27, 28, 29, 30, 31,                                       \
 104                                                                         \
 105   -1, MMLO, MMHI, BADVADDR, CAUSE, PC,                                  \
 106                                                                         \
 107   FPR_BASE,      FPR_BASE + 1,  FPR_BASE + 2,  FPR_BASE + 3,            \
 108   FPR_BASE + 4,  FPR_BASE + 5,  FPR_BASE + 6,  FPR_BASE + 7,            \
 109   FPR_BASE + 8,  FPR_BASE + 9,  FPR_BASE + 10, FPR_BASE + 11,           \
 110   FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15,           \
 111   FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19,           \
 112   FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23,           \
 113   FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27,           \
 114   FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31,           \
 115   FPC_CSR, FPC_EIR
 116
 117 #define mips_dsp_regs                                                   \
 118   DSP_BASE,      DSP_BASE + 1,  DSP_BASE + 2,  DSP_BASE + 3,            \
 119   DSP_BASE + 4,  DSP_BASE + 5,                                          \
 120   DSP_CONTROL
 121
 122 static int mips_regmap[mips_num_regs] = {
 123   mips_base_regs,
 124   0
 125 };
 126
 127 static int mips_dsp_regmap[mips_dsp_num_regs] = {
 128   mips_base_regs,
 129   mips_dsp_regs,
 130   0
 131 };
 132
 133 /* DSP registers are not in any regset and can only be accessed
 134    individually.  */
 135
 136 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
 137   0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
 138 };
 139
 140 static int have_dsp = -1;
 141
 142 /* Try peeking at an arbitrarily chosen DSP register and pick the available
 143    user register set accordingly.  */
 144
 145 static const struct target_desc *
 146 mips_read_description (void)
 147 {
 148   if (have_dsp < 0)
 149     {
 150       int pid = lwpid_of (current_thread);
 151
 152       errno = 0;
 153       ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
 154       switch (errno)
 155         {
 156         case 0:
 157           have_dsp = 1;
 158           break;
 159         case EIO:
 160           have_dsp = 0;
 161           break;
 162         default:
 163           perror_with_name ("ptrace");
 164           break;
 165         }
 166     }
 167
 168   return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 169 }
 170
 171 void
 172 mips_target::low_arch_setup ()
 173 {
 174   current_process ()->tdesc = mips_read_description ();
 175 }
 176
 177 /* Per-process arch-specific data we want to keep.  */
 178
 179 struct arch_process_info
 180 {
 181   /* -1 if the kernel and/or CPU do not support watch registers.
 182       1 if watch_readback is valid and we can read style, num_valid
 183         and the masks.
 184       0 if we need to read the watch_readback.  */
 185
 186   int watch_readback_valid;
 187
 188   /* Cached watch register read values.  */
 189
 190   struct pt_watch_regs watch_readback;
 191
 192   /* Current watchpoint requests for this process.  */
 193
 194   struct mips_watchpoint *current_watches;
 195
 196   /* The current set of watch register values for writing the
 197      registers.  */
 198
 199   struct pt_watch_regs watch_mirror;
 200 };
 201
 202 /* Per-thread arch-specific data we want to keep.  */
 203
 204 struct arch_lwp_info
 205 {
 206   /* Non-zero if our copy differs from what's recorded in the thread.  */
 207   int watch_registers_changed;
 208 };
 209
 210 /* From mips-linux-nat.c.  */
 211
 212 /* Pseudo registers can not be read.  ptrace does not provide a way to
 213    read (or set) PS_REGNUM, and there's no point in reading or setting
 214    ZERO_REGNUM, it's always 0.  We also can not set BADVADDR, CAUSE,
 215    or FCRIR via ptrace().  */
 216
 217 bool
 218 mips_target::low_cannot_fetch_register (int regno)
 219 {
 220   const struct target_desc *tdesc;
 221
 222   if (get_regs_info ()->usrregs->regmap[regno] == -1)
 223     return true;
 224
 225   tdesc = current_process ()->tdesc;
 226
 227   /* On n32 we can't access 64-bit registers via PTRACE_PEEKUSR.  */
 228   if (register_size (tdesc, regno) > sizeof (PTRACE_XFER_TYPE))
 229     return true;
 230
 231   if (find_regno (tdesc, "r0") == regno)
 232     return true;
 233
 234   return false;
 235 }
 236
 237 bool
 238 mips_target::low_cannot_store_register (int regno)
 239 {
 240   const struct target_desc *tdesc;
 241
 242   if (get_regs_info ()->usrregs->regmap[regno] == -1)
 243     return true;
 244
 245   tdesc = current_process ()->tdesc;
 246
 247   /* On n32 we can't access 64-bit registers via PTRACE_POKEUSR.  */
 248   if (register_size (tdesc, regno) > sizeof (PTRACE_XFER_TYPE))
 249     return true;
 250
 251   if (find_regno (tdesc, "r0") == regno)
 252     return true;
 253
 254   if (find_regno (tdesc, "cause") == regno)
 255     return true;
 256
 257   if (find_regno (tdesc, "badvaddr") == regno)
 258     return true;
 259
 260   if (find_regno (tdesc, "fir") == regno)
 261     return true;
 262
 263   return false;
 264 }
 265
 266 static int
 267 mips_fetch_register (struct regcache *regcache, int regno)
 268 {
 269   const struct target_desc *tdesc = current_process ()->tdesc;
 270
 271   if (find_regno (tdesc, "r0") == regno)
 272     {
 273       supply_register_zeroed (regcache, regno);
 274       return 1;
 275     }
 276
 277   return 0;
 278 }
 279
 280 static CORE_ADDR
 281 mips_get_pc (struct regcache *regcache)
 282 {
 283   union mips_register pc;
 284   collect_register_by_name (regcache, "pc", pc.buf);
 285   return register_size (regcache->tdesc, 0) == 4 ? pc.reg32 : pc.reg64;
 286 }
 287
 288 static void
 289 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
 290 {
 291   union mips_register newpc;
 292   if (register_size (regcache->tdesc, 0) == 4)
 293     newpc.reg32 = pc;
 294   else
 295     newpc.reg64 = pc;
 296
 297   supply_register_by_name (regcache, "pc", newpc.buf);
 298 }
 299
 300 /* Correct in either endianness.  */
 301 static const unsigned int mips_breakpoint = 0x0005000d;
 302 #define mips_breakpoint_len 4
 303
 304 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 305
 306 static const gdb_byte *
 307 mips_sw_breakpoint_from_kind (int kind, int *size)
 308 {
 309   *size = mips_breakpoint_len;
 310   return (const gdb_byte *) &mips_breakpoint;
 311 }
 312
 313 static int
 314 mips_breakpoint_at (CORE_ADDR where)
 315 {
 316   unsigned int insn;
 317
 318   the_target->read_memory (where, (unsigned char *) &insn, 4);
 319   if (insn == mips_breakpoint)
 320     return 1;
 321
 322   /* If necessary, recognize more trap instructions here.  GDB only uses the
 323      one.  */
 324   return 0;
 325 }
 326
 327 /* Mark the watch registers of lwp, represented by ENTRY, as changed.  */
 328
 329 static void
 330 update_watch_registers_callback (thread_info *thread)
 331 {
 332   struct lwp_info *lwp = get_thread_lwp (thread);
 333
 334   /* The actual update is done later just before resuming the lwp,
 335      we just mark that the registers need updating.  */
 336   lwp->arch_private->watch_registers_changed = 1;
 337
 338   /* If the lwp isn't stopped, force it to momentarily pause, so
 339      we can update its watch registers.  */
 340   if (!lwp->stopped)
 341     linux_stop_lwp (lwp);
 342 }
 343
 344 /* This is the implementation of linux_target_ops method
 345    new_process.  */
 346
 347 static struct arch_process_info *
 348 mips_linux_new_process (void)
 349 {
 350   struct arch_process_info *info = XCNEW (struct arch_process_info);
 351
 352   return info;
 353 }
 354
 355 /* This is the implementation of linux_target_ops method
 356    delete_process.  */
 357
 358 static void
 359 mips_linux_delete_process (struct arch_process_info *info)
 360 {
 361   xfree (info);
 362 }
 363
 364 /* This is the implementation of linux_target_ops method new_thread.
 365    Mark the watch registers as changed, so the threads' copies will
 366    be updated.  */
 367
 368 static void
 369 mips_linux_new_thread (struct lwp_info *lwp)
 370 {
 371   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 372
 373   info->watch_registers_changed = 1;
 374
 375   lwp->arch_private = info;
 376 }
 377
 378 /* Function to call when a thread is being deleted.  */
 379
 380 static void
 381 mips_linux_delete_thread (struct arch_lwp_info *arch_lwp)
 382 {
 383   xfree (arch_lwp);
 384 }
 385
 386 /* Create a new mips_watchpoint and add it to the list.  */
 387
 388 static void
 389 mips_add_watchpoint (struct arch_process_info *priv, CORE_ADDR addr, int len,
 390                      enum target_hw_bp_type watch_type)
 391 {
 392   struct mips_watchpoint *new_watch;
 393   struct mips_watchpoint **pw;
 394
 395   new_watch = XNEW (struct mips_watchpoint);
 396   new_watch->addr = addr;
 397   new_watch->len = len;
 398   new_watch->type = watch_type;
 399   new_watch->next = NULL;
 400
 401   pw = &priv->current_watches;
 402   while (*pw != NULL)
 403     pw = &(*pw)->next;
 404   *pw = new_watch;
 405 }
 406
 407 /* Hook to call when a new fork is attached.  */
 408
 409 static void
 410 mips_linux_new_fork (struct process_info *parent,
 411                         struct process_info *child)
 412 {
 413   struct arch_process_info *parent_private;
 414   struct arch_process_info *child_private;
 415   struct mips_watchpoint *wp;
 416
 417   /* These are allocated by linux_add_process.  */
 418   gdb_assert (parent->priv != NULL
 419               && parent->priv->arch_private != NULL);
 420   gdb_assert (child->priv != NULL
 421               && child->priv->arch_private != NULL);
 422
 423   /* Linux kernel before 2.6.33 commit
 424      72f674d203cd230426437cdcf7dd6f681dad8b0d
 425      will inherit hardware debug registers from parent
 426      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 427      zeroed debug registers.
 428
 429      GDB core assumes the child inherits the watchpoints/hw
 430      breakpoints of the parent, and will remove them all from the
 431      forked off process.  Copy the debug registers mirrors into the
 432      new process so that all breakpoints and watchpoints can be
 433      removed together.  The debug registers mirror will become zeroed
 434      in the end before detaching the forked off process, thus making
 435      this compatible with older Linux kernels too.  */
 436
 437   parent_private = parent->priv->arch_private;
 438   child_private = child->priv->arch_private;
 439
 440   child_private->watch_readback_valid = parent_private->watch_readback_valid;
 441   child_private->watch_readback = parent_private->watch_readback;
 442
 443   for (wp = parent_private->current_watches; wp != NULL; wp = wp->next)
 444     mips_add_watchpoint (child_private, wp->addr, wp->len, wp->type);
 445
 446   child_private->watch_mirror = parent_private->watch_mirror;
 447 }
 448 /* This is the implementation of linux_target_ops method
 449    prepare_to_resume.  If the watch regs have changed, update the
 450    thread's copies.  */
 451
 452 static void
 453 mips_linux_prepare_to_resume (struct lwp_info *lwp)
 454 {
 455   ptid_t ptid = ptid_of (get_lwp_thread (lwp));
 456   struct process_info *proc = find_process_pid (ptid.pid ());
 457   struct arch_process_info *priv = proc->priv->arch_private;
 458
 459   if (lwp->arch_private->watch_registers_changed)
 460     {
 461       /* Only update the watch registers if we have set or unset a
 462          watchpoint already.  */
 463       if (mips_linux_watch_get_num_valid (&priv->watch_mirror) > 0)
 464         {
 465           /* Write the mirrored watch register values.  */
 466           int tid = ptid.lwp ();
 467
 468           if (-1 == ptrace (PTRACE_SET_WATCH_REGS, tid,
 469                             &priv->watch_mirror, NULL))
 470             perror_with_name ("Couldn't write watch register");
 471         }
 472
 473       lwp->arch_private->watch_registers_changed = 0;
 474     }
 475 }
 476
 477 static int
 478 mips_supports_z_point_type (char z_type)
 479 {
 480   switch (z_type)
 481     {
 482     case Z_PACKET_WRITE_WP:
 483     case Z_PACKET_READ_WP:
 484     case Z_PACKET_ACCESS_WP:
 485       return 1;
 486     default:
 487       return 0;
 488     }
 489 }
 490
 491 /* This is the implementation of linux_target_ops method
 492    insert_point.  */
 493
 494 static int
 495 mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 496                    int len, struct raw_breakpoint *bp)
 497 {
 498   struct process_info *proc = current_process ();
 499   struct arch_process_info *priv = proc->priv->arch_private;
 500   struct pt_watch_regs regs;
 501   long lwpid;
 502   enum target_hw_bp_type watch_type;
 503   uint32_t irw;
 504
 505   lwpid = lwpid_of (current_thread);
 506   if (!mips_linux_read_watch_registers (lwpid,
 507                                         &priv->watch_readback,
 508                                         &priv->watch_readback_valid,
 509                                         0))
 510     return -1;
 511
 512   if (len <= 0)
 513     return -1;
 514
 515   regs = priv->watch_readback;
 516   /* Add the current watches.  */
 517   mips_linux_watch_populate_regs (priv->current_watches, &regs);
 518
 519   /* Now try to add the new watch.  */
 520   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 521   irw = mips_linux_watch_type_to_irw (watch_type);
 522   if (!mips_linux_watch_try_one_watch (&regs, addr, len, irw))
 523     return -1;
 524
 525   /* It fit.  Stick it on the end of the list.  */
 526   mips_add_watchpoint (priv, addr, len, watch_type);
 527
 528   priv->watch_mirror = regs;
 529
 530   /* Only update the threads of this process.  */
 531   for_each_thread (proc->pid, update_watch_registers_callback);
 532
 533   return 0;
 534 }
 535
 536 /* This is the implementation of linux_target_ops method
 537    remove_point.  */
 538
 539 static int
 540 mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 541                    int len, struct raw_breakpoint *bp)
 542 {
 543   struct process_info *proc = current_process ();
 544   struct arch_process_info *priv = proc->priv->arch_private;
 545
 546   int deleted_one;
 547   enum target_hw_bp_type watch_type;
 548
 549   struct mips_watchpoint **pw;
 550   struct mips_watchpoint *w;
 551
 552   /* Search for a known watch that matches.  Then unlink and free it.  */
 553   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 554   deleted_one = 0;
 555   pw = &priv->current_watches;
 556   while ((w = *pw))
 557     {
 558       if (w->addr == addr && w->len == len && w->type == watch_type)
 559         {
 560           *pw = w->next;
 561           free (w);
 562           deleted_one = 1;
 563           break;
 564         }
 565       pw = &(w->next);
 566     }
 567
 568   if (!deleted_one)
 569     return -1;  /* We don't know about it, fail doing nothing.  */
 570
 571   /* At this point watch_readback is known to be valid because we
 572      could not have added the watch without reading it.  */
 573   gdb_assert (priv->watch_readback_valid == 1);
 574
 575   priv->watch_mirror = priv->watch_readback;
 576   mips_linux_watch_populate_regs (priv->current_watches,
 577                                   &priv->watch_mirror);
 578
 579   /* Only update the threads of this process.  */
 580   for_each_thread (proc->pid, update_watch_registers_callback);
 581
 582   return 0;
 583 }
 584
 585 /* This is the implementation of linux_target_ops method
 586    stopped_by_watchpoint.  The watchhi R and W bits indicate
 587    the watch register triggered. */
 588
 589 static int
 590 mips_stopped_by_watchpoint (void)
 591 {
 592   struct process_info *proc = current_process ();
 593   struct arch_process_info *priv = proc->priv->arch_private;
 594   int n;
 595   int num_valid;
 596   long lwpid = lwpid_of (current_thread);
 597
 598   if (!mips_linux_read_watch_registers (lwpid,
 599                                         &priv->watch_readback,
 600                                         &priv->watch_readback_valid,
 601                                         1))
 602     return 0;
 603
 604   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 605
 606   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 607     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 608         & (R_MASK | W_MASK))
 609       return 1;
 610
 611   return 0;
 612 }
 613
 614 /* This is the implementation of linux_target_ops method
 615    stopped_data_address.  */
 616
 617 static CORE_ADDR
 618 mips_stopped_data_address (void)
 619 {
 620   struct process_info *proc = current_process ();
 621   struct arch_process_info *priv = proc->priv->arch_private;
 622   int n;
 623   int num_valid;
 624   long lwpid = lwpid_of (current_thread);
 625
 626   /* On MIPS we don't know the low order 3 bits of the data address.
 627      GDB does not support remote targets that can't report the
 628      watchpoint address.  So, make our best guess; return the starting
 629      address of a watchpoint request which overlaps the one that
 630      triggered.  */
 631
 632   if (!mips_linux_read_watch_registers (lwpid,
 633                                         &priv->watch_readback,
 634                                         &priv->watch_readback_valid,
 635                                         0))
 636     return 0;
 637
 638   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 639
 640   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 641     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 642         & (R_MASK | W_MASK))
 643       {
 644         CORE_ADDR t_low, t_hi;
 645         int t_irw;
 646         struct mips_watchpoint *watch;
 647
 648         t_low = mips_linux_watch_get_watchlo (&priv->watch_readback, n);
 649         t_irw = t_low & IRW_MASK;
 650         t_hi = (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 651                 | IRW_MASK);
 652         t_low &= ~(CORE_ADDR)t_hi;
 653
 654         for (watch = priv->current_watches;
 655              watch != NULL;
 656              watch = watch->next)
 657           {
 658             CORE_ADDR addr = watch->addr;
 659             CORE_ADDR last_byte = addr + watch->len - 1;
 660
 661             if ((t_irw & mips_linux_watch_type_to_irw (watch->type)) == 0)
 662               {
 663                 /* Different type.  */
 664                 continue;
 665               }
 666             /* Check for overlap of even a single byte.  */
 667             if (last_byte >= t_low && addr <= t_low + t_hi)
 668               return addr;
 669           }
 670       }
 671
 672   /* Shouldn't happen.  */
 673   return 0;
 674 }
 675
 676 /* Fetch the thread-local storage pointer for libthread_db.  */
 677
 678 ps_err_e
 679 ps_get_thread_area (struct ps_prochandle *ph,
 680                     lwpid_t lwpid, int idx, void **base)
 681 {
 682   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 683     return PS_ERR;
 684
 685   /* IDX is the bias from the thread pointer to the beginning of the
 686      thread descriptor.  It has to be subtracted due to implementation
 687      quirks in libthread_db.  */
 688   *base = (void *) ((char *)*base - idx);
 689
 690   return PS_OK;
 691 }
 692
 693 static void
 694 mips_collect_register (struct regcache *regcache,
 695                        int use_64bit, int regno, union mips_register *reg)
 696 {
 697   union mips_register tmp_reg;
 698
 699   if (use_64bit)
 700     {
 701       collect_register (regcache, regno, &tmp_reg.reg64);
 702       *reg = tmp_reg;
 703     }
 704   else
 705     {
 706       collect_register (regcache, regno, &tmp_reg.reg32);
 707       reg->reg64 = tmp_reg.reg32;
 708     }
 709 }
 710
 711 static void
 712 mips_supply_register (struct regcache *regcache,
 713                       int use_64bit, int regno, const union mips_register *reg)
 714 {
 715   int offset = 0;
 716
 717   /* For big-endian 32-bit targets, ignore the high four bytes of each
 718      eight-byte slot.  */
 719   if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
 720     offset = 4;
 721
 722   supply_register (regcache, regno, reg->buf + offset);
 723 }
 724
 725 #ifdef HAVE_PTRACE_GETREGS
 726
 727 static void
 728 mips_collect_register_32bit (struct regcache *regcache,
 729                              int use_64bit, int regno, unsigned char *buf)
 730 {
 731   union mips_register tmp_reg;
 732   int reg32;
 733
 734   mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
 735   reg32 = tmp_reg.reg64;
 736   memcpy (buf, &reg32, 4);
 737 }
 738
 739 static void
 740 mips_supply_register_32bit (struct regcache *regcache,
 741                             int use_64bit, int regno, const unsigned char *buf)
 742 {
 743   union mips_register tmp_reg;
 744   int reg32;
 745
 746   memcpy (&reg32, buf, 4);
 747   tmp_reg.reg64 = reg32;
 748   mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
 749 }
 750
 751 static void
 752 mips_fill_gregset (struct regcache *regcache, void *buf)
 753 {
 754   union mips_register *regset = (union mips_register *) buf;
 755   int i, use_64bit;
 756   const struct target_desc *tdesc = regcache->tdesc;
 757
 758   use_64bit = (register_size (tdesc, 0) == 8);
 759
 760   for (i = 1; i < 32; i++)
 761     mips_collect_register (regcache, use_64bit, i, regset + i);
 762
 763   mips_collect_register (regcache, use_64bit,
 764                          find_regno (tdesc, "lo"), regset + 32);
 765   mips_collect_register (regcache, use_64bit,
 766                          find_regno (tdesc, "hi"), regset + 33);
 767   mips_collect_register (regcache, use_64bit,
 768                          find_regno (tdesc, "pc"), regset + 34);
 769   mips_collect_register (regcache, use_64bit,
 770                          find_regno (tdesc, "badvaddr"), regset + 35);
 771   mips_collect_register (regcache, use_64bit,
 772                          find_regno (tdesc, "status"), regset + 36);
 773   mips_collect_register (regcache, use_64bit,
 774                          find_regno (tdesc, "cause"), regset + 37);
 775
 776   mips_collect_register (regcache, use_64bit,
 777                          find_regno (tdesc, "restart"), regset + 0);
 778 }
 779
 780 static void
 781 mips_store_gregset (struct regcache *regcache, const void *buf)
 782 {
 783   const union mips_register *regset = (const union mips_register *) buf;
 784   int i, use_64bit;
 785
 786   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 787
 788   supply_register_by_name_zeroed (regcache, "r0");
 789
 790   for (i = 1; i < 32; i++)
 791     mips_supply_register (regcache, use_64bit, i, regset + i);
 792
 793   mips_supply_register (regcache, use_64bit,
 794                         find_regno (regcache->tdesc, "lo"), regset + 32);
 795   mips_supply_register (regcache, use_64bit,
 796                         find_regno (regcache->tdesc, "hi"), regset + 33);
 797   mips_supply_register (regcache, use_64bit,
 798                         find_regno (regcache->tdesc, "pc"), regset + 34);
 799   mips_supply_register (regcache, use_64bit,
 800                         find_regno (regcache->tdesc, "badvaddr"), regset + 35);
 801   mips_supply_register (regcache, use_64bit,
 802                         find_regno (regcache->tdesc, "status"), regset + 36);
 803   mips_supply_register (regcache, use_64bit,
 804                         find_regno (regcache->tdesc, "cause"), regset + 37);
 805
 806   mips_supply_register (regcache, use_64bit,
 807                         find_regno (regcache->tdesc, "restart"), regset + 0);
 808 }
 809
 810 static void
 811 mips_fill_fpregset (struct regcache *regcache, void *buf)
 812 {
 813   union mips_register *regset = (union mips_register *) buf;
 814   int i, use_64bit, first_fp, big_endian;
 815
 816   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 817   first_fp = find_regno (regcache->tdesc, "f0");
 818   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 819
 820   /* See GDB for a discussion of this peculiar layout.  */
 821   for (i = 0; i < 32; i++)
 822     if (use_64bit)
 823       collect_register (regcache, first_fp + i, regset[i].buf);
 824     else
 825       collect_register (regcache, first_fp + i,
 826                         regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 827
 828   mips_collect_register_32bit (regcache, use_64bit,
 829                                find_regno (regcache->tdesc, "fcsr"), regset[32].buf);
 830   mips_collect_register_32bit (regcache, use_64bit,
 831                                find_regno (regcache->tdesc, "fir"),
 832                                regset[32].buf + 4);
 833 }
 834
 835 static void
 836 mips_store_fpregset (struct regcache *regcache, const void *buf)
 837 {
 838   const union mips_register *regset = (const union mips_register *) buf;
 839   int i, use_64bit, first_fp, big_endian;
 840
 841   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 842   first_fp = find_regno (regcache->tdesc, "f0");
 843   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 844
 845   /* See GDB for a discussion of this peculiar layout.  */
 846   for (i = 0; i < 32; i++)
 847     if (use_64bit)
 848       supply_register (regcache, first_fp + i, regset[i].buf);
 849     else
 850       supply_register (regcache, first_fp + i,
 851                        regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 852
 853   mips_supply_register_32bit (regcache, use_64bit,
 854                               find_regno (regcache->tdesc, "fcsr"),
 855                               regset[32].buf);
 856   mips_supply_register_32bit (regcache, use_64bit,
 857                               find_regno (regcache->tdesc, "fir"),
 858                               regset[32].buf + 4);
 859 }
 860 #endif /* HAVE_PTRACE_GETREGS */
 861
 862 /* Take care of 32-bit registers with 64-bit ptrace, POKEUSER side.  */
 863
 864 static void
 865 mips_collect_ptrace_register (struct regcache *regcache,
 866                               int regno, char *buf)
 867 {
 868   int use_64bit = sizeof (PTRACE_XFER_TYPE) == 8;
 869
 870   if (use_64bit && register_size (regcache->tdesc, regno) == 4)
 871     {
 872       union mips_register reg;
 873
 874       mips_collect_register (regcache, 0, regno, &reg);
 875       memcpy (buf, &reg, sizeof (reg));
 876     }
 877   else
 878     collect_register (regcache, regno, buf);
 879 }
 880
 881 /* Take care of 32-bit registers with 64-bit ptrace, PEEKUSER side.  */
 882
 883 static void
 884 mips_supply_ptrace_register (struct regcache *regcache,
 885                              int regno, const char *buf)
 886 {
 887   int use_64bit = sizeof (PTRACE_XFER_TYPE) == 8;
 888
 889   if (use_64bit && register_size (regcache->tdesc, regno) == 4)
 890     {
 891       union mips_register reg;
 892
 893       memcpy (&reg, buf, sizeof (reg));
 894       mips_supply_register (regcache, 0, regno, &reg);
 895     }
 896   else
 897     supply_register (regcache, regno, buf);
 898 }
 899
 900 static struct regset_info mips_regsets[] = {
 901 #ifdef HAVE_PTRACE_GETREGS
 902   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
 903     mips_fill_gregset, mips_store_gregset },
 904   { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
 905     mips_fill_fpregset, mips_store_fpregset },
 906 #endif /* HAVE_PTRACE_GETREGS */
 907   NULL_REGSET
 908 };
 909
 910 static struct regsets_info mips_regsets_info =
 911   {
 912     mips_regsets, /* regsets */
 913     0, /* num_regsets */
 914     NULL, /* disabled_regsets */
 915   };
 916
 917 static struct usrregs_info mips_dsp_usrregs_info =
 918   {
 919     mips_dsp_num_regs,
 920     mips_dsp_regmap,
 921   };
 922
 923 static struct usrregs_info mips_usrregs_info =
 924   {
 925     mips_num_regs,
 926     mips_regmap,
 927   };
 928
 929 static struct regs_info dsp_regs_info =
 930   {
 931     mips_dsp_regset_bitmap,
 932     &mips_dsp_usrregs_info,
 933     &mips_regsets_info
 934   };
 935
 936 static struct regs_info myregs_info =
 937   {
 938     NULL, /* regset_bitmap */
 939     &mips_usrregs_info,
 940     &mips_regsets_info
 941   };
 942
 943 const regs_info *
 944 mips_target::get_regs_info ()
 945 {
 946   if (have_dsp)
 947     return &dsp_regs_info;
 948   else
 949     return &myregs_info;
 950 }
 951
 952 struct linux_target_ops the_low_target = {
 953   mips_fetch_register,
 954   mips_get_pc,
 955   mips_set_pc,
 956   NULL, /* breakpoint_kind_from_pc */
 957   mips_sw_breakpoint_from_kind,
 958   NULL, /* get_next_pcs */
 959   0,
 960   mips_breakpoint_at,
 961   mips_supports_z_point_type,
 962   mips_insert_point,
 963   mips_remove_point,
 964   mips_stopped_by_watchpoint,
 965   mips_stopped_data_address,
 966   mips_collect_ptrace_register,
 967   mips_supply_ptrace_register,
 968   NULL, /* siginfo_fixup */
 969   mips_linux_new_process,
 970   mips_linux_delete_process,
 971   mips_linux_new_thread,
 972   mips_linux_delete_thread,
 973   mips_linux_new_fork,
 974   mips_linux_prepare_to_resume
 975 };
 976
 977 /* The linux target ops object.  */
 978
 979 linux_process_target *the_linux_target = &the_mips_target;
 980
 981 void
 982 initialize_low_arch (void)
 983 {
 984   /* Initialize the Linux target descriptions.  */
 985   init_registers_mips_linux ();
 986   init_registers_mips_dsp_linux ();
 987   init_registers_mips64_linux ();
 988   init_registers_mips64_dsp_linux ();
 989
 990   initialize_regsets_info (&mips_regsets_info);
 991 }