1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2020 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "linux-low.h"
22 #include "nat/gdb_ptrace.h"
25 #include "nat/mips-linux-watch.h"
26 #include "gdb_proc_service.h"
28 /* Linux target op definitions for the MIPS architecture. */
30 class mips_target
: public linux_process_target
36 /* The singleton target ops object. */
38 static mips_target the_mips_target
;
40 /* Defined in auto-generated file mips-linux.c. */
41 void init_registers_mips_linux (void);
42 extern const struct target_desc
*tdesc_mips_linux
;
44 /* Defined in auto-generated file mips-dsp-linux.c. */
45 void init_registers_mips_dsp_linux (void);
46 extern const struct target_desc
*tdesc_mips_dsp_linux
;
48 /* Defined in auto-generated file mips64-linux.c. */
49 void init_registers_mips64_linux (void);
50 extern const struct target_desc
*tdesc_mips64_linux
;
52 /* Defined in auto-generated file mips64-dsp-linux.c. */
53 void init_registers_mips64_dsp_linux (void);
54 extern const struct target_desc
*tdesc_mips64_dsp_linux
;
57 #define tdesc_mips_linux tdesc_mips64_linux
58 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
61 #ifndef PTRACE_GET_THREAD_AREA
62 #define PTRACE_GET_THREAD_AREA 25
69 #define mips_num_regs 73
70 #define mips_dsp_num_regs 80
72 #include <asm/ptrace.h>
76 #define DSP_CONTROL 77
83 /* Deliberately signed, for proper sign extension. */
88 /* Return the ptrace ``address'' of register REGNO. */
90 #define mips_base_regs \
91 -1, 1, 2, 3, 4, 5, 6, 7, \
92 8, 9, 10, 11, 12, 13, 14, 15, \
93 16, 17, 18, 19, 20, 21, 22, 23, \
94 24, 25, 26, 27, 28, 29, 30, 31, \
96 -1, MMLO, MMHI, BADVADDR, CAUSE, PC, \
98 FPR_BASE, FPR_BASE + 1, FPR_BASE + 2, FPR_BASE + 3, \
99 FPR_BASE + 4, FPR_BASE + 5, FPR_BASE + 6, FPR_BASE + 7, \
100 FPR_BASE + 8, FPR_BASE + 9, FPR_BASE + 10, FPR_BASE + 11, \
101 FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15, \
102 FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19, \
103 FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23, \
104 FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27, \
105 FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31, \
108 #define mips_dsp_regs \
109 DSP_BASE, DSP_BASE + 1, DSP_BASE + 2, DSP_BASE + 3, \
110 DSP_BASE + 4, DSP_BASE + 5, \
113 static int mips_regmap
[mips_num_regs
] = {
118 static int mips_dsp_regmap
[mips_dsp_num_regs
] = {
124 /* DSP registers are not in any regset and can only be accessed
127 static unsigned char mips_dsp_regset_bitmap
[(mips_dsp_num_regs
+ 7) / 8] = {
128 0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
131 static int have_dsp
= -1;
133 /* Try peeking at an arbitrarily chosen DSP register and pick the available
134 user register set accordingly. */
136 static const struct target_desc
*
137 mips_read_description (void)
141 int pid
= lwpid_of (current_thread
);
144 ptrace (PTRACE_PEEKUSER
, pid
, DSP_CONTROL
, 0);
154 perror_with_name ("ptrace");
159 return have_dsp
? tdesc_mips_dsp_linux
: tdesc_mips_linux
;
163 mips_arch_setup (void)
165 current_process ()->tdesc
= mips_read_description ();
168 static struct usrregs_info
*
169 get_usrregs_info (void)
171 const struct regs_info
*regs_info
= the_low_target
.regs_info ();
173 return regs_info
->usrregs
;
176 /* Per-process arch-specific data we want to keep. */
178 struct arch_process_info
180 /* -1 if the kernel and/or CPU do not support watch registers.
181 1 if watch_readback is valid and we can read style, num_valid
183 0 if we need to read the watch_readback. */
185 int watch_readback_valid
;
187 /* Cached watch register read values. */
189 struct pt_watch_regs watch_readback
;
191 /* Current watchpoint requests for this process. */
193 struct mips_watchpoint
*current_watches
;
195 /* The current set of watch register values for writing the
198 struct pt_watch_regs watch_mirror
;
201 /* Per-thread arch-specific data we want to keep. */
205 /* Non-zero if our copy differs from what's recorded in the thread. */
206 int watch_registers_changed
;
209 /* From mips-linux-nat.c. */
211 /* Pseudo registers can not be read. ptrace does not provide a way to
212 read (or set) PS_REGNUM, and there's no point in reading or setting
213 ZERO_REGNUM, it's always 0. We also can not set BADVADDR, CAUSE,
214 or FCRIR via ptrace(). */
217 mips_cannot_fetch_register (int regno
)
219 const struct target_desc
*tdesc
;
221 if (get_usrregs_info ()->regmap
[regno
] == -1)
224 tdesc
= current_process ()->tdesc
;
226 /* On n32 we can't access 64-bit registers via PTRACE_PEEKUSR. */
227 if (register_size (tdesc
, regno
) > sizeof (PTRACE_XFER_TYPE
))
230 if (find_regno (tdesc
, "r0") == regno
)
237 mips_cannot_store_register (int regno
)
239 const struct target_desc
*tdesc
;
241 if (get_usrregs_info ()->regmap
[regno
] == -1)
244 tdesc
= current_process ()->tdesc
;
246 /* On n32 we can't access 64-bit registers via PTRACE_POKEUSR. */
247 if (register_size (tdesc
, regno
) > sizeof (PTRACE_XFER_TYPE
))
250 if (find_regno (tdesc
, "r0") == regno
)
253 if (find_regno (tdesc
, "cause") == regno
)
256 if (find_regno (tdesc
, "badvaddr") == regno
)
259 if (find_regno (tdesc
, "fir") == regno
)
266 mips_fetch_register (struct regcache
*regcache
, int regno
)
268 const struct target_desc
*tdesc
= current_process ()->tdesc
;
270 if (find_regno (tdesc
, "r0") == regno
)
272 supply_register_zeroed (regcache
, regno
);
280 mips_get_pc (struct regcache
*regcache
)
282 union mips_register pc
;
283 collect_register_by_name (regcache
, "pc", pc
.buf
);
284 return register_size (regcache
->tdesc
, 0) == 4 ? pc
.reg32
: pc
.reg64
;
288 mips_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
290 union mips_register newpc
;
291 if (register_size (regcache
->tdesc
, 0) == 4)
296 supply_register_by_name (regcache
, "pc", newpc
.buf
);
299 /* Correct in either endianness. */
300 static const unsigned int mips_breakpoint
= 0x0005000d;
301 #define mips_breakpoint_len 4
303 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
305 static const gdb_byte
*
306 mips_sw_breakpoint_from_kind (int kind
, int *size
)
308 *size
= mips_breakpoint_len
;
309 return (const gdb_byte
*) &mips_breakpoint
;
313 mips_breakpoint_at (CORE_ADDR where
)
317 the_target
->read_memory (where
, (unsigned char *) &insn
, 4);
318 if (insn
== mips_breakpoint
)
321 /* If necessary, recognize more trap instructions here. GDB only uses the
326 /* Mark the watch registers of lwp, represented by ENTRY, as changed. */
329 update_watch_registers_callback (thread_info
*thread
)
331 struct lwp_info
*lwp
= get_thread_lwp (thread
);
333 /* The actual update is done later just before resuming the lwp,
334 we just mark that the registers need updating. */
335 lwp
->arch_private
->watch_registers_changed
= 1;
337 /* If the lwp isn't stopped, force it to momentarily pause, so
338 we can update its watch registers. */
340 linux_stop_lwp (lwp
);
343 /* This is the implementation of linux_target_ops method
346 static struct arch_process_info
*
347 mips_linux_new_process (void)
349 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
354 /* This is the implementation of linux_target_ops method
358 mips_linux_delete_process (struct arch_process_info
*info
)
363 /* This is the implementation of linux_target_ops method new_thread.
364 Mark the watch registers as changed, so the threads' copies will
368 mips_linux_new_thread (struct lwp_info
*lwp
)
370 struct arch_lwp_info
*info
= XCNEW (struct arch_lwp_info
);
372 info
->watch_registers_changed
= 1;
374 lwp
->arch_private
= info
;
377 /* Function to call when a thread is being deleted. */
380 mips_linux_delete_thread (struct arch_lwp_info
*arch_lwp
)
385 /* Create a new mips_watchpoint and add it to the list. */
388 mips_add_watchpoint (struct arch_process_info
*priv
, CORE_ADDR addr
, int len
,
389 enum target_hw_bp_type watch_type
)
391 struct mips_watchpoint
*new_watch
;
392 struct mips_watchpoint
**pw
;
394 new_watch
= XNEW (struct mips_watchpoint
);
395 new_watch
->addr
= addr
;
396 new_watch
->len
= len
;
397 new_watch
->type
= watch_type
;
398 new_watch
->next
= NULL
;
400 pw
= &priv
->current_watches
;
406 /* Hook to call when a new fork is attached. */
409 mips_linux_new_fork (struct process_info
*parent
,
410 struct process_info
*child
)
412 struct arch_process_info
*parent_private
;
413 struct arch_process_info
*child_private
;
414 struct mips_watchpoint
*wp
;
416 /* These are allocated by linux_add_process. */
417 gdb_assert (parent
->priv
!= NULL
418 && parent
->priv
->arch_private
!= NULL
);
419 gdb_assert (child
->priv
!= NULL
420 && child
->priv
->arch_private
!= NULL
);
422 /* Linux kernel before 2.6.33 commit
423 72f674d203cd230426437cdcf7dd6f681dad8b0d
424 will inherit hardware debug registers from parent
425 on fork/vfork/clone. Newer Linux kernels create such tasks with
426 zeroed debug registers.
428 GDB core assumes the child inherits the watchpoints/hw
429 breakpoints of the parent, and will remove them all from the
430 forked off process. Copy the debug registers mirrors into the
431 new process so that all breakpoints and watchpoints can be
432 removed together. The debug registers mirror will become zeroed
433 in the end before detaching the forked off process, thus making
434 this compatible with older Linux kernels too. */
436 parent_private
= parent
->priv
->arch_private
;
437 child_private
= child
->priv
->arch_private
;
439 child_private
->watch_readback_valid
= parent_private
->watch_readback_valid
;
440 child_private
->watch_readback
= parent_private
->watch_readback
;
442 for (wp
= parent_private
->current_watches
; wp
!= NULL
; wp
= wp
->next
)
443 mips_add_watchpoint (child_private
, wp
->addr
, wp
->len
, wp
->type
);
445 child_private
->watch_mirror
= parent_private
->watch_mirror
;
447 /* This is the implementation of linux_target_ops method
448 prepare_to_resume. If the watch regs have changed, update the
452 mips_linux_prepare_to_resume (struct lwp_info
*lwp
)
454 ptid_t ptid
= ptid_of (get_lwp_thread (lwp
));
455 struct process_info
*proc
= find_process_pid (ptid
.pid ());
456 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
458 if (lwp
->arch_private
->watch_registers_changed
)
460 /* Only update the watch registers if we have set or unset a
461 watchpoint already. */
462 if (mips_linux_watch_get_num_valid (&priv
->watch_mirror
) > 0)
464 /* Write the mirrored watch register values. */
465 int tid
= ptid
.lwp ();
467 if (-1 == ptrace (PTRACE_SET_WATCH_REGS
, tid
,
468 &priv
->watch_mirror
, NULL
))
469 perror_with_name ("Couldn't write watch register");
472 lwp
->arch_private
->watch_registers_changed
= 0;
477 mips_supports_z_point_type (char z_type
)
481 case Z_PACKET_WRITE_WP
:
482 case Z_PACKET_READ_WP
:
483 case Z_PACKET_ACCESS_WP
:
490 /* This is the implementation of linux_target_ops method
494 mips_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
495 int len
, struct raw_breakpoint
*bp
)
497 struct process_info
*proc
= current_process ();
498 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
499 struct pt_watch_regs regs
;
501 enum target_hw_bp_type watch_type
;
504 lwpid
= lwpid_of (current_thread
);
505 if (!mips_linux_read_watch_registers (lwpid
,
506 &priv
->watch_readback
,
507 &priv
->watch_readback_valid
,
514 regs
= priv
->watch_readback
;
515 /* Add the current watches. */
516 mips_linux_watch_populate_regs (priv
->current_watches
, ®s
);
518 /* Now try to add the new watch. */
519 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
520 irw
= mips_linux_watch_type_to_irw (watch_type
);
521 if (!mips_linux_watch_try_one_watch (®s
, addr
, len
, irw
))
524 /* It fit. Stick it on the end of the list. */
525 mips_add_watchpoint (priv
, addr
, len
, watch_type
);
527 priv
->watch_mirror
= regs
;
529 /* Only update the threads of this process. */
530 for_each_thread (proc
->pid
, update_watch_registers_callback
);
535 /* This is the implementation of linux_target_ops method
539 mips_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
540 int len
, struct raw_breakpoint
*bp
)
542 struct process_info
*proc
= current_process ();
543 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
546 enum target_hw_bp_type watch_type
;
548 struct mips_watchpoint
**pw
;
549 struct mips_watchpoint
*w
;
551 /* Search for a known watch that matches. Then unlink and free it. */
552 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
554 pw
= &priv
->current_watches
;
557 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== watch_type
)
568 return -1; /* We don't know about it, fail doing nothing. */
570 /* At this point watch_readback is known to be valid because we
571 could not have added the watch without reading it. */
572 gdb_assert (priv
->watch_readback_valid
== 1);
574 priv
->watch_mirror
= priv
->watch_readback
;
575 mips_linux_watch_populate_regs (priv
->current_watches
,
576 &priv
->watch_mirror
);
578 /* Only update the threads of this process. */
579 for_each_thread (proc
->pid
, update_watch_registers_callback
);
584 /* This is the implementation of linux_target_ops method
585 stopped_by_watchpoint. The watchhi R and W bits indicate
586 the watch register triggered. */
589 mips_stopped_by_watchpoint (void)
591 struct process_info
*proc
= current_process ();
592 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
595 long lwpid
= lwpid_of (current_thread
);
597 if (!mips_linux_read_watch_registers (lwpid
,
598 &priv
->watch_readback
,
599 &priv
->watch_readback_valid
,
603 num_valid
= mips_linux_watch_get_num_valid (&priv
->watch_readback
);
605 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
606 if (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
613 /* This is the implementation of linux_target_ops method
614 stopped_data_address. */
617 mips_stopped_data_address (void)
619 struct process_info
*proc
= current_process ();
620 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
623 long lwpid
= lwpid_of (current_thread
);
625 /* On MIPS we don't know the low order 3 bits of the data address.
626 GDB does not support remote targets that can't report the
627 watchpoint address. So, make our best guess; return the starting
628 address of a watchpoint request which overlaps the one that
631 if (!mips_linux_read_watch_registers (lwpid
,
632 &priv
->watch_readback
,
633 &priv
->watch_readback_valid
,
637 num_valid
= mips_linux_watch_get_num_valid (&priv
->watch_readback
);
639 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
640 if (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
643 CORE_ADDR t_low
, t_hi
;
645 struct mips_watchpoint
*watch
;
647 t_low
= mips_linux_watch_get_watchlo (&priv
->watch_readback
, n
);
648 t_irw
= t_low
& IRW_MASK
;
649 t_hi
= (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
651 t_low
&= ~(CORE_ADDR
)t_hi
;
653 for (watch
= priv
->current_watches
;
657 CORE_ADDR addr
= watch
->addr
;
658 CORE_ADDR last_byte
= addr
+ watch
->len
- 1;
660 if ((t_irw
& mips_linux_watch_type_to_irw (watch
->type
)) == 0)
662 /* Different type. */
665 /* Check for overlap of even a single byte. */
666 if (last_byte
>= t_low
&& addr
<= t_low
+ t_hi
)
671 /* Shouldn't happen. */
675 /* Fetch the thread-local storage pointer for libthread_db. */
678 ps_get_thread_area (struct ps_prochandle
*ph
,
679 lwpid_t lwpid
, int idx
, void **base
)
681 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
684 /* IDX is the bias from the thread pointer to the beginning of the
685 thread descriptor. It has to be subtracted due to implementation
686 quirks in libthread_db. */
687 *base
= (void *) ((char *)*base
- idx
);
693 mips_collect_register (struct regcache
*regcache
,
694 int use_64bit
, int regno
, union mips_register
*reg
)
696 union mips_register tmp_reg
;
700 collect_register (regcache
, regno
, &tmp_reg
.reg64
);
705 collect_register (regcache
, regno
, &tmp_reg
.reg32
);
706 reg
->reg64
= tmp_reg
.reg32
;
711 mips_supply_register (struct regcache
*regcache
,
712 int use_64bit
, int regno
, const union mips_register
*reg
)
716 /* For big-endian 32-bit targets, ignore the high four bytes of each
718 if (__BYTE_ORDER
== __BIG_ENDIAN
&& !use_64bit
)
721 supply_register (regcache
, regno
, reg
->buf
+ offset
);
724 #ifdef HAVE_PTRACE_GETREGS
727 mips_collect_register_32bit (struct regcache
*regcache
,
728 int use_64bit
, int regno
, unsigned char *buf
)
730 union mips_register tmp_reg
;
733 mips_collect_register (regcache
, use_64bit
, regno
, &tmp_reg
);
734 reg32
= tmp_reg
.reg64
;
735 memcpy (buf
, ®32
, 4);
739 mips_supply_register_32bit (struct regcache
*regcache
,
740 int use_64bit
, int regno
, const unsigned char *buf
)
742 union mips_register tmp_reg
;
745 memcpy (®32
, buf
, 4);
746 tmp_reg
.reg64
= reg32
;
747 mips_supply_register (regcache
, use_64bit
, regno
, &tmp_reg
);
751 mips_fill_gregset (struct regcache
*regcache
, void *buf
)
753 union mips_register
*regset
= (union mips_register
*) buf
;
755 const struct target_desc
*tdesc
= regcache
->tdesc
;
757 use_64bit
= (register_size (tdesc
, 0) == 8);
759 for (i
= 1; i
< 32; i
++)
760 mips_collect_register (regcache
, use_64bit
, i
, regset
+ i
);
762 mips_collect_register (regcache
, use_64bit
,
763 find_regno (tdesc
, "lo"), regset
+ 32);
764 mips_collect_register (regcache
, use_64bit
,
765 find_regno (tdesc
, "hi"), regset
+ 33);
766 mips_collect_register (regcache
, use_64bit
,
767 find_regno (tdesc
, "pc"), regset
+ 34);
768 mips_collect_register (regcache
, use_64bit
,
769 find_regno (tdesc
, "badvaddr"), regset
+ 35);
770 mips_collect_register (regcache
, use_64bit
,
771 find_regno (tdesc
, "status"), regset
+ 36);
772 mips_collect_register (regcache
, use_64bit
,
773 find_regno (tdesc
, "cause"), regset
+ 37);
775 mips_collect_register (regcache
, use_64bit
,
776 find_regno (tdesc
, "restart"), regset
+ 0);
780 mips_store_gregset (struct regcache
*regcache
, const void *buf
)
782 const union mips_register
*regset
= (const union mips_register
*) buf
;
785 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
787 supply_register_by_name_zeroed (regcache
, "r0");
789 for (i
= 1; i
< 32; i
++)
790 mips_supply_register (regcache
, use_64bit
, i
, regset
+ i
);
792 mips_supply_register (regcache
, use_64bit
,
793 find_regno (regcache
->tdesc
, "lo"), regset
+ 32);
794 mips_supply_register (regcache
, use_64bit
,
795 find_regno (regcache
->tdesc
, "hi"), regset
+ 33);
796 mips_supply_register (regcache
, use_64bit
,
797 find_regno (regcache
->tdesc
, "pc"), regset
+ 34);
798 mips_supply_register (regcache
, use_64bit
,
799 find_regno (regcache
->tdesc
, "badvaddr"), regset
+ 35);
800 mips_supply_register (regcache
, use_64bit
,
801 find_regno (regcache
->tdesc
, "status"), regset
+ 36);
802 mips_supply_register (regcache
, use_64bit
,
803 find_regno (regcache
->tdesc
, "cause"), regset
+ 37);
805 mips_supply_register (regcache
, use_64bit
,
806 find_regno (regcache
->tdesc
, "restart"), regset
+ 0);
810 mips_fill_fpregset (struct regcache
*regcache
, void *buf
)
812 union mips_register
*regset
= (union mips_register
*) buf
;
813 int i
, use_64bit
, first_fp
, big_endian
;
815 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
816 first_fp
= find_regno (regcache
->tdesc
, "f0");
817 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
819 /* See GDB for a discussion of this peculiar layout. */
820 for (i
= 0; i
< 32; i
++)
822 collect_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
824 collect_register (regcache
, first_fp
+ i
,
825 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
827 mips_collect_register_32bit (regcache
, use_64bit
,
828 find_regno (regcache
->tdesc
, "fcsr"), regset
[32].buf
);
829 mips_collect_register_32bit (regcache
, use_64bit
,
830 find_regno (regcache
->tdesc
, "fir"),
835 mips_store_fpregset (struct regcache
*regcache
, const void *buf
)
837 const union mips_register
*regset
= (const union mips_register
*) buf
;
838 int i
, use_64bit
, first_fp
, big_endian
;
840 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
841 first_fp
= find_regno (regcache
->tdesc
, "f0");
842 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
844 /* See GDB for a discussion of this peculiar layout. */
845 for (i
= 0; i
< 32; i
++)
847 supply_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
849 supply_register (regcache
, first_fp
+ i
,
850 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
852 mips_supply_register_32bit (regcache
, use_64bit
,
853 find_regno (regcache
->tdesc
, "fcsr"),
855 mips_supply_register_32bit (regcache
, use_64bit
,
856 find_regno (regcache
->tdesc
, "fir"),
859 #endif /* HAVE_PTRACE_GETREGS */
861 /* Take care of 32-bit registers with 64-bit ptrace, POKEUSER side. */
864 mips_collect_ptrace_register (struct regcache
*regcache
,
865 int regno
, char *buf
)
867 int use_64bit
= sizeof (PTRACE_XFER_TYPE
) == 8;
869 if (use_64bit
&& register_size (regcache
->tdesc
, regno
) == 4)
871 union mips_register reg
;
873 mips_collect_register (regcache
, 0, regno
, ®
);
874 memcpy (buf
, ®
, sizeof (reg
));
877 collect_register (regcache
, regno
, buf
);
880 /* Take care of 32-bit registers with 64-bit ptrace, PEEKUSER side. */
883 mips_supply_ptrace_register (struct regcache
*regcache
,
884 int regno
, const char *buf
)
886 int use_64bit
= sizeof (PTRACE_XFER_TYPE
) == 8;
888 if (use_64bit
&& register_size (regcache
->tdesc
, regno
) == 4)
890 union mips_register reg
;
892 memcpy (®
, buf
, sizeof (reg
));
893 mips_supply_register (regcache
, 0, regno
, ®
);
896 supply_register (regcache
, regno
, buf
);
899 static struct regset_info mips_regsets
[] = {
900 #ifdef HAVE_PTRACE_GETREGS
901 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, 38 * 8, GENERAL_REGS
,
902 mips_fill_gregset
, mips_store_gregset
},
903 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, 33 * 8, FP_REGS
,
904 mips_fill_fpregset
, mips_store_fpregset
},
905 #endif /* HAVE_PTRACE_GETREGS */
909 static struct regsets_info mips_regsets_info
=
911 mips_regsets
, /* regsets */
913 NULL
, /* disabled_regsets */
916 static struct usrregs_info mips_dsp_usrregs_info
=
922 static struct usrregs_info mips_usrregs_info
=
928 static struct regs_info dsp_regs_info
=
930 mips_dsp_regset_bitmap
,
931 &mips_dsp_usrregs_info
,
935 static struct regs_info regs_info
=
937 NULL
, /* regset_bitmap */
942 static const struct regs_info
*
943 mips_regs_info (void)
946 return &dsp_regs_info
;
951 struct linux_target_ops the_low_target
= {
954 mips_cannot_fetch_register
,
955 mips_cannot_store_register
,
959 NULL
, /* breakpoint_kind_from_pc */
960 mips_sw_breakpoint_from_kind
,
961 NULL
, /* get_next_pcs */
964 mips_supports_z_point_type
,
967 mips_stopped_by_watchpoint
,
968 mips_stopped_data_address
,
969 mips_collect_ptrace_register
,
970 mips_supply_ptrace_register
,
971 NULL
, /* siginfo_fixup */
972 mips_linux_new_process
,
973 mips_linux_delete_process
,
974 mips_linux_new_thread
,
975 mips_linux_delete_thread
,
977 mips_linux_prepare_to_resume
980 /* The linux target ops object. */
982 linux_process_target
*the_linux_target
= &the_mips_target
;
985 initialize_low_arch (void)
987 /* Initialize the Linux target descriptions. */
988 init_registers_mips_linux ();
989 init_registers_mips_dsp_linux ();
990 init_registers_mips64_linux ();
991 init_registers_mips64_dsp_linux ();
993 initialize_regsets_info (&mips_regsets_info
);