gdbserver/linux-mips-low.cc

   1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2020 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 #include "nat/gdb_ptrace.h"
  23 #include <endian.h>
  24
  25 #include "nat/mips-linux-watch.h"
  26 #include "gdb_proc_service.h"
  27
  28 /* Linux target op definitions for the MIPS architecture.  */
  29
  30 class mips_target : public linux_process_target
  31 {
  32 public:
  33
  34 };
  35
  36 /* The singleton target ops object.  */
  37
  38 static mips_target the_mips_target;
  39
  40 /* Defined in auto-generated file mips-linux.c.  */
  41 void init_registers_mips_linux (void);
  42 extern const struct target_desc *tdesc_mips_linux;
  43
  44 /* Defined in auto-generated file mips-dsp-linux.c.  */
  45 void init_registers_mips_dsp_linux (void);
  46 extern const struct target_desc *tdesc_mips_dsp_linux;
  47
  48 /* Defined in auto-generated file mips64-linux.c.  */
  49 void init_registers_mips64_linux (void);
  50 extern const struct target_desc *tdesc_mips64_linux;
  51
  52 /* Defined in auto-generated file mips64-dsp-linux.c.  */
  53 void init_registers_mips64_dsp_linux (void);
  54 extern const struct target_desc *tdesc_mips64_dsp_linux;
  55
  56 #ifdef __mips64
  57 #define tdesc_mips_linux tdesc_mips64_linux
  58 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
  59 #endif
  60
  61 #ifndef PTRACE_GET_THREAD_AREA
  62 #define PTRACE_GET_THREAD_AREA 25
  63 #endif
  64
  65 #ifdef HAVE_SYS_REG_H
  66 #include <sys/reg.h>
  67 #endif
  68
  69 #define mips_num_regs 73
  70 #define mips_dsp_num_regs 80
  71
  72 #include <asm/ptrace.h>
  73
  74 #ifndef DSP_BASE
  75 #define DSP_BASE 71
  76 #define DSP_CONTROL 77
  77 #endif
  78
  79 union mips_register
  80 {
  81   unsigned char buf[8];
  82
  83   /* Deliberately signed, for proper sign extension.  */
  84   int reg32;
  85   long long reg64;
  86 };
  87
  88 /* Return the ptrace ``address'' of register REGNO. */
  89
  90 #define mips_base_regs                                                  \
  91   -1,  1,  2,  3,  4,  5,  6,  7,                                       \
  92   8,  9,  10, 11, 12, 13, 14, 15,                                       \
  93   16, 17, 18, 19, 20, 21, 22, 23,                                       \
  94   24, 25, 26, 27, 28, 29, 30, 31,                                       \
  95                                                                         \
  96   -1, MMLO, MMHI, BADVADDR, CAUSE, PC,                                  \
  97                                                                         \
  98   FPR_BASE,      FPR_BASE + 1,  FPR_BASE + 2,  FPR_BASE + 3,            \
  99   FPR_BASE + 4,  FPR_BASE + 5,  FPR_BASE + 6,  FPR_BASE + 7,            \
 100   FPR_BASE + 8,  FPR_BASE + 9,  FPR_BASE + 10, FPR_BASE + 11,           \
 101   FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15,           \
 102   FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19,           \
 103   FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23,           \
 104   FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27,           \
 105   FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31,           \
 106   FPC_CSR, FPC_EIR
 107
 108 #define mips_dsp_regs                                                   \
 109   DSP_BASE,      DSP_BASE + 1,  DSP_BASE + 2,  DSP_BASE + 3,            \
 110   DSP_BASE + 4,  DSP_BASE + 5,                                          \
 111   DSP_CONTROL
 112
 113 static int mips_regmap[mips_num_regs] = {
 114   mips_base_regs,
 115   0
 116 };
 117
 118 static int mips_dsp_regmap[mips_dsp_num_regs] = {
 119   mips_base_regs,
 120   mips_dsp_regs,
 121   0
 122 };
 123
 124 /* DSP registers are not in any regset and can only be accessed
 125    individually.  */
 126
 127 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
 128   0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
 129 };
 130
 131 static int have_dsp = -1;
 132
 133 /* Try peeking at an arbitrarily chosen DSP register and pick the available
 134    user register set accordingly.  */
 135
 136 static const struct target_desc *
 137 mips_read_description (void)
 138 {
 139   if (have_dsp < 0)
 140     {
 141       int pid = lwpid_of (current_thread);
 142
 143       errno = 0;
 144       ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
 145       switch (errno)
 146         {
 147         case 0:
 148           have_dsp = 1;
 149           break;
 150         case EIO:
 151           have_dsp = 0;
 152           break;
 153         default:
 154           perror_with_name ("ptrace");
 155           break;
 156         }
 157     }
 158
 159   return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 160 }
 161
 162 static void
 163 mips_arch_setup (void)
 164 {
 165   current_process ()->tdesc = mips_read_description ();
 166 }
 167
 168 static struct usrregs_info *
 169 get_usrregs_info (void)
 170 {
 171   const struct regs_info *regs_info = the_low_target.regs_info ();
 172
 173   return regs_info->usrregs;
 174 }
 175
 176 /* Per-process arch-specific data we want to keep.  */
 177
 178 struct arch_process_info
 179 {
 180   /* -1 if the kernel and/or CPU do not support watch registers.
 181       1 if watch_readback is valid and we can read style, num_valid
 182         and the masks.
 183       0 if we need to read the watch_readback.  */
 184
 185   int watch_readback_valid;
 186
 187   /* Cached watch register read values.  */
 188
 189   struct pt_watch_regs watch_readback;
 190
 191   /* Current watchpoint requests for this process.  */
 192
 193   struct mips_watchpoint *current_watches;
 194
 195   /* The current set of watch register values for writing the
 196      registers.  */
 197
 198   struct pt_watch_regs watch_mirror;
 199 };
 200
 201 /* Per-thread arch-specific data we want to keep.  */
 202
 203 struct arch_lwp_info
 204 {
 205   /* Non-zero if our copy differs from what's recorded in the thread.  */
 206   int watch_registers_changed;
 207 };
 208
 209 /* From mips-linux-nat.c.  */
 210
 211 /* Pseudo registers can not be read.  ptrace does not provide a way to
 212    read (or set) PS_REGNUM, and there's no point in reading or setting
 213    ZERO_REGNUM, it's always 0.  We also can not set BADVADDR, CAUSE,
 214    or FCRIR via ptrace().  */
 215
 216 static int
 217 mips_cannot_fetch_register (int regno)
 218 {
 219   const struct target_desc *tdesc;
 220
 221   if (get_usrregs_info ()->regmap[regno] == -1)
 222     return 1;
 223
 224   tdesc = current_process ()->tdesc;
 225
 226   /* On n32 we can't access 64-bit registers via PTRACE_PEEKUSR.  */
 227   if (register_size (tdesc, regno) > sizeof (PTRACE_XFER_TYPE))
 228     return 1;
 229
 230   if (find_regno (tdesc, "r0") == regno)
 231     return 1;
 232
 233   return 0;
 234 }
 235
 236 static int
 237 mips_cannot_store_register (int regno)
 238 {
 239   const struct target_desc *tdesc;
 240
 241   if (get_usrregs_info ()->regmap[regno] == -1)
 242     return 1;
 243
 244   tdesc = current_process ()->tdesc;
 245
 246   /* On n32 we can't access 64-bit registers via PTRACE_POKEUSR.  */
 247   if (register_size (tdesc, regno) > sizeof (PTRACE_XFER_TYPE))
 248     return 1;
 249
 250   if (find_regno (tdesc, "r0") == regno)
 251     return 1;
 252
 253   if (find_regno (tdesc, "cause") == regno)
 254     return 1;
 255
 256   if (find_regno (tdesc, "badvaddr") == regno)
 257     return 1;
 258
 259   if (find_regno (tdesc, "fir") == regno)
 260     return 1;
 261
 262   return 0;
 263 }
 264
 265 static int
 266 mips_fetch_register (struct regcache *regcache, int regno)
 267 {
 268   const struct target_desc *tdesc = current_process ()->tdesc;
 269
 270   if (find_regno (tdesc, "r0") == regno)
 271     {
 272       supply_register_zeroed (regcache, regno);
 273       return 1;
 274     }
 275
 276   return 0;
 277 }
 278
 279 static CORE_ADDR
 280 mips_get_pc (struct regcache *regcache)
 281 {
 282   union mips_register pc;
 283   collect_register_by_name (regcache, "pc", pc.buf);
 284   return register_size (regcache->tdesc, 0) == 4 ? pc.reg32 : pc.reg64;
 285 }
 286
 287 static void
 288 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
 289 {
 290   union mips_register newpc;
 291   if (register_size (regcache->tdesc, 0) == 4)
 292     newpc.reg32 = pc;
 293   else
 294     newpc.reg64 = pc;
 295
 296   supply_register_by_name (regcache, "pc", newpc.buf);
 297 }
 298
 299 /* Correct in either endianness.  */
 300 static const unsigned int mips_breakpoint = 0x0005000d;
 301 #define mips_breakpoint_len 4
 302
 303 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 304
 305 static const gdb_byte *
 306 mips_sw_breakpoint_from_kind (int kind, int *size)
 307 {
 308   *size = mips_breakpoint_len;
 309   return (const gdb_byte *) &mips_breakpoint;
 310 }
 311
 312 static int
 313 mips_breakpoint_at (CORE_ADDR where)
 314 {
 315   unsigned int insn;
 316
 317   the_target->read_memory (where, (unsigned char *) &insn, 4);
 318   if (insn == mips_breakpoint)
 319     return 1;
 320
 321   /* If necessary, recognize more trap instructions here.  GDB only uses the
 322      one.  */
 323   return 0;
 324 }
 325
 326 /* Mark the watch registers of lwp, represented by ENTRY, as changed.  */
 327
 328 static void
 329 update_watch_registers_callback (thread_info *thread)
 330 {
 331   struct lwp_info *lwp = get_thread_lwp (thread);
 332
 333   /* The actual update is done later just before resuming the lwp,
 334      we just mark that the registers need updating.  */
 335   lwp->arch_private->watch_registers_changed = 1;
 336
 337   /* If the lwp isn't stopped, force it to momentarily pause, so
 338      we can update its watch registers.  */
 339   if (!lwp->stopped)
 340     linux_stop_lwp (lwp);
 341 }
 342
 343 /* This is the implementation of linux_target_ops method
 344    new_process.  */
 345
 346 static struct arch_process_info *
 347 mips_linux_new_process (void)
 348 {
 349   struct arch_process_info *info = XCNEW (struct arch_process_info);
 350
 351   return info;
 352 }
 353
 354 /* This is the implementation of linux_target_ops method
 355    delete_process.  */
 356
 357 static void
 358 mips_linux_delete_process (struct arch_process_info *info)
 359 {
 360   xfree (info);
 361 }
 362
 363 /* This is the implementation of linux_target_ops method new_thread.
 364    Mark the watch registers as changed, so the threads' copies will
 365    be updated.  */
 366
 367 static void
 368 mips_linux_new_thread (struct lwp_info *lwp)
 369 {
 370   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 371
 372   info->watch_registers_changed = 1;
 373
 374   lwp->arch_private = info;
 375 }
 376
 377 /* Function to call when a thread is being deleted.  */
 378
 379 static void
 380 mips_linux_delete_thread (struct arch_lwp_info *arch_lwp)
 381 {
 382   xfree (arch_lwp);
 383 }
 384
 385 /* Create a new mips_watchpoint and add it to the list.  */
 386
 387 static void
 388 mips_add_watchpoint (struct arch_process_info *priv, CORE_ADDR addr, int len,
 389                      enum target_hw_bp_type watch_type)
 390 {
 391   struct mips_watchpoint *new_watch;
 392   struct mips_watchpoint **pw;
 393
 394   new_watch = XNEW (struct mips_watchpoint);
 395   new_watch->addr = addr;
 396   new_watch->len = len;
 397   new_watch->type = watch_type;
 398   new_watch->next = NULL;
 399
 400   pw = &priv->current_watches;
 401   while (*pw != NULL)
 402     pw = &(*pw)->next;
 403   *pw = new_watch;
 404 }
 405
 406 /* Hook to call when a new fork is attached.  */
 407
 408 static void
 409 mips_linux_new_fork (struct process_info *parent,
 410                         struct process_info *child)
 411 {
 412   struct arch_process_info *parent_private;
 413   struct arch_process_info *child_private;
 414   struct mips_watchpoint *wp;
 415
 416   /* These are allocated by linux_add_process.  */
 417   gdb_assert (parent->priv != NULL
 418               && parent->priv->arch_private != NULL);
 419   gdb_assert (child->priv != NULL
 420               && child->priv->arch_private != NULL);
 421
 422   /* Linux kernel before 2.6.33 commit
 423      72f674d203cd230426437cdcf7dd6f681dad8b0d
 424      will inherit hardware debug registers from parent
 425      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 426      zeroed debug registers.
 427
 428      GDB core assumes the child inherits the watchpoints/hw
 429      breakpoints of the parent, and will remove them all from the
 430      forked off process.  Copy the debug registers mirrors into the
 431      new process so that all breakpoints and watchpoints can be
 432      removed together.  The debug registers mirror will become zeroed
 433      in the end before detaching the forked off process, thus making
 434      this compatible with older Linux kernels too.  */
 435
 436   parent_private = parent->priv->arch_private;
 437   child_private = child->priv->arch_private;
 438
 439   child_private->watch_readback_valid = parent_private->watch_readback_valid;
 440   child_private->watch_readback = parent_private->watch_readback;
 441
 442   for (wp = parent_private->current_watches; wp != NULL; wp = wp->next)
 443     mips_add_watchpoint (child_private, wp->addr, wp->len, wp->type);
 444
 445   child_private->watch_mirror = parent_private->watch_mirror;
 446 }
 447 /* This is the implementation of linux_target_ops method
 448    prepare_to_resume.  If the watch regs have changed, update the
 449    thread's copies.  */
 450
 451 static void
 452 mips_linux_prepare_to_resume (struct lwp_info *lwp)
 453 {
 454   ptid_t ptid = ptid_of (get_lwp_thread (lwp));
 455   struct process_info *proc = find_process_pid (ptid.pid ());
 456   struct arch_process_info *priv = proc->priv->arch_private;
 457
 458   if (lwp->arch_private->watch_registers_changed)
 459     {
 460       /* Only update the watch registers if we have set or unset a
 461          watchpoint already.  */
 462       if (mips_linux_watch_get_num_valid (&priv->watch_mirror) > 0)
 463         {
 464           /* Write the mirrored watch register values.  */
 465           int tid = ptid.lwp ();
 466
 467           if (-1 == ptrace (PTRACE_SET_WATCH_REGS, tid,
 468                             &priv->watch_mirror, NULL))
 469             perror_with_name ("Couldn't write watch register");
 470         }
 471
 472       lwp->arch_private->watch_registers_changed = 0;
 473     }
 474 }
 475
 476 static int
 477 mips_supports_z_point_type (char z_type)
 478 {
 479   switch (z_type)
 480     {
 481     case Z_PACKET_WRITE_WP:
 482     case Z_PACKET_READ_WP:
 483     case Z_PACKET_ACCESS_WP:
 484       return 1;
 485     default:
 486       return 0;
 487     }
 488 }
 489
 490 /* This is the implementation of linux_target_ops method
 491    insert_point.  */
 492
 493 static int
 494 mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 495                    int len, struct raw_breakpoint *bp)
 496 {
 497   struct process_info *proc = current_process ();
 498   struct arch_process_info *priv = proc->priv->arch_private;
 499   struct pt_watch_regs regs;
 500   long lwpid;
 501   enum target_hw_bp_type watch_type;
 502   uint32_t irw;
 503
 504   lwpid = lwpid_of (current_thread);
 505   if (!mips_linux_read_watch_registers (lwpid,
 506                                         &priv->watch_readback,
 507                                         &priv->watch_readback_valid,
 508                                         0))
 509     return -1;
 510
 511   if (len <= 0)
 512     return -1;
 513
 514   regs = priv->watch_readback;
 515   /* Add the current watches.  */
 516   mips_linux_watch_populate_regs (priv->current_watches, &regs);
 517
 518   /* Now try to add the new watch.  */
 519   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 520   irw = mips_linux_watch_type_to_irw (watch_type);
 521   if (!mips_linux_watch_try_one_watch (&regs, addr, len, irw))
 522     return -1;
 523
 524   /* It fit.  Stick it on the end of the list.  */
 525   mips_add_watchpoint (priv, addr, len, watch_type);
 526
 527   priv->watch_mirror = regs;
 528
 529   /* Only update the threads of this process.  */
 530   for_each_thread (proc->pid, update_watch_registers_callback);
 531
 532   return 0;
 533 }
 534
 535 /* This is the implementation of linux_target_ops method
 536    remove_point.  */
 537
 538 static int
 539 mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 540                    int len, struct raw_breakpoint *bp)
 541 {
 542   struct process_info *proc = current_process ();
 543   struct arch_process_info *priv = proc->priv->arch_private;
 544
 545   int deleted_one;
 546   enum target_hw_bp_type watch_type;
 547
 548   struct mips_watchpoint **pw;
 549   struct mips_watchpoint *w;
 550
 551   /* Search for a known watch that matches.  Then unlink and free it.  */
 552   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 553   deleted_one = 0;
 554   pw = &priv->current_watches;
 555   while ((w = *pw))
 556     {
 557       if (w->addr == addr && w->len == len && w->type == watch_type)
 558         {
 559           *pw = w->next;
 560           free (w);
 561           deleted_one = 1;
 562           break;
 563         }
 564       pw = &(w->next);
 565     }
 566
 567   if (!deleted_one)
 568     return -1;  /* We don't know about it, fail doing nothing.  */
 569
 570   /* At this point watch_readback is known to be valid because we
 571      could not have added the watch without reading it.  */
 572   gdb_assert (priv->watch_readback_valid == 1);
 573
 574   priv->watch_mirror = priv->watch_readback;
 575   mips_linux_watch_populate_regs (priv->current_watches,
 576                                   &priv->watch_mirror);
 577
 578   /* Only update the threads of this process.  */
 579   for_each_thread (proc->pid, update_watch_registers_callback);
 580
 581   return 0;
 582 }
 583
 584 /* This is the implementation of linux_target_ops method
 585    stopped_by_watchpoint.  The watchhi R and W bits indicate
 586    the watch register triggered. */
 587
 588 static int
 589 mips_stopped_by_watchpoint (void)
 590 {
 591   struct process_info *proc = current_process ();
 592   struct arch_process_info *priv = proc->priv->arch_private;
 593   int n;
 594   int num_valid;
 595   long lwpid = lwpid_of (current_thread);
 596
 597   if (!mips_linux_read_watch_registers (lwpid,
 598                                         &priv->watch_readback,
 599                                         &priv->watch_readback_valid,
 600                                         1))
 601     return 0;
 602
 603   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 604
 605   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 606     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 607         & (R_MASK | W_MASK))
 608       return 1;
 609
 610   return 0;
 611 }
 612
 613 /* This is the implementation of linux_target_ops method
 614    stopped_data_address.  */
 615
 616 static CORE_ADDR
 617 mips_stopped_data_address (void)
 618 {
 619   struct process_info *proc = current_process ();
 620   struct arch_process_info *priv = proc->priv->arch_private;
 621   int n;
 622   int num_valid;
 623   long lwpid = lwpid_of (current_thread);
 624
 625   /* On MIPS we don't know the low order 3 bits of the data address.
 626      GDB does not support remote targets that can't report the
 627      watchpoint address.  So, make our best guess; return the starting
 628      address of a watchpoint request which overlaps the one that
 629      triggered.  */
 630
 631   if (!mips_linux_read_watch_registers (lwpid,
 632                                         &priv->watch_readback,
 633                                         &priv->watch_readback_valid,
 634                                         0))
 635     return 0;
 636
 637   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 638
 639   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 640     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 641         & (R_MASK | W_MASK))
 642       {
 643         CORE_ADDR t_low, t_hi;
 644         int t_irw;
 645         struct mips_watchpoint *watch;
 646
 647         t_low = mips_linux_watch_get_watchlo (&priv->watch_readback, n);
 648         t_irw = t_low & IRW_MASK;
 649         t_hi = (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 650                 | IRW_MASK);
 651         t_low &= ~(CORE_ADDR)t_hi;
 652
 653         for (watch = priv->current_watches;
 654              watch != NULL;
 655              watch = watch->next)
 656           {
 657             CORE_ADDR addr = watch->addr;
 658             CORE_ADDR last_byte = addr + watch->len - 1;
 659
 660             if ((t_irw & mips_linux_watch_type_to_irw (watch->type)) == 0)
 661               {
 662                 /* Different type.  */
 663                 continue;
 664               }
 665             /* Check for overlap of even a single byte.  */
 666             if (last_byte >= t_low && addr <= t_low + t_hi)
 667               return addr;
 668           }
 669       }
 670
 671   /* Shouldn't happen.  */
 672   return 0;
 673 }
 674
 675 /* Fetch the thread-local storage pointer for libthread_db.  */
 676
 677 ps_err_e
 678 ps_get_thread_area (struct ps_prochandle *ph,
 679                     lwpid_t lwpid, int idx, void **base)
 680 {
 681   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 682     return PS_ERR;
 683
 684   /* IDX is the bias from the thread pointer to the beginning of the
 685      thread descriptor.  It has to be subtracted due to implementation
 686      quirks in libthread_db.  */
 687   *base = (void *) ((char *)*base - idx);
 688
 689   return PS_OK;
 690 }
 691
 692 static void
 693 mips_collect_register (struct regcache *regcache,
 694                        int use_64bit, int regno, union mips_register *reg)
 695 {
 696   union mips_register tmp_reg;
 697
 698   if (use_64bit)
 699     {
 700       collect_register (regcache, regno, &tmp_reg.reg64);
 701       *reg = tmp_reg;
 702     }
 703   else
 704     {
 705       collect_register (regcache, regno, &tmp_reg.reg32);
 706       reg->reg64 = tmp_reg.reg32;
 707     }
 708 }
 709
 710 static void
 711 mips_supply_register (struct regcache *regcache,
 712                       int use_64bit, int regno, const union mips_register *reg)
 713 {
 714   int offset = 0;
 715
 716   /* For big-endian 32-bit targets, ignore the high four bytes of each
 717      eight-byte slot.  */
 718   if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
 719     offset = 4;
 720
 721   supply_register (regcache, regno, reg->buf + offset);
 722 }
 723
 724 #ifdef HAVE_PTRACE_GETREGS
 725
 726 static void
 727 mips_collect_register_32bit (struct regcache *regcache,
 728                              int use_64bit, int regno, unsigned char *buf)
 729 {
 730   union mips_register tmp_reg;
 731   int reg32;
 732
 733   mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
 734   reg32 = tmp_reg.reg64;
 735   memcpy (buf, &reg32, 4);
 736 }
 737
 738 static void
 739 mips_supply_register_32bit (struct regcache *regcache,
 740                             int use_64bit, int regno, const unsigned char *buf)
 741 {
 742   union mips_register tmp_reg;
 743   int reg32;
 744
 745   memcpy (&reg32, buf, 4);
 746   tmp_reg.reg64 = reg32;
 747   mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
 748 }
 749
 750 static void
 751 mips_fill_gregset (struct regcache *regcache, void *buf)
 752 {
 753   union mips_register *regset = (union mips_register *) buf;
 754   int i, use_64bit;
 755   const struct target_desc *tdesc = regcache->tdesc;
 756
 757   use_64bit = (register_size (tdesc, 0) == 8);
 758
 759   for (i = 1; i < 32; i++)
 760     mips_collect_register (regcache, use_64bit, i, regset + i);
 761
 762   mips_collect_register (regcache, use_64bit,
 763                          find_regno (tdesc, "lo"), regset + 32);
 764   mips_collect_register (regcache, use_64bit,
 765                          find_regno (tdesc, "hi"), regset + 33);
 766   mips_collect_register (regcache, use_64bit,
 767                          find_regno (tdesc, "pc"), regset + 34);
 768   mips_collect_register (regcache, use_64bit,
 769                          find_regno (tdesc, "badvaddr"), regset + 35);
 770   mips_collect_register (regcache, use_64bit,
 771                          find_regno (tdesc, "status"), regset + 36);
 772   mips_collect_register (regcache, use_64bit,
 773                          find_regno (tdesc, "cause"), regset + 37);
 774
 775   mips_collect_register (regcache, use_64bit,
 776                          find_regno (tdesc, "restart"), regset + 0);
 777 }
 778
 779 static void
 780 mips_store_gregset (struct regcache *regcache, const void *buf)
 781 {
 782   const union mips_register *regset = (const union mips_register *) buf;
 783   int i, use_64bit;
 784
 785   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 786
 787   supply_register_by_name_zeroed (regcache, "r0");
 788
 789   for (i = 1; i < 32; i++)
 790     mips_supply_register (regcache, use_64bit, i, regset + i);
 791
 792   mips_supply_register (regcache, use_64bit,
 793                         find_regno (regcache->tdesc, "lo"), regset + 32);
 794   mips_supply_register (regcache, use_64bit,
 795                         find_regno (regcache->tdesc, "hi"), regset + 33);
 796   mips_supply_register (regcache, use_64bit,
 797                         find_regno (regcache->tdesc, "pc"), regset + 34);
 798   mips_supply_register (regcache, use_64bit,
 799                         find_regno (regcache->tdesc, "badvaddr"), regset + 35);
 800   mips_supply_register (regcache, use_64bit,
 801                         find_regno (regcache->tdesc, "status"), regset + 36);
 802   mips_supply_register (regcache, use_64bit,
 803                         find_regno (regcache->tdesc, "cause"), regset + 37);
 804
 805   mips_supply_register (regcache, use_64bit,
 806                         find_regno (regcache->tdesc, "restart"), regset + 0);
 807 }
 808
 809 static void
 810 mips_fill_fpregset (struct regcache *regcache, void *buf)
 811 {
 812   union mips_register *regset = (union mips_register *) buf;
 813   int i, use_64bit, first_fp, big_endian;
 814
 815   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 816   first_fp = find_regno (regcache->tdesc, "f0");
 817   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 818
 819   /* See GDB for a discussion of this peculiar layout.  */
 820   for (i = 0; i < 32; i++)
 821     if (use_64bit)
 822       collect_register (regcache, first_fp + i, regset[i].buf);
 823     else
 824       collect_register (regcache, first_fp + i,
 825                         regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 826
 827   mips_collect_register_32bit (regcache, use_64bit,
 828                                find_regno (regcache->tdesc, "fcsr"), regset[32].buf);
 829   mips_collect_register_32bit (regcache, use_64bit,
 830                                find_regno (regcache->tdesc, "fir"),
 831                                regset[32].buf + 4);
 832 }
 833
 834 static void
 835 mips_store_fpregset (struct regcache *regcache, const void *buf)
 836 {
 837   const union mips_register *regset = (const union mips_register *) buf;
 838   int i, use_64bit, first_fp, big_endian;
 839
 840   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 841   first_fp = find_regno (regcache->tdesc, "f0");
 842   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 843
 844   /* See GDB for a discussion of this peculiar layout.  */
 845   for (i = 0; i < 32; i++)
 846     if (use_64bit)
 847       supply_register (regcache, first_fp + i, regset[i].buf);
 848     else
 849       supply_register (regcache, first_fp + i,
 850                        regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 851
 852   mips_supply_register_32bit (regcache, use_64bit,
 853                               find_regno (regcache->tdesc, "fcsr"),
 854                               regset[32].buf);
 855   mips_supply_register_32bit (regcache, use_64bit,
 856                               find_regno (regcache->tdesc, "fir"),
 857                               regset[32].buf + 4);
 858 }
 859 #endif /* HAVE_PTRACE_GETREGS */
 860
 861 /* Take care of 32-bit registers with 64-bit ptrace, POKEUSER side.  */
 862
 863 static void
 864 mips_collect_ptrace_register (struct regcache *regcache,
 865                               int regno, char *buf)
 866 {
 867   int use_64bit = sizeof (PTRACE_XFER_TYPE) == 8;
 868
 869   if (use_64bit && register_size (regcache->tdesc, regno) == 4)
 870     {
 871       union mips_register reg;
 872
 873       mips_collect_register (regcache, 0, regno, &reg);
 874       memcpy (buf, &reg, sizeof (reg));
 875     }
 876   else
 877     collect_register (regcache, regno, buf);
 878 }
 879
 880 /* Take care of 32-bit registers with 64-bit ptrace, PEEKUSER side.  */
 881
 882 static void
 883 mips_supply_ptrace_register (struct regcache *regcache,
 884                              int regno, const char *buf)
 885 {
 886   int use_64bit = sizeof (PTRACE_XFER_TYPE) == 8;
 887
 888   if (use_64bit && register_size (regcache->tdesc, regno) == 4)
 889     {
 890       union mips_register reg;
 891
 892       memcpy (&reg, buf, sizeof (reg));
 893       mips_supply_register (regcache, 0, regno, &reg);
 894     }
 895   else
 896     supply_register (regcache, regno, buf);
 897 }
 898
 899 static struct regset_info mips_regsets[] = {
 900 #ifdef HAVE_PTRACE_GETREGS
 901   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
 902     mips_fill_gregset, mips_store_gregset },
 903   { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
 904     mips_fill_fpregset, mips_store_fpregset },
 905 #endif /* HAVE_PTRACE_GETREGS */
 906   NULL_REGSET
 907 };
 908
 909 static struct regsets_info mips_regsets_info =
 910   {
 911     mips_regsets, /* regsets */
 912     0, /* num_regsets */
 913     NULL, /* disabled_regsets */
 914   };
 915
 916 static struct usrregs_info mips_dsp_usrregs_info =
 917   {
 918     mips_dsp_num_regs,
 919     mips_dsp_regmap,
 920   };
 921
 922 static struct usrregs_info mips_usrregs_info =
 923   {
 924     mips_num_regs,
 925     mips_regmap,
 926   };
 927
 928 static struct regs_info dsp_regs_info =
 929   {
 930     mips_dsp_regset_bitmap,
 931     &mips_dsp_usrregs_info,
 932     &mips_regsets_info
 933   };
 934
 935 static struct regs_info regs_info =
 936   {
 937     NULL, /* regset_bitmap */
 938     &mips_usrregs_info,
 939     &mips_regsets_info
 940   };
 941
 942 static const struct regs_info *
 943 mips_regs_info (void)
 944 {
 945   if (have_dsp)
 946     return &dsp_regs_info;
 947   else
 948     return &regs_info;
 949 }
 950
 951 struct linux_target_ops the_low_target = {
 952   mips_arch_setup,
 953   mips_regs_info,
 954   mips_cannot_fetch_register,
 955   mips_cannot_store_register,
 956   mips_fetch_register,
 957   mips_get_pc,
 958   mips_set_pc,
 959   NULL, /* breakpoint_kind_from_pc */
 960   mips_sw_breakpoint_from_kind,
 961   NULL, /* get_next_pcs */
 962   0,
 963   mips_breakpoint_at,
 964   mips_supports_z_point_type,
 965   mips_insert_point,
 966   mips_remove_point,
 967   mips_stopped_by_watchpoint,
 968   mips_stopped_data_address,
 969   mips_collect_ptrace_register,
 970   mips_supply_ptrace_register,
 971   NULL, /* siginfo_fixup */
 972   mips_linux_new_process,
 973   mips_linux_delete_process,
 974   mips_linux_new_thread,
 975   mips_linux_delete_thread,
 976   mips_linux_new_fork,
 977   mips_linux_prepare_to_resume
 978 };
 979
 980 /* The linux target ops object.  */
 981
 982 linux_process_target *the_linux_target = &the_mips_target;
 983
 984 void
 985 initialize_low_arch (void)
 986 {
 987   /* Initialize the Linux target descriptions.  */
 988   init_registers_mips_linux ();
 989   init_registers_mips_dsp_linux ();
 990   init_registers_mips64_linux ();
 991   init_registers_mips64_dsp_linux ();
 992
 993   initialize_regsets_info (&mips_regsets_info);
 994 }