gdbserver/linux-low: turn 'cannot_{fetch/store}_register' into methods
[deliverable/binutils-gdb.git] / gdbserver / linux-xtensa-low.cc
1 /* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
2 Copyright (C) 2007-2020 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19
20 #include "server.h"
21 #include "linux-low.h"
22
23 /* Linux target op definitions for the Xtensa architecture. */
24
25 class xtensa_target : public linux_process_target
26 {
27 public:
28
29 const regs_info *get_regs_info () override;
30
31 protected:
32
33 void low_arch_setup () override;
34
35 bool low_cannot_fetch_register (int regno) override;
36
37 bool low_cannot_store_register (int regno) override;
38 };
39
40 /* The singleton target ops object. */
41
42 static xtensa_target the_xtensa_target;
43
44 bool
45 xtensa_target::low_cannot_fetch_register (int regno)
46 {
47 gdb_assert_not_reached ("linux target op low_cannot_fetch_register "
48 "is not implemented by the target");
49 }
50
51 bool
52 xtensa_target::low_cannot_store_register (int regno)
53 {
54 gdb_assert_not_reached ("linux target op low_cannot_store_register "
55 "is not implemented by the target");
56 }
57
58 /* Defined in auto-generated file reg-xtensa.c. */
59 void init_registers_xtensa (void);
60 extern const struct target_desc *tdesc_xtensa;
61
62 #include <asm/ptrace.h>
63 #include <xtensa-config.h>
64 #include "arch/xtensa.h"
65 #include "gdb_proc_service.h"
66
67 #include "xtensa-xtregs.c"
68
69 enum regnum {
70 R_PC=0, R_PS,
71 R_LBEG, R_LEND, R_LCOUNT,
72 R_SAR,
73 R_WS, R_WB,
74 R_THREADPTR,
75 R_A0 = 64
76 };
77
78 static void
79 xtensa_fill_gregset (struct regcache *regcache, void *buf)
80 {
81 elf_greg_t* rset = (elf_greg_t*)buf;
82 const struct target_desc *tdesc = regcache->tdesc;
83 int ar0_regnum;
84 char *ptr;
85 int i;
86
87 /* Take care of AR registers. */
88
89 ar0_regnum = find_regno (tdesc, "ar0");
90 ptr = (char*)&rset[R_A0];
91
92 for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
93 {
94 collect_register (regcache, i, ptr);
95 ptr += register_size (tdesc, i);
96 }
97
98 if (XSHAL_ABI == XTHAL_ABI_CALL0)
99 {
100 int a0_regnum = find_regno (tdesc, "a0");
101 ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]];
102
103 for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
104 {
105 if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
106 ptr = (char *) &rset[R_A0];
107 collect_register (regcache, i, ptr);
108 ptr += register_size (tdesc, i);
109 }
110 }
111
112 /* Loop registers, if hardware has it. */
113
114 #if XCHAL_HAVE_LOOPS
115 collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
116 collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
117 collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
118 #endif
119
120 collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
121 collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
122 collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
123 collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
124 collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
125
126 #if XCHAL_HAVE_THREADPTR
127 collect_register_by_name (regcache, "threadptr",
128 (char *) &rset[R_THREADPTR]);
129 #endif
130 }
131
132 static void
133 xtensa_store_gregset (struct regcache *regcache, const void *buf)
134 {
135 const elf_greg_t* rset = (const elf_greg_t*)buf;
136 const struct target_desc *tdesc = regcache->tdesc;
137 int ar0_regnum;
138 char *ptr;
139 int i;
140
141 /* Take care of AR registers. */
142
143 ar0_regnum = find_regno (tdesc, "ar0");
144 ptr = (char *)&rset[R_A0];
145
146 for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
147 {
148 supply_register (regcache, i, ptr);
149 ptr += register_size (tdesc, i);
150 }
151
152 if (XSHAL_ABI == XTHAL_ABI_CALL0)
153 {
154 int a0_regnum = find_regno (tdesc, "a0");
155 ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS];
156
157 for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
158 {
159 if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
160 ptr = (char *) &rset[R_A0];
161 supply_register (regcache, i, ptr);
162 ptr += register_size (tdesc, i);
163 }
164 }
165
166 /* Loop registers, if hardware has it. */
167
168 #if XCHAL_HAVE_LOOPS
169 supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
170 supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
171 supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
172 #endif
173
174 supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
175 supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
176 supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
177 supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
178 supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
179
180 #if XCHAL_HAVE_THREADPTR
181 supply_register_by_name (regcache, "threadptr",
182 (char *) &rset[R_THREADPTR]);
183 #endif
184 }
185
186 /* Xtensa GNU/Linux PTRACE interface includes extended register set. */
187
188 static void
189 xtensa_fill_xtregset (struct regcache *regcache, void *buf)
190 {
191 const xtensa_regtable_t *ptr;
192
193 for (ptr = xtensa_regmap_table; ptr->name; ptr++)
194 {
195 collect_register_by_name (regcache, ptr->name,
196 (char*)buf + ptr->ptrace_offset);
197 }
198 }
199
200 static void
201 xtensa_store_xtregset (struct regcache *regcache, const void *buf)
202 {
203 const xtensa_regtable_t *ptr;
204
205 for (ptr = xtensa_regmap_table; ptr->name; ptr++)
206 {
207 supply_register_by_name (regcache, ptr->name,
208 (char*)buf + ptr->ptrace_offset);
209 }
210 }
211
212 static struct regset_info xtensa_regsets[] = {
213 { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
214 GENERAL_REGS,
215 xtensa_fill_gregset, xtensa_store_gregset },
216 { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
217 EXTENDED_REGS,
218 xtensa_fill_xtregset, xtensa_store_xtregset },
219 NULL_REGSET
220 };
221
222 #if XCHAL_HAVE_BE
223 #define XTENSA_BREAKPOINT {0xd2,0x0f}
224 #else
225 #define XTENSA_BREAKPOINT {0x2d,0xf0}
226 #endif
227
228 static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
229 #define xtensa_breakpoint_len 2
230
231 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
232
233 static const gdb_byte *
234 xtensa_sw_breakpoint_from_kind (int kind, int *size)
235 {
236 *size = xtensa_breakpoint_len;
237 return xtensa_breakpoint;
238 }
239
240 static int
241 xtensa_breakpoint_at (CORE_ADDR where)
242 {
243 unsigned long insn;
244
245 the_target->read_memory (where, (unsigned char *) &insn,
246 xtensa_breakpoint_len);
247 return memcmp((char *) &insn,
248 xtensa_breakpoint, xtensa_breakpoint_len) == 0;
249 }
250
251 /* Called by libthread_db. */
252
253 ps_err_e
254 ps_get_thread_area (struct ps_prochandle *ph,
255 lwpid_t lwpid, int idx, void **base)
256 {
257 xtensa_elf_gregset_t regs;
258
259 if (ptrace (PTRACE_GETREGS, lwpid, NULL, &regs) != 0)
260 return PS_ERR;
261
262 /* IDX is the bias from the thread pointer to the beginning of the
263 thread descriptor. It has to be subtracted due to implementation
264 quirks in libthread_db. */
265 *base = (void *) ((char *) regs.threadptr - idx);
266
267 return PS_OK;
268 }
269
270 static struct regsets_info xtensa_regsets_info =
271 {
272 xtensa_regsets, /* regsets */
273 0, /* num_regsets */
274 NULL, /* disabled_regsets */
275 };
276
277 static struct regs_info myregs_info =
278 {
279 NULL, /* regset_bitmap */
280 NULL, /* usrregs */
281 &xtensa_regsets_info
282 };
283
284 void
285 xtensa_target::low_arch_setup ()
286 {
287 current_process ()->tdesc = tdesc_xtensa;
288 }
289
290 /* Support for hardware single step. */
291
292 static int
293 xtensa_supports_hardware_single_step (void)
294 {
295 return 1;
296 }
297
298 const regs_info *
299 xtensa_target::get_regs_info ()
300 {
301 return &myregs_info;
302 }
303
304 struct linux_target_ops the_low_target = {
305 NULL, /* fetch_register */
306 linux_get_pc_32bit,
307 linux_set_pc_32bit,
308 NULL, /* breakpoint_kind_from_pc */
309 xtensa_sw_breakpoint_from_kind,
310 NULL,
311 0,
312 xtensa_breakpoint_at,
313 NULL, /* supports_z_point_type */
314 NULL, /* insert_point */
315 NULL, /* remove_point */
316 NULL, /* stopped_by_watchpoint */
317 NULL, /* stopped_data_address */
318 NULL, /* collect_ptrace_register */
319 NULL, /* supply_ptrace_register */
320 NULL, /* siginfo_fixup */
321 NULL, /* new_process */
322 NULL, /* delete_process */
323 NULL, /* new_thread */
324 NULL, /* delete_thread */
325 NULL, /* new_fork */
326 NULL, /* prepare_to_resume */
327 NULL, /* process_qsupported */
328 NULL, /* supports_tracepoints */
329 NULL, /* get_thread_area */
330 NULL, /* install_fast_tracepoint_jump_pad */
331 NULL, /* emit_ops */
332 NULL, /* get_min_fast_tracepoint_insn_len */
333 NULL, /* supports_range_stepping */
334 NULL, /* breakpoint_kind_from_current_state */
335 xtensa_supports_hardware_single_step,
336 };
337
338 /* The linux target ops object. */
339
340 linux_process_target *the_linux_target = &the_xtensa_target;
341
342 void
343 initialize_low_arch (void)
344 {
345 /* Initialize the Linux target descriptions. */
346 init_registers_xtensa ();
347
348 initialize_regsets_info (&xtensa_regsets_info);
349 }
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