1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2016 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian
>
62 class Output_data_plt_arm
;
64 template<bool big_endian
>
65 class Output_data_plt_arm_short
;
67 template<bool big_endian
>
68 class Output_data_plt_arm_long
;
70 template<bool big_endian
>
73 template<bool big_endian
>
74 class Arm_input_section
;
76 class Arm_exidx_cantunwind
;
78 class Arm_exidx_merged_section
;
80 class Arm_exidx_fixup
;
82 template<bool big_endian
>
83 class Arm_output_section
;
85 class Arm_exidx_input_section
;
87 template<bool big_endian
>
90 template<bool big_endian
>
91 class Arm_relocate_functions
;
93 template<bool big_endian
>
94 class Arm_output_data_got
;
96 template<bool big_endian
>
100 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
102 // Maximum branch offsets for ARM, THUMB and THUMB2.
103 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
104 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
105 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
106 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
107 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
108 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
110 // Thread Control Block size.
111 const size_t ARM_TCB_SIZE
= 8;
113 // The arm target class.
115 // This is a very simple port of gold for ARM-EABI. It is intended for
116 // supporting Android only for the time being.
119 // - Implement all static relocation types documented in arm-reloc.def.
120 // - Make PLTs more flexible for different architecture features like
122 // There are probably a lot more.
124 // Ideally we would like to avoid using global variables but this is used
125 // very in many places and sometimes in loops. If we use a function
126 // returning a static instance of Arm_reloc_property_table, it will be very
127 // slow in an threaded environment since the static instance needs to be
128 // locked. The pointer is below initialized in the
129 // Target::do_select_as_default_target() hook so that we do not spend time
130 // building the table if we are not linking ARM objects.
132 // An alternative is to to process the information in arm-reloc.def in
133 // compilation time and generate a representation of it in PODs only. That
134 // way we can avoid initialization when the linker starts.
136 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
138 // Instruction template class. This class is similar to the insn_sequence
139 // struct in bfd/elf32-arm.c.
144 // Types of instruction templates.
148 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
149 // templates with class-specific semantics. Currently this is used
150 // only by the Cortex_a8_stub class for handling condition codes in
151 // conditional branches.
152 THUMB16_SPECIAL_TYPE
,
158 // Factory methods to create instruction templates in different formats.
160 static const Insn_template
161 thumb16_insn(uint32_t data
)
162 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
164 // A Thumb conditional branch, in which the proper condition is inserted
165 // when we build the stub.
166 static const Insn_template
167 thumb16_bcond_insn(uint32_t data
)
168 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
170 static const Insn_template
171 thumb32_insn(uint32_t data
)
172 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
174 static const Insn_template
175 thumb32_b_insn(uint32_t data
, int reloc_addend
)
177 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
181 static const Insn_template
182 arm_insn(uint32_t data
)
183 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
185 static const Insn_template
186 arm_rel_insn(unsigned data
, int reloc_addend
)
187 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
189 static const Insn_template
190 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
191 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
193 // Accessors. This class is used for read-only objects so no modifiers
198 { return this->data_
; }
200 // Return the instruction sequence type of this.
203 { return this->type_
; }
205 // Return the ARM relocation type of this.
208 { return this->r_type_
; }
212 { return this->reloc_addend_
; }
214 // Return size of instruction template in bytes.
218 // Return byte-alignment of instruction template.
223 // We make the constructor private to ensure that only the factory
226 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
227 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
230 // Instruction specific data. This is used to store information like
231 // some of the instruction bits.
233 // Instruction template type.
235 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
236 unsigned int r_type_
;
237 // Relocation addend.
238 int32_t reloc_addend_
;
241 // Macro for generating code to stub types. One entry per long/short
245 DEF_STUB(long_branch_any_any) \
246 DEF_STUB(long_branch_v4t_arm_thumb) \
247 DEF_STUB(long_branch_thumb_only) \
248 DEF_STUB(long_branch_v4t_thumb_thumb) \
249 DEF_STUB(long_branch_v4t_thumb_arm) \
250 DEF_STUB(short_branch_v4t_thumb_arm) \
251 DEF_STUB(long_branch_any_arm_pic) \
252 DEF_STUB(long_branch_any_thumb_pic) \
253 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
254 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
255 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
256 DEF_STUB(long_branch_thumb_only_pic) \
257 DEF_STUB(a8_veneer_b_cond) \
258 DEF_STUB(a8_veneer_b) \
259 DEF_STUB(a8_veneer_bl) \
260 DEF_STUB(a8_veneer_blx) \
261 DEF_STUB(v4_veneer_bx)
265 #define DEF_STUB(x) arm_stub_##x,
271 // First reloc stub type.
272 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
273 // Last reloc stub type.
274 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
276 // First Cortex-A8 stub type.
277 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
278 // Last Cortex-A8 stub type.
279 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
282 arm_stub_type_last
= arm_stub_v4_veneer_bx
286 // Stub template class. Templates are meant to be read-only objects.
287 // A stub template for a stub type contains all read-only attributes
288 // common to all stubs of the same type.
293 Stub_template(Stub_type
, const Insn_template
*, size_t);
301 { return this->type_
; }
303 // Return an array of instruction templates.
306 { return this->insns_
; }
308 // Return size of template in number of instructions.
311 { return this->insn_count_
; }
313 // Return size of template in bytes.
316 { return this->size_
; }
318 // Return alignment of the stub template.
321 { return this->alignment_
; }
323 // Return whether entry point is in thumb mode.
325 entry_in_thumb_mode() const
326 { return this->entry_in_thumb_mode_
; }
328 // Return number of relocations in this template.
331 { return this->relocs_
.size(); }
333 // Return index of the I-th instruction with relocation.
335 reloc_insn_index(size_t i
) const
337 gold_assert(i
< this->relocs_
.size());
338 return this->relocs_
[i
].first
;
341 // Return the offset of the I-th instruction with relocation from the
342 // beginning of the stub.
344 reloc_offset(size_t i
) const
346 gold_assert(i
< this->relocs_
.size());
347 return this->relocs_
[i
].second
;
351 // This contains information about an instruction template with a relocation
352 // and its offset from start of stub.
353 typedef std::pair
<size_t, section_size_type
> Reloc
;
355 // A Stub_template may not be copied. We want to share templates as much
357 Stub_template(const Stub_template
&);
358 Stub_template
& operator=(const Stub_template
&);
362 // Points to an array of Insn_templates.
363 const Insn_template
* insns_
;
364 // Number of Insn_templates in insns_[].
366 // Size of templated instructions in bytes.
368 // Alignment of templated instructions.
370 // Flag to indicate if entry is in thumb mode.
371 bool entry_in_thumb_mode_
;
372 // A table of reloc instruction indices and offsets. We can find these by
373 // looking at the instruction templates but we pre-compute and then stash
374 // them here for speed.
375 std::vector
<Reloc
> relocs_
;
379 // A class for code stubs. This is a base class for different type of
380 // stubs used in the ARM target.
386 static const section_offset_type invalid_offset
=
387 static_cast<section_offset_type
>(-1);
390 Stub(const Stub_template
* stub_template
)
391 : stub_template_(stub_template
), offset_(invalid_offset
)
398 // Return the stub template.
400 stub_template() const
401 { return this->stub_template_
; }
403 // Return offset of code stub from beginning of its containing stub table.
407 gold_assert(this->offset_
!= invalid_offset
);
408 return this->offset_
;
411 // Set offset of code stub from beginning of its containing stub table.
413 set_offset(section_offset_type offset
)
414 { this->offset_
= offset
; }
416 // Return the relocation target address of the i-th relocation in the
417 // stub. This must be defined in a child class.
419 reloc_target(size_t i
)
420 { return this->do_reloc_target(i
); }
422 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
424 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
425 { this->do_write(view
, view_size
, big_endian
); }
427 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
428 // for the i-th instruction.
430 thumb16_special(size_t i
)
431 { return this->do_thumb16_special(i
); }
434 // This must be defined in the child class.
436 do_reloc_target(size_t) = 0;
438 // This may be overridden in the child class.
440 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
443 this->do_fixed_endian_write
<true>(view
, view_size
);
445 this->do_fixed_endian_write
<false>(view
, view_size
);
448 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
449 // instruction template.
451 do_thumb16_special(size_t)
452 { gold_unreachable(); }
455 // A template to implement do_write.
456 template<bool big_endian
>
458 do_fixed_endian_write(unsigned char*, section_size_type
);
461 const Stub_template
* stub_template_
;
462 // Offset within the section of containing this stub.
463 section_offset_type offset_
;
466 // Reloc stub class. These are stubs we use to fix up relocation because
467 // of limited branch ranges.
469 class Reloc_stub
: public Stub
472 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
473 // We assume we never jump to this address.
474 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
476 // Return destination address.
478 destination_address() const
480 gold_assert(this->destination_address_
!= this->invalid_address
);
481 return this->destination_address_
;
484 // Set destination address.
486 set_destination_address(Arm_address address
)
488 gold_assert(address
!= this->invalid_address
);
489 this->destination_address_
= address
;
492 // Reset destination address.
494 reset_destination_address()
495 { this->destination_address_
= this->invalid_address
; }
497 // Determine stub type for a branch of a relocation of R_TYPE going
498 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
499 // the branch target is a thumb instruction. TARGET is used for look
500 // up ARM-specific linker settings.
502 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
503 Arm_address branch_target
, bool target_is_thumb
);
505 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
506 // and an addend. Since we treat global and local symbol differently, we
507 // use a Symbol object for a global symbol and a object-index pair for
512 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
513 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
514 // and R_SYM must not be invalid_index.
515 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
516 unsigned int r_sym
, int32_t addend
)
517 : stub_type_(stub_type
), addend_(addend
)
521 this->r_sym_
= Reloc_stub::invalid_index
;
522 this->u_
.symbol
= symbol
;
526 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
527 this->r_sym_
= r_sym
;
528 this->u_
.relobj
= relobj
;
535 // Accessors: Keys are meant to be read-only object so no modifiers are
541 { return this->stub_type_
; }
543 // Return the local symbol index or invalid_index.
546 { return this->r_sym_
; }
548 // Return the symbol if there is one.
551 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
553 // Return the relobj if there is one.
556 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
558 // Whether this equals to another key k.
560 eq(const Key
& k
) const
562 return ((this->stub_type_
== k
.stub_type_
)
563 && (this->r_sym_
== k
.r_sym_
)
564 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
565 ? (this->u_
.relobj
== k
.u_
.relobj
)
566 : (this->u_
.symbol
== k
.u_
.symbol
))
567 && (this->addend_
== k
.addend_
));
570 // Return a hash value.
574 return (this->stub_type_
576 ^ gold::string_hash
<char>(
577 (this->r_sym_
!= Reloc_stub::invalid_index
)
578 ? this->u_
.relobj
->name().c_str()
579 : this->u_
.symbol
->name())
583 // Functors for STL associative containers.
587 operator()(const Key
& k
) const
588 { return k
.hash_value(); }
594 operator()(const Key
& k1
, const Key
& k2
) const
595 { return k1
.eq(k2
); }
598 // Name of key. This is mainly for debugging.
600 name() const ATTRIBUTE_UNUSED
;
604 Stub_type stub_type_
;
605 // If this is a local symbol, this is the index in the defining object.
606 // Otherwise, it is invalid_index for a global symbol.
608 // If r_sym_ is an invalid index, this points to a global symbol.
609 // Otherwise, it points to a relobj. We used the unsized and target
610 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
611 // Arm_relobj, in order to avoid making the stub class a template
612 // as most of the stub machinery is endianness-neutral. However, it
613 // may require a bit of casting done by users of this class.
616 const Symbol
* symbol
;
617 const Relobj
* relobj
;
619 // Addend associated with a reloc.
624 // Reloc_stubs are created via a stub factory. So these are protected.
625 Reloc_stub(const Stub_template
* stub_template
)
626 : Stub(stub_template
), destination_address_(invalid_address
)
632 friend class Stub_factory
;
634 // Return the relocation target address of the i-th relocation in the
637 do_reloc_target(size_t i
)
639 // All reloc stub have only one relocation.
641 return this->destination_address_
;
645 // Address of destination.
646 Arm_address destination_address_
;
649 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
650 // THUMB branch that meets the following conditions:
652 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
653 // branch address is 0xffe.
654 // 2. The branch target address is in the same page as the first word of the
656 // 3. The branch follows a 32-bit instruction which is not a branch.
658 // To do the fix up, we need to store the address of the branch instruction
659 // and its target at least. We also need to store the original branch
660 // instruction bits for the condition code in a conditional branch. The
661 // condition code is used in a special instruction template. We also want
662 // to identify input sections needing Cortex-A8 workaround quickly. We store
663 // extra information about object and section index of the code section
664 // containing a branch being fixed up. The information is used to mark
665 // the code section when we finalize the Cortex-A8 stubs.
668 class Cortex_a8_stub
: public Stub
674 // Return the object of the code section containing the branch being fixed
678 { return this->relobj_
; }
680 // Return the section index of the code section containing the branch being
684 { return this->shndx_
; }
686 // Return the source address of stub. This is the address of the original
687 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
690 source_address() const
691 { return this->source_address_
; }
693 // Return the destination address of the stub. This is the branch taken
694 // address of the original branch instruction. LSB is 1 if it is a THUMB
695 // instruction address.
697 destination_address() const
698 { return this->destination_address_
; }
700 // Return the instruction being fixed up.
702 original_insn() const
703 { return this->original_insn_
; }
706 // Cortex_a8_stubs are created via a stub factory. So these are protected.
707 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
708 unsigned int shndx
, Arm_address source_address
,
709 Arm_address destination_address
, uint32_t original_insn
)
710 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
711 source_address_(source_address
| 1U),
712 destination_address_(destination_address
),
713 original_insn_(original_insn
)
716 friend class Stub_factory
;
718 // Return the relocation target address of the i-th relocation in the
721 do_reloc_target(size_t i
)
723 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
725 // The conditional branch veneer has two relocations.
727 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
731 // All other Cortex-A8 stubs have only one relocation.
733 return this->destination_address_
;
737 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
739 do_thumb16_special(size_t);
742 // Object of the code section containing the branch being fixed up.
744 // Section index of the code section containing the branch begin fixed up.
746 // Source address of original branch.
747 Arm_address source_address_
;
748 // Destination address of the original branch.
749 Arm_address destination_address_
;
750 // Original branch instruction. This is needed for copying the condition
751 // code from a condition branch to its stub.
752 uint32_t original_insn_
;
755 // ARMv4 BX Rx branch relocation stub class.
756 class Arm_v4bx_stub
: public Stub
762 // Return the associated register.
765 { return this->reg_
; }
768 // Arm V4BX stubs are created via a stub factory. So these are protected.
769 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
770 : Stub(stub_template
), reg_(reg
)
773 friend class Stub_factory
;
775 // Return the relocation target address of the i-th relocation in the
778 do_reloc_target(size_t)
779 { gold_unreachable(); }
781 // This may be overridden in the child class.
783 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
786 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
788 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
792 // A template to implement do_write.
793 template<bool big_endian
>
795 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
797 const Insn_template
* insns
= this->stub_template()->insns();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
800 + (this->reg_
<< 16)));
801 view
+= insns
[0].size();
802 elfcpp::Swap
<32, big_endian
>::writeval(view
,
803 (insns
[1].data() + this->reg_
));
804 view
+= insns
[1].size();
805 elfcpp::Swap
<32, big_endian
>::writeval(view
,
806 (insns
[2].data() + this->reg_
));
809 // A register index (r0-r14), which is associated with the stub.
813 // Stub factory class.
818 // Return the unique instance of this class.
819 static const Stub_factory
&
822 static Stub_factory singleton
;
826 // Make a relocation stub.
828 make_reloc_stub(Stub_type stub_type
) const
830 gold_assert(stub_type
>= arm_stub_reloc_first
831 && stub_type
<= arm_stub_reloc_last
);
832 return new Reloc_stub(this->stub_templates_
[stub_type
]);
835 // Make a Cortex-A8 stub.
837 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
838 Arm_address source
, Arm_address destination
,
839 uint32_t original_insn
) const
841 gold_assert(stub_type
>= arm_stub_cortex_a8_first
842 && stub_type
<= arm_stub_cortex_a8_last
);
843 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
844 source
, destination
, original_insn
);
847 // Make an ARM V4BX relocation stub.
848 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
850 make_arm_v4bx_stub(uint32_t reg
) const
852 gold_assert(reg
< 0xf);
853 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
858 // Constructor and destructor are protected since we only return a single
859 // instance created in Stub_factory::get_instance().
863 // A Stub_factory may not be copied since it is a singleton.
864 Stub_factory(const Stub_factory
&);
865 Stub_factory
& operator=(Stub_factory
&);
867 // Stub templates. These are initialized in the constructor.
868 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
871 // A class to hold stubs for the ARM target.
873 template<bool big_endian
>
874 class Stub_table
: public Output_data
877 Stub_table(Arm_input_section
<big_endian
>* owner
)
878 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
879 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
880 prev_data_size_(0), prev_addralign_(1)
886 // Owner of this stub table.
887 Arm_input_section
<big_endian
>*
889 { return this->owner_
; }
891 // Whether this stub table is empty.
895 return (this->reloc_stubs_
.empty()
896 && this->cortex_a8_stubs_
.empty()
897 && this->arm_v4bx_stubs_
.empty());
900 // Return the current data size.
902 current_data_size() const
903 { return this->current_data_size_for_child(); }
905 // Add a STUB using KEY. The caller is responsible for avoiding addition
906 // if a STUB with the same key has already been added.
908 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
910 const Stub_template
* stub_template
= stub
->stub_template();
911 gold_assert(stub_template
->type() == key
.stub_type());
912 this->reloc_stubs_
[key
] = stub
;
914 // Assign stub offset early. We can do this because we never remove
915 // reloc stubs and they are in the beginning of the stub table.
916 uint64_t align
= stub_template
->alignment();
917 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
918 stub
->set_offset(this->reloc_stubs_size_
);
919 this->reloc_stubs_size_
+= stub_template
->size();
920 this->reloc_stubs_addralign_
=
921 std::max(this->reloc_stubs_addralign_
, align
);
924 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
925 // The caller is responsible for avoiding addition if a STUB with the same
926 // address has already been added.
928 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
930 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
931 this->cortex_a8_stubs_
.insert(value
);
934 // Add an ARM V4BX relocation stub. A register index will be retrieved
937 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
939 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
940 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
943 // Remove all Cortex-A8 stubs.
945 remove_all_cortex_a8_stubs();
947 // Look up a relocation stub using KEY. Return NULL if there is none.
949 find_reloc_stub(const Reloc_stub::Key
& key
) const
951 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
952 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
955 // Look up an arm v4bx relocation stub using the register index.
956 // Return NULL if there is none.
958 find_arm_v4bx_stub(const uint32_t reg
) const
960 gold_assert(reg
< 0xf);
961 return this->arm_v4bx_stubs_
[reg
];
964 // Relocate stubs in this stub table.
966 relocate_stubs(const Relocate_info
<32, big_endian
>*,
967 Target_arm
<big_endian
>*, Output_section
*,
968 unsigned char*, Arm_address
, section_size_type
);
970 // Update data size and alignment at the end of a relaxation pass. Return
971 // true if either data size or alignment is different from that of the
972 // previous relaxation pass.
974 update_data_size_and_addralign();
976 // Finalize stubs. Set the offsets of all stubs and mark input sections
977 // needing the Cortex-A8 workaround.
981 // Apply Cortex-A8 workaround to an address range.
983 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
984 unsigned char*, Arm_address
,
988 // Write out section contents.
990 do_write(Output_file
*);
992 // Return the required alignment.
995 { return this->prev_addralign_
; }
997 // Reset address and file offset.
999 do_reset_address_and_file_offset()
1000 { this->set_current_data_size_for_child(this->prev_data_size_
); }
1002 // Set final data size.
1004 set_final_data_size()
1005 { this->set_data_size(this->current_data_size()); }
1008 // Relocate one stub.
1010 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1011 Target_arm
<big_endian
>*, Output_section
*,
1012 unsigned char*, Arm_address
, section_size_type
);
1014 // Unordered map of relocation stubs.
1016 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1017 Reloc_stub::Key::equal_to
>
1020 // List of Cortex-A8 stubs ordered by addresses of branches being
1021 // fixed up in output.
1022 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1023 // List of Arm V4BX relocation stubs ordered by associated registers.
1024 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1026 // Owner of this stub table.
1027 Arm_input_section
<big_endian
>* owner_
;
1028 // The relocation stubs.
1029 Reloc_stub_map reloc_stubs_
;
1030 // Size of reloc stubs.
1031 off_t reloc_stubs_size_
;
1032 // Maximum address alignment of reloc stubs.
1033 uint64_t reloc_stubs_addralign_
;
1034 // The cortex_a8_stubs.
1035 Cortex_a8_stub_list cortex_a8_stubs_
;
1036 // The Arm V4BX relocation stubs.
1037 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1038 // data size of this in the previous pass.
1039 off_t prev_data_size_
;
1040 // address alignment of this in the previous pass.
1041 uint64_t prev_addralign_
;
1044 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1045 // we add to the end of an EXIDX input section that goes into the output.
1047 class Arm_exidx_cantunwind
: public Output_section_data
1050 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1051 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1054 // Return the object containing the section pointed by this.
1057 { return this->relobj_
; }
1059 // Return the section index of the section pointed by this.
1062 { return this->shndx_
; }
1066 do_write(Output_file
* of
)
1068 if (parameters
->target().is_big_endian())
1069 this->do_fixed_endian_write
<true>(of
);
1071 this->do_fixed_endian_write
<false>(of
);
1074 // Write to a map file.
1076 do_print_to_mapfile(Mapfile
* mapfile
) const
1077 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1080 // Implement do_write for a given endianness.
1081 template<bool big_endian
>
1083 do_fixed_endian_write(Output_file
*);
1085 // The object containing the section pointed by this.
1087 // The section index of the section pointed by this.
1088 unsigned int shndx_
;
1091 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1092 // Offset map is used to map input section offset within the EXIDX section
1093 // to the output offset from the start of this EXIDX section.
1095 typedef std::map
<section_offset_type
, section_offset_type
>
1096 Arm_exidx_section_offset_map
;
1098 // Arm_exidx_merged_section class. This represents an EXIDX input section
1099 // with some of its entries merged.
1101 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1104 // Constructor for Arm_exidx_merged_section.
1105 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1106 // SECTION_OFFSET_MAP points to a section offset map describing how
1107 // parts of the input section are mapped to output. DELETED_BYTES is
1108 // the number of bytes deleted from the EXIDX input section.
1109 Arm_exidx_merged_section(
1110 const Arm_exidx_input_section
& exidx_input_section
,
1111 const Arm_exidx_section_offset_map
& section_offset_map
,
1112 uint32_t deleted_bytes
);
1114 // Build output contents.
1116 build_contents(const unsigned char*, section_size_type
);
1118 // Return the original EXIDX input section.
1119 const Arm_exidx_input_section
&
1120 exidx_input_section() const
1121 { return this->exidx_input_section_
; }
1123 // Return the section offset map.
1124 const Arm_exidx_section_offset_map
&
1125 section_offset_map() const
1126 { return this->section_offset_map_
; }
1129 // Write merged section into file OF.
1131 do_write(Output_file
* of
);
1134 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1135 section_offset_type
*) const;
1138 // Original EXIDX input section.
1139 const Arm_exidx_input_section
& exidx_input_section_
;
1140 // Section offset map.
1141 const Arm_exidx_section_offset_map
& section_offset_map_
;
1142 // Merged section contents. We need to keep build the merged section
1143 // and save it here to avoid accessing the original EXIDX section when
1144 // we cannot lock the sections' object.
1145 unsigned char* section_contents_
;
1148 // A class to wrap an ordinary input section containing executable code.
1150 template<bool big_endian
>
1151 class Arm_input_section
: public Output_relaxed_input_section
1154 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1155 : Output_relaxed_input_section(relobj
, shndx
, 1),
1156 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1157 original_contents_(NULL
)
1160 ~Arm_input_section()
1161 { delete[] this->original_contents_
; }
1167 // Whether this is a stub table owner.
1169 is_stub_table_owner() const
1170 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1172 // Return the stub table.
1173 Stub_table
<big_endian
>*
1175 { return this->stub_table_
; }
1177 // Set the stub_table.
1179 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1180 { this->stub_table_
= stub_table
; }
1182 // Downcast a base pointer to an Arm_input_section pointer. This is
1183 // not type-safe but we only use Arm_input_section not the base class.
1184 static Arm_input_section
<big_endian
>*
1185 as_arm_input_section(Output_relaxed_input_section
* poris
)
1186 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1188 // Return the original size of the section.
1190 original_size() const
1191 { return this->original_size_
; }
1194 // Write data to output file.
1196 do_write(Output_file
*);
1198 // Return required alignment of this.
1200 do_addralign() const
1202 if (this->is_stub_table_owner())
1203 return std::max(this->stub_table_
->addralign(),
1204 static_cast<uint64_t>(this->original_addralign_
));
1206 return this->original_addralign_
;
1209 // Finalize data size.
1211 set_final_data_size();
1213 // Reset address and file offset.
1215 do_reset_address_and_file_offset();
1219 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1220 section_offset_type offset
,
1221 section_offset_type
* poutput
) const
1223 if ((object
== this->relobj())
1224 && (shndx
== this->shndx())
1227 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1237 // Copying is not allowed.
1238 Arm_input_section(const Arm_input_section
&);
1239 Arm_input_section
& operator=(const Arm_input_section
&);
1241 // Address alignment of the original input section.
1242 uint32_t original_addralign_
;
1243 // Section size of the original input section.
1244 uint32_t original_size_
;
1246 Stub_table
<big_endian
>* stub_table_
;
1247 // Original section contents. We have to make a copy here since the file
1248 // containing the original section may not be locked when we need to access
1250 unsigned char* original_contents_
;
1253 // Arm_exidx_fixup class. This is used to define a number of methods
1254 // and keep states for fixing up EXIDX coverage.
1256 class Arm_exidx_fixup
1259 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1260 bool merge_exidx_entries
= true)
1261 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1262 last_inlined_entry_(0), last_input_section_(NULL
),
1263 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1264 merge_exidx_entries_(merge_exidx_entries
)
1268 { delete this->section_offset_map_
; }
1270 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1271 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1272 // number of bytes to be deleted in output. If parts of the input EXIDX
1273 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1274 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1275 // responsible for releasing it.
1276 template<bool big_endian
>
1278 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1279 const unsigned char* section_contents
,
1280 section_size_type section_size
,
1281 Arm_exidx_section_offset_map
** psection_offset_map
);
1283 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1284 // input section, if there is not one already.
1286 add_exidx_cantunwind_as_needed();
1288 // Return the output section for the text section which is linked to the
1289 // first exidx input in output.
1291 first_output_text_section() const
1292 { return this->first_output_text_section_
; }
1295 // Copying is not allowed.
1296 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1297 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1299 // Type of EXIDX unwind entry.
1304 // EXIDX_CANTUNWIND.
1305 UT_EXIDX_CANTUNWIND
,
1312 // Process an EXIDX entry. We only care about the second word of the
1313 // entry. Return true if the entry can be deleted.
1315 process_exidx_entry(uint32_t second_word
);
1317 // Update the current section offset map during EXIDX section fix-up.
1318 // If there is no map, create one. INPUT_OFFSET is the offset of a
1319 // reference point, DELETED_BYTES is the number of deleted by in the
1320 // section so far. If DELETE_ENTRY is true, the reference point and
1321 // all offsets after the previous reference point are discarded.
1323 update_offset_map(section_offset_type input_offset
,
1324 section_size_type deleted_bytes
, bool delete_entry
);
1326 // EXIDX output section.
1327 Output_section
* exidx_output_section_
;
1328 // Unwind type of the last EXIDX entry processed.
1329 Unwind_type last_unwind_type_
;
1330 // Last seen inlined EXIDX entry.
1331 uint32_t last_inlined_entry_
;
1332 // Last processed EXIDX input section.
1333 const Arm_exidx_input_section
* last_input_section_
;
1334 // Section offset map created in process_exidx_section.
1335 Arm_exidx_section_offset_map
* section_offset_map_
;
1336 // Output section for the text section which is linked to the first exidx
1338 Output_section
* first_output_text_section_
;
1340 bool merge_exidx_entries_
;
1343 // Arm output section class. This is defined mainly to add a number of
1344 // stub generation methods.
1346 template<bool big_endian
>
1347 class Arm_output_section
: public Output_section
1350 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1352 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1353 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1354 elfcpp::Elf_Xword flags
)
1355 : Output_section(name
, type
,
1356 (type
== elfcpp::SHT_ARM_EXIDX
1357 ? flags
| elfcpp::SHF_LINK_ORDER
1360 if (type
== elfcpp::SHT_ARM_EXIDX
)
1361 this->set_always_keeps_input_sections();
1364 ~Arm_output_section()
1367 // Group input sections for stub generation.
1369 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1371 // Downcast a base pointer to an Arm_output_section pointer. This is
1372 // not type-safe but we only use Arm_output_section not the base class.
1373 static Arm_output_section
<big_endian
>*
1374 as_arm_output_section(Output_section
* os
)
1375 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1377 // Append all input text sections in this into LIST.
1379 append_text_sections_to_list(Text_section_list
* list
);
1381 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1382 // is a list of text input sections sorted in ascending order of their
1383 // output addresses.
1385 fix_exidx_coverage(Layout
* layout
,
1386 const Text_section_list
& sorted_text_section
,
1387 Symbol_table
* symtab
,
1388 bool merge_exidx_entries
,
1391 // Link an EXIDX section into its corresponding text section.
1393 set_exidx_section_link();
1397 typedef Output_section::Input_section Input_section
;
1398 typedef Output_section::Input_section_list Input_section_list
;
1400 // Create a stub group.
1401 void create_stub_group(Input_section_list::const_iterator
,
1402 Input_section_list::const_iterator
,
1403 Input_section_list::const_iterator
,
1404 Target_arm
<big_endian
>*,
1405 std::vector
<Output_relaxed_input_section
*>*,
1409 // Arm_exidx_input_section class. This represents an EXIDX input section.
1411 class Arm_exidx_input_section
1414 static const section_offset_type invalid_offset
=
1415 static_cast<section_offset_type
>(-1);
1417 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1418 unsigned int link
, uint32_t size
,
1419 uint32_t addralign
, uint32_t text_size
)
1420 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1421 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1424 ~Arm_exidx_input_section()
1427 // Accessors: This is a read-only class.
1429 // Return the object containing this EXIDX input section.
1432 { return this->relobj_
; }
1434 // Return the section index of this EXIDX input section.
1437 { return this->shndx_
; }
1439 // Return the section index of linked text section in the same object.
1442 { return this->link_
; }
1444 // Return size of the EXIDX input section.
1447 { return this->size_
; }
1449 // Return address alignment of EXIDX input section.
1452 { return this->addralign_
; }
1454 // Return size of the associated text input section.
1457 { return this->text_size_
; }
1459 // Whether there are any errors in the EXIDX input section.
1462 { return this->has_errors_
; }
1464 // Set has-errors flag.
1467 { this->has_errors_
= true; }
1470 // Object containing this.
1472 // Section index of this.
1473 unsigned int shndx_
;
1474 // text section linked to this in the same object.
1476 // Size of this. For ARM 32-bit is sufficient.
1478 // Address alignment of this. For ARM 32-bit is sufficient.
1479 uint32_t addralign_
;
1480 // Size of associated text section.
1481 uint32_t text_size_
;
1482 // Whether this has any errors.
1486 // Arm_relobj class.
1488 template<bool big_endian
>
1489 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1492 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1494 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1495 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1496 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1497 stub_tables_(), local_symbol_is_thumb_function_(),
1498 attributes_section_data_(NULL
), mapping_symbols_info_(),
1499 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1500 output_local_symbol_count_needs_update_(false),
1501 merge_flags_and_attributes_(true)
1505 { delete this->attributes_section_data_
; }
1507 // Return the stub table of the SHNDX-th section if there is one.
1508 Stub_table
<big_endian
>*
1509 stub_table(unsigned int shndx
) const
1511 gold_assert(shndx
< this->stub_tables_
.size());
1512 return this->stub_tables_
[shndx
];
1515 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1517 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1519 gold_assert(shndx
< this->stub_tables_
.size());
1520 this->stub_tables_
[shndx
] = stub_table
;
1523 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1524 // index. This is only valid after do_count_local_symbol is called.
1526 local_symbol_is_thumb_function(unsigned int r_sym
) const
1528 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1529 return this->local_symbol_is_thumb_function_
[r_sym
];
1532 // Scan all relocation sections for stub generation.
1534 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1537 // Convert regular input section with index SHNDX to a relaxed section.
1539 convert_input_section_to_relaxed_section(unsigned shndx
)
1541 // The stubs have relocations and we need to process them after writing
1542 // out the stubs. So relocation now must follow section write.
1543 this->set_section_offset(shndx
, -1ULL);
1544 this->set_relocs_must_follow_section_writes();
1547 // Downcast a base pointer to an Arm_relobj pointer. This is
1548 // not type-safe but we only use Arm_relobj not the base class.
1549 static Arm_relobj
<big_endian
>*
1550 as_arm_relobj(Relobj
* relobj
)
1551 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1553 // Processor-specific flags in ELF file header. This is valid only after
1556 processor_specific_flags() const
1557 { return this->processor_specific_flags_
; }
1559 // Attribute section data This is the contents of the .ARM.attribute section
1561 const Attributes_section_data
*
1562 attributes_section_data() const
1563 { return this->attributes_section_data_
; }
1565 // Mapping symbol location.
1566 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1568 // Functor for STL container.
1569 struct Mapping_symbol_position_less
1572 operator()(const Mapping_symbol_position
& p1
,
1573 const Mapping_symbol_position
& p2
) const
1575 return (p1
.first
< p2
.first
1576 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1580 // We only care about the first character of a mapping symbol, so
1581 // we only store that instead of the whole symbol name.
1582 typedef std::map
<Mapping_symbol_position
, char,
1583 Mapping_symbol_position_less
> Mapping_symbols_info
;
1585 // Whether a section contains any Cortex-A8 workaround.
1587 section_has_cortex_a8_workaround(unsigned int shndx
) const
1589 return (this->section_has_cortex_a8_workaround_
!= NULL
1590 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1593 // Mark a section that has Cortex-A8 workaround.
1595 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1597 if (this->section_has_cortex_a8_workaround_
== NULL
)
1598 this->section_has_cortex_a8_workaround_
=
1599 new std::vector
<bool>(this->shnum(), false);
1600 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1603 // Return the EXIDX section of an text section with index SHNDX or NULL
1604 // if the text section has no associated EXIDX section.
1605 const Arm_exidx_input_section
*
1606 exidx_input_section_by_link(unsigned int shndx
) const
1608 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1609 return ((p
!= this->exidx_section_map_
.end()
1610 && p
->second
->link() == shndx
)
1615 // Return the EXIDX section with index SHNDX or NULL if there is none.
1616 const Arm_exidx_input_section
*
1617 exidx_input_section_by_shndx(unsigned shndx
) const
1619 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1620 return ((p
!= this->exidx_section_map_
.end()
1621 && p
->second
->shndx() == shndx
)
1626 // Whether output local symbol count needs updating.
1628 output_local_symbol_count_needs_update() const
1629 { return this->output_local_symbol_count_needs_update_
; }
1631 // Set output_local_symbol_count_needs_update flag to be true.
1633 set_output_local_symbol_count_needs_update()
1634 { this->output_local_symbol_count_needs_update_
= true; }
1636 // Update output local symbol count at the end of relaxation.
1638 update_output_local_symbol_count();
1640 // Whether we want to merge processor-specific flags and attributes.
1642 merge_flags_and_attributes() const
1643 { return this->merge_flags_and_attributes_
; }
1645 // Export list of EXIDX section indices.
1647 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1650 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1651 p
!= this->exidx_section_map_
.end();
1654 if (p
->second
->shndx() == p
->first
)
1655 list
->push_back(p
->first
);
1657 // Sort list to make result independent of implementation of map.
1658 std::sort(list
->begin(), list
->end());
1662 // Post constructor setup.
1666 // Call parent's setup method.
1667 Sized_relobj_file
<32, big_endian
>::do_setup();
1669 // Initialize look-up tables.
1670 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1671 this->stub_tables_
.swap(empty_stub_table_list
);
1674 // Count the local symbols.
1676 do_count_local_symbols(Stringpool_template
<char>*,
1677 Stringpool_template
<char>*);
1680 do_relocate_sections(
1681 const Symbol_table
* symtab
, const Layout
* layout
,
1682 const unsigned char* pshdrs
, Output_file
* of
,
1683 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1685 // Read the symbol information.
1687 do_read_symbols(Read_symbols_data
* sd
);
1689 // Process relocs for garbage collection.
1691 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1695 // Whether a section needs to be scanned for relocation stubs.
1697 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1698 const Relobj::Output_sections
&,
1699 const Symbol_table
*, const unsigned char*);
1701 // Whether a section is a scannable text section.
1703 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1704 const Output_section
*, const Symbol_table
*);
1706 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1708 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1709 unsigned int, Output_section
*,
1710 const Symbol_table
*);
1712 // Scan a section for the Cortex-A8 erratum.
1714 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1715 unsigned int, Output_section
*,
1716 Target_arm
<big_endian
>*);
1718 // Find the linked text section of an EXIDX section by looking at the
1719 // first relocation of the EXIDX section. PSHDR points to the section
1720 // headers of a relocation section and PSYMS points to the local symbols.
1721 // PSHNDX points to a location storing the text section index if found.
1722 // Return whether we can find the linked section.
1724 find_linked_text_section(const unsigned char* pshdr
,
1725 const unsigned char* psyms
, unsigned int* pshndx
);
1728 // Make a new Arm_exidx_input_section object for EXIDX section with
1729 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1730 // index of the linked text section.
1732 make_exidx_input_section(unsigned int shndx
,
1733 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1734 unsigned int text_shndx
,
1735 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1737 // Return the output address of either a plain input section or a
1738 // relaxed input section. SHNDX is the section index.
1740 simple_input_section_output_address(unsigned int, Output_section
*);
1742 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1743 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1746 // List of stub tables.
1747 Stub_table_list stub_tables_
;
1748 // Bit vector to tell if a local symbol is a thumb function or not.
1749 // This is only valid after do_count_local_symbol is called.
1750 std::vector
<bool> local_symbol_is_thumb_function_
;
1751 // processor-specific flags in ELF file header.
1752 elfcpp::Elf_Word processor_specific_flags_
;
1753 // Object attributes if there is an .ARM.attributes section or NULL.
1754 Attributes_section_data
* attributes_section_data_
;
1755 // Mapping symbols information.
1756 Mapping_symbols_info mapping_symbols_info_
;
1757 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1758 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1759 // Map a text section to its associated .ARM.exidx section, if there is one.
1760 Exidx_section_map exidx_section_map_
;
1761 // Whether output local symbol count needs updating.
1762 bool output_local_symbol_count_needs_update_
;
1763 // Whether we merge processor flags and attributes of this object to
1765 bool merge_flags_and_attributes_
;
1768 // Arm_dynobj class.
1770 template<bool big_endian
>
1771 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1774 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1775 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1776 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1777 processor_specific_flags_(0), attributes_section_data_(NULL
)
1781 { delete this->attributes_section_data_
; }
1783 // Downcast a base pointer to an Arm_relobj pointer. This is
1784 // not type-safe but we only use Arm_relobj not the base class.
1785 static Arm_dynobj
<big_endian
>*
1786 as_arm_dynobj(Dynobj
* dynobj
)
1787 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1789 // Processor-specific flags in ELF file header. This is valid only after
1792 processor_specific_flags() const
1793 { return this->processor_specific_flags_
; }
1795 // Attributes section data.
1796 const Attributes_section_data
*
1797 attributes_section_data() const
1798 { return this->attributes_section_data_
; }
1801 // Read the symbol information.
1803 do_read_symbols(Read_symbols_data
* sd
);
1806 // processor-specific flags in ELF file header.
1807 elfcpp::Elf_Word processor_specific_flags_
;
1808 // Object attributes if there is an .ARM.attributes section or NULL.
1809 Attributes_section_data
* attributes_section_data_
;
1812 // Functor to read reloc addends during stub generation.
1814 template<int sh_type
, bool big_endian
>
1815 struct Stub_addend_reader
1817 // Return the addend for a relocation of a particular type. Depending
1818 // on whether this is a REL or RELA relocation, read the addend from a
1819 // view or from a Reloc object.
1820 elfcpp::Elf_types
<32>::Elf_Swxword
1822 unsigned int /* r_type */,
1823 const unsigned char* /* view */,
1824 const typename Reloc_types
<sh_type
,
1825 32, big_endian
>::Reloc
& /* reloc */) const;
1828 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1830 template<bool big_endian
>
1831 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1833 elfcpp::Elf_types
<32>::Elf_Swxword
1836 const unsigned char*,
1837 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1840 // Specialized Stub_addend_reader for RELA type relocation sections.
1841 // We currently do not handle RELA type relocation sections but it is trivial
1842 // to implement the addend reader. This is provided for completeness and to
1843 // make it easier to add support for RELA relocation sections in the future.
1845 template<bool big_endian
>
1846 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1848 elfcpp::Elf_types
<32>::Elf_Swxword
1851 const unsigned char*,
1852 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1853 big_endian
>::Reloc
& reloc
) const
1854 { return reloc
.get_r_addend(); }
1857 // Cortex_a8_reloc class. We keep record of relocation that may need
1858 // the Cortex-A8 erratum workaround.
1860 class Cortex_a8_reloc
1863 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1864 Arm_address destination
)
1865 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1871 // Accessors: This is a read-only class.
1873 // Return the relocation stub associated with this relocation if there is
1877 { return this->reloc_stub_
; }
1879 // Return the relocation type.
1882 { return this->r_type_
; }
1884 // Return the destination address of the relocation. LSB stores the THUMB
1888 { return this->destination_
; }
1891 // Associated relocation stub if there is one, or NULL.
1892 const Reloc_stub
* reloc_stub_
;
1894 unsigned int r_type_
;
1895 // Destination address of this relocation. LSB is used to distinguish
1897 Arm_address destination_
;
1900 // Arm_output_data_got class. We derive this from Output_data_got to add
1901 // extra methods to handle TLS relocations in a static link.
1903 template<bool big_endian
>
1904 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1907 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1908 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1911 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1912 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1913 // applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1916 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1918 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1919 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1920 // relocation that needs to be applied in a static link.
1922 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1923 Sized_relobj_file
<32, big_endian
>* relobj
,
1926 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1930 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1931 // The first one is initialized to be 1, which is the module index for
1932 // the main executable and the second one 0. A reloc of the type
1933 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1934 // be applied by gold. GSYM is a global symbol.
1936 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1938 // Same as the above but for a local symbol in OBJECT with INDEX.
1940 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1941 Sized_relobj_file
<32, big_endian
>* object
,
1942 unsigned int index
);
1945 // Write out the GOT table.
1947 do_write(Output_file
*);
1950 // This class represent dynamic relocations that need to be applied by
1951 // gold because we are using TLS relocations in a static link.
1955 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1956 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1957 { this->u_
.global
.symbol
= gsym
; }
1959 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1960 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1961 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1963 this->u_
.local
.relobj
= relobj
;
1964 this->u_
.local
.index
= index
;
1967 // Return the GOT offset.
1970 { return this->got_offset_
; }
1975 { return this->r_type_
; }
1977 // Whether the symbol is global or not.
1979 symbol_is_global() const
1980 { return this->symbol_is_global_
; }
1982 // For a relocation against a global symbol, the global symbol.
1986 gold_assert(this->symbol_is_global_
);
1987 return this->u_
.global
.symbol
;
1990 // For a relocation against a local symbol, the defining object.
1991 Sized_relobj_file
<32, big_endian
>*
1994 gold_assert(!this->symbol_is_global_
);
1995 return this->u_
.local
.relobj
;
1998 // For a relocation against a local symbol, the local symbol index.
2002 gold_assert(!this->symbol_is_global_
);
2003 return this->u_
.local
.index
;
2007 // GOT offset of the entry to which this relocation is applied.
2008 unsigned int got_offset_
;
2009 // Type of relocation.
2010 unsigned int r_type_
;
2011 // Whether this relocation is against a global symbol.
2012 bool symbol_is_global_
;
2013 // A global or local symbol.
2018 // For a global symbol, the symbol itself.
2023 // For a local symbol, the object defining object.
2024 Sized_relobj_file
<32, big_endian
>* relobj
;
2025 // For a local symbol, the symbol index.
2031 // Symbol table of the output object.
2032 Symbol_table
* symbol_table_
;
2033 // Layout of the output object.
2035 // Static relocs to be applied to the GOT.
2036 std::vector
<Static_reloc
> static_relocs_
;
2039 // The ARM target has many relocation types with odd-sizes or noncontiguous
2040 // bits. The default handling of relocatable relocation cannot process these
2041 // relocations. So we have to extend the default code.
2043 template<bool big_endian
, typename Classify_reloc
>
2044 class Arm_scan_relocatable_relocs
:
2045 public Default_scan_relocatable_relocs
<Classify_reloc
>
2048 // Return the strategy to use for a local symbol which is a section
2049 // symbol, given the relocation type.
2050 inline Relocatable_relocs::Reloc_strategy
2051 local_section_strategy(unsigned int r_type
, Relobj
*)
2053 if (Classify_reloc::sh_type
== elfcpp::SHT_RELA
)
2054 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2057 if (r_type
== elfcpp::R_ARM_TARGET1
2058 || r_type
== elfcpp::R_ARM_TARGET2
)
2060 const Target_arm
<big_endian
>* arm_target
=
2061 Target_arm
<big_endian
>::default_target();
2062 r_type
= arm_target
->get_real_reloc_type(r_type
);
2067 // Relocations that write nothing. These exclude R_ARM_TARGET1
2068 // and R_ARM_TARGET2.
2069 case elfcpp::R_ARM_NONE
:
2070 case elfcpp::R_ARM_V4BX
:
2071 case elfcpp::R_ARM_TLS_GOTDESC
:
2072 case elfcpp::R_ARM_TLS_CALL
:
2073 case elfcpp::R_ARM_TLS_DESCSEQ
:
2074 case elfcpp::R_ARM_THM_TLS_CALL
:
2075 case elfcpp::R_ARM_GOTRELAX
:
2076 case elfcpp::R_ARM_GNU_VTENTRY
:
2077 case elfcpp::R_ARM_GNU_VTINHERIT
:
2078 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2079 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2080 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2081 // These should have been converted to something else above.
2082 case elfcpp::R_ARM_TARGET1
:
2083 case elfcpp::R_ARM_TARGET2
:
2085 // Relocations that write full 32 bits and
2086 // have alignment of 1.
2087 case elfcpp::R_ARM_ABS32
:
2088 case elfcpp::R_ARM_REL32
:
2089 case elfcpp::R_ARM_SBREL32
:
2090 case elfcpp::R_ARM_GOTOFF32
:
2091 case elfcpp::R_ARM_BASE_PREL
:
2092 case elfcpp::R_ARM_GOT_BREL
:
2093 case elfcpp::R_ARM_BASE_ABS
:
2094 case elfcpp::R_ARM_ABS32_NOI
:
2095 case elfcpp::R_ARM_REL32_NOI
:
2096 case elfcpp::R_ARM_PLT32_ABS
:
2097 case elfcpp::R_ARM_GOT_ABS
:
2098 case elfcpp::R_ARM_GOT_PREL
:
2099 case elfcpp::R_ARM_TLS_GD32
:
2100 case elfcpp::R_ARM_TLS_LDM32
:
2101 case elfcpp::R_ARM_TLS_LDO32
:
2102 case elfcpp::R_ARM_TLS_IE32
:
2103 case elfcpp::R_ARM_TLS_LE32
:
2104 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2106 // For all other static relocations, return RELOC_SPECIAL.
2107 return Relocatable_relocs::RELOC_SPECIAL
;
2113 template<bool big_endian
>
2114 class Target_arm
: public Sized_target
<32, big_endian
>
2117 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2120 // When were are relocating a stub, we pass this as the relocation number.
2121 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2123 Target_arm(const Target::Target_info
* info
= &arm_info
)
2124 : Sized_target
<32, big_endian
>(info
),
2125 got_(NULL
), plt_(NULL
), got_plt_(NULL
), got_irelative_(NULL
),
2126 rel_dyn_(NULL
), rel_irelative_(NULL
), copy_relocs_(elfcpp::R_ARM_COPY
),
2127 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2128 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2129 should_force_pic_veneer_(false),
2130 arm_input_section_map_(), attributes_section_data_(NULL
),
2131 fix_cortex_a8_(false), cortex_a8_relocs_info_(),
2132 target1_reloc_(elfcpp::R_ARM_ABS32
),
2133 // This can be any reloc type but usually is R_ARM_GOT_PREL.
2134 target2_reloc_(elfcpp::R_ARM_GOT_PREL
)
2136 if (parameters
->options().user_set_target1_rel())
2138 // FIXME: This is not strictly compatible with ld, which allows both
2139 // --target1-abs and --target-rel to be given.
2140 if (parameters
->options().user_set_target1_abs())
2141 gold_error(_("Cannot use both --target1-abs and --target1-rel."));
2143 this->target1_reloc_
= elfcpp::R_ARM_REL32
;
2145 // We don't need to handle --target1-abs because target1_reloc_ is set
2146 // to elfcpp::R_ARM_ABS32 in the member initializer list.
2148 if (parameters
->options().user_set_target2())
2150 const char* target2
= parameters
->options().target2();
2151 if (strcmp(target2
, "rel") == 0)
2152 this->target2_reloc_
= elfcpp::R_ARM_REL32
;
2153 else if (strcmp(target2
, "abs") == 0)
2154 this->target2_reloc_
= elfcpp::R_ARM_ABS32
;
2155 else if (strcmp(target2
, "got-rel") == 0)
2156 this->target2_reloc_
= elfcpp::R_ARM_GOT_PREL
;
2162 // Whether we force PCI branch veneers.
2164 should_force_pic_veneer() const
2165 { return this->should_force_pic_veneer_
; }
2167 // Set PIC veneer flag.
2169 set_should_force_pic_veneer(bool value
)
2170 { this->should_force_pic_veneer_
= value
; }
2172 // Whether we use THUMB-2 instructions.
2174 using_thumb2() const
2176 Object_attribute
* attr
=
2177 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2178 int arch
= attr
->int_value();
2179 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2182 // Whether we use THUMB/THUMB-2 instructions only.
2184 using_thumb_only() const
2186 Object_attribute
* attr
=
2187 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2189 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2190 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2192 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2193 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2195 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2196 return attr
->int_value() == 'M';
2199 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2201 may_use_arm_nop() const
2203 Object_attribute
* attr
=
2204 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2205 int arch
= attr
->int_value();
2206 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2207 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2208 || arch
== elfcpp::TAG_CPU_ARCH_V7
2209 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2212 // Whether we have THUMB-2 NOP.W instruction.
2214 may_use_thumb2_nop() const
2216 Object_attribute
* attr
=
2217 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2218 int arch
= attr
->int_value();
2219 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2220 || arch
== elfcpp::TAG_CPU_ARCH_V7
2221 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2224 // Whether we have v4T interworking instructions available.
2226 may_use_v4t_interworking() const
2228 Object_attribute
* attr
=
2229 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2230 int arch
= attr
->int_value();
2231 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2232 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2235 // Whether we have v5T interworking instructions available.
2237 may_use_v5t_interworking() const
2239 Object_attribute
* attr
=
2240 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2241 int arch
= attr
->int_value();
2242 if (parameters
->options().fix_arm1176())
2243 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2244 || arch
== elfcpp::TAG_CPU_ARCH_V7
2245 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2246 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2247 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2249 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2250 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2251 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2254 // Process the relocations to determine unreferenced sections for
2255 // garbage collection.
2257 gc_process_relocs(Symbol_table
* symtab
,
2259 Sized_relobj_file
<32, big_endian
>* object
,
2260 unsigned int data_shndx
,
2261 unsigned int sh_type
,
2262 const unsigned char* prelocs
,
2264 Output_section
* output_section
,
2265 bool needs_special_offset_handling
,
2266 size_t local_symbol_count
,
2267 const unsigned char* plocal_symbols
);
2269 // Scan the relocations to look for symbol adjustments.
2271 scan_relocs(Symbol_table
* symtab
,
2273 Sized_relobj_file
<32, big_endian
>* object
,
2274 unsigned int data_shndx
,
2275 unsigned int sh_type
,
2276 const unsigned char* prelocs
,
2278 Output_section
* output_section
,
2279 bool needs_special_offset_handling
,
2280 size_t local_symbol_count
,
2281 const unsigned char* plocal_symbols
);
2283 // Finalize the sections.
2285 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2287 // Return the value to use for a dynamic symbol which requires special
2290 do_dynsym_value(const Symbol
*) const;
2292 // Return the plt address for globals. Since we have irelative plt entries,
2293 // address calculation is not as straightforward as plt_address + plt_offset.
2295 do_plt_address_for_global(const Symbol
* gsym
) const
2296 { return this->plt_section()->address_for_global(gsym
); }
2298 // Return the plt address for locals. Since we have irelative plt entries,
2299 // address calculation is not as straightforward as plt_address + plt_offset.
2301 do_plt_address_for_local(const Relobj
* relobj
, unsigned int symndx
) const
2302 { return this->plt_section()->address_for_local(relobj
, symndx
); }
2304 // Relocate a section.
2306 relocate_section(const Relocate_info
<32, big_endian
>*,
2307 unsigned int sh_type
,
2308 const unsigned char* prelocs
,
2310 Output_section
* output_section
,
2311 bool needs_special_offset_handling
,
2312 unsigned char* view
,
2313 Arm_address view_address
,
2314 section_size_type view_size
,
2315 const Reloc_symbol_changes
*);
2317 // Scan the relocs during a relocatable link.
2319 scan_relocatable_relocs(Symbol_table
* symtab
,
2321 Sized_relobj_file
<32, big_endian
>* object
,
2322 unsigned int data_shndx
,
2323 unsigned int sh_type
,
2324 const unsigned char* prelocs
,
2326 Output_section
* output_section
,
2327 bool needs_special_offset_handling
,
2328 size_t local_symbol_count
,
2329 const unsigned char* plocal_symbols
,
2330 Relocatable_relocs
*);
2332 // Scan the relocs for --emit-relocs.
2334 emit_relocs_scan(Symbol_table
* symtab
,
2336 Sized_relobj_file
<32, big_endian
>* object
,
2337 unsigned int data_shndx
,
2338 unsigned int sh_type
,
2339 const unsigned char* prelocs
,
2341 Output_section
* output_section
,
2342 bool needs_special_offset_handling
,
2343 size_t local_symbol_count
,
2344 const unsigned char* plocal_syms
,
2345 Relocatable_relocs
* rr
);
2347 // Emit relocations for a section.
2349 relocate_relocs(const Relocate_info
<32, big_endian
>*,
2350 unsigned int sh_type
,
2351 const unsigned char* prelocs
,
2353 Output_section
* output_section
,
2354 typename
elfcpp::Elf_types
<32>::Elf_Off
2355 offset_in_output_section
,
2356 unsigned char* view
,
2357 Arm_address view_address
,
2358 section_size_type view_size
,
2359 unsigned char* reloc_view
,
2360 section_size_type reloc_view_size
);
2362 // Perform target-specific processing in a relocatable link. This is
2363 // only used if we use the relocation strategy RELOC_SPECIAL.
2365 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2366 unsigned int sh_type
,
2367 const unsigned char* preloc_in
,
2369 Output_section
* output_section
,
2370 typename
elfcpp::Elf_types
<32>::Elf_Off
2371 offset_in_output_section
,
2372 unsigned char* view
,
2373 typename
elfcpp::Elf_types
<32>::Elf_Addr
2375 section_size_type view_size
,
2376 unsigned char* preloc_out
);
2378 // Return whether SYM is defined by the ABI.
2380 do_is_defined_by_abi(const Symbol
* sym
) const
2381 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2383 // Return whether there is a GOT section.
2385 has_got_section() const
2386 { return this->got_
!= NULL
; }
2388 // Return the size of the GOT section.
2392 gold_assert(this->got_
!= NULL
);
2393 return this->got_
->data_size();
2396 // Return the number of entries in the GOT.
2398 got_entry_count() const
2400 if (!this->has_got_section())
2402 return this->got_size() / 4;
2405 // Return the number of entries in the PLT.
2407 plt_entry_count() const;
2409 // Return the offset of the first non-reserved PLT entry.
2411 first_plt_entry_offset() const;
2413 // Return the size of each PLT entry.
2415 plt_entry_size() const;
2417 // Get the section to use for IRELATIVE relocations, create it if necessary.
2419 rel_irelative_section(Layout
*);
2421 // Map platform-specific reloc types
2423 get_real_reloc_type(unsigned int r_type
) const;
2426 // Methods to support stub-generations.
2429 // Return the stub factory
2431 stub_factory() const
2432 { return this->stub_factory_
; }
2434 // Make a new Arm_input_section object.
2435 Arm_input_section
<big_endian
>*
2436 new_arm_input_section(Relobj
*, unsigned int);
2438 // Find the Arm_input_section object corresponding to the SHNDX-th input
2439 // section of RELOBJ.
2440 Arm_input_section
<big_endian
>*
2441 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2443 // Make a new Stub_table
2444 Stub_table
<big_endian
>*
2445 new_stub_table(Arm_input_section
<big_endian
>*);
2447 // Scan a section for stub generation.
2449 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2450 const unsigned char*, size_t, Output_section
*,
2451 bool, const unsigned char*, Arm_address
,
2456 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2457 Output_section
*, unsigned char*, Arm_address
,
2460 // Get the default ARM target.
2461 static Target_arm
<big_endian
>*
2464 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2465 && parameters
->target().is_big_endian() == big_endian
);
2466 return static_cast<Target_arm
<big_endian
>*>(
2467 parameters
->sized_target
<32, big_endian
>());
2470 // Whether NAME belongs to a mapping symbol.
2472 is_mapping_symbol_name(const char* name
)
2476 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2477 && (name
[2] == '\0' || name
[2] == '.'));
2480 // Whether we work around the Cortex-A8 erratum.
2482 fix_cortex_a8() const
2483 { return this->fix_cortex_a8_
; }
2485 // Whether we merge exidx entries in debuginfo.
2487 merge_exidx_entries() const
2488 { return parameters
->options().merge_exidx_entries(); }
2490 // Whether we fix R_ARM_V4BX relocation.
2492 // 1 - replace with MOV instruction (armv4 target)
2493 // 2 - make interworking veneer (>= armv4t targets only)
2494 General_options::Fix_v4bx
2496 { return parameters
->options().fix_v4bx(); }
2498 // Scan a span of THUMB code section for Cortex-A8 erratum.
2500 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2501 section_size_type
, section_size_type
,
2502 const unsigned char*, Arm_address
);
2504 // Apply Cortex-A8 workaround to a branch.
2506 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2507 unsigned char*, Arm_address
);
2510 // Make the PLT-generator object.
2511 Output_data_plt_arm
<big_endian
>*
2512 make_data_plt(Layout
* layout
,
2513 Arm_output_data_got
<big_endian
>* got
,
2514 Output_data_space
* got_plt
,
2515 Output_data_space
* got_irelative
)
2516 { return this->do_make_data_plt(layout
, got
, got_plt
, got_irelative
); }
2518 // Make an ELF object.
2520 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2521 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2524 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2525 const elfcpp::Ehdr
<32, !big_endian
>&)
2526 { gold_unreachable(); }
2529 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2530 const elfcpp::Ehdr
<64, false>&)
2531 { gold_unreachable(); }
2534 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2535 const elfcpp::Ehdr
<64, true>&)
2536 { gold_unreachable(); }
2538 // Make an output section.
2540 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2541 elfcpp::Elf_Xword flags
)
2542 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2545 do_adjust_elf_header(unsigned char* view
, int len
);
2547 // We only need to generate stubs, and hence perform relaxation if we are
2548 // not doing relocatable linking.
2550 do_may_relax() const
2551 { return !parameters
->options().relocatable(); }
2554 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2556 // Determine whether an object attribute tag takes an integer, a
2559 do_attribute_arg_type(int tag
) const;
2561 // Reorder tags during output.
2563 do_attributes_order(int num
) const;
2565 // This is called when the target is selected as the default.
2567 do_select_as_default_target()
2569 // No locking is required since there should only be one default target.
2570 // We cannot have both the big-endian and little-endian ARM targets
2572 gold_assert(arm_reloc_property_table
== NULL
);
2573 arm_reloc_property_table
= new Arm_reloc_property_table();
2576 // Virtual function which is set to return true by a target if
2577 // it can use relocation types to determine if a function's
2578 // pointer is taken.
2580 do_can_check_for_function_pointers() const
2583 // Whether a section called SECTION_NAME may have function pointers to
2584 // sections not eligible for safe ICF folding.
2586 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2588 return (!is_prefix_of(".ARM.exidx", section_name
)
2589 && !is_prefix_of(".ARM.extab", section_name
)
2590 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2594 do_define_standard_symbols(Symbol_table
*, Layout
*);
2596 virtual Output_data_plt_arm
<big_endian
>*
2597 do_make_data_plt(Layout
* layout
,
2598 Arm_output_data_got
<big_endian
>* got
,
2599 Output_data_space
* got_plt
,
2600 Output_data_space
* got_irelative
)
2602 gold_assert(got_plt
!= NULL
&& got_irelative
!= NULL
);
2603 if (parameters
->options().long_plt())
2604 return new Output_data_plt_arm_long
<big_endian
>(
2605 layout
, got
, got_plt
, got_irelative
);
2607 return new Output_data_plt_arm_short
<big_endian
>(
2608 layout
, got
, got_plt
, got_irelative
);
2612 // The class which scans relocations.
2617 : issued_non_pic_error_(false)
2621 get_reference_flags(unsigned int r_type
);
2624 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2625 Sized_relobj_file
<32, big_endian
>* object
,
2626 unsigned int data_shndx
,
2627 Output_section
* output_section
,
2628 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2629 const elfcpp::Sym
<32, big_endian
>& lsym
,
2633 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2634 Sized_relobj_file
<32, big_endian
>* object
,
2635 unsigned int data_shndx
,
2636 Output_section
* output_section
,
2637 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2641 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2642 Sized_relobj_file
<32, big_endian
>* ,
2645 const elfcpp::Rel
<32, big_endian
>& ,
2647 const elfcpp::Sym
<32, big_endian
>&);
2650 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2651 Sized_relobj_file
<32, big_endian
>* ,
2654 const elfcpp::Rel
<32, big_endian
>& ,
2655 unsigned int , Symbol
*);
2659 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2660 unsigned int r_type
);
2663 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2664 unsigned int r_type
, Symbol
*);
2667 check_non_pic(Relobj
*, unsigned int r_type
);
2669 // Almost identical to Symbol::needs_plt_entry except that it also
2670 // handles STT_ARM_TFUNC.
2672 symbol_needs_plt_entry(const Symbol
* sym
)
2674 // An undefined symbol from an executable does not need a PLT entry.
2675 if (sym
->is_undefined() && !parameters
->options().shared())
2678 if (sym
->type() == elfcpp::STT_GNU_IFUNC
)
2681 return (!parameters
->doing_static_link()
2682 && (sym
->type() == elfcpp::STT_FUNC
2683 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2684 && (sym
->is_from_dynobj()
2685 || sym
->is_undefined()
2686 || sym
->is_preemptible()));
2690 possible_function_pointer_reloc(unsigned int r_type
);
2692 // Whether a plt entry is needed for ifunc.
2694 reloc_needs_plt_for_ifunc(Sized_relobj_file
<32, big_endian
>*,
2695 unsigned int r_type
);
2697 // Whether we have issued an error about a non-PIC compilation.
2698 bool issued_non_pic_error_
;
2701 // The class which implements relocation.
2711 // Return whether the static relocation needs to be applied.
2713 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2714 unsigned int r_type
,
2716 Output_section
* output_section
);
2718 // Do a relocation. Return false if the caller should not issue
2719 // any warnings about this relocation.
2721 relocate(const Relocate_info
<32, big_endian
>*, unsigned int,
2722 Target_arm
*, Output_section
*, size_t, const unsigned char*,
2723 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2724 unsigned char*, Arm_address
, section_size_type
);
2726 // Return whether we want to pass flag NON_PIC_REF for this
2727 // reloc. This means the relocation type accesses a symbol not via
2730 reloc_is_non_pic(unsigned int r_type
)
2734 // These relocation types reference GOT or PLT entries explicitly.
2735 case elfcpp::R_ARM_GOT_BREL
:
2736 case elfcpp::R_ARM_GOT_ABS
:
2737 case elfcpp::R_ARM_GOT_PREL
:
2738 case elfcpp::R_ARM_GOT_BREL12
:
2739 case elfcpp::R_ARM_PLT32_ABS
:
2740 case elfcpp::R_ARM_TLS_GD32
:
2741 case elfcpp::R_ARM_TLS_LDM32
:
2742 case elfcpp::R_ARM_TLS_IE32
:
2743 case elfcpp::R_ARM_TLS_IE12GP
:
2745 // These relocate types may use PLT entries.
2746 case elfcpp::R_ARM_CALL
:
2747 case elfcpp::R_ARM_THM_CALL
:
2748 case elfcpp::R_ARM_JUMP24
:
2749 case elfcpp::R_ARM_THM_JUMP24
:
2750 case elfcpp::R_ARM_THM_JUMP19
:
2751 case elfcpp::R_ARM_PLT32
:
2752 case elfcpp::R_ARM_THM_XPC22
:
2753 case elfcpp::R_ARM_PREL31
:
2754 case elfcpp::R_ARM_SBREL31
:
2763 // Do a TLS relocation.
2764 inline typename Arm_relocate_functions
<big_endian
>::Status
2765 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2766 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2767 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2768 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2773 // A class for inquiring about properties of a relocation,
2774 // used while scanning relocs during a relocatable link and
2775 // garbage collection.
2776 class Classify_reloc
:
2777 public gold::Default_classify_reloc
<elfcpp::SHT_REL
, 32, big_endian
>
2780 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
2783 // Return the explicit addend of the relocation (return 0 for SHT_REL).
2784 static typename
elfcpp::Elf_types
<32>::Elf_Swxword
2785 get_r_addend(const Reltype
*)
2788 // Return the size of the addend of the relocation (only used for SHT_REL).
2790 get_size_for_reloc(unsigned int, Relobj
*);
2793 // Adjust TLS relocation type based on the options and whether this
2794 // is a local symbol.
2795 static tls::Tls_optimization
2796 optimize_tls_reloc(bool is_final
, int r_type
);
2798 // Get the GOT section, creating it if necessary.
2799 Arm_output_data_got
<big_endian
>*
2800 got_section(Symbol_table
*, Layout
*);
2802 // Get the GOT PLT section.
2804 got_plt_section() const
2806 gold_assert(this->got_plt_
!= NULL
);
2807 return this->got_plt_
;
2810 // Create the PLT section.
2812 make_plt_section(Symbol_table
* symtab
, Layout
* layout
);
2814 // Create a PLT entry for a global symbol.
2816 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2818 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2820 make_local_ifunc_plt_entry(Symbol_table
*, Layout
*,
2821 Sized_relobj_file
<32, big_endian
>* relobj
,
2822 unsigned int local_sym_index
);
2824 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2826 define_tls_base_symbol(Symbol_table
*, Layout
*);
2828 // Create a GOT entry for the TLS module index.
2830 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2831 Sized_relobj_file
<32, big_endian
>* object
);
2833 // Get the PLT section.
2834 const Output_data_plt_arm
<big_endian
>*
2837 gold_assert(this->plt_
!= NULL
);
2841 // Get the dynamic reloc section, creating it if necessary.
2843 rel_dyn_section(Layout
*);
2845 // Get the section to use for TLS_DESC relocations.
2847 rel_tls_desc_section(Layout
*) const;
2849 // Return true if the symbol may need a COPY relocation.
2850 // References from an executable object to non-function symbols
2851 // defined in a dynamic object may need a COPY relocation.
2853 may_need_copy_reloc(Symbol
* gsym
)
2855 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2856 && gsym
->may_need_copy_reloc());
2859 // Add a potential copy relocation.
2861 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2862 Sized_relobj_file
<32, big_endian
>* object
,
2863 unsigned int shndx
, Output_section
* output_section
,
2864 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2866 unsigned int r_type
= elfcpp::elf_r_type
<32>(reloc
.get_r_info());
2867 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2868 symtab
->get_sized_symbol
<32>(sym
),
2869 object
, shndx
, output_section
,
2870 r_type
, reloc
.get_r_offset(), 0,
2871 this->rel_dyn_section(layout
));
2874 // Whether two EABI versions are compatible.
2876 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2878 // Merge processor-specific flags from input object and those in the ELF
2879 // header of the output.
2881 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2883 // Get the secondary compatible architecture.
2885 get_secondary_compatible_arch(const Attributes_section_data
*);
2887 // Set the secondary compatible architecture.
2889 set_secondary_compatible_arch(Attributes_section_data
*, int);
2892 tag_cpu_arch_combine(const char*, int, int*, int, int);
2894 // Helper to print AEABI enum tag value.
2896 aeabi_enum_name(unsigned int);
2898 // Return string value for TAG_CPU_name.
2900 tag_cpu_name_value(unsigned int);
2902 // Query attributes object to see if integer divide instructions may be
2903 // present in an object.
2905 attributes_accept_div(int arch
, int profile
,
2906 const Object_attribute
* div_attr
);
2908 // Query attributes object to see if integer divide instructions are
2909 // forbidden to be in the object. This is not the inverse of
2910 // attributes_accept_div.
2912 attributes_forbid_div(const Object_attribute
* div_attr
);
2914 // Merge object attributes from input object and those in the output.
2916 merge_object_attributes(const char*, const Attributes_section_data
*);
2918 // Helper to get an AEABI object attribute
2920 get_aeabi_object_attribute(int tag
) const
2922 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2923 gold_assert(pasd
!= NULL
);
2924 Object_attribute
* attr
=
2925 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2926 gold_assert(attr
!= NULL
);
2931 // Methods to support stub-generations.
2934 // Group input sections for stub generation.
2936 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2938 // Scan a relocation for stub generation.
2940 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2941 const Sized_symbol
<32>*, unsigned int,
2942 const Symbol_value
<32>*,
2943 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2945 // Scan a relocation section for stub.
2946 template<int sh_type
>
2948 scan_reloc_section_for_stubs(
2949 const Relocate_info
<32, big_endian
>* relinfo
,
2950 const unsigned char* prelocs
,
2952 Output_section
* output_section
,
2953 bool needs_special_offset_handling
,
2954 const unsigned char* view
,
2955 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2958 // Fix .ARM.exidx section coverage.
2960 fix_exidx_coverage(Layout
*, const Input_objects
*,
2961 Arm_output_section
<big_endian
>*, Symbol_table
*,
2964 // Functors for STL set.
2965 struct output_section_address_less_than
2968 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2969 { return s1
->address() < s2
->address(); }
2972 // Information about this specific target which we pass to the
2973 // general Target structure.
2974 static const Target::Target_info arm_info
;
2976 // The types of GOT entries needed for this platform.
2977 // These values are exposed to the ABI in an incremental link.
2978 // Do not renumber existing values without changing the version
2979 // number of the .gnu_incremental_inputs section.
2982 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2983 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2984 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2985 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2986 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2989 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2991 // Map input section to Arm_input_section.
2992 typedef Unordered_map
<Section_id
,
2993 Arm_input_section
<big_endian
>*,
2995 Arm_input_section_map
;
2997 // Map output addresses to relocs for Cortex-A8 erratum.
2998 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2999 Cortex_a8_relocs_info
;
3002 Arm_output_data_got
<big_endian
>* got_
;
3004 Output_data_plt_arm
<big_endian
>* plt_
;
3005 // The GOT PLT section.
3006 Output_data_space
* got_plt_
;
3007 // The GOT section for IRELATIVE relocations.
3008 Output_data_space
* got_irelative_
;
3009 // The dynamic reloc section.
3010 Reloc_section
* rel_dyn_
;
3011 // The section to use for IRELATIVE relocs.
3012 Reloc_section
* rel_irelative_
;
3013 // Relocs saved to avoid a COPY reloc.
3014 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
3015 // Offset of the GOT entry for the TLS module index.
3016 unsigned int got_mod_index_offset_
;
3017 // True if the _TLS_MODULE_BASE_ symbol has been defined.
3018 bool tls_base_symbol_defined_
;
3019 // Vector of Stub_tables created.
3020 Stub_table_list stub_tables_
;
3022 const Stub_factory
&stub_factory_
;
3023 // Whether we force PIC branch veneers.
3024 bool should_force_pic_veneer_
;
3025 // Map for locating Arm_input_sections.
3026 Arm_input_section_map arm_input_section_map_
;
3027 // Attributes section data in output.
3028 Attributes_section_data
* attributes_section_data_
;
3029 // Whether we want to fix code for Cortex-A8 erratum.
3030 bool fix_cortex_a8_
;
3031 // Map addresses to relocs for Cortex-A8 erratum.
3032 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
3033 // What R_ARM_TARGET1 maps to. It can be R_ARM_REL32 or R_ARM_ABS32.
3034 unsigned int target1_reloc_
;
3035 // What R_ARM_TARGET2 maps to. It should be one of R_ARM_REL32, R_ARM_ABS32
3036 // and R_ARM_GOT_PREL.
3037 unsigned int target2_reloc_
;
3040 template<bool big_endian
>
3041 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
3044 big_endian
, // is_big_endian
3045 elfcpp::EM_ARM
, // machine_code
3046 false, // has_make_symbol
3047 false, // has_resolve
3048 false, // has_code_fill
3049 true, // is_default_stack_executable
3050 false, // can_icf_inline_merge_sections
3052 "/usr/lib/libc.so.1", // dynamic_linker
3053 0x8000, // default_text_segment_address
3054 0x1000, // abi_pagesize (overridable by -z max-page-size)
3055 0x1000, // common_pagesize (overridable by -z common-page-size)
3056 false, // isolate_execinstr
3058 elfcpp::SHN_UNDEF
, // small_common_shndx
3059 elfcpp::SHN_UNDEF
, // large_common_shndx
3060 0, // small_common_section_flags
3061 0, // large_common_section_flags
3062 ".ARM.attributes", // attributes_section
3063 "aeabi", // attributes_vendor
3064 "_start", // entry_symbol_name
3065 32, // hash_entry_size
3068 // Arm relocate functions class
3071 template<bool big_endian
>
3072 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
3077 STATUS_OKAY
, // No error during relocation.
3078 STATUS_OVERFLOW
, // Relocation overflow.
3079 STATUS_BAD_RELOC
// Relocation cannot be applied.
3083 typedef Relocate_functions
<32, big_endian
> Base
;
3084 typedef Arm_relocate_functions
<big_endian
> This
;
3086 // Encoding of imm16 argument for movt and movw ARM instructions
3089 // imm16 := imm4 | imm12
3091 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3092 // +-------+---------------+-------+-------+-----------------------+
3093 // | | |imm4 | |imm12 |
3094 // +-------+---------------+-------+-------+-----------------------+
3096 // Extract the relocation addend from VAL based on the ARM
3097 // instruction encoding described above.
3098 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3099 extract_arm_movw_movt_addend(
3100 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3102 // According to the Elf ABI for ARM Architecture the immediate
3103 // field is sign-extended to form the addend.
3104 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
3107 // Insert X into VAL based on the ARM instruction encoding described
3109 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3110 insert_val_arm_movw_movt(
3111 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3112 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3116 val
|= (x
& 0xf000) << 4;
3120 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3123 // imm16 := imm4 | i | imm3 | imm8
3125 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3126 // +---------+-+-----------+-------++-+-----+-------+---------------+
3127 // | |i| |imm4 || |imm3 | |imm8 |
3128 // +---------+-+-----------+-------++-+-----+-------+---------------+
3130 // Extract the relocation addend from VAL based on the Thumb2
3131 // instruction encoding described above.
3132 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3133 extract_thumb_movw_movt_addend(
3134 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3136 // According to the Elf ABI for ARM Architecture the immediate
3137 // field is sign-extended to form the addend.
3138 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
3139 | ((val
>> 15) & 0x0800)
3140 | ((val
>> 4) & 0x0700)
3144 // Insert X into VAL based on the Thumb2 instruction encoding
3146 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3147 insert_val_thumb_movw_movt(
3148 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3149 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3152 val
|= (x
& 0xf000) << 4;
3153 val
|= (x
& 0x0800) << 15;
3154 val
|= (x
& 0x0700) << 4;
3155 val
|= (x
& 0x00ff);
3159 // Calculate the smallest constant Kn for the specified residual.
3160 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3162 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3168 // Determine the most significant bit in the residual and
3169 // align the resulting value to a 2-bit boundary.
3170 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3172 // The desired shift is now (msb - 6), or zero, whichever
3174 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3177 // Calculate the final residual for the specified group index.
3178 // If the passed group index is less than zero, the method will return
3179 // the value of the specified residual without any change.
3180 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3181 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3182 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3185 for (int n
= 0; n
<= group
; n
++)
3187 // Calculate which part of the value to mask.
3188 uint32_t shift
= calc_grp_kn(residual
);
3189 // Calculate the residual for the next time around.
3190 residual
&= ~(residual
& (0xff << shift
));
3196 // Calculate the value of Gn for the specified group index.
3197 // We return it in the form of an encoded constant-and-rotation.
3198 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3199 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3200 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3203 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3206 for (int n
= 0; n
<= group
; n
++)
3208 // Calculate which part of the value to mask.
3209 shift
= calc_grp_kn(residual
);
3210 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3211 gn
= residual
& (0xff << shift
);
3212 // Calculate the residual for the next time around.
3215 // Return Gn in the form of an encoded constant-and-rotation.
3216 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3220 // Handle ARM long branches.
3221 static typename
This::Status
3222 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3223 unsigned char*, const Sized_symbol
<32>*,
3224 const Arm_relobj
<big_endian
>*, unsigned int,
3225 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3227 // Handle THUMB long branches.
3228 static typename
This::Status
3229 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3230 unsigned char*, const Sized_symbol
<32>*,
3231 const Arm_relobj
<big_endian
>*, unsigned int,
3232 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3235 // Return the branch offset of a 32-bit THUMB branch.
3236 static inline int32_t
3237 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3239 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3240 // involving the J1 and J2 bits.
3241 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3242 uint32_t upper
= upper_insn
& 0x3ffU
;
3243 uint32_t lower
= lower_insn
& 0x7ffU
;
3244 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3245 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3246 uint32_t i1
= j1
^ s
? 0 : 1;
3247 uint32_t i2
= j2
^ s
? 0 : 1;
3249 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3250 | (upper
<< 12) | (lower
<< 1));
3253 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3254 // UPPER_INSN is the original upper instruction of the branch. Caller is
3255 // responsible for overflow checking and BLX offset adjustment.
3256 static inline uint16_t
3257 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3259 uint32_t s
= offset
< 0 ? 1 : 0;
3260 uint32_t bits
= static_cast<uint32_t>(offset
);
3261 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3264 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3265 // LOWER_INSN is the original lower instruction of the branch. Caller is
3266 // responsible for overflow checking and BLX offset adjustment.
3267 static inline uint16_t
3268 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3270 uint32_t s
= offset
< 0 ? 1 : 0;
3271 uint32_t bits
= static_cast<uint32_t>(offset
);
3272 return ((lower_insn
& ~0x2fffU
)
3273 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3274 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3275 | ((bits
>> 1) & 0x7ffU
));
3278 // Return the branch offset of a 32-bit THUMB conditional branch.
3279 static inline int32_t
3280 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3282 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3283 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3284 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3285 uint32_t lower
= (lower_insn
& 0x07ffU
);
3286 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3288 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3291 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3292 // instruction. UPPER_INSN is the original upper instruction of the branch.
3293 // Caller is responsible for overflow checking.
3294 static inline uint16_t
3295 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3297 uint32_t s
= offset
< 0 ? 1 : 0;
3298 uint32_t bits
= static_cast<uint32_t>(offset
);
3299 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3302 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3303 // instruction. LOWER_INSN is the original lower instruction of the branch.
3304 // The caller is responsible for overflow checking.
3305 static inline uint16_t
3306 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3308 uint32_t bits
= static_cast<uint32_t>(offset
);
3309 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3310 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3311 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3313 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3316 // R_ARM_ABS8: S + A
3317 static inline typename
This::Status
3318 abs8(unsigned char* view
,
3319 const Sized_relobj_file
<32, big_endian
>* object
,
3320 const Symbol_value
<32>* psymval
)
3322 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3323 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3324 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3325 int32_t addend
= Bits
<8>::sign_extend32(val
);
3326 Arm_address x
= psymval
->value(object
, addend
);
3327 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3328 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3330 // R_ARM_ABS8 permits signed or unsigned results.
3331 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3332 ? This::STATUS_OVERFLOW
3333 : This::STATUS_OKAY
);
3336 // R_ARM_THM_ABS5: S + A
3337 static inline typename
This::Status
3338 thm_abs5(unsigned char* view
,
3339 const Sized_relobj_file
<32, big_endian
>* object
,
3340 const Symbol_value
<32>* psymval
)
3342 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3343 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3344 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3345 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3346 Reltype addend
= (val
& 0x7e0U
) >> 6;
3347 Reltype x
= psymval
->value(object
, addend
);
3348 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3349 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3350 return (Bits
<5>::has_overflow32(x
)
3351 ? This::STATUS_OVERFLOW
3352 : This::STATUS_OKAY
);
3355 // R_ARM_ABS12: S + A
3356 static inline typename
This::Status
3357 abs12(unsigned char* view
,
3358 const Sized_relobj_file
<32, big_endian
>* object
,
3359 const Symbol_value
<32>* psymval
)
3361 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3362 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3363 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3364 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3365 Reltype addend
= val
& 0x0fffU
;
3366 Reltype x
= psymval
->value(object
, addend
);
3367 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3368 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3369 return (Bits
<12>::has_overflow32(x
)
3370 ? This::STATUS_OVERFLOW
3371 : This::STATUS_OKAY
);
3374 // R_ARM_ABS16: S + A
3375 static inline typename
This::Status
3376 abs16(unsigned char* view
,
3377 const Sized_relobj_file
<32, big_endian
>* object
,
3378 const Symbol_value
<32>* psymval
)
3380 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3381 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3382 int32_t addend
= Bits
<16>::sign_extend32(val
);
3383 Arm_address x
= psymval
->value(object
, addend
);
3384 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3385 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3387 // R_ARM_ABS16 permits signed or unsigned results.
3388 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3389 ? This::STATUS_OVERFLOW
3390 : This::STATUS_OKAY
);
3393 // R_ARM_ABS32: (S + A) | T
3394 static inline typename
This::Status
3395 abs32(unsigned char* view
,
3396 const Sized_relobj_file
<32, big_endian
>* object
,
3397 const Symbol_value
<32>* psymval
,
3398 Arm_address thumb_bit
)
3400 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3401 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3402 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3403 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3404 return This::STATUS_OKAY
;
3407 // R_ARM_REL32: (S + A) | T - P
3408 static inline typename
This::Status
3409 rel32(unsigned char* view
,
3410 const Sized_relobj_file
<32, big_endian
>* object
,
3411 const Symbol_value
<32>* psymval
,
3412 Arm_address address
,
3413 Arm_address thumb_bit
)
3415 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3416 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3417 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3418 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3419 return This::STATUS_OKAY
;
3422 // R_ARM_THM_JUMP24: (S + A) | T - P
3423 static typename
This::Status
3424 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3425 const Symbol_value
<32>* psymval
, Arm_address address
,
3426 Arm_address thumb_bit
);
3428 // R_ARM_THM_JUMP6: S + A – P
3429 static inline typename
This::Status
3430 thm_jump6(unsigned char* view
,
3431 const Sized_relobj_file
<32, big_endian
>* object
,
3432 const Symbol_value
<32>* psymval
,
3433 Arm_address address
)
3435 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3436 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3437 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3438 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3439 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3440 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3441 Reltype x
= (psymval
->value(object
, addend
) - address
);
3442 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3443 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3444 // CZB does only forward jumps.
3445 return ((x
> 0x007e)
3446 ? This::STATUS_OVERFLOW
3447 : This::STATUS_OKAY
);
3450 // R_ARM_THM_JUMP8: S + A – P
3451 static inline typename
This::Status
3452 thm_jump8(unsigned char* view
,
3453 const Sized_relobj_file
<32, big_endian
>* object
,
3454 const Symbol_value
<32>* psymval
,
3455 Arm_address address
)
3457 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3458 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3459 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3460 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3461 int32_t x
= (psymval
->value(object
, addend
) - address
);
3462 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3463 | ((x
& 0x01fe) >> 1)));
3464 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3465 return (Bits
<9>::has_overflow32(x
)
3466 ? This::STATUS_OVERFLOW
3467 : This::STATUS_OKAY
);
3470 // R_ARM_THM_JUMP11: S + A – P
3471 static inline typename
This::Status
3472 thm_jump11(unsigned char* view
,
3473 const Sized_relobj_file
<32, big_endian
>* object
,
3474 const Symbol_value
<32>* psymval
,
3475 Arm_address address
)
3477 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3478 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3479 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3480 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3481 int32_t x
= (psymval
->value(object
, addend
) - address
);
3482 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3483 | ((x
& 0x0ffe) >> 1)));
3484 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3485 return (Bits
<12>::has_overflow32(x
)
3486 ? This::STATUS_OVERFLOW
3487 : This::STATUS_OKAY
);
3490 // R_ARM_BASE_PREL: B(S) + A - P
3491 static inline typename
This::Status
3492 base_prel(unsigned char* view
,
3494 Arm_address address
)
3496 Base::rel32(view
, origin
- address
);
3500 // R_ARM_BASE_ABS: B(S) + A
3501 static inline typename
This::Status
3502 base_abs(unsigned char* view
,
3505 Base::rel32(view
, origin
);
3509 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3510 static inline typename
This::Status
3511 got_brel(unsigned char* view
,
3512 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3514 Base::rel32(view
, got_offset
);
3515 return This::STATUS_OKAY
;
3518 // R_ARM_GOT_PREL: GOT(S) + A - P
3519 static inline typename
This::Status
3520 got_prel(unsigned char* view
,
3521 Arm_address got_entry
,
3522 Arm_address address
)
3524 Base::rel32(view
, got_entry
- address
);
3525 return This::STATUS_OKAY
;
3528 // R_ARM_PREL: (S + A) | T - P
3529 static inline typename
This::Status
3530 prel31(unsigned char* view
,
3531 const Sized_relobj_file
<32, big_endian
>* object
,
3532 const Symbol_value
<32>* psymval
,
3533 Arm_address address
,
3534 Arm_address thumb_bit
)
3536 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3537 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3538 Valtype addend
= Bits
<31>::sign_extend32(val
);
3539 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3540 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3541 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3542 return (Bits
<31>::has_overflow32(x
)
3543 ? This::STATUS_OVERFLOW
3544 : This::STATUS_OKAY
);
3547 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3548 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3549 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3550 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3551 static inline typename
This::Status
3552 movw(unsigned char* view
,
3553 const Sized_relobj_file
<32, big_endian
>* object
,
3554 const Symbol_value
<32>* psymval
,
3555 Arm_address relative_address_base
,
3556 Arm_address thumb_bit
,
3557 bool check_overflow
)
3559 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3560 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3561 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3562 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3563 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3564 - relative_address_base
);
3565 val
= This::insert_val_arm_movw_movt(val
, x
);
3566 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3567 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3568 ? This::STATUS_OVERFLOW
3569 : This::STATUS_OKAY
);
3572 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3573 // R_ARM_MOVT_PREL: S + A - P
3574 // R_ARM_MOVT_BREL: S + A - B(S)
3575 static inline typename
This::Status
3576 movt(unsigned char* view
,
3577 const Sized_relobj_file
<32, big_endian
>* object
,
3578 const Symbol_value
<32>* psymval
,
3579 Arm_address relative_address_base
)
3581 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3582 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3583 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3584 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3585 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3586 val
= This::insert_val_arm_movw_movt(val
, x
);
3587 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3588 // FIXME: IHI0044D says that we should check for overflow.
3589 return This::STATUS_OKAY
;
3592 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3593 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3594 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3595 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3596 static inline typename
This::Status
3597 thm_movw(unsigned char* view
,
3598 const Sized_relobj_file
<32, big_endian
>* object
,
3599 const Symbol_value
<32>* psymval
,
3600 Arm_address relative_address_base
,
3601 Arm_address thumb_bit
,
3602 bool check_overflow
)
3604 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3605 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3606 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3607 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3608 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3609 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3611 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3612 val
= This::insert_val_thumb_movw_movt(val
, x
);
3613 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3614 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3615 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3616 ? This::STATUS_OVERFLOW
3617 : This::STATUS_OKAY
);
3620 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3621 // R_ARM_THM_MOVT_PREL: S + A - P
3622 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3623 static inline typename
This::Status
3624 thm_movt(unsigned char* view
,
3625 const Sized_relobj_file
<32, big_endian
>* object
,
3626 const Symbol_value
<32>* psymval
,
3627 Arm_address relative_address_base
)
3629 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3630 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3631 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3632 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3633 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3634 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3635 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3636 val
= This::insert_val_thumb_movw_movt(val
, x
);
3637 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3638 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3639 return This::STATUS_OKAY
;
3642 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3643 static inline typename
This::Status
3644 thm_alu11(unsigned char* view
,
3645 const Sized_relobj_file
<32, big_endian
>* object
,
3646 const Symbol_value
<32>* psymval
,
3647 Arm_address address
,
3648 Arm_address thumb_bit
)
3650 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3651 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3652 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3653 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3654 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3656 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3657 // -----------------------------------------------------------------------
3658 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3659 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3660 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3661 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3662 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3663 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3665 // Determine a sign for the addend.
3666 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3667 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3668 // Thumb2 addend encoding:
3669 // imm12 := i | imm3 | imm8
3670 int32_t addend
= (insn
& 0xff)
3671 | ((insn
& 0x00007000) >> 4)
3672 | ((insn
& 0x04000000) >> 15);
3673 // Apply a sign to the added.
3676 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3677 - (address
& 0xfffffffc);
3678 Reltype val
= abs(x
);
3679 // Mask out the value and a distinct part of the ADD/SUB opcode
3680 // (bits 7:5 of opword).
3681 insn
= (insn
& 0xfb0f8f00)
3683 | ((val
& 0x700) << 4)
3684 | ((val
& 0x800) << 15);
3685 // Set the opcode according to whether the value to go in the
3686 // place is negative.
3690 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3691 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3692 return ((val
> 0xfff) ?
3693 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3696 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3697 static inline typename
This::Status
3698 thm_pc8(unsigned char* view
,
3699 const Sized_relobj_file
<32, big_endian
>* object
,
3700 const Symbol_value
<32>* psymval
,
3701 Arm_address address
)
3703 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3704 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3705 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3706 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3707 Reltype addend
= ((insn
& 0x00ff) << 2);
3708 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3709 Reltype val
= abs(x
);
3710 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3712 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3713 return ((val
> 0x03fc)
3714 ? This::STATUS_OVERFLOW
3715 : This::STATUS_OKAY
);
3718 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3719 static inline typename
This::Status
3720 thm_pc12(unsigned char* view
,
3721 const Sized_relobj_file
<32, big_endian
>* object
,
3722 const Symbol_value
<32>* psymval
,
3723 Arm_address address
)
3725 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3726 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3727 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3728 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3729 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3730 // Determine a sign for the addend (positive if the U bit is 1).
3731 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3732 int32_t addend
= (insn
& 0xfff);
3733 // Apply a sign to the added.
3736 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3737 Reltype val
= abs(x
);
3738 // Mask out and apply the value and the U bit.
3739 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3740 // Set the U bit according to whether the value to go in the
3741 // place is positive.
3745 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3746 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3747 return ((val
> 0xfff) ?
3748 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3752 static inline typename
This::Status
3753 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3754 unsigned char* view
,
3755 const Arm_relobj
<big_endian
>* object
,
3756 const Arm_address address
,
3757 const bool is_interworking
)
3760 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3761 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3762 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3764 // Ensure that we have a BX instruction.
3765 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3766 const uint32_t reg
= (val
& 0xf);
3767 if (is_interworking
&& reg
!= 0xf)
3769 Stub_table
<big_endian
>* stub_table
=
3770 object
->stub_table(relinfo
->data_shndx
);
3771 gold_assert(stub_table
!= NULL
);
3773 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3774 gold_assert(stub
!= NULL
);
3776 int32_t veneer_address
=
3777 stub_table
->address() + stub
->offset() - 8 - address
;
3778 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3779 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3780 // Replace with a branch to veneer (B <addr>)
3781 val
= (val
& 0xf0000000) | 0x0a000000
3782 | ((veneer_address
>> 2) & 0x00ffffff);
3786 // Preserve Rm (lowest four bits) and the condition code
3787 // (highest four bits). Other bits encode MOV PC,Rm.
3788 val
= (val
& 0xf000000f) | 0x01a0f000;
3790 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3791 return This::STATUS_OKAY
;
3794 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3795 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3796 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3797 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3798 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3799 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3800 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3801 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3802 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3803 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3804 static inline typename
This::Status
3805 arm_grp_alu(unsigned char* view
,
3806 const Sized_relobj_file
<32, big_endian
>* object
,
3807 const Symbol_value
<32>* psymval
,
3809 Arm_address address
,
3810 Arm_address thumb_bit
,
3811 bool check_overflow
)
3813 gold_assert(group
>= 0 && group
< 3);
3814 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3815 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3816 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3818 // ALU group relocations are allowed only for the ADD/SUB instructions.
3819 // (0x00800000 - ADD, 0x00400000 - SUB)
3820 const Valtype opcode
= insn
& 0x01e00000;
3821 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3822 return This::STATUS_BAD_RELOC
;
3824 // Determine a sign for the addend.
3825 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3826 // shifter = rotate_imm * 2
3827 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3828 // Initial addend value.
3829 int32_t addend
= insn
& 0xff;
3830 // Rotate addend right by shifter.
3831 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3832 // Apply a sign to the added.
3835 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3836 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3837 // Check for overflow if required
3839 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3840 return This::STATUS_OVERFLOW
;
3842 // Mask out the value and the ADD/SUB part of the opcode; take care
3843 // not to destroy the S bit.
3845 // Set the opcode according to whether the value to go in the
3846 // place is negative.
3847 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3848 // Encode the offset (encoded Gn).
3851 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3852 return This::STATUS_OKAY
;
3855 // R_ARM_LDR_PC_G0: S + A - P
3856 // R_ARM_LDR_PC_G1: S + A - P
3857 // R_ARM_LDR_PC_G2: S + A - P
3858 // R_ARM_LDR_SB_G0: S + A - B(S)
3859 // R_ARM_LDR_SB_G1: S + A - B(S)
3860 // R_ARM_LDR_SB_G2: S + A - B(S)
3861 static inline typename
This::Status
3862 arm_grp_ldr(unsigned char* view
,
3863 const Sized_relobj_file
<32, big_endian
>* object
,
3864 const Symbol_value
<32>* psymval
,
3866 Arm_address address
)
3868 gold_assert(group
>= 0 && group
< 3);
3869 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3870 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3871 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3873 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3874 int32_t addend
= (insn
& 0xfff) * sign
;
3875 int32_t x
= (psymval
->value(object
, addend
) - address
);
3876 // Calculate the relevant G(n-1) value to obtain this stage residual.
3878 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3879 if (residual
>= 0x1000)
3880 return This::STATUS_OVERFLOW
;
3882 // Mask out the value and U bit.
3884 // Set the U bit for non-negative values.
3889 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3890 return This::STATUS_OKAY
;
3893 // R_ARM_LDRS_PC_G0: S + A - P
3894 // R_ARM_LDRS_PC_G1: S + A - P
3895 // R_ARM_LDRS_PC_G2: S + A - P
3896 // R_ARM_LDRS_SB_G0: S + A - B(S)
3897 // R_ARM_LDRS_SB_G1: S + A - B(S)
3898 // R_ARM_LDRS_SB_G2: S + A - B(S)
3899 static inline typename
This::Status
3900 arm_grp_ldrs(unsigned char* view
,
3901 const Sized_relobj_file
<32, big_endian
>* object
,
3902 const Symbol_value
<32>* psymval
,
3904 Arm_address address
)
3906 gold_assert(group
>= 0 && group
< 3);
3907 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3908 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3909 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3911 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3912 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3913 int32_t x
= (psymval
->value(object
, addend
) - address
);
3914 // Calculate the relevant G(n-1) value to obtain this stage residual.
3916 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3917 if (residual
>= 0x100)
3918 return This::STATUS_OVERFLOW
;
3920 // Mask out the value and U bit.
3922 // Set the U bit for non-negative values.
3925 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3927 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3928 return This::STATUS_OKAY
;
3931 // R_ARM_LDC_PC_G0: S + A - P
3932 // R_ARM_LDC_PC_G1: S + A - P
3933 // R_ARM_LDC_PC_G2: S + A - P
3934 // R_ARM_LDC_SB_G0: S + A - B(S)
3935 // R_ARM_LDC_SB_G1: S + A - B(S)
3936 // R_ARM_LDC_SB_G2: S + A - B(S)
3937 static inline typename
This::Status
3938 arm_grp_ldc(unsigned char* view
,
3939 const Sized_relobj_file
<32, big_endian
>* object
,
3940 const Symbol_value
<32>* psymval
,
3942 Arm_address address
)
3944 gold_assert(group
>= 0 && group
< 3);
3945 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3946 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3947 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3949 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3950 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3951 int32_t x
= (psymval
->value(object
, addend
) - address
);
3952 // Calculate the relevant G(n-1) value to obtain this stage residual.
3954 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3955 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3956 return This::STATUS_OVERFLOW
;
3958 // Mask out the value and U bit.
3960 // Set the U bit for non-negative values.
3963 insn
|= (residual
>> 2);
3965 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3966 return This::STATUS_OKAY
;
3970 // Relocate ARM long branches. This handles relocation types
3971 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3972 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3973 // undefined and we do not use PLT in this relocation. In such a case,
3974 // the branch is converted into an NOP.
3976 template<bool big_endian
>
3977 typename Arm_relocate_functions
<big_endian
>::Status
3978 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3979 unsigned int r_type
,
3980 const Relocate_info
<32, big_endian
>* relinfo
,
3981 unsigned char* view
,
3982 const Sized_symbol
<32>* gsym
,
3983 const Arm_relobj
<big_endian
>* object
,
3985 const Symbol_value
<32>* psymval
,
3986 Arm_address address
,
3987 Arm_address thumb_bit
,
3988 bool is_weakly_undefined_without_plt
)
3990 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3991 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3992 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3994 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3995 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3996 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3997 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3998 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3999 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
4000 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
4002 // Check that the instruction is valid.
4003 if (r_type
== elfcpp::R_ARM_CALL
)
4005 if (!insn_is_uncond_bl
&& !insn_is_blx
)
4006 return This::STATUS_BAD_RELOC
;
4008 else if (r_type
== elfcpp::R_ARM_JUMP24
)
4010 if (!insn_is_b
&& !insn_is_cond_bl
)
4011 return This::STATUS_BAD_RELOC
;
4013 else if (r_type
== elfcpp::R_ARM_PLT32
)
4015 if (!insn_is_any_branch
)
4016 return This::STATUS_BAD_RELOC
;
4018 else if (r_type
== elfcpp::R_ARM_XPC25
)
4020 // FIXME: AAELF document IH0044C does not say much about it other
4021 // than it being obsolete.
4022 if (!insn_is_any_branch
)
4023 return This::STATUS_BAD_RELOC
;
4028 // A branch to an undefined weak symbol is turned into a jump to
4029 // the next instruction unless a PLT entry will be created.
4030 // Do the same for local undefined symbols.
4031 // The jump to the next instruction is optimized as a NOP depending
4032 // on the architecture.
4033 const Target_arm
<big_endian
>* arm_target
=
4034 Target_arm
<big_endian
>::default_target();
4035 if (is_weakly_undefined_without_plt
)
4037 gold_assert(!parameters
->options().relocatable());
4038 Valtype cond
= val
& 0xf0000000U
;
4039 if (arm_target
->may_use_arm_nop())
4040 val
= cond
| 0x0320f000;
4042 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
4043 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4044 return This::STATUS_OKAY
;
4047 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
4048 Valtype branch_target
= psymval
->value(object
, addend
);
4049 int32_t branch_offset
= branch_target
- address
;
4051 // We need a stub if the branch offset is too large or if we need
4053 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4054 Reloc_stub
* stub
= NULL
;
4056 if (!parameters
->options().relocatable()
4057 && (Bits
<26>::has_overflow32(branch_offset
)
4058 || ((thumb_bit
!= 0)
4059 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
4061 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
4063 Stub_type stub_type
=
4064 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4065 unadjusted_branch_target
,
4067 if (stub_type
!= arm_stub_none
)
4069 Stub_table
<big_endian
>* stub_table
=
4070 object
->stub_table(relinfo
->data_shndx
);
4071 gold_assert(stub_table
!= NULL
);
4073 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4074 stub
= stub_table
->find_reloc_stub(stub_key
);
4075 gold_assert(stub
!= NULL
);
4076 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4077 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4078 branch_offset
= branch_target
- address
;
4079 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
4083 // At this point, if we still need to switch mode, the instruction
4084 // must either be a BLX or a BL that can be converted to a BLX.
4088 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
4089 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
4092 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
4093 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4094 return (Bits
<26>::has_overflow32(branch_offset
)
4095 ? This::STATUS_OVERFLOW
4096 : This::STATUS_OKAY
);
4099 // Relocate THUMB long branches. This handles relocation types
4100 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4101 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4102 // undefined and we do not use PLT in this relocation. In such a case,
4103 // the branch is converted into an NOP.
4105 template<bool big_endian
>
4106 typename Arm_relocate_functions
<big_endian
>::Status
4107 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
4108 unsigned int r_type
,
4109 const Relocate_info
<32, big_endian
>* relinfo
,
4110 unsigned char* view
,
4111 const Sized_symbol
<32>* gsym
,
4112 const Arm_relobj
<big_endian
>* object
,
4114 const Symbol_value
<32>* psymval
,
4115 Arm_address address
,
4116 Arm_address thumb_bit
,
4117 bool is_weakly_undefined_without_plt
)
4119 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4120 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4121 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4122 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4124 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4126 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
4127 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
4129 // Check that the instruction is valid.
4130 if (r_type
== elfcpp::R_ARM_THM_CALL
)
4132 if (!is_bl_insn
&& !is_blx_insn
)
4133 return This::STATUS_BAD_RELOC
;
4135 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
4137 // This cannot be a BLX.
4139 return This::STATUS_BAD_RELOC
;
4141 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4143 // Check for Thumb to Thumb call.
4145 return This::STATUS_BAD_RELOC
;
4148 gold_warning(_("%s: Thumb BLX instruction targets "
4149 "thumb function '%s'."),
4150 object
->name().c_str(),
4151 (gsym
? gsym
->name() : "(local)"));
4152 // Convert BLX to BL.
4153 lower_insn
|= 0x1000U
;
4159 // A branch to an undefined weak symbol is turned into a jump to
4160 // the next instruction unless a PLT entry will be created.
4161 // The jump to the next instruction is optimized as a NOP.W for
4162 // Thumb-2 enabled architectures.
4163 const Target_arm
<big_endian
>* arm_target
=
4164 Target_arm
<big_endian
>::default_target();
4165 if (is_weakly_undefined_without_plt
)
4167 gold_assert(!parameters
->options().relocatable());
4168 if (arm_target
->may_use_thumb2_nop())
4170 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4171 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4175 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4176 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4178 return This::STATUS_OKAY
;
4181 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4182 Arm_address branch_target
= psymval
->value(object
, addend
);
4184 // For BLX, bit 1 of target address comes from bit 1 of base address.
4185 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4186 if (thumb_bit
== 0 && may_use_blx
)
4187 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4189 int32_t branch_offset
= branch_target
- address
;
4191 // We need a stub if the branch offset is too large or if we need
4193 bool thumb2
= arm_target
->using_thumb2();
4194 if (!parameters
->options().relocatable()
4195 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4196 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4197 || ((thumb_bit
== 0)
4198 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4199 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4201 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4203 Stub_type stub_type
=
4204 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4205 unadjusted_branch_target
,
4208 if (stub_type
!= arm_stub_none
)
4210 Stub_table
<big_endian
>* stub_table
=
4211 object
->stub_table(relinfo
->data_shndx
);
4212 gold_assert(stub_table
!= NULL
);
4214 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4215 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4216 gold_assert(stub
!= NULL
);
4217 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4218 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4219 if (thumb_bit
== 0 && may_use_blx
)
4220 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4221 branch_offset
= branch_target
- address
;
4225 // At this point, if we still need to switch mode, the instruction
4226 // must either be a BLX or a BL that can be converted to a BLX.
4229 gold_assert(may_use_blx
4230 && (r_type
== elfcpp::R_ARM_THM_CALL
4231 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4232 // Make sure this is a BLX.
4233 lower_insn
&= ~0x1000U
;
4237 // Make sure this is a BL.
4238 lower_insn
|= 0x1000U
;
4241 // For a BLX instruction, make sure that the relocation is rounded up
4242 // to a word boundary. This follows the semantics of the instruction
4243 // which specifies that bit 1 of the target address will come from bit
4244 // 1 of the base address.
4245 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4246 gold_assert((branch_offset
& 3) == 0);
4248 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4249 // We use the Thumb-2 encoding, which is safe even if dealing with
4250 // a Thumb-1 instruction by virtue of our overflow check above. */
4251 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4252 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4254 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4255 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4257 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4260 ? Bits
<25>::has_overflow32(branch_offset
)
4261 : Bits
<23>::has_overflow32(branch_offset
))
4262 ? This::STATUS_OVERFLOW
4263 : This::STATUS_OKAY
);
4266 // Relocate THUMB-2 long conditional branches.
4267 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4268 // undefined and we do not use PLT in this relocation. In such a case,
4269 // the branch is converted into an NOP.
4271 template<bool big_endian
>
4272 typename Arm_relocate_functions
<big_endian
>::Status
4273 Arm_relocate_functions
<big_endian
>::thm_jump19(
4274 unsigned char* view
,
4275 const Arm_relobj
<big_endian
>* object
,
4276 const Symbol_value
<32>* psymval
,
4277 Arm_address address
,
4278 Arm_address thumb_bit
)
4280 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4281 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4282 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4283 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4284 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4286 Arm_address branch_target
= psymval
->value(object
, addend
);
4287 int32_t branch_offset
= branch_target
- address
;
4289 // ??? Should handle interworking? GCC might someday try to
4290 // use this for tail calls.
4291 // FIXME: We do support thumb entry to PLT yet.
4294 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4295 return This::STATUS_BAD_RELOC
;
4298 // Put RELOCATION back into the insn.
4299 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4300 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4302 // Put the relocated value back in the object file:
4303 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4304 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4306 return (Bits
<21>::has_overflow32(branch_offset
)
4307 ? This::STATUS_OVERFLOW
4308 : This::STATUS_OKAY
);
4311 // Get the GOT section, creating it if necessary.
4313 template<bool big_endian
>
4314 Arm_output_data_got
<big_endian
>*
4315 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4317 if (this->got_
== NULL
)
4319 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4321 // When using -z now, we can treat .got as a relro section.
4322 // Without -z now, it is modified after program startup by lazy
4324 bool is_got_relro
= parameters
->options().now();
4325 Output_section_order got_order
= (is_got_relro
4329 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4330 // .got.plt sections in output. The output .got section contains both
4331 // PLT and non-PLT GOT entries.
4332 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4334 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4335 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4336 this->got_
, got_order
, is_got_relro
);
4338 // The old GNU linker creates a .got.plt section. We just
4339 // create another set of data in the .got section. Note that we
4340 // always create a PLT if we create a GOT, although the PLT
4342 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4343 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4344 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4345 this->got_plt_
, got_order
, is_got_relro
);
4347 // The first three entries are reserved.
4348 this->got_plt_
->set_current_data_size(3 * 4);
4350 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4351 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4352 Symbol_table::PREDEFINED
,
4354 0, 0, elfcpp::STT_OBJECT
,
4356 elfcpp::STV_HIDDEN
, 0,
4359 // If there are any IRELATIVE relocations, they get GOT entries
4360 // in .got.plt after the jump slot entries.
4361 this->got_irelative_
= new Output_data_space(4, "** GOT IRELATIVE PLT");
4362 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4363 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4364 this->got_irelative_
,
4365 got_order
, is_got_relro
);
4371 // Get the dynamic reloc section, creating it if necessary.
4373 template<bool big_endian
>
4374 typename Target_arm
<big_endian
>::Reloc_section
*
4375 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4377 if (this->rel_dyn_
== NULL
)
4379 gold_assert(layout
!= NULL
);
4380 // Create both relocation sections in the same place, so as to ensure
4381 // their relative order in the output section.
4382 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4383 this->rel_irelative_
= new Reloc_section(false);
4384 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4385 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4386 ORDER_DYNAMIC_RELOCS
, false);
4387 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4388 elfcpp::SHF_ALLOC
, this->rel_irelative_
,
4389 ORDER_DYNAMIC_RELOCS
, false);
4391 return this->rel_dyn_
;
4395 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4396 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4397 // follow the other dynamic relocations so that they can refer to global
4398 // variables initialized by those relocs.
4400 template<bool big_endian
>
4401 typename Target_arm
<big_endian
>::Reloc_section
*
4402 Target_arm
<big_endian
>::rel_irelative_section(Layout
* layout
)
4404 if (this->rel_irelative_
== NULL
)
4406 // Delegate the creation to rel_dyn_section so as to ensure their order in
4407 // the output section.
4408 this->rel_dyn_section(layout
);
4409 gold_assert(this->rel_irelative_
!= NULL
4410 && (this->rel_dyn_
->output_section()
4411 == this->rel_irelative_
->output_section()));
4413 return this->rel_irelative_
;
4417 // Insn_template methods.
4419 // Return byte size of an instruction template.
4422 Insn_template::size() const
4424 switch (this->type())
4427 case THUMB16_SPECIAL_TYPE
:
4438 // Return alignment of an instruction template.
4441 Insn_template::alignment() const
4443 switch (this->type())
4446 case THUMB16_SPECIAL_TYPE
:
4457 // Stub_template methods.
4459 Stub_template::Stub_template(
4460 Stub_type type
, const Insn_template
* insns
,
4462 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4463 entry_in_thumb_mode_(false), relocs_()
4467 // Compute byte size and alignment of stub template.
4468 for (size_t i
= 0; i
< insn_count
; i
++)
4470 unsigned insn_alignment
= insns
[i
].alignment();
4471 size_t insn_size
= insns
[i
].size();
4472 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4473 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4474 switch (insns
[i
].type())
4476 case Insn_template::THUMB16_TYPE
:
4477 case Insn_template::THUMB16_SPECIAL_TYPE
:
4479 this->entry_in_thumb_mode_
= true;
4482 case Insn_template::THUMB32_TYPE
:
4483 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4484 this->relocs_
.push_back(Reloc(i
, offset
));
4486 this->entry_in_thumb_mode_
= true;
4489 case Insn_template::ARM_TYPE
:
4490 // Handle cases where the target is encoded within the
4492 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4493 this->relocs_
.push_back(Reloc(i
, offset
));
4496 case Insn_template::DATA_TYPE
:
4497 // Entry point cannot be data.
4498 gold_assert(i
!= 0);
4499 this->relocs_
.push_back(Reloc(i
, offset
));
4505 offset
+= insn_size
;
4507 this->size_
= offset
;
4512 // Template to implement do_write for a specific target endianness.
4514 template<bool big_endian
>
4516 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4518 const Stub_template
* stub_template
= this->stub_template();
4519 const Insn_template
* insns
= stub_template
->insns();
4521 // FIXME: We do not handle BE8 encoding yet.
4522 unsigned char* pov
= view
;
4523 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4525 switch (insns
[i
].type())
4527 case Insn_template::THUMB16_TYPE
:
4528 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4530 case Insn_template::THUMB16_SPECIAL_TYPE
:
4531 elfcpp::Swap
<16, big_endian
>::writeval(
4533 this->thumb16_special(i
));
4535 case Insn_template::THUMB32_TYPE
:
4537 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4538 uint32_t lo
= insns
[i
].data() & 0xffff;
4539 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4540 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4543 case Insn_template::ARM_TYPE
:
4544 case Insn_template::DATA_TYPE
:
4545 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4550 pov
+= insns
[i
].size();
4552 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4555 // Reloc_stub::Key methods.
4557 // Dump a Key as a string for debugging.
4560 Reloc_stub::Key::name() const
4562 if (this->r_sym_
== invalid_index
)
4564 // Global symbol key name
4565 // <stub-type>:<symbol name>:<addend>.
4566 const std::string sym_name
= this->u_
.symbol
->name();
4567 // We need to print two hex number and two colons. So just add 100 bytes
4568 // to the symbol name size.
4569 size_t len
= sym_name
.size() + 100;
4570 char* buffer
= new char[len
];
4571 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4572 sym_name
.c_str(), this->addend_
);
4573 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4575 return std::string(buffer
);
4579 // local symbol key name
4580 // <stub-type>:<object>:<r_sym>:<addend>.
4581 const size_t len
= 200;
4583 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4584 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4585 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4586 return std::string(buffer
);
4590 // Reloc_stub methods.
4592 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4593 // LOCATION to DESTINATION.
4594 // This code is based on the arm_type_of_stub function in
4595 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4599 Reloc_stub::stub_type_for_reloc(
4600 unsigned int r_type
,
4601 Arm_address location
,
4602 Arm_address destination
,
4603 bool target_is_thumb
)
4605 Stub_type stub_type
= arm_stub_none
;
4607 // This is a bit ugly but we want to avoid using a templated class for
4608 // big and little endianities.
4610 bool should_force_pic_veneer
= parameters
->options().pic_veneer();
4613 if (parameters
->target().is_big_endian())
4615 const Target_arm
<true>* big_endian_target
=
4616 Target_arm
<true>::default_target();
4617 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4618 should_force_pic_veneer
|= big_endian_target
->should_force_pic_veneer();
4619 thumb2
= big_endian_target
->using_thumb2();
4620 thumb_only
= big_endian_target
->using_thumb_only();
4624 const Target_arm
<false>* little_endian_target
=
4625 Target_arm
<false>::default_target();
4626 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4627 should_force_pic_veneer
|=
4628 little_endian_target
->should_force_pic_veneer();
4629 thumb2
= little_endian_target
->using_thumb2();
4630 thumb_only
= little_endian_target
->using_thumb_only();
4633 int64_t branch_offset
;
4634 bool output_is_position_independent
=
4635 parameters
->options().output_is_position_independent();
4636 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4638 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4639 // base address (instruction address + 4).
4640 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4641 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4642 branch_offset
= static_cast<int64_t>(destination
) - location
;
4644 // Handle cases where:
4645 // - this call goes too far (different Thumb/Thumb2 max
4647 // - it's a Thumb->Arm call and blx is not available, or it's a
4648 // Thumb->Arm branch (not bl). A stub is needed in this case.
4650 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4651 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4653 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4654 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4655 || ((!target_is_thumb
)
4656 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4657 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4659 if (target_is_thumb
)
4664 stub_type
= (output_is_position_independent
4665 || should_force_pic_veneer
)
4668 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4669 // V5T and above. Stub starts with ARM code, so
4670 // we must be able to switch mode before
4671 // reaching it, which is only possible for 'bl'
4672 // (ie R_ARM_THM_CALL relocation).
4673 ? arm_stub_long_branch_any_thumb_pic
4674 // On V4T, use Thumb code only.
4675 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4679 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4680 ? arm_stub_long_branch_any_any
// V5T and above.
4681 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4685 stub_type
= (output_is_position_independent
4686 || should_force_pic_veneer
)
4687 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4688 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4695 // FIXME: We should check that the input section is from an
4696 // object that has interwork enabled.
4698 stub_type
= (output_is_position_independent
4699 || should_force_pic_veneer
)
4702 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4703 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4704 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4708 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4709 ? arm_stub_long_branch_any_any
// V5T and above.
4710 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4712 // Handle v4t short branches.
4713 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4714 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4715 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4716 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4720 else if (r_type
== elfcpp::R_ARM_CALL
4721 || r_type
== elfcpp::R_ARM_JUMP24
4722 || r_type
== elfcpp::R_ARM_PLT32
)
4724 branch_offset
= static_cast<int64_t>(destination
) - location
;
4725 if (target_is_thumb
)
4729 // FIXME: We should check that the input section is from an
4730 // object that has interwork enabled.
4732 // We have an extra 2-bytes reach because of
4733 // the mode change (bit 24 (H) of BLX encoding).
4734 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4735 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4736 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4737 || (r_type
== elfcpp::R_ARM_JUMP24
)
4738 || (r_type
== elfcpp::R_ARM_PLT32
))
4740 stub_type
= (output_is_position_independent
4741 || should_force_pic_veneer
)
4744 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4745 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4749 ? arm_stub_long_branch_any_any
// V5T and above.
4750 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4756 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4757 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4759 stub_type
= (output_is_position_independent
4760 || should_force_pic_veneer
)
4761 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4762 : arm_stub_long_branch_any_any
; /// non-PIC.
4770 // Cortex_a8_stub methods.
4772 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4773 // I is the position of the instruction template in the stub template.
4776 Cortex_a8_stub::do_thumb16_special(size_t i
)
4778 // The only use of this is to copy condition code from a conditional
4779 // branch being worked around to the corresponding conditional branch in
4781 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4783 uint16_t data
= this->stub_template()->insns()[i
].data();
4784 gold_assert((data
& 0xff00U
) == 0xd000U
);
4785 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4789 // Stub_factory methods.
4791 Stub_factory::Stub_factory()
4793 // The instruction template sequences are declared as static
4794 // objects and initialized first time the constructor runs.
4796 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4797 // to reach the stub if necessary.
4798 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4800 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4801 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4802 // dcd R_ARM_ABS32(X)
4805 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4807 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4809 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4810 Insn_template::arm_insn(0xe12fff1c), // bx ip
4811 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4812 // dcd R_ARM_ABS32(X)
4815 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4816 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4818 Insn_template::thumb16_insn(0xb401), // push {r0}
4819 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4820 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4821 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4822 Insn_template::thumb16_insn(0x4760), // bx ip
4823 Insn_template::thumb16_insn(0xbf00), // nop
4824 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4825 // dcd R_ARM_ABS32(X)
4828 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4830 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4832 Insn_template::thumb16_insn(0x4778), // bx pc
4833 Insn_template::thumb16_insn(0x46c0), // nop
4834 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4835 Insn_template::arm_insn(0xe12fff1c), // bx ip
4836 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4837 // dcd R_ARM_ABS32(X)
4840 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4842 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4844 Insn_template::thumb16_insn(0x4778), // bx pc
4845 Insn_template::thumb16_insn(0x46c0), // nop
4846 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4847 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4848 // dcd R_ARM_ABS32(X)
4851 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4852 // one, when the destination is close enough.
4853 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4855 Insn_template::thumb16_insn(0x4778), // bx pc
4856 Insn_template::thumb16_insn(0x46c0), // nop
4857 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4860 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4861 // blx to reach the stub if necessary.
4862 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4864 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4865 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4866 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4867 // dcd R_ARM_REL32(X-4)
4870 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4871 // blx to reach the stub if necessary. We can not add into pc;
4872 // it is not guaranteed to mode switch (different in ARMv6 and
4874 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4876 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4877 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4878 Insn_template::arm_insn(0xe12fff1c), // bx ip
4879 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4880 // dcd R_ARM_REL32(X)
4883 // V4T ARM -> ARM long branch stub, PIC.
4884 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4886 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4887 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4888 Insn_template::arm_insn(0xe12fff1c), // bx ip
4889 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4890 // dcd R_ARM_REL32(X)
4893 // V4T Thumb -> ARM long branch stub, PIC.
4894 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4896 Insn_template::thumb16_insn(0x4778), // bx pc
4897 Insn_template::thumb16_insn(0x46c0), // nop
4898 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4899 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4900 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4901 // dcd R_ARM_REL32(X)
4904 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4906 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4908 Insn_template::thumb16_insn(0xb401), // push {r0}
4909 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4910 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4911 Insn_template::thumb16_insn(0x4484), // add ip, r0
4912 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4913 Insn_template::thumb16_insn(0x4760), // bx ip
4914 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4915 // dcd R_ARM_REL32(X)
4918 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4920 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4922 Insn_template::thumb16_insn(0x4778), // bx pc
4923 Insn_template::thumb16_insn(0x46c0), // nop
4924 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4925 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4926 Insn_template::arm_insn(0xe12fff1c), // bx ip
4927 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4928 // dcd R_ARM_REL32(X)
4931 // Cortex-A8 erratum-workaround stubs.
4933 // Stub used for conditional branches (which may be beyond +/-1MB away,
4934 // so we can't use a conditional branch to reach this stub).
4941 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4943 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4944 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4945 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4949 // Stub used for b.w and bl.w instructions.
4951 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4953 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4956 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4958 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4961 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4962 // instruction (which switches to ARM mode) to point to this stub. Jump to
4963 // the real destination using an ARM-mode branch.
4964 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4966 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4969 // Stub used to provide an interworking for R_ARM_V4BX relocation
4970 // (bx r[n] instruction).
4971 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4973 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4974 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4975 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4978 // Fill in the stub template look-up table. Stub templates are constructed
4979 // per instance of Stub_factory for fast look-up without locking
4980 // in a thread-enabled environment.
4982 this->stub_templates_
[arm_stub_none
] =
4983 new Stub_template(arm_stub_none
, NULL
, 0);
4985 #define DEF_STUB(x) \
4989 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4990 Stub_type type = arm_stub_##x; \
4991 this->stub_templates_[type] = \
4992 new Stub_template(type, elf32_arm_stub_##x, array_size); \
5000 // Stub_table methods.
5002 // Remove all Cortex-A8 stub.
5004 template<bool big_endian
>
5006 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
5008 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
5009 p
!= this->cortex_a8_stubs_
.end();
5012 this->cortex_a8_stubs_
.clear();
5015 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
5017 template<bool big_endian
>
5019 Stub_table
<big_endian
>::relocate_stub(
5021 const Relocate_info
<32, big_endian
>* relinfo
,
5022 Target_arm
<big_endian
>* arm_target
,
5023 Output_section
* output_section
,
5024 unsigned char* view
,
5025 Arm_address address
,
5026 section_size_type view_size
)
5028 const Stub_template
* stub_template
= stub
->stub_template();
5029 if (stub_template
->reloc_count() != 0)
5031 // Adjust view to cover the stub only.
5032 section_size_type offset
= stub
->offset();
5033 section_size_type stub_size
= stub_template
->size();
5034 gold_assert(offset
+ stub_size
<= view_size
);
5036 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
5037 address
+ offset
, stub_size
);
5041 // Relocate all stubs in this stub table.
5043 template<bool big_endian
>
5045 Stub_table
<big_endian
>::relocate_stubs(
5046 const Relocate_info
<32, big_endian
>* relinfo
,
5047 Target_arm
<big_endian
>* arm_target
,
5048 Output_section
* output_section
,
5049 unsigned char* view
,
5050 Arm_address address
,
5051 section_size_type view_size
)
5053 // If we are passed a view bigger than the stub table's. we need to
5055 gold_assert(address
== this->address()
5057 == static_cast<section_size_type
>(this->data_size())));
5059 // Relocate all relocation stubs.
5060 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5061 p
!= this->reloc_stubs_
.end();
5063 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5064 address
, view_size
);
5066 // Relocate all Cortex-A8 stubs.
5067 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
5068 p
!= this->cortex_a8_stubs_
.end();
5070 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5071 address
, view_size
);
5073 // Relocate all ARM V4BX stubs.
5074 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
5075 p
!= this->arm_v4bx_stubs_
.end();
5079 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
5080 address
, view_size
);
5084 // Write out the stubs to file.
5086 template<bool big_endian
>
5088 Stub_table
<big_endian
>::do_write(Output_file
* of
)
5090 off_t offset
= this->offset();
5091 const section_size_type oview_size
=
5092 convert_to_section_size_type(this->data_size());
5093 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5095 // Write relocation stubs.
5096 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5097 p
!= this->reloc_stubs_
.end();
5100 Reloc_stub
* stub
= p
->second
;
5101 Arm_address address
= this->address() + stub
->offset();
5103 == align_address(address
,
5104 stub
->stub_template()->alignment()));
5105 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5109 // Write Cortex-A8 stubs.
5110 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5111 p
!= this->cortex_a8_stubs_
.end();
5114 Cortex_a8_stub
* stub
= p
->second
;
5115 Arm_address address
= this->address() + stub
->offset();
5117 == align_address(address
,
5118 stub
->stub_template()->alignment()));
5119 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5123 // Write ARM V4BX relocation stubs.
5124 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5125 p
!= this->arm_v4bx_stubs_
.end();
5131 Arm_address address
= this->address() + (*p
)->offset();
5133 == align_address(address
,
5134 (*p
)->stub_template()->alignment()));
5135 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
5139 of
->write_output_view(this->offset(), oview_size
, oview
);
5142 // Update the data size and address alignment of the stub table at the end
5143 // of a relaxation pass. Return true if either the data size or the
5144 // alignment changed in this relaxation pass.
5146 template<bool big_endian
>
5148 Stub_table
<big_endian
>::update_data_size_and_addralign()
5150 // Go over all stubs in table to compute data size and address alignment.
5151 off_t size
= this->reloc_stubs_size_
;
5152 unsigned addralign
= this->reloc_stubs_addralign_
;
5154 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5155 p
!= this->cortex_a8_stubs_
.end();
5158 const Stub_template
* stub_template
= p
->second
->stub_template();
5159 addralign
= std::max(addralign
, stub_template
->alignment());
5160 size
= (align_address(size
, stub_template
->alignment())
5161 + stub_template
->size());
5164 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5165 p
!= this->arm_v4bx_stubs_
.end();
5171 const Stub_template
* stub_template
= (*p
)->stub_template();
5172 addralign
= std::max(addralign
, stub_template
->alignment());
5173 size
= (align_address(size
, stub_template
->alignment())
5174 + stub_template
->size());
5177 // Check if either data size or alignment changed in this pass.
5178 // Update prev_data_size_ and prev_addralign_. These will be used
5179 // as the current data size and address alignment for the next pass.
5180 bool changed
= size
!= this->prev_data_size_
;
5181 this->prev_data_size_
= size
;
5183 if (addralign
!= this->prev_addralign_
)
5185 this->prev_addralign_
= addralign
;
5190 // Finalize the stubs. This sets the offsets of the stubs within the stub
5191 // table. It also marks all input sections needing Cortex-A8 workaround.
5193 template<bool big_endian
>
5195 Stub_table
<big_endian
>::finalize_stubs()
5197 off_t off
= this->reloc_stubs_size_
;
5198 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5199 p
!= this->cortex_a8_stubs_
.end();
5202 Cortex_a8_stub
* stub
= p
->second
;
5203 const Stub_template
* stub_template
= stub
->stub_template();
5204 uint64_t stub_addralign
= stub_template
->alignment();
5205 off
= align_address(off
, stub_addralign
);
5206 stub
->set_offset(off
);
5207 off
+= stub_template
->size();
5209 // Mark input section so that we can determine later if a code section
5210 // needs the Cortex-A8 workaround quickly.
5211 Arm_relobj
<big_endian
>* arm_relobj
=
5212 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5213 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5216 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5217 p
!= this->arm_v4bx_stubs_
.end();
5223 const Stub_template
* stub_template
= (*p
)->stub_template();
5224 uint64_t stub_addralign
= stub_template
->alignment();
5225 off
= align_address(off
, stub_addralign
);
5226 (*p
)->set_offset(off
);
5227 off
+= stub_template
->size();
5230 gold_assert(off
<= this->prev_data_size_
);
5233 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5234 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5235 // of the address range seen by the linker.
5237 template<bool big_endian
>
5239 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5240 Target_arm
<big_endian
>* arm_target
,
5241 unsigned char* view
,
5242 Arm_address view_address
,
5243 section_size_type view_size
)
5245 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5246 for (Cortex_a8_stub_list::const_iterator p
=
5247 this->cortex_a8_stubs_
.lower_bound(view_address
);
5248 ((p
!= this->cortex_a8_stubs_
.end())
5249 && (p
->first
< (view_address
+ view_size
)));
5252 // We do not store the THUMB bit in the LSB of either the branch address
5253 // or the stub offset. There is no need to strip the LSB.
5254 Arm_address branch_address
= p
->first
;
5255 const Cortex_a8_stub
* stub
= p
->second
;
5256 Arm_address stub_address
= this->address() + stub
->offset();
5258 // Offset of the branch instruction relative to this view.
5259 section_size_type offset
=
5260 convert_to_section_size_type(branch_address
- view_address
);
5261 gold_assert((offset
+ 4) <= view_size
);
5263 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5264 view
+ offset
, branch_address
);
5268 // Arm_input_section methods.
5270 // Initialize an Arm_input_section.
5272 template<bool big_endian
>
5274 Arm_input_section
<big_endian
>::init()
5276 Relobj
* relobj
= this->relobj();
5277 unsigned int shndx
= this->shndx();
5279 // We have to cache original size, alignment and contents to avoid locking
5280 // the original file.
5281 this->original_addralign_
=
5282 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5284 // This is not efficient but we expect only a small number of relaxed
5285 // input sections for stubs.
5286 section_size_type section_size
;
5287 const unsigned char* section_contents
=
5288 relobj
->section_contents(shndx
, §ion_size
, false);
5289 this->original_size_
=
5290 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5292 gold_assert(this->original_contents_
== NULL
);
5293 this->original_contents_
= new unsigned char[section_size
];
5294 memcpy(this->original_contents_
, section_contents
, section_size
);
5296 // We want to make this look like the original input section after
5297 // output sections are finalized.
5298 Output_section
* os
= relobj
->output_section(shndx
);
5299 off_t offset
= relobj
->output_section_offset(shndx
);
5300 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5301 this->set_address(os
->address() + offset
);
5302 this->set_file_offset(os
->offset() + offset
);
5304 this->set_current_data_size(this->original_size_
);
5305 this->finalize_data_size();
5308 template<bool big_endian
>
5310 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5312 // We have to write out the original section content.
5313 gold_assert(this->original_contents_
!= NULL
);
5314 of
->write(this->offset(), this->original_contents_
,
5315 this->original_size_
);
5317 // If this owns a stub table and it is not empty, write it.
5318 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5319 this->stub_table_
->write(of
);
5322 // Finalize data size.
5324 template<bool big_endian
>
5326 Arm_input_section
<big_endian
>::set_final_data_size()
5328 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5330 if (this->is_stub_table_owner())
5332 this->stub_table_
->finalize_data_size();
5333 off
= align_address(off
, this->stub_table_
->addralign());
5334 off
+= this->stub_table_
->data_size();
5336 this->set_data_size(off
);
5339 // Reset address and file offset.
5341 template<bool big_endian
>
5343 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5345 // Size of the original input section contents.
5346 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5348 // If this is a stub table owner, account for the stub table size.
5349 if (this->is_stub_table_owner())
5351 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5353 // Reset the stub table's address and file offset. The
5354 // current data size for child will be updated after that.
5355 stub_table_
->reset_address_and_file_offset();
5356 off
= align_address(off
, stub_table_
->addralign());
5357 off
+= stub_table
->current_data_size();
5360 this->set_current_data_size(off
);
5363 // Arm_exidx_cantunwind methods.
5365 // Write this to Output file OF for a fixed endianness.
5367 template<bool big_endian
>
5369 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5371 off_t offset
= this->offset();
5372 const section_size_type oview_size
= 8;
5373 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5375 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5376 gold_assert(os
!= NULL
);
5378 Arm_relobj
<big_endian
>* arm_relobj
=
5379 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5380 Arm_address output_offset
=
5381 arm_relobj
->get_output_section_offset(this->shndx_
);
5382 Arm_address section_start
;
5383 section_size_type section_size
;
5385 // Find out the end of the text section referred by this.
5386 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5388 section_start
= os
->address() + output_offset
;
5389 const Arm_exidx_input_section
* exidx_input_section
=
5390 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5391 gold_assert(exidx_input_section
!= NULL
);
5393 convert_to_section_size_type(exidx_input_section
->text_size());
5397 // Currently this only happens for a relaxed section.
5398 const Output_relaxed_input_section
* poris
=
5399 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5400 gold_assert(poris
!= NULL
);
5401 section_start
= poris
->address();
5402 section_size
= convert_to_section_size_type(poris
->data_size());
5405 // We always append this to the end of an EXIDX section.
5406 Arm_address output_address
= section_start
+ section_size
;
5408 // Write out the entry. The first word either points to the beginning
5409 // or after the end of a text section. The second word is the special
5410 // EXIDX_CANTUNWIND value.
5411 uint32_t prel31_offset
= output_address
- this->address();
5412 if (Bits
<31>::has_overflow32(offset
))
5413 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5414 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5415 prel31_offset
& 0x7fffffffU
);
5416 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5417 elfcpp::EXIDX_CANTUNWIND
);
5419 of
->write_output_view(this->offset(), oview_size
, oview
);
5422 // Arm_exidx_merged_section methods.
5424 // Constructor for Arm_exidx_merged_section.
5425 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5426 // SECTION_OFFSET_MAP points to a section offset map describing how
5427 // parts of the input section are mapped to output. DELETED_BYTES is
5428 // the number of bytes deleted from the EXIDX input section.
5430 Arm_exidx_merged_section::Arm_exidx_merged_section(
5431 const Arm_exidx_input_section
& exidx_input_section
,
5432 const Arm_exidx_section_offset_map
& section_offset_map
,
5433 uint32_t deleted_bytes
)
5434 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5435 exidx_input_section
.shndx(),
5436 exidx_input_section
.addralign()),
5437 exidx_input_section_(exidx_input_section
),
5438 section_offset_map_(section_offset_map
)
5440 // If we retain or discard the whole EXIDX input section, we would
5442 gold_assert(deleted_bytes
!= 0
5443 && deleted_bytes
!= this->exidx_input_section_
.size());
5445 // Fix size here so that we do not need to implement set_final_data_size.
5446 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5447 this->set_data_size(size
);
5448 this->fix_data_size();
5450 // Allocate buffer for section contents and build contents.
5451 this->section_contents_
= new unsigned char[size
];
5454 // Build the contents of a merged EXIDX output section.
5457 Arm_exidx_merged_section::build_contents(
5458 const unsigned char* original_contents
,
5459 section_size_type original_size
)
5461 // Go over spans of input offsets and write only those that are not
5463 section_offset_type in_start
= 0;
5464 section_offset_type out_start
= 0;
5465 section_offset_type in_max
=
5466 convert_types
<section_offset_type
>(original_size
);
5467 section_offset_type out_max
=
5468 convert_types
<section_offset_type
>(this->data_size());
5469 for (Arm_exidx_section_offset_map::const_iterator p
=
5470 this->section_offset_map_
.begin();
5471 p
!= this->section_offset_map_
.end();
5474 section_offset_type in_end
= p
->first
;
5475 gold_assert(in_end
>= in_start
);
5476 section_offset_type out_end
= p
->second
;
5477 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5480 size_t out_chunk_size
=
5481 convert_types
<size_t>(out_end
- out_start
+ 1);
5483 gold_assert(out_chunk_size
== in_chunk_size
5484 && in_end
< in_max
&& out_end
< out_max
);
5486 memcpy(this->section_contents_
+ out_start
,
5487 original_contents
+ in_start
,
5489 out_start
+= out_chunk_size
;
5491 in_start
+= in_chunk_size
;
5495 // Given an input OBJECT, an input section index SHNDX within that
5496 // object, and an OFFSET relative to the start of that input
5497 // section, return whether or not the corresponding offset within
5498 // the output section is known. If this function returns true, it
5499 // sets *POUTPUT to the output offset. The value -1 indicates that
5500 // this input offset is being discarded.
5503 Arm_exidx_merged_section::do_output_offset(
5504 const Relobj
* relobj
,
5506 section_offset_type offset
,
5507 section_offset_type
* poutput
) const
5509 // We only handle offsets for the original EXIDX input section.
5510 if (relobj
!= this->exidx_input_section_
.relobj()
5511 || shndx
!= this->exidx_input_section_
.shndx())
5514 section_offset_type section_size
=
5515 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5516 if (offset
< 0 || offset
>= section_size
)
5517 // Input offset is out of valid range.
5521 // We need to look up the section offset map to determine the output
5522 // offset. Find the reference point in map that is first offset
5523 // bigger than or equal to this offset.
5524 Arm_exidx_section_offset_map::const_iterator p
=
5525 this->section_offset_map_
.lower_bound(offset
);
5527 // The section offset maps are build such that this should not happen if
5528 // input offset is in the valid range.
5529 gold_assert(p
!= this->section_offset_map_
.end());
5531 // We need to check if this is dropped.
5532 section_offset_type ref
= p
->first
;
5533 section_offset_type mapped_ref
= p
->second
;
5535 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5536 // Offset is present in output.
5537 *poutput
= mapped_ref
+ (offset
- ref
);
5539 // Offset is discarded owing to EXIDX entry merging.
5546 // Write this to output file OF.
5549 Arm_exidx_merged_section::do_write(Output_file
* of
)
5551 off_t offset
= this->offset();
5552 const section_size_type oview_size
= this->data_size();
5553 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5555 Output_section
* os
= this->relobj()->output_section(this->shndx());
5556 gold_assert(os
!= NULL
);
5558 memcpy(oview
, this->section_contents_
, oview_size
);
5559 of
->write_output_view(this->offset(), oview_size
, oview
);
5562 // Arm_exidx_fixup methods.
5564 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5565 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5566 // points to the end of the last seen EXIDX section.
5569 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5571 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5572 && this->last_input_section_
!= NULL
)
5574 Relobj
* relobj
= this->last_input_section_
->relobj();
5575 unsigned int text_shndx
= this->last_input_section_
->link();
5576 Arm_exidx_cantunwind
* cantunwind
=
5577 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5578 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5579 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5583 // Process an EXIDX section entry in input. Return whether this entry
5584 // can be deleted in the output. SECOND_WORD in the second word of the
5588 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5591 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5593 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5594 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5595 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5597 else if ((second_word
& 0x80000000) != 0)
5599 // Inlined unwinding data. Merge if equal to previous.
5600 delete_entry
= (merge_exidx_entries_
5601 && this->last_unwind_type_
== UT_INLINED_ENTRY
5602 && this->last_inlined_entry_
== second_word
);
5603 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5604 this->last_inlined_entry_
= second_word
;
5608 // Normal table entry. In theory we could merge these too,
5609 // but duplicate entries are likely to be much less common.
5610 delete_entry
= false;
5611 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5613 return delete_entry
;
5616 // Update the current section offset map during EXIDX section fix-up.
5617 // If there is no map, create one. INPUT_OFFSET is the offset of a
5618 // reference point, DELETED_BYTES is the number of deleted by in the
5619 // section so far. If DELETE_ENTRY is true, the reference point and
5620 // all offsets after the previous reference point are discarded.
5623 Arm_exidx_fixup::update_offset_map(
5624 section_offset_type input_offset
,
5625 section_size_type deleted_bytes
,
5628 if (this->section_offset_map_
== NULL
)
5629 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5630 section_offset_type output_offset
;
5632 output_offset
= Arm_exidx_input_section::invalid_offset
;
5634 output_offset
= input_offset
- deleted_bytes
;
5635 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5638 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5639 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5640 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5641 // If some entries are merged, also store a pointer to a newly created
5642 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5643 // owns the map and is responsible for releasing it after use.
5645 template<bool big_endian
>
5647 Arm_exidx_fixup::process_exidx_section(
5648 const Arm_exidx_input_section
* exidx_input_section
,
5649 const unsigned char* section_contents
,
5650 section_size_type section_size
,
5651 Arm_exidx_section_offset_map
** psection_offset_map
)
5653 Relobj
* relobj
= exidx_input_section
->relobj();
5654 unsigned shndx
= exidx_input_section
->shndx();
5656 if ((section_size
% 8) != 0)
5658 // Something is wrong with this section. Better not touch it.
5659 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5660 relobj
->name().c_str(), shndx
);
5661 this->last_input_section_
= exidx_input_section
;
5662 this->last_unwind_type_
= UT_NONE
;
5666 uint32_t deleted_bytes
= 0;
5667 bool prev_delete_entry
= false;
5668 gold_assert(this->section_offset_map_
== NULL
);
5670 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5672 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5674 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5675 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5677 bool delete_entry
= this->process_exidx_entry(second_word
);
5679 // Entry deletion causes changes in output offsets. We use a std::map
5680 // to record these. And entry (x, y) means input offset x
5681 // is mapped to output offset y. If y is invalid_offset, then x is
5682 // dropped in the output. Because of the way std::map::lower_bound
5683 // works, we record the last offset in a region w.r.t to keeping or
5684 // dropping. If there is no entry (x0, y0) for an input offset x0,
5685 // the output offset y0 of it is determined by the output offset y1 of
5686 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5687 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5689 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5690 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5692 // Update total deleted bytes for this entry.
5696 prev_delete_entry
= delete_entry
;
5699 // If section offset map is not NULL, make an entry for the end of
5701 if (this->section_offset_map_
!= NULL
)
5702 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5704 *psection_offset_map
= this->section_offset_map_
;
5705 this->section_offset_map_
= NULL
;
5706 this->last_input_section_
= exidx_input_section
;
5708 // Set the first output text section so that we can link the EXIDX output
5709 // section to it. Ignore any EXIDX input section that is completely merged.
5710 if (this->first_output_text_section_
== NULL
5711 && deleted_bytes
!= section_size
)
5713 unsigned int link
= exidx_input_section
->link();
5714 Output_section
* os
= relobj
->output_section(link
);
5715 gold_assert(os
!= NULL
);
5716 this->first_output_text_section_
= os
;
5719 return deleted_bytes
;
5722 // Arm_output_section methods.
5724 // Create a stub group for input sections from BEGIN to END. OWNER
5725 // points to the input section to be the owner a new stub table.
5727 template<bool big_endian
>
5729 Arm_output_section
<big_endian
>::create_stub_group(
5730 Input_section_list::const_iterator begin
,
5731 Input_section_list::const_iterator end
,
5732 Input_section_list::const_iterator owner
,
5733 Target_arm
<big_endian
>* target
,
5734 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5737 // We use a different kind of relaxed section in an EXIDX section.
5738 // The static casting from Output_relaxed_input_section to
5739 // Arm_input_section is invalid in an EXIDX section. We are okay
5740 // because we should not be calling this for an EXIDX section.
5741 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5743 // Currently we convert ordinary input sections into relaxed sections only
5744 // at this point but we may want to support creating relaxed input section
5745 // very early. So we check here to see if owner is already a relaxed
5748 Arm_input_section
<big_endian
>* arm_input_section
;
5749 if (owner
->is_relaxed_input_section())
5752 Arm_input_section
<big_endian
>::as_arm_input_section(
5753 owner
->relaxed_input_section());
5757 gold_assert(owner
->is_input_section());
5758 // Create a new relaxed input section. We need to lock the original
5760 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5762 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5763 new_relaxed_sections
->push_back(arm_input_section
);
5766 // Create a stub table.
5767 Stub_table
<big_endian
>* stub_table
=
5768 target
->new_stub_table(arm_input_section
);
5770 arm_input_section
->set_stub_table(stub_table
);
5772 Input_section_list::const_iterator p
= begin
;
5773 Input_section_list::const_iterator prev_p
;
5775 // Look for input sections or relaxed input sections in [begin ... end].
5778 if (p
->is_input_section() || p
->is_relaxed_input_section())
5780 // The stub table information for input sections live
5781 // in their objects.
5782 Arm_relobj
<big_endian
>* arm_relobj
=
5783 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5784 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5788 while (prev_p
!= end
);
5791 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5792 // of stub groups. We grow a stub group by adding input section until the
5793 // size is just below GROUP_SIZE. The last input section will be converted
5794 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5795 // input section after the stub table, effectively double the group size.
5797 // This is similar to the group_sections() function in elf32-arm.c but is
5798 // implemented differently.
5800 template<bool big_endian
>
5802 Arm_output_section
<big_endian
>::group_sections(
5803 section_size_type group_size
,
5804 bool stubs_always_after_branch
,
5805 Target_arm
<big_endian
>* target
,
5808 // States for grouping.
5811 // No group is being built.
5813 // A group is being built but the stub table is not found yet.
5814 // We keep group a stub group until the size is just under GROUP_SIZE.
5815 // The last input section in the group will be used as the stub table.
5816 FINDING_STUB_SECTION
,
5817 // A group is being built and we have already found a stub table.
5818 // We enter this state to grow a stub group by adding input section
5819 // after the stub table. This effectively doubles the group size.
5823 // Any newly created relaxed sections are stored here.
5824 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5826 State state
= NO_GROUP
;
5827 section_size_type off
= 0;
5828 section_size_type group_begin_offset
= 0;
5829 section_size_type group_end_offset
= 0;
5830 section_size_type stub_table_end_offset
= 0;
5831 Input_section_list::const_iterator group_begin
=
5832 this->input_sections().end();
5833 Input_section_list::const_iterator stub_table
=
5834 this->input_sections().end();
5835 Input_section_list::const_iterator group_end
= this->input_sections().end();
5836 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5837 p
!= this->input_sections().end();
5840 section_size_type section_begin_offset
=
5841 align_address(off
, p
->addralign());
5842 section_size_type section_end_offset
=
5843 section_begin_offset
+ p
->data_size();
5845 // Check to see if we should group the previously seen sections.
5851 case FINDING_STUB_SECTION
:
5852 // Adding this section makes the group larger than GROUP_SIZE.
5853 if (section_end_offset
- group_begin_offset
>= group_size
)
5855 if (stubs_always_after_branch
)
5857 gold_assert(group_end
!= this->input_sections().end());
5858 this->create_stub_group(group_begin
, group_end
, group_end
,
5859 target
, &new_relaxed_sections
,
5865 // But wait, there's more! Input sections up to
5866 // stub_group_size bytes after the stub table can be
5867 // handled by it too.
5868 state
= HAS_STUB_SECTION
;
5869 stub_table
= group_end
;
5870 stub_table_end_offset
= group_end_offset
;
5875 case HAS_STUB_SECTION
:
5876 // Adding this section makes the post stub-section group larger
5878 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5880 gold_assert(group_end
!= this->input_sections().end());
5881 this->create_stub_group(group_begin
, group_end
, stub_table
,
5882 target
, &new_relaxed_sections
, task
);
5891 // If we see an input section and currently there is no group, start
5892 // a new one. Skip any empty sections. We look at the data size
5893 // instead of calling p->relobj()->section_size() to avoid locking.
5894 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5895 && (p
->data_size() != 0))
5897 if (state
== NO_GROUP
)
5899 state
= FINDING_STUB_SECTION
;
5901 group_begin_offset
= section_begin_offset
;
5904 // Keep track of the last input section seen.
5906 group_end_offset
= section_end_offset
;
5909 off
= section_end_offset
;
5912 // Create a stub group for any ungrouped sections.
5913 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5915 gold_assert(group_end
!= this->input_sections().end());
5916 this->create_stub_group(group_begin
, group_end
,
5917 (state
== FINDING_STUB_SECTION
5920 target
, &new_relaxed_sections
, task
);
5923 // Convert input section into relaxed input section in a batch.
5924 if (!new_relaxed_sections
.empty())
5925 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5927 // Update the section offsets
5928 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5930 Arm_relobj
<big_endian
>* arm_relobj
=
5931 Arm_relobj
<big_endian
>::as_arm_relobj(
5932 new_relaxed_sections
[i
]->relobj());
5933 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5934 // Tell Arm_relobj that this input section is converted.
5935 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5939 // Append non empty text sections in this to LIST in ascending
5940 // order of their position in this.
5942 template<bool big_endian
>
5944 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5945 Text_section_list
* list
)
5947 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5949 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5950 p
!= this->input_sections().end();
5953 // We only care about plain or relaxed input sections. We also
5954 // ignore any merged sections.
5955 if (p
->is_input_section() || p
->is_relaxed_input_section())
5956 list
->push_back(Text_section_list::value_type(p
->relobj(),
5961 template<bool big_endian
>
5963 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5965 const Text_section_list
& sorted_text_sections
,
5966 Symbol_table
* symtab
,
5967 bool merge_exidx_entries
,
5970 // We should only do this for the EXIDX output section.
5971 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5973 // We don't want the relaxation loop to undo these changes, so we discard
5974 // the current saved states and take another one after the fix-up.
5975 this->discard_states();
5977 // Remove all input sections.
5978 uint64_t address
= this->address();
5979 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5980 Input_section_list input_sections
;
5981 this->reset_address_and_file_offset();
5982 this->get_input_sections(address
, std::string(""), &input_sections
);
5984 if (!this->input_sections().empty())
5985 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5987 // Go through all the known input sections and record them.
5988 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5989 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5990 Section_id_hash
> Text_to_exidx_map
;
5991 Text_to_exidx_map text_to_exidx_map
;
5992 for (Input_section_list::const_iterator p
= input_sections
.begin();
5993 p
!= input_sections
.end();
5996 // This should never happen. At this point, we should only see
5997 // plain EXIDX input sections.
5998 gold_assert(!p
->is_relaxed_input_section());
5999 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
6002 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
6004 // Go over the sorted text sections.
6005 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
6006 Section_id_set processed_input_sections
;
6007 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
6008 p
!= sorted_text_sections
.end();
6011 Relobj
* relobj
= p
->first
;
6012 unsigned int shndx
= p
->second
;
6014 Arm_relobj
<big_endian
>* arm_relobj
=
6015 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
6016 const Arm_exidx_input_section
* exidx_input_section
=
6017 arm_relobj
->exidx_input_section_by_link(shndx
);
6019 // If this text section has no EXIDX section or if the EXIDX section
6020 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
6021 // of the last seen EXIDX section.
6022 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
6024 exidx_fixup
.add_exidx_cantunwind_as_needed();
6028 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
6029 unsigned int exidx_shndx
= exidx_input_section
->shndx();
6030 Section_id
sid(exidx_relobj
, exidx_shndx
);
6031 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
6032 if (iter
== text_to_exidx_map
.end())
6034 // This is odd. We have not seen this EXIDX input section before.
6035 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
6036 // issue a warning instead. We assume the user knows what he
6037 // or she is doing. Otherwise, this is an error.
6038 if (layout
->script_options()->saw_sections_clause())
6039 gold_warning(_("unwinding may not work because EXIDX input section"
6040 " %u of %s is not in EXIDX output section"),
6041 exidx_shndx
, exidx_relobj
->name().c_str());
6043 gold_error(_("unwinding may not work because EXIDX input section"
6044 " %u of %s is not in EXIDX output section"),
6045 exidx_shndx
, exidx_relobj
->name().c_str());
6047 exidx_fixup
.add_exidx_cantunwind_as_needed();
6051 // We need to access the contents of the EXIDX section, lock the
6053 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
6054 section_size_type exidx_size
;
6055 const unsigned char* exidx_contents
=
6056 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
6058 // Fix up coverage and append input section to output data list.
6059 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
6060 uint32_t deleted_bytes
=
6061 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
6064 §ion_offset_map
);
6066 if (deleted_bytes
== exidx_input_section
->size())
6068 // The whole EXIDX section got merged. Remove it from output.
6069 gold_assert(section_offset_map
== NULL
);
6070 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
6072 // All local symbols defined in this input section will be dropped.
6073 // We need to adjust output local symbol count.
6074 arm_relobj
->set_output_local_symbol_count_needs_update();
6076 else if (deleted_bytes
> 0)
6078 // Some entries are merged. We need to convert this EXIDX input
6079 // section into a relaxed section.
6080 gold_assert(section_offset_map
!= NULL
);
6082 Arm_exidx_merged_section
* merged_section
=
6083 new Arm_exidx_merged_section(*exidx_input_section
,
6084 *section_offset_map
, deleted_bytes
);
6085 merged_section
->build_contents(exidx_contents
, exidx_size
);
6087 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
6088 this->add_relaxed_input_section(layout
, merged_section
, secname
);
6089 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
6091 // All local symbols defined in discarded portions of this input
6092 // section will be dropped. We need to adjust output local symbol
6094 arm_relobj
->set_output_local_symbol_count_needs_update();
6098 // Just add back the EXIDX input section.
6099 gold_assert(section_offset_map
== NULL
);
6100 const Output_section::Input_section
* pis
= iter
->second
;
6101 gold_assert(pis
->is_input_section());
6102 this->add_script_input_section(*pis
);
6105 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
6108 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6109 exidx_fixup
.add_exidx_cantunwind_as_needed();
6111 // Remove any known EXIDX input sections that are not processed.
6112 for (Input_section_list::const_iterator p
= input_sections
.begin();
6113 p
!= input_sections
.end();
6116 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
6117 == processed_input_sections
.end())
6119 // We discard a known EXIDX section because its linked
6120 // text section has been folded by ICF. We also discard an
6121 // EXIDX section with error, the output does not matter in this
6122 // case. We do this to avoid triggering asserts.
6123 Arm_relobj
<big_endian
>* arm_relobj
=
6124 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6125 const Arm_exidx_input_section
* exidx_input_section
=
6126 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
6127 gold_assert(exidx_input_section
!= NULL
);
6128 if (!exidx_input_section
->has_errors())
6130 unsigned int text_shndx
= exidx_input_section
->link();
6131 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
6134 // Remove this from link. We also need to recount the
6136 p
->relobj()->set_output_section(p
->shndx(), NULL
);
6137 arm_relobj
->set_output_local_symbol_count_needs_update();
6141 // Link exidx output section to the first seen output section and
6142 // set correct entry size.
6143 this->set_link_section(exidx_fixup
.first_output_text_section());
6144 this->set_entsize(8);
6146 // Make changes permanent.
6147 this->save_states();
6148 this->set_section_offsets_need_adjustment();
6151 // Link EXIDX output sections to text output sections.
6153 template<bool big_endian
>
6155 Arm_output_section
<big_endian
>::set_exidx_section_link()
6157 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
6158 if (!this->input_sections().empty())
6160 Input_section_list::const_iterator p
= this->input_sections().begin();
6161 Arm_relobj
<big_endian
>* arm_relobj
=
6162 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6163 unsigned exidx_shndx
= p
->shndx();
6164 const Arm_exidx_input_section
* exidx_input_section
=
6165 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
6166 gold_assert(exidx_input_section
!= NULL
);
6167 unsigned int text_shndx
= exidx_input_section
->link();
6168 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
6169 this->set_link_section(os
);
6173 // Arm_relobj methods.
6175 // Determine if an input section is scannable for stub processing. SHDR is
6176 // the header of the section and SHNDX is the section index. OS is the output
6177 // section for the input section and SYMTAB is the global symbol table used to
6178 // look up ICF information.
6180 template<bool big_endian
>
6182 Arm_relobj
<big_endian
>::section_is_scannable(
6183 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6185 const Output_section
* os
,
6186 const Symbol_table
* symtab
)
6188 // Skip any empty sections, unallocated sections or sections whose
6189 // type are not SHT_PROGBITS.
6190 if (shdr
.get_sh_size() == 0
6191 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6192 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6195 // Skip any discarded or ICF'ed sections.
6196 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6199 // If this requires special offset handling, check to see if it is
6200 // a relaxed section. If this is not, then it is a merged section that
6201 // we cannot handle.
6202 if (this->is_output_section_offset_invalid(shndx
))
6204 const Output_relaxed_input_section
* poris
=
6205 os
->find_relaxed_input_section(this, shndx
);
6213 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6214 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6216 template<bool big_endian
>
6218 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6219 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6220 const Relobj::Output_sections
& out_sections
,
6221 const Symbol_table
* symtab
,
6222 const unsigned char* pshdrs
)
6224 unsigned int sh_type
= shdr
.get_sh_type();
6225 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6228 // Ignore empty section.
6229 off_t sh_size
= shdr
.get_sh_size();
6233 // Ignore reloc section with unexpected symbol table. The
6234 // error will be reported in the final link.
6235 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6238 unsigned int reloc_size
;
6239 if (sh_type
== elfcpp::SHT_REL
)
6240 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6242 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6244 // Ignore reloc section with unexpected entsize or uneven size.
6245 // The error will be reported in the final link.
6246 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6249 // Ignore reloc section with bad info. This error will be
6250 // reported in the final link.
6251 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6252 if (index
>= this->shnum())
6255 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6256 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6257 return this->section_is_scannable(text_shdr
, index
,
6258 out_sections
[index
], symtab
);
6261 // Return the output address of either a plain input section or a relaxed
6262 // input section. SHNDX is the section index. We define and use this
6263 // instead of calling Output_section::output_address because that is slow
6264 // for large output.
6266 template<bool big_endian
>
6268 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6272 if (this->is_output_section_offset_invalid(shndx
))
6274 const Output_relaxed_input_section
* poris
=
6275 os
->find_relaxed_input_section(this, shndx
);
6276 // We do not handle merged sections here.
6277 gold_assert(poris
!= NULL
);
6278 return poris
->address();
6281 return os
->address() + this->get_output_section_offset(shndx
);
6284 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6285 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6287 template<bool big_endian
>
6289 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6290 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6293 const Symbol_table
* symtab
)
6295 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6298 // If the section does not cross any 4K-boundaries, it does not need to
6300 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6301 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6307 // Scan a section for Cortex-A8 workaround.
6309 template<bool big_endian
>
6311 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6312 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6315 Target_arm
<big_endian
>* arm_target
)
6317 // Look for the first mapping symbol in this section. It should be
6319 Mapping_symbol_position
section_start(shndx
, 0);
6320 typename
Mapping_symbols_info::const_iterator p
=
6321 this->mapping_symbols_info_
.lower_bound(section_start
);
6323 // There are no mapping symbols for this section. Treat it as a data-only
6325 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6328 Arm_address output_address
=
6329 this->simple_input_section_output_address(shndx
, os
);
6331 // Get the section contents.
6332 section_size_type input_view_size
= 0;
6333 const unsigned char* input_view
=
6334 this->section_contents(shndx
, &input_view_size
, false);
6336 // We need to go through the mapping symbols to determine what to
6337 // scan. There are two reasons. First, we should look at THUMB code and
6338 // THUMB code only. Second, we only want to look at the 4K-page boundary
6339 // to speed up the scanning.
6341 while (p
!= this->mapping_symbols_info_
.end()
6342 && p
->first
.first
== shndx
)
6344 typename
Mapping_symbols_info::const_iterator next
=
6345 this->mapping_symbols_info_
.upper_bound(p
->first
);
6347 // Only scan part of a section with THUMB code.
6348 if (p
->second
== 't')
6350 // Determine the end of this range.
6351 section_size_type span_start
=
6352 convert_to_section_size_type(p
->first
.second
);
6353 section_size_type span_end
;
6354 if (next
!= this->mapping_symbols_info_
.end()
6355 && next
->first
.first
== shndx
)
6356 span_end
= convert_to_section_size_type(next
->first
.second
);
6358 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6360 if (((span_start
+ output_address
) & ~0xfffUL
)
6361 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6363 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6364 span_start
, span_end
,
6374 // Scan relocations for stub generation.
6376 template<bool big_endian
>
6378 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6379 Target_arm
<big_endian
>* arm_target
,
6380 const Symbol_table
* symtab
,
6381 const Layout
* layout
)
6383 unsigned int shnum
= this->shnum();
6384 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6386 // Read the section headers.
6387 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6391 // To speed up processing, we set up hash tables for fast lookup of
6392 // input offsets to output addresses.
6393 this->initialize_input_to_output_maps();
6395 const Relobj::Output_sections
& out_sections(this->output_sections());
6397 Relocate_info
<32, big_endian
> relinfo
;
6398 relinfo
.symtab
= symtab
;
6399 relinfo
.layout
= layout
;
6400 relinfo
.object
= this;
6402 // Do relocation stubs scanning.
6403 const unsigned char* p
= pshdrs
+ shdr_size
;
6404 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6406 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6407 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6410 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6411 Arm_address output_offset
= this->get_output_section_offset(index
);
6412 Arm_address output_address
;
6413 if (output_offset
!= invalid_address
)
6414 output_address
= out_sections
[index
]->address() + output_offset
;
6417 // Currently this only happens for a relaxed section.
6418 const Output_relaxed_input_section
* poris
=
6419 out_sections
[index
]->find_relaxed_input_section(this, index
);
6420 gold_assert(poris
!= NULL
);
6421 output_address
= poris
->address();
6424 // Get the relocations.
6425 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6429 // Get the section contents. This does work for the case in which
6430 // we modify the contents of an input section. We need to pass the
6431 // output view under such circumstances.
6432 section_size_type input_view_size
= 0;
6433 const unsigned char* input_view
=
6434 this->section_contents(index
, &input_view_size
, false);
6436 relinfo
.reloc_shndx
= i
;
6437 relinfo
.data_shndx
= index
;
6438 unsigned int sh_type
= shdr
.get_sh_type();
6439 unsigned int reloc_size
;
6440 if (sh_type
== elfcpp::SHT_REL
)
6441 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6443 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6445 Output_section
* os
= out_sections
[index
];
6446 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6447 shdr
.get_sh_size() / reloc_size
,
6449 output_offset
== invalid_address
,
6450 input_view
, output_address
,
6455 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6456 // after its relocation section, if there is one, is processed for
6457 // relocation stubs. Merging this loop with the one above would have been
6458 // complicated since we would have had to make sure that relocation stub
6459 // scanning is done first.
6460 if (arm_target
->fix_cortex_a8())
6462 const unsigned char* p
= pshdrs
+ shdr_size
;
6463 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6465 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6466 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6469 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6474 // After we've done the relocations, we release the hash tables,
6475 // since we no longer need them.
6476 this->free_input_to_output_maps();
6479 // Count the local symbols. The ARM backend needs to know if a symbol
6480 // is a THUMB function or not. For global symbols, it is easy because
6481 // the Symbol object keeps the ELF symbol type. For local symbol it is
6482 // harder because we cannot access this information. So we override the
6483 // do_count_local_symbol in parent and scan local symbols to mark
6484 // THUMB functions. This is not the most efficient way but I do not want to
6485 // slow down other ports by calling a per symbol target hook inside
6486 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6488 template<bool big_endian
>
6490 Arm_relobj
<big_endian
>::do_count_local_symbols(
6491 Stringpool_template
<char>* pool
,
6492 Stringpool_template
<char>* dynpool
)
6494 // We need to fix-up the values of any local symbols whose type are
6497 // Ask parent to count the local symbols.
6498 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6499 const unsigned int loccount
= this->local_symbol_count();
6503 // Initialize the thumb function bit-vector.
6504 std::vector
<bool> empty_vector(loccount
, false);
6505 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6507 // Read the symbol table section header.
6508 const unsigned int symtab_shndx
= this->symtab_shndx();
6509 elfcpp::Shdr
<32, big_endian
>
6510 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6511 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6513 // Read the local symbols.
6514 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6515 gold_assert(loccount
== symtabshdr
.get_sh_info());
6516 off_t locsize
= loccount
* sym_size
;
6517 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6518 locsize
, true, true);
6520 // For mapping symbol processing, we need to read the symbol names.
6521 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6522 if (strtab_shndx
>= this->shnum())
6524 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6528 elfcpp::Shdr
<32, big_endian
>
6529 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6530 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6532 this->error(_("symbol table name section has wrong type: %u"),
6533 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6536 const char* pnames
=
6537 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6538 strtabshdr
.get_sh_size(),
6541 // Loop over the local symbols and mark any local symbols pointing
6542 // to THUMB functions.
6544 // Skip the first dummy symbol.
6546 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6547 this->local_values();
6548 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6550 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6551 elfcpp::STT st_type
= sym
.get_st_type();
6552 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6553 Arm_address input_value
= lv
.input_value();
6555 // Check to see if this is a mapping symbol.
6556 const char* sym_name
= pnames
+ sym
.get_st_name();
6557 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6560 unsigned int input_shndx
=
6561 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6562 gold_assert(is_ordinary
);
6564 // Strip of LSB in case this is a THUMB symbol.
6565 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6566 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6569 if (st_type
== elfcpp::STT_ARM_TFUNC
6570 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6572 // This is a THUMB function. Mark this and canonicalize the
6573 // symbol value by setting LSB.
6574 this->local_symbol_is_thumb_function_
[i
] = true;
6575 if ((input_value
& 1) == 0)
6576 lv
.set_input_value(input_value
| 1);
6581 // Relocate sections.
6582 template<bool big_endian
>
6584 Arm_relobj
<big_endian
>::do_relocate_sections(
6585 const Symbol_table
* symtab
,
6586 const Layout
* layout
,
6587 const unsigned char* pshdrs
,
6589 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6591 // Call parent to relocate sections.
6592 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6593 pshdrs
, of
, pviews
);
6595 // We do not generate stubs if doing a relocatable link.
6596 if (parameters
->options().relocatable())
6599 // Relocate stub tables.
6600 unsigned int shnum
= this->shnum();
6602 Target_arm
<big_endian
>* arm_target
=
6603 Target_arm
<big_endian
>::default_target();
6605 Relocate_info
<32, big_endian
> relinfo
;
6606 relinfo
.symtab
= symtab
;
6607 relinfo
.layout
= layout
;
6608 relinfo
.object
= this;
6610 for (unsigned int i
= 1; i
< shnum
; ++i
)
6612 Arm_input_section
<big_endian
>* arm_input_section
=
6613 arm_target
->find_arm_input_section(this, i
);
6615 if (arm_input_section
!= NULL
6616 && arm_input_section
->is_stub_table_owner()
6617 && !arm_input_section
->stub_table()->empty())
6619 // We cannot discard a section if it owns a stub table.
6620 Output_section
* os
= this->output_section(i
);
6621 gold_assert(os
!= NULL
);
6623 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6624 relinfo
.reloc_shdr
= NULL
;
6625 relinfo
.data_shndx
= i
;
6626 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6628 gold_assert((*pviews
)[i
].view
!= NULL
);
6630 // We are passed the output section view. Adjust it to cover the
6632 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6633 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6634 && ((stub_table
->address() + stub_table
->data_size())
6635 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6637 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6638 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6639 Arm_address address
= stub_table
->address();
6640 section_size_type view_size
= stub_table
->data_size();
6642 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6646 // Apply Cortex A8 workaround if applicable.
6647 if (this->section_has_cortex_a8_workaround(i
))
6649 unsigned char* view
= (*pviews
)[i
].view
;
6650 Arm_address view_address
= (*pviews
)[i
].address
;
6651 section_size_type view_size
= (*pviews
)[i
].view_size
;
6652 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6654 // Adjust view to cover section.
6655 Output_section
* os
= this->output_section(i
);
6656 gold_assert(os
!= NULL
);
6657 Arm_address section_address
=
6658 this->simple_input_section_output_address(i
, os
);
6659 uint64_t section_size
= this->section_size(i
);
6661 gold_assert(section_address
>= view_address
6662 && ((section_address
+ section_size
)
6663 <= (view_address
+ view_size
)));
6665 unsigned char* section_view
= view
+ (section_address
- view_address
);
6667 // Apply the Cortex-A8 workaround to the output address range
6668 // corresponding to this input section.
6669 stub_table
->apply_cortex_a8_workaround_to_address_range(
6676 if (parameters
->options().be8())
6678 section_size_type span_start
, span_end
;
6679 elfcpp::Shdr
<32, big_endian
>
6680 shdr(pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
);
6681 Mapping_symbol_position
section_start(i
, 0);
6682 typename
Mapping_symbols_info::const_iterator p
=
6683 this->mapping_symbols_info_
.lower_bound(section_start
);
6684 unsigned char* view
= (*pviews
)[i
].view
;
6685 Arm_address view_address
= (*pviews
)[i
].address
;
6686 section_size_type view_size
= (*pviews
)[i
].view_size
;
6687 while (p
!= this->mapping_symbols_info_
.end()
6688 && p
->first
.first
== i
)
6690 typename
Mapping_symbols_info::const_iterator next
=
6691 this->mapping_symbols_info_
.upper_bound(p
->first
);
6693 // Only swap arm or thumb code.
6694 if ((p
->second
== 'a') || (p
->second
== 't'))
6696 Output_section
* os
= this->output_section(i
);
6697 gold_assert(os
!= NULL
);
6698 Arm_address section_address
=
6699 this->simple_input_section_output_address(i
, os
);
6700 span_start
= convert_to_section_size_type(p
->first
.second
);
6701 if (next
!= this->mapping_symbols_info_
.end()
6702 && next
->first
.first
== i
)
6704 convert_to_section_size_type(next
->first
.second
);
6707 convert_to_section_size_type(shdr
.get_sh_size());
6708 unsigned char* section_view
=
6709 view
+ (section_address
- view_address
);
6710 uint64_t section_size
= this->section_size(i
);
6712 gold_assert(section_address
>= view_address
6713 && ((section_address
+ section_size
)
6714 <= (view_address
+ view_size
)));
6716 // Set Output view for swapping
6717 unsigned char *oview
= section_view
+ span_start
;
6718 unsigned int index
= 0;
6719 if (p
->second
== 'a')
6721 while (index
+ 3 < (span_end
- span_start
))
6723 typedef typename
elfcpp::Swap
<32, big_endian
>
6726 reinterpret_cast<Valtype
*>(oview
+index
);
6727 uint32_t val
= elfcpp::Swap
<32, false>::readval(wv
);
6728 elfcpp::Swap
<32, true>::writeval(wv
, val
);
6732 else if (p
->second
== 't')
6734 while (index
+ 1 < (span_end
- span_start
))
6736 typedef typename
elfcpp::Swap
<16, big_endian
>
6739 reinterpret_cast<Valtype
*>(oview
+index
);
6740 uint16_t val
= elfcpp::Swap
<16, false>::readval(wv
);
6741 elfcpp::Swap
<16, true>::writeval(wv
, val
);
6752 // Find the linked text section of an EXIDX section by looking at the first
6753 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6754 // must be linked to its associated code section via the sh_link field of
6755 // its section header. However, some tools are broken and the link is not
6756 // always set. LD just drops such an EXIDX section silently, causing the
6757 // associated code not unwindabled. Here we try a little bit harder to
6758 // discover the linked code section.
6760 // PSHDR points to the section header of a relocation section of an EXIDX
6761 // section. If we can find a linked text section, return true and
6762 // store the text section index in the location PSHNDX. Otherwise
6765 template<bool big_endian
>
6767 Arm_relobj
<big_endian
>::find_linked_text_section(
6768 const unsigned char* pshdr
,
6769 const unsigned char* psyms
,
6770 unsigned int* pshndx
)
6772 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6774 // If there is no relocation, we cannot find the linked text section.
6776 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6777 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6779 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6780 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6782 // Get the relocations.
6783 const unsigned char* prelocs
=
6784 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6786 // Find the REL31 relocation for the first word of the first EXIDX entry.
6787 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6789 Arm_address r_offset
;
6790 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6791 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6793 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6794 r_info
= reloc
.get_r_info();
6795 r_offset
= reloc
.get_r_offset();
6799 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6800 r_info
= reloc
.get_r_info();
6801 r_offset
= reloc
.get_r_offset();
6804 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6805 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6808 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6810 || r_sym
>= this->local_symbol_count()
6814 // This is the relocation for the first word of the first EXIDX entry.
6815 // We expect to see a local section symbol.
6816 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6817 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6818 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6822 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6823 gold_assert(is_ordinary
);
6833 // Make an EXIDX input section object for an EXIDX section whose index is
6834 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6835 // is the section index of the linked text section.
6837 template<bool big_endian
>
6839 Arm_relobj
<big_endian
>::make_exidx_input_section(
6841 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6842 unsigned int text_shndx
,
6843 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6845 // Create an Arm_exidx_input_section object for this EXIDX section.
6846 Arm_exidx_input_section
* exidx_input_section
=
6847 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6848 shdr
.get_sh_addralign(),
6849 text_shdr
.get_sh_size());
6851 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6852 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6854 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6856 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6857 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6858 this->name().c_str());
6859 exidx_input_section
->set_has_errors();
6861 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6863 unsigned other_exidx_shndx
=
6864 this->exidx_section_map_
[text_shndx
]->shndx();
6865 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6867 this->section_name(shndx
).c_str(), shndx
,
6868 this->section_name(other_exidx_shndx
).c_str(),
6869 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6870 text_shndx
, this->name().c_str());
6871 exidx_input_section
->set_has_errors();
6874 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6876 // Check section flags of text section.
6877 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6879 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6881 this->section_name(shndx
).c_str(), shndx
,
6882 this->section_name(text_shndx
).c_str(), text_shndx
,
6883 this->name().c_str());
6884 exidx_input_section
->set_has_errors();
6886 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6887 // I would like to make this an error but currently ld just ignores
6889 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6891 this->section_name(shndx
).c_str(), shndx
,
6892 this->section_name(text_shndx
).c_str(), text_shndx
,
6893 this->name().c_str());
6896 // Read the symbol information.
6898 template<bool big_endian
>
6900 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6902 // Call parent class to read symbol information.
6903 this->base_read_symbols(sd
);
6905 // If this input file is a binary file, it has no processor
6906 // specific flags and attributes section.
6907 Input_file::Format format
= this->input_file()->format();
6908 if (format
!= Input_file::FORMAT_ELF
)
6910 gold_assert(format
== Input_file::FORMAT_BINARY
);
6911 this->merge_flags_and_attributes_
= false;
6915 // Read processor-specific flags in ELF file header.
6916 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6917 elfcpp::Elf_sizes
<32>::ehdr_size
,
6919 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6920 this->processor_specific_flags_
= ehdr
.get_e_flags();
6922 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6924 std::vector
<unsigned int> deferred_exidx_sections
;
6925 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6926 const unsigned char* pshdrs
= sd
->section_headers
->data();
6927 const unsigned char* ps
= pshdrs
+ shdr_size
;
6928 bool must_merge_flags_and_attributes
= false;
6929 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6931 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6933 // Sometimes an object has no contents except the section name string
6934 // table and an empty symbol table with the undefined symbol. We
6935 // don't want to merge processor-specific flags from such an object.
6936 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6938 // Symbol table is not empty.
6939 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6940 elfcpp::Elf_sizes
<32>::sym_size
;
6941 if (shdr
.get_sh_size() > sym_size
)
6942 must_merge_flags_and_attributes
= true;
6944 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6945 // If this is neither an empty symbol table nor a string table,
6947 must_merge_flags_and_attributes
= true;
6949 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6951 gold_assert(this->attributes_section_data_
== NULL
);
6952 section_offset_type section_offset
= shdr
.get_sh_offset();
6953 section_size_type section_size
=
6954 convert_to_section_size_type(shdr
.get_sh_size());
6955 const unsigned char* view
=
6956 this->get_view(section_offset
, section_size
, true, false);
6957 this->attributes_section_data_
=
6958 new Attributes_section_data(view
, section_size
);
6960 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6962 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6963 if (text_shndx
== elfcpp::SHN_UNDEF
)
6964 deferred_exidx_sections
.push_back(i
);
6967 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6968 + text_shndx
* shdr_size
);
6969 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6971 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6972 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6973 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6974 this->section_name(i
).c_str(), this->name().c_str());
6979 if (!must_merge_flags_and_attributes
)
6981 gold_assert(deferred_exidx_sections
.empty());
6982 this->merge_flags_and_attributes_
= false;
6986 // Some tools are broken and they do not set the link of EXIDX sections.
6987 // We look at the first relocation to figure out the linked sections.
6988 if (!deferred_exidx_sections
.empty())
6990 // We need to go over the section headers again to find the mapping
6991 // from sections being relocated to their relocation sections. This is
6992 // a bit inefficient as we could do that in the loop above. However,
6993 // we do not expect any deferred EXIDX sections normally. So we do not
6994 // want to slow down the most common path.
6995 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6996 Reloc_map reloc_map
;
6997 ps
= pshdrs
+ shdr_size
;
6998 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
7000 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7001 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
7002 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
7004 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
7005 if (info_shndx
>= this->shnum())
7006 gold_error(_("relocation section %u has invalid info %u"),
7008 Reloc_map::value_type
value(info_shndx
, i
);
7009 std::pair
<Reloc_map::iterator
, bool> result
=
7010 reloc_map
.insert(value
);
7012 gold_error(_("section %u has multiple relocation sections "
7014 info_shndx
, i
, reloc_map
[info_shndx
]);
7018 // Read the symbol table section header.
7019 const unsigned int symtab_shndx
= this->symtab_shndx();
7020 elfcpp::Shdr
<32, big_endian
>
7021 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
7022 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
7024 // Read the local symbols.
7025 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
7026 const unsigned int loccount
= this->local_symbol_count();
7027 gold_assert(loccount
== symtabshdr
.get_sh_info());
7028 off_t locsize
= loccount
* sym_size
;
7029 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
7030 locsize
, true, true);
7032 // Process the deferred EXIDX sections.
7033 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
7035 unsigned int shndx
= deferred_exidx_sections
[i
];
7036 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
7037 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
7038 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
7039 if (it
!= reloc_map
.end())
7040 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
7041 psyms
, &text_shndx
);
7042 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
7043 + text_shndx
* shdr_size
);
7044 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
7049 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
7050 // sections for unwinding. These sections are referenced implicitly by
7051 // text sections linked in the section headers. If we ignore these implicit
7052 // references, the .ARM.exidx sections and any .ARM.extab sections they use
7053 // will be garbage-collected incorrectly. Hence we override the same function
7054 // in the base class to handle these implicit references.
7056 template<bool big_endian
>
7058 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
7060 Read_relocs_data
* rd
)
7062 // First, call base class method to process relocations in this object.
7063 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
7065 // If --gc-sections is not specified, there is nothing more to do.
7066 // This happens when --icf is used but --gc-sections is not.
7067 if (!parameters
->options().gc_sections())
7070 unsigned int shnum
= this->shnum();
7071 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
7072 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
7076 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
7077 // to these from the linked text sections.
7078 const unsigned char* ps
= pshdrs
+ shdr_size
;
7079 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
7081 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7082 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
7084 // Found an .ARM.exidx section, add it to the set of reachable
7085 // sections from its linked text section.
7086 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
7087 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
7092 // Update output local symbol count. Owing to EXIDX entry merging, some local
7093 // symbols will be removed in output. Adjust output local symbol count
7094 // accordingly. We can only changed the static output local symbol count. It
7095 // is too late to change the dynamic symbols.
7097 template<bool big_endian
>
7099 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
7101 // Caller should check that this needs updating. We want caller checking
7102 // because output_local_symbol_count_needs_update() is most likely inlined.
7103 gold_assert(this->output_local_symbol_count_needs_update_
);
7105 gold_assert(this->symtab_shndx() != -1U);
7106 if (this->symtab_shndx() == 0)
7108 // This object has no symbols. Weird but legal.
7112 // Read the symbol table section header.
7113 const unsigned int symtab_shndx
= this->symtab_shndx();
7114 elfcpp::Shdr
<32, big_endian
>
7115 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
7116 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
7118 // Read the local symbols.
7119 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
7120 const unsigned int loccount
= this->local_symbol_count();
7121 gold_assert(loccount
== symtabshdr
.get_sh_info());
7122 off_t locsize
= loccount
* sym_size
;
7123 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
7124 locsize
, true, true);
7126 // Loop over the local symbols.
7128 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
7130 const Output_sections
& out_sections(this->output_sections());
7131 unsigned int shnum
= this->shnum();
7132 unsigned int count
= 0;
7133 // Skip the first, dummy, symbol.
7135 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
7137 elfcpp::Sym
<32, big_endian
> sym(psyms
);
7139 Symbol_value
<32>& lv((*this->local_values())[i
]);
7141 // This local symbol was already discarded by do_count_local_symbols.
7142 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
7146 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
7151 Output_section
* os
= out_sections
[shndx
];
7153 // This local symbol no longer has an output section. Discard it.
7156 lv
.set_no_output_symtab_entry();
7160 // Currently we only discard parts of EXIDX input sections.
7161 // We explicitly check for a merged EXIDX input section to avoid
7162 // calling Output_section_data::output_offset unless necessary.
7163 if ((this->get_output_section_offset(shndx
) == invalid_address
)
7164 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
7166 section_offset_type output_offset
=
7167 os
->output_offset(this, shndx
, lv
.input_value());
7168 if (output_offset
== -1)
7170 // This symbol is defined in a part of an EXIDX input section
7171 // that is discarded due to entry merging.
7172 lv
.set_no_output_symtab_entry();
7181 this->set_output_local_symbol_count(count
);
7182 this->output_local_symbol_count_needs_update_
= false;
7185 // Arm_dynobj methods.
7187 // Read the symbol information.
7189 template<bool big_endian
>
7191 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
7193 // Call parent class to read symbol information.
7194 this->base_read_symbols(sd
);
7196 // Read processor-specific flags in ELF file header.
7197 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
7198 elfcpp::Elf_sizes
<32>::ehdr_size
,
7200 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
7201 this->processor_specific_flags_
= ehdr
.get_e_flags();
7203 // Read the attributes section if there is one.
7204 // We read from the end because gas seems to put it near the end of
7205 // the section headers.
7206 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
7207 const unsigned char* ps
=
7208 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
7209 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
7211 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7212 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
7214 section_offset_type section_offset
= shdr
.get_sh_offset();
7215 section_size_type section_size
=
7216 convert_to_section_size_type(shdr
.get_sh_size());
7217 const unsigned char* view
=
7218 this->get_view(section_offset
, section_size
, true, false);
7219 this->attributes_section_data_
=
7220 new Attributes_section_data(view
, section_size
);
7226 // Stub_addend_reader methods.
7228 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7230 template<bool big_endian
>
7231 elfcpp::Elf_types
<32>::Elf_Swxword
7232 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
7233 unsigned int r_type
,
7234 const unsigned char* view
,
7235 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
7237 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
7241 case elfcpp::R_ARM_CALL
:
7242 case elfcpp::R_ARM_JUMP24
:
7243 case elfcpp::R_ARM_PLT32
:
7245 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7246 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7247 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7248 return Bits
<26>::sign_extend32(val
<< 2);
7251 case elfcpp::R_ARM_THM_CALL
:
7252 case elfcpp::R_ARM_THM_JUMP24
:
7253 case elfcpp::R_ARM_THM_XPC22
:
7255 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7256 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7257 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7258 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7259 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7262 case elfcpp::R_ARM_THM_JUMP19
:
7264 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7265 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7266 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7267 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7268 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7276 // Arm_output_data_got methods.
7278 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7279 // The first one is initialized to be 1, which is the module index for
7280 // the main executable and the second one 0. A reloc of the type
7281 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7282 // be applied by gold. GSYM is a global symbol.
7284 template<bool big_endian
>
7286 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7287 unsigned int got_type
,
7290 if (gsym
->has_got_offset(got_type
))
7293 // We are doing a static link. Just mark it as belong to module 1,
7295 unsigned int got_offset
= this->add_constant(1);
7296 gsym
->set_got_offset(got_type
, got_offset
);
7297 got_offset
= this->add_constant(0);
7298 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7299 elfcpp::R_ARM_TLS_DTPOFF32
,
7303 // Same as the above but for a local symbol.
7305 template<bool big_endian
>
7307 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7308 unsigned int got_type
,
7309 Sized_relobj_file
<32, big_endian
>* object
,
7312 if (object
->local_has_got_offset(index
, got_type
))
7315 // We are doing a static link. Just mark it as belong to module 1,
7317 unsigned int got_offset
= this->add_constant(1);
7318 object
->set_local_got_offset(index
, got_type
, got_offset
);
7319 got_offset
= this->add_constant(0);
7320 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7321 elfcpp::R_ARM_TLS_DTPOFF32
,
7325 template<bool big_endian
>
7327 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7329 // Call parent to write out GOT.
7330 Output_data_got
<32, big_endian
>::do_write(of
);
7332 // We are done if there is no fix up.
7333 if (this->static_relocs_
.empty())
7336 gold_assert(parameters
->doing_static_link());
7338 const off_t offset
= this->offset();
7339 const section_size_type oview_size
=
7340 convert_to_section_size_type(this->data_size());
7341 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7343 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7344 gold_assert(tls_segment
!= NULL
);
7346 // The thread pointer $tp points to the TCB, which is followed by the
7347 // TLS. So we need to adjust $tp relative addressing by this amount.
7348 Arm_address aligned_tcb_size
=
7349 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7351 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7353 Static_reloc
& reloc(this->static_relocs_
[i
]);
7356 if (!reloc
.symbol_is_global())
7358 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7359 const Symbol_value
<32>* psymval
=
7360 reloc
.relobj()->local_symbol(reloc
.index());
7362 // We are doing static linking. Issue an error and skip this
7363 // relocation if the symbol is undefined or in a discarded_section.
7365 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7366 if ((shndx
== elfcpp::SHN_UNDEF
)
7368 && shndx
!= elfcpp::SHN_UNDEF
7369 && !object
->is_section_included(shndx
)
7370 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7372 gold_error(_("undefined or discarded local symbol %u from "
7373 " object %s in GOT"),
7374 reloc
.index(), reloc
.relobj()->name().c_str());
7378 value
= psymval
->value(object
, 0);
7382 const Symbol
* gsym
= reloc
.symbol();
7383 gold_assert(gsym
!= NULL
);
7384 if (gsym
->is_forwarder())
7385 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7387 // We are doing static linking. Issue an error and skip this
7388 // relocation if the symbol is undefined or in a discarded_section
7389 // unless it is a weakly_undefined symbol.
7390 if ((gsym
->is_defined_in_discarded_section()
7391 || gsym
->is_undefined())
7392 && !gsym
->is_weak_undefined())
7394 gold_error(_("undefined or discarded symbol %s in GOT"),
7399 if (!gsym
->is_weak_undefined())
7401 const Sized_symbol
<32>* sym
=
7402 static_cast<const Sized_symbol
<32>*>(gsym
);
7403 value
= sym
->value();
7409 unsigned got_offset
= reloc
.got_offset();
7410 gold_assert(got_offset
< oview_size
);
7412 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7413 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7415 switch (reloc
.r_type())
7417 case elfcpp::R_ARM_TLS_DTPOFF32
:
7420 case elfcpp::R_ARM_TLS_TPOFF32
:
7421 x
= value
+ aligned_tcb_size
;
7426 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7429 of
->write_output_view(offset
, oview_size
, oview
);
7432 // A class to handle the PLT data.
7433 // This is an abstract base class that handles most of the linker details
7434 // but does not know the actual contents of PLT entries. The derived
7435 // classes below fill in those details.
7437 template<bool big_endian
>
7438 class Output_data_plt_arm
: public Output_section_data
7441 // Unlike aarch64, which records symbol value in "addend" field of relocations
7442 // and could be done at the same time an IRelative reloc is created for the
7443 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7444 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7445 // to keep necessary symbol information for later use in do_write. We usually
7446 // have only a very limited number of ifuncs, so the extra data required here
7449 struct IRelative_data
7451 IRelative_data(Sized_symbol
<32>* sized_symbol
)
7452 : symbol_is_global_(true)
7454 u_
.global
= sized_symbol
;
7457 IRelative_data(Sized_relobj_file
<32, big_endian
>* relobj
,
7459 : symbol_is_global_(false)
7461 u_
.local
.relobj
= relobj
;
7462 u_
.local
.index
= index
;
7467 Sized_symbol
<32>* global
;
7471 Sized_relobj_file
<32, big_endian
>* relobj
;
7476 bool symbol_is_global_
;
7479 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7482 Output_data_plt_arm(Layout
* layout
, uint64_t addralign
,
7483 Arm_output_data_got
<big_endian
>* got
,
7484 Output_data_space
* got_plt
,
7485 Output_data_space
* got_irelative
);
7487 // Add an entry to the PLT.
7489 add_entry(Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
);
7491 // Add the relocation for a plt entry.
7493 add_relocation(Symbol_table
* symtab
, Layout
* layout
,
7494 Symbol
* gsym
, unsigned int got_offset
);
7496 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7498 add_local_ifunc_entry(Symbol_table
* symtab
, Layout
*,
7499 Sized_relobj_file
<32, big_endian
>* relobj
,
7500 unsigned int local_sym_index
);
7502 // Return the .rel.plt section data.
7503 const Reloc_section
*
7505 { return this->rel_
; }
7507 // Return the PLT relocation container for IRELATIVE.
7509 rel_irelative(Symbol_table
*, Layout
*);
7511 // Return the number of PLT entries.
7514 { return this->count_
+ this->irelative_count_
; }
7516 // Return the offset of the first non-reserved PLT entry.
7518 first_plt_entry_offset() const
7519 { return this->do_first_plt_entry_offset(); }
7521 // Return the size of a PLT entry.
7523 get_plt_entry_size() const
7524 { return this->do_get_plt_entry_size(); }
7526 // Return the PLT address for globals.
7528 address_for_global(const Symbol
*) const;
7530 // Return the PLT address for locals.
7532 address_for_local(const Relobj
*, unsigned int symndx
) const;
7535 // Fill in the first PLT entry.
7537 fill_first_plt_entry(unsigned char* pov
,
7538 Arm_address got_address
,
7539 Arm_address plt_address
)
7540 { this->do_fill_first_plt_entry(pov
, got_address
, plt_address
); }
7543 fill_plt_entry(unsigned char* pov
,
7544 Arm_address got_address
,
7545 Arm_address plt_address
,
7546 unsigned int got_offset
,
7547 unsigned int plt_offset
)
7548 { do_fill_plt_entry(pov
, got_address
, plt_address
, got_offset
, plt_offset
); }
7550 virtual unsigned int
7551 do_first_plt_entry_offset() const = 0;
7553 virtual unsigned int
7554 do_get_plt_entry_size() const = 0;
7557 do_fill_first_plt_entry(unsigned char* pov
,
7558 Arm_address got_address
,
7559 Arm_address plt_address
) = 0;
7562 do_fill_plt_entry(unsigned char* pov
,
7563 Arm_address got_address
,
7564 Arm_address plt_address
,
7565 unsigned int got_offset
,
7566 unsigned int plt_offset
) = 0;
7569 do_adjust_output_section(Output_section
* os
);
7571 // Write to a map file.
7573 do_print_to_mapfile(Mapfile
* mapfile
) const
7574 { mapfile
->print_output_data(this, _("** PLT")); }
7577 // Set the final size.
7579 set_final_data_size()
7581 this->set_data_size(this->first_plt_entry_offset()
7582 + ((this->count_
+ this->irelative_count_
)
7583 * this->get_plt_entry_size()));
7586 // Write out the PLT data.
7588 do_write(Output_file
*);
7590 // Record irelative symbol data.
7591 void insert_irelative_data(const IRelative_data
& idata
)
7592 { irelative_data_vec_
.push_back(idata
); }
7594 // The reloc section.
7595 Reloc_section
* rel_
;
7596 // The IRELATIVE relocs, if necessary. These must follow the
7597 // regular PLT relocations.
7598 Reloc_section
* irelative_rel_
;
7599 // The .got section.
7600 Arm_output_data_got
<big_endian
>* got_
;
7601 // The .got.plt section.
7602 Output_data_space
* got_plt_
;
7603 // The part of the .got.plt section used for IRELATIVE relocs.
7604 Output_data_space
* got_irelative_
;
7605 // The number of PLT entries.
7606 unsigned int count_
;
7607 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7608 // follow the regular PLT entries.
7609 unsigned int irelative_count_
;
7610 // Vector for irelative data.
7611 typedef std::vector
<IRelative_data
> IRelative_data_vec
;
7612 IRelative_data_vec irelative_data_vec_
;
7615 // Create the PLT section. The ordinary .got section is an argument,
7616 // since we need to refer to the start. We also create our own .got
7617 // section just for PLT entries.
7619 template<bool big_endian
>
7620 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(
7621 Layout
* layout
, uint64_t addralign
,
7622 Arm_output_data_got
<big_endian
>* got
,
7623 Output_data_space
* got_plt
,
7624 Output_data_space
* got_irelative
)
7625 : Output_section_data(addralign
), irelative_rel_(NULL
),
7626 got_(got
), got_plt_(got_plt
), got_irelative_(got_irelative
),
7627 count_(0), irelative_count_(0)
7629 this->rel_
= new Reloc_section(false);
7630 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7631 elfcpp::SHF_ALLOC
, this->rel_
,
7632 ORDER_DYNAMIC_PLT_RELOCS
, false);
7635 template<bool big_endian
>
7637 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7642 // Add an entry to the PLT.
7644 template<bool big_endian
>
7646 Output_data_plt_arm
<big_endian
>::add_entry(Symbol_table
* symtab
,
7650 gold_assert(!gsym
->has_plt_offset());
7652 unsigned int* entry_count
;
7653 Output_section_data_build
* got
;
7655 // We have 2 different types of plt entry here, normal and ifunc.
7657 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7658 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7660 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7661 // second 12, third 24 ... etc.
7663 // IFunc plt entries *always* come after *normal* plt entries.
7665 // Notice, when computing the plt address of a certain symbol, "plt_address +
7666 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7667 // target->plt_address_for_local() instead.
7669 int begin_offset
= 0;
7670 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7671 && gsym
->can_use_relative_reloc(false))
7673 entry_count
= &this->irelative_count_
;
7674 got
= this->got_irelative_
;
7675 // For irelative plt entries, offset is relative to the end of normal plt
7676 // entries, so it starts from 0.
7678 // Record symbol information.
7679 this->insert_irelative_data(
7680 IRelative_data(symtab
->get_sized_symbol
<32>(gsym
)));
7684 entry_count
= &this->count_
;
7685 got
= this->got_plt_
;
7686 // Note that for normal plt entries, when setting the PLT offset we skip
7687 // the initial reserved PLT entry.
7688 begin_offset
= this->first_plt_entry_offset();
7691 gsym
->set_plt_offset(begin_offset
7692 + (*entry_count
) * this->get_plt_entry_size());
7696 section_offset_type got_offset
= got
->current_data_size();
7698 // Every PLT entry needs a GOT entry which points back to the PLT
7699 // entry (this will be changed by the dynamic linker, normally
7700 // lazily when the function is called).
7701 got
->set_current_data_size(got_offset
+ 4);
7703 // Every PLT entry needs a reloc.
7704 this->add_relocation(symtab
, layout
, gsym
, got_offset
);
7706 // Note that we don't need to save the symbol. The contents of the
7707 // PLT are independent of which symbols are used. The symbols only
7708 // appear in the relocations.
7711 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7714 template<bool big_endian
>
7716 Output_data_plt_arm
<big_endian
>::add_local_ifunc_entry(
7717 Symbol_table
* symtab
,
7719 Sized_relobj_file
<32, big_endian
>* relobj
,
7720 unsigned int local_sym_index
)
7722 this->insert_irelative_data(IRelative_data(relobj
, local_sym_index
));
7724 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7725 // no longer correct. Use target->plt_address_for_local() instead.
7726 unsigned int plt_offset
= this->irelative_count_
* this->get_plt_entry_size();
7727 ++this->irelative_count_
;
7729 section_offset_type got_offset
= this->got_irelative_
->current_data_size();
7731 // Every PLT entry needs a GOT entry which points back to the PLT
7733 this->got_irelative_
->set_current_data_size(got_offset
+ 4);
7736 // Every PLT entry needs a reloc.
7737 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7738 rel
->add_symbolless_local_addend(relobj
, local_sym_index
,
7739 elfcpp::R_ARM_IRELATIVE
,
7740 this->got_irelative_
, got_offset
);
7745 // Add the relocation for a PLT entry.
7747 template<bool big_endian
>
7749 Output_data_plt_arm
<big_endian
>::add_relocation(
7750 Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
, unsigned int got_offset
)
7752 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7753 && gsym
->can_use_relative_reloc(false))
7755 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7756 rel
->add_symbolless_global_addend(gsym
, elfcpp::R_ARM_IRELATIVE
,
7757 this->got_irelative_
, got_offset
);
7761 gsym
->set_needs_dynsym_entry();
7762 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7768 // Create the irelative relocation data.
7770 template<bool big_endian
>
7771 typename Output_data_plt_arm
<big_endian
>::Reloc_section
*
7772 Output_data_plt_arm
<big_endian
>::rel_irelative(Symbol_table
* symtab
,
7775 if (this->irelative_rel_
== NULL
)
7777 // Since irelative relocations goes into 'rel.dyn', we delegate the
7778 // creation of irelative_rel_ to where rel_dyn section gets created.
7779 Target_arm
<big_endian
>* arm_target
=
7780 Target_arm
<big_endian
>::default_target();
7781 this->irelative_rel_
= arm_target
->rel_irelative_section(layout
);
7783 // Make sure we have a place for the TLSDESC relocations, in
7784 // case we see any later on.
7785 // this->rel_tlsdesc(layout);
7786 if (parameters
->doing_static_link())
7788 // A statically linked executable will only have a .rel.plt section to
7789 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7790 // will use these symbols to locate the IRELATIVE relocs at program
7792 symtab
->define_in_output_data("__rel_iplt_start", NULL
,
7793 Symbol_table::PREDEFINED
,
7794 this->irelative_rel_
, 0, 0,
7795 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7796 elfcpp::STV_HIDDEN
, 0, false, true);
7797 symtab
->define_in_output_data("__rel_iplt_end", NULL
,
7798 Symbol_table::PREDEFINED
,
7799 this->irelative_rel_
, 0, 0,
7800 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7801 elfcpp::STV_HIDDEN
, 0, true, true);
7804 return this->irelative_rel_
;
7808 // Return the PLT address for a global symbol.
7810 template<bool big_endian
>
7812 Output_data_plt_arm
<big_endian
>::address_for_global(const Symbol
* gsym
) const
7814 uint64_t begin_offset
= 0;
7815 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7816 && gsym
->can_use_relative_reloc(false))
7818 begin_offset
= (this->first_plt_entry_offset() +
7819 this->count_
* this->get_plt_entry_size());
7821 return this->address() + begin_offset
+ gsym
->plt_offset();
7825 // Return the PLT address for a local symbol. These are always
7826 // IRELATIVE relocs.
7828 template<bool big_endian
>
7830 Output_data_plt_arm
<big_endian
>::address_for_local(
7831 const Relobj
* object
,
7832 unsigned int r_sym
) const
7834 return (this->address()
7835 + this->first_plt_entry_offset()
7836 + this->count_
* this->get_plt_entry_size()
7837 + object
->local_plt_offset(r_sym
));
7841 template<bool big_endian
>
7842 class Output_data_plt_arm_standard
: public Output_data_plt_arm
<big_endian
>
7845 Output_data_plt_arm_standard(Layout
* layout
,
7846 Arm_output_data_got
<big_endian
>* got
,
7847 Output_data_space
* got_plt
,
7848 Output_data_space
* got_irelative
)
7849 : Output_data_plt_arm
<big_endian
>(layout
, 4, got
, got_plt
, got_irelative
)
7853 // Return the offset of the first non-reserved PLT entry.
7854 virtual unsigned int
7855 do_first_plt_entry_offset() const
7856 { return sizeof(first_plt_entry
); }
7859 do_fill_first_plt_entry(unsigned char* pov
,
7860 Arm_address got_address
,
7861 Arm_address plt_address
);
7864 // Template for the first PLT entry.
7865 static const uint32_t first_plt_entry
[5];
7869 // FIXME: This is not very flexible. Right now this has only been tested
7870 // on armv5te. If we are to support additional architecture features like
7871 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7873 // The first entry in the PLT.
7874 template<bool big_endian
>
7875 const uint32_t Output_data_plt_arm_standard
<big_endian
>::first_plt_entry
[5] =
7877 0xe52de004, // str lr, [sp, #-4]!
7878 0xe59fe004, // ldr lr, [pc, #4]
7879 0xe08fe00e, // add lr, pc, lr
7880 0xe5bef008, // ldr pc, [lr, #8]!
7881 0x00000000, // &GOT[0] - .
7884 template<bool big_endian
>
7886 Output_data_plt_arm_standard
<big_endian
>::do_fill_first_plt_entry(
7888 Arm_address got_address
,
7889 Arm_address plt_address
)
7891 // Write first PLT entry. All but the last word are constants.
7892 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7893 / sizeof(first_plt_entry
[0]));
7894 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7896 if (parameters
->options().be8())
7898 elfcpp::Swap
<32, false>::writeval(pov
+ i
* 4,
7899 first_plt_entry
[i
]);
7903 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4,
7904 first_plt_entry
[i
]);
7907 // Last word in first PLT entry is &GOT[0] - .
7908 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7909 got_address
- (plt_address
+ 16));
7912 // Subsequent entries in the PLT.
7913 // This class generates short (12-byte) entries, for displacements up to 2^28.
7915 template<bool big_endian
>
7916 class Output_data_plt_arm_short
: public Output_data_plt_arm_standard
<big_endian
>
7919 Output_data_plt_arm_short(Layout
* layout
,
7920 Arm_output_data_got
<big_endian
>* got
,
7921 Output_data_space
* got_plt
,
7922 Output_data_space
* got_irelative
)
7923 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7927 // Return the size of a PLT entry.
7928 virtual unsigned int
7929 do_get_plt_entry_size() const
7930 { return sizeof(plt_entry
); }
7933 do_fill_plt_entry(unsigned char* pov
,
7934 Arm_address got_address
,
7935 Arm_address plt_address
,
7936 unsigned int got_offset
,
7937 unsigned int plt_offset
);
7940 // Template for subsequent PLT entries.
7941 static const uint32_t plt_entry
[3];
7944 template<bool big_endian
>
7945 const uint32_t Output_data_plt_arm_short
<big_endian
>::plt_entry
[3] =
7947 0xe28fc600, // add ip, pc, #0xNN00000
7948 0xe28cca00, // add ip, ip, #0xNN000
7949 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7952 template<bool big_endian
>
7954 Output_data_plt_arm_short
<big_endian
>::do_fill_plt_entry(
7956 Arm_address got_address
,
7957 Arm_address plt_address
,
7958 unsigned int got_offset
,
7959 unsigned int plt_offset
)
7961 int32_t offset
= ((got_address
+ got_offset
)
7962 - (plt_address
+ plt_offset
+ 8));
7963 if (offset
< 0 || offset
> 0x0fffffff)
7964 gold_error(_("PLT offset too large, try linking with --long-plt"));
7966 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7967 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7968 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7970 if (parameters
->options().be8())
7972 elfcpp::Swap
<32, false>::writeval(pov
, plt_insn0
);
7973 elfcpp::Swap
<32, false>::writeval(pov
+ 4, plt_insn1
);
7974 elfcpp::Swap
<32, false>::writeval(pov
+ 8, plt_insn2
);
7978 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7979 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7980 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7984 // This class generates long (16-byte) entries, for arbitrary displacements.
7986 template<bool big_endian
>
7987 class Output_data_plt_arm_long
: public Output_data_plt_arm_standard
<big_endian
>
7990 Output_data_plt_arm_long(Layout
* layout
,
7991 Arm_output_data_got
<big_endian
>* got
,
7992 Output_data_space
* got_plt
,
7993 Output_data_space
* got_irelative
)
7994 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7998 // Return the size of a PLT entry.
7999 virtual unsigned int
8000 do_get_plt_entry_size() const
8001 { return sizeof(plt_entry
); }
8004 do_fill_plt_entry(unsigned char* pov
,
8005 Arm_address got_address
,
8006 Arm_address plt_address
,
8007 unsigned int got_offset
,
8008 unsigned int plt_offset
);
8011 // Template for subsequent PLT entries.
8012 static const uint32_t plt_entry
[4];
8015 template<bool big_endian
>
8016 const uint32_t Output_data_plt_arm_long
<big_endian
>::plt_entry
[4] =
8018 0xe28fc200, // add ip, pc, #0xN0000000
8019 0xe28cc600, // add ip, ip, #0xNN00000
8020 0xe28cca00, // add ip, ip, #0xNN000
8021 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
8024 template<bool big_endian
>
8026 Output_data_plt_arm_long
<big_endian
>::do_fill_plt_entry(
8028 Arm_address got_address
,
8029 Arm_address plt_address
,
8030 unsigned int got_offset
,
8031 unsigned int plt_offset
)
8033 int32_t offset
= ((got_address
+ got_offset
)
8034 - (plt_address
+ plt_offset
+ 8));
8036 uint32_t plt_insn0
= plt_entry
[0] | (offset
>> 28);
8037 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 20) & 0xff);
8038 uint32_t plt_insn2
= plt_entry
[2] | ((offset
>> 12) & 0xff);
8039 uint32_t plt_insn3
= plt_entry
[3] | (offset
& 0xfff);
8041 if (parameters
->options().be8())
8043 elfcpp::Swap
<32, false>::writeval(pov
, plt_insn0
);
8044 elfcpp::Swap
<32, false>::writeval(pov
+ 4, plt_insn1
);
8045 elfcpp::Swap
<32, false>::writeval(pov
+ 8, plt_insn2
);
8046 elfcpp::Swap
<32, false>::writeval(pov
+ 12, plt_insn3
);
8050 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
8051 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
8052 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
8053 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 12, plt_insn3
);
8057 // Write out the PLT. This uses the hand-coded instructions above,
8058 // and adjusts them as needed. This is all specified by the arm ELF
8059 // Processor Supplement.
8061 template<bool big_endian
>
8063 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
8065 const off_t offset
= this->offset();
8066 const section_size_type oview_size
=
8067 convert_to_section_size_type(this->data_size());
8068 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
8070 const off_t got_file_offset
= this->got_plt_
->offset();
8071 gold_assert(got_file_offset
+ this->got_plt_
->data_size()
8072 == this->got_irelative_
->offset());
8073 const section_size_type got_size
=
8074 convert_to_section_size_type(this->got_plt_
->data_size()
8075 + this->got_irelative_
->data_size());
8076 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
8078 unsigned char* pov
= oview
;
8080 Arm_address plt_address
= this->address();
8081 Arm_address got_address
= this->got_plt_
->address();
8083 // Write first PLT entry.
8084 this->fill_first_plt_entry(pov
, got_address
, plt_address
);
8085 pov
+= this->first_plt_entry_offset();
8087 unsigned char* got_pov
= got_view
;
8089 memset(got_pov
, 0, 12);
8092 unsigned int plt_offset
= this->first_plt_entry_offset();
8093 unsigned int got_offset
= 12;
8094 const unsigned int count
= this->count_
+ this->irelative_count_
;
8095 gold_assert(this->irelative_count_
== this->irelative_data_vec_
.size());
8096 for (unsigned int i
= 0;
8099 pov
+= this->get_plt_entry_size(),
8101 plt_offset
+= this->get_plt_entry_size(),
8104 // Set and adjust the PLT entry itself.
8105 this->fill_plt_entry(pov
, got_address
, plt_address
,
8106 got_offset
, plt_offset
);
8109 if (i
< this->count_
)
8111 // For non-irelative got entries, the value is the beginning of plt.
8112 value
= plt_address
;
8116 // For irelative got entries, the value is the (global/local) symbol
8118 const IRelative_data
& idata
=
8119 this->irelative_data_vec_
[i
- this->count_
];
8120 if (idata
.symbol_is_global_
)
8122 // Set the entry in the GOT for irelative symbols. The content is
8123 // the address of the ifunc, not the address of plt start.
8124 const Sized_symbol
<32>* sized_symbol
= idata
.u_
.global
;
8125 gold_assert(sized_symbol
->type() == elfcpp::STT_GNU_IFUNC
);
8126 value
= sized_symbol
->value();
8130 value
= idata
.u_
.local
.relobj
->local_symbol_value(
8131 idata
.u_
.local
.index
, 0);
8134 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, value
);
8137 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
8138 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
8140 of
->write_output_view(offset
, oview_size
, oview
);
8141 of
->write_output_view(got_file_offset
, got_size
, got_view
);
8145 // Create a PLT entry for a global symbol.
8147 template<bool big_endian
>
8149 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
8152 if (gsym
->has_plt_offset())
8155 if (this->plt_
== NULL
)
8156 this->make_plt_section(symtab
, layout
);
8158 this->plt_
->add_entry(symtab
, layout
, gsym
);
8162 // Create the PLT section.
8163 template<bool big_endian
>
8165 Target_arm
<big_endian
>::make_plt_section(
8166 Symbol_table
* symtab
, Layout
* layout
)
8168 if (this->plt_
== NULL
)
8170 // Create the GOT section first.
8171 this->got_section(symtab
, layout
);
8173 // GOT for irelatives is create along with got.plt.
8174 gold_assert(this->got_
!= NULL
8175 && this->got_plt_
!= NULL
8176 && this->got_irelative_
!= NULL
);
8177 this->plt_
= this->make_data_plt(layout
, this->got_
, this->got_plt_
,
8178 this->got_irelative_
);
8180 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
8182 | elfcpp::SHF_EXECINSTR
),
8183 this->plt_
, ORDER_PLT
, false);
8184 symtab
->define_in_output_data("$a", NULL
,
8185 Symbol_table::PREDEFINED
,
8187 0, 0, elfcpp::STT_NOTYPE
,
8189 elfcpp::STV_DEFAULT
, 0,
8195 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
8197 template<bool big_endian
>
8199 Target_arm
<big_endian
>::make_local_ifunc_plt_entry(
8200 Symbol_table
* symtab
, Layout
* layout
,
8201 Sized_relobj_file
<32, big_endian
>* relobj
,
8202 unsigned int local_sym_index
)
8204 if (relobj
->local_has_plt_offset(local_sym_index
))
8206 if (this->plt_
== NULL
)
8207 this->make_plt_section(symtab
, layout
);
8208 unsigned int plt_offset
= this->plt_
->add_local_ifunc_entry(symtab
, layout
,
8211 relobj
->set_local_plt_offset(local_sym_index
, plt_offset
);
8215 // Return the number of entries in the PLT.
8217 template<bool big_endian
>
8219 Target_arm
<big_endian
>::plt_entry_count() const
8221 if (this->plt_
== NULL
)
8223 return this->plt_
->entry_count();
8226 // Return the offset of the first non-reserved PLT entry.
8228 template<bool big_endian
>
8230 Target_arm
<big_endian
>::first_plt_entry_offset() const
8232 return this->plt_
->first_plt_entry_offset();
8235 // Return the size of each PLT entry.
8237 template<bool big_endian
>
8239 Target_arm
<big_endian
>::plt_entry_size() const
8241 return this->plt_
->get_plt_entry_size();
8244 // Get the section to use for TLS_DESC relocations.
8246 template<bool big_endian
>
8247 typename Target_arm
<big_endian
>::Reloc_section
*
8248 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
8250 return this->plt_section()->rel_tls_desc(layout
);
8253 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8255 template<bool big_endian
>
8257 Target_arm
<big_endian
>::define_tls_base_symbol(
8258 Symbol_table
* symtab
,
8261 if (this->tls_base_symbol_defined_
)
8264 Output_segment
* tls_segment
= layout
->tls_segment();
8265 if (tls_segment
!= NULL
)
8267 bool is_exec
= parameters
->options().output_is_executable();
8268 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
8269 Symbol_table::PREDEFINED
,
8273 elfcpp::STV_HIDDEN
, 0,
8275 ? Symbol::SEGMENT_END
8276 : Symbol::SEGMENT_START
),
8279 this->tls_base_symbol_defined_
= true;
8282 // Create a GOT entry for the TLS module index.
8284 template<bool big_endian
>
8286 Target_arm
<big_endian
>::got_mod_index_entry(
8287 Symbol_table
* symtab
,
8289 Sized_relobj_file
<32, big_endian
>* object
)
8291 if (this->got_mod_index_offset_
== -1U)
8293 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
8294 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
8295 unsigned int got_offset
;
8296 if (!parameters
->doing_static_link())
8298 got_offset
= got
->add_constant(0);
8299 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
8300 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
8305 // We are doing a static link. Just mark it as belong to module 1,
8307 got_offset
= got
->add_constant(1);
8310 got
->add_constant(0);
8311 this->got_mod_index_offset_
= got_offset
;
8313 return this->got_mod_index_offset_
;
8316 // Optimize the TLS relocation type based on what we know about the
8317 // symbol. IS_FINAL is true if the final address of this symbol is
8318 // known at link time.
8320 template<bool big_endian
>
8321 tls::Tls_optimization
8322 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
8324 // FIXME: Currently we do not do any TLS optimization.
8325 return tls::TLSOPT_NONE
;
8328 // Get the Reference_flags for a particular relocation.
8330 template<bool big_endian
>
8332 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
8336 case elfcpp::R_ARM_NONE
:
8337 case elfcpp::R_ARM_V4BX
:
8338 case elfcpp::R_ARM_GNU_VTENTRY
:
8339 case elfcpp::R_ARM_GNU_VTINHERIT
:
8340 // No symbol reference.
8343 case elfcpp::R_ARM_ABS32
:
8344 case elfcpp::R_ARM_ABS16
:
8345 case elfcpp::R_ARM_ABS12
:
8346 case elfcpp::R_ARM_THM_ABS5
:
8347 case elfcpp::R_ARM_ABS8
:
8348 case elfcpp::R_ARM_BASE_ABS
:
8349 case elfcpp::R_ARM_MOVW_ABS_NC
:
8350 case elfcpp::R_ARM_MOVT_ABS
:
8351 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8352 case elfcpp::R_ARM_THM_MOVT_ABS
:
8353 case elfcpp::R_ARM_ABS32_NOI
:
8354 return Symbol::ABSOLUTE_REF
;
8356 case elfcpp::R_ARM_REL32
:
8357 case elfcpp::R_ARM_LDR_PC_G0
:
8358 case elfcpp::R_ARM_SBREL32
:
8359 case elfcpp::R_ARM_THM_PC8
:
8360 case elfcpp::R_ARM_BASE_PREL
:
8361 case elfcpp::R_ARM_MOVW_PREL_NC
:
8362 case elfcpp::R_ARM_MOVT_PREL
:
8363 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8364 case elfcpp::R_ARM_THM_MOVT_PREL
:
8365 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8366 case elfcpp::R_ARM_THM_PC12
:
8367 case elfcpp::R_ARM_REL32_NOI
:
8368 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8369 case elfcpp::R_ARM_ALU_PC_G0
:
8370 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8371 case elfcpp::R_ARM_ALU_PC_G1
:
8372 case elfcpp::R_ARM_ALU_PC_G2
:
8373 case elfcpp::R_ARM_LDR_PC_G1
:
8374 case elfcpp::R_ARM_LDR_PC_G2
:
8375 case elfcpp::R_ARM_LDRS_PC_G0
:
8376 case elfcpp::R_ARM_LDRS_PC_G1
:
8377 case elfcpp::R_ARM_LDRS_PC_G2
:
8378 case elfcpp::R_ARM_LDC_PC_G0
:
8379 case elfcpp::R_ARM_LDC_PC_G1
:
8380 case elfcpp::R_ARM_LDC_PC_G2
:
8381 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8382 case elfcpp::R_ARM_ALU_SB_G0
:
8383 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8384 case elfcpp::R_ARM_ALU_SB_G1
:
8385 case elfcpp::R_ARM_ALU_SB_G2
:
8386 case elfcpp::R_ARM_LDR_SB_G0
:
8387 case elfcpp::R_ARM_LDR_SB_G1
:
8388 case elfcpp::R_ARM_LDR_SB_G2
:
8389 case elfcpp::R_ARM_LDRS_SB_G0
:
8390 case elfcpp::R_ARM_LDRS_SB_G1
:
8391 case elfcpp::R_ARM_LDRS_SB_G2
:
8392 case elfcpp::R_ARM_LDC_SB_G0
:
8393 case elfcpp::R_ARM_LDC_SB_G1
:
8394 case elfcpp::R_ARM_LDC_SB_G2
:
8395 case elfcpp::R_ARM_MOVW_BREL_NC
:
8396 case elfcpp::R_ARM_MOVT_BREL
:
8397 case elfcpp::R_ARM_MOVW_BREL
:
8398 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8399 case elfcpp::R_ARM_THM_MOVT_BREL
:
8400 case elfcpp::R_ARM_THM_MOVW_BREL
:
8401 case elfcpp::R_ARM_GOTOFF32
:
8402 case elfcpp::R_ARM_GOTOFF12
:
8403 case elfcpp::R_ARM_SBREL31
:
8404 return Symbol::RELATIVE_REF
;
8406 case elfcpp::R_ARM_PLT32
:
8407 case elfcpp::R_ARM_CALL
:
8408 case elfcpp::R_ARM_JUMP24
:
8409 case elfcpp::R_ARM_THM_CALL
:
8410 case elfcpp::R_ARM_THM_JUMP24
:
8411 case elfcpp::R_ARM_THM_JUMP19
:
8412 case elfcpp::R_ARM_THM_JUMP6
:
8413 case elfcpp::R_ARM_THM_JUMP11
:
8414 case elfcpp::R_ARM_THM_JUMP8
:
8415 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8416 // in unwind tables. It may point to functions via PLTs.
8417 // So we treat it like call/jump relocations above.
8418 case elfcpp::R_ARM_PREL31
:
8419 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
8421 case elfcpp::R_ARM_GOT_BREL
:
8422 case elfcpp::R_ARM_GOT_ABS
:
8423 case elfcpp::R_ARM_GOT_PREL
:
8425 return Symbol::ABSOLUTE_REF
;
8427 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8428 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8429 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8430 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8431 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8432 return Symbol::TLS_REF
;
8434 case elfcpp::R_ARM_TARGET1
:
8435 case elfcpp::R_ARM_TARGET2
:
8436 case elfcpp::R_ARM_COPY
:
8437 case elfcpp::R_ARM_GLOB_DAT
:
8438 case elfcpp::R_ARM_JUMP_SLOT
:
8439 case elfcpp::R_ARM_RELATIVE
:
8440 case elfcpp::R_ARM_PC24
:
8441 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8442 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8443 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8445 // Not expected. We will give an error later.
8450 // Report an unsupported relocation against a local symbol.
8452 template<bool big_endian
>
8454 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
8455 Sized_relobj_file
<32, big_endian
>* object
,
8456 unsigned int r_type
)
8458 gold_error(_("%s: unsupported reloc %u against local symbol"),
8459 object
->name().c_str(), r_type
);
8462 // We are about to emit a dynamic relocation of type R_TYPE. If the
8463 // dynamic linker does not support it, issue an error. The GNU linker
8464 // only issues a non-PIC error for an allocated read-only section.
8465 // Here we know the section is allocated, but we don't know that it is
8466 // read-only. But we check for all the relocation types which the
8467 // glibc dynamic linker supports, so it seems appropriate to issue an
8468 // error even if the section is not read-only.
8470 template<bool big_endian
>
8472 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
8473 unsigned int r_type
)
8477 // These are the relocation types supported by glibc for ARM.
8478 case elfcpp::R_ARM_RELATIVE
:
8479 case elfcpp::R_ARM_COPY
:
8480 case elfcpp::R_ARM_GLOB_DAT
:
8481 case elfcpp::R_ARM_JUMP_SLOT
:
8482 case elfcpp::R_ARM_ABS32
:
8483 case elfcpp::R_ARM_ABS32_NOI
:
8484 case elfcpp::R_ARM_IRELATIVE
:
8485 case elfcpp::R_ARM_PC24
:
8486 // FIXME: The following 3 types are not supported by Android's dynamic
8488 case elfcpp::R_ARM_TLS_DTPMOD32
:
8489 case elfcpp::R_ARM_TLS_DTPOFF32
:
8490 case elfcpp::R_ARM_TLS_TPOFF32
:
8495 // This prevents us from issuing more than one error per reloc
8496 // section. But we can still wind up issuing more than one
8497 // error per object file.
8498 if (this->issued_non_pic_error_
)
8500 const Arm_reloc_property
* reloc_property
=
8501 arm_reloc_property_table
->get_reloc_property(r_type
);
8502 gold_assert(reloc_property
!= NULL
);
8503 object
->error(_("requires unsupported dynamic reloc %s; "
8504 "recompile with -fPIC"),
8505 reloc_property
->name().c_str());
8506 this->issued_non_pic_error_
= true;
8510 case elfcpp::R_ARM_NONE
:
8516 // Return whether we need to make a PLT entry for a relocation of the
8517 // given type against a STT_GNU_IFUNC symbol.
8519 template<bool big_endian
>
8521 Target_arm
<big_endian
>::Scan::reloc_needs_plt_for_ifunc(
8522 Sized_relobj_file
<32, big_endian
>* object
,
8523 unsigned int r_type
)
8525 int flags
= Scan::get_reference_flags(r_type
);
8526 if (flags
& Symbol::TLS_REF
)
8528 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8529 object
->name().c_str(), r_type
);
8536 // Scan a relocation for a local symbol.
8537 // FIXME: This only handles a subset of relocation types used by Android
8538 // on ARM v5te devices.
8540 template<bool big_endian
>
8542 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
8545 Sized_relobj_file
<32, big_endian
>* object
,
8546 unsigned int data_shndx
,
8547 Output_section
* output_section
,
8548 const elfcpp::Rel
<32, big_endian
>& reloc
,
8549 unsigned int r_type
,
8550 const elfcpp::Sym
<32, big_endian
>& lsym
,
8556 r_type
= target
->get_real_reloc_type(r_type
);
8558 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8559 bool is_ifunc
= lsym
.get_st_type() == elfcpp::STT_GNU_IFUNC
;
8560 if (is_ifunc
&& this->reloc_needs_plt_for_ifunc(object
, r_type
))
8562 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8563 target
->make_local_ifunc_plt_entry(symtab
, layout
, object
, r_sym
);
8568 case elfcpp::R_ARM_NONE
:
8569 case elfcpp::R_ARM_V4BX
:
8570 case elfcpp::R_ARM_GNU_VTENTRY
:
8571 case elfcpp::R_ARM_GNU_VTINHERIT
:
8574 case elfcpp::R_ARM_ABS32
:
8575 case elfcpp::R_ARM_ABS32_NOI
:
8576 // If building a shared library (or a position-independent
8577 // executable), we need to create a dynamic relocation for
8578 // this location. The relocation applied at link time will
8579 // apply the link-time value, so we flag the location with
8580 // an R_ARM_RELATIVE relocation so the dynamic loader can
8581 // relocate it easily.
8582 if (parameters
->options().output_is_position_independent())
8584 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8585 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8586 // If we are to add more other reloc types than R_ARM_ABS32,
8587 // we need to add check_non_pic(object, r_type) here.
8588 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
8589 output_section
, data_shndx
,
8590 reloc
.get_r_offset(), is_ifunc
);
8594 case elfcpp::R_ARM_ABS16
:
8595 case elfcpp::R_ARM_ABS12
:
8596 case elfcpp::R_ARM_THM_ABS5
:
8597 case elfcpp::R_ARM_ABS8
:
8598 case elfcpp::R_ARM_BASE_ABS
:
8599 case elfcpp::R_ARM_MOVW_ABS_NC
:
8600 case elfcpp::R_ARM_MOVT_ABS
:
8601 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8602 case elfcpp::R_ARM_THM_MOVT_ABS
:
8603 // If building a shared library (or a position-independent
8604 // executable), we need to create a dynamic relocation for
8605 // this location. Because the addend needs to remain in the
8606 // data section, we need to be careful not to apply this
8607 // relocation statically.
8608 if (parameters
->options().output_is_position_independent())
8610 check_non_pic(object
, r_type
);
8611 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8612 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8613 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
8614 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
8615 data_shndx
, reloc
.get_r_offset());
8618 gold_assert(lsym
.get_st_value() == 0);
8619 unsigned int shndx
= lsym
.get_st_shndx();
8621 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
8624 object
->error(_("section symbol %u has bad shndx %u"),
8627 rel_dyn
->add_local_section(object
, shndx
,
8628 r_type
, output_section
,
8629 data_shndx
, reloc
.get_r_offset());
8634 case elfcpp::R_ARM_REL32
:
8635 case elfcpp::R_ARM_LDR_PC_G0
:
8636 case elfcpp::R_ARM_SBREL32
:
8637 case elfcpp::R_ARM_THM_CALL
:
8638 case elfcpp::R_ARM_THM_PC8
:
8639 case elfcpp::R_ARM_BASE_PREL
:
8640 case elfcpp::R_ARM_PLT32
:
8641 case elfcpp::R_ARM_CALL
:
8642 case elfcpp::R_ARM_JUMP24
:
8643 case elfcpp::R_ARM_THM_JUMP24
:
8644 case elfcpp::R_ARM_SBREL31
:
8645 case elfcpp::R_ARM_PREL31
:
8646 case elfcpp::R_ARM_MOVW_PREL_NC
:
8647 case elfcpp::R_ARM_MOVT_PREL
:
8648 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8649 case elfcpp::R_ARM_THM_MOVT_PREL
:
8650 case elfcpp::R_ARM_THM_JUMP19
:
8651 case elfcpp::R_ARM_THM_JUMP6
:
8652 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8653 case elfcpp::R_ARM_THM_PC12
:
8654 case elfcpp::R_ARM_REL32_NOI
:
8655 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8656 case elfcpp::R_ARM_ALU_PC_G0
:
8657 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8658 case elfcpp::R_ARM_ALU_PC_G1
:
8659 case elfcpp::R_ARM_ALU_PC_G2
:
8660 case elfcpp::R_ARM_LDR_PC_G1
:
8661 case elfcpp::R_ARM_LDR_PC_G2
:
8662 case elfcpp::R_ARM_LDRS_PC_G0
:
8663 case elfcpp::R_ARM_LDRS_PC_G1
:
8664 case elfcpp::R_ARM_LDRS_PC_G2
:
8665 case elfcpp::R_ARM_LDC_PC_G0
:
8666 case elfcpp::R_ARM_LDC_PC_G1
:
8667 case elfcpp::R_ARM_LDC_PC_G2
:
8668 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8669 case elfcpp::R_ARM_ALU_SB_G0
:
8670 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8671 case elfcpp::R_ARM_ALU_SB_G1
:
8672 case elfcpp::R_ARM_ALU_SB_G2
:
8673 case elfcpp::R_ARM_LDR_SB_G0
:
8674 case elfcpp::R_ARM_LDR_SB_G1
:
8675 case elfcpp::R_ARM_LDR_SB_G2
:
8676 case elfcpp::R_ARM_LDRS_SB_G0
:
8677 case elfcpp::R_ARM_LDRS_SB_G1
:
8678 case elfcpp::R_ARM_LDRS_SB_G2
:
8679 case elfcpp::R_ARM_LDC_SB_G0
:
8680 case elfcpp::R_ARM_LDC_SB_G1
:
8681 case elfcpp::R_ARM_LDC_SB_G2
:
8682 case elfcpp::R_ARM_MOVW_BREL_NC
:
8683 case elfcpp::R_ARM_MOVT_BREL
:
8684 case elfcpp::R_ARM_MOVW_BREL
:
8685 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8686 case elfcpp::R_ARM_THM_MOVT_BREL
:
8687 case elfcpp::R_ARM_THM_MOVW_BREL
:
8688 case elfcpp::R_ARM_THM_JUMP11
:
8689 case elfcpp::R_ARM_THM_JUMP8
:
8690 // We don't need to do anything for a relative addressing relocation
8691 // against a local symbol if it does not reference the GOT.
8694 case elfcpp::R_ARM_GOTOFF32
:
8695 case elfcpp::R_ARM_GOTOFF12
:
8696 // We need a GOT section:
8697 target
->got_section(symtab
, layout
);
8700 case elfcpp::R_ARM_GOT_BREL
:
8701 case elfcpp::R_ARM_GOT_PREL
:
8703 // The symbol requires a GOT entry.
8704 Arm_output_data_got
<big_endian
>* got
=
8705 target
->got_section(symtab
, layout
);
8706 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8707 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
8709 // If we are generating a shared object, we need to add a
8710 // dynamic RELATIVE relocation for this symbol's GOT entry.
8711 if (parameters
->options().output_is_position_independent())
8713 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8714 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8715 rel_dyn
->add_local_relative(
8716 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
8717 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
8723 case elfcpp::R_ARM_TARGET1
:
8724 case elfcpp::R_ARM_TARGET2
:
8725 // This should have been mapped to another type already.
8727 case elfcpp::R_ARM_COPY
:
8728 case elfcpp::R_ARM_GLOB_DAT
:
8729 case elfcpp::R_ARM_JUMP_SLOT
:
8730 case elfcpp::R_ARM_RELATIVE
:
8731 // These are relocations which should only be seen by the
8732 // dynamic linker, and should never be seen here.
8733 gold_error(_("%s: unexpected reloc %u in object file"),
8734 object
->name().c_str(), r_type
);
8738 // These are initial TLS relocs, which are expected when
8740 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8741 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8742 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8743 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8744 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8746 bool output_is_shared
= parameters
->options().shared();
8747 const tls::Tls_optimization optimized_type
8748 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
8752 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8753 if (optimized_type
== tls::TLSOPT_NONE
)
8755 // Create a pair of GOT entries for the module index and
8756 // dtv-relative offset.
8757 Arm_output_data_got
<big_endian
>* got
8758 = target
->got_section(symtab
, layout
);
8759 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8760 unsigned int shndx
= lsym
.get_st_shndx();
8762 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
8765 object
->error(_("local symbol %u has bad shndx %u"),
8770 if (!parameters
->doing_static_link())
8771 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
8773 target
->rel_dyn_section(layout
),
8774 elfcpp::R_ARM_TLS_DTPMOD32
);
8776 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
8780 // FIXME: TLS optimization not supported yet.
8784 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8785 if (optimized_type
== tls::TLSOPT_NONE
)
8787 // Create a GOT entry for the module index.
8788 target
->got_mod_index_entry(symtab
, layout
, object
);
8791 // FIXME: TLS optimization not supported yet.
8795 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8798 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8799 layout
->set_has_static_tls();
8800 if (optimized_type
== tls::TLSOPT_NONE
)
8802 // Create a GOT entry for the tp-relative offset.
8803 Arm_output_data_got
<big_endian
>* got
8804 = target
->got_section(symtab
, layout
);
8805 unsigned int r_sym
=
8806 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8807 if (!parameters
->doing_static_link())
8808 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8809 target
->rel_dyn_section(layout
),
8810 elfcpp::R_ARM_TLS_TPOFF32
);
8811 else if (!object
->local_has_got_offset(r_sym
,
8812 GOT_TYPE_TLS_OFFSET
))
8814 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8815 unsigned int got_offset
=
8816 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8817 got
->add_static_reloc(got_offset
,
8818 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8823 // FIXME: TLS optimization not supported yet.
8827 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8828 layout
->set_has_static_tls();
8829 if (output_is_shared
)
8831 // We need to create a dynamic relocation.
8832 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8833 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8834 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8835 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8836 output_section
, data_shndx
,
8837 reloc
.get_r_offset());
8847 case elfcpp::R_ARM_PC24
:
8848 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8849 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8850 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8852 unsupported_reloc_local(object
, r_type
);
8857 // Report an unsupported relocation against a global symbol.
8859 template<bool big_endian
>
8861 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8862 Sized_relobj_file
<32, big_endian
>* object
,
8863 unsigned int r_type
,
8866 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8867 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8870 template<bool big_endian
>
8872 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8873 unsigned int r_type
)
8877 case elfcpp::R_ARM_PC24
:
8878 case elfcpp::R_ARM_THM_CALL
:
8879 case elfcpp::R_ARM_PLT32
:
8880 case elfcpp::R_ARM_CALL
:
8881 case elfcpp::R_ARM_JUMP24
:
8882 case elfcpp::R_ARM_THM_JUMP24
:
8883 case elfcpp::R_ARM_SBREL31
:
8884 case elfcpp::R_ARM_PREL31
:
8885 case elfcpp::R_ARM_THM_JUMP19
:
8886 case elfcpp::R_ARM_THM_JUMP6
:
8887 case elfcpp::R_ARM_THM_JUMP11
:
8888 case elfcpp::R_ARM_THM_JUMP8
:
8889 // All the relocations above are branches except SBREL31 and PREL31.
8893 // Be conservative and assume this is a function pointer.
8898 template<bool big_endian
>
8900 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8903 Target_arm
<big_endian
>* target
,
8904 Sized_relobj_file
<32, big_endian
>*,
8907 const elfcpp::Rel
<32, big_endian
>&,
8908 unsigned int r_type
,
8909 const elfcpp::Sym
<32, big_endian
>&)
8911 r_type
= target
->get_real_reloc_type(r_type
);
8912 return possible_function_pointer_reloc(r_type
);
8915 template<bool big_endian
>
8917 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8920 Target_arm
<big_endian
>* target
,
8921 Sized_relobj_file
<32, big_endian
>*,
8924 const elfcpp::Rel
<32, big_endian
>&,
8925 unsigned int r_type
,
8928 // GOT is not a function.
8929 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8932 r_type
= target
->get_real_reloc_type(r_type
);
8933 return possible_function_pointer_reloc(r_type
);
8936 // Scan a relocation for a global symbol.
8938 template<bool big_endian
>
8940 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8943 Sized_relobj_file
<32, big_endian
>* object
,
8944 unsigned int data_shndx
,
8945 Output_section
* output_section
,
8946 const elfcpp::Rel
<32, big_endian
>& reloc
,
8947 unsigned int r_type
,
8950 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8951 // section. We check here to avoid creating a dynamic reloc against
8952 // _GLOBAL_OFFSET_TABLE_.
8953 if (!target
->has_got_section()
8954 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8955 target
->got_section(symtab
, layout
);
8957 // A STT_GNU_IFUNC symbol may require a PLT entry.
8958 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
8959 && this->reloc_needs_plt_for_ifunc(object
, r_type
))
8960 target
->make_plt_entry(symtab
, layout
, gsym
);
8962 r_type
= target
->get_real_reloc_type(r_type
);
8965 case elfcpp::R_ARM_NONE
:
8966 case elfcpp::R_ARM_V4BX
:
8967 case elfcpp::R_ARM_GNU_VTENTRY
:
8968 case elfcpp::R_ARM_GNU_VTINHERIT
:
8971 case elfcpp::R_ARM_ABS32
:
8972 case elfcpp::R_ARM_ABS16
:
8973 case elfcpp::R_ARM_ABS12
:
8974 case elfcpp::R_ARM_THM_ABS5
:
8975 case elfcpp::R_ARM_ABS8
:
8976 case elfcpp::R_ARM_BASE_ABS
:
8977 case elfcpp::R_ARM_MOVW_ABS_NC
:
8978 case elfcpp::R_ARM_MOVT_ABS
:
8979 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8980 case elfcpp::R_ARM_THM_MOVT_ABS
:
8981 case elfcpp::R_ARM_ABS32_NOI
:
8982 // Absolute addressing relocations.
8984 // Make a PLT entry if necessary.
8985 if (this->symbol_needs_plt_entry(gsym
))
8987 target
->make_plt_entry(symtab
, layout
, gsym
);
8988 // Since this is not a PC-relative relocation, we may be
8989 // taking the address of a function. In that case we need to
8990 // set the entry in the dynamic symbol table to the address of
8992 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8993 gsym
->set_needs_dynsym_value();
8995 // Make a dynamic relocation if necessary.
8996 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8998 if (!parameters
->options().output_is_position_independent()
8999 && gsym
->may_need_copy_reloc())
9001 target
->copy_reloc(symtab
, layout
, object
,
9002 data_shndx
, output_section
, gsym
, reloc
);
9004 else if ((r_type
== elfcpp::R_ARM_ABS32
9005 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
9006 && gsym
->type() == elfcpp::STT_GNU_IFUNC
9007 && gsym
->can_use_relative_reloc(false)
9008 && !gsym
->is_from_dynobj()
9009 && !gsym
->is_undefined()
9010 && !gsym
->is_preemptible())
9012 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
9013 // symbol. This makes a function address in a PIE executable
9014 // match the address in a shared library that it links against.
9015 Reloc_section
* rel_irelative
=
9016 target
->rel_irelative_section(layout
);
9017 unsigned int r_type
= elfcpp::R_ARM_IRELATIVE
;
9018 rel_irelative
->add_symbolless_global_addend(
9019 gsym
, r_type
, output_section
, object
,
9020 data_shndx
, reloc
.get_r_offset());
9022 else if ((r_type
== elfcpp::R_ARM_ABS32
9023 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
9024 && gsym
->can_use_relative_reloc(false))
9026 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9027 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
9028 output_section
, object
,
9029 data_shndx
, reloc
.get_r_offset());
9033 check_non_pic(object
, r_type
);
9034 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9035 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
9036 data_shndx
, reloc
.get_r_offset());
9042 case elfcpp::R_ARM_GOTOFF32
:
9043 case elfcpp::R_ARM_GOTOFF12
:
9044 // We need a GOT section.
9045 target
->got_section(symtab
, layout
);
9048 case elfcpp::R_ARM_REL32
:
9049 case elfcpp::R_ARM_LDR_PC_G0
:
9050 case elfcpp::R_ARM_SBREL32
:
9051 case elfcpp::R_ARM_THM_PC8
:
9052 case elfcpp::R_ARM_BASE_PREL
:
9053 case elfcpp::R_ARM_MOVW_PREL_NC
:
9054 case elfcpp::R_ARM_MOVT_PREL
:
9055 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9056 case elfcpp::R_ARM_THM_MOVT_PREL
:
9057 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9058 case elfcpp::R_ARM_THM_PC12
:
9059 case elfcpp::R_ARM_REL32_NOI
:
9060 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9061 case elfcpp::R_ARM_ALU_PC_G0
:
9062 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9063 case elfcpp::R_ARM_ALU_PC_G1
:
9064 case elfcpp::R_ARM_ALU_PC_G2
:
9065 case elfcpp::R_ARM_LDR_PC_G1
:
9066 case elfcpp::R_ARM_LDR_PC_G2
:
9067 case elfcpp::R_ARM_LDRS_PC_G0
:
9068 case elfcpp::R_ARM_LDRS_PC_G1
:
9069 case elfcpp::R_ARM_LDRS_PC_G2
:
9070 case elfcpp::R_ARM_LDC_PC_G0
:
9071 case elfcpp::R_ARM_LDC_PC_G1
:
9072 case elfcpp::R_ARM_LDC_PC_G2
:
9073 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9074 case elfcpp::R_ARM_ALU_SB_G0
:
9075 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9076 case elfcpp::R_ARM_ALU_SB_G1
:
9077 case elfcpp::R_ARM_ALU_SB_G2
:
9078 case elfcpp::R_ARM_LDR_SB_G0
:
9079 case elfcpp::R_ARM_LDR_SB_G1
:
9080 case elfcpp::R_ARM_LDR_SB_G2
:
9081 case elfcpp::R_ARM_LDRS_SB_G0
:
9082 case elfcpp::R_ARM_LDRS_SB_G1
:
9083 case elfcpp::R_ARM_LDRS_SB_G2
:
9084 case elfcpp::R_ARM_LDC_SB_G0
:
9085 case elfcpp::R_ARM_LDC_SB_G1
:
9086 case elfcpp::R_ARM_LDC_SB_G2
:
9087 case elfcpp::R_ARM_MOVW_BREL_NC
:
9088 case elfcpp::R_ARM_MOVT_BREL
:
9089 case elfcpp::R_ARM_MOVW_BREL
:
9090 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9091 case elfcpp::R_ARM_THM_MOVT_BREL
:
9092 case elfcpp::R_ARM_THM_MOVW_BREL
:
9093 // Relative addressing relocations.
9095 // Make a dynamic relocation if necessary.
9096 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
9098 if (parameters
->options().output_is_executable()
9099 && target
->may_need_copy_reloc(gsym
))
9101 target
->copy_reloc(symtab
, layout
, object
,
9102 data_shndx
, output_section
, gsym
, reloc
);
9106 check_non_pic(object
, r_type
);
9107 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9108 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
9109 data_shndx
, reloc
.get_r_offset());
9115 case elfcpp::R_ARM_THM_CALL
:
9116 case elfcpp::R_ARM_PLT32
:
9117 case elfcpp::R_ARM_CALL
:
9118 case elfcpp::R_ARM_JUMP24
:
9119 case elfcpp::R_ARM_THM_JUMP24
:
9120 case elfcpp::R_ARM_SBREL31
:
9121 case elfcpp::R_ARM_PREL31
:
9122 case elfcpp::R_ARM_THM_JUMP19
:
9123 case elfcpp::R_ARM_THM_JUMP6
:
9124 case elfcpp::R_ARM_THM_JUMP11
:
9125 case elfcpp::R_ARM_THM_JUMP8
:
9126 // All the relocation above are branches except for the PREL31 ones.
9127 // A PREL31 relocation can point to a personality function in a shared
9128 // library. In that case we want to use a PLT because we want to
9129 // call the personality routine and the dynamic linkers we care about
9130 // do not support dynamic PREL31 relocations. An REL31 relocation may
9131 // point to a function whose unwinding behaviour is being described but
9132 // we will not mistakenly generate a PLT for that because we should use
9133 // a local section symbol.
9135 // If the symbol is fully resolved, this is just a relative
9136 // local reloc. Otherwise we need a PLT entry.
9137 if (gsym
->final_value_is_known())
9139 // If building a shared library, we can also skip the PLT entry
9140 // if the symbol is defined in the output file and is protected
9142 if (gsym
->is_defined()
9143 && !gsym
->is_from_dynobj()
9144 && !gsym
->is_preemptible())
9146 target
->make_plt_entry(symtab
, layout
, gsym
);
9149 case elfcpp::R_ARM_GOT_BREL
:
9150 case elfcpp::R_ARM_GOT_ABS
:
9151 case elfcpp::R_ARM_GOT_PREL
:
9153 // The symbol requires a GOT entry.
9154 Arm_output_data_got
<big_endian
>* got
=
9155 target
->got_section(symtab
, layout
);
9156 if (gsym
->final_value_is_known())
9158 // For a STT_GNU_IFUNC symbol we want the PLT address.
9159 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
9160 got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9162 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9166 // If this symbol is not fully resolved, we need to add a
9167 // GOT entry with a dynamic relocation.
9168 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9169 if (gsym
->is_from_dynobj()
9170 || gsym
->is_undefined()
9171 || gsym
->is_preemptible()
9172 || (gsym
->visibility() == elfcpp::STV_PROTECTED
9173 && parameters
->options().shared())
9174 || (gsym
->type() == elfcpp::STT_GNU_IFUNC
9175 && parameters
->options().output_is_position_independent()))
9176 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
9177 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
9180 // For a STT_GNU_IFUNC symbol we want to write the PLT
9181 // offset into the GOT, so that function pointer
9182 // comparisons work correctly.
9184 if (gsym
->type() != elfcpp::STT_GNU_IFUNC
)
9185 is_new
= got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9188 is_new
= got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9189 // Tell the dynamic linker to use the PLT address
9190 // when resolving relocations.
9191 if (gsym
->is_from_dynobj()
9192 && !parameters
->options().shared())
9193 gsym
->set_needs_dynsym_value();
9196 rel_dyn
->add_global_relative(
9197 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
9198 gsym
->got_offset(GOT_TYPE_STANDARD
));
9204 case elfcpp::R_ARM_TARGET1
:
9205 case elfcpp::R_ARM_TARGET2
:
9206 // These should have been mapped to other types already.
9208 case elfcpp::R_ARM_COPY
:
9209 case elfcpp::R_ARM_GLOB_DAT
:
9210 case elfcpp::R_ARM_JUMP_SLOT
:
9211 case elfcpp::R_ARM_RELATIVE
:
9212 // These are relocations which should only be seen by the
9213 // dynamic linker, and should never be seen here.
9214 gold_error(_("%s: unexpected reloc %u in object file"),
9215 object
->name().c_str(), r_type
);
9218 // These are initial tls relocs, which are expected when
9220 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9221 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9222 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9223 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9224 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9226 const bool is_final
= gsym
->final_value_is_known();
9227 const tls::Tls_optimization optimized_type
9228 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9231 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9232 if (optimized_type
== tls::TLSOPT_NONE
)
9234 // Create a pair of GOT entries for the module index and
9235 // dtv-relative offset.
9236 Arm_output_data_got
<big_endian
>* got
9237 = target
->got_section(symtab
, layout
);
9238 if (!parameters
->doing_static_link())
9239 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
9240 target
->rel_dyn_section(layout
),
9241 elfcpp::R_ARM_TLS_DTPMOD32
,
9242 elfcpp::R_ARM_TLS_DTPOFF32
);
9244 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
9247 // FIXME: TLS optimization not supported yet.
9251 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9252 if (optimized_type
== tls::TLSOPT_NONE
)
9254 // Create a GOT entry for the module index.
9255 target
->got_mod_index_entry(symtab
, layout
, object
);
9258 // FIXME: TLS optimization not supported yet.
9262 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9265 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9266 layout
->set_has_static_tls();
9267 if (optimized_type
== tls::TLSOPT_NONE
)
9269 // Create a GOT entry for the tp-relative offset.
9270 Arm_output_data_got
<big_endian
>* got
9271 = target
->got_section(symtab
, layout
);
9272 if (!parameters
->doing_static_link())
9273 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
9274 target
->rel_dyn_section(layout
),
9275 elfcpp::R_ARM_TLS_TPOFF32
);
9276 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
9278 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
9279 unsigned int got_offset
=
9280 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
9281 got
->add_static_reloc(got_offset
,
9282 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
9286 // FIXME: TLS optimization not supported yet.
9290 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9291 layout
->set_has_static_tls();
9292 if (parameters
->options().shared())
9294 // We need to create a dynamic relocation.
9295 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9296 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
9297 output_section
, object
,
9298 data_shndx
, reloc
.get_r_offset());
9308 case elfcpp::R_ARM_PC24
:
9309 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9310 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9311 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9313 unsupported_reloc_global(object
, r_type
, gsym
);
9318 // Process relocations for gc.
9320 template<bool big_endian
>
9322 Target_arm
<big_endian
>::gc_process_relocs(
9323 Symbol_table
* symtab
,
9325 Sized_relobj_file
<32, big_endian
>* object
,
9326 unsigned int data_shndx
,
9328 const unsigned char* prelocs
,
9330 Output_section
* output_section
,
9331 bool needs_special_offset_handling
,
9332 size_t local_symbol_count
,
9333 const unsigned char* plocal_symbols
)
9335 typedef Target_arm
<big_endian
> Arm
;
9336 typedef typename Target_arm
<big_endian
>::Scan Scan
;
9338 gold::gc_process_relocs
<32, big_endian
, Arm
, Scan
, Classify_reloc
>(
9347 needs_special_offset_handling
,
9352 // Scan relocations for a section.
9354 template<bool big_endian
>
9356 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
9358 Sized_relobj_file
<32, big_endian
>* object
,
9359 unsigned int data_shndx
,
9360 unsigned int sh_type
,
9361 const unsigned char* prelocs
,
9363 Output_section
* output_section
,
9364 bool needs_special_offset_handling
,
9365 size_t local_symbol_count
,
9366 const unsigned char* plocal_symbols
)
9368 if (sh_type
== elfcpp::SHT_RELA
)
9370 gold_error(_("%s: unsupported RELA reloc section"),
9371 object
->name().c_str());
9375 gold::scan_relocs
<32, big_endian
, Target_arm
, Scan
, Classify_reloc
>(
9384 needs_special_offset_handling
,
9389 // Finalize the sections.
9391 template<bool big_endian
>
9393 Target_arm
<big_endian
>::do_finalize_sections(
9395 const Input_objects
* input_objects
,
9398 bool merged_any_attributes
= false;
9399 // Merge processor-specific flags.
9400 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
9401 p
!= input_objects
->relobj_end();
9404 Arm_relobj
<big_endian
>* arm_relobj
=
9405 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
9406 if (arm_relobj
->merge_flags_and_attributes())
9408 this->merge_processor_specific_flags(
9410 arm_relobj
->processor_specific_flags());
9411 this->merge_object_attributes(arm_relobj
->name().c_str(),
9412 arm_relobj
->attributes_section_data());
9413 merged_any_attributes
= true;
9417 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
9418 p
!= input_objects
->dynobj_end();
9421 Arm_dynobj
<big_endian
>* arm_dynobj
=
9422 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
9423 this->merge_processor_specific_flags(
9425 arm_dynobj
->processor_specific_flags());
9426 this->merge_object_attributes(arm_dynobj
->name().c_str(),
9427 arm_dynobj
->attributes_section_data());
9428 merged_any_attributes
= true;
9431 // Create an empty uninitialized attribute section if we still don't have it
9432 // at this moment. This happens if there is no attributes sections in all
9434 if (this->attributes_section_data_
== NULL
)
9435 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
9437 const Object_attribute
* cpu_arch_attr
=
9438 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
9439 // Check if we need to use Cortex-A8 workaround.
9440 if (parameters
->options().user_set_fix_cortex_a8())
9441 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
9444 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9445 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9447 const Object_attribute
* cpu_arch_profile_attr
=
9448 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
9449 this->fix_cortex_a8_
=
9450 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
9451 && (cpu_arch_profile_attr
->int_value() == 'A'
9452 || cpu_arch_profile_attr
->int_value() == 0));
9455 // Check if we can use V4BX interworking.
9456 // The V4BX interworking stub contains BX instruction,
9457 // which is not specified for some profiles.
9458 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9459 && !this->may_use_v4t_interworking())
9460 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9461 "the target profile does not support BX instruction"));
9463 // Fill in some more dynamic tags.
9464 const Reloc_section
* rel_plt
= (this->plt_
== NULL
9466 : this->plt_
->rel_plt());
9467 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
9468 this->rel_dyn_
, true, false);
9470 // Emit any relocs we saved in an attempt to avoid generating COPY
9472 if (this->copy_relocs_
.any_saved_relocs())
9473 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
9475 // Handle the .ARM.exidx section.
9476 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
9478 if (!parameters
->options().relocatable())
9480 if (exidx_section
!= NULL
9481 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
9483 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9484 // the .ARM.exidx section.
9485 if (!layout
->script_options()->saw_phdrs_clause())
9487 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
9490 Output_segment
* exidx_segment
=
9491 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
9492 exidx_segment
->add_output_section_to_nonload(exidx_section
,
9498 // Create an .ARM.attributes section if we have merged any attributes
9500 if (merged_any_attributes
)
9502 Output_attributes_section_data
* attributes_section
=
9503 new Output_attributes_section_data(*this->attributes_section_data_
);
9504 layout
->add_output_section_data(".ARM.attributes",
9505 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
9506 attributes_section
, ORDER_INVALID
,
9510 // Fix up links in section EXIDX headers.
9511 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
9512 p
!= layout
->section_list().end();
9514 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
9516 Arm_output_section
<big_endian
>* os
=
9517 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9518 os
->set_exidx_section_link();
9522 // Return whether a direct absolute static relocation needs to be applied.
9523 // In cases where Scan::local() or Scan::global() has created
9524 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9525 // of the relocation is carried in the data, and we must not
9526 // apply the static relocation.
9528 template<bool big_endian
>
9530 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
9531 const Sized_symbol
<32>* gsym
,
9532 unsigned int r_type
,
9534 Output_section
* output_section
)
9536 // If the output section is not allocated, then we didn't call
9537 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9539 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
9542 int ref_flags
= Scan::get_reference_flags(r_type
);
9544 // For local symbols, we will have created a non-RELATIVE dynamic
9545 // relocation only if (a) the output is position independent,
9546 // (b) the relocation is absolute (not pc- or segment-relative), and
9547 // (c) the relocation is not 32 bits wide.
9549 return !(parameters
->options().output_is_position_independent()
9550 && (ref_flags
& Symbol::ABSOLUTE_REF
)
9553 // For global symbols, we use the same helper routines used in the
9554 // scan pass. If we did not create a dynamic relocation, or if we
9555 // created a RELATIVE dynamic relocation, we should apply the static
9557 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
9558 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
9559 && gsym
->can_use_relative_reloc(ref_flags
9560 & Symbol::FUNCTION_CALL
);
9561 return !has_dyn
|| is_rel
;
9564 // Perform a relocation.
9566 template<bool big_endian
>
9568 Target_arm
<big_endian
>::Relocate::relocate(
9569 const Relocate_info
<32, big_endian
>* relinfo
,
9572 Output_section
* output_section
,
9574 const unsigned char* preloc
,
9575 const Sized_symbol
<32>* gsym
,
9576 const Symbol_value
<32>* psymval
,
9577 unsigned char* view
,
9578 Arm_address address
,
9579 section_size_type view_size
)
9584 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
9586 const elfcpp::Rel
<32, big_endian
> rel(preloc
);
9587 unsigned int r_type
= elfcpp::elf_r_type
<32>(rel
.get_r_info());
9588 r_type
= target
->get_real_reloc_type(r_type
);
9589 const Arm_reloc_property
* reloc_property
=
9590 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9591 if (reloc_property
== NULL
)
9593 std::string reloc_name
=
9594 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9595 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9596 _("cannot relocate %s in object file"),
9597 reloc_name
.c_str());
9601 const Arm_relobj
<big_endian
>* object
=
9602 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9604 // If the final branch target of a relocation is THUMB instruction, this
9605 // is 1. Otherwise it is 0.
9606 Arm_address thumb_bit
= 0;
9607 Symbol_value
<32> symval
;
9608 bool is_weakly_undefined_without_plt
= false;
9609 bool have_got_offset
= false;
9610 unsigned int got_offset
= 0;
9612 // If the relocation uses the GOT entry of a symbol instead of the symbol
9613 // itself, we don't care about whether the symbol is defined or what kind
9615 if (reloc_property
->uses_got_entry())
9617 // Get the GOT offset.
9618 // The GOT pointer points to the end of the GOT section.
9619 // We need to subtract the size of the GOT section to get
9620 // the actual offset to use in the relocation.
9621 // TODO: We should move GOT offset computing code in TLS relocations
9625 case elfcpp::R_ARM_GOT_BREL
:
9626 case elfcpp::R_ARM_GOT_PREL
:
9629 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
9630 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
9631 - target
->got_size());
9635 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9636 gold_assert(object
->local_has_got_offset(r_sym
,
9637 GOT_TYPE_STANDARD
));
9638 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
9639 - target
->got_size());
9641 have_got_offset
= true;
9648 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
9652 // This is a global symbol. Determine if we use PLT and if the
9653 // final target is THUMB.
9654 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
9656 // This uses a PLT, change the symbol value.
9657 symval
.set_output_value(target
->plt_address_for_global(gsym
));
9660 else if (gsym
->is_weak_undefined())
9662 // This is a weakly undefined symbol and we do not use PLT
9663 // for this relocation. A branch targeting this symbol will
9664 // be converted into an NOP.
9665 is_weakly_undefined_without_plt
= true;
9667 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
9669 // This relocation uses the symbol value but the symbol is
9670 // undefined. Exit early and have the caller reporting an
9676 // Set thumb bit if symbol:
9677 // -Has type STT_ARM_TFUNC or
9678 // -Has type STT_FUNC, is defined and with LSB in value set.
9680 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
9681 || (gsym
->type() == elfcpp::STT_FUNC
9682 && !gsym
->is_undefined()
9683 && ((psymval
->value(object
, 0) & 1) != 0)))
9690 // This is a local symbol. Determine if the final target is THUMB.
9691 // We saved this information when all the local symbols were read.
9692 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
9693 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9694 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9696 if (psymval
->is_ifunc_symbol() && object
->local_has_plt_offset(r_sym
))
9698 symval
.set_output_value(
9699 target
->plt_address_for_local(object
, r_sym
));
9706 // This is a fake relocation synthesized for a stub. It does not have
9707 // a real symbol. We just look at the LSB of the symbol value to
9708 // determine if the target is THUMB or not.
9709 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
9712 // Strip LSB if this points to a THUMB target.
9714 && reloc_property
->uses_thumb_bit()
9715 && ((psymval
->value(object
, 0) & 1) != 0))
9717 Arm_address stripped_value
=
9718 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9719 symval
.set_output_value(stripped_value
);
9723 // To look up relocation stubs, we need to pass the symbol table index of
9725 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9727 // Get the addressing origin of the output segment defining the
9728 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9729 Arm_address sym_origin
= 0;
9730 if (reloc_property
->uses_symbol_base())
9732 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
9733 // R_ARM_BASE_ABS with the NULL symbol will give the
9734 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9735 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9736 sym_origin
= target
->got_plt_section()->address();
9737 else if (gsym
== NULL
)
9739 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
9740 sym_origin
= gsym
->output_segment()->vaddr();
9741 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
9742 sym_origin
= gsym
->output_data()->address();
9744 // TODO: Assumes the segment base to be zero for the global symbols
9745 // till the proper support for the segment-base-relative addressing
9746 // will be implemented. This is consistent with GNU ld.
9749 // For relative addressing relocation, find out the relative address base.
9750 Arm_address relative_address_base
= 0;
9751 switch(reloc_property
->relative_address_base())
9753 case Arm_reloc_property::RAB_NONE
:
9754 // Relocations with relative address bases RAB_TLS and RAB_tp are
9755 // handled by relocate_tls. So we do not need to do anything here.
9756 case Arm_reloc_property::RAB_TLS
:
9757 case Arm_reloc_property::RAB_tp
:
9759 case Arm_reloc_property::RAB_B_S
:
9760 relative_address_base
= sym_origin
;
9762 case Arm_reloc_property::RAB_GOT_ORG
:
9763 relative_address_base
= target
->got_plt_section()->address();
9765 case Arm_reloc_property::RAB_P
:
9766 relative_address_base
= address
;
9768 case Arm_reloc_property::RAB_Pa
:
9769 relative_address_base
= address
& 0xfffffffcU
;
9775 typename
Arm_relocate_functions::Status reloc_status
=
9776 Arm_relocate_functions::STATUS_OKAY
;
9777 bool check_overflow
= reloc_property
->checks_overflow();
9780 case elfcpp::R_ARM_NONE
:
9783 case elfcpp::R_ARM_ABS8
:
9784 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9785 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
9788 case elfcpp::R_ARM_ABS12
:
9789 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9790 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
9793 case elfcpp::R_ARM_ABS16
:
9794 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9795 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
9798 case elfcpp::R_ARM_ABS32
:
9799 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9800 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9804 case elfcpp::R_ARM_ABS32_NOI
:
9805 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9806 // No thumb bit for this relocation: (S + A)
9807 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9811 case elfcpp::R_ARM_MOVW_ABS_NC
:
9812 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9813 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
9818 case elfcpp::R_ARM_MOVT_ABS
:
9819 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9820 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
9823 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9824 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9825 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9826 0, thumb_bit
, false);
9829 case elfcpp::R_ARM_THM_MOVT_ABS
:
9830 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9831 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
9835 case elfcpp::R_ARM_MOVW_PREL_NC
:
9836 case elfcpp::R_ARM_MOVW_BREL_NC
:
9837 case elfcpp::R_ARM_MOVW_BREL
:
9839 Arm_relocate_functions::movw(view
, object
, psymval
,
9840 relative_address_base
, thumb_bit
,
9844 case elfcpp::R_ARM_MOVT_PREL
:
9845 case elfcpp::R_ARM_MOVT_BREL
:
9847 Arm_relocate_functions::movt(view
, object
, psymval
,
9848 relative_address_base
);
9851 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9852 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9853 case elfcpp::R_ARM_THM_MOVW_BREL
:
9855 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9856 relative_address_base
,
9857 thumb_bit
, check_overflow
);
9860 case elfcpp::R_ARM_THM_MOVT_PREL
:
9861 case elfcpp::R_ARM_THM_MOVT_BREL
:
9863 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9864 relative_address_base
);
9867 case elfcpp::R_ARM_REL32
:
9868 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9869 address
, thumb_bit
);
9872 case elfcpp::R_ARM_THM_ABS5
:
9873 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9874 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9877 // Thumb long branches.
9878 case elfcpp::R_ARM_THM_CALL
:
9879 case elfcpp::R_ARM_THM_XPC22
:
9880 case elfcpp::R_ARM_THM_JUMP24
:
9882 Arm_relocate_functions::thumb_branch_common(
9883 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9884 thumb_bit
, is_weakly_undefined_without_plt
);
9887 case elfcpp::R_ARM_GOTOFF32
:
9889 Arm_address got_origin
;
9890 got_origin
= target
->got_plt_section()->address();
9891 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9892 got_origin
, thumb_bit
);
9896 case elfcpp::R_ARM_BASE_PREL
:
9897 gold_assert(gsym
!= NULL
);
9899 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9902 case elfcpp::R_ARM_BASE_ABS
:
9903 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9904 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9907 case elfcpp::R_ARM_GOT_BREL
:
9908 gold_assert(have_got_offset
);
9909 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9912 case elfcpp::R_ARM_GOT_PREL
:
9913 gold_assert(have_got_offset
);
9914 // Get the address origin for GOT PLT, which is allocated right
9915 // after the GOT section, to calculate an absolute address of
9916 // the symbol GOT entry (got_origin + got_offset).
9917 Arm_address got_origin
;
9918 got_origin
= target
->got_plt_section()->address();
9919 reloc_status
= Arm_relocate_functions::got_prel(view
,
9920 got_origin
+ got_offset
,
9924 case elfcpp::R_ARM_PLT32
:
9925 case elfcpp::R_ARM_CALL
:
9926 case elfcpp::R_ARM_JUMP24
:
9927 case elfcpp::R_ARM_XPC25
:
9928 gold_assert(gsym
== NULL
9929 || gsym
->has_plt_offset()
9930 || gsym
->final_value_is_known()
9931 || (gsym
->is_defined()
9932 && !gsym
->is_from_dynobj()
9933 && !gsym
->is_preemptible()));
9935 Arm_relocate_functions::arm_branch_common(
9936 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9937 thumb_bit
, is_weakly_undefined_without_plt
);
9940 case elfcpp::R_ARM_THM_JUMP19
:
9942 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9946 case elfcpp::R_ARM_THM_JUMP6
:
9948 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9951 case elfcpp::R_ARM_THM_JUMP8
:
9953 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9956 case elfcpp::R_ARM_THM_JUMP11
:
9958 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9961 case elfcpp::R_ARM_PREL31
:
9962 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9963 address
, thumb_bit
);
9966 case elfcpp::R_ARM_V4BX
:
9967 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9969 const bool is_v4bx_interworking
=
9970 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9972 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9973 is_v4bx_interworking
);
9977 case elfcpp::R_ARM_THM_PC8
:
9979 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9982 case elfcpp::R_ARM_THM_PC12
:
9984 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9987 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9989 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9993 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9994 case elfcpp::R_ARM_ALU_PC_G0
:
9995 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9996 case elfcpp::R_ARM_ALU_PC_G1
:
9997 case elfcpp::R_ARM_ALU_PC_G2
:
9998 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9999 case elfcpp::R_ARM_ALU_SB_G0
:
10000 case elfcpp::R_ARM_ALU_SB_G1_NC
:
10001 case elfcpp::R_ARM_ALU_SB_G1
:
10002 case elfcpp::R_ARM_ALU_SB_G2
:
10004 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
10005 reloc_property
->group_index(),
10006 relative_address_base
,
10007 thumb_bit
, check_overflow
);
10010 case elfcpp::R_ARM_LDR_PC_G0
:
10011 case elfcpp::R_ARM_LDR_PC_G1
:
10012 case elfcpp::R_ARM_LDR_PC_G2
:
10013 case elfcpp::R_ARM_LDR_SB_G0
:
10014 case elfcpp::R_ARM_LDR_SB_G1
:
10015 case elfcpp::R_ARM_LDR_SB_G2
:
10017 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
10018 reloc_property
->group_index(),
10019 relative_address_base
);
10022 case elfcpp::R_ARM_LDRS_PC_G0
:
10023 case elfcpp::R_ARM_LDRS_PC_G1
:
10024 case elfcpp::R_ARM_LDRS_PC_G2
:
10025 case elfcpp::R_ARM_LDRS_SB_G0
:
10026 case elfcpp::R_ARM_LDRS_SB_G1
:
10027 case elfcpp::R_ARM_LDRS_SB_G2
:
10029 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
10030 reloc_property
->group_index(),
10031 relative_address_base
);
10034 case elfcpp::R_ARM_LDC_PC_G0
:
10035 case elfcpp::R_ARM_LDC_PC_G1
:
10036 case elfcpp::R_ARM_LDC_PC_G2
:
10037 case elfcpp::R_ARM_LDC_SB_G0
:
10038 case elfcpp::R_ARM_LDC_SB_G1
:
10039 case elfcpp::R_ARM_LDC_SB_G2
:
10041 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
10042 reloc_property
->group_index(),
10043 relative_address_base
);
10046 // These are initial tls relocs, which are expected when
10048 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
10049 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
10050 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
10051 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
10052 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
10054 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
10055 view
, address
, view_size
);
10058 // The known and unknown unsupported and/or deprecated relocations.
10059 case elfcpp::R_ARM_PC24
:
10060 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
10061 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
10062 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
10064 // Just silently leave the method. We should get an appropriate error
10065 // message in the scan methods.
10069 // Report any errors.
10070 switch (reloc_status
)
10072 case Arm_relocate_functions::STATUS_OKAY
:
10074 case Arm_relocate_functions::STATUS_OVERFLOW
:
10075 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
10076 _("relocation overflow in %s"),
10077 reloc_property
->name().c_str());
10079 case Arm_relocate_functions::STATUS_BAD_RELOC
:
10080 gold_error_at_location(
10083 rel
.get_r_offset(),
10084 _("unexpected opcode while processing relocation %s"),
10085 reloc_property
->name().c_str());
10088 gold_unreachable();
10094 // Perform a TLS relocation.
10096 template<bool big_endian
>
10097 inline typename Arm_relocate_functions
<big_endian
>::Status
10098 Target_arm
<big_endian
>::Relocate::relocate_tls(
10099 const Relocate_info
<32, big_endian
>* relinfo
,
10100 Target_arm
<big_endian
>* target
,
10102 const elfcpp::Rel
<32, big_endian
>& rel
,
10103 unsigned int r_type
,
10104 const Sized_symbol
<32>* gsym
,
10105 const Symbol_value
<32>* psymval
,
10106 unsigned char* view
,
10107 elfcpp::Elf_types
<32>::Elf_Addr address
,
10108 section_size_type
/*view_size*/ )
10110 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
10111 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
10112 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
10114 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
10116 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
10118 const bool is_final
= (gsym
== NULL
10119 ? !parameters
->options().shared()
10120 : gsym
->final_value_is_known());
10121 const tls::Tls_optimization optimized_type
10122 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
10125 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
10127 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
10128 unsigned int got_offset
;
10131 gold_assert(gsym
->has_got_offset(got_type
));
10132 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
10136 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
10137 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
10138 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
10139 - target
->got_size());
10141 if (optimized_type
== tls::TLSOPT_NONE
)
10143 Arm_address got_entry
=
10144 target
->got_plt_section()->address() + got_offset
;
10146 // Relocate the field with the PC relative offset of the pair of
10148 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10149 return ArmRelocFuncs::STATUS_OKAY
;
10154 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
10155 if (optimized_type
== tls::TLSOPT_NONE
)
10157 // Relocate the field with the offset of the GOT entry for
10158 // the module index.
10159 unsigned int got_offset
;
10160 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
10161 - target
->got_size());
10162 Arm_address got_entry
=
10163 target
->got_plt_section()->address() + got_offset
;
10165 // Relocate the field with the PC relative offset of the pair of
10167 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10168 return ArmRelocFuncs::STATUS_OKAY
;
10172 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
10173 RelocFuncs::rel32_unaligned(view
, value
);
10174 return ArmRelocFuncs::STATUS_OKAY
;
10176 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
10177 if (optimized_type
== tls::TLSOPT_NONE
)
10179 // Relocate the field with the offset of the GOT entry for
10180 // the tp-relative offset of the symbol.
10181 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
10182 unsigned int got_offset
;
10185 gold_assert(gsym
->has_got_offset(got_type
));
10186 got_offset
= gsym
->got_offset(got_type
);
10190 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
10191 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
10192 got_offset
= object
->local_got_offset(r_sym
, got_type
);
10195 // All GOT offsets are relative to the end of the GOT.
10196 got_offset
-= target
->got_size();
10198 Arm_address got_entry
=
10199 target
->got_plt_section()->address() + got_offset
;
10201 // Relocate the field with the PC relative offset of the GOT entry.
10202 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10203 return ArmRelocFuncs::STATUS_OKAY
;
10207 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
10208 // If we're creating a shared library, a dynamic relocation will
10209 // have been created for this location, so do not apply it now.
10210 if (!parameters
->options().shared())
10212 gold_assert(tls_segment
!= NULL
);
10214 // $tp points to the TCB, which is followed by the TLS, so we
10215 // need to add TCB size to the offset.
10216 Arm_address aligned_tcb_size
=
10217 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
10218 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
10221 return ArmRelocFuncs::STATUS_OKAY
;
10224 gold_unreachable();
10227 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
10228 _("unsupported reloc %u"),
10230 return ArmRelocFuncs::STATUS_BAD_RELOC
;
10233 // Relocate section data.
10235 template<bool big_endian
>
10237 Target_arm
<big_endian
>::relocate_section(
10238 const Relocate_info
<32, big_endian
>* relinfo
,
10239 unsigned int sh_type
,
10240 const unsigned char* prelocs
,
10241 size_t reloc_count
,
10242 Output_section
* output_section
,
10243 bool needs_special_offset_handling
,
10244 unsigned char* view
,
10245 Arm_address address
,
10246 section_size_type view_size
,
10247 const Reloc_symbol_changes
* reloc_symbol_changes
)
10249 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
10250 gold_assert(sh_type
== elfcpp::SHT_REL
);
10252 // See if we are relocating a relaxed input section. If so, the view
10253 // covers the whole output section and we need to adjust accordingly.
10254 if (needs_special_offset_handling
)
10256 const Output_relaxed_input_section
* poris
=
10257 output_section
->find_relaxed_input_section(relinfo
->object
,
10258 relinfo
->data_shndx
);
10261 Arm_address section_address
= poris
->address();
10262 section_size_type section_size
= poris
->data_size();
10264 gold_assert((section_address
>= address
)
10265 && ((section_address
+ section_size
)
10266 <= (address
+ view_size
)));
10268 off_t offset
= section_address
- address
;
10271 view_size
= section_size
;
10275 gold::relocate_section
<32, big_endian
, Target_arm
, Arm_relocate
,
10276 gold::Default_comdat_behavior
, Classify_reloc
>(
10282 needs_special_offset_handling
,
10286 reloc_symbol_changes
);
10289 // Return the size of a relocation while scanning during a relocatable
10292 template<bool big_endian
>
10294 Target_arm
<big_endian
>::Classify_reloc::get_size_for_reloc(
10295 unsigned int r_type
,
10298 Target_arm
<big_endian
>* arm_target
=
10299 Target_arm
<big_endian
>::default_target();
10300 r_type
= arm_target
->get_real_reloc_type(r_type
);
10301 const Arm_reloc_property
* arp
=
10302 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10304 return arp
->size();
10307 std::string reloc_name
=
10308 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
10309 gold_error(_("%s: unexpected %s in object file"),
10310 object
->name().c_str(), reloc_name
.c_str());
10315 // Scan the relocs during a relocatable link.
10317 template<bool big_endian
>
10319 Target_arm
<big_endian
>::scan_relocatable_relocs(
10320 Symbol_table
* symtab
,
10322 Sized_relobj_file
<32, big_endian
>* object
,
10323 unsigned int data_shndx
,
10324 unsigned int sh_type
,
10325 const unsigned char* prelocs
,
10326 size_t reloc_count
,
10327 Output_section
* output_section
,
10328 bool needs_special_offset_handling
,
10329 size_t local_symbol_count
,
10330 const unsigned char* plocal_symbols
,
10331 Relocatable_relocs
* rr
)
10333 typedef Arm_scan_relocatable_relocs
<big_endian
, Classify_reloc
>
10334 Scan_relocatable_relocs
;
10336 gold_assert(sh_type
== elfcpp::SHT_REL
);
10338 gold::scan_relocatable_relocs
<32, big_endian
, Scan_relocatable_relocs
>(
10346 needs_special_offset_handling
,
10347 local_symbol_count
,
10352 // Scan the relocs for --emit-relocs.
10354 template<bool big_endian
>
10356 Target_arm
<big_endian
>::emit_relocs_scan(Symbol_table
* symtab
,
10358 Sized_relobj_file
<32, big_endian
>* object
,
10359 unsigned int data_shndx
,
10360 unsigned int sh_type
,
10361 const unsigned char* prelocs
,
10362 size_t reloc_count
,
10363 Output_section
* output_section
,
10364 bool needs_special_offset_handling
,
10365 size_t local_symbol_count
,
10366 const unsigned char* plocal_syms
,
10367 Relocatable_relocs
* rr
)
10369 typedef gold::Default_classify_reloc
<elfcpp::SHT_REL
, 32, big_endian
>
10371 typedef gold::Default_emit_relocs_strategy
<Classify_reloc
>
10372 Emit_relocs_strategy
;
10374 gold_assert(sh_type
== elfcpp::SHT_REL
);
10376 gold::scan_relocatable_relocs
<32, big_endian
, Emit_relocs_strategy
>(
10384 needs_special_offset_handling
,
10385 local_symbol_count
,
10390 // Emit relocations for a section.
10392 template<bool big_endian
>
10394 Target_arm
<big_endian
>::relocate_relocs(
10395 const Relocate_info
<32, big_endian
>* relinfo
,
10396 unsigned int sh_type
,
10397 const unsigned char* prelocs
,
10398 size_t reloc_count
,
10399 Output_section
* output_section
,
10400 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10401 unsigned char* view
,
10402 Arm_address view_address
,
10403 section_size_type view_size
,
10404 unsigned char* reloc_view
,
10405 section_size_type reloc_view_size
)
10407 gold_assert(sh_type
== elfcpp::SHT_REL
);
10409 gold::relocate_relocs
<32, big_endian
, Classify_reloc
>(
10414 offset_in_output_section
,
10422 // Perform target-specific processing in a relocatable link. This is
10423 // only used if we use the relocation strategy RELOC_SPECIAL.
10425 template<bool big_endian
>
10427 Target_arm
<big_endian
>::relocate_special_relocatable(
10428 const Relocate_info
<32, big_endian
>* relinfo
,
10429 unsigned int sh_type
,
10430 const unsigned char* preloc_in
,
10432 Output_section
* output_section
,
10433 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10434 unsigned char* view
,
10435 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
10437 unsigned char* preloc_out
)
10439 // We can only handle REL type relocation sections.
10440 gold_assert(sh_type
== elfcpp::SHT_REL
);
10442 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
10443 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
10445 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
10447 const Arm_relobj
<big_endian
>* object
=
10448 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10449 const unsigned int local_count
= object
->local_symbol_count();
10451 Reltype
reloc(preloc_in
);
10452 Reltype_write
reloc_write(preloc_out
);
10454 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
10455 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
10456 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
10458 const Arm_reloc_property
* arp
=
10459 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10460 gold_assert(arp
!= NULL
);
10462 // Get the new symbol index.
10463 // We only use RELOC_SPECIAL strategy in local relocations.
10464 gold_assert(r_sym
< local_count
);
10466 // We are adjusting a section symbol. We need to find
10467 // the symbol table index of the section symbol for
10468 // the output section corresponding to input section
10469 // in which this symbol is defined.
10471 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
10472 gold_assert(is_ordinary
);
10473 Output_section
* os
= object
->output_section(shndx
);
10474 gold_assert(os
!= NULL
);
10475 gold_assert(os
->needs_symtab_index());
10476 unsigned int new_symndx
= os
->symtab_index();
10478 // Get the new offset--the location in the output section where
10479 // this relocation should be applied.
10481 Arm_address offset
= reloc
.get_r_offset();
10482 Arm_address new_offset
;
10483 if (offset_in_output_section
!= invalid_address
)
10484 new_offset
= offset
+ offset_in_output_section
;
10487 section_offset_type sot_offset
=
10488 convert_types
<section_offset_type
, Arm_address
>(offset
);
10489 section_offset_type new_sot_offset
=
10490 output_section
->output_offset(object
, relinfo
->data_shndx
,
10492 gold_assert(new_sot_offset
!= -1);
10493 new_offset
= new_sot_offset
;
10496 // In an object file, r_offset is an offset within the section.
10497 // In an executable or dynamic object, generated by
10498 // --emit-relocs, r_offset is an absolute address.
10499 if (!parameters
->options().relocatable())
10501 new_offset
+= view_address
;
10502 if (offset_in_output_section
!= invalid_address
)
10503 new_offset
-= offset_in_output_section
;
10506 reloc_write
.put_r_offset(new_offset
);
10507 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
10509 // Handle the reloc addend.
10510 // The relocation uses a section symbol in the input file.
10511 // We are adjusting it to use a section symbol in the output
10512 // file. The input section symbol refers to some address in
10513 // the input section. We need the relocation in the output
10514 // file to refer to that same address. This adjustment to
10515 // the addend is the same calculation we use for a simple
10516 // absolute relocation for the input section symbol.
10518 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
10520 // Handle THUMB bit.
10521 Symbol_value
<32> symval
;
10522 Arm_address thumb_bit
=
10523 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
10525 && arp
->uses_thumb_bit()
10526 && ((psymval
->value(object
, 0) & 1) != 0))
10528 Arm_address stripped_value
=
10529 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
10530 symval
.set_output_value(stripped_value
);
10534 unsigned char* paddend
= view
+ offset
;
10535 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
10536 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
10539 case elfcpp::R_ARM_ABS8
:
10540 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
10544 case elfcpp::R_ARM_ABS12
:
10545 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
10549 case elfcpp::R_ARM_ABS16
:
10550 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
10554 case elfcpp::R_ARM_THM_ABS5
:
10555 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
10560 case elfcpp::R_ARM_MOVW_ABS_NC
:
10561 case elfcpp::R_ARM_MOVW_PREL_NC
:
10562 case elfcpp::R_ARM_MOVW_BREL_NC
:
10563 case elfcpp::R_ARM_MOVW_BREL
:
10564 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
10565 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10568 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
10569 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
10570 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
10571 case elfcpp::R_ARM_THM_MOVW_BREL
:
10572 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
10573 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10576 case elfcpp::R_ARM_THM_CALL
:
10577 case elfcpp::R_ARM_THM_XPC22
:
10578 case elfcpp::R_ARM_THM_JUMP24
:
10580 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
10581 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10585 case elfcpp::R_ARM_PLT32
:
10586 case elfcpp::R_ARM_CALL
:
10587 case elfcpp::R_ARM_JUMP24
:
10588 case elfcpp::R_ARM_XPC25
:
10590 Arm_relocate_functions
<big_endian
>::arm_branch_common(
10591 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10595 case elfcpp::R_ARM_THM_JUMP19
:
10597 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
10598 psymval
, 0, thumb_bit
);
10601 case elfcpp::R_ARM_THM_JUMP6
:
10603 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
10607 case elfcpp::R_ARM_THM_JUMP8
:
10609 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
10613 case elfcpp::R_ARM_THM_JUMP11
:
10615 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
10619 case elfcpp::R_ARM_PREL31
:
10621 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
10625 case elfcpp::R_ARM_THM_PC8
:
10627 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
10631 case elfcpp::R_ARM_THM_PC12
:
10633 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
10637 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
10639 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
10643 // These relocation truncate relocation results so we cannot handle them
10644 // in a relocatable link.
10645 case elfcpp::R_ARM_MOVT_ABS
:
10646 case elfcpp::R_ARM_THM_MOVT_ABS
:
10647 case elfcpp::R_ARM_MOVT_PREL
:
10648 case elfcpp::R_ARM_MOVT_BREL
:
10649 case elfcpp::R_ARM_THM_MOVT_PREL
:
10650 case elfcpp::R_ARM_THM_MOVT_BREL
:
10651 case elfcpp::R_ARM_ALU_PC_G0_NC
:
10652 case elfcpp::R_ARM_ALU_PC_G0
:
10653 case elfcpp::R_ARM_ALU_PC_G1_NC
:
10654 case elfcpp::R_ARM_ALU_PC_G1
:
10655 case elfcpp::R_ARM_ALU_PC_G2
:
10656 case elfcpp::R_ARM_ALU_SB_G0_NC
:
10657 case elfcpp::R_ARM_ALU_SB_G0
:
10658 case elfcpp::R_ARM_ALU_SB_G1_NC
:
10659 case elfcpp::R_ARM_ALU_SB_G1
:
10660 case elfcpp::R_ARM_ALU_SB_G2
:
10661 case elfcpp::R_ARM_LDR_PC_G0
:
10662 case elfcpp::R_ARM_LDR_PC_G1
:
10663 case elfcpp::R_ARM_LDR_PC_G2
:
10664 case elfcpp::R_ARM_LDR_SB_G0
:
10665 case elfcpp::R_ARM_LDR_SB_G1
:
10666 case elfcpp::R_ARM_LDR_SB_G2
:
10667 case elfcpp::R_ARM_LDRS_PC_G0
:
10668 case elfcpp::R_ARM_LDRS_PC_G1
:
10669 case elfcpp::R_ARM_LDRS_PC_G2
:
10670 case elfcpp::R_ARM_LDRS_SB_G0
:
10671 case elfcpp::R_ARM_LDRS_SB_G1
:
10672 case elfcpp::R_ARM_LDRS_SB_G2
:
10673 case elfcpp::R_ARM_LDC_PC_G0
:
10674 case elfcpp::R_ARM_LDC_PC_G1
:
10675 case elfcpp::R_ARM_LDC_PC_G2
:
10676 case elfcpp::R_ARM_LDC_SB_G0
:
10677 case elfcpp::R_ARM_LDC_SB_G1
:
10678 case elfcpp::R_ARM_LDC_SB_G2
:
10679 gold_error(_("cannot handle %s in a relocatable link"),
10680 arp
->name().c_str());
10684 gold_unreachable();
10687 // Report any errors.
10688 switch (reloc_status
)
10690 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
10692 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
10693 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10694 _("relocation overflow in %s"),
10695 arp
->name().c_str());
10697 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
10698 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10699 _("unexpected opcode while processing relocation %s"),
10700 arp
->name().c_str());
10703 gold_unreachable();
10707 // Return the value to use for a dynamic symbol which requires special
10708 // treatment. This is how we support equality comparisons of function
10709 // pointers across shared library boundaries, as described in the
10710 // processor specific ABI supplement.
10712 template<bool big_endian
>
10714 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
10716 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
10717 return this->plt_address_for_global(gsym
);
10720 // Map platform-specific relocs to real relocs
10722 template<bool big_endian
>
10724 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
) const
10728 case elfcpp::R_ARM_TARGET1
:
10729 return this->target1_reloc_
;
10731 case elfcpp::R_ARM_TARGET2
:
10732 return this->target2_reloc_
;
10739 // Whether if two EABI versions V1 and V2 are compatible.
10741 template<bool big_endian
>
10743 Target_arm
<big_endian
>::are_eabi_versions_compatible(
10744 elfcpp::Elf_Word v1
,
10745 elfcpp::Elf_Word v2
)
10747 // v4 and v5 are the same spec before and after it was released,
10748 // so allow mixing them.
10749 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
10750 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
10751 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
10757 // Combine FLAGS from an input object called NAME and the processor-specific
10758 // flags in the ELF header of the output. Much of this is adapted from the
10759 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10760 // in bfd/elf32-arm.c.
10762 template<bool big_endian
>
10764 Target_arm
<big_endian
>::merge_processor_specific_flags(
10765 const std::string
& name
,
10766 elfcpp::Elf_Word flags
)
10768 if (this->are_processor_specific_flags_set())
10770 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
10772 // Nothing to merge if flags equal to those in output.
10773 if (flags
== out_flags
)
10776 // Complain about various flag mismatches.
10777 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
10778 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
10779 if (!this->are_eabi_versions_compatible(version1
, version2
)
10780 && parameters
->options().warn_mismatch())
10781 gold_error(_("Source object %s has EABI version %d but output has "
10782 "EABI version %d."),
10784 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
10785 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
10789 // If the input is the default architecture and had the default
10790 // flags then do not bother setting the flags for the output
10791 // architecture, instead allow future merges to do this. If no
10792 // future merges ever set these flags then they will retain their
10793 // uninitialised values, which surprise surprise, correspond
10794 // to the default values.
10798 // This is the first time, just copy the flags.
10799 // We only copy the EABI version for now.
10800 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
10804 // Adjust ELF file header.
10805 template<bool big_endian
>
10807 Target_arm
<big_endian
>::do_adjust_elf_header(
10808 unsigned char* view
,
10811 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
10813 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
10814 elfcpp::Elf_Word flags
= this->processor_specific_flags();
10815 unsigned char e_ident
[elfcpp::EI_NIDENT
];
10816 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
10818 if (elfcpp::arm_eabi_version(flags
)
10819 == elfcpp::EF_ARM_EABI_UNKNOWN
)
10820 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
10822 e_ident
[elfcpp::EI_OSABI
] = 0;
10823 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
10825 // Do EF_ARM_BE8 adjustment.
10826 if (parameters
->options().be8() && !big_endian
)
10827 gold_error("BE8 images only valid in big-endian mode.");
10828 if (parameters
->options().be8())
10830 flags
|= elfcpp::EF_ARM_BE8
;
10831 this->set_processor_specific_flags(flags
);
10834 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10836 if (elfcpp::arm_eabi_version(flags
) == elfcpp::EF_ARM_EABI_VER5
)
10838 elfcpp::Elf_Half type
= ehdr
.get_e_type();
10839 if (type
== elfcpp::ET_EXEC
|| type
== elfcpp::ET_DYN
)
10841 Object_attribute
* attr
= this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args
);
10842 if (attr
->int_value() == elfcpp::AEABI_VFP_args_vfp
)
10843 flags
|= elfcpp::EF_ARM_ABI_FLOAT_HARD
;
10845 flags
|= elfcpp::EF_ARM_ABI_FLOAT_SOFT
;
10846 this->set_processor_specific_flags(flags
);
10849 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
10850 oehdr
.put_e_ident(e_ident
);
10851 oehdr
.put_e_flags(this->processor_specific_flags());
10854 // do_make_elf_object to override the same function in the base class.
10855 // We need to use a target-specific sub-class of
10856 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10857 // Hence we need to have our own ELF object creation.
10859 template<bool big_endian
>
10861 Target_arm
<big_endian
>::do_make_elf_object(
10862 const std::string
& name
,
10863 Input_file
* input_file
,
10864 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
10866 int et
= ehdr
.get_e_type();
10867 // ET_EXEC files are valid input for --just-symbols/-R,
10868 // and we treat them as relocatable objects.
10869 if (et
== elfcpp::ET_REL
10870 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
10872 Arm_relobj
<big_endian
>* obj
=
10873 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10877 else if (et
== elfcpp::ET_DYN
)
10879 Sized_dynobj
<32, big_endian
>* obj
=
10880 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10886 gold_error(_("%s: unsupported ELF file type %d"),
10892 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10893 // Returns -1 if no architecture could be read.
10894 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10896 template<bool big_endian
>
10898 Target_arm
<big_endian
>::get_secondary_compatible_arch(
10899 const Attributes_section_data
* pasd
)
10901 const Object_attribute
* known_attributes
=
10902 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10904 // Note: the tag and its argument below are uleb128 values, though
10905 // currently-defined values fit in one byte for each.
10906 const std::string
& sv
=
10907 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10909 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10910 && (sv
.data()[1] & 128) != 128)
10911 return sv
.data()[1];
10913 // This tag is "safely ignorable", so don't complain if it looks funny.
10917 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10918 // The tag is removed if ARCH is -1.
10919 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10921 template<bool big_endian
>
10923 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10924 Attributes_section_data
* pasd
,
10927 Object_attribute
* known_attributes
=
10928 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10932 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10936 // Note: the tag and its argument below are uleb128 values, though
10937 // currently-defined values fit in one byte for each.
10939 sv
[0] = elfcpp::Tag_CPU_arch
;
10940 gold_assert(arch
!= 0);
10944 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10947 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10949 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10951 template<bool big_endian
>
10953 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10956 int* secondary_compat_out
,
10958 int secondary_compat
)
10960 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10961 static const int v6t2
[] =
10963 T(V6T2
), // PRE_V4.
10973 static const int v6k
[] =
10986 static const int v7
[] =
11000 static const int v6_m
[] =
11015 static const int v6s_m
[] =
11031 static const int v7e_m
[] =
11038 T(V7E_M
), // V5TEJ.
11045 T(V7E_M
), // V6S_M.
11048 static const int v8
[] =
11066 static const int v4t_plus_v6_m
[] =
11073 T(V5TEJ
), // V5TEJ.
11080 T(V6S_M
), // V6S_M.
11081 T(V7E_M
), // V7E_M.
11083 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
11085 static const int* comb
[] =
11094 // Pseudo-architecture.
11098 // Check we've not got a higher architecture than we know about.
11100 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
11102 gold_error(_("%s: unknown CPU architecture"), name
);
11106 // Override old tag if we have a Tag_also_compatible_with on the output.
11108 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
11109 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
11110 oldtag
= T(V4T_PLUS_V6_M
);
11112 // And override the new tag if we have a Tag_also_compatible_with on the
11115 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
11116 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
11117 newtag
= T(V4T_PLUS_V6_M
);
11119 // Architectures before V6KZ add features monotonically.
11120 int tagh
= std::max(oldtag
, newtag
);
11121 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
11124 int tagl
= std::min(oldtag
, newtag
);
11125 int result
= comb
[tagh
- T(V6T2
)][tagl
];
11127 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11128 // as the canonical version.
11129 if (result
== T(V4T_PLUS_V6_M
))
11132 *secondary_compat_out
= T(V6_M
);
11135 *secondary_compat_out
= -1;
11139 gold_error(_("%s: conflicting CPU architectures %d/%d"),
11140 name
, oldtag
, newtag
);
11148 // Helper to print AEABI enum tag value.
11150 template<bool big_endian
>
11152 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
11154 static const char* aeabi_enum_names
[] =
11155 { "", "variable-size", "32-bit", "" };
11156 const size_t aeabi_enum_names_size
=
11157 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
11159 if (value
< aeabi_enum_names_size
)
11160 return std::string(aeabi_enum_names
[value
]);
11164 sprintf(buffer
, "<unknown value %u>", value
);
11165 return std::string(buffer
);
11169 // Return the string value to store in TAG_CPU_name.
11171 template<bool big_endian
>
11173 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
11175 static const char* name_table
[] = {
11176 // These aren't real CPU names, but we can't guess
11177 // that from the architecture version alone.
11194 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
11196 if (value
< name_table_size
)
11197 return std::string(name_table
[value
]);
11201 sprintf(buffer
, "<unknown CPU value %u>", value
);
11202 return std::string(buffer
);
11206 // Query attributes object to see if integer divide instructions may be
11207 // present in an object.
11209 template<bool big_endian
>
11211 Target_arm
<big_endian
>::attributes_accept_div(int arch
, int profile
,
11212 const Object_attribute
* div_attr
)
11214 switch (div_attr
->int_value())
11217 // Integer divide allowed if instruction contained in
11219 if (arch
== elfcpp::TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
11221 else if (arch
>= elfcpp::TAG_CPU_ARCH_V7E_M
)
11227 // Integer divide explicitly prohibited.
11231 // Unrecognised case - treat as allowing divide everywhere.
11233 // Integer divide allowed in ARM state.
11238 // Query attributes object to see if integer divide instructions are
11239 // forbidden to be in the object. This is not the inverse of
11240 // attributes_accept_div.
11242 template<bool big_endian
>
11244 Target_arm
<big_endian
>::attributes_forbid_div(const Object_attribute
* div_attr
)
11246 return div_attr
->int_value() == 1;
11249 // Merge object attributes from input file called NAME with those of the
11250 // output. The input object attributes are in the object pointed by PASD.
11252 template<bool big_endian
>
11254 Target_arm
<big_endian
>::merge_object_attributes(
11256 const Attributes_section_data
* pasd
)
11258 // Return if there is no attributes section data.
11262 // If output has no object attributes, just copy.
11263 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
11264 if (this->attributes_section_data_
== NULL
)
11266 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
11267 Object_attribute
* out_attr
=
11268 this->attributes_section_data_
->known_attributes(vendor
);
11270 // We do not output objects with Tag_MPextension_use_legacy - we move
11271 // the attribute's value to Tag_MPextension_use. */
11272 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
11274 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
11275 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
11276 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11278 gold_error(_("%s has both the current and legacy "
11279 "Tag_MPextension_use attributes"),
11283 out_attr
[elfcpp::Tag_MPextension_use
] =
11284 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
11285 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
11286 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
11292 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
11293 Object_attribute
* out_attr
=
11294 this->attributes_section_data_
->known_attributes(vendor
);
11296 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11297 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11298 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
11300 // Ignore mismatches if the object doesn't use floating point. */
11301 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11302 == elfcpp::AEABI_FP_number_model_none
11303 || (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11304 != elfcpp::AEABI_FP_number_model_none
11305 && out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11306 == elfcpp::AEABI_VFP_args_compatible
))
11307 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
11308 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
11309 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11310 != elfcpp::AEABI_FP_number_model_none
11311 && in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11312 != elfcpp::AEABI_VFP_args_compatible
11313 && parameters
->options().warn_mismatch())
11314 gold_error(_("%s uses VFP register arguments, output does not"),
11318 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
11320 // Merge this attribute with existing attributes.
11323 case elfcpp::Tag_CPU_raw_name
:
11324 case elfcpp::Tag_CPU_name
:
11325 // These are merged after Tag_CPU_arch.
11328 case elfcpp::Tag_ABI_optimization_goals
:
11329 case elfcpp::Tag_ABI_FP_optimization_goals
:
11330 // Use the first value seen.
11333 case elfcpp::Tag_CPU_arch
:
11335 unsigned int saved_out_attr
= out_attr
->int_value();
11336 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11337 int secondary_compat
=
11338 this->get_secondary_compatible_arch(pasd
);
11339 int secondary_compat_out
=
11340 this->get_secondary_compatible_arch(
11341 this->attributes_section_data_
);
11342 out_attr
[i
].set_int_value(
11343 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
11344 &secondary_compat_out
,
11345 in_attr
[i
].int_value(),
11346 secondary_compat
));
11347 this->set_secondary_compatible_arch(this->attributes_section_data_
,
11348 secondary_compat_out
);
11350 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11351 if (out_attr
[i
].int_value() == saved_out_attr
)
11352 ; // Leave the names alone.
11353 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
11355 // The output architecture has been changed to match the
11356 // input architecture. Use the input names.
11357 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
11358 in_attr
[elfcpp::Tag_CPU_name
].string_value());
11359 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
11360 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
11364 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
11365 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
11368 // If we still don't have a value for Tag_CPU_name,
11369 // make one up now. Tag_CPU_raw_name remains blank.
11370 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
11372 const std::string cpu_name
=
11373 this->tag_cpu_name_value(out_attr
[i
].int_value());
11374 // FIXME: If we see an unknown CPU, this will be set
11375 // to "<unknown CPU n>", where n is the attribute value.
11376 // This is different from BFD, which leaves the name alone.
11377 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
11382 case elfcpp::Tag_ARM_ISA_use
:
11383 case elfcpp::Tag_THUMB_ISA_use
:
11384 case elfcpp::Tag_WMMX_arch
:
11385 case elfcpp::Tag_Advanced_SIMD_arch
:
11386 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11387 case elfcpp::Tag_ABI_FP_rounding
:
11388 case elfcpp::Tag_ABI_FP_exceptions
:
11389 case elfcpp::Tag_ABI_FP_user_exceptions
:
11390 case elfcpp::Tag_ABI_FP_number_model
:
11391 case elfcpp::Tag_VFP_HP_extension
:
11392 case elfcpp::Tag_CPU_unaligned_access
:
11393 case elfcpp::Tag_T2EE_use
:
11394 case elfcpp::Tag_Virtualization_use
:
11395 case elfcpp::Tag_MPextension_use
:
11396 // Use the largest value specified.
11397 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11398 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11401 case elfcpp::Tag_ABI_align8_preserved
:
11402 case elfcpp::Tag_ABI_PCS_RO_data
:
11403 // Use the smallest value specified.
11404 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11405 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11408 case elfcpp::Tag_ABI_align8_needed
:
11409 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
11410 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
11411 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
11414 // This error message should be enabled once all non-conforming
11415 // binaries in the toolchain have had the attributes set
11417 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11421 case elfcpp::Tag_ABI_FP_denormal
:
11422 case elfcpp::Tag_ABI_PCS_GOT_use
:
11424 // These tags have 0 = don't care, 1 = strong requirement,
11425 // 2 = weak requirement.
11426 static const int order_021
[3] = {0, 2, 1};
11428 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11429 // value if greater than 2 (for future-proofing).
11430 if ((in_attr
[i
].int_value() > 2
11431 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11432 || (in_attr
[i
].int_value() <= 2
11433 && out_attr
[i
].int_value() <= 2
11434 && (order_021
[in_attr
[i
].int_value()]
11435 > order_021
[out_attr
[i
].int_value()])))
11436 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11440 case elfcpp::Tag_CPU_arch_profile
:
11441 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
11443 // 0 will merge with anything.
11444 // 'A' and 'S' merge to 'A'.
11445 // 'R' and 'S' merge to 'R'.
11446 // 'M' and 'A|R|S' is an error.
11447 if (out_attr
[i
].int_value() == 0
11448 || (out_attr
[i
].int_value() == 'S'
11449 && (in_attr
[i
].int_value() == 'A'
11450 || in_attr
[i
].int_value() == 'R')))
11451 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11452 else if (in_attr
[i
].int_value() == 0
11453 || (in_attr
[i
].int_value() == 'S'
11454 && (out_attr
[i
].int_value() == 'A'
11455 || out_attr
[i
].int_value() == 'R')))
11457 else if (parameters
->options().warn_mismatch())
11460 (_("conflicting architecture profiles %c/%c"),
11461 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
11462 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
11466 case elfcpp::Tag_VFP_arch
:
11468 static const struct
11472 } vfp_versions
[7] =
11483 // Values greater than 6 aren't defined, so just pick the
11485 if (in_attr
[i
].int_value() > 6
11486 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11488 *out_attr
= *in_attr
;
11491 // The output uses the superset of input features
11492 // (ISA version) and registers.
11493 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
11494 vfp_versions
[out_attr
[i
].int_value()].ver
);
11495 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
11496 vfp_versions
[out_attr
[i
].int_value()].regs
);
11497 // This assumes all possible supersets are also a valid
11500 for (newval
= 6; newval
> 0; newval
--)
11502 if (regs
== vfp_versions
[newval
].regs
11503 && ver
== vfp_versions
[newval
].ver
)
11506 out_attr
[i
].set_int_value(newval
);
11509 case elfcpp::Tag_PCS_config
:
11510 if (out_attr
[i
].int_value() == 0)
11511 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11512 else if (in_attr
[i
].int_value() != 0
11513 && out_attr
[i
].int_value() != 0
11514 && parameters
->options().warn_mismatch())
11516 // It's sometimes ok to mix different configs, so this is only
11518 gold_warning(_("%s: conflicting platform configuration"), name
);
11521 case elfcpp::Tag_ABI_PCS_R9_use
:
11522 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11523 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11524 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11525 && parameters
->options().warn_mismatch())
11527 gold_error(_("%s: conflicting use of R9"), name
);
11529 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
11530 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11532 case elfcpp::Tag_ABI_PCS_RW_data
:
11533 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11534 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11535 != elfcpp::AEABI_R9_SB
)
11536 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11537 != elfcpp::AEABI_R9_unused
)
11538 && parameters
->options().warn_mismatch())
11540 gold_error(_("%s: SB relative addressing conflicts with use "
11544 // Use the smallest value specified.
11545 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11546 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11548 case elfcpp::Tag_ABI_PCS_wchar_t
:
11549 if (out_attr
[i
].int_value()
11550 && in_attr
[i
].int_value()
11551 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11552 && parameters
->options().warn_mismatch()
11553 && parameters
->options().wchar_size_warning())
11555 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11556 "use %u-byte wchar_t; use of wchar_t values "
11557 "across objects may fail"),
11558 name
, in_attr
[i
].int_value(),
11559 out_attr
[i
].int_value());
11561 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
11562 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11564 case elfcpp::Tag_ABI_enum_size
:
11565 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
11567 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
11568 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
11570 // The existing object is compatible with anything.
11571 // Use whatever requirements the new object has.
11572 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11574 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
11575 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11576 && parameters
->options().warn_mismatch()
11577 && parameters
->options().enum_size_warning())
11579 unsigned int in_value
= in_attr
[i
].int_value();
11580 unsigned int out_value
= out_attr
[i
].int_value();
11581 gold_warning(_("%s uses %s enums yet the output is to use "
11582 "%s enums; use of enum values across objects "
11585 this->aeabi_enum_name(in_value
).c_str(),
11586 this->aeabi_enum_name(out_value
).c_str());
11590 case elfcpp::Tag_ABI_VFP_args
:
11593 case elfcpp::Tag_ABI_WMMX_args
:
11594 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11595 && parameters
->options().warn_mismatch())
11597 gold_error(_("%s uses iWMMXt register arguments, output does "
11602 case Object_attribute::Tag_compatibility
:
11603 // Merged in target-independent code.
11605 case elfcpp::Tag_ABI_HardFP_use
:
11606 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11607 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
11608 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
11609 out_attr
[i
].set_int_value(3);
11610 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11611 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11613 case elfcpp::Tag_ABI_FP_16bit_format
:
11614 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
11616 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11617 && parameters
->options().warn_mismatch())
11618 gold_error(_("fp16 format mismatch between %s and output"),
11621 if (in_attr
[i
].int_value() != 0)
11622 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11625 case elfcpp::Tag_DIV_use
:
11627 // A value of zero on input means that the divide
11628 // instruction may be used if available in the base
11629 // architecture as specified via Tag_CPU_arch and
11630 // Tag_CPU_arch_profile. A value of 1 means that the user
11631 // did not want divide instructions. A value of 2
11632 // explicitly means that divide instructions were allowed
11633 // in ARM and Thumb state.
11635 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
)->
11637 int profile
= this->
11638 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
)->
11640 if (in_attr
[i
].int_value() == out_attr
[i
].int_value())
11644 else if (attributes_forbid_div(&in_attr
[i
])
11645 && !attributes_accept_div(arch
, profile
, &out_attr
[i
]))
11646 out_attr
[i
].set_int_value(1);
11647 else if (attributes_forbid_div(&out_attr
[i
])
11648 && attributes_accept_div(arch
, profile
, &in_attr
[i
]))
11649 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11650 else if (in_attr
[i
].int_value() == 2)
11651 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11655 case elfcpp::Tag_MPextension_use_legacy
:
11656 // We don't output objects with Tag_MPextension_use_legacy - we
11657 // move the value to Tag_MPextension_use.
11658 if (in_attr
[i
].int_value() != 0
11659 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
11661 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
11662 != in_attr
[i
].int_value())
11664 gold_error(_("%s has has both the current and legacy "
11665 "Tag_MPextension_use attributes"),
11670 if (in_attr
[i
].int_value()
11671 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11672 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
11676 case elfcpp::Tag_nodefaults
:
11677 // This tag is set if it exists, but the value is unused (and is
11678 // typically zero). We don't actually need to do anything here -
11679 // the merge happens automatically when the type flags are merged
11682 case elfcpp::Tag_also_compatible_with
:
11683 // Already done in Tag_CPU_arch.
11685 case elfcpp::Tag_conformance
:
11686 // Keep the attribute if it matches. Throw it away otherwise.
11687 // No attribute means no claim to conform.
11688 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
11689 out_attr
[i
].set_string_value("");
11694 const char* err_object
= NULL
;
11696 // The "known_obj_attributes" table does contain some undefined
11697 // attributes. Ensure that there are unused.
11698 if (out_attr
[i
].int_value() != 0
11699 || out_attr
[i
].string_value() != "")
11700 err_object
= "output";
11701 else if (in_attr
[i
].int_value() != 0
11702 || in_attr
[i
].string_value() != "")
11705 if (err_object
!= NULL
11706 && parameters
->options().warn_mismatch())
11708 // Attribute numbers >=64 (mod 128) can be safely ignored.
11709 if ((i
& 127) < 64)
11710 gold_error(_("%s: unknown mandatory EABI object attribute "
11714 gold_warning(_("%s: unknown EABI object attribute %d"),
11718 // Only pass on attributes that match in both inputs.
11719 if (!in_attr
[i
].matches(out_attr
[i
]))
11721 out_attr
[i
].set_int_value(0);
11722 out_attr
[i
].set_string_value("");
11727 // If out_attr was copied from in_attr then it won't have a type yet.
11728 if (in_attr
[i
].type() && !out_attr
[i
].type())
11729 out_attr
[i
].set_type(in_attr
[i
].type());
11732 // Merge Tag_compatibility attributes and any common GNU ones.
11733 this->attributes_section_data_
->merge(name
, pasd
);
11735 // Check for any attributes not known on ARM.
11736 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
11737 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
11738 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
11739 Other_attributes
* out_other_attributes
=
11740 this->attributes_section_data_
->other_attributes(vendor
);
11741 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
11743 while (in_iter
!= in_other_attributes
->end()
11744 || out_iter
!= out_other_attributes
->end())
11746 const char* err_object
= NULL
;
11749 // The tags for each list are in numerical order.
11750 // If the tags are equal, then merge.
11751 if (out_iter
!= out_other_attributes
->end()
11752 && (in_iter
== in_other_attributes
->end()
11753 || in_iter
->first
> out_iter
->first
))
11755 // This attribute only exists in output. We can't merge, and we
11756 // don't know what the tag means, so delete it.
11757 err_object
= "output";
11758 err_tag
= out_iter
->first
;
11759 int saved_tag
= out_iter
->first
;
11760 delete out_iter
->second
;
11761 out_other_attributes
->erase(out_iter
);
11762 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11764 else if (in_iter
!= in_other_attributes
->end()
11765 && (out_iter
!= out_other_attributes
->end()
11766 || in_iter
->first
< out_iter
->first
))
11768 // This attribute only exists in input. We can't merge, and we
11769 // don't know what the tag means, so ignore it.
11771 err_tag
= in_iter
->first
;
11774 else // The tags are equal.
11776 // As present, all attributes in the list are unknown, and
11777 // therefore can't be merged meaningfully.
11778 err_object
= "output";
11779 err_tag
= out_iter
->first
;
11781 // Only pass on attributes that match in both inputs.
11782 if (!in_iter
->second
->matches(*(out_iter
->second
)))
11784 // No match. Delete the attribute.
11785 int saved_tag
= out_iter
->first
;
11786 delete out_iter
->second
;
11787 out_other_attributes
->erase(out_iter
);
11788 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11792 // Matched. Keep the attribute and move to the next.
11798 if (err_object
&& parameters
->options().warn_mismatch())
11800 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11801 if ((err_tag
& 127) < 64)
11803 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11804 err_object
, err_tag
);
11808 gold_warning(_("%s: unknown EABI object attribute %d"),
11809 err_object
, err_tag
);
11815 // Stub-generation methods for Target_arm.
11817 // Make a new Arm_input_section object.
11819 template<bool big_endian
>
11820 Arm_input_section
<big_endian
>*
11821 Target_arm
<big_endian
>::new_arm_input_section(
11823 unsigned int shndx
)
11825 Section_id
sid(relobj
, shndx
);
11827 Arm_input_section
<big_endian
>* arm_input_section
=
11828 new Arm_input_section
<big_endian
>(relobj
, shndx
);
11829 arm_input_section
->init();
11831 // Register new Arm_input_section in map for look-up.
11832 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
11833 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
11835 // Make sure that it we have not created another Arm_input_section
11836 // for this input section already.
11837 gold_assert(ins
.second
);
11839 return arm_input_section
;
11842 // Find the Arm_input_section object corresponding to the SHNDX-th input
11843 // section of RELOBJ.
11845 template<bool big_endian
>
11846 Arm_input_section
<big_endian
>*
11847 Target_arm
<big_endian
>::find_arm_input_section(
11849 unsigned int shndx
) const
11851 Section_id
sid(relobj
, shndx
);
11852 typename
Arm_input_section_map::const_iterator p
=
11853 this->arm_input_section_map_
.find(sid
);
11854 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
11857 // Make a new stub table.
11859 template<bool big_endian
>
11860 Stub_table
<big_endian
>*
11861 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
11863 Stub_table
<big_endian
>* stub_table
=
11864 new Stub_table
<big_endian
>(owner
);
11865 this->stub_tables_
.push_back(stub_table
);
11867 stub_table
->set_address(owner
->address() + owner
->data_size());
11868 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
11869 stub_table
->finalize_data_size();
11874 // Scan a relocation for stub generation.
11876 template<bool big_endian
>
11878 Target_arm
<big_endian
>::scan_reloc_for_stub(
11879 const Relocate_info
<32, big_endian
>* relinfo
,
11880 unsigned int r_type
,
11881 const Sized_symbol
<32>* gsym
,
11882 unsigned int r_sym
,
11883 const Symbol_value
<32>* psymval
,
11884 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
11885 Arm_address address
)
11887 const Arm_relobj
<big_endian
>* arm_relobj
=
11888 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11890 bool target_is_thumb
;
11891 Symbol_value
<32> symval
;
11894 // This is a global symbol. Determine if we use PLT and if the
11895 // final target is THUMB.
11896 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
11898 // This uses a PLT, change the symbol value.
11899 symval
.set_output_value(this->plt_address_for_global(gsym
));
11901 target_is_thumb
= false;
11903 else if (gsym
->is_undefined())
11904 // There is no need to generate a stub symbol is undefined.
11909 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
11910 || (gsym
->type() == elfcpp::STT_FUNC
11911 && !gsym
->is_undefined()
11912 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
11917 // This is a local symbol. Determine if the final target is THUMB.
11918 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
11921 // Strip LSB if this points to a THUMB target.
11922 const Arm_reloc_property
* reloc_property
=
11923 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
11924 gold_assert(reloc_property
!= NULL
);
11925 if (target_is_thumb
11926 && reloc_property
->uses_thumb_bit()
11927 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
11929 Arm_address stripped_value
=
11930 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
11931 symval
.set_output_value(stripped_value
);
11935 // Get the symbol value.
11936 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
11938 // Owing to pipelining, the PC relative branches below actually skip
11939 // two instructions when the branch offset is 0.
11940 Arm_address destination
;
11943 case elfcpp::R_ARM_CALL
:
11944 case elfcpp::R_ARM_JUMP24
:
11945 case elfcpp::R_ARM_PLT32
:
11947 destination
= value
+ addend
+ 8;
11949 case elfcpp::R_ARM_THM_CALL
:
11950 case elfcpp::R_ARM_THM_XPC22
:
11951 case elfcpp::R_ARM_THM_JUMP24
:
11952 case elfcpp::R_ARM_THM_JUMP19
:
11954 destination
= value
+ addend
+ 4;
11957 gold_unreachable();
11960 Reloc_stub
* stub
= NULL
;
11961 Stub_type stub_type
=
11962 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
11964 if (stub_type
!= arm_stub_none
)
11966 // Try looking up an existing stub from a stub table.
11967 Stub_table
<big_endian
>* stub_table
=
11968 arm_relobj
->stub_table(relinfo
->data_shndx
);
11969 gold_assert(stub_table
!= NULL
);
11971 // Locate stub by destination.
11972 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
11974 // Create a stub if there is not one already
11975 stub
= stub_table
->find_reloc_stub(stub_key
);
11978 // create a new stub and add it to stub table.
11979 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11980 stub_table
->add_reloc_stub(stub
, stub_key
);
11983 // Record the destination address.
11984 stub
->set_destination_address(destination
11985 | (target_is_thumb
? 1 : 0));
11988 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11989 if (this->fix_cortex_a8_
11990 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11991 || r_type
== elfcpp::R_ARM_THM_JUMP19
11992 || r_type
== elfcpp::R_ARM_THM_CALL
11993 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11994 && (address
& 0xfffU
) == 0xffeU
)
11996 // Found a candidate. Note we haven't checked the destination is
11997 // within 4K here: if we do so (and don't create a record) we can't
11998 // tell that a branch should have been relocated when scanning later.
11999 this->cortex_a8_relocs_info_
[address
] =
12000 new Cortex_a8_reloc(stub
, r_type
,
12001 destination
| (target_is_thumb
? 1 : 0));
12005 // This function scans a relocation sections for stub generation.
12006 // The template parameter Relocate must be a class type which provides
12007 // a single function, relocate(), which implements the machine
12008 // specific part of a relocation.
12010 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
12011 // SHT_REL or SHT_RELA.
12013 // PRELOCS points to the relocation data. RELOC_COUNT is the number
12014 // of relocs. OUTPUT_SECTION is the output section.
12015 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
12016 // mapped to output offsets.
12018 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
12019 // VIEW_SIZE is the size. These refer to the input section, unless
12020 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
12021 // the output section.
12023 template<bool big_endian
>
12024 template<int sh_type
>
12026 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
12027 const Relocate_info
<32, big_endian
>* relinfo
,
12028 const unsigned char* prelocs
,
12029 size_t reloc_count
,
12030 Output_section
* output_section
,
12031 bool needs_special_offset_handling
,
12032 const unsigned char* view
,
12033 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
12036 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
12037 const int reloc_size
=
12038 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
12040 Arm_relobj
<big_endian
>* arm_object
=
12041 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
12042 unsigned int local_count
= arm_object
->local_symbol_count();
12044 gold::Default_comdat_behavior default_comdat_behavior
;
12045 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
12047 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
12049 Reltype
reloc(prelocs
);
12051 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
12052 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
12053 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
12055 r_type
= this->get_real_reloc_type(r_type
);
12057 // Only a few relocation types need stubs.
12058 if ((r_type
!= elfcpp::R_ARM_CALL
)
12059 && (r_type
!= elfcpp::R_ARM_JUMP24
)
12060 && (r_type
!= elfcpp::R_ARM_PLT32
)
12061 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
12062 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
12063 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
12064 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
12065 && (r_type
!= elfcpp::R_ARM_V4BX
))
12068 section_offset_type offset
=
12069 convert_to_section_size_type(reloc
.get_r_offset());
12071 if (needs_special_offset_handling
)
12073 offset
= output_section
->output_offset(relinfo
->object
,
12074 relinfo
->data_shndx
,
12080 // Create a v4bx stub if --fix-v4bx-interworking is used.
12081 if (r_type
== elfcpp::R_ARM_V4BX
)
12083 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
12085 // Get the BX instruction.
12086 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
12087 const Valtype
* wv
=
12088 reinterpret_cast<const Valtype
*>(view
+ offset
);
12089 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
12090 elfcpp::Swap
<32, big_endian
>::readval(wv
);
12091 const uint32_t reg
= (insn
& 0xf);
12095 // Try looking up an existing stub from a stub table.
12096 Stub_table
<big_endian
>* stub_table
=
12097 arm_object
->stub_table(relinfo
->data_shndx
);
12098 gold_assert(stub_table
!= NULL
);
12100 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
12102 // create a new stub and add it to stub table.
12103 Arm_v4bx_stub
* stub
=
12104 this->stub_factory().make_arm_v4bx_stub(reg
);
12105 gold_assert(stub
!= NULL
);
12106 stub_table
->add_arm_v4bx_stub(stub
);
12114 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
12115 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
12116 stub_addend_reader(r_type
, view
+ offset
, reloc
);
12118 const Sized_symbol
<32>* sym
;
12120 Symbol_value
<32> symval
;
12121 const Symbol_value
<32> *psymval
;
12122 bool is_defined_in_discarded_section
;
12123 unsigned int shndx
;
12124 if (r_sym
< local_count
)
12127 psymval
= arm_object
->local_symbol(r_sym
);
12129 // If the local symbol belongs to a section we are discarding,
12130 // and that section is a debug section, try to find the
12131 // corresponding kept section and map this symbol to its
12132 // counterpart in the kept section. The symbol must not
12133 // correspond to a section we are folding.
12135 shndx
= psymval
->input_shndx(&is_ordinary
);
12136 is_defined_in_discarded_section
=
12138 && shndx
!= elfcpp::SHN_UNDEF
12139 && !arm_object
->is_section_included(shndx
)
12140 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
12142 // We need to compute the would-be final value of this local
12144 if (!is_defined_in_discarded_section
)
12146 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
12147 if (psymval
->is_section_symbol())
12148 symval
.set_is_section_symbol();
12149 typename
ObjType::Compute_final_local_value_status status
=
12150 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
12152 if (status
== ObjType::CFLV_OK
)
12154 // Currently we cannot handle a branch to a target in
12155 // a merged section. If this is the case, issue an error
12156 // and also free the merge symbol value.
12157 if (!symval
.has_output_value())
12159 const std::string
& section_name
=
12160 arm_object
->section_name(shndx
);
12161 arm_object
->error(_("cannot handle branch to local %u "
12162 "in a merged section %s"),
12163 r_sym
, section_name
.c_str());
12169 // We cannot determine the final value.
12176 const Symbol
* gsym
;
12177 gsym
= arm_object
->global_symbol(r_sym
);
12178 gold_assert(gsym
!= NULL
);
12179 if (gsym
->is_forwarder())
12180 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
12182 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
12183 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
12184 symval
.set_output_symtab_index(sym
->symtab_index());
12186 symval
.set_no_output_symtab_entry();
12188 // We need to compute the would-be final value of this global
12190 const Symbol_table
* symtab
= relinfo
->symtab
;
12191 const Sized_symbol
<32>* sized_symbol
=
12192 symtab
->get_sized_symbol
<32>(gsym
);
12193 Symbol_table::Compute_final_value_status status
;
12194 Arm_address value
=
12195 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
12197 // Skip this if the symbol has not output section.
12198 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
12200 symval
.set_output_value(value
);
12202 if (gsym
->type() == elfcpp::STT_TLS
)
12203 symval
.set_is_tls_symbol();
12204 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
12205 symval
.set_is_ifunc_symbol();
12208 is_defined_in_discarded_section
=
12209 (gsym
->is_defined_in_discarded_section()
12210 && gsym
->is_undefined());
12214 Symbol_value
<32> symval2
;
12215 if (is_defined_in_discarded_section
)
12217 if (comdat_behavior
== CB_UNDETERMINED
)
12219 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
12220 comdat_behavior
= default_comdat_behavior
.get(name
.c_str());
12222 if (comdat_behavior
== CB_PRETEND
)
12224 // FIXME: This case does not work for global symbols.
12225 // We have no place to store the original section index.
12226 // Fortunately this does not matter for comdat sections,
12227 // only for sections explicitly discarded by a linker
12230 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
12231 arm_object
->map_to_kept_section(shndx
, &found
);
12233 symval2
.set_output_value(value
+ psymval
->input_value());
12235 symval2
.set_output_value(0);
12239 if (comdat_behavior
== CB_WARNING
)
12240 gold_warning_at_location(relinfo
, i
, offset
,
12241 _("relocation refers to discarded "
12243 symval2
.set_output_value(0);
12245 symval2
.set_no_output_symtab_entry();
12246 psymval
= &symval2
;
12249 // If symbol is a section symbol, we don't know the actual type of
12250 // destination. Give up.
12251 if (psymval
->is_section_symbol())
12254 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
12255 addend
, view_address
+ offset
);
12259 // Scan an input section for stub generation.
12261 template<bool big_endian
>
12263 Target_arm
<big_endian
>::scan_section_for_stubs(
12264 const Relocate_info
<32, big_endian
>* relinfo
,
12265 unsigned int sh_type
,
12266 const unsigned char* prelocs
,
12267 size_t reloc_count
,
12268 Output_section
* output_section
,
12269 bool needs_special_offset_handling
,
12270 const unsigned char* view
,
12271 Arm_address view_address
,
12272 section_size_type view_size
)
12274 if (sh_type
== elfcpp::SHT_REL
)
12275 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
12280 needs_special_offset_handling
,
12284 else if (sh_type
== elfcpp::SHT_RELA
)
12285 // We do not support RELA type relocations yet. This is provided for
12287 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
12292 needs_special_offset_handling
,
12297 gold_unreachable();
12300 // Group input sections for stub generation.
12302 // We group input sections in an output section so that the total size,
12303 // including any padding space due to alignment is smaller than GROUP_SIZE
12304 // unless the only input section in group is bigger than GROUP_SIZE already.
12305 // Then an ARM stub table is created to follow the last input section
12306 // in group. For each group an ARM stub table is created an is placed
12307 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12308 // extend the group after the stub table.
12310 template<bool big_endian
>
12312 Target_arm
<big_endian
>::group_sections(
12314 section_size_type group_size
,
12315 bool stubs_always_after_branch
,
12318 // Group input sections and insert stub table
12319 Layout::Section_list section_list
;
12320 layout
->get_executable_sections(§ion_list
);
12321 for (Layout::Section_list::const_iterator p
= section_list
.begin();
12322 p
!= section_list
.end();
12325 Arm_output_section
<big_endian
>* output_section
=
12326 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12327 output_section
->group_sections(group_size
, stubs_always_after_branch
,
12332 // Relaxation hook. This is where we do stub generation.
12334 template<bool big_endian
>
12336 Target_arm
<big_endian
>::do_relax(
12338 const Input_objects
* input_objects
,
12339 Symbol_table
* symtab
,
12343 // No need to generate stubs if this is a relocatable link.
12344 gold_assert(!parameters
->options().relocatable());
12346 // If this is the first pass, we need to group input sections into
12348 bool done_exidx_fixup
= false;
12349 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
12352 // Determine the stub group size. The group size is the absolute
12353 // value of the parameter --stub-group-size. If --stub-group-size
12354 // is passed a negative value, we restrict stubs to be always after
12355 // the stubbed branches.
12356 int32_t stub_group_size_param
=
12357 parameters
->options().stub_group_size();
12358 bool stubs_always_after_branch
= stub_group_size_param
< 0;
12359 section_size_type stub_group_size
= abs(stub_group_size_param
);
12361 if (stub_group_size
== 1)
12364 // Thumb branch range is +-4MB has to be used as the default
12365 // maximum size (a given section can contain both ARM and Thumb
12366 // code, so the worst case has to be taken into account). If we are
12367 // fixing cortex-a8 errata, the branch range has to be even smaller,
12368 // since wide conditional branch has a range of +-1MB only.
12370 // This value is 48K less than that, which allows for 4096
12371 // 12-byte stubs. If we exceed that, then we will fail to link.
12372 // The user will have to relink with an explicit group size
12374 stub_group_size
= 4145152;
12377 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12378 // page as the first half of a 32-bit branch straddling two 4K pages.
12379 // This is a crude way of enforcing that. In addition, long conditional
12380 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12381 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12382 // cortex-A8 stubs from long conditional branches.
12383 if (this->fix_cortex_a8_
)
12385 stubs_always_after_branch
= true;
12386 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
12387 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
12390 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
12392 // Also fix .ARM.exidx section coverage.
12393 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
12394 for (Layout::Section_list::const_iterator p
=
12395 layout
->section_list().begin();
12396 p
!= layout
->section_list().end();
12398 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
12400 if (exidx_output_section
== NULL
)
12401 exidx_output_section
=
12402 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12404 // We cannot handle this now.
12405 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12406 "non-relocatable link"),
12407 exidx_output_section
->name(),
12411 if (exidx_output_section
!= NULL
)
12413 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
12415 done_exidx_fixup
= true;
12420 // If this is not the first pass, addresses and file offsets have
12421 // been reset at this point, set them here.
12422 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12423 sp
!= this->stub_tables_
.end();
12426 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12427 off_t off
= align_address(owner
->original_size(),
12428 (*sp
)->addralign());
12429 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
12430 owner
->offset() + off
);
12434 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12435 // beginning of each relaxation pass, just blow away all the stubs.
12436 // Alternatively, we could selectively remove only the stubs and reloc
12437 // information for code sections that have moved since the last pass.
12438 // That would require more book-keeping.
12439 if (this->fix_cortex_a8_
)
12441 // Clear all Cortex-A8 reloc information.
12442 for (typename
Cortex_a8_relocs_info::const_iterator p
=
12443 this->cortex_a8_relocs_info_
.begin();
12444 p
!= this->cortex_a8_relocs_info_
.end();
12447 this->cortex_a8_relocs_info_
.clear();
12449 // Remove all Cortex-A8 stubs.
12450 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12451 sp
!= this->stub_tables_
.end();
12453 (*sp
)->remove_all_cortex_a8_stubs();
12456 // Scan relocs for relocation stubs
12457 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12458 op
!= input_objects
->relobj_end();
12461 Arm_relobj
<big_endian
>* arm_relobj
=
12462 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12463 // Lock the object so we can read from it. This is only called
12464 // single-threaded from Layout::finalize, so it is OK to lock.
12465 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12466 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
12469 // Check all stub tables to see if any of them have their data sizes
12470 // or addresses alignments changed. These are the only things that
12472 bool any_stub_table_changed
= false;
12473 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
12474 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12475 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12478 if ((*sp
)->update_data_size_and_addralign())
12480 // Update data size of stub table owner.
12481 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12482 uint64_t address
= owner
->address();
12483 off_t offset
= owner
->offset();
12484 owner
->reset_address_and_file_offset();
12485 owner
->set_address_and_file_offset(address
, offset
);
12487 sections_needing_adjustment
.insert(owner
->output_section());
12488 any_stub_table_changed
= true;
12492 // Output_section_data::output_section() returns a const pointer but we
12493 // need to update output sections, so we record all output sections needing
12494 // update above and scan the sections here to find out what sections need
12496 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
12497 p
!= layout
->section_list().end();
12500 if (sections_needing_adjustment
.find(*p
)
12501 != sections_needing_adjustment
.end())
12502 (*p
)->set_section_offsets_need_adjustment();
12505 // Stop relaxation if no EXIDX fix-up and no stub table change.
12506 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
12508 // Finalize the stubs in the last relaxation pass.
12509 if (!continue_relaxation
)
12511 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12512 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12514 (*sp
)->finalize_stubs();
12516 // Update output local symbol counts of objects if necessary.
12517 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12518 op
!= input_objects
->relobj_end();
12521 Arm_relobj
<big_endian
>* arm_relobj
=
12522 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12524 // Update output local symbol counts. We need to discard local
12525 // symbols defined in parts of input sections that are discarded by
12527 if (arm_relobj
->output_local_symbol_count_needs_update())
12529 // We need to lock the object's file to update it.
12530 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12531 arm_relobj
->update_output_local_symbol_count();
12536 return continue_relaxation
;
12539 // Relocate a stub.
12541 template<bool big_endian
>
12543 Target_arm
<big_endian
>::relocate_stub(
12545 const Relocate_info
<32, big_endian
>* relinfo
,
12546 Output_section
* output_section
,
12547 unsigned char* view
,
12548 Arm_address address
,
12549 section_size_type view_size
)
12552 const Stub_template
* stub_template
= stub
->stub_template();
12553 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
12555 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
12556 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
12558 unsigned int r_type
= insn
->r_type();
12559 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
12560 section_size_type reloc_size
= insn
->size();
12561 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
12563 // This is the address of the stub destination.
12564 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
12565 Symbol_value
<32> symval
;
12566 symval
.set_output_value(target
);
12568 // Synthesize a fake reloc just in case. We don't have a symbol so
12570 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
12571 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
12572 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
12573 reloc_write
.put_r_offset(reloc_offset
);
12574 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
12576 relocate
.relocate(relinfo
, elfcpp::SHT_REL
, this, output_section
,
12577 this->fake_relnum_for_stubs
, reloc_buffer
,
12578 NULL
, &symval
, view
+ reloc_offset
,
12579 address
+ reloc_offset
, reloc_size
);
12583 // Determine whether an object attribute tag takes an integer, a
12586 template<bool big_endian
>
12588 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
12590 if (tag
== Object_attribute::Tag_compatibility
)
12591 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12592 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
12593 else if (tag
== elfcpp::Tag_nodefaults
)
12594 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12595 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
12596 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
12597 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
12599 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
12601 return ((tag
& 1) != 0
12602 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12603 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
12606 // Reorder attributes.
12608 // The ABI defines that Tag_conformance should be emitted first, and that
12609 // Tag_nodefaults should be second (if either is defined). This sets those
12610 // two positions, and bumps up the position of all the remaining tags to
12613 template<bool big_endian
>
12615 Target_arm
<big_endian
>::do_attributes_order(int num
) const
12617 // Reorder the known object attributes in output. We want to move
12618 // Tag_conformance to position 4 and Tag_conformance to position 5
12619 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12621 return elfcpp::Tag_conformance
;
12623 return elfcpp::Tag_nodefaults
;
12624 if ((num
- 2) < elfcpp::Tag_nodefaults
)
12626 if ((num
- 1) < elfcpp::Tag_conformance
)
12631 // Scan a span of THUMB code for Cortex-A8 erratum.
12633 template<bool big_endian
>
12635 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
12636 Arm_relobj
<big_endian
>* arm_relobj
,
12637 unsigned int shndx
,
12638 section_size_type span_start
,
12639 section_size_type span_end
,
12640 const unsigned char* view
,
12641 Arm_address address
)
12643 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12645 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12646 // The branch target is in the same 4KB region as the
12647 // first half of the branch.
12648 // The instruction before the branch is a 32-bit
12649 // length non-branch instruction.
12650 section_size_type i
= span_start
;
12651 bool last_was_32bit
= false;
12652 bool last_was_branch
= false;
12653 while (i
< span_end
)
12655 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12656 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
12657 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12658 bool is_blx
= false, is_b
= false;
12659 bool is_bl
= false, is_bcc
= false;
12661 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
12664 // Load the rest of the insn (in manual-friendly order).
12665 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12667 // Encoding T4: B<c>.W.
12668 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
12669 // Encoding T1: BL<c>.W.
12670 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
12671 // Encoding T2: BLX<c>.W.
12672 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
12673 // Encoding T3: B<c>.W (not permitted in IT block).
12674 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
12675 && (insn
& 0x07f00000U
) != 0x03800000U
);
12678 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
12680 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12681 // page boundary and it follows 32-bit non-branch instruction,
12682 // we need to work around.
12683 if (is_32bit_branch
12684 && ((address
+ i
) & 0xfffU
) == 0xffeU
12686 && !last_was_branch
)
12688 // Check to see if there is a relocation stub for this branch.
12689 bool force_target_arm
= false;
12690 bool force_target_thumb
= false;
12691 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
12692 Cortex_a8_relocs_info::const_iterator p
=
12693 this->cortex_a8_relocs_info_
.find(address
+ i
);
12695 if (p
!= this->cortex_a8_relocs_info_
.end())
12697 cortex_a8_reloc
= p
->second
;
12698 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
12700 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12701 && !target_is_thumb
)
12702 force_target_arm
= true;
12703 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12704 && target_is_thumb
)
12705 force_target_thumb
= true;
12709 Stub_type stub_type
= arm_stub_none
;
12711 // Check if we have an offending branch instruction.
12712 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
12713 uint16_t lower_insn
= insn
& 0xffffU
;
12714 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12716 if (cortex_a8_reloc
!= NULL
12717 && cortex_a8_reloc
->reloc_stub() != NULL
)
12718 // We've already made a stub for this instruction, e.g.
12719 // it's a long branch or a Thumb->ARM stub. Assume that
12720 // stub will suffice to work around the A8 erratum (see
12721 // setting of always_after_branch above).
12725 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
12727 stub_type
= arm_stub_a8_veneer_b_cond
;
12729 else if (is_b
|| is_bl
|| is_blx
)
12731 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
12736 stub_type
= (is_blx
12737 ? arm_stub_a8_veneer_blx
12739 ? arm_stub_a8_veneer_bl
12740 : arm_stub_a8_veneer_b
));
12743 if (stub_type
!= arm_stub_none
)
12745 Arm_address pc_for_insn
= address
+ i
+ 4;
12747 // The original instruction is a BL, but the target is
12748 // an ARM instruction. If we were not making a stub,
12749 // the BL would have been converted to a BLX. Use the
12750 // BLX stub instead in that case.
12751 if (this->may_use_v5t_interworking() && force_target_arm
12752 && stub_type
== arm_stub_a8_veneer_bl
)
12754 stub_type
= arm_stub_a8_veneer_blx
;
12758 // Conversely, if the original instruction was
12759 // BLX but the target is Thumb mode, use the BL stub.
12760 else if (force_target_thumb
12761 && stub_type
== arm_stub_a8_veneer_blx
)
12763 stub_type
= arm_stub_a8_veneer_bl
;
12771 // If we found a relocation, use the proper destination,
12772 // not the offset in the (unrelocated) instruction.
12773 // Note this is always done if we switched the stub type above.
12774 if (cortex_a8_reloc
!= NULL
)
12775 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
12777 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
12779 // Add a new stub if destination address in in the same page.
12780 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
12782 Cortex_a8_stub
* stub
=
12783 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
12787 Stub_table
<big_endian
>* stub_table
=
12788 arm_relobj
->stub_table(shndx
);
12789 gold_assert(stub_table
!= NULL
);
12790 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
12795 i
+= insn_32bit
? 4 : 2;
12796 last_was_32bit
= insn_32bit
;
12797 last_was_branch
= is_32bit_branch
;
12801 // Apply the Cortex-A8 workaround.
12803 template<bool big_endian
>
12805 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
12806 const Cortex_a8_stub
* stub
,
12807 Arm_address stub_address
,
12808 unsigned char* insn_view
,
12809 Arm_address insn_address
)
12811 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12812 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
12813 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12814 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12815 off_t branch_offset
= stub_address
- (insn_address
+ 4);
12817 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12818 switch (stub
->stub_template()->type())
12820 case arm_stub_a8_veneer_b_cond
:
12821 // For a conditional branch, we re-write it to be an unconditional
12822 // branch to the stub. We use the THUMB-2 encoding here.
12823 upper_insn
= 0xf000U
;
12824 lower_insn
= 0xb800U
;
12826 case arm_stub_a8_veneer_b
:
12827 case arm_stub_a8_veneer_bl
:
12828 case arm_stub_a8_veneer_blx
:
12829 if ((lower_insn
& 0x5000U
) == 0x4000U
)
12830 // For a BLX instruction, make sure that the relocation is
12831 // rounded up to a word boundary. This follows the semantics of
12832 // the instruction which specifies that bit 1 of the target
12833 // address will come from bit 1 of the base address.
12834 branch_offset
= (branch_offset
+ 2) & ~3;
12836 // Put BRANCH_OFFSET back into the insn.
12837 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
12838 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
12839 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
12843 gold_unreachable();
12846 // Put the relocated value back in the object file:
12847 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
12848 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
12851 // Target selector for ARM. Note this is never instantiated directly.
12852 // It's only used in Target_selector_arm_nacl, below.
12854 template<bool big_endian
>
12855 class Target_selector_arm
: public Target_selector
12858 Target_selector_arm()
12859 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
12860 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
12861 (big_endian
? "armelfb" : "armelf"))
12865 do_instantiate_target()
12866 { return new Target_arm
<big_endian
>(); }
12869 // Fix .ARM.exidx section coverage.
12871 template<bool big_endian
>
12873 Target_arm
<big_endian
>::fix_exidx_coverage(
12875 const Input_objects
* input_objects
,
12876 Arm_output_section
<big_endian
>* exidx_section
,
12877 Symbol_table
* symtab
,
12880 // We need to look at all the input sections in output in ascending
12881 // order of of output address. We do that by building a sorted list
12882 // of output sections by addresses. Then we looks at the output sections
12883 // in order. The input sections in an output section are already sorted
12884 // by addresses within the output section.
12886 typedef std::set
<Output_section
*, output_section_address_less_than
>
12887 Sorted_output_section_list
;
12888 Sorted_output_section_list sorted_output_sections
;
12890 // Find out all the output sections of input sections pointed by
12891 // EXIDX input sections.
12892 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
12893 p
!= input_objects
->relobj_end();
12896 Arm_relobj
<big_endian
>* arm_relobj
=
12897 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
12898 std::vector
<unsigned int> shndx_list
;
12899 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
12900 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
12902 const Arm_exidx_input_section
* exidx_input_section
=
12903 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
12904 gold_assert(exidx_input_section
!= NULL
);
12905 if (!exidx_input_section
->has_errors())
12907 unsigned int text_shndx
= exidx_input_section
->link();
12908 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
12909 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
12910 sorted_output_sections
.insert(os
);
12915 // Go over the output sections in ascending order of output addresses.
12916 typedef typename Arm_output_section
<big_endian
>::Text_section_list
12918 Text_section_list sorted_text_sections
;
12919 for (typename
Sorted_output_section_list::iterator p
=
12920 sorted_output_sections
.begin();
12921 p
!= sorted_output_sections
.end();
12924 Arm_output_section
<big_endian
>* arm_output_section
=
12925 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12926 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
12929 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
12930 merge_exidx_entries(), task
);
12933 template<bool big_endian
>
12935 Target_arm
<big_endian
>::do_define_standard_symbols(
12936 Symbol_table
* symtab
,
12939 // Handle the .ARM.exidx section.
12940 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
12942 if (exidx_section
!= NULL
)
12944 // Create __exidx_start and __exidx_end symbols.
12945 symtab
->define_in_output_data("__exidx_start",
12947 Symbol_table::PREDEFINED
,
12951 elfcpp::STT_NOTYPE
,
12952 elfcpp::STB_GLOBAL
,
12953 elfcpp::STV_HIDDEN
,
12955 false, // offset_is_from_end
12956 true); // only_if_ref
12958 symtab
->define_in_output_data("__exidx_end",
12960 Symbol_table::PREDEFINED
,
12964 elfcpp::STT_NOTYPE
,
12965 elfcpp::STB_GLOBAL
,
12966 elfcpp::STV_HIDDEN
,
12968 true, // offset_is_from_end
12969 true); // only_if_ref
12973 // Define __exidx_start and __exidx_end even when .ARM.exidx
12974 // section is missing to match ld's behaviour.
12975 symtab
->define_as_constant("__exidx_start", NULL
,
12976 Symbol_table::PREDEFINED
,
12977 0, 0, elfcpp::STT_OBJECT
,
12978 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12980 symtab
->define_as_constant("__exidx_end", NULL
,
12981 Symbol_table::PREDEFINED
,
12982 0, 0, elfcpp::STT_OBJECT
,
12983 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12988 // NaCl variant. It uses different PLT contents.
12990 template<bool big_endian
>
12991 class Output_data_plt_arm_nacl
;
12993 template<bool big_endian
>
12994 class Target_arm_nacl
: public Target_arm
<big_endian
>
12998 : Target_arm
<big_endian
>(&arm_nacl_info
)
13002 virtual Output_data_plt_arm
<big_endian
>*
13005 Arm_output_data_got
<big_endian
>* got
,
13006 Output_data_space
* got_plt
,
13007 Output_data_space
* got_irelative
)
13008 { return new Output_data_plt_arm_nacl
<big_endian
>(
13009 layout
, got
, got_plt
, got_irelative
); }
13012 static const Target::Target_info arm_nacl_info
;
13015 template<bool big_endian
>
13016 const Target::Target_info Target_arm_nacl
<big_endian
>::arm_nacl_info
=
13019 big_endian
, // is_big_endian
13020 elfcpp::EM_ARM
, // machine_code
13021 false, // has_make_symbol
13022 false, // has_resolve
13023 false, // has_code_fill
13024 true, // is_default_stack_executable
13025 false, // can_icf_inline_merge_sections
13027 "/lib/ld-nacl-arm.so.1", // dynamic_linker
13028 0x20000, // default_text_segment_address
13029 0x10000, // abi_pagesize (overridable by -z max-page-size)
13030 0x10000, // common_pagesize (overridable by -z common-page-size)
13031 true, // isolate_execinstr
13032 0x10000000, // rosegment_gap
13033 elfcpp::SHN_UNDEF
, // small_common_shndx
13034 elfcpp::SHN_UNDEF
, // large_common_shndx
13035 0, // small_common_section_flags
13036 0, // large_common_section_flags
13037 ".ARM.attributes", // attributes_section
13038 "aeabi", // attributes_vendor
13039 "_start", // entry_symbol_name
13040 32, // hash_entry_size
13043 template<bool big_endian
>
13044 class Output_data_plt_arm_nacl
: public Output_data_plt_arm
<big_endian
>
13047 Output_data_plt_arm_nacl(
13049 Arm_output_data_got
<big_endian
>* got
,
13050 Output_data_space
* got_plt
,
13051 Output_data_space
* got_irelative
)
13052 : Output_data_plt_arm
<big_endian
>(layout
, 16, got
, got_plt
, got_irelative
)
13056 // Return the offset of the first non-reserved PLT entry.
13057 virtual unsigned int
13058 do_first_plt_entry_offset() const
13059 { return sizeof(first_plt_entry
); }
13061 // Return the size of a PLT entry.
13062 virtual unsigned int
13063 do_get_plt_entry_size() const
13064 { return sizeof(plt_entry
); }
13067 do_fill_first_plt_entry(unsigned char* pov
,
13068 Arm_address got_address
,
13069 Arm_address plt_address
);
13072 do_fill_plt_entry(unsigned char* pov
,
13073 Arm_address got_address
,
13074 Arm_address plt_address
,
13075 unsigned int got_offset
,
13076 unsigned int plt_offset
);
13079 inline uint32_t arm_movw_immediate(uint32_t value
)
13081 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
13084 inline uint32_t arm_movt_immediate(uint32_t value
)
13086 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
13089 // Template for the first PLT entry.
13090 static const uint32_t first_plt_entry
[16];
13092 // Template for subsequent PLT entries.
13093 static const uint32_t plt_entry
[4];
13096 // The first entry in the PLT.
13097 template<bool big_endian
>
13098 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::first_plt_entry
[16] =
13101 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
13102 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
13103 0xe08cc00f, // add ip, ip, pc
13104 0xe52dc008, // str ip, [sp, #-8]!
13106 0xe3ccc103, // bic ip, ip, #0xc0000000
13107 0xe59cc000, // ldr ip, [ip]
13108 0xe3ccc13f, // bic ip, ip, #0xc000000f
13109 0xe12fff1c, // bx ip
13115 0xe50dc004, // str ip, [sp, #-4]
13117 0xe3ccc103, // bic ip, ip, #0xc0000000
13118 0xe59cc000, // ldr ip, [ip]
13119 0xe3ccc13f, // bic ip, ip, #0xc000000f
13120 0xe12fff1c, // bx ip
13123 template<bool big_endian
>
13125 Output_data_plt_arm_nacl
<big_endian
>::do_fill_first_plt_entry(
13126 unsigned char* pov
,
13127 Arm_address got_address
,
13128 Arm_address plt_address
)
13130 // Write first PLT entry. All but first two words are constants.
13131 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
13132 / sizeof(first_plt_entry
[0]));
13134 int32_t got_displacement
= got_address
+ 8 - (plt_address
+ 16);
13136 elfcpp::Swap
<32, big_endian
>::writeval
13137 (pov
+ 0, first_plt_entry
[0] | arm_movw_immediate (got_displacement
));
13138 elfcpp::Swap
<32, big_endian
>::writeval
13139 (pov
+ 4, first_plt_entry
[1] | arm_movt_immediate (got_displacement
));
13141 for (size_t i
= 2; i
< num_first_plt_words
; ++i
)
13142 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
13145 // Subsequent entries in the PLT.
13147 template<bool big_endian
>
13148 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::plt_entry
[4] =
13150 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
13151 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
13152 0xe08cc00f, // add ip, ip, pc
13153 0xea000000, // b .Lplt_tail
13156 template<bool big_endian
>
13158 Output_data_plt_arm_nacl
<big_endian
>::do_fill_plt_entry(
13159 unsigned char* pov
,
13160 Arm_address got_address
,
13161 Arm_address plt_address
,
13162 unsigned int got_offset
,
13163 unsigned int plt_offset
)
13165 // Calculate the displacement between the PLT slot and the
13166 // common tail that's part of the special initial PLT slot.
13167 int32_t tail_displacement
= (plt_address
+ (11 * sizeof(uint32_t))
13168 - (plt_address
+ plt_offset
13169 + sizeof(plt_entry
) + sizeof(uint32_t)));
13170 gold_assert((tail_displacement
& 3) == 0);
13171 tail_displacement
>>= 2;
13173 gold_assert ((tail_displacement
& 0xff000000) == 0
13174 || (-tail_displacement
& 0xff000000) == 0);
13176 // Calculate the displacement between the PLT slot and the entry
13177 // in the GOT. The offset accounts for the value produced by
13178 // adding to pc in the penultimate instruction of the PLT stub.
13179 const int32_t got_displacement
= (got_address
+ got_offset
13180 - (plt_address
+ sizeof(plt_entry
)));
13182 elfcpp::Swap
<32, big_endian
>::writeval
13183 (pov
+ 0, plt_entry
[0] | arm_movw_immediate (got_displacement
));
13184 elfcpp::Swap
<32, big_endian
>::writeval
13185 (pov
+ 4, plt_entry
[1] | arm_movt_immediate (got_displacement
));
13186 elfcpp::Swap
<32, big_endian
>::writeval
13187 (pov
+ 8, plt_entry
[2]);
13188 elfcpp::Swap
<32, big_endian
>::writeval
13189 (pov
+ 12, plt_entry
[3] | (tail_displacement
& 0x00ffffff));
13192 // Target selectors.
13194 template<bool big_endian
>
13195 class Target_selector_arm_nacl
13196 : public Target_selector_nacl
<Target_selector_arm
<big_endian
>,
13197 Target_arm_nacl
<big_endian
> >
13200 Target_selector_arm_nacl()
13201 : Target_selector_nacl
<Target_selector_arm
<big_endian
>,
13202 Target_arm_nacl
<big_endian
> >(
13204 big_endian
? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
13205 big_endian
? "armelfb_nacl" : "armelf_nacl")
13209 Target_selector_arm_nacl
<false> target_selector_arm
;
13210 Target_selector_arm_nacl
<true> target_selector_armbe
;
13212 } // End anonymous namespace.