1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian
>
61 class Output_data_plt_arm
;
63 template<bool big_endian
>
66 template<bool big_endian
>
67 class Arm_input_section
;
69 class Arm_exidx_cantunwind
;
71 class Arm_exidx_merged_section
;
73 class Arm_exidx_fixup
;
75 template<bool big_endian
>
76 class Arm_output_section
;
78 class Arm_exidx_input_section
;
80 template<bool big_endian
>
83 template<bool big_endian
>
84 class Arm_relocate_functions
;
86 template<bool big_endian
>
87 class Arm_output_data_got
;
89 template<bool big_endian
>
93 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
95 // Maximum branch offsets for ARM, THUMB and THUMB2.
96 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
97 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
98 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
99 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
100 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
101 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
103 // Thread Control Block size.
104 const size_t ARM_TCB_SIZE
= 8;
106 // The arm target class.
108 // This is a very simple port of gold for ARM-EABI. It is intended for
109 // supporting Android only for the time being.
112 // - Implement all static relocation types documented in arm-reloc.def.
113 // - Make PLTs more flexible for different architecture features like
115 // There are probably a lot more.
117 // Ideally we would like to avoid using global variables but this is used
118 // very in many places and sometimes in loops. If we use a function
119 // returning a static instance of Arm_reloc_property_table, it will very
120 // slow in an threaded environment since the static instance needs to be
121 // locked. The pointer is below initialized in the
122 // Target::do_select_as_default_target() hook so that we do not spend time
123 // building the table if we are not linking ARM objects.
125 // An alternative is to to process the information in arm-reloc.def in
126 // compilation time and generate a representation of it in PODs only. That
127 // way we can avoid initialization when the linker starts.
129 Arm_reloc_property_table
*arm_reloc_property_table
= NULL
;
131 // Instruction template class. This class is similar to the insn_sequence
132 // struct in bfd/elf32-arm.c.
137 // Types of instruction templates.
141 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
142 // templates with class-specific semantics. Currently this is used
143 // only by the Cortex_a8_stub class for handling condition codes in
144 // conditional branches.
145 THUMB16_SPECIAL_TYPE
,
151 // Factory methods to create instruction templates in different formats.
153 static const Insn_template
154 thumb16_insn(uint32_t data
)
155 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
157 // A Thumb conditional branch, in which the proper condition is inserted
158 // when we build the stub.
159 static const Insn_template
160 thumb16_bcond_insn(uint32_t data
)
161 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
163 static const Insn_template
164 thumb32_insn(uint32_t data
)
165 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
167 static const Insn_template
168 thumb32_b_insn(uint32_t data
, int reloc_addend
)
170 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
174 static const Insn_template
175 arm_insn(uint32_t data
)
176 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
178 static const Insn_template
179 arm_rel_insn(unsigned data
, int reloc_addend
)
180 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
182 static const Insn_template
183 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
184 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
186 // Accessors. This class is used for read-only objects so no modifiers
191 { return this->data_
; }
193 // Return the instruction sequence type of this.
196 { return this->type_
; }
198 // Return the ARM relocation type of this.
201 { return this->r_type_
; }
205 { return this->reloc_addend_
; }
207 // Return size of instruction template in bytes.
211 // Return byte-alignment of instruction template.
216 // We make the constructor private to ensure that only the factory
219 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
220 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
223 // Instruction specific data. This is used to store information like
224 // some of the instruction bits.
226 // Instruction template type.
228 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
229 unsigned int r_type_
;
230 // Relocation addend.
231 int32_t reloc_addend_
;
234 // Macro for generating code to stub types. One entry per long/short
238 DEF_STUB(long_branch_any_any) \
239 DEF_STUB(long_branch_v4t_arm_thumb) \
240 DEF_STUB(long_branch_thumb_only) \
241 DEF_STUB(long_branch_v4t_thumb_thumb) \
242 DEF_STUB(long_branch_v4t_thumb_arm) \
243 DEF_STUB(short_branch_v4t_thumb_arm) \
244 DEF_STUB(long_branch_any_arm_pic) \
245 DEF_STUB(long_branch_any_thumb_pic) \
246 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
247 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
248 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
249 DEF_STUB(long_branch_thumb_only_pic) \
250 DEF_STUB(a8_veneer_b_cond) \
251 DEF_STUB(a8_veneer_b) \
252 DEF_STUB(a8_veneer_bl) \
253 DEF_STUB(a8_veneer_blx) \
254 DEF_STUB(v4_veneer_bx)
258 #define DEF_STUB(x) arm_stub_##x,
264 // First reloc stub type.
265 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
266 // Last reloc stub type.
267 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
269 // First Cortex-A8 stub type.
270 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
271 // Last Cortex-A8 stub type.
272 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
275 arm_stub_type_last
= arm_stub_v4_veneer_bx
279 // Stub template class. Templates are meant to be read-only objects.
280 // A stub template for a stub type contains all read-only attributes
281 // common to all stubs of the same type.
286 Stub_template(Stub_type
, const Insn_template
*, size_t);
294 { return this->type_
; }
296 // Return an array of instruction templates.
299 { return this->insns_
; }
301 // Return size of template in number of instructions.
304 { return this->insn_count_
; }
306 // Return size of template in bytes.
309 { return this->size_
; }
311 // Return alignment of the stub template.
314 { return this->alignment_
; }
316 // Return whether entry point is in thumb mode.
318 entry_in_thumb_mode() const
319 { return this->entry_in_thumb_mode_
; }
321 // Return number of relocations in this template.
324 { return this->relocs_
.size(); }
326 // Return index of the I-th instruction with relocation.
328 reloc_insn_index(size_t i
) const
330 gold_assert(i
< this->relocs_
.size());
331 return this->relocs_
[i
].first
;
334 // Return the offset of the I-th instruction with relocation from the
335 // beginning of the stub.
337 reloc_offset(size_t i
) const
339 gold_assert(i
< this->relocs_
.size());
340 return this->relocs_
[i
].second
;
344 // This contains information about an instruction template with a relocation
345 // and its offset from start of stub.
346 typedef std::pair
<size_t, section_size_type
> Reloc
;
348 // A Stub_template may not be copied. We want to share templates as much
350 Stub_template(const Stub_template
&);
351 Stub_template
& operator=(const Stub_template
&);
355 // Points to an array of Insn_templates.
356 const Insn_template
* insns_
;
357 // Number of Insn_templates in insns_[].
359 // Size of templated instructions in bytes.
361 // Alignment of templated instructions.
363 // Flag to indicate if entry is in thumb mode.
364 bool entry_in_thumb_mode_
;
365 // A table of reloc instruction indices and offsets. We can find these by
366 // looking at the instruction templates but we pre-compute and then stash
367 // them here for speed.
368 std::vector
<Reloc
> relocs_
;
372 // A class for code stubs. This is a base class for different type of
373 // stubs used in the ARM target.
379 static const section_offset_type invalid_offset
=
380 static_cast<section_offset_type
>(-1);
383 Stub(const Stub_template
* stub_template
)
384 : stub_template_(stub_template
), offset_(invalid_offset
)
391 // Return the stub template.
393 stub_template() const
394 { return this->stub_template_
; }
396 // Return offset of code stub from beginning of its containing stub table.
400 gold_assert(this->offset_
!= invalid_offset
);
401 return this->offset_
;
404 // Set offset of code stub from beginning of its containing stub table.
406 set_offset(section_offset_type offset
)
407 { this->offset_
= offset
; }
409 // Return the relocation target address of the i-th relocation in the
410 // stub. This must be defined in a child class.
412 reloc_target(size_t i
)
413 { return this->do_reloc_target(i
); }
415 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
417 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
418 { this->do_write(view
, view_size
, big_endian
); }
420 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
421 // for the i-th instruction.
423 thumb16_special(size_t i
)
424 { return this->do_thumb16_special(i
); }
427 // This must be defined in the child class.
429 do_reloc_target(size_t) = 0;
431 // This may be overridden in the child class.
433 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
436 this->do_fixed_endian_write
<true>(view
, view_size
);
438 this->do_fixed_endian_write
<false>(view
, view_size
);
441 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
442 // instruction template.
444 do_thumb16_special(size_t)
445 { gold_unreachable(); }
448 // A template to implement do_write.
449 template<bool big_endian
>
451 do_fixed_endian_write(unsigned char*, section_size_type
);
454 const Stub_template
* stub_template_
;
455 // Offset within the section of containing this stub.
456 section_offset_type offset_
;
459 // Reloc stub class. These are stubs we use to fix up relocation because
460 // of limited branch ranges.
462 class Reloc_stub
: public Stub
465 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
466 // We assume we never jump to this address.
467 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
469 // Return destination address.
471 destination_address() const
473 gold_assert(this->destination_address_
!= this->invalid_address
);
474 return this->destination_address_
;
477 // Set destination address.
479 set_destination_address(Arm_address address
)
481 gold_assert(address
!= this->invalid_address
);
482 this->destination_address_
= address
;
485 // Reset destination address.
487 reset_destination_address()
488 { this->destination_address_
= this->invalid_address
; }
490 // Determine stub type for a branch of a relocation of R_TYPE going
491 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
492 // the branch target is a thumb instruction. TARGET is used for look
493 // up ARM-specific linker settings.
495 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
496 Arm_address branch_target
, bool target_is_thumb
);
498 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
499 // and an addend. Since we treat global and local symbol differently, we
500 // use a Symbol object for a global symbol and a object-index pair for
505 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
506 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
507 // and R_SYM must not be invalid_index.
508 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
509 unsigned int r_sym
, int32_t addend
)
510 : stub_type_(stub_type
), addend_(addend
)
514 this->r_sym_
= Reloc_stub::invalid_index
;
515 this->u_
.symbol
= symbol
;
519 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
520 this->r_sym_
= r_sym
;
521 this->u_
.relobj
= relobj
;
528 // Accessors: Keys are meant to be read-only object so no modifiers are
534 { return this->stub_type_
; }
536 // Return the local symbol index or invalid_index.
539 { return this->r_sym_
; }
541 // Return the symbol if there is one.
544 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
546 // Return the relobj if there is one.
549 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
551 // Whether this equals to another key k.
553 eq(const Key
& k
) const
555 return ((this->stub_type_
== k
.stub_type_
)
556 && (this->r_sym_
== k
.r_sym_
)
557 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
558 ? (this->u_
.relobj
== k
.u_
.relobj
)
559 : (this->u_
.symbol
== k
.u_
.symbol
))
560 && (this->addend_
== k
.addend_
));
563 // Return a hash value.
567 return (this->stub_type_
569 ^ gold::string_hash
<char>(
570 (this->r_sym_
!= Reloc_stub::invalid_index
)
571 ? this->u_
.relobj
->name().c_str()
572 : this->u_
.symbol
->name())
576 // Functors for STL associative containers.
580 operator()(const Key
& k
) const
581 { return k
.hash_value(); }
587 operator()(const Key
& k1
, const Key
& k2
) const
588 { return k1
.eq(k2
); }
591 // Name of key. This is mainly for debugging.
597 Stub_type stub_type_
;
598 // If this is a local symbol, this is the index in the defining object.
599 // Otherwise, it is invalid_index for a global symbol.
601 // If r_sym_ is invalid index. This points to a global symbol.
602 // Otherwise, this points a relobj. We used the unsized and target
603 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
604 // Arm_relobj. This is done to avoid making the stub class a template
605 // as most of the stub machinery is endianness-neutral. However, it
606 // may require a bit of casting done by users of this class.
609 const Symbol
* symbol
;
610 const Relobj
* relobj
;
612 // Addend associated with a reloc.
617 // Reloc_stubs are created via a stub factory. So these are protected.
618 Reloc_stub(const Stub_template
* stub_template
)
619 : Stub(stub_template
), destination_address_(invalid_address
)
625 friend class Stub_factory
;
627 // Return the relocation target address of the i-th relocation in the
630 do_reloc_target(size_t i
)
632 // All reloc stub have only one relocation.
634 return this->destination_address_
;
638 // Address of destination.
639 Arm_address destination_address_
;
642 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
643 // THUMB branch that meets the following conditions:
645 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
646 // branch address is 0xffe.
647 // 2. The branch target address is in the same page as the first word of the
649 // 3. The branch follows a 32-bit instruction which is not a branch.
651 // To do the fix up, we need to store the address of the branch instruction
652 // and its target at least. We also need to store the original branch
653 // instruction bits for the condition code in a conditional branch. The
654 // condition code is used in a special instruction template. We also want
655 // to identify input sections needing Cortex-A8 workaround quickly. We store
656 // extra information about object and section index of the code section
657 // containing a branch being fixed up. The information is used to mark
658 // the code section when we finalize the Cortex-A8 stubs.
661 class Cortex_a8_stub
: public Stub
667 // Return the object of the code section containing the branch being fixed
671 { return this->relobj_
; }
673 // Return the section index of the code section containing the branch being
677 { return this->shndx_
; }
679 // Return the source address of stub. This is the address of the original
680 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
683 source_address() const
684 { return this->source_address_
; }
686 // Return the destination address of the stub. This is the branch taken
687 // address of the original branch instruction. LSB is 1 if it is a THUMB
688 // instruction address.
690 destination_address() const
691 { return this->destination_address_
; }
693 // Return the instruction being fixed up.
695 original_insn() const
696 { return this->original_insn_
; }
699 // Cortex_a8_stubs are created via a stub factory. So these are protected.
700 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
701 unsigned int shndx
, Arm_address source_address
,
702 Arm_address destination_address
, uint32_t original_insn
)
703 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
704 source_address_(source_address
| 1U),
705 destination_address_(destination_address
),
706 original_insn_(original_insn
)
709 friend class Stub_factory
;
711 // Return the relocation target address of the i-th relocation in the
714 do_reloc_target(size_t i
)
716 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
718 // The conditional branch veneer has two relocations.
720 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
724 // All other Cortex-A8 stubs have only one relocation.
726 return this->destination_address_
;
730 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
732 do_thumb16_special(size_t);
735 // Object of the code section containing the branch being fixed up.
737 // Section index of the code section containing the branch begin fixed up.
739 // Source address of original branch.
740 Arm_address source_address_
;
741 // Destination address of the original branch.
742 Arm_address destination_address_
;
743 // Original branch instruction. This is needed for copying the condition
744 // code from a condition branch to its stub.
745 uint32_t original_insn_
;
748 // ARMv4 BX Rx branch relocation stub class.
749 class Arm_v4bx_stub
: public Stub
755 // Return the associated register.
758 { return this->reg_
; }
761 // Arm V4BX stubs are created via a stub factory. So these are protected.
762 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
763 : Stub(stub_template
), reg_(reg
)
766 friend class Stub_factory
;
768 // Return the relocation target address of the i-th relocation in the
771 do_reloc_target(size_t)
772 { gold_unreachable(); }
774 // This may be overridden in the child class.
776 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
779 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
781 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
785 // A template to implement do_write.
786 template<bool big_endian
>
788 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
790 const Insn_template
* insns
= this->stub_template()->insns();
791 elfcpp::Swap
<32, big_endian
>::writeval(view
,
793 + (this->reg_
<< 16)));
794 view
+= insns
[0].size();
795 elfcpp::Swap
<32, big_endian
>::writeval(view
,
796 (insns
[1].data() + this->reg_
));
797 view
+= insns
[1].size();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
799 (insns
[2].data() + this->reg_
));
802 // A register index (r0-r14), which is associated with the stub.
806 // Stub factory class.
811 // Return the unique instance of this class.
812 static const Stub_factory
&
815 static Stub_factory singleton
;
819 // Make a relocation stub.
821 make_reloc_stub(Stub_type stub_type
) const
823 gold_assert(stub_type
>= arm_stub_reloc_first
824 && stub_type
<= arm_stub_reloc_last
);
825 return new Reloc_stub(this->stub_templates_
[stub_type
]);
828 // Make a Cortex-A8 stub.
830 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
831 Arm_address source
, Arm_address destination
,
832 uint32_t original_insn
) const
834 gold_assert(stub_type
>= arm_stub_cortex_a8_first
835 && stub_type
<= arm_stub_cortex_a8_last
);
836 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
837 source
, destination
, original_insn
);
840 // Make an ARM V4BX relocation stub.
841 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
843 make_arm_v4bx_stub(uint32_t reg
) const
845 gold_assert(reg
< 0xf);
846 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
851 // Constructor and destructor are protected since we only return a single
852 // instance created in Stub_factory::get_instance().
856 // A Stub_factory may not be copied since it is a singleton.
857 Stub_factory(const Stub_factory
&);
858 Stub_factory
& operator=(Stub_factory
&);
860 // Stub templates. These are initialized in the constructor.
861 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
864 // A class to hold stubs for the ARM target.
866 template<bool big_endian
>
867 class Stub_table
: public Output_data
870 Stub_table(Arm_input_section
<big_endian
>* owner
)
871 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
872 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
873 prev_data_size_(0), prev_addralign_(1)
879 // Owner of this stub table.
880 Arm_input_section
<big_endian
>*
882 { return this->owner_
; }
884 // Whether this stub table is empty.
888 return (this->reloc_stubs_
.empty()
889 && this->cortex_a8_stubs_
.empty()
890 && this->arm_v4bx_stubs_
.empty());
893 // Return the current data size.
895 current_data_size() const
896 { return this->current_data_size_for_child(); }
898 // Add a STUB with using KEY. Caller is reponsible for avoid adding
899 // if already a STUB with the same key has been added.
901 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
903 const Stub_template
* stub_template
= stub
->stub_template();
904 gold_assert(stub_template
->type() == key
.stub_type());
905 this->reloc_stubs_
[key
] = stub
;
907 // Assign stub offset early. We can do this because we never remove
908 // reloc stubs and they are in the beginning of the stub table.
909 uint64_t align
= stub_template
->alignment();
910 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
911 stub
->set_offset(this->reloc_stubs_size_
);
912 this->reloc_stubs_size_
+= stub_template
->size();
913 this->reloc_stubs_addralign_
=
914 std::max(this->reloc_stubs_addralign_
, align
);
917 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
918 // Caller is reponsible for avoid adding if already a STUB with the same
919 // address has been added.
921 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
923 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
924 this->cortex_a8_stubs_
.insert(value
);
927 // Add an ARM V4BX relocation stub. A register index will be retrieved
930 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
932 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
933 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
936 // Remove all Cortex-A8 stubs.
938 remove_all_cortex_a8_stubs();
940 // Look up a relocation stub using KEY. Return NULL if there is none.
942 find_reloc_stub(const Reloc_stub::Key
& key
) const
944 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
945 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
948 // Look up an arm v4bx relocation stub using the register index.
949 // Return NULL if there is none.
951 find_arm_v4bx_stub(const uint32_t reg
) const
953 gold_assert(reg
< 0xf);
954 return this->arm_v4bx_stubs_
[reg
];
957 // Relocate stubs in this stub table.
959 relocate_stubs(const Relocate_info
<32, big_endian
>*,
960 Target_arm
<big_endian
>*, Output_section
*,
961 unsigned char*, Arm_address
, section_size_type
);
963 // Update data size and alignment at the end of a relaxation pass. Return
964 // true if either data size or alignment is different from that of the
965 // previous relaxation pass.
967 update_data_size_and_addralign();
969 // Finalize stubs. Set the offsets of all stubs and mark input sections
970 // needing the Cortex-A8 workaround.
974 // Apply Cortex-A8 workaround to an address range.
976 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
977 unsigned char*, Arm_address
,
981 // Write out section contents.
983 do_write(Output_file
*);
985 // Return the required alignment.
988 { return this->prev_addralign_
; }
990 // Reset address and file offset.
992 do_reset_address_and_file_offset()
993 { this->set_current_data_size_for_child(this->prev_data_size_
); }
995 // Set final data size.
997 set_final_data_size()
998 { this->set_data_size(this->current_data_size()); }
1001 // Relocate one stub.
1003 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1004 Target_arm
<big_endian
>*, Output_section
*,
1005 unsigned char*, Arm_address
, section_size_type
);
1007 // Unordered map of relocation stubs.
1009 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1010 Reloc_stub::Key::equal_to
>
1013 // List of Cortex-A8 stubs ordered by addresses of branches being
1014 // fixed up in output.
1015 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1016 // List of Arm V4BX relocation stubs ordered by associated registers.
1017 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1019 // Owner of this stub table.
1020 Arm_input_section
<big_endian
>* owner_
;
1021 // The relocation stubs.
1022 Reloc_stub_map reloc_stubs_
;
1023 // Size of reloc stubs.
1024 off_t reloc_stubs_size_
;
1025 // Maximum address alignment of reloc stubs.
1026 uint64_t reloc_stubs_addralign_
;
1027 // The cortex_a8_stubs.
1028 Cortex_a8_stub_list cortex_a8_stubs_
;
1029 // The Arm V4BX relocation stubs.
1030 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1031 // data size of this in the previous pass.
1032 off_t prev_data_size_
;
1033 // address alignment of this in the previous pass.
1034 uint64_t prev_addralign_
;
1037 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1038 // we add to the end of an EXIDX input section that goes into the output.
1040 class Arm_exidx_cantunwind
: public Output_section_data
1043 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1044 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1047 // Return the object containing the section pointed by this.
1050 { return this->relobj_
; }
1052 // Return the section index of the section pointed by this.
1055 { return this->shndx_
; }
1059 do_write(Output_file
* of
)
1061 if (parameters
->target().is_big_endian())
1062 this->do_fixed_endian_write
<true>(of
);
1064 this->do_fixed_endian_write
<false>(of
);
1068 // Implement do_write for a given endianness.
1069 template<bool big_endian
>
1071 do_fixed_endian_write(Output_file
*);
1073 // The object containing the section pointed by this.
1075 // The section index of the section pointed by this.
1076 unsigned int shndx_
;
1079 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1080 // Offset map is used to map input section offset within the EXIDX section
1081 // to the output offset from the start of this EXIDX section.
1083 typedef std::map
<section_offset_type
, section_offset_type
>
1084 Arm_exidx_section_offset_map
;
1086 // Arm_exidx_merged_section class. This represents an EXIDX input section
1087 // with some of its entries merged.
1089 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1092 // Constructor for Arm_exidx_merged_section.
1093 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1094 // SECTION_OFFSET_MAP points to a section offset map describing how
1095 // parts of the input section are mapped to output. DELETED_BYTES is
1096 // the number of bytes deleted from the EXIDX input section.
1097 Arm_exidx_merged_section(
1098 const Arm_exidx_input_section
& exidx_input_section
,
1099 const Arm_exidx_section_offset_map
& section_offset_map
,
1100 uint32_t deleted_bytes
);
1102 // Return the original EXIDX input section.
1103 const Arm_exidx_input_section
&
1104 exidx_input_section() const
1105 { return this->exidx_input_section_
; }
1107 // Return the section offset map.
1108 const Arm_exidx_section_offset_map
&
1109 section_offset_map() const
1110 { return this->section_offset_map_
; }
1113 // Write merged section into file OF.
1115 do_write(Output_file
* of
);
1118 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1119 section_offset_type
*) const;
1122 // Original EXIDX input section.
1123 const Arm_exidx_input_section
& exidx_input_section_
;
1124 // Section offset map.
1125 const Arm_exidx_section_offset_map
& section_offset_map_
;
1128 // A class to wrap an ordinary input section containing executable code.
1130 template<bool big_endian
>
1131 class Arm_input_section
: public Output_relaxed_input_section
1134 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1135 : Output_relaxed_input_section(relobj
, shndx
, 1),
1136 original_addralign_(1), original_size_(0), stub_table_(NULL
)
1139 ~Arm_input_section()
1146 // Whether this is a stub table owner.
1148 is_stub_table_owner() const
1149 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1151 // Return the stub table.
1152 Stub_table
<big_endian
>*
1154 { return this->stub_table_
; }
1156 // Set the stub_table.
1158 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1159 { this->stub_table_
= stub_table
; }
1161 // Downcast a base pointer to an Arm_input_section pointer. This is
1162 // not type-safe but we only use Arm_input_section not the base class.
1163 static Arm_input_section
<big_endian
>*
1164 as_arm_input_section(Output_relaxed_input_section
* poris
)
1165 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1167 // Return the original size of the section.
1169 original_size() const
1170 { return this->original_size_
; }
1173 // Write data to output file.
1175 do_write(Output_file
*);
1177 // Return required alignment of this.
1179 do_addralign() const
1181 if (this->is_stub_table_owner())
1182 return std::max(this->stub_table_
->addralign(),
1183 static_cast<uint64_t>(this->original_addralign_
));
1185 return this->original_addralign_
;
1188 // Finalize data size.
1190 set_final_data_size();
1192 // Reset address and file offset.
1194 do_reset_address_and_file_offset();
1198 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1199 section_offset_type offset
,
1200 section_offset_type
* poutput
) const
1202 if ((object
== this->relobj())
1203 && (shndx
== this->shndx())
1206 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1216 // Copying is not allowed.
1217 Arm_input_section(const Arm_input_section
&);
1218 Arm_input_section
& operator=(const Arm_input_section
&);
1220 // Address alignment of the original input section.
1221 uint32_t original_addralign_
;
1222 // Section size of the original input section.
1223 uint32_t original_size_
;
1225 Stub_table
<big_endian
>* stub_table_
;
1228 // Arm_exidx_fixup class. This is used to define a number of methods
1229 // and keep states for fixing up EXIDX coverage.
1231 class Arm_exidx_fixup
1234 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1235 bool merge_exidx_entries
= true)
1236 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1237 last_inlined_entry_(0), last_input_section_(NULL
),
1238 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1239 merge_exidx_entries_(merge_exidx_entries
)
1243 { delete this->section_offset_map_
; }
1245 // Process an EXIDX section for entry merging. Return number of bytes to
1246 // be deleted in output. If parts of the input EXIDX section are merged
1247 // a heap allocated Arm_exidx_section_offset_map is store in the located
1248 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1250 template<bool big_endian
>
1252 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1253 Arm_exidx_section_offset_map
** psection_offset_map
);
1255 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1256 // input section, if there is not one already.
1258 add_exidx_cantunwind_as_needed();
1260 // Return the output section for the text section which is linked to the
1261 // first exidx input in output.
1263 first_output_text_section() const
1264 { return this->first_output_text_section_
; }
1267 // Copying is not allowed.
1268 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1269 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1271 // Type of EXIDX unwind entry.
1276 // EXIDX_CANTUNWIND.
1277 UT_EXIDX_CANTUNWIND
,
1284 // Process an EXIDX entry. We only care about the second word of the
1285 // entry. Return true if the entry can be deleted.
1287 process_exidx_entry(uint32_t second_word
);
1289 // Update the current section offset map during EXIDX section fix-up.
1290 // If there is no map, create one. INPUT_OFFSET is the offset of a
1291 // reference point, DELETED_BYTES is the number of deleted by in the
1292 // section so far. If DELETE_ENTRY is true, the reference point and
1293 // all offsets after the previous reference point are discarded.
1295 update_offset_map(section_offset_type input_offset
,
1296 section_size_type deleted_bytes
, bool delete_entry
);
1298 // EXIDX output section.
1299 Output_section
* exidx_output_section_
;
1300 // Unwind type of the last EXIDX entry processed.
1301 Unwind_type last_unwind_type_
;
1302 // Last seen inlined EXIDX entry.
1303 uint32_t last_inlined_entry_
;
1304 // Last processed EXIDX input section.
1305 const Arm_exidx_input_section
* last_input_section_
;
1306 // Section offset map created in process_exidx_section.
1307 Arm_exidx_section_offset_map
* section_offset_map_
;
1308 // Output section for the text section which is linked to the first exidx
1310 Output_section
* first_output_text_section_
;
1312 bool merge_exidx_entries_
;
1315 // Arm output section class. This is defined mainly to add a number of
1316 // stub generation methods.
1318 template<bool big_endian
>
1319 class Arm_output_section
: public Output_section
1322 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1324 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1325 elfcpp::Elf_Xword flags
)
1326 : Output_section(name
, type
, flags
)
1329 ~Arm_output_section()
1332 // Group input sections for stub generation.
1334 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*);
1336 // Downcast a base pointer to an Arm_output_section pointer. This is
1337 // not type-safe but we only use Arm_output_section not the base class.
1338 static Arm_output_section
<big_endian
>*
1339 as_arm_output_section(Output_section
* os
)
1340 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1342 // Append all input text sections in this into LIST.
1344 append_text_sections_to_list(Text_section_list
* list
);
1346 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1347 // is a list of text input sections sorted in ascending order of their
1348 // output addresses.
1350 fix_exidx_coverage(Layout
* layout
,
1351 const Text_section_list
& sorted_text_section
,
1352 Symbol_table
* symtab
,
1353 bool merge_exidx_entries
);
1357 typedef Output_section::Input_section Input_section
;
1358 typedef Output_section::Input_section_list Input_section_list
;
1360 // Create a stub group.
1361 void create_stub_group(Input_section_list::const_iterator
,
1362 Input_section_list::const_iterator
,
1363 Input_section_list::const_iterator
,
1364 Target_arm
<big_endian
>*,
1365 std::vector
<Output_relaxed_input_section
*>*);
1368 // Arm_exidx_input_section class. This represents an EXIDX input section.
1370 class Arm_exidx_input_section
1373 static const section_offset_type invalid_offset
=
1374 static_cast<section_offset_type
>(-1);
1376 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1377 unsigned int link
, uint32_t size
, uint32_t addralign
)
1378 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1379 addralign_(addralign
)
1382 ~Arm_exidx_input_section()
1385 // Accessors: This is a read-only class.
1387 // Return the object containing this EXIDX input section.
1390 { return this->relobj_
; }
1392 // Return the section index of this EXIDX input section.
1395 { return this->shndx_
; }
1397 // Return the section index of linked text section in the same object.
1400 { return this->link_
; }
1402 // Return size of the EXIDX input section.
1405 { return this->size_
; }
1407 // Reutnr address alignment of EXIDX input section.
1410 { return this->addralign_
; }
1413 // Object containing this.
1415 // Section index of this.
1416 unsigned int shndx_
;
1417 // text section linked to this in the same object.
1419 // Size of this. For ARM 32-bit is sufficient.
1421 // Address alignment of this. For ARM 32-bit is sufficient.
1422 uint32_t addralign_
;
1425 // Arm_relobj class.
1427 template<bool big_endian
>
1428 class Arm_relobj
: public Sized_relobj
<32, big_endian
>
1431 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1433 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1434 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1435 : Sized_relobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1436 stub_tables_(), local_symbol_is_thumb_function_(),
1437 attributes_section_data_(NULL
), mapping_symbols_info_(),
1438 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1439 output_local_symbol_count_needs_update_(false),
1440 merge_flags_and_attributes_(true)
1444 { delete this->attributes_section_data_
; }
1446 // Return the stub table of the SHNDX-th section if there is one.
1447 Stub_table
<big_endian
>*
1448 stub_table(unsigned int shndx
) const
1450 gold_assert(shndx
< this->stub_tables_
.size());
1451 return this->stub_tables_
[shndx
];
1454 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1456 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1458 gold_assert(shndx
< this->stub_tables_
.size());
1459 this->stub_tables_
[shndx
] = stub_table
;
1462 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1463 // index. This is only valid after do_count_local_symbol is called.
1465 local_symbol_is_thumb_function(unsigned int r_sym
) const
1467 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1468 return this->local_symbol_is_thumb_function_
[r_sym
];
1471 // Scan all relocation sections for stub generation.
1473 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1476 // Convert regular input section with index SHNDX to a relaxed section.
1478 convert_input_section_to_relaxed_section(unsigned shndx
)
1480 // The stubs have relocations and we need to process them after writing
1481 // out the stubs. So relocation now must follow section write.
1482 this->set_section_offset(shndx
, -1ULL);
1483 this->set_relocs_must_follow_section_writes();
1486 // Downcast a base pointer to an Arm_relobj pointer. This is
1487 // not type-safe but we only use Arm_relobj not the base class.
1488 static Arm_relobj
<big_endian
>*
1489 as_arm_relobj(Relobj
* relobj
)
1490 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1492 // Processor-specific flags in ELF file header. This is valid only after
1495 processor_specific_flags() const
1496 { return this->processor_specific_flags_
; }
1498 // Attribute section data This is the contents of the .ARM.attribute section
1500 const Attributes_section_data
*
1501 attributes_section_data() const
1502 { return this->attributes_section_data_
; }
1504 // Mapping symbol location.
1505 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1507 // Functor for STL container.
1508 struct Mapping_symbol_position_less
1511 operator()(const Mapping_symbol_position
& p1
,
1512 const Mapping_symbol_position
& p2
) const
1514 return (p1
.first
< p2
.first
1515 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1519 // We only care about the first character of a mapping symbol, so
1520 // we only store that instead of the whole symbol name.
1521 typedef std::map
<Mapping_symbol_position
, char,
1522 Mapping_symbol_position_less
> Mapping_symbols_info
;
1524 // Whether a section contains any Cortex-A8 workaround.
1526 section_has_cortex_a8_workaround(unsigned int shndx
) const
1528 return (this->section_has_cortex_a8_workaround_
!= NULL
1529 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1532 // Mark a section that has Cortex-A8 workaround.
1534 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1536 if (this->section_has_cortex_a8_workaround_
== NULL
)
1537 this->section_has_cortex_a8_workaround_
=
1538 new std::vector
<bool>(this->shnum(), false);
1539 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1542 // Return the EXIDX section of an text section with index SHNDX or NULL
1543 // if the text section has no associated EXIDX section.
1544 const Arm_exidx_input_section
*
1545 exidx_input_section_by_link(unsigned int shndx
) const
1547 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1548 return ((p
!= this->exidx_section_map_
.end()
1549 && p
->second
->link() == shndx
)
1554 // Return the EXIDX section with index SHNDX or NULL if there is none.
1555 const Arm_exidx_input_section
*
1556 exidx_input_section_by_shndx(unsigned shndx
) const
1558 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1559 return ((p
!= this->exidx_section_map_
.end()
1560 && p
->second
->shndx() == shndx
)
1565 // Whether output local symbol count needs updating.
1567 output_local_symbol_count_needs_update() const
1568 { return this->output_local_symbol_count_needs_update_
; }
1570 // Set output_local_symbol_count_needs_update flag to be true.
1572 set_output_local_symbol_count_needs_update()
1573 { this->output_local_symbol_count_needs_update_
= true; }
1575 // Update output local symbol count at the end of relaxation.
1577 update_output_local_symbol_count();
1579 // Whether we want to merge processor-specific flags and attributes.
1581 merge_flags_and_attributes() const
1582 { return this->merge_flags_and_attributes_
; }
1585 // Post constructor setup.
1589 // Call parent's setup method.
1590 Sized_relobj
<32, big_endian
>::do_setup();
1592 // Initialize look-up tables.
1593 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1594 this->stub_tables_
.swap(empty_stub_table_list
);
1597 // Count the local symbols.
1599 do_count_local_symbols(Stringpool_template
<char>*,
1600 Stringpool_template
<char>*);
1603 do_relocate_sections(const Symbol_table
* symtab
, const Layout
* layout
,
1604 const unsigned char* pshdrs
,
1605 typename Sized_relobj
<32, big_endian
>::Views
* pivews
);
1607 // Read the symbol information.
1609 do_read_symbols(Read_symbols_data
* sd
);
1611 // Process relocs for garbage collection.
1613 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1617 // Whether a section needs to be scanned for relocation stubs.
1619 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1620 const Relobj::Output_sections
&,
1621 const Symbol_table
*, const unsigned char*);
1623 // Whether a section is a scannable text section.
1625 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1626 const Output_section
*, const Symbol_table
*);
1628 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1630 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1631 unsigned int, Output_section
*,
1632 const Symbol_table
*);
1634 // Scan a section for the Cortex-A8 erratum.
1636 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1637 unsigned int, Output_section
*,
1638 Target_arm
<big_endian
>*);
1640 // Find the linked text section of an EXIDX section by looking at the
1641 // first reloction of the EXIDX section. PSHDR points to the section
1642 // headers of a relocation section and PSYMS points to the local symbols.
1643 // PSHNDX points to a location storing the text section index if found.
1644 // Return whether we can find the linked section.
1646 find_linked_text_section(const unsigned char* pshdr
,
1647 const unsigned char* psyms
, unsigned int* pshndx
);
1650 // Make a new Arm_exidx_input_section object for EXIDX section with
1651 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1652 // index of the linked text section.
1654 make_exidx_input_section(unsigned int shndx
,
1655 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1656 unsigned int text_shndx
);
1658 // Return the output address of either a plain input section or a
1659 // relaxed input section. SHNDX is the section index.
1661 simple_input_section_output_address(unsigned int, Output_section
*);
1663 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1664 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1667 // List of stub tables.
1668 Stub_table_list stub_tables_
;
1669 // Bit vector to tell if a local symbol is a thumb function or not.
1670 // This is only valid after do_count_local_symbol is called.
1671 std::vector
<bool> local_symbol_is_thumb_function_
;
1672 // processor-specific flags in ELF file header.
1673 elfcpp::Elf_Word processor_specific_flags_
;
1674 // Object attributes if there is an .ARM.attributes section or NULL.
1675 Attributes_section_data
* attributes_section_data_
;
1676 // Mapping symbols information.
1677 Mapping_symbols_info mapping_symbols_info_
;
1678 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1679 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1680 // Map a text section to its associated .ARM.exidx section, if there is one.
1681 Exidx_section_map exidx_section_map_
;
1682 // Whether output local symbol count needs updating.
1683 bool output_local_symbol_count_needs_update_
;
1684 // Whether we merge processor flags and attributes of this object to
1686 bool merge_flags_and_attributes_
;
1689 // Arm_dynobj class.
1691 template<bool big_endian
>
1692 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1695 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1696 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1697 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1698 processor_specific_flags_(0), attributes_section_data_(NULL
)
1702 { delete this->attributes_section_data_
; }
1704 // Downcast a base pointer to an Arm_relobj pointer. This is
1705 // not type-safe but we only use Arm_relobj not the base class.
1706 static Arm_dynobj
<big_endian
>*
1707 as_arm_dynobj(Dynobj
* dynobj
)
1708 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1710 // Processor-specific flags in ELF file header. This is valid only after
1713 processor_specific_flags() const
1714 { return this->processor_specific_flags_
; }
1716 // Attributes section data.
1717 const Attributes_section_data
*
1718 attributes_section_data() const
1719 { return this->attributes_section_data_
; }
1722 // Read the symbol information.
1724 do_read_symbols(Read_symbols_data
* sd
);
1727 // processor-specific flags in ELF file header.
1728 elfcpp::Elf_Word processor_specific_flags_
;
1729 // Object attributes if there is an .ARM.attributes section or NULL.
1730 Attributes_section_data
* attributes_section_data_
;
1733 // Functor to read reloc addends during stub generation.
1735 template<int sh_type
, bool big_endian
>
1736 struct Stub_addend_reader
1738 // Return the addend for a relocation of a particular type. Depending
1739 // on whether this is a REL or RELA relocation, read the addend from a
1740 // view or from a Reloc object.
1741 elfcpp::Elf_types
<32>::Elf_Swxword
1743 unsigned int /* r_type */,
1744 const unsigned char* /* view */,
1745 const typename Reloc_types
<sh_type
,
1746 32, big_endian
>::Reloc
& /* reloc */) const;
1749 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1751 template<bool big_endian
>
1752 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1754 elfcpp::Elf_types
<32>::Elf_Swxword
1757 const unsigned char*,
1758 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1761 // Specialized Stub_addend_reader for RELA type relocation sections.
1762 // We currently do not handle RELA type relocation sections but it is trivial
1763 // to implement the addend reader. This is provided for completeness and to
1764 // make it easier to add support for RELA relocation sections in the future.
1766 template<bool big_endian
>
1767 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1769 elfcpp::Elf_types
<32>::Elf_Swxword
1772 const unsigned char*,
1773 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1774 big_endian
>::Reloc
& reloc
) const
1775 { return reloc
.get_r_addend(); }
1778 // Cortex_a8_reloc class. We keep record of relocation that may need
1779 // the Cortex-A8 erratum workaround.
1781 class Cortex_a8_reloc
1784 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1785 Arm_address destination
)
1786 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1792 // Accessors: This is a read-only class.
1794 // Return the relocation stub associated with this relocation if there is
1798 { return this->reloc_stub_
; }
1800 // Return the relocation type.
1803 { return this->r_type_
; }
1805 // Return the destination address of the relocation. LSB stores the THUMB
1809 { return this->destination_
; }
1812 // Associated relocation stub if there is one, or NULL.
1813 const Reloc_stub
* reloc_stub_
;
1815 unsigned int r_type_
;
1816 // Destination address of this relocation. LSB is used to distinguish
1818 Arm_address destination_
;
1821 // Arm_output_data_got class. We derive this from Output_data_got to add
1822 // extra methods to handle TLS relocations in a static link.
1824 template<bool big_endian
>
1825 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1828 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1829 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1832 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1833 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1834 // applied in a static link.
1836 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1837 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1839 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1840 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1841 // relocation that needs to be applied in a static link.
1843 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1844 Sized_relobj
<32, big_endian
>* relobj
, unsigned int index
)
1846 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1850 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1851 // The first one is initialized to be 1, which is the module index for
1852 // the main executable and the second one 0. A reloc of the type
1853 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1854 // be applied by gold. GSYM is a global symbol.
1856 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1858 // Same as the above but for a local symbol in OBJECT with INDEX.
1860 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1861 Sized_relobj
<32, big_endian
>* object
,
1862 unsigned int index
);
1865 // Write out the GOT table.
1867 do_write(Output_file
*);
1870 // This class represent dynamic relocations that need to be applied by
1871 // gold because we are using TLS relocations in a static link.
1875 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1876 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1877 { this->u_
.global
.symbol
= gsym
; }
1879 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1880 Sized_relobj
<32, big_endian
>* relobj
, unsigned int index
)
1881 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1883 this->u_
.local
.relobj
= relobj
;
1884 this->u_
.local
.index
= index
;
1887 // Return the GOT offset.
1890 { return this->got_offset_
; }
1895 { return this->r_type_
; }
1897 // Whether the symbol is global or not.
1899 symbol_is_global() const
1900 { return this->symbol_is_global_
; }
1902 // For a relocation against a global symbol, the global symbol.
1906 gold_assert(this->symbol_is_global_
);
1907 return this->u_
.global
.symbol
;
1910 // For a relocation against a local symbol, the defining object.
1911 Sized_relobj
<32, big_endian
>*
1914 gold_assert(!this->symbol_is_global_
);
1915 return this->u_
.local
.relobj
;
1918 // For a relocation against a local symbol, the local symbol index.
1922 gold_assert(!this->symbol_is_global_
);
1923 return this->u_
.local
.index
;
1927 // GOT offset of the entry to which this relocation is applied.
1928 unsigned int got_offset_
;
1929 // Type of relocation.
1930 unsigned int r_type_
;
1931 // Whether this relocation is against a global symbol.
1932 bool symbol_is_global_
;
1933 // A global or local symbol.
1938 // For a global symbol, the symbol itself.
1943 // For a local symbol, the object defining object.
1944 Sized_relobj
<32, big_endian
>* relobj
;
1945 // For a local symbol, the symbol index.
1951 // Symbol table of the output object.
1952 Symbol_table
* symbol_table_
;
1953 // Layout of the output object.
1955 // Static relocs to be applied to the GOT.
1956 std::vector
<Static_reloc
> static_relocs_
;
1959 // The ARM target has many relocation types with odd-sizes or incontigious
1960 // bits. The default handling of relocatable relocation cannot process these
1961 // relocations. So we have to extend the default code.
1963 template<bool big_endian
, int sh_type
, typename Classify_reloc
>
1964 class Arm_scan_relocatable_relocs
:
1965 public Default_scan_relocatable_relocs
<sh_type
, Classify_reloc
>
1968 // Return the strategy to use for a local symbol which is a section
1969 // symbol, given the relocation type.
1970 inline Relocatable_relocs::Reloc_strategy
1971 local_section_strategy(unsigned int r_type
, Relobj
*)
1973 if (sh_type
== elfcpp::SHT_RELA
)
1974 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
1977 if (r_type
== elfcpp::R_ARM_TARGET1
1978 || r_type
== elfcpp::R_ARM_TARGET2
)
1980 const Target_arm
<big_endian
>* arm_target
=
1981 Target_arm
<big_endian
>::default_target();
1982 r_type
= arm_target
->get_real_reloc_type(r_type
);
1987 // Relocations that write nothing. These exclude R_ARM_TARGET1
1988 // and R_ARM_TARGET2.
1989 case elfcpp::R_ARM_NONE
:
1990 case elfcpp::R_ARM_V4BX
:
1991 case elfcpp::R_ARM_TLS_GOTDESC
:
1992 case elfcpp::R_ARM_TLS_CALL
:
1993 case elfcpp::R_ARM_TLS_DESCSEQ
:
1994 case elfcpp::R_ARM_THM_TLS_CALL
:
1995 case elfcpp::R_ARM_GOTRELAX
:
1996 case elfcpp::R_ARM_GNU_VTENTRY
:
1997 case elfcpp::R_ARM_GNU_VTINHERIT
:
1998 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
1999 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2000 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2001 // These should have been converted to something else above.
2002 case elfcpp::R_ARM_TARGET1
:
2003 case elfcpp::R_ARM_TARGET2
:
2005 // Relocations that write full 32 bits.
2006 case elfcpp::R_ARM_ABS32
:
2007 case elfcpp::R_ARM_REL32
:
2008 case elfcpp::R_ARM_SBREL32
:
2009 case elfcpp::R_ARM_GOTOFF32
:
2010 case elfcpp::R_ARM_BASE_PREL
:
2011 case elfcpp::R_ARM_GOT_BREL
:
2012 case elfcpp::R_ARM_BASE_ABS
:
2013 case elfcpp::R_ARM_ABS32_NOI
:
2014 case elfcpp::R_ARM_REL32_NOI
:
2015 case elfcpp::R_ARM_PLT32_ABS
:
2016 case elfcpp::R_ARM_GOT_ABS
:
2017 case elfcpp::R_ARM_GOT_PREL
:
2018 case elfcpp::R_ARM_TLS_GD32
:
2019 case elfcpp::R_ARM_TLS_LDM32
:
2020 case elfcpp::R_ARM_TLS_LDO32
:
2021 case elfcpp::R_ARM_TLS_IE32
:
2022 case elfcpp::R_ARM_TLS_LE32
:
2023 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4
;
2025 // For all other static relocations, return RELOC_SPECIAL.
2026 return Relocatable_relocs::RELOC_SPECIAL
;
2032 // Utilities for manipulating integers of up to 32-bits
2036 // Sign extend an n-bit unsigned integer stored in an uint32_t into
2037 // an int32_t. NO_BITS must be between 1 to 32.
2038 template<int no_bits
>
2039 static inline int32_t
2040 sign_extend(uint32_t bits
)
2042 gold_assert(no_bits
>= 0 && no_bits
<= 32);
2044 return static_cast<int32_t>(bits
);
2045 uint32_t mask
= (~((uint32_t) 0)) >> (32 - no_bits
);
2047 uint32_t top_bit
= 1U << (no_bits
- 1);
2048 int32_t as_signed
= static_cast<int32_t>(bits
);
2049 return (bits
& top_bit
) ? as_signed
+ (-top_bit
* 2) : as_signed
;
2052 // Detects overflow of an NO_BITS integer stored in a uint32_t.
2053 template<int no_bits
>
2055 has_overflow(uint32_t bits
)
2057 gold_assert(no_bits
>= 0 && no_bits
<= 32);
2060 int32_t max
= (1 << (no_bits
- 1)) - 1;
2061 int32_t min
= -(1 << (no_bits
- 1));
2062 int32_t as_signed
= static_cast<int32_t>(bits
);
2063 return as_signed
> max
|| as_signed
< min
;
2066 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
2067 // fits in the given number of bits as either a signed or unsigned value.
2068 // For example, has_signed_unsigned_overflow<8> would check
2069 // -128 <= bits <= 255
2070 template<int no_bits
>
2072 has_signed_unsigned_overflow(uint32_t bits
)
2074 gold_assert(no_bits
>= 2 && no_bits
<= 32);
2077 int32_t max
= static_cast<int32_t>((1U << no_bits
) - 1);
2078 int32_t min
= -(1 << (no_bits
- 1));
2079 int32_t as_signed
= static_cast<int32_t>(bits
);
2080 return as_signed
> max
|| as_signed
< min
;
2083 // Select bits from A and B using bits in MASK. For each n in [0..31],
2084 // the n-th bit in the result is chosen from the n-th bits of A and B.
2085 // A zero selects A and a one selects B.
2086 static inline uint32_t
2087 bit_select(uint32_t a
, uint32_t b
, uint32_t mask
)
2088 { return (a
& ~mask
) | (b
& mask
); }
2091 template<bool big_endian
>
2092 class Target_arm
: public Sized_target
<32, big_endian
>
2095 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2098 // When were are relocating a stub, we pass this as the relocation number.
2099 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2102 : Sized_target
<32, big_endian
>(&arm_info
),
2103 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
2104 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
),
2105 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2106 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2107 may_use_blx_(false), should_force_pic_veneer_(false),
2108 arm_input_section_map_(), attributes_section_data_(NULL
),
2109 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2112 // Whether we can use BLX.
2115 { return this->may_use_blx_
; }
2117 // Set use-BLX flag.
2119 set_may_use_blx(bool value
)
2120 { this->may_use_blx_
= value
; }
2122 // Whether we force PCI branch veneers.
2124 should_force_pic_veneer() const
2125 { return this->should_force_pic_veneer_
; }
2127 // Set PIC veneer flag.
2129 set_should_force_pic_veneer(bool value
)
2130 { this->should_force_pic_veneer_
= value
; }
2132 // Whether we use THUMB-2 instructions.
2134 using_thumb2() const
2136 Object_attribute
* attr
=
2137 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2138 int arch
= attr
->int_value();
2139 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2142 // Whether we use THUMB/THUMB-2 instructions only.
2144 using_thumb_only() const
2146 Object_attribute
* attr
=
2147 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2149 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2150 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2152 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2153 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2155 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2156 return attr
->int_value() == 'M';
2159 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2161 may_use_arm_nop() const
2163 Object_attribute
* attr
=
2164 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2165 int arch
= attr
->int_value();
2166 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2167 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2168 || arch
== elfcpp::TAG_CPU_ARCH_V7
2169 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2172 // Whether we have THUMB-2 NOP.W instruction.
2174 may_use_thumb2_nop() const
2176 Object_attribute
* attr
=
2177 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2178 int arch
= attr
->int_value();
2179 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2180 || arch
== elfcpp::TAG_CPU_ARCH_V7
2181 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2184 // Process the relocations to determine unreferenced sections for
2185 // garbage collection.
2187 gc_process_relocs(Symbol_table
* symtab
,
2189 Sized_relobj
<32, big_endian
>* object
,
2190 unsigned int data_shndx
,
2191 unsigned int sh_type
,
2192 const unsigned char* prelocs
,
2194 Output_section
* output_section
,
2195 bool needs_special_offset_handling
,
2196 size_t local_symbol_count
,
2197 const unsigned char* plocal_symbols
);
2199 // Scan the relocations to look for symbol adjustments.
2201 scan_relocs(Symbol_table
* symtab
,
2203 Sized_relobj
<32, big_endian
>* object
,
2204 unsigned int data_shndx
,
2205 unsigned int sh_type
,
2206 const unsigned char* prelocs
,
2208 Output_section
* output_section
,
2209 bool needs_special_offset_handling
,
2210 size_t local_symbol_count
,
2211 const unsigned char* plocal_symbols
);
2213 // Finalize the sections.
2215 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2217 // Return the value to use for a dynamic symbol which requires special
2220 do_dynsym_value(const Symbol
*) const;
2222 // Relocate a section.
2224 relocate_section(const Relocate_info
<32, big_endian
>*,
2225 unsigned int sh_type
,
2226 const unsigned char* prelocs
,
2228 Output_section
* output_section
,
2229 bool needs_special_offset_handling
,
2230 unsigned char* view
,
2231 Arm_address view_address
,
2232 section_size_type view_size
,
2233 const Reloc_symbol_changes
*);
2235 // Scan the relocs during a relocatable link.
2237 scan_relocatable_relocs(Symbol_table
* symtab
,
2239 Sized_relobj
<32, big_endian
>* object
,
2240 unsigned int data_shndx
,
2241 unsigned int sh_type
,
2242 const unsigned char* prelocs
,
2244 Output_section
* output_section
,
2245 bool needs_special_offset_handling
,
2246 size_t local_symbol_count
,
2247 const unsigned char* plocal_symbols
,
2248 Relocatable_relocs
*);
2250 // Relocate a section during a relocatable link.
2252 relocate_for_relocatable(const Relocate_info
<32, big_endian
>*,
2253 unsigned int sh_type
,
2254 const unsigned char* prelocs
,
2256 Output_section
* output_section
,
2257 off_t offset_in_output_section
,
2258 const Relocatable_relocs
*,
2259 unsigned char* view
,
2260 Arm_address view_address
,
2261 section_size_type view_size
,
2262 unsigned char* reloc_view
,
2263 section_size_type reloc_view_size
);
2265 // Perform target-specific processing in a relocatable link. This is
2266 // only used if we use the relocation strategy RELOC_SPECIAL.
2268 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2269 unsigned int sh_type
,
2270 const unsigned char* preloc_in
,
2272 Output_section
* output_section
,
2273 off_t offset_in_output_section
,
2274 unsigned char* view
,
2275 typename
elfcpp::Elf_types
<32>::Elf_Addr
2277 section_size_type view_size
,
2278 unsigned char* preloc_out
);
2280 // Return whether SYM is defined by the ABI.
2282 do_is_defined_by_abi(Symbol
* sym
) const
2283 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2285 // Return whether there is a GOT section.
2287 has_got_section() const
2288 { return this->got_
!= NULL
; }
2290 // Return the size of the GOT section.
2294 gold_assert(this->got_
!= NULL
);
2295 return this->got_
->data_size();
2298 // Map platform-specific reloc types
2300 get_real_reloc_type (unsigned int r_type
);
2303 // Methods to support stub-generations.
2306 // Return the stub factory
2308 stub_factory() const
2309 { return this->stub_factory_
; }
2311 // Make a new Arm_input_section object.
2312 Arm_input_section
<big_endian
>*
2313 new_arm_input_section(Relobj
*, unsigned int);
2315 // Find the Arm_input_section object corresponding to the SHNDX-th input
2316 // section of RELOBJ.
2317 Arm_input_section
<big_endian
>*
2318 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2320 // Make a new Stub_table
2321 Stub_table
<big_endian
>*
2322 new_stub_table(Arm_input_section
<big_endian
>*);
2324 // Scan a section for stub generation.
2326 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2327 const unsigned char*, size_t, Output_section
*,
2328 bool, const unsigned char*, Arm_address
,
2333 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2334 Output_section
*, unsigned char*, Arm_address
,
2337 // Get the default ARM target.
2338 static Target_arm
<big_endian
>*
2341 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2342 && parameters
->target().is_big_endian() == big_endian
);
2343 return static_cast<Target_arm
<big_endian
>*>(
2344 parameters
->sized_target
<32, big_endian
>());
2347 // Whether NAME belongs to a mapping symbol.
2349 is_mapping_symbol_name(const char* name
)
2353 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2354 && (name
[2] == '\0' || name
[2] == '.'));
2357 // Whether we work around the Cortex-A8 erratum.
2359 fix_cortex_a8() const
2360 { return this->fix_cortex_a8_
; }
2362 // Whether we merge exidx entries in debuginfo.
2364 merge_exidx_entries() const
2365 { return parameters
->options().merge_exidx_entries(); }
2367 // Whether we fix R_ARM_V4BX relocation.
2369 // 1 - replace with MOV instruction (armv4 target)
2370 // 2 - make interworking veneer (>= armv4t targets only)
2371 General_options::Fix_v4bx
2373 { return parameters
->options().fix_v4bx(); }
2375 // Scan a span of THUMB code section for Cortex-A8 erratum.
2377 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2378 section_size_type
, section_size_type
,
2379 const unsigned char*, Arm_address
);
2381 // Apply Cortex-A8 workaround to a branch.
2383 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2384 unsigned char*, Arm_address
);
2387 // Make an ELF object.
2389 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2390 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2393 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2394 const elfcpp::Ehdr
<32, !big_endian
>&)
2395 { gold_unreachable(); }
2398 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2399 const elfcpp::Ehdr
<64, false>&)
2400 { gold_unreachable(); }
2403 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2404 const elfcpp::Ehdr
<64, true>&)
2405 { gold_unreachable(); }
2407 // Make an output section.
2409 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2410 elfcpp::Elf_Xword flags
)
2411 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2414 do_adjust_elf_header(unsigned char* view
, int len
) const;
2416 // We only need to generate stubs, and hence perform relaxation if we are
2417 // not doing relocatable linking.
2419 do_may_relax() const
2420 { return !parameters
->options().relocatable(); }
2423 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*);
2425 // Determine whether an object attribute tag takes an integer, a
2428 do_attribute_arg_type(int tag
) const;
2430 // Reorder tags during output.
2432 do_attributes_order(int num
) const;
2434 // This is called when the target is selected as the default.
2436 do_select_as_default_target()
2438 // No locking is required since there should only be one default target.
2439 // We cannot have both the big-endian and little-endian ARM targets
2441 gold_assert(arm_reloc_property_table
== NULL
);
2442 arm_reloc_property_table
= new Arm_reloc_property_table();
2446 // The class which scans relocations.
2451 : issued_non_pic_error_(false)
2455 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2456 Sized_relobj
<32, big_endian
>* object
,
2457 unsigned int data_shndx
,
2458 Output_section
* output_section
,
2459 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2460 const elfcpp::Sym
<32, big_endian
>& lsym
);
2463 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2464 Sized_relobj
<32, big_endian
>* object
,
2465 unsigned int data_shndx
,
2466 Output_section
* output_section
,
2467 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2471 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2472 Sized_relobj
<32, big_endian
>* ,
2475 const elfcpp::Rel
<32, big_endian
>& ,
2477 const elfcpp::Sym
<32, big_endian
>&)
2481 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2482 Sized_relobj
<32, big_endian
>* ,
2485 const elfcpp::Rel
<32, big_endian
>& ,
2486 unsigned int , Symbol
*)
2491 unsupported_reloc_local(Sized_relobj
<32, big_endian
>*,
2492 unsigned int r_type
);
2495 unsupported_reloc_global(Sized_relobj
<32, big_endian
>*,
2496 unsigned int r_type
, Symbol
*);
2499 check_non_pic(Relobj
*, unsigned int r_type
);
2501 // Almost identical to Symbol::needs_plt_entry except that it also
2502 // handles STT_ARM_TFUNC.
2504 symbol_needs_plt_entry(const Symbol
* sym
)
2506 // An undefined symbol from an executable does not need a PLT entry.
2507 if (sym
->is_undefined() && !parameters
->options().shared())
2510 return (!parameters
->doing_static_link()
2511 && (sym
->type() == elfcpp::STT_FUNC
2512 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2513 && (sym
->is_from_dynobj()
2514 || sym
->is_undefined()
2515 || sym
->is_preemptible()));
2518 // Whether we have issued an error about a non-PIC compilation.
2519 bool issued_non_pic_error_
;
2522 // The class which implements relocation.
2532 // Return whether the static relocation needs to be applied.
2534 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2537 Output_section
* output_section
);
2539 // Do a relocation. Return false if the caller should not issue
2540 // any warnings about this relocation.
2542 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2543 Output_section
*, size_t relnum
,
2544 const elfcpp::Rel
<32, big_endian
>&,
2545 unsigned int r_type
, const Sized_symbol
<32>*,
2546 const Symbol_value
<32>*,
2547 unsigned char*, Arm_address
,
2550 // Return whether we want to pass flag NON_PIC_REF for this
2551 // reloc. This means the relocation type accesses a symbol not via
2554 reloc_is_non_pic (unsigned int r_type
)
2558 // These relocation types reference GOT or PLT entries explicitly.
2559 case elfcpp::R_ARM_GOT_BREL
:
2560 case elfcpp::R_ARM_GOT_ABS
:
2561 case elfcpp::R_ARM_GOT_PREL
:
2562 case elfcpp::R_ARM_GOT_BREL12
:
2563 case elfcpp::R_ARM_PLT32_ABS
:
2564 case elfcpp::R_ARM_TLS_GD32
:
2565 case elfcpp::R_ARM_TLS_LDM32
:
2566 case elfcpp::R_ARM_TLS_IE32
:
2567 case elfcpp::R_ARM_TLS_IE12GP
:
2569 // These relocate types may use PLT entries.
2570 case elfcpp::R_ARM_CALL
:
2571 case elfcpp::R_ARM_THM_CALL
:
2572 case elfcpp::R_ARM_JUMP24
:
2573 case elfcpp::R_ARM_THM_JUMP24
:
2574 case elfcpp::R_ARM_THM_JUMP19
:
2575 case elfcpp::R_ARM_PLT32
:
2576 case elfcpp::R_ARM_THM_XPC22
:
2577 case elfcpp::R_ARM_PREL31
:
2578 case elfcpp::R_ARM_SBREL31
:
2587 // Do a TLS relocation.
2588 inline typename Arm_relocate_functions
<big_endian
>::Status
2589 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2590 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2591 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2592 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2597 // A class which returns the size required for a relocation type,
2598 // used while scanning relocs during a relocatable link.
2599 class Relocatable_size_for_reloc
2603 get_size_for_reloc(unsigned int, Relobj
*);
2606 // Adjust TLS relocation type based on the options and whether this
2607 // is a local symbol.
2608 static tls::Tls_optimization
2609 optimize_tls_reloc(bool is_final
, int r_type
);
2611 // Get the GOT section, creating it if necessary.
2612 Arm_output_data_got
<big_endian
>*
2613 got_section(Symbol_table
*, Layout
*);
2615 // Get the GOT PLT section.
2617 got_plt_section() const
2619 gold_assert(this->got_plt_
!= NULL
);
2620 return this->got_plt_
;
2623 // Create a PLT entry for a global symbol.
2625 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2627 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2629 define_tls_base_symbol(Symbol_table
*, Layout
*);
2631 // Create a GOT entry for the TLS module index.
2633 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2634 Sized_relobj
<32, big_endian
>* object
);
2636 // Get the PLT section.
2637 const Output_data_plt_arm
<big_endian
>*
2640 gold_assert(this->plt_
!= NULL
);
2644 // Get the dynamic reloc section, creating it if necessary.
2646 rel_dyn_section(Layout
*);
2648 // Get the section to use for TLS_DESC relocations.
2650 rel_tls_desc_section(Layout
*) const;
2652 // Return true if the symbol may need a COPY relocation.
2653 // References from an executable object to non-function symbols
2654 // defined in a dynamic object may need a COPY relocation.
2656 may_need_copy_reloc(Symbol
* gsym
)
2658 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2659 && gsym
->may_need_copy_reloc());
2662 // Add a potential copy relocation.
2664 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2665 Sized_relobj
<32, big_endian
>* object
,
2666 unsigned int shndx
, Output_section
* output_section
,
2667 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2669 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2670 symtab
->get_sized_symbol
<32>(sym
),
2671 object
, shndx
, output_section
, reloc
,
2672 this->rel_dyn_section(layout
));
2675 // Whether two EABI versions are compatible.
2677 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2679 // Merge processor-specific flags from input object and those in the ELF
2680 // header of the output.
2682 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2684 // Get the secondary compatible architecture.
2686 get_secondary_compatible_arch(const Attributes_section_data
*);
2688 // Set the secondary compatible architecture.
2690 set_secondary_compatible_arch(Attributes_section_data
*, int);
2693 tag_cpu_arch_combine(const char*, int, int*, int, int);
2695 // Helper to print AEABI enum tag value.
2697 aeabi_enum_name(unsigned int);
2699 // Return string value for TAG_CPU_name.
2701 tag_cpu_name_value(unsigned int);
2703 // Merge object attributes from input object and those in the output.
2705 merge_object_attributes(const char*, const Attributes_section_data
*);
2707 // Helper to get an AEABI object attribute
2709 get_aeabi_object_attribute(int tag
) const
2711 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2712 gold_assert(pasd
!= NULL
);
2713 Object_attribute
* attr
=
2714 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2715 gold_assert(attr
!= NULL
);
2720 // Methods to support stub-generations.
2723 // Group input sections for stub generation.
2725 group_sections(Layout
*, section_size_type
, bool);
2727 // Scan a relocation for stub generation.
2729 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2730 const Sized_symbol
<32>*, unsigned int,
2731 const Symbol_value
<32>*,
2732 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2734 // Scan a relocation section for stub.
2735 template<int sh_type
>
2737 scan_reloc_section_for_stubs(
2738 const Relocate_info
<32, big_endian
>* relinfo
,
2739 const unsigned char* prelocs
,
2741 Output_section
* output_section
,
2742 bool needs_special_offset_handling
,
2743 const unsigned char* view
,
2744 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2747 // Fix .ARM.exidx section coverage.
2749 fix_exidx_coverage(Layout
*, Arm_output_section
<big_endian
>*, Symbol_table
*);
2751 // Functors for STL set.
2752 struct output_section_address_less_than
2755 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2756 { return s1
->address() < s2
->address(); }
2759 // Information about this specific target which we pass to the
2760 // general Target structure.
2761 static const Target::Target_info arm_info
;
2763 // The types of GOT entries needed for this platform.
2766 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2767 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2768 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2769 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2770 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2773 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2775 // Map input section to Arm_input_section.
2776 typedef Unordered_map
<Section_id
,
2777 Arm_input_section
<big_endian
>*,
2779 Arm_input_section_map
;
2781 // Map output addresses to relocs for Cortex-A8 erratum.
2782 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2783 Cortex_a8_relocs_info
;
2786 Arm_output_data_got
<big_endian
>* got_
;
2788 Output_data_plt_arm
<big_endian
>* plt_
;
2789 // The GOT PLT section.
2790 Output_data_space
* got_plt_
;
2791 // The dynamic reloc section.
2792 Reloc_section
* rel_dyn_
;
2793 // Relocs saved to avoid a COPY reloc.
2794 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2795 // Space for variables copied with a COPY reloc.
2796 Output_data_space
* dynbss_
;
2797 // Offset of the GOT entry for the TLS module index.
2798 unsigned int got_mod_index_offset_
;
2799 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2800 bool tls_base_symbol_defined_
;
2801 // Vector of Stub_tables created.
2802 Stub_table_list stub_tables_
;
2804 const Stub_factory
&stub_factory_
;
2805 // Whether we can use BLX.
2807 // Whether we force PIC branch veneers.
2808 bool should_force_pic_veneer_
;
2809 // Map for locating Arm_input_sections.
2810 Arm_input_section_map arm_input_section_map_
;
2811 // Attributes section data in output.
2812 Attributes_section_data
* attributes_section_data_
;
2813 // Whether we want to fix code for Cortex-A8 erratum.
2814 bool fix_cortex_a8_
;
2815 // Map addresses to relocs for Cortex-A8 erratum.
2816 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2819 template<bool big_endian
>
2820 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2823 big_endian
, // is_big_endian
2824 elfcpp::EM_ARM
, // machine_code
2825 false, // has_make_symbol
2826 false, // has_resolve
2827 false, // has_code_fill
2828 true, // is_default_stack_executable
2830 "/usr/lib/libc.so.1", // dynamic_linker
2831 0x8000, // default_text_segment_address
2832 0x1000, // abi_pagesize (overridable by -z max-page-size)
2833 0x1000, // common_pagesize (overridable by -z common-page-size)
2834 elfcpp::SHN_UNDEF
, // small_common_shndx
2835 elfcpp::SHN_UNDEF
, // large_common_shndx
2836 0, // small_common_section_flags
2837 0, // large_common_section_flags
2838 ".ARM.attributes", // attributes_section
2839 "aeabi" // attributes_vendor
2842 // Arm relocate functions class
2845 template<bool big_endian
>
2846 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2851 STATUS_OKAY
, // No error during relocation.
2852 STATUS_OVERFLOW
, // Relocation oveflow.
2853 STATUS_BAD_RELOC
// Relocation cannot be applied.
2857 typedef Relocate_functions
<32, big_endian
> Base
;
2858 typedef Arm_relocate_functions
<big_endian
> This
;
2860 // Encoding of imm16 argument for movt and movw ARM instructions
2863 // imm16 := imm4 | imm12
2865 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2866 // +-------+---------------+-------+-------+-----------------------+
2867 // | | |imm4 | |imm12 |
2868 // +-------+---------------+-------+-------+-----------------------+
2870 // Extract the relocation addend from VAL based on the ARM
2871 // instruction encoding described above.
2872 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2873 extract_arm_movw_movt_addend(
2874 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2876 // According to the Elf ABI for ARM Architecture the immediate
2877 // field is sign-extended to form the addend.
2878 return utils::sign_extend
<16>(((val
>> 4) & 0xf000) | (val
& 0xfff));
2881 // Insert X into VAL based on the ARM instruction encoding described
2883 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2884 insert_val_arm_movw_movt(
2885 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2886 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2890 val
|= (x
& 0xf000) << 4;
2894 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2897 // imm16 := imm4 | i | imm3 | imm8
2899 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2900 // +---------+-+-----------+-------++-+-----+-------+---------------+
2901 // | |i| |imm4 || |imm3 | |imm8 |
2902 // +---------+-+-----------+-------++-+-----+-------+---------------+
2904 // Extract the relocation addend from VAL based on the Thumb2
2905 // instruction encoding described above.
2906 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2907 extract_thumb_movw_movt_addend(
2908 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2910 // According to the Elf ABI for ARM Architecture the immediate
2911 // field is sign-extended to form the addend.
2912 return utils::sign_extend
<16>(((val
>> 4) & 0xf000)
2913 | ((val
>> 15) & 0x0800)
2914 | ((val
>> 4) & 0x0700)
2918 // Insert X into VAL based on the Thumb2 instruction encoding
2920 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2921 insert_val_thumb_movw_movt(
2922 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2923 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2926 val
|= (x
& 0xf000) << 4;
2927 val
|= (x
& 0x0800) << 15;
2928 val
|= (x
& 0x0700) << 4;
2929 val
|= (x
& 0x00ff);
2933 // Calculate the smallest constant Kn for the specified residual.
2934 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2936 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
2942 // Determine the most significant bit in the residual and
2943 // align the resulting value to a 2-bit boundary.
2944 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
2946 // The desired shift is now (msb - 6), or zero, whichever
2948 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
2951 // Calculate the final residual for the specified group index.
2952 // If the passed group index is less than zero, the method will return
2953 // the value of the specified residual without any change.
2954 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2955 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
2956 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
2959 for (int n
= 0; n
<= group
; n
++)
2961 // Calculate which part of the value to mask.
2962 uint32_t shift
= calc_grp_kn(residual
);
2963 // Calculate the residual for the next time around.
2964 residual
&= ~(residual
& (0xff << shift
));
2970 // Calculate the value of Gn for the specified group index.
2971 // We return it in the form of an encoded constant-and-rotation.
2972 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2973 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
2974 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
2977 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
2980 for (int n
= 0; n
<= group
; n
++)
2982 // Calculate which part of the value to mask.
2983 shift
= calc_grp_kn(residual
);
2984 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2985 gn
= residual
& (0xff << shift
);
2986 // Calculate the residual for the next time around.
2989 // Return Gn in the form of an encoded constant-and-rotation.
2990 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
2994 // Handle ARM long branches.
2995 static typename
This::Status
2996 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
2997 unsigned char *, const Sized_symbol
<32>*,
2998 const Arm_relobj
<big_endian
>*, unsigned int,
2999 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3001 // Handle THUMB long branches.
3002 static typename
This::Status
3003 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3004 unsigned char *, const Sized_symbol
<32>*,
3005 const Arm_relobj
<big_endian
>*, unsigned int,
3006 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3009 // Return the branch offset of a 32-bit THUMB branch.
3010 static inline int32_t
3011 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3013 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3014 // involving the J1 and J2 bits.
3015 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3016 uint32_t upper
= upper_insn
& 0x3ffU
;
3017 uint32_t lower
= lower_insn
& 0x7ffU
;
3018 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3019 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3020 uint32_t i1
= j1
^ s
? 0 : 1;
3021 uint32_t i2
= j2
^ s
? 0 : 1;
3023 return utils::sign_extend
<25>((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3024 | (upper
<< 12) | (lower
<< 1));
3027 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3028 // UPPER_INSN is the original upper instruction of the branch. Caller is
3029 // responsible for overflow checking and BLX offset adjustment.
3030 static inline uint16_t
3031 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3033 uint32_t s
= offset
< 0 ? 1 : 0;
3034 uint32_t bits
= static_cast<uint32_t>(offset
);
3035 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3038 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3039 // LOWER_INSN is the original lower instruction of the branch. Caller is
3040 // responsible for overflow checking and BLX offset adjustment.
3041 static inline uint16_t
3042 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3044 uint32_t s
= offset
< 0 ? 1 : 0;
3045 uint32_t bits
= static_cast<uint32_t>(offset
);
3046 return ((lower_insn
& ~0x2fffU
)
3047 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3048 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3049 | ((bits
>> 1) & 0x7ffU
));
3052 // Return the branch offset of a 32-bit THUMB conditional branch.
3053 static inline int32_t
3054 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3056 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3057 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3058 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3059 uint32_t lower
= (lower_insn
& 0x07ffU
);
3060 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3062 return utils::sign_extend
<21>((upper
<< 12) | (lower
<< 1));
3065 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3066 // instruction. UPPER_INSN is the original upper instruction of the branch.
3067 // Caller is responsible for overflow checking.
3068 static inline uint16_t
3069 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3071 uint32_t s
= offset
< 0 ? 1 : 0;
3072 uint32_t bits
= static_cast<uint32_t>(offset
);
3073 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3076 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3077 // instruction. LOWER_INSN is the original lower instruction of the branch.
3078 // Caller is reponsible for overflow checking.
3079 static inline uint16_t
3080 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3082 uint32_t bits
= static_cast<uint32_t>(offset
);
3083 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3084 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3085 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3087 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3090 // R_ARM_ABS8: S + A
3091 static inline typename
This::Status
3092 abs8(unsigned char *view
,
3093 const Sized_relobj
<32, big_endian
>* object
,
3094 const Symbol_value
<32>* psymval
)
3096 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3097 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3098 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3099 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3100 Reltype addend
= utils::sign_extend
<8>(val
);
3101 Reltype x
= psymval
->value(object
, addend
);
3102 val
= utils::bit_select(val
, x
, 0xffU
);
3103 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3105 // R_ARM_ABS8 permits signed or unsigned results.
3106 int signed_x
= static_cast<int32_t>(x
);
3107 return ((signed_x
< -128 || signed_x
> 255)
3108 ? This::STATUS_OVERFLOW
3109 : This::STATUS_OKAY
);
3112 // R_ARM_THM_ABS5: S + A
3113 static inline typename
This::Status
3114 thm_abs5(unsigned char *view
,
3115 const Sized_relobj
<32, big_endian
>* object
,
3116 const Symbol_value
<32>* psymval
)
3118 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3119 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3120 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3121 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3122 Reltype addend
= (val
& 0x7e0U
) >> 6;
3123 Reltype x
= psymval
->value(object
, addend
);
3124 val
= utils::bit_select(val
, x
<< 6, 0x7e0U
);
3125 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3127 // R_ARM_ABS16 permits signed or unsigned results.
3128 int signed_x
= static_cast<int32_t>(x
);
3129 return ((signed_x
< -32768 || signed_x
> 65535)
3130 ? This::STATUS_OVERFLOW
3131 : This::STATUS_OKAY
);
3134 // R_ARM_ABS12: S + A
3135 static inline typename
This::Status
3136 abs12(unsigned char *view
,
3137 const Sized_relobj
<32, big_endian
>* object
,
3138 const Symbol_value
<32>* psymval
)
3140 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3141 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3142 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3143 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3144 Reltype addend
= val
& 0x0fffU
;
3145 Reltype x
= psymval
->value(object
, addend
);
3146 val
= utils::bit_select(val
, x
, 0x0fffU
);
3147 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3148 return (utils::has_overflow
<12>(x
)
3149 ? This::STATUS_OVERFLOW
3150 : This::STATUS_OKAY
);
3153 // R_ARM_ABS16: S + A
3154 static inline typename
This::Status
3155 abs16(unsigned char *view
,
3156 const Sized_relobj
<32, big_endian
>* object
,
3157 const Symbol_value
<32>* psymval
)
3159 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3160 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3161 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3162 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3163 Reltype addend
= utils::sign_extend
<16>(val
);
3164 Reltype x
= psymval
->value(object
, addend
);
3165 val
= utils::bit_select(val
, x
, 0xffffU
);
3166 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3167 return (utils::has_signed_unsigned_overflow
<16>(x
)
3168 ? This::STATUS_OVERFLOW
3169 : This::STATUS_OKAY
);
3172 // R_ARM_ABS32: (S + A) | T
3173 static inline typename
This::Status
3174 abs32(unsigned char *view
,
3175 const Sized_relobj
<32, big_endian
>* object
,
3176 const Symbol_value
<32>* psymval
,
3177 Arm_address thumb_bit
)
3179 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3180 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3181 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3182 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3183 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
3184 return This::STATUS_OKAY
;
3187 // R_ARM_REL32: (S + A) | T - P
3188 static inline typename
This::Status
3189 rel32(unsigned char *view
,
3190 const Sized_relobj
<32, big_endian
>* object
,
3191 const Symbol_value
<32>* psymval
,
3192 Arm_address address
,
3193 Arm_address thumb_bit
)
3195 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3196 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3197 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3198 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3199 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
3200 return This::STATUS_OKAY
;
3203 // R_ARM_THM_JUMP24: (S + A) | T - P
3204 static typename
This::Status
3205 thm_jump19(unsigned char *view
, const Arm_relobj
<big_endian
>* object
,
3206 const Symbol_value
<32>* psymval
, Arm_address address
,
3207 Arm_address thumb_bit
);
3209 // R_ARM_THM_JUMP6: S + A – P
3210 static inline typename
This::Status
3211 thm_jump6(unsigned char *view
,
3212 const Sized_relobj
<32, big_endian
>* object
,
3213 const Symbol_value
<32>* psymval
,
3214 Arm_address address
)
3216 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3217 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3218 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3219 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3220 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3221 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3222 Reltype x
= (psymval
->value(object
, addend
) - address
);
3223 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3224 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3225 // CZB does only forward jumps.
3226 return ((x
> 0x007e)
3227 ? This::STATUS_OVERFLOW
3228 : This::STATUS_OKAY
);
3231 // R_ARM_THM_JUMP8: S + A – P
3232 static inline typename
This::Status
3233 thm_jump8(unsigned char *view
,
3234 const Sized_relobj
<32, big_endian
>* object
,
3235 const Symbol_value
<32>* psymval
,
3236 Arm_address address
)
3238 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3239 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3240 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3241 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3242 Reltype addend
= utils::sign_extend
<8>((val
& 0x00ff) << 1);
3243 Reltype x
= (psymval
->value(object
, addend
) - address
);
3244 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xff00) | ((x
& 0x01fe) >> 1));
3245 return (utils::has_overflow
<8>(x
)
3246 ? This::STATUS_OVERFLOW
3247 : This::STATUS_OKAY
);
3250 // R_ARM_THM_JUMP11: S + A – P
3251 static inline typename
This::Status
3252 thm_jump11(unsigned char *view
,
3253 const Sized_relobj
<32, big_endian
>* object
,
3254 const Symbol_value
<32>* psymval
,
3255 Arm_address address
)
3257 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3258 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3259 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3260 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3261 Reltype addend
= utils::sign_extend
<11>((val
& 0x07ff) << 1);
3262 Reltype x
= (psymval
->value(object
, addend
) - address
);
3263 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xf800) | ((x
& 0x0ffe) >> 1));
3264 return (utils::has_overflow
<11>(x
)
3265 ? This::STATUS_OVERFLOW
3266 : This::STATUS_OKAY
);
3269 // R_ARM_BASE_PREL: B(S) + A - P
3270 static inline typename
This::Status
3271 base_prel(unsigned char* view
,
3273 Arm_address address
)
3275 Base::rel32(view
, origin
- address
);
3279 // R_ARM_BASE_ABS: B(S) + A
3280 static inline typename
This::Status
3281 base_abs(unsigned char* view
,
3284 Base::rel32(view
, origin
);
3288 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3289 static inline typename
This::Status
3290 got_brel(unsigned char* view
,
3291 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3293 Base::rel32(view
, got_offset
);
3294 return This::STATUS_OKAY
;
3297 // R_ARM_GOT_PREL: GOT(S) + A - P
3298 static inline typename
This::Status
3299 got_prel(unsigned char *view
,
3300 Arm_address got_entry
,
3301 Arm_address address
)
3303 Base::rel32(view
, got_entry
- address
);
3304 return This::STATUS_OKAY
;
3307 // R_ARM_PREL: (S + A) | T - P
3308 static inline typename
This::Status
3309 prel31(unsigned char *view
,
3310 const Sized_relobj
<32, big_endian
>* object
,
3311 const Symbol_value
<32>* psymval
,
3312 Arm_address address
,
3313 Arm_address thumb_bit
)
3315 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3316 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3317 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3318 Valtype addend
= utils::sign_extend
<31>(val
);
3319 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3320 val
= utils::bit_select(val
, x
, 0x7fffffffU
);
3321 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3322 return (utils::has_overflow
<31>(x
) ?
3323 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3326 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3327 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3328 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3329 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3330 static inline typename
This::Status
3331 movw(unsigned char* view
,
3332 const Sized_relobj
<32, big_endian
>* object
,
3333 const Symbol_value
<32>* psymval
,
3334 Arm_address relative_address_base
,
3335 Arm_address thumb_bit
,
3336 bool check_overflow
)
3338 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3339 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3340 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3341 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3342 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3343 - relative_address_base
);
3344 val
= This::insert_val_arm_movw_movt(val
, x
);
3345 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3346 return ((check_overflow
&& utils::has_overflow
<16>(x
))
3347 ? This::STATUS_OVERFLOW
3348 : This::STATUS_OKAY
);
3351 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3352 // R_ARM_MOVT_PREL: S + A - P
3353 // R_ARM_MOVT_BREL: S + A - B(S)
3354 static inline typename
This::Status
3355 movt(unsigned char* view
,
3356 const Sized_relobj
<32, big_endian
>* object
,
3357 const Symbol_value
<32>* psymval
,
3358 Arm_address relative_address_base
)
3360 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3361 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3362 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3363 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3364 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3365 val
= This::insert_val_arm_movw_movt(val
, x
);
3366 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3367 // FIXME: IHI0044D says that we should check for overflow.
3368 return This::STATUS_OKAY
;
3371 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3372 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3373 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3374 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3375 static inline typename
This::Status
3376 thm_movw(unsigned char *view
,
3377 const Sized_relobj
<32, big_endian
>* object
,
3378 const Symbol_value
<32>* psymval
,
3379 Arm_address relative_address_base
,
3380 Arm_address thumb_bit
,
3381 bool check_overflow
)
3383 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3384 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3385 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3386 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3387 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3388 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3390 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3391 val
= This::insert_val_thumb_movw_movt(val
, x
);
3392 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3393 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3394 return ((check_overflow
&& utils::has_overflow
<16>(x
))
3395 ? This::STATUS_OVERFLOW
3396 : This::STATUS_OKAY
);
3399 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3400 // R_ARM_THM_MOVT_PREL: S + A - P
3401 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3402 static inline typename
This::Status
3403 thm_movt(unsigned char* view
,
3404 const Sized_relobj
<32, big_endian
>* object
,
3405 const Symbol_value
<32>* psymval
,
3406 Arm_address relative_address_base
)
3408 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3409 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3410 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3411 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3412 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3413 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3414 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3415 val
= This::insert_val_thumb_movw_movt(val
, x
);
3416 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3417 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3418 return This::STATUS_OKAY
;
3421 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3422 static inline typename
This::Status
3423 thm_alu11(unsigned char* view
,
3424 const Sized_relobj
<32, big_endian
>* object
,
3425 const Symbol_value
<32>* psymval
,
3426 Arm_address address
,
3427 Arm_address thumb_bit
)
3429 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3430 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3431 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3432 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3433 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3435 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3436 // -----------------------------------------------------------------------
3437 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3438 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3439 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3440 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3441 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3442 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3444 // Determine a sign for the addend.
3445 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3446 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3447 // Thumb2 addend encoding:
3448 // imm12 := i | imm3 | imm8
3449 int32_t addend
= (insn
& 0xff)
3450 | ((insn
& 0x00007000) >> 4)
3451 | ((insn
& 0x04000000) >> 15);
3452 // Apply a sign to the added.
3455 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3456 - (address
& 0xfffffffc);
3457 Reltype val
= abs(x
);
3458 // Mask out the value and a distinct part of the ADD/SUB opcode
3459 // (bits 7:5 of opword).
3460 insn
= (insn
& 0xfb0f8f00)
3462 | ((val
& 0x700) << 4)
3463 | ((val
& 0x800) << 15);
3464 // Set the opcode according to whether the value to go in the
3465 // place is negative.
3469 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3470 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3471 return ((val
> 0xfff) ?
3472 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3475 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3476 static inline typename
This::Status
3477 thm_pc8(unsigned char* view
,
3478 const Sized_relobj
<32, big_endian
>* object
,
3479 const Symbol_value
<32>* psymval
,
3480 Arm_address address
)
3482 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3483 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3484 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3485 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3486 Reltype addend
= ((insn
& 0x00ff) << 2);
3487 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3488 Reltype val
= abs(x
);
3489 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3491 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3492 return ((val
> 0x03fc)
3493 ? This::STATUS_OVERFLOW
3494 : This::STATUS_OKAY
);
3497 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3498 static inline typename
This::Status
3499 thm_pc12(unsigned char* view
,
3500 const Sized_relobj
<32, big_endian
>* object
,
3501 const Symbol_value
<32>* psymval
,
3502 Arm_address address
)
3504 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3505 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3506 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3507 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3508 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3509 // Determine a sign for the addend (positive if the U bit is 1).
3510 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3511 int32_t addend
= (insn
& 0xfff);
3512 // Apply a sign to the added.
3515 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3516 Reltype val
= abs(x
);
3517 // Mask out and apply the value and the U bit.
3518 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3519 // Set the U bit according to whether the value to go in the
3520 // place is positive.
3524 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3525 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3526 return ((val
> 0xfff) ?
3527 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3531 static inline typename
This::Status
3532 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3533 unsigned char *view
,
3534 const Arm_relobj
<big_endian
>* object
,
3535 const Arm_address address
,
3536 const bool is_interworking
)
3539 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3540 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3541 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3543 // Ensure that we have a BX instruction.
3544 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3545 const uint32_t reg
= (val
& 0xf);
3546 if (is_interworking
&& reg
!= 0xf)
3548 Stub_table
<big_endian
>* stub_table
=
3549 object
->stub_table(relinfo
->data_shndx
);
3550 gold_assert(stub_table
!= NULL
);
3552 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3553 gold_assert(stub
!= NULL
);
3555 int32_t veneer_address
=
3556 stub_table
->address() + stub
->offset() - 8 - address
;
3557 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3558 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3559 // Replace with a branch to veneer (B <addr>)
3560 val
= (val
& 0xf0000000) | 0x0a000000
3561 | ((veneer_address
>> 2) & 0x00ffffff);
3565 // Preserve Rm (lowest four bits) and the condition code
3566 // (highest four bits). Other bits encode MOV PC,Rm.
3567 val
= (val
& 0xf000000f) | 0x01a0f000;
3569 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3570 return This::STATUS_OKAY
;
3573 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3574 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3575 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3576 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3577 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3578 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3579 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3580 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3581 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3582 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3583 static inline typename
This::Status
3584 arm_grp_alu(unsigned char* view
,
3585 const Sized_relobj
<32, big_endian
>* object
,
3586 const Symbol_value
<32>* psymval
,
3588 Arm_address address
,
3589 Arm_address thumb_bit
,
3590 bool check_overflow
)
3592 gold_assert(group
>= 0 && group
< 3);
3593 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3594 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3595 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3597 // ALU group relocations are allowed only for the ADD/SUB instructions.
3598 // (0x00800000 - ADD, 0x00400000 - SUB)
3599 const Valtype opcode
= insn
& 0x01e00000;
3600 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3601 return This::STATUS_BAD_RELOC
;
3603 // Determine a sign for the addend.
3604 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3605 // shifter = rotate_imm * 2
3606 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3607 // Initial addend value.
3608 int32_t addend
= insn
& 0xff;
3609 // Rotate addend right by shifter.
3610 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3611 // Apply a sign to the added.
3614 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3615 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3616 // Check for overflow if required
3618 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3619 return This::STATUS_OVERFLOW
;
3621 // Mask out the value and the ADD/SUB part of the opcode; take care
3622 // not to destroy the S bit.
3624 // Set the opcode according to whether the value to go in the
3625 // place is negative.
3626 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3627 // Encode the offset (encoded Gn).
3630 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3631 return This::STATUS_OKAY
;
3634 // R_ARM_LDR_PC_G0: S + A - P
3635 // R_ARM_LDR_PC_G1: S + A - P
3636 // R_ARM_LDR_PC_G2: S + A - P
3637 // R_ARM_LDR_SB_G0: S + A - B(S)
3638 // R_ARM_LDR_SB_G1: S + A - B(S)
3639 // R_ARM_LDR_SB_G2: S + A - B(S)
3640 static inline typename
This::Status
3641 arm_grp_ldr(unsigned char* view
,
3642 const Sized_relobj
<32, big_endian
>* object
,
3643 const Symbol_value
<32>* psymval
,
3645 Arm_address address
)
3647 gold_assert(group
>= 0 && group
< 3);
3648 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3649 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3650 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3652 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3653 int32_t addend
= (insn
& 0xfff) * sign
;
3654 int32_t x
= (psymval
->value(object
, addend
) - address
);
3655 // Calculate the relevant G(n-1) value to obtain this stage residual.
3657 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3658 if (residual
>= 0x1000)
3659 return This::STATUS_OVERFLOW
;
3661 // Mask out the value and U bit.
3663 // Set the U bit for non-negative values.
3668 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3669 return This::STATUS_OKAY
;
3672 // R_ARM_LDRS_PC_G0: S + A - P
3673 // R_ARM_LDRS_PC_G1: S + A - P
3674 // R_ARM_LDRS_PC_G2: S + A - P
3675 // R_ARM_LDRS_SB_G0: S + A - B(S)
3676 // R_ARM_LDRS_SB_G1: S + A - B(S)
3677 // R_ARM_LDRS_SB_G2: S + A - B(S)
3678 static inline typename
This::Status
3679 arm_grp_ldrs(unsigned char* view
,
3680 const Sized_relobj
<32, big_endian
>* object
,
3681 const Symbol_value
<32>* psymval
,
3683 Arm_address address
)
3685 gold_assert(group
>= 0 && group
< 3);
3686 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3687 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3688 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3690 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3691 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3692 int32_t x
= (psymval
->value(object
, addend
) - address
);
3693 // Calculate the relevant G(n-1) value to obtain this stage residual.
3695 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3696 if (residual
>= 0x100)
3697 return This::STATUS_OVERFLOW
;
3699 // Mask out the value and U bit.
3701 // Set the U bit for non-negative values.
3704 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3706 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3707 return This::STATUS_OKAY
;
3710 // R_ARM_LDC_PC_G0: S + A - P
3711 // R_ARM_LDC_PC_G1: S + A - P
3712 // R_ARM_LDC_PC_G2: S + A - P
3713 // R_ARM_LDC_SB_G0: S + A - B(S)
3714 // R_ARM_LDC_SB_G1: S + A - B(S)
3715 // R_ARM_LDC_SB_G2: S + A - B(S)
3716 static inline typename
This::Status
3717 arm_grp_ldc(unsigned char* view
,
3718 const Sized_relobj
<32, big_endian
>* object
,
3719 const Symbol_value
<32>* psymval
,
3721 Arm_address address
)
3723 gold_assert(group
>= 0 && group
< 3);
3724 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3725 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3726 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3728 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3729 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3730 int32_t x
= (psymval
->value(object
, addend
) - address
);
3731 // Calculate the relevant G(n-1) value to obtain this stage residual.
3733 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3734 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3735 return This::STATUS_OVERFLOW
;
3737 // Mask out the value and U bit.
3739 // Set the U bit for non-negative values.
3742 insn
|= (residual
>> 2);
3744 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3745 return This::STATUS_OKAY
;
3749 // Relocate ARM long branches. This handles relocation types
3750 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3751 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3752 // undefined and we do not use PLT in this relocation. In such a case,
3753 // the branch is converted into an NOP.
3755 template<bool big_endian
>
3756 typename Arm_relocate_functions
<big_endian
>::Status
3757 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3758 unsigned int r_type
,
3759 const Relocate_info
<32, big_endian
>* relinfo
,
3760 unsigned char *view
,
3761 const Sized_symbol
<32>* gsym
,
3762 const Arm_relobj
<big_endian
>* object
,
3764 const Symbol_value
<32>* psymval
,
3765 Arm_address address
,
3766 Arm_address thumb_bit
,
3767 bool is_weakly_undefined_without_plt
)
3769 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3770 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3771 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3773 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3774 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3775 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3776 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3777 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3778 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3779 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3781 // Check that the instruction is valid.
3782 if (r_type
== elfcpp::R_ARM_CALL
)
3784 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3785 return This::STATUS_BAD_RELOC
;
3787 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3789 if (!insn_is_b
&& !insn_is_cond_bl
)
3790 return This::STATUS_BAD_RELOC
;
3792 else if (r_type
== elfcpp::R_ARM_PLT32
)
3794 if (!insn_is_any_branch
)
3795 return This::STATUS_BAD_RELOC
;
3797 else if (r_type
== elfcpp::R_ARM_XPC25
)
3799 // FIXME: AAELF document IH0044C does not say much about it other
3800 // than it being obsolete.
3801 if (!insn_is_any_branch
)
3802 return This::STATUS_BAD_RELOC
;
3807 // A branch to an undefined weak symbol is turned into a jump to
3808 // the next instruction unless a PLT entry will be created.
3809 // Do the same for local undefined symbols.
3810 // The jump to the next instruction is optimized as a NOP depending
3811 // on the architecture.
3812 const Target_arm
<big_endian
>* arm_target
=
3813 Target_arm
<big_endian
>::default_target();
3814 if (is_weakly_undefined_without_plt
)
3816 gold_assert(!parameters
->options().relocatable());
3817 Valtype cond
= val
& 0xf0000000U
;
3818 if (arm_target
->may_use_arm_nop())
3819 val
= cond
| 0x0320f000;
3821 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3822 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3823 return This::STATUS_OKAY
;
3826 Valtype addend
= utils::sign_extend
<26>(val
<< 2);
3827 Valtype branch_target
= psymval
->value(object
, addend
);
3828 int32_t branch_offset
= branch_target
- address
;
3830 // We need a stub if the branch offset is too large or if we need
3832 bool may_use_blx
= arm_target
->may_use_blx();
3833 Reloc_stub
* stub
= NULL
;
3835 if (!parameters
->options().relocatable()
3836 && (utils::has_overflow
<26>(branch_offset
)
3837 || ((thumb_bit
!= 0)
3838 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
3840 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
3842 Stub_type stub_type
=
3843 Reloc_stub::stub_type_for_reloc(r_type
, address
,
3844 unadjusted_branch_target
,
3846 if (stub_type
!= arm_stub_none
)
3848 Stub_table
<big_endian
>* stub_table
=
3849 object
->stub_table(relinfo
->data_shndx
);
3850 gold_assert(stub_table
!= NULL
);
3852 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3853 stub
= stub_table
->find_reloc_stub(stub_key
);
3854 gold_assert(stub
!= NULL
);
3855 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3856 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3857 branch_offset
= branch_target
- address
;
3858 gold_assert(!utils::has_overflow
<26>(branch_offset
));
3862 // At this point, if we still need to switch mode, the instruction
3863 // must either be a BLX or a BL that can be converted to a BLX.
3867 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3868 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3871 val
= utils::bit_select(val
, (branch_offset
>> 2), 0xffffffUL
);
3872 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3873 return (utils::has_overflow
<26>(branch_offset
)
3874 ? This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3877 // Relocate THUMB long branches. This handles relocation types
3878 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3879 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3880 // undefined and we do not use PLT in this relocation. In such a case,
3881 // the branch is converted into an NOP.
3883 template<bool big_endian
>
3884 typename Arm_relocate_functions
<big_endian
>::Status
3885 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3886 unsigned int r_type
,
3887 const Relocate_info
<32, big_endian
>* relinfo
,
3888 unsigned char *view
,
3889 const Sized_symbol
<32>* gsym
,
3890 const Arm_relobj
<big_endian
>* object
,
3892 const Symbol_value
<32>* psymval
,
3893 Arm_address address
,
3894 Arm_address thumb_bit
,
3895 bool is_weakly_undefined_without_plt
)
3897 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3898 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3899 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3900 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3902 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3904 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
3905 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
3907 // Check that the instruction is valid.
3908 if (r_type
== elfcpp::R_ARM_THM_CALL
)
3910 if (!is_bl_insn
&& !is_blx_insn
)
3911 return This::STATUS_BAD_RELOC
;
3913 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
3915 // This cannot be a BLX.
3917 return This::STATUS_BAD_RELOC
;
3919 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
3921 // Check for Thumb to Thumb call.
3923 return This::STATUS_BAD_RELOC
;
3926 gold_warning(_("%s: Thumb BLX instruction targets "
3927 "thumb function '%s'."),
3928 object
->name().c_str(),
3929 (gsym
? gsym
->name() : "(local)"));
3930 // Convert BLX to BL.
3931 lower_insn
|= 0x1000U
;
3937 // A branch to an undefined weak symbol is turned into a jump to
3938 // the next instruction unless a PLT entry will be created.
3939 // The jump to the next instruction is optimized as a NOP.W for
3940 // Thumb-2 enabled architectures.
3941 const Target_arm
<big_endian
>* arm_target
=
3942 Target_arm
<big_endian
>::default_target();
3943 if (is_weakly_undefined_without_plt
)
3945 gold_assert(!parameters
->options().relocatable());
3946 if (arm_target
->may_use_thumb2_nop())
3948 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
3949 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
3953 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
3954 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
3956 return This::STATUS_OKAY
;
3959 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
3960 Arm_address branch_target
= psymval
->value(object
, addend
);
3962 // For BLX, bit 1 of target address comes from bit 1 of base address.
3963 bool may_use_blx
= arm_target
->may_use_blx();
3964 if (thumb_bit
== 0 && may_use_blx
)
3965 branch_target
= utils::bit_select(branch_target
, address
, 0x2);
3967 int32_t branch_offset
= branch_target
- address
;
3969 // We need a stub if the branch offset is too large or if we need
3971 bool thumb2
= arm_target
->using_thumb2();
3972 if (!parameters
->options().relocatable()
3973 && ((!thumb2
&& utils::has_overflow
<23>(branch_offset
))
3974 || (thumb2
&& utils::has_overflow
<25>(branch_offset
))
3975 || ((thumb_bit
== 0)
3976 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
3977 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
3979 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
3981 Stub_type stub_type
=
3982 Reloc_stub::stub_type_for_reloc(r_type
, address
,
3983 unadjusted_branch_target
,
3986 if (stub_type
!= arm_stub_none
)
3988 Stub_table
<big_endian
>* stub_table
=
3989 object
->stub_table(relinfo
->data_shndx
);
3990 gold_assert(stub_table
!= NULL
);
3992 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3993 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
3994 gold_assert(stub
!= NULL
);
3995 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3996 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3997 if (thumb_bit
== 0 && may_use_blx
)
3998 branch_target
= utils::bit_select(branch_target
, address
, 0x2);
3999 branch_offset
= branch_target
- address
;
4003 // At this point, if we still need to switch mode, the instruction
4004 // must either be a BLX or a BL that can be converted to a BLX.
4007 gold_assert(may_use_blx
4008 && (r_type
== elfcpp::R_ARM_THM_CALL
4009 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4010 // Make sure this is a BLX.
4011 lower_insn
&= ~0x1000U
;
4015 // Make sure this is a BL.
4016 lower_insn
|= 0x1000U
;
4019 // For a BLX instruction, make sure that the relocation is rounded up
4020 // to a word boundary. This follows the semantics of the instruction
4021 // which specifies that bit 1 of the target address will come from bit
4022 // 1 of the base address.
4023 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4024 gold_assert((branch_offset
& 3) == 0);
4026 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4027 // We use the Thumb-2 encoding, which is safe even if dealing with
4028 // a Thumb-1 instruction by virtue of our overflow check above. */
4029 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4030 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4032 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4033 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4035 gold_assert(!utils::has_overflow
<25>(branch_offset
));
4038 ? utils::has_overflow
<25>(branch_offset
)
4039 : utils::has_overflow
<23>(branch_offset
))
4040 ? This::STATUS_OVERFLOW
4041 : This::STATUS_OKAY
);
4044 // Relocate THUMB-2 long conditional branches.
4045 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4046 // undefined and we do not use PLT in this relocation. In such a case,
4047 // the branch is converted into an NOP.
4049 template<bool big_endian
>
4050 typename Arm_relocate_functions
<big_endian
>::Status
4051 Arm_relocate_functions
<big_endian
>::thm_jump19(
4052 unsigned char *view
,
4053 const Arm_relobj
<big_endian
>* object
,
4054 const Symbol_value
<32>* psymval
,
4055 Arm_address address
,
4056 Arm_address thumb_bit
)
4058 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4059 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4060 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4061 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4062 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4064 Arm_address branch_target
= psymval
->value(object
, addend
);
4065 int32_t branch_offset
= branch_target
- address
;
4067 // ??? Should handle interworking? GCC might someday try to
4068 // use this for tail calls.
4069 // FIXME: We do support thumb entry to PLT yet.
4072 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4073 return This::STATUS_BAD_RELOC
;
4076 // Put RELOCATION back into the insn.
4077 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4078 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4080 // Put the relocated value back in the object file:
4081 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4082 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4084 return (utils::has_overflow
<21>(branch_offset
)
4085 ? This::STATUS_OVERFLOW
4086 : This::STATUS_OKAY
);
4089 // Get the GOT section, creating it if necessary.
4091 template<bool big_endian
>
4092 Arm_output_data_got
<big_endian
>*
4093 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4095 if (this->got_
== NULL
)
4097 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4099 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4102 os
= layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4104 | elfcpp::SHF_WRITE
),
4105 this->got_
, false, false, false,
4107 // The old GNU linker creates a .got.plt section. We just
4108 // create another set of data in the .got section. Note that we
4109 // always create a PLT if we create a GOT, although the PLT
4111 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4112 os
= layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4114 | elfcpp::SHF_WRITE
),
4115 this->got_plt_
, false, false,
4118 // The first three entries are reserved.
4119 this->got_plt_
->set_current_data_size(3 * 4);
4121 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4122 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4123 Symbol_table::PREDEFINED
,
4125 0, 0, elfcpp::STT_OBJECT
,
4127 elfcpp::STV_HIDDEN
, 0,
4133 // Get the dynamic reloc section, creating it if necessary.
4135 template<bool big_endian
>
4136 typename Target_arm
<big_endian
>::Reloc_section
*
4137 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4139 if (this->rel_dyn_
== NULL
)
4141 gold_assert(layout
!= NULL
);
4142 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4143 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4144 elfcpp::SHF_ALLOC
, this->rel_dyn_
, true,
4145 false, false, false);
4147 return this->rel_dyn_
;
4150 // Insn_template methods.
4152 // Return byte size of an instruction template.
4155 Insn_template::size() const
4157 switch (this->type())
4160 case THUMB16_SPECIAL_TYPE
:
4171 // Return alignment of an instruction template.
4174 Insn_template::alignment() const
4176 switch (this->type())
4179 case THUMB16_SPECIAL_TYPE
:
4190 // Stub_template methods.
4192 Stub_template::Stub_template(
4193 Stub_type type
, const Insn_template
* insns
,
4195 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4196 entry_in_thumb_mode_(false), relocs_()
4200 // Compute byte size and alignment of stub template.
4201 for (size_t i
= 0; i
< insn_count
; i
++)
4203 unsigned insn_alignment
= insns
[i
].alignment();
4204 size_t insn_size
= insns
[i
].size();
4205 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4206 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4207 switch (insns
[i
].type())
4209 case Insn_template::THUMB16_TYPE
:
4210 case Insn_template::THUMB16_SPECIAL_TYPE
:
4212 this->entry_in_thumb_mode_
= true;
4215 case Insn_template::THUMB32_TYPE
:
4216 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4217 this->relocs_
.push_back(Reloc(i
, offset
));
4219 this->entry_in_thumb_mode_
= true;
4222 case Insn_template::ARM_TYPE
:
4223 // Handle cases where the target is encoded within the
4225 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4226 this->relocs_
.push_back(Reloc(i
, offset
));
4229 case Insn_template::DATA_TYPE
:
4230 // Entry point cannot be data.
4231 gold_assert(i
!= 0);
4232 this->relocs_
.push_back(Reloc(i
, offset
));
4238 offset
+= insn_size
;
4240 this->size_
= offset
;
4245 // Template to implement do_write for a specific target endianness.
4247 template<bool big_endian
>
4249 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4251 const Stub_template
* stub_template
= this->stub_template();
4252 const Insn_template
* insns
= stub_template
->insns();
4254 // FIXME: We do not handle BE8 encoding yet.
4255 unsigned char* pov
= view
;
4256 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4258 switch (insns
[i
].type())
4260 case Insn_template::THUMB16_TYPE
:
4261 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4263 case Insn_template::THUMB16_SPECIAL_TYPE
:
4264 elfcpp::Swap
<16, big_endian
>::writeval(
4266 this->thumb16_special(i
));
4268 case Insn_template::THUMB32_TYPE
:
4270 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4271 uint32_t lo
= insns
[i
].data() & 0xffff;
4272 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4273 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4276 case Insn_template::ARM_TYPE
:
4277 case Insn_template::DATA_TYPE
:
4278 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4283 pov
+= insns
[i
].size();
4285 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4288 // Reloc_stub::Key methods.
4290 // Dump a Key as a string for debugging.
4293 Reloc_stub::Key::name() const
4295 if (this->r_sym_
== invalid_index
)
4297 // Global symbol key name
4298 // <stub-type>:<symbol name>:<addend>.
4299 const std::string sym_name
= this->u_
.symbol
->name();
4300 // We need to print two hex number and two colons. So just add 100 bytes
4301 // to the symbol name size.
4302 size_t len
= sym_name
.size() + 100;
4303 char* buffer
= new char[len
];
4304 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4305 sym_name
.c_str(), this->addend_
);
4306 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4308 return std::string(buffer
);
4312 // local symbol key name
4313 // <stub-type>:<object>:<r_sym>:<addend>.
4314 const size_t len
= 200;
4316 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4317 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4318 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4319 return std::string(buffer
);
4323 // Reloc_stub methods.
4325 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4326 // LOCATION to DESTINATION.
4327 // This code is based on the arm_type_of_stub function in
4328 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
4332 Reloc_stub::stub_type_for_reloc(
4333 unsigned int r_type
,
4334 Arm_address location
,
4335 Arm_address destination
,
4336 bool target_is_thumb
)
4338 Stub_type stub_type
= arm_stub_none
;
4340 // This is a bit ugly but we want to avoid using a templated class for
4341 // big and little endianities.
4343 bool should_force_pic_veneer
;
4346 if (parameters
->target().is_big_endian())
4348 const Target_arm
<true>* big_endian_target
=
4349 Target_arm
<true>::default_target();
4350 may_use_blx
= big_endian_target
->may_use_blx();
4351 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4352 thumb2
= big_endian_target
->using_thumb2();
4353 thumb_only
= big_endian_target
->using_thumb_only();
4357 const Target_arm
<false>* little_endian_target
=
4358 Target_arm
<false>::default_target();
4359 may_use_blx
= little_endian_target
->may_use_blx();
4360 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4361 thumb2
= little_endian_target
->using_thumb2();
4362 thumb_only
= little_endian_target
->using_thumb_only();
4365 int64_t branch_offset
;
4366 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4368 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4369 // base address (instruction address + 4).
4370 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4371 destination
= utils::bit_select(destination
, location
, 0x2);
4372 branch_offset
= static_cast<int64_t>(destination
) - location
;
4374 // Handle cases where:
4375 // - this call goes too far (different Thumb/Thumb2 max
4377 // - it's a Thumb->Arm call and blx is not available, or it's a
4378 // Thumb->Arm branch (not bl). A stub is needed in this case.
4380 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4381 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4383 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4384 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4385 || ((!target_is_thumb
)
4386 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4387 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4389 if (target_is_thumb
)
4394 stub_type
= (parameters
->options().shared()
4395 || should_force_pic_veneer
)
4398 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4399 // V5T and above. Stub starts with ARM code, so
4400 // we must be able to switch mode before
4401 // reaching it, which is only possible for 'bl'
4402 // (ie R_ARM_THM_CALL relocation).
4403 ? arm_stub_long_branch_any_thumb_pic
4404 // On V4T, use Thumb code only.
4405 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4409 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4410 ? arm_stub_long_branch_any_any
// V5T and above.
4411 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4415 stub_type
= (parameters
->options().shared()
4416 || should_force_pic_veneer
)
4417 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4418 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4425 // FIXME: We should check that the input section is from an
4426 // object that has interwork enabled.
4428 stub_type
= (parameters
->options().shared()
4429 || should_force_pic_veneer
)
4432 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4433 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4434 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4438 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4439 ? arm_stub_long_branch_any_any
// V5T and above.
4440 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4442 // Handle v4t short branches.
4443 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4444 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4445 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4446 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4450 else if (r_type
== elfcpp::R_ARM_CALL
4451 || r_type
== elfcpp::R_ARM_JUMP24
4452 || r_type
== elfcpp::R_ARM_PLT32
)
4454 branch_offset
= static_cast<int64_t>(destination
) - location
;
4455 if (target_is_thumb
)
4459 // FIXME: We should check that the input section is from an
4460 // object that has interwork enabled.
4462 // We have an extra 2-bytes reach because of
4463 // the mode change (bit 24 (H) of BLX encoding).
4464 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4465 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4466 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4467 || (r_type
== elfcpp::R_ARM_JUMP24
)
4468 || (r_type
== elfcpp::R_ARM_PLT32
))
4470 stub_type
= (parameters
->options().shared()
4471 || should_force_pic_veneer
)
4474 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4475 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4479 ? arm_stub_long_branch_any_any
// V5T and above.
4480 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4486 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4487 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4489 stub_type
= (parameters
->options().shared()
4490 || should_force_pic_veneer
)
4491 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4492 : arm_stub_long_branch_any_any
; /// non-PIC.
4500 // Cortex_a8_stub methods.
4502 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4503 // I is the position of the instruction template in the stub template.
4506 Cortex_a8_stub::do_thumb16_special(size_t i
)
4508 // The only use of this is to copy condition code from a conditional
4509 // branch being worked around to the corresponding conditional branch in
4511 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4513 uint16_t data
= this->stub_template()->insns()[i
].data();
4514 gold_assert((data
& 0xff00U
) == 0xd000U
);
4515 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4519 // Stub_factory methods.
4521 Stub_factory::Stub_factory()
4523 // The instruction template sequences are declared as static
4524 // objects and initialized first time the constructor runs.
4526 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4527 // to reach the stub if necessary.
4528 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4530 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4531 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4532 // dcd R_ARM_ABS32(X)
4535 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4537 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4539 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4540 Insn_template::arm_insn(0xe12fff1c), // bx ip
4541 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4542 // dcd R_ARM_ABS32(X)
4545 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4546 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4548 Insn_template::thumb16_insn(0xb401), // push {r0}
4549 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4550 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4551 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4552 Insn_template::thumb16_insn(0x4760), // bx ip
4553 Insn_template::thumb16_insn(0xbf00), // nop
4554 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4555 // dcd R_ARM_ABS32(X)
4558 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4560 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4562 Insn_template::thumb16_insn(0x4778), // bx pc
4563 Insn_template::thumb16_insn(0x46c0), // nop
4564 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4565 Insn_template::arm_insn(0xe12fff1c), // bx ip
4566 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4567 // dcd R_ARM_ABS32(X)
4570 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4572 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4574 Insn_template::thumb16_insn(0x4778), // bx pc
4575 Insn_template::thumb16_insn(0x46c0), // nop
4576 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4577 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4578 // dcd R_ARM_ABS32(X)
4581 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4582 // one, when the destination is close enough.
4583 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4585 Insn_template::thumb16_insn(0x4778), // bx pc
4586 Insn_template::thumb16_insn(0x46c0), // nop
4587 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4590 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4591 // blx to reach the stub if necessary.
4592 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4594 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4595 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4596 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4597 // dcd R_ARM_REL32(X-4)
4600 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4601 // blx to reach the stub if necessary. We can not add into pc;
4602 // it is not guaranteed to mode switch (different in ARMv6 and
4604 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4606 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4607 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4608 Insn_template::arm_insn(0xe12fff1c), // bx ip
4609 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4610 // dcd R_ARM_REL32(X)
4613 // V4T ARM -> ARM long branch stub, PIC.
4614 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4616 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4617 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4618 Insn_template::arm_insn(0xe12fff1c), // bx ip
4619 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4620 // dcd R_ARM_REL32(X)
4623 // V4T Thumb -> ARM long branch stub, PIC.
4624 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4626 Insn_template::thumb16_insn(0x4778), // bx pc
4627 Insn_template::thumb16_insn(0x46c0), // nop
4628 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4629 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4630 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4631 // dcd R_ARM_REL32(X)
4634 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4636 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4638 Insn_template::thumb16_insn(0xb401), // push {r0}
4639 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4640 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4641 Insn_template::thumb16_insn(0x4484), // add ip, r0
4642 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4643 Insn_template::thumb16_insn(0x4760), // bx ip
4644 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4645 // dcd R_ARM_REL32(X)
4648 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4650 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4652 Insn_template::thumb16_insn(0x4778), // bx pc
4653 Insn_template::thumb16_insn(0x46c0), // nop
4654 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4655 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4656 Insn_template::arm_insn(0xe12fff1c), // bx ip
4657 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4658 // dcd R_ARM_REL32(X)
4661 // Cortex-A8 erratum-workaround stubs.
4663 // Stub used for conditional branches (which may be beyond +/-1MB away,
4664 // so we can't use a conditional branch to reach this stub).
4671 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4673 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4674 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4675 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4679 // Stub used for b.w and bl.w instructions.
4681 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4683 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4686 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4688 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4691 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4692 // instruction (which switches to ARM mode) to point to this stub. Jump to
4693 // the real destination using an ARM-mode branch.
4694 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4696 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4699 // Stub used to provide an interworking for R_ARM_V4BX relocation
4700 // (bx r[n] instruction).
4701 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4703 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4704 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4705 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4708 // Fill in the stub template look-up table. Stub templates are constructed
4709 // per instance of Stub_factory for fast look-up without locking
4710 // in a thread-enabled environment.
4712 this->stub_templates_
[arm_stub_none
] =
4713 new Stub_template(arm_stub_none
, NULL
, 0);
4715 #define DEF_STUB(x) \
4719 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4720 Stub_type type = arm_stub_##x; \
4721 this->stub_templates_[type] = \
4722 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4730 // Stub_table methods.
4732 // Removel all Cortex-A8 stub.
4734 template<bool big_endian
>
4736 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4738 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4739 p
!= this->cortex_a8_stubs_
.end();
4742 this->cortex_a8_stubs_
.clear();
4745 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4747 template<bool big_endian
>
4749 Stub_table
<big_endian
>::relocate_stub(
4751 const Relocate_info
<32, big_endian
>* relinfo
,
4752 Target_arm
<big_endian
>* arm_target
,
4753 Output_section
* output_section
,
4754 unsigned char* view
,
4755 Arm_address address
,
4756 section_size_type view_size
)
4758 const Stub_template
* stub_template
= stub
->stub_template();
4759 if (stub_template
->reloc_count() != 0)
4761 // Adjust view to cover the stub only.
4762 section_size_type offset
= stub
->offset();
4763 section_size_type stub_size
= stub_template
->size();
4764 gold_assert(offset
+ stub_size
<= view_size
);
4766 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4767 address
+ offset
, stub_size
);
4771 // Relocate all stubs in this stub table.
4773 template<bool big_endian
>
4775 Stub_table
<big_endian
>::relocate_stubs(
4776 const Relocate_info
<32, big_endian
>* relinfo
,
4777 Target_arm
<big_endian
>* arm_target
,
4778 Output_section
* output_section
,
4779 unsigned char* view
,
4780 Arm_address address
,
4781 section_size_type view_size
)
4783 // If we are passed a view bigger than the stub table's. we need to
4785 gold_assert(address
== this->address()
4787 == static_cast<section_size_type
>(this->data_size())));
4789 // Relocate all relocation stubs.
4790 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4791 p
!= this->reloc_stubs_
.end();
4793 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4794 address
, view_size
);
4796 // Relocate all Cortex-A8 stubs.
4797 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4798 p
!= this->cortex_a8_stubs_
.end();
4800 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4801 address
, view_size
);
4803 // Relocate all ARM V4BX stubs.
4804 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4805 p
!= this->arm_v4bx_stubs_
.end();
4809 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4810 address
, view_size
);
4814 // Write out the stubs to file.
4816 template<bool big_endian
>
4818 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4820 off_t offset
= this->offset();
4821 const section_size_type oview_size
=
4822 convert_to_section_size_type(this->data_size());
4823 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4825 // Write relocation stubs.
4826 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4827 p
!= this->reloc_stubs_
.end();
4830 Reloc_stub
* stub
= p
->second
;
4831 Arm_address address
= this->address() + stub
->offset();
4833 == align_address(address
,
4834 stub
->stub_template()->alignment()));
4835 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4839 // Write Cortex-A8 stubs.
4840 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4841 p
!= this->cortex_a8_stubs_
.end();
4844 Cortex_a8_stub
* stub
= p
->second
;
4845 Arm_address address
= this->address() + stub
->offset();
4847 == align_address(address
,
4848 stub
->stub_template()->alignment()));
4849 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4853 // Write ARM V4BX relocation stubs.
4854 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4855 p
!= this->arm_v4bx_stubs_
.end();
4861 Arm_address address
= this->address() + (*p
)->offset();
4863 == align_address(address
,
4864 (*p
)->stub_template()->alignment()));
4865 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4869 of
->write_output_view(this->offset(), oview_size
, oview
);
4872 // Update the data size and address alignment of the stub table at the end
4873 // of a relaxation pass. Return true if either the data size or the
4874 // alignment changed in this relaxation pass.
4876 template<bool big_endian
>
4878 Stub_table
<big_endian
>::update_data_size_and_addralign()
4880 // Go over all stubs in table to compute data size and address alignment.
4881 off_t size
= this->reloc_stubs_size_
;
4882 unsigned addralign
= this->reloc_stubs_addralign_
;
4884 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4885 p
!= this->cortex_a8_stubs_
.end();
4888 const Stub_template
* stub_template
= p
->second
->stub_template();
4889 addralign
= std::max(addralign
, stub_template
->alignment());
4890 size
= (align_address(size
, stub_template
->alignment())
4891 + stub_template
->size());
4894 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4895 p
!= this->arm_v4bx_stubs_
.end();
4901 const Stub_template
* stub_template
= (*p
)->stub_template();
4902 addralign
= std::max(addralign
, stub_template
->alignment());
4903 size
= (align_address(size
, stub_template
->alignment())
4904 + stub_template
->size());
4907 // Check if either data size or alignment changed in this pass.
4908 // Update prev_data_size_ and prev_addralign_. These will be used
4909 // as the current data size and address alignment for the next pass.
4910 bool changed
= size
!= this->prev_data_size_
;
4911 this->prev_data_size_
= size
;
4913 if (addralign
!= this->prev_addralign_
)
4915 this->prev_addralign_
= addralign
;
4920 // Finalize the stubs. This sets the offsets of the stubs within the stub
4921 // table. It also marks all input sections needing Cortex-A8 workaround.
4923 template<bool big_endian
>
4925 Stub_table
<big_endian
>::finalize_stubs()
4927 off_t off
= this->reloc_stubs_size_
;
4928 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4929 p
!= this->cortex_a8_stubs_
.end();
4932 Cortex_a8_stub
* stub
= p
->second
;
4933 const Stub_template
* stub_template
= stub
->stub_template();
4934 uint64_t stub_addralign
= stub_template
->alignment();
4935 off
= align_address(off
, stub_addralign
);
4936 stub
->set_offset(off
);
4937 off
+= stub_template
->size();
4939 // Mark input section so that we can determine later if a code section
4940 // needs the Cortex-A8 workaround quickly.
4941 Arm_relobj
<big_endian
>* arm_relobj
=
4942 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
4943 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
4946 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4947 p
!= this->arm_v4bx_stubs_
.end();
4953 const Stub_template
* stub_template
= (*p
)->stub_template();
4954 uint64_t stub_addralign
= stub_template
->alignment();
4955 off
= align_address(off
, stub_addralign
);
4956 (*p
)->set_offset(off
);
4957 off
+= stub_template
->size();
4960 gold_assert(off
<= this->prev_data_size_
);
4963 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4964 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4965 // of the address range seen by the linker.
4967 template<bool big_endian
>
4969 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
4970 Target_arm
<big_endian
>* arm_target
,
4971 unsigned char* view
,
4972 Arm_address view_address
,
4973 section_size_type view_size
)
4975 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4976 for (Cortex_a8_stub_list::const_iterator p
=
4977 this->cortex_a8_stubs_
.lower_bound(view_address
);
4978 ((p
!= this->cortex_a8_stubs_
.end())
4979 && (p
->first
< (view_address
+ view_size
)));
4982 // We do not store the THUMB bit in the LSB of either the branch address
4983 // or the stub offset. There is no need to strip the LSB.
4984 Arm_address branch_address
= p
->first
;
4985 const Cortex_a8_stub
* stub
= p
->second
;
4986 Arm_address stub_address
= this->address() + stub
->offset();
4988 // Offset of the branch instruction relative to this view.
4989 section_size_type offset
=
4990 convert_to_section_size_type(branch_address
- view_address
);
4991 gold_assert((offset
+ 4) <= view_size
);
4993 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
4994 view
+ offset
, branch_address
);
4998 // Arm_input_section methods.
5000 // Initialize an Arm_input_section.
5002 template<bool big_endian
>
5004 Arm_input_section
<big_endian
>::init()
5006 Relobj
* relobj
= this->relobj();
5007 unsigned int shndx
= this->shndx();
5009 // Cache these to speed up size and alignment queries. It is too slow
5010 // to call section_addraglin and section_size every time.
5011 this->original_addralign_
=
5012 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5013 this->original_size_
=
5014 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5016 // We want to make this look like the original input section after
5017 // output sections are finalized.
5018 Output_section
* os
= relobj
->output_section(shndx
);
5019 off_t offset
= relobj
->output_section_offset(shndx
);
5020 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5021 this->set_address(os
->address() + offset
);
5022 this->set_file_offset(os
->offset() + offset
);
5024 this->set_current_data_size(this->original_size_
);
5025 this->finalize_data_size();
5028 template<bool big_endian
>
5030 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5032 // We have to write out the original section content.
5033 section_size_type section_size
;
5034 const unsigned char* section_contents
=
5035 this->relobj()->section_contents(this->shndx(), §ion_size
, false);
5036 of
->write(this->offset(), section_contents
, section_size
);
5038 // If this owns a stub table and it is not empty, write it.
5039 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5040 this->stub_table_
->write(of
);
5043 // Finalize data size.
5045 template<bool big_endian
>
5047 Arm_input_section
<big_endian
>::set_final_data_size()
5049 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5051 if (this->is_stub_table_owner())
5053 this->stub_table_
->finalize_data_size();
5054 off
= align_address(off
, this->stub_table_
->addralign());
5055 off
+= this->stub_table_
->data_size();
5057 this->set_data_size(off
);
5060 // Reset address and file offset.
5062 template<bool big_endian
>
5064 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5066 // Size of the original input section contents.
5067 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5069 // If this is a stub table owner, account for the stub table size.
5070 if (this->is_stub_table_owner())
5072 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5074 // Reset the stub table's address and file offset. The
5075 // current data size for child will be updated after that.
5076 stub_table_
->reset_address_and_file_offset();
5077 off
= align_address(off
, stub_table_
->addralign());
5078 off
+= stub_table
->current_data_size();
5081 this->set_current_data_size(off
);
5084 // Arm_exidx_cantunwind methods.
5086 // Write this to Output file OF for a fixed endianness.
5088 template<bool big_endian
>
5090 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5092 off_t offset
= this->offset();
5093 const section_size_type oview_size
= 8;
5094 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5096 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5097 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
);
5099 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5100 gold_assert(os
!= NULL
);
5102 Arm_relobj
<big_endian
>* arm_relobj
=
5103 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5104 Arm_address output_offset
=
5105 arm_relobj
->get_output_section_offset(this->shndx_
);
5106 Arm_address section_start
;
5107 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5108 section_start
= os
->address() + output_offset
;
5111 // Currently this only happens for a relaxed section.
5112 const Output_relaxed_input_section
* poris
=
5113 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5114 gold_assert(poris
!= NULL
);
5115 section_start
= poris
->address();
5118 // We always append this to the end of an EXIDX section.
5119 Arm_address output_address
=
5120 section_start
+ this->relobj_
->section_size(this->shndx_
);
5122 // Write out the entry. The first word either points to the beginning
5123 // or after the end of a text section. The second word is the special
5124 // EXIDX_CANTUNWIND value.
5125 uint32_t prel31_offset
= output_address
- this->address();
5126 if (utils::has_overflow
<31>(offset
))
5127 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5128 elfcpp::Swap
<32, big_endian
>::writeval(wv
, prel31_offset
& 0x7fffffffU
);
5129 elfcpp::Swap
<32, big_endian
>::writeval(wv
+ 1, elfcpp::EXIDX_CANTUNWIND
);
5131 of
->write_output_view(this->offset(), oview_size
, oview
);
5134 // Arm_exidx_merged_section methods.
5136 // Constructor for Arm_exidx_merged_section.
5137 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5138 // SECTION_OFFSET_MAP points to a section offset map describing how
5139 // parts of the input section are mapped to output. DELETED_BYTES is
5140 // the number of bytes deleted from the EXIDX input section.
5142 Arm_exidx_merged_section::Arm_exidx_merged_section(
5143 const Arm_exidx_input_section
& exidx_input_section
,
5144 const Arm_exidx_section_offset_map
& section_offset_map
,
5145 uint32_t deleted_bytes
)
5146 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5147 exidx_input_section
.shndx(),
5148 exidx_input_section
.addralign()),
5149 exidx_input_section_(exidx_input_section
),
5150 section_offset_map_(section_offset_map
)
5152 // Fix size here so that we do not need to implement set_final_data_size.
5153 this->set_data_size(exidx_input_section
.size() - deleted_bytes
);
5154 this->fix_data_size();
5157 // Given an input OBJECT, an input section index SHNDX within that
5158 // object, and an OFFSET relative to the start of that input
5159 // section, return whether or not the corresponding offset within
5160 // the output section is known. If this function returns true, it
5161 // sets *POUTPUT to the output offset. The value -1 indicates that
5162 // this input offset is being discarded.
5165 Arm_exidx_merged_section::do_output_offset(
5166 const Relobj
* relobj
,
5168 section_offset_type offset
,
5169 section_offset_type
* poutput
) const
5171 // We only handle offsets for the original EXIDX input section.
5172 if (relobj
!= this->exidx_input_section_
.relobj()
5173 || shndx
!= this->exidx_input_section_
.shndx())
5176 section_offset_type section_size
=
5177 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5178 if (offset
< 0 || offset
>= section_size
)
5179 // Input offset is out of valid range.
5183 // We need to look up the section offset map to determine the output
5184 // offset. Find the reference point in map that is first offset
5185 // bigger than or equal to this offset.
5186 Arm_exidx_section_offset_map::const_iterator p
=
5187 this->section_offset_map_
.lower_bound(offset
);
5189 // The section offset maps are build such that this should not happen if
5190 // input offset is in the valid range.
5191 gold_assert(p
!= this->section_offset_map_
.end());
5193 // We need to check if this is dropped.
5194 section_offset_type ref
= p
->first
;
5195 section_offset_type mapped_ref
= p
->second
;
5197 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5198 // Offset is present in output.
5199 *poutput
= mapped_ref
+ (offset
- ref
);
5201 // Offset is discarded owing to EXIDX entry merging.
5208 // Write this to output file OF.
5211 Arm_exidx_merged_section::do_write(Output_file
* of
)
5213 // If we retain or discard the whole EXIDX input section, we would
5215 gold_assert(this->data_size() != this->exidx_input_section_
.size()
5216 && this->data_size() != 0);
5218 off_t offset
= this->offset();
5219 const section_size_type oview_size
= this->data_size();
5220 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5222 Output_section
* os
= this->relobj()->output_section(this->shndx());
5223 gold_assert(os
!= NULL
);
5225 // Get contents of EXIDX input section.
5226 section_size_type section_size
;
5227 const unsigned char* section_contents
=
5228 this->relobj()->section_contents(this->shndx(), §ion_size
, false);
5229 gold_assert(section_size
== this->exidx_input_section_
.size());
5231 // Go over spans of input offsets and write only those that are not
5233 section_offset_type in_start
= 0;
5234 section_offset_type out_start
= 0;
5235 for(Arm_exidx_section_offset_map::const_iterator p
=
5236 this->section_offset_map_
.begin();
5237 p
!= this->section_offset_map_
.end();
5240 section_offset_type in_end
= p
->first
;
5241 gold_assert(in_end
>= in_start
);
5242 section_offset_type out_end
= p
->second
;
5243 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5246 size_t out_chunk_size
=
5247 convert_types
<size_t>(out_end
- out_start
+ 1);
5248 gold_assert(out_chunk_size
== in_chunk_size
);
5249 memcpy(oview
+ out_start
, section_contents
+ in_start
,
5251 out_start
+= out_chunk_size
;
5253 in_start
+= in_chunk_size
;
5256 gold_assert(convert_to_section_size_type(out_start
) == oview_size
);
5257 of
->write_output_view(this->offset(), oview_size
, oview
);
5260 // Arm_exidx_fixup methods.
5262 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5263 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5264 // points to the end of the last seen EXIDX section.
5267 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5269 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5270 && this->last_input_section_
!= NULL
)
5272 Relobj
* relobj
= this->last_input_section_
->relobj();
5273 unsigned int text_shndx
= this->last_input_section_
->link();
5274 Arm_exidx_cantunwind
* cantunwind
=
5275 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5276 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5277 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5281 // Process an EXIDX section entry in input. Return whether this entry
5282 // can be deleted in the output. SECOND_WORD in the second word of the
5286 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5289 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5291 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5292 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5293 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5295 else if ((second_word
& 0x80000000) != 0)
5297 // Inlined unwinding data. Merge if equal to previous.
5298 delete_entry
= (merge_exidx_entries_
5299 && this->last_unwind_type_
== UT_INLINED_ENTRY
5300 && this->last_inlined_entry_
== second_word
);
5301 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5302 this->last_inlined_entry_
= second_word
;
5306 // Normal table entry. In theory we could merge these too,
5307 // but duplicate entries are likely to be much less common.
5308 delete_entry
= false;
5309 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5311 return delete_entry
;
5314 // Update the current section offset map during EXIDX section fix-up.
5315 // If there is no map, create one. INPUT_OFFSET is the offset of a
5316 // reference point, DELETED_BYTES is the number of deleted by in the
5317 // section so far. If DELETE_ENTRY is true, the reference point and
5318 // all offsets after the previous reference point are discarded.
5321 Arm_exidx_fixup::update_offset_map(
5322 section_offset_type input_offset
,
5323 section_size_type deleted_bytes
,
5326 if (this->section_offset_map_
== NULL
)
5327 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5328 section_offset_type output_offset
;
5330 output_offset
= Arm_exidx_input_section::invalid_offset
;
5332 output_offset
= input_offset
- deleted_bytes
;
5333 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5336 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5337 // bytes deleted. If some entries are merged, also store a pointer to a newly
5338 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
5339 // caller owns the map and is responsible for releasing it after use.
5341 template<bool big_endian
>
5343 Arm_exidx_fixup::process_exidx_section(
5344 const Arm_exidx_input_section
* exidx_input_section
,
5345 Arm_exidx_section_offset_map
** psection_offset_map
)
5347 Relobj
* relobj
= exidx_input_section
->relobj();
5348 unsigned shndx
= exidx_input_section
->shndx();
5349 section_size_type section_size
;
5350 const unsigned char* section_contents
=
5351 relobj
->section_contents(shndx
, §ion_size
, false);
5353 if ((section_size
% 8) != 0)
5355 // Something is wrong with this section. Better not touch it.
5356 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5357 relobj
->name().c_str(), shndx
);
5358 this->last_input_section_
= exidx_input_section
;
5359 this->last_unwind_type_
= UT_NONE
;
5363 uint32_t deleted_bytes
= 0;
5364 bool prev_delete_entry
= false;
5365 gold_assert(this->section_offset_map_
== NULL
);
5367 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5369 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5371 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5372 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5374 bool delete_entry
= this->process_exidx_entry(second_word
);
5376 // Entry deletion causes changes in output offsets. We use a std::map
5377 // to record these. And entry (x, y) means input offset x
5378 // is mapped to output offset y. If y is invalid_offset, then x is
5379 // dropped in the output. Because of the way std::map::lower_bound
5380 // works, we record the last offset in a region w.r.t to keeping or
5381 // dropping. If there is no entry (x0, y0) for an input offset x0,
5382 // the output offset y0 of it is determined by the output offset y1 of
5383 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5384 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5386 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5387 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5389 // Update total deleted bytes for this entry.
5393 prev_delete_entry
= delete_entry
;
5396 // If section offset map is not NULL, make an entry for the end of
5398 if (this->section_offset_map_
!= NULL
)
5399 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5401 *psection_offset_map
= this->section_offset_map_
;
5402 this->section_offset_map_
= NULL
;
5403 this->last_input_section_
= exidx_input_section
;
5405 // Set the first output text section so that we can link the EXIDX output
5406 // section to it. Ignore any EXIDX input section that is completely merged.
5407 if (this->first_output_text_section_
== NULL
5408 && deleted_bytes
!= section_size
)
5410 unsigned int link
= exidx_input_section
->link();
5411 Output_section
* os
= relobj
->output_section(link
);
5412 gold_assert(os
!= NULL
);
5413 this->first_output_text_section_
= os
;
5416 return deleted_bytes
;
5419 // Arm_output_section methods.
5421 // Create a stub group for input sections from BEGIN to END. OWNER
5422 // points to the input section to be the owner a new stub table.
5424 template<bool big_endian
>
5426 Arm_output_section
<big_endian
>::create_stub_group(
5427 Input_section_list::const_iterator begin
,
5428 Input_section_list::const_iterator end
,
5429 Input_section_list::const_iterator owner
,
5430 Target_arm
<big_endian
>* target
,
5431 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
)
5433 // We use a different kind of relaxed section in an EXIDX section.
5434 // The static casting from Output_relaxed_input_section to
5435 // Arm_input_section is invalid in an EXIDX section. We are okay
5436 // because we should not be calling this for an EXIDX section.
5437 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5439 // Currently we convert ordinary input sections into relaxed sections only
5440 // at this point but we may want to support creating relaxed input section
5441 // very early. So we check here to see if owner is already a relaxed
5444 Arm_input_section
<big_endian
>* arm_input_section
;
5445 if (owner
->is_relaxed_input_section())
5448 Arm_input_section
<big_endian
>::as_arm_input_section(
5449 owner
->relaxed_input_section());
5453 gold_assert(owner
->is_input_section());
5454 // Create a new relaxed input section.
5456 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5457 new_relaxed_sections
->push_back(arm_input_section
);
5460 // Create a stub table.
5461 Stub_table
<big_endian
>* stub_table
=
5462 target
->new_stub_table(arm_input_section
);
5464 arm_input_section
->set_stub_table(stub_table
);
5466 Input_section_list::const_iterator p
= begin
;
5467 Input_section_list::const_iterator prev_p
;
5469 // Look for input sections or relaxed input sections in [begin ... end].
5472 if (p
->is_input_section() || p
->is_relaxed_input_section())
5474 // The stub table information for input sections live
5475 // in their objects.
5476 Arm_relobj
<big_endian
>* arm_relobj
=
5477 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5478 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5482 while (prev_p
!= end
);
5485 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5486 // of stub groups. We grow a stub group by adding input section until the
5487 // size is just below GROUP_SIZE. The last input section will be converted
5488 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5489 // input section after the stub table, effectively double the group size.
5491 // This is similar to the group_sections() function in elf32-arm.c but is
5492 // implemented differently.
5494 template<bool big_endian
>
5496 Arm_output_section
<big_endian
>::group_sections(
5497 section_size_type group_size
,
5498 bool stubs_always_after_branch
,
5499 Target_arm
<big_endian
>* target
)
5501 // We only care about sections containing code.
5502 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5505 // States for grouping.
5508 // No group is being built.
5510 // A group is being built but the stub table is not found yet.
5511 // We keep group a stub group until the size is just under GROUP_SIZE.
5512 // The last input section in the group will be used as the stub table.
5513 FINDING_STUB_SECTION
,
5514 // A group is being built and we have already found a stub table.
5515 // We enter this state to grow a stub group by adding input section
5516 // after the stub table. This effectively doubles the group size.
5520 // Any newly created relaxed sections are stored here.
5521 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5523 State state
= NO_GROUP
;
5524 section_size_type off
= 0;
5525 section_size_type group_begin_offset
= 0;
5526 section_size_type group_end_offset
= 0;
5527 section_size_type stub_table_end_offset
= 0;
5528 Input_section_list::const_iterator group_begin
=
5529 this->input_sections().end();
5530 Input_section_list::const_iterator stub_table
=
5531 this->input_sections().end();
5532 Input_section_list::const_iterator group_end
= this->input_sections().end();
5533 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5534 p
!= this->input_sections().end();
5537 section_size_type section_begin_offset
=
5538 align_address(off
, p
->addralign());
5539 section_size_type section_end_offset
=
5540 section_begin_offset
+ p
->data_size();
5542 // Check to see if we should group the previously seens sections.
5548 case FINDING_STUB_SECTION
:
5549 // Adding this section makes the group larger than GROUP_SIZE.
5550 if (section_end_offset
- group_begin_offset
>= group_size
)
5552 if (stubs_always_after_branch
)
5554 gold_assert(group_end
!= this->input_sections().end());
5555 this->create_stub_group(group_begin
, group_end
, group_end
,
5556 target
, &new_relaxed_sections
);
5561 // But wait, there's more! Input sections up to
5562 // stub_group_size bytes after the stub table can be
5563 // handled by it too.
5564 state
= HAS_STUB_SECTION
;
5565 stub_table
= group_end
;
5566 stub_table_end_offset
= group_end_offset
;
5571 case HAS_STUB_SECTION
:
5572 // Adding this section makes the post stub-section group larger
5574 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5576 gold_assert(group_end
!= this->input_sections().end());
5577 this->create_stub_group(group_begin
, group_end
, stub_table
,
5578 target
, &new_relaxed_sections
);
5587 // If we see an input section and currently there is no group, start
5588 // a new one. Skip any empty sections.
5589 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5590 && (p
->relobj()->section_size(p
->shndx()) != 0))
5592 if (state
== NO_GROUP
)
5594 state
= FINDING_STUB_SECTION
;
5596 group_begin_offset
= section_begin_offset
;
5599 // Keep track of the last input section seen.
5601 group_end_offset
= section_end_offset
;
5604 off
= section_end_offset
;
5607 // Create a stub group for any ungrouped sections.
5608 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5610 gold_assert(group_end
!= this->input_sections().end());
5611 this->create_stub_group(group_begin
, group_end
,
5612 (state
== FINDING_STUB_SECTION
5615 target
, &new_relaxed_sections
);
5618 // Convert input section into relaxed input section in a batch.
5619 if (!new_relaxed_sections
.empty())
5620 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5622 // Update the section offsets
5623 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5625 Arm_relobj
<big_endian
>* arm_relobj
=
5626 Arm_relobj
<big_endian
>::as_arm_relobj(
5627 new_relaxed_sections
[i
]->relobj());
5628 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5629 // Tell Arm_relobj that this input section is converted.
5630 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5634 // Append non empty text sections in this to LIST in ascending
5635 // order of their position in this.
5637 template<bool big_endian
>
5639 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5640 Text_section_list
* list
)
5642 // We only care about text sections.
5643 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5646 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5648 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5649 p
!= this->input_sections().end();
5652 // We only care about plain or relaxed input sections. We also
5653 // ignore any merged sections.
5654 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5655 && p
->data_size() != 0)
5656 list
->push_back(Text_section_list::value_type(p
->relobj(),
5661 template<bool big_endian
>
5663 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5665 const Text_section_list
& sorted_text_sections
,
5666 Symbol_table
* symtab
,
5667 bool merge_exidx_entries
)
5669 // We should only do this for the EXIDX output section.
5670 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5672 // We don't want the relaxation loop to undo these changes, so we discard
5673 // the current saved states and take another one after the fix-up.
5674 this->discard_states();
5676 // Remove all input sections.
5677 uint64_t address
= this->address();
5678 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5679 Input_section_list input_sections
;
5680 this->reset_address_and_file_offset();
5681 this->get_input_sections(address
, std::string(""), &input_sections
);
5683 if (!this->input_sections().empty())
5684 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5686 // Go through all the known input sections and record them.
5687 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5688 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5689 Section_id_hash
> Text_to_exidx_map
;
5690 Text_to_exidx_map text_to_exidx_map
;
5691 for (Input_section_list::const_iterator p
= input_sections
.begin();
5692 p
!= input_sections
.end();
5695 // This should never happen. At this point, we should only see
5696 // plain EXIDX input sections.
5697 gold_assert(!p
->is_relaxed_input_section());
5698 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5701 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5703 // Go over the sorted text sections.
5704 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5705 Section_id_set processed_input_sections
;
5706 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5707 p
!= sorted_text_sections
.end();
5710 Relobj
* relobj
= p
->first
;
5711 unsigned int shndx
= p
->second
;
5713 Arm_relobj
<big_endian
>* arm_relobj
=
5714 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5715 const Arm_exidx_input_section
* exidx_input_section
=
5716 arm_relobj
->exidx_input_section_by_link(shndx
);
5718 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5719 // entry pointing to the end of the last seen EXIDX section.
5720 if (exidx_input_section
== NULL
)
5722 exidx_fixup
.add_exidx_cantunwind_as_needed();
5726 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5727 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5728 Section_id
sid(exidx_relobj
, exidx_shndx
);
5729 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5730 if (iter
== text_to_exidx_map
.end())
5732 // This is odd. We have not seen this EXIDX input section before.
5733 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5734 // issue a warning instead. We assume the user knows what he
5735 // or she is doing. Otherwise, this is an error.
5736 if (layout
->script_options()->saw_sections_clause())
5737 gold_warning(_("unwinding may not work because EXIDX input section"
5738 " %u of %s is not in EXIDX output section"),
5739 exidx_shndx
, exidx_relobj
->name().c_str());
5741 gold_error(_("unwinding may not work because EXIDX input section"
5742 " %u of %s is not in EXIDX output section"),
5743 exidx_shndx
, exidx_relobj
->name().c_str());
5745 exidx_fixup
.add_exidx_cantunwind_as_needed();
5749 // Fix up coverage and append input section to output data list.
5750 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5751 uint32_t deleted_bytes
=
5752 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5753 §ion_offset_map
);
5755 if (deleted_bytes
== exidx_input_section
->size())
5757 // The whole EXIDX section got merged. Remove it from output.
5758 gold_assert(section_offset_map
== NULL
);
5759 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5761 // All local symbols defined in this input section will be dropped.
5762 // We need to adjust output local symbol count.
5763 arm_relobj
->set_output_local_symbol_count_needs_update();
5765 else if (deleted_bytes
> 0)
5767 // Some entries are merged. We need to convert this EXIDX input
5768 // section into a relaxed section.
5769 gold_assert(section_offset_map
!= NULL
);
5770 Arm_exidx_merged_section
* merged_section
=
5771 new Arm_exidx_merged_section(*exidx_input_section
,
5772 *section_offset_map
, deleted_bytes
);
5773 this->add_relaxed_input_section(merged_section
);
5774 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5776 // All local symbols defined in discarded portions of this input
5777 // section will be dropped. We need to adjust output local symbol
5779 arm_relobj
->set_output_local_symbol_count_needs_update();
5783 // Just add back the EXIDX input section.
5784 gold_assert(section_offset_map
== NULL
);
5785 const Output_section::Input_section
* pis
= iter
->second
;
5786 gold_assert(pis
->is_input_section());
5787 this->add_script_input_section(*pis
);
5790 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5793 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5794 exidx_fixup
.add_exidx_cantunwind_as_needed();
5796 // Remove any known EXIDX input sections that are not processed.
5797 for (Input_section_list::const_iterator p
= input_sections
.begin();
5798 p
!= input_sections
.end();
5801 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5802 == processed_input_sections
.end())
5804 // We only discard a known EXIDX section because its linked
5805 // text section has been folded by ICF.
5806 Arm_relobj
<big_endian
>* arm_relobj
=
5807 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5808 const Arm_exidx_input_section
* exidx_input_section
=
5809 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5810 gold_assert(exidx_input_section
!= NULL
);
5811 unsigned int text_shndx
= exidx_input_section
->link();
5812 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5814 // Remove this from link. We also need to recount the
5816 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5817 arm_relobj
->set_output_local_symbol_count_needs_update();
5821 // Link exidx output section to the first seen output section and
5822 // set correct entry size.
5823 this->set_link_section(exidx_fixup
.first_output_text_section());
5824 this->set_entsize(8);
5826 // Make changes permanent.
5827 this->save_states();
5828 this->set_section_offsets_need_adjustment();
5831 // Arm_relobj methods.
5833 // Determine if an input section is scannable for stub processing. SHDR is
5834 // the header of the section and SHNDX is the section index. OS is the output
5835 // section for the input section and SYMTAB is the global symbol table used to
5836 // look up ICF information.
5838 template<bool big_endian
>
5840 Arm_relobj
<big_endian
>::section_is_scannable(
5841 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5843 const Output_section
* os
,
5844 const Symbol_table
*symtab
)
5846 // Skip any empty sections, unallocated sections or sections whose
5847 // type are not SHT_PROGBITS.
5848 if (shdr
.get_sh_size() == 0
5849 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
5850 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
5853 // Skip any discarded or ICF'ed sections.
5854 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
5857 // If this requires special offset handling, check to see if it is
5858 // a relaxed section. If this is not, then it is a merged section that
5859 // we cannot handle.
5860 if (this->is_output_section_offset_invalid(shndx
))
5862 const Output_relaxed_input_section
* poris
=
5863 os
->find_relaxed_input_section(this, shndx
);
5871 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5872 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5874 template<bool big_endian
>
5876 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
5877 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5878 const Relobj::Output_sections
& out_sections
,
5879 const Symbol_table
*symtab
,
5880 const unsigned char* pshdrs
)
5882 unsigned int sh_type
= shdr
.get_sh_type();
5883 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
5886 // Ignore empty section.
5887 off_t sh_size
= shdr
.get_sh_size();
5891 // Ignore reloc section with unexpected symbol table. The
5892 // error will be reported in the final link.
5893 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
5896 unsigned int reloc_size
;
5897 if (sh_type
== elfcpp::SHT_REL
)
5898 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
5900 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
5902 // Ignore reloc section with unexpected entsize or uneven size.
5903 // The error will be reported in the final link.
5904 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
5907 // Ignore reloc section with bad info. This error will be
5908 // reported in the final link.
5909 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
5910 if (index
>= this->shnum())
5913 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
5914 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
5915 return this->section_is_scannable(text_shdr
, index
,
5916 out_sections
[index
], symtab
);
5919 // Return the output address of either a plain input section or a relaxed
5920 // input section. SHNDX is the section index. We define and use this
5921 // instead of calling Output_section::output_address because that is slow
5922 // for large output.
5924 template<bool big_endian
>
5926 Arm_relobj
<big_endian
>::simple_input_section_output_address(
5930 if (this->is_output_section_offset_invalid(shndx
))
5932 const Output_relaxed_input_section
* poris
=
5933 os
->find_relaxed_input_section(this, shndx
);
5934 // We do not handle merged sections here.
5935 gold_assert(poris
!= NULL
);
5936 return poris
->address();
5939 return os
->address() + this->get_output_section_offset(shndx
);
5942 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5943 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5945 template<bool big_endian
>
5947 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
5948 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5951 const Symbol_table
* symtab
)
5953 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
5956 // If the section does not cross any 4K-boundaries, it does not need to
5958 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
5959 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
5965 // Scan a section for Cortex-A8 workaround.
5967 template<bool big_endian
>
5969 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
5970 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5973 Target_arm
<big_endian
>* arm_target
)
5975 // Look for the first mapping symbol in this section. It should be
5977 Mapping_symbol_position
section_start(shndx
, 0);
5978 typename
Mapping_symbols_info::const_iterator p
=
5979 this->mapping_symbols_info_
.lower_bound(section_start
);
5981 // There are no mapping symbols for this section. Treat it as a data-only
5982 // section. Issue a warning if section is marked as containing
5984 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
5986 if ((this->section_flags(shndx
) & elfcpp::SHF_EXECINSTR
) != 0)
5987 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
5988 "erratum because it has no mapping symbols."),
5989 shndx
, this->name().c_str());
5993 Arm_address output_address
=
5994 this->simple_input_section_output_address(shndx
, os
);
5996 // Get the section contents.
5997 section_size_type input_view_size
= 0;
5998 const unsigned char* input_view
=
5999 this->section_contents(shndx
, &input_view_size
, false);
6001 // We need to go through the mapping symbols to determine what to
6002 // scan. There are two reasons. First, we should look at THUMB code and
6003 // THUMB code only. Second, we only want to look at the 4K-page boundary
6004 // to speed up the scanning.
6006 while (p
!= this->mapping_symbols_info_
.end()
6007 && p
->first
.first
== shndx
)
6009 typename
Mapping_symbols_info::const_iterator next
=
6010 this->mapping_symbols_info_
.upper_bound(p
->first
);
6012 // Only scan part of a section with THUMB code.
6013 if (p
->second
== 't')
6015 // Determine the end of this range.
6016 section_size_type span_start
=
6017 convert_to_section_size_type(p
->first
.second
);
6018 section_size_type span_end
;
6019 if (next
!= this->mapping_symbols_info_
.end()
6020 && next
->first
.first
== shndx
)
6021 span_end
= convert_to_section_size_type(next
->first
.second
);
6023 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6025 if (((span_start
+ output_address
) & ~0xfffUL
)
6026 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6028 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6029 span_start
, span_end
,
6039 // Scan relocations for stub generation.
6041 template<bool big_endian
>
6043 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6044 Target_arm
<big_endian
>* arm_target
,
6045 const Symbol_table
* symtab
,
6046 const Layout
* layout
)
6048 unsigned int shnum
= this->shnum();
6049 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6051 // Read the section headers.
6052 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6056 // To speed up processing, we set up hash tables for fast lookup of
6057 // input offsets to output addresses.
6058 this->initialize_input_to_output_maps();
6060 const Relobj::Output_sections
& out_sections(this->output_sections());
6062 Relocate_info
<32, big_endian
> relinfo
;
6063 relinfo
.symtab
= symtab
;
6064 relinfo
.layout
= layout
;
6065 relinfo
.object
= this;
6067 // Do relocation stubs scanning.
6068 const unsigned char* p
= pshdrs
+ shdr_size
;
6069 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6071 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6072 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6075 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6076 Arm_address output_offset
= this->get_output_section_offset(index
);
6077 Arm_address output_address
;
6078 if (output_offset
!= invalid_address
)
6079 output_address
= out_sections
[index
]->address() + output_offset
;
6082 // Currently this only happens for a relaxed section.
6083 const Output_relaxed_input_section
* poris
=
6084 out_sections
[index
]->find_relaxed_input_section(this, index
);
6085 gold_assert(poris
!= NULL
);
6086 output_address
= poris
->address();
6089 // Get the relocations.
6090 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6094 // Get the section contents. This does work for the case in which
6095 // we modify the contents of an input section. We need to pass the
6096 // output view under such circumstances.
6097 section_size_type input_view_size
= 0;
6098 const unsigned char* input_view
=
6099 this->section_contents(index
, &input_view_size
, false);
6101 relinfo
.reloc_shndx
= i
;
6102 relinfo
.data_shndx
= index
;
6103 unsigned int sh_type
= shdr
.get_sh_type();
6104 unsigned int reloc_size
;
6105 if (sh_type
== elfcpp::SHT_REL
)
6106 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6108 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6110 Output_section
* os
= out_sections
[index
];
6111 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6112 shdr
.get_sh_size() / reloc_size
,
6114 output_offset
== invalid_address
,
6115 input_view
, output_address
,
6120 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6121 // after its relocation section, if there is one, is processed for
6122 // relocation stubs. Merging this loop with the one above would have been
6123 // complicated since we would have had to make sure that relocation stub
6124 // scanning is done first.
6125 if (arm_target
->fix_cortex_a8())
6127 const unsigned char* p
= pshdrs
+ shdr_size
;
6128 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6130 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6131 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6134 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6139 // After we've done the relocations, we release the hash tables,
6140 // since we no longer need them.
6141 this->free_input_to_output_maps();
6144 // Count the local symbols. The ARM backend needs to know if a symbol
6145 // is a THUMB function or not. For global symbols, it is easy because
6146 // the Symbol object keeps the ELF symbol type. For local symbol it is
6147 // harder because we cannot access this information. So we override the
6148 // do_count_local_symbol in parent and scan local symbols to mark
6149 // THUMB functions. This is not the most efficient way but I do not want to
6150 // slow down other ports by calling a per symbol targer hook inside
6151 // Sized_relobj<size, big_endian>::do_count_local_symbols.
6153 template<bool big_endian
>
6155 Arm_relobj
<big_endian
>::do_count_local_symbols(
6156 Stringpool_template
<char>* pool
,
6157 Stringpool_template
<char>* dynpool
)
6159 // We need to fix-up the values of any local symbols whose type are
6162 // Ask parent to count the local symbols.
6163 Sized_relobj
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6164 const unsigned int loccount
= this->local_symbol_count();
6168 // Intialize the thumb function bit-vector.
6169 std::vector
<bool> empty_vector(loccount
, false);
6170 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6172 // Read the symbol table section header.
6173 const unsigned int symtab_shndx
= this->symtab_shndx();
6174 elfcpp::Shdr
<32, big_endian
>
6175 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6176 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6178 // Read the local symbols.
6179 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6180 gold_assert(loccount
== symtabshdr
.get_sh_info());
6181 off_t locsize
= loccount
* sym_size
;
6182 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6183 locsize
, true, true);
6185 // For mapping symbol processing, we need to read the symbol names.
6186 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6187 if (strtab_shndx
>= this->shnum())
6189 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6193 elfcpp::Shdr
<32, big_endian
>
6194 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6195 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6197 this->error(_("symbol table name section has wrong type: %u"),
6198 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6201 const char* pnames
=
6202 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6203 strtabshdr
.get_sh_size(),
6206 // Loop over the local symbols and mark any local symbols pointing
6207 // to THUMB functions.
6209 // Skip the first dummy symbol.
6211 typename Sized_relobj
<32, big_endian
>::Local_values
* plocal_values
=
6212 this->local_values();
6213 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6215 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6216 elfcpp::STT st_type
= sym
.get_st_type();
6217 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6218 Arm_address input_value
= lv
.input_value();
6220 // Check to see if this is a mapping symbol.
6221 const char* sym_name
= pnames
+ sym
.get_st_name();
6222 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6225 unsigned int input_shndx
=
6226 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6227 gold_assert(is_ordinary
);
6229 // Strip of LSB in case this is a THUMB symbol.
6230 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6231 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6234 if (st_type
== elfcpp::STT_ARM_TFUNC
6235 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6237 // This is a THUMB function. Mark this and canonicalize the
6238 // symbol value by setting LSB.
6239 this->local_symbol_is_thumb_function_
[i
] = true;
6240 if ((input_value
& 1) == 0)
6241 lv
.set_input_value(input_value
| 1);
6246 // Relocate sections.
6247 template<bool big_endian
>
6249 Arm_relobj
<big_endian
>::do_relocate_sections(
6250 const Symbol_table
* symtab
,
6251 const Layout
* layout
,
6252 const unsigned char* pshdrs
,
6253 typename Sized_relobj
<32, big_endian
>::Views
* pviews
)
6255 // Call parent to relocate sections.
6256 Sized_relobj
<32, big_endian
>::do_relocate_sections(symtab
, layout
, pshdrs
,
6259 // We do not generate stubs if doing a relocatable link.
6260 if (parameters
->options().relocatable())
6263 // Relocate stub tables.
6264 unsigned int shnum
= this->shnum();
6266 Target_arm
<big_endian
>* arm_target
=
6267 Target_arm
<big_endian
>::default_target();
6269 Relocate_info
<32, big_endian
> relinfo
;
6270 relinfo
.symtab
= symtab
;
6271 relinfo
.layout
= layout
;
6272 relinfo
.object
= this;
6274 for (unsigned int i
= 1; i
< shnum
; ++i
)
6276 Arm_input_section
<big_endian
>* arm_input_section
=
6277 arm_target
->find_arm_input_section(this, i
);
6279 if (arm_input_section
!= NULL
6280 && arm_input_section
->is_stub_table_owner()
6281 && !arm_input_section
->stub_table()->empty())
6283 // We cannot discard a section if it owns a stub table.
6284 Output_section
* os
= this->output_section(i
);
6285 gold_assert(os
!= NULL
);
6287 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6288 relinfo
.reloc_shdr
= NULL
;
6289 relinfo
.data_shndx
= i
;
6290 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6292 gold_assert((*pviews
)[i
].view
!= NULL
);
6294 // We are passed the output section view. Adjust it to cover the
6296 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6297 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6298 && ((stub_table
->address() + stub_table
->data_size())
6299 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6301 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6302 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6303 Arm_address address
= stub_table
->address();
6304 section_size_type view_size
= stub_table
->data_size();
6306 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6310 // Apply Cortex A8 workaround if applicable.
6311 if (this->section_has_cortex_a8_workaround(i
))
6313 unsigned char* view
= (*pviews
)[i
].view
;
6314 Arm_address view_address
= (*pviews
)[i
].address
;
6315 section_size_type view_size
= (*pviews
)[i
].view_size
;
6316 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6318 // Adjust view to cover section.
6319 Output_section
* os
= this->output_section(i
);
6320 gold_assert(os
!= NULL
);
6321 Arm_address section_address
=
6322 this->simple_input_section_output_address(i
, os
);
6323 uint64_t section_size
= this->section_size(i
);
6325 gold_assert(section_address
>= view_address
6326 && ((section_address
+ section_size
)
6327 <= (view_address
+ view_size
)));
6329 unsigned char* section_view
= view
+ (section_address
- view_address
);
6331 // Apply the Cortex-A8 workaround to the output address range
6332 // corresponding to this input section.
6333 stub_table
->apply_cortex_a8_workaround_to_address_range(
6342 // Find the linked text section of an EXIDX section by looking the the first
6343 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6344 // must be linked to to its associated code section via the sh_link field of
6345 // its section header. However, some tools are broken and the link is not
6346 // always set. LD just drops such an EXIDX section silently, causing the
6347 // associated code not unwindabled. Here we try a little bit harder to
6348 // discover the linked code section.
6350 // PSHDR points to the section header of a relocation section of an EXIDX
6351 // section. If we can find a linked text section, return true and
6352 // store the text section index in the location PSHNDX. Otherwise
6355 template<bool big_endian
>
6357 Arm_relobj
<big_endian
>::find_linked_text_section(
6358 const unsigned char* pshdr
,
6359 const unsigned char* psyms
,
6360 unsigned int* pshndx
)
6362 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6364 // If there is no relocation, we cannot find the linked text section.
6366 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6367 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6369 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6370 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6372 // Get the relocations.
6373 const unsigned char* prelocs
=
6374 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6376 // Find the REL31 relocation for the first word of the first EXIDX entry.
6377 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6379 Arm_address r_offset
;
6380 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6381 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6383 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6384 r_info
= reloc
.get_r_info();
6385 r_offset
= reloc
.get_r_offset();
6389 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6390 r_info
= reloc
.get_r_info();
6391 r_offset
= reloc
.get_r_offset();
6394 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6395 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6398 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6400 || r_sym
>= this->local_symbol_count()
6404 // This is the relocation for the first word of the first EXIDX entry.
6405 // We expect to see a local section symbol.
6406 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6407 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6408 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6412 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6413 gold_assert(is_ordinary
);
6423 // Make an EXIDX input section object for an EXIDX section whose index is
6424 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6425 // is the section index of the linked text section.
6427 template<bool big_endian
>
6429 Arm_relobj
<big_endian
>::make_exidx_input_section(
6431 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6432 unsigned int text_shndx
)
6434 // Issue an error and ignore this EXIDX section if it points to a text
6435 // section already has an EXIDX section.
6436 if (this->exidx_section_map_
[text_shndx
] != NULL
)
6438 gold_error(_("EXIDX sections %u and %u both link to text section %u "
6440 shndx
, this->exidx_section_map_
[text_shndx
]->shndx(),
6441 text_shndx
, this->name().c_str());
6445 // Create an Arm_exidx_input_section object for this EXIDX section.
6446 Arm_exidx_input_section
* exidx_input_section
=
6447 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6448 shdr
.get_sh_addralign());
6449 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6451 // Also map the EXIDX section index to this.
6452 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6453 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6456 // Read the symbol information.
6458 template<bool big_endian
>
6460 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6462 // Call parent class to read symbol information.
6463 Sized_relobj
<32, big_endian
>::do_read_symbols(sd
);
6465 // If this input file is a binary file, it has no processor
6466 // specific flags and attributes section.
6467 Input_file::Format format
= this->input_file()->format();
6468 if (format
!= Input_file::FORMAT_ELF
)
6470 gold_assert(format
== Input_file::FORMAT_BINARY
);
6471 this->merge_flags_and_attributes_
= false;
6475 // Read processor-specific flags in ELF file header.
6476 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6477 elfcpp::Elf_sizes
<32>::ehdr_size
,
6479 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6480 this->processor_specific_flags_
= ehdr
.get_e_flags();
6482 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6484 std::vector
<unsigned int> deferred_exidx_sections
;
6485 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6486 const unsigned char* pshdrs
= sd
->section_headers
->data();
6487 const unsigned char *ps
= pshdrs
+ shdr_size
;
6488 bool must_merge_flags_and_attributes
= false;
6489 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6491 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6493 // Sometimes an object has no contents except the section name string
6494 // table and an empty symbol table with the undefined symbol. We
6495 // don't want to merge processor-specific flags from such an object.
6496 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6498 // Symbol table is not empty.
6499 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6500 elfcpp::Elf_sizes
<32>::sym_size
;
6501 if (shdr
.get_sh_size() > sym_size
)
6502 must_merge_flags_and_attributes
= true;
6504 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6505 // If this is neither an empty symbol table nor a string table,
6507 must_merge_flags_and_attributes
= true;
6509 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6511 gold_assert(this->attributes_section_data_
== NULL
);
6512 section_offset_type section_offset
= shdr
.get_sh_offset();
6513 section_size_type section_size
=
6514 convert_to_section_size_type(shdr
.get_sh_size());
6515 File_view
* view
= this->get_lasting_view(section_offset
,
6516 section_size
, true, false);
6517 this->attributes_section_data_
=
6518 new Attributes_section_data(view
->data(), section_size
);
6520 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6522 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6523 if (text_shndx
>= this->shnum())
6524 gold_error(_("EXIDX section %u linked to invalid section %u"),
6526 else if (text_shndx
== elfcpp::SHN_UNDEF
)
6527 deferred_exidx_sections
.push_back(i
);
6529 this->make_exidx_input_section(i
, shdr
, text_shndx
);
6534 if (!must_merge_flags_and_attributes
)
6536 this->merge_flags_and_attributes_
= false;
6540 // Some tools are broken and they do not set the link of EXIDX sections.
6541 // We look at the first relocation to figure out the linked sections.
6542 if (!deferred_exidx_sections
.empty())
6544 // We need to go over the section headers again to find the mapping
6545 // from sections being relocated to their relocation sections. This is
6546 // a bit inefficient as we could do that in the loop above. However,
6547 // we do not expect any deferred EXIDX sections normally. So we do not
6548 // want to slow down the most common path.
6549 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6550 Reloc_map reloc_map
;
6551 ps
= pshdrs
+ shdr_size
;
6552 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6554 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6555 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6556 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6558 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6559 if (info_shndx
>= this->shnum())
6560 gold_error(_("relocation section %u has invalid info %u"),
6562 Reloc_map::value_type
value(info_shndx
, i
);
6563 std::pair
<Reloc_map::iterator
, bool> result
=
6564 reloc_map
.insert(value
);
6566 gold_error(_("section %u has multiple relocation sections "
6568 info_shndx
, i
, reloc_map
[info_shndx
]);
6572 // Read the symbol table section header.
6573 const unsigned int symtab_shndx
= this->symtab_shndx();
6574 elfcpp::Shdr
<32, big_endian
>
6575 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6576 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6578 // Read the local symbols.
6579 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6580 const unsigned int loccount
= this->local_symbol_count();
6581 gold_assert(loccount
== symtabshdr
.get_sh_info());
6582 off_t locsize
= loccount
* sym_size
;
6583 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6584 locsize
, true, true);
6586 // Process the deferred EXIDX sections.
6587 for(unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6589 unsigned int shndx
= deferred_exidx_sections
[i
];
6590 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6591 unsigned int text_shndx
;
6592 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6593 if (it
!= reloc_map
.end()
6594 && find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6595 psyms
, &text_shndx
))
6596 this->make_exidx_input_section(shndx
, shdr
, text_shndx
);
6598 gold_error(_("EXIDX section %u has no linked text section."),
6604 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6605 // sections for unwinding. These sections are referenced implicitly by
6606 // text sections linked in the section headers. If we ignore these implict
6607 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6608 // will be garbage-collected incorrectly. Hence we override the same function
6609 // in the base class to handle these implicit references.
6611 template<bool big_endian
>
6613 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6615 Read_relocs_data
* rd
)
6617 // First, call base class method to process relocations in this object.
6618 Sized_relobj
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6620 // If --gc-sections is not specified, there is nothing more to do.
6621 // This happens when --icf is used but --gc-sections is not.
6622 if (!parameters
->options().gc_sections())
6625 unsigned int shnum
= this->shnum();
6626 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6627 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6631 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6632 // to these from the linked text sections.
6633 const unsigned char* ps
= pshdrs
+ shdr_size
;
6634 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6636 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6637 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6639 // Found an .ARM.exidx section, add it to the set of reachable
6640 // sections from its linked text section.
6641 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6642 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6647 // Update output local symbol count. Owing to EXIDX entry merging, some local
6648 // symbols will be removed in output. Adjust output local symbol count
6649 // accordingly. We can only changed the static output local symbol count. It
6650 // is too late to change the dynamic symbols.
6652 template<bool big_endian
>
6654 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6656 // Caller should check that this needs updating. We want caller checking
6657 // because output_local_symbol_count_needs_update() is most likely inlined.
6658 gold_assert(this->output_local_symbol_count_needs_update_
);
6660 gold_assert(this->symtab_shndx() != -1U);
6661 if (this->symtab_shndx() == 0)
6663 // This object has no symbols. Weird but legal.
6667 // Read the symbol table section header.
6668 const unsigned int symtab_shndx
= this->symtab_shndx();
6669 elfcpp::Shdr
<32, big_endian
>
6670 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6671 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6673 // Read the local symbols.
6674 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6675 const unsigned int loccount
= this->local_symbol_count();
6676 gold_assert(loccount
== symtabshdr
.get_sh_info());
6677 off_t locsize
= loccount
* sym_size
;
6678 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6679 locsize
, true, true);
6681 // Loop over the local symbols.
6683 typedef typename Sized_relobj
<32, big_endian
>::Output_sections
6685 const Output_sections
& out_sections(this->output_sections());
6686 unsigned int shnum
= this->shnum();
6687 unsigned int count
= 0;
6688 // Skip the first, dummy, symbol.
6690 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6692 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6694 Symbol_value
<32>& lv((*this->local_values())[i
]);
6696 // This local symbol was already discarded by do_count_local_symbols.
6697 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
6701 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
6706 Output_section
* os
= out_sections
[shndx
];
6708 // This local symbol no longer has an output section. Discard it.
6711 lv
.set_no_output_symtab_entry();
6715 // Currently we only discard parts of EXIDX input sections.
6716 // We explicitly check for a merged EXIDX input section to avoid
6717 // calling Output_section_data::output_offset unless necessary.
6718 if ((this->get_output_section_offset(shndx
) == invalid_address
)
6719 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
6721 section_offset_type output_offset
=
6722 os
->output_offset(this, shndx
, lv
.input_value());
6723 if (output_offset
== -1)
6725 // This symbol is defined in a part of an EXIDX input section
6726 // that is discarded due to entry merging.
6727 lv
.set_no_output_symtab_entry();
6736 this->set_output_local_symbol_count(count
);
6737 this->output_local_symbol_count_needs_update_
= false;
6740 // Arm_dynobj methods.
6742 // Read the symbol information.
6744 template<bool big_endian
>
6746 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6748 // Call parent class to read symbol information.
6749 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6751 // Read processor-specific flags in ELF file header.
6752 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6753 elfcpp::Elf_sizes
<32>::ehdr_size
,
6755 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6756 this->processor_specific_flags_
= ehdr
.get_e_flags();
6758 // Read the attributes section if there is one.
6759 // We read from the end because gas seems to put it near the end of
6760 // the section headers.
6761 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6762 const unsigned char *ps
=
6763 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6764 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6766 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6767 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6769 section_offset_type section_offset
= shdr
.get_sh_offset();
6770 section_size_type section_size
=
6771 convert_to_section_size_type(shdr
.get_sh_size());
6772 File_view
* view
= this->get_lasting_view(section_offset
,
6773 section_size
, true, false);
6774 this->attributes_section_data_
=
6775 new Attributes_section_data(view
->data(), section_size
);
6781 // Stub_addend_reader methods.
6783 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6785 template<bool big_endian
>
6786 elfcpp::Elf_types
<32>::Elf_Swxword
6787 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
6788 unsigned int r_type
,
6789 const unsigned char* view
,
6790 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
6792 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
6796 case elfcpp::R_ARM_CALL
:
6797 case elfcpp::R_ARM_JUMP24
:
6798 case elfcpp::R_ARM_PLT32
:
6800 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
6801 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6802 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
6803 return utils::sign_extend
<26>(val
<< 2);
6806 case elfcpp::R_ARM_THM_CALL
:
6807 case elfcpp::R_ARM_THM_JUMP24
:
6808 case elfcpp::R_ARM_THM_XPC22
:
6810 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
6811 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6812 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
6813 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
6814 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
6817 case elfcpp::R_ARM_THM_JUMP19
:
6819 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
6820 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6821 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
6822 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
6823 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
6831 // Arm_output_data_got methods.
6833 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
6834 // The first one is initialized to be 1, which is the module index for
6835 // the main executable and the second one 0. A reloc of the type
6836 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
6837 // be applied by gold. GSYM is a global symbol.
6839 template<bool big_endian
>
6841 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
6842 unsigned int got_type
,
6845 if (gsym
->has_got_offset(got_type
))
6848 // We are doing a static link. Just mark it as belong to module 1,
6850 unsigned int got_offset
= this->add_constant(1);
6851 gsym
->set_got_offset(got_type
, got_offset
);
6852 got_offset
= this->add_constant(0);
6853 this->static_relocs_
.push_back(Static_reloc(got_offset
,
6854 elfcpp::R_ARM_TLS_DTPOFF32
,
6858 // Same as the above but for a local symbol.
6860 template<bool big_endian
>
6862 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
6863 unsigned int got_type
,
6864 Sized_relobj
<32, big_endian
>* object
,
6867 if (object
->local_has_got_offset(index
, got_type
))
6870 // We are doing a static link. Just mark it as belong to module 1,
6872 unsigned int got_offset
= this->add_constant(1);
6873 object
->set_local_got_offset(index
, got_type
, got_offset
);
6874 got_offset
= this->add_constant(0);
6875 this->static_relocs_
.push_back(Static_reloc(got_offset
,
6876 elfcpp::R_ARM_TLS_DTPOFF32
,
6880 template<bool big_endian
>
6882 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
6884 // Call parent to write out GOT.
6885 Output_data_got
<32, big_endian
>::do_write(of
);
6887 // We are done if there is no fix up.
6888 if (this->static_relocs_
.empty())
6891 gold_assert(parameters
->doing_static_link());
6893 const off_t offset
= this->offset();
6894 const section_size_type oview_size
=
6895 convert_to_section_size_type(this->data_size());
6896 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
6898 Output_segment
* tls_segment
= this->layout_
->tls_segment();
6899 gold_assert(tls_segment
!= NULL
);
6901 // The thread pointer $tp points to the TCB, which is followed by the
6902 // TLS. So we need to adjust $tp relative addressing by this amount.
6903 Arm_address aligned_tcb_size
=
6904 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
6906 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
6908 Static_reloc
& reloc(this->static_relocs_
[i
]);
6911 if (!reloc
.symbol_is_global())
6913 Sized_relobj
<32, big_endian
>* object
= reloc
.relobj();
6914 const Symbol_value
<32>* psymval
=
6915 reloc
.relobj()->local_symbol(reloc
.index());
6917 // We are doing static linking. Issue an error and skip this
6918 // relocation if the symbol is undefined or in a discarded_section.
6920 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
6921 if ((shndx
== elfcpp::SHN_UNDEF
)
6923 && shndx
!= elfcpp::SHN_UNDEF
6924 && !object
->is_section_included(shndx
)
6925 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
6927 gold_error(_("undefined or discarded local symbol %u from "
6928 " object %s in GOT"),
6929 reloc
.index(), reloc
.relobj()->name().c_str());
6933 value
= psymval
->value(object
, 0);
6937 const Symbol
* gsym
= reloc
.symbol();
6938 gold_assert(gsym
!= NULL
);
6939 if (gsym
->is_forwarder())
6940 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
6942 // We are doing static linking. Issue an error and skip this
6943 // relocation if the symbol is undefined or in a discarded_section
6944 // unless it is a weakly_undefined symbol.
6945 if ((gsym
->is_defined_in_discarded_section()
6946 || gsym
->is_undefined())
6947 && !gsym
->is_weak_undefined())
6949 gold_error(_("undefined or discarded symbol %s in GOT"),
6954 if (!gsym
->is_weak_undefined())
6956 const Sized_symbol
<32>* sym
=
6957 static_cast<const Sized_symbol
<32>*>(gsym
);
6958 value
= sym
->value();
6964 unsigned got_offset
= reloc
.got_offset();
6965 gold_assert(got_offset
< oview_size
);
6967 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
6968 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
6970 switch (reloc
.r_type())
6972 case elfcpp::R_ARM_TLS_DTPOFF32
:
6975 case elfcpp::R_ARM_TLS_TPOFF32
:
6976 x
= value
+ aligned_tcb_size
;
6981 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
6984 of
->write_output_view(offset
, oview_size
, oview
);
6987 // A class to handle the PLT data.
6989 template<bool big_endian
>
6990 class Output_data_plt_arm
: public Output_section_data
6993 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
6996 Output_data_plt_arm(Layout
*, Output_data_space
*);
6998 // Add an entry to the PLT.
7000 add_entry(Symbol
* gsym
);
7002 // Return the .rel.plt section data.
7003 const Reloc_section
*
7005 { return this->rel_
; }
7009 do_adjust_output_section(Output_section
* os
);
7011 // Write to a map file.
7013 do_print_to_mapfile(Mapfile
* mapfile
) const
7014 { mapfile
->print_output_data(this, _("** PLT")); }
7017 // Template for the first PLT entry.
7018 static const uint32_t first_plt_entry
[5];
7020 // Template for subsequent PLT entries.
7021 static const uint32_t plt_entry
[3];
7023 // Set the final size.
7025 set_final_data_size()
7027 this->set_data_size(sizeof(first_plt_entry
)
7028 + this->count_
* sizeof(plt_entry
));
7031 // Write out the PLT data.
7033 do_write(Output_file
*);
7035 // The reloc section.
7036 Reloc_section
* rel_
;
7037 // The .got.plt section.
7038 Output_data_space
* got_plt_
;
7039 // The number of PLT entries.
7040 unsigned int count_
;
7043 // Create the PLT section. The ordinary .got section is an argument,
7044 // since we need to refer to the start. We also create our own .got
7045 // section just for PLT entries.
7047 template<bool big_endian
>
7048 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
7049 Output_data_space
* got_plt
)
7050 : Output_section_data(4), got_plt_(got_plt
), count_(0)
7052 this->rel_
= new Reloc_section(false);
7053 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7054 elfcpp::SHF_ALLOC
, this->rel_
, true, false,
7058 template<bool big_endian
>
7060 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7065 // Add an entry to the PLT.
7067 template<bool big_endian
>
7069 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
7071 gold_assert(!gsym
->has_plt_offset());
7073 // Note that when setting the PLT offset we skip the initial
7074 // reserved PLT entry.
7075 gsym
->set_plt_offset((this->count_
) * sizeof(plt_entry
)
7076 + sizeof(first_plt_entry
));
7080 section_offset_type got_offset
= this->got_plt_
->current_data_size();
7082 // Every PLT entry needs a GOT entry which points back to the PLT
7083 // entry (this will be changed by the dynamic linker, normally
7084 // lazily when the function is called).
7085 this->got_plt_
->set_current_data_size(got_offset
+ 4);
7087 // Every PLT entry needs a reloc.
7088 gsym
->set_needs_dynsym_entry();
7089 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7092 // Note that we don't need to save the symbol. The contents of the
7093 // PLT are independent of which symbols are used. The symbols only
7094 // appear in the relocations.
7098 // FIXME: This is not very flexible. Right now this has only been tested
7099 // on armv5te. If we are to support additional architecture features like
7100 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7102 // The first entry in the PLT.
7103 template<bool big_endian
>
7104 const uint32_t Output_data_plt_arm
<big_endian
>::first_plt_entry
[5] =
7106 0xe52de004, // str lr, [sp, #-4]!
7107 0xe59fe004, // ldr lr, [pc, #4]
7108 0xe08fe00e, // add lr, pc, lr
7109 0xe5bef008, // ldr pc, [lr, #8]!
7110 0x00000000, // &GOT[0] - .
7113 // Subsequent entries in the PLT.
7115 template<bool big_endian
>
7116 const uint32_t Output_data_plt_arm
<big_endian
>::plt_entry
[3] =
7118 0xe28fc600, // add ip, pc, #0xNN00000
7119 0xe28cca00, // add ip, ip, #0xNN000
7120 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7123 // Write out the PLT. This uses the hand-coded instructions above,
7124 // and adjusts them as needed. This is all specified by the arm ELF
7125 // Processor Supplement.
7127 template<bool big_endian
>
7129 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7131 const off_t offset
= this->offset();
7132 const section_size_type oview_size
=
7133 convert_to_section_size_type(this->data_size());
7134 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7136 const off_t got_file_offset
= this->got_plt_
->offset();
7137 const section_size_type got_size
=
7138 convert_to_section_size_type(this->got_plt_
->data_size());
7139 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7141 unsigned char* pov
= oview
;
7143 Arm_address plt_address
= this->address();
7144 Arm_address got_address
= this->got_plt_
->address();
7146 // Write first PLT entry. All but the last word are constants.
7147 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7148 / sizeof(plt_entry
[0]));
7149 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7150 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7151 // Last word in first PLT entry is &GOT[0] - .
7152 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7153 got_address
- (plt_address
+ 16));
7154 pov
+= sizeof(first_plt_entry
);
7156 unsigned char* got_pov
= got_view
;
7158 memset(got_pov
, 0, 12);
7161 const int rel_size
= elfcpp::Elf_sizes
<32>::rel_size
;
7162 unsigned int plt_offset
= sizeof(first_plt_entry
);
7163 unsigned int plt_rel_offset
= 0;
7164 unsigned int got_offset
= 12;
7165 const unsigned int count
= this->count_
;
7166 for (unsigned int i
= 0;
7169 pov
+= sizeof(plt_entry
),
7171 plt_offset
+= sizeof(plt_entry
),
7172 plt_rel_offset
+= rel_size
,
7175 // Set and adjust the PLT entry itself.
7176 int32_t offset
= ((got_address
+ got_offset
)
7177 - (plt_address
+ plt_offset
+ 8));
7179 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
7180 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7181 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7182 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7183 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7184 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7185 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7187 // Set the entry in the GOT.
7188 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
7191 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7192 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7194 of
->write_output_view(offset
, oview_size
, oview
);
7195 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7198 // Create a PLT entry for a global symbol.
7200 template<bool big_endian
>
7202 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
7205 if (gsym
->has_plt_offset())
7208 if (this->plt_
== NULL
)
7210 // Create the GOT sections first.
7211 this->got_section(symtab
, layout
);
7213 this->plt_
= new Output_data_plt_arm
<big_endian
>(layout
, this->got_plt_
);
7214 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
7216 | elfcpp::SHF_EXECINSTR
),
7217 this->plt_
, false, false, false, false);
7219 this->plt_
->add_entry(gsym
);
7222 // Get the section to use for TLS_DESC relocations.
7224 template<bool big_endian
>
7225 typename Target_arm
<big_endian
>::Reloc_section
*
7226 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
7228 return this->plt_section()->rel_tls_desc(layout
);
7231 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7233 template<bool big_endian
>
7235 Target_arm
<big_endian
>::define_tls_base_symbol(
7236 Symbol_table
* symtab
,
7239 if (this->tls_base_symbol_defined_
)
7242 Output_segment
* tls_segment
= layout
->tls_segment();
7243 if (tls_segment
!= NULL
)
7245 bool is_exec
= parameters
->options().output_is_executable();
7246 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
7247 Symbol_table::PREDEFINED
,
7251 elfcpp::STV_HIDDEN
, 0,
7253 ? Symbol::SEGMENT_END
7254 : Symbol::SEGMENT_START
),
7257 this->tls_base_symbol_defined_
= true;
7260 // Create a GOT entry for the TLS module index.
7262 template<bool big_endian
>
7264 Target_arm
<big_endian
>::got_mod_index_entry(
7265 Symbol_table
* symtab
,
7267 Sized_relobj
<32, big_endian
>* object
)
7269 if (this->got_mod_index_offset_
== -1U)
7271 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
7272 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
7273 unsigned int got_offset
;
7274 if (!parameters
->doing_static_link())
7276 got_offset
= got
->add_constant(0);
7277 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
7278 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
7283 // We are doing a static link. Just mark it as belong to module 1,
7285 got_offset
= got
->add_constant(1);
7288 got
->add_constant(0);
7289 this->got_mod_index_offset_
= got_offset
;
7291 return this->got_mod_index_offset_
;
7294 // Optimize the TLS relocation type based on what we know about the
7295 // symbol. IS_FINAL is true if the final address of this symbol is
7296 // known at link time.
7298 template<bool big_endian
>
7299 tls::Tls_optimization
7300 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
7302 // FIXME: Currently we do not do any TLS optimization.
7303 return tls::TLSOPT_NONE
;
7306 // Report an unsupported relocation against a local symbol.
7308 template<bool big_endian
>
7310 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
7311 Sized_relobj
<32, big_endian
>* object
,
7312 unsigned int r_type
)
7314 gold_error(_("%s: unsupported reloc %u against local symbol"),
7315 object
->name().c_str(), r_type
);
7318 // We are about to emit a dynamic relocation of type R_TYPE. If the
7319 // dynamic linker does not support it, issue an error. The GNU linker
7320 // only issues a non-PIC error for an allocated read-only section.
7321 // Here we know the section is allocated, but we don't know that it is
7322 // read-only. But we check for all the relocation types which the
7323 // glibc dynamic linker supports, so it seems appropriate to issue an
7324 // error even if the section is not read-only.
7326 template<bool big_endian
>
7328 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
7329 unsigned int r_type
)
7333 // These are the relocation types supported by glibc for ARM.
7334 case elfcpp::R_ARM_RELATIVE
:
7335 case elfcpp::R_ARM_COPY
:
7336 case elfcpp::R_ARM_GLOB_DAT
:
7337 case elfcpp::R_ARM_JUMP_SLOT
:
7338 case elfcpp::R_ARM_ABS32
:
7339 case elfcpp::R_ARM_ABS32_NOI
:
7340 case elfcpp::R_ARM_PC24
:
7341 // FIXME: The following 3 types are not supported by Android's dynamic
7343 case elfcpp::R_ARM_TLS_DTPMOD32
:
7344 case elfcpp::R_ARM_TLS_DTPOFF32
:
7345 case elfcpp::R_ARM_TLS_TPOFF32
:
7350 // This prevents us from issuing more than one error per reloc
7351 // section. But we can still wind up issuing more than one
7352 // error per object file.
7353 if (this->issued_non_pic_error_
)
7355 const Arm_reloc_property
* reloc_property
=
7356 arm_reloc_property_table
->get_reloc_property(r_type
);
7357 gold_assert(reloc_property
!= NULL
);
7358 object
->error(_("requires unsupported dynamic reloc %s; "
7359 "recompile with -fPIC"),
7360 reloc_property
->name().c_str());
7361 this->issued_non_pic_error_
= true;
7365 case elfcpp::R_ARM_NONE
:
7370 // Scan a relocation for a local symbol.
7371 // FIXME: This only handles a subset of relocation types used by Android
7372 // on ARM v5te devices.
7374 template<bool big_endian
>
7376 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
7379 Sized_relobj
<32, big_endian
>* object
,
7380 unsigned int data_shndx
,
7381 Output_section
* output_section
,
7382 const elfcpp::Rel
<32, big_endian
>& reloc
,
7383 unsigned int r_type
,
7384 const elfcpp::Sym
<32, big_endian
>& lsym
)
7386 r_type
= get_real_reloc_type(r_type
);
7389 case elfcpp::R_ARM_NONE
:
7390 case elfcpp::R_ARM_V4BX
:
7391 case elfcpp::R_ARM_GNU_VTENTRY
:
7392 case elfcpp::R_ARM_GNU_VTINHERIT
:
7395 case elfcpp::R_ARM_ABS32
:
7396 case elfcpp::R_ARM_ABS32_NOI
:
7397 // If building a shared library (or a position-independent
7398 // executable), we need to create a dynamic relocation for
7399 // this location. The relocation applied at link time will
7400 // apply the link-time value, so we flag the location with
7401 // an R_ARM_RELATIVE relocation so the dynamic loader can
7402 // relocate it easily.
7403 if (parameters
->options().output_is_position_independent())
7405 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7406 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7407 // If we are to add more other reloc types than R_ARM_ABS32,
7408 // we need to add check_non_pic(object, r_type) here.
7409 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
7410 output_section
, data_shndx
,
7411 reloc
.get_r_offset());
7415 case elfcpp::R_ARM_ABS16
:
7416 case elfcpp::R_ARM_ABS12
:
7417 case elfcpp::R_ARM_THM_ABS5
:
7418 case elfcpp::R_ARM_ABS8
:
7419 case elfcpp::R_ARM_BASE_ABS
:
7420 case elfcpp::R_ARM_MOVW_ABS_NC
:
7421 case elfcpp::R_ARM_MOVT_ABS
:
7422 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7423 case elfcpp::R_ARM_THM_MOVT_ABS
:
7424 // If building a shared library (or a position-independent
7425 // executable), we need to create a dynamic relocation for
7426 // this location. Because the addend needs to remain in the
7427 // data section, we need to be careful not to apply this
7428 // relocation statically.
7429 if (parameters
->options().output_is_position_independent())
7431 check_non_pic(object
, r_type
);
7432 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7433 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7434 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
7435 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
7436 data_shndx
, reloc
.get_r_offset());
7439 gold_assert(lsym
.get_st_value() == 0);
7440 unsigned int shndx
= lsym
.get_st_shndx();
7442 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
7445 object
->error(_("section symbol %u has bad shndx %u"),
7448 rel_dyn
->add_local_section(object
, shndx
,
7449 r_type
, output_section
,
7450 data_shndx
, reloc
.get_r_offset());
7455 case elfcpp::R_ARM_PC24
:
7456 case elfcpp::R_ARM_REL32
:
7457 case elfcpp::R_ARM_LDR_PC_G0
:
7458 case elfcpp::R_ARM_SBREL32
:
7459 case elfcpp::R_ARM_THM_CALL
:
7460 case elfcpp::R_ARM_THM_PC8
:
7461 case elfcpp::R_ARM_BASE_PREL
:
7462 case elfcpp::R_ARM_PLT32
:
7463 case elfcpp::R_ARM_CALL
:
7464 case elfcpp::R_ARM_JUMP24
:
7465 case elfcpp::R_ARM_THM_JUMP24
:
7466 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
7467 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
7468 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
7469 case elfcpp::R_ARM_SBREL31
:
7470 case elfcpp::R_ARM_PREL31
:
7471 case elfcpp::R_ARM_MOVW_PREL_NC
:
7472 case elfcpp::R_ARM_MOVT_PREL
:
7473 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7474 case elfcpp::R_ARM_THM_MOVT_PREL
:
7475 case elfcpp::R_ARM_THM_JUMP19
:
7476 case elfcpp::R_ARM_THM_JUMP6
:
7477 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7478 case elfcpp::R_ARM_THM_PC12
:
7479 case elfcpp::R_ARM_REL32_NOI
:
7480 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7481 case elfcpp::R_ARM_ALU_PC_G0
:
7482 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7483 case elfcpp::R_ARM_ALU_PC_G1
:
7484 case elfcpp::R_ARM_ALU_PC_G2
:
7485 case elfcpp::R_ARM_LDR_PC_G1
:
7486 case elfcpp::R_ARM_LDR_PC_G2
:
7487 case elfcpp::R_ARM_LDRS_PC_G0
:
7488 case elfcpp::R_ARM_LDRS_PC_G1
:
7489 case elfcpp::R_ARM_LDRS_PC_G2
:
7490 case elfcpp::R_ARM_LDC_PC_G0
:
7491 case elfcpp::R_ARM_LDC_PC_G1
:
7492 case elfcpp::R_ARM_LDC_PC_G2
:
7493 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7494 case elfcpp::R_ARM_ALU_SB_G0
:
7495 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7496 case elfcpp::R_ARM_ALU_SB_G1
:
7497 case elfcpp::R_ARM_ALU_SB_G2
:
7498 case elfcpp::R_ARM_LDR_SB_G0
:
7499 case elfcpp::R_ARM_LDR_SB_G1
:
7500 case elfcpp::R_ARM_LDR_SB_G2
:
7501 case elfcpp::R_ARM_LDRS_SB_G0
:
7502 case elfcpp::R_ARM_LDRS_SB_G1
:
7503 case elfcpp::R_ARM_LDRS_SB_G2
:
7504 case elfcpp::R_ARM_LDC_SB_G0
:
7505 case elfcpp::R_ARM_LDC_SB_G1
:
7506 case elfcpp::R_ARM_LDC_SB_G2
:
7507 case elfcpp::R_ARM_MOVW_BREL_NC
:
7508 case elfcpp::R_ARM_MOVT_BREL
:
7509 case elfcpp::R_ARM_MOVW_BREL
:
7510 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7511 case elfcpp::R_ARM_THM_MOVT_BREL
:
7512 case elfcpp::R_ARM_THM_MOVW_BREL
:
7513 case elfcpp::R_ARM_THM_JUMP11
:
7514 case elfcpp::R_ARM_THM_JUMP8
:
7515 // We don't need to do anything for a relative addressing relocation
7516 // against a local symbol if it does not reference the GOT.
7519 case elfcpp::R_ARM_GOTOFF32
:
7520 case elfcpp::R_ARM_GOTOFF12
:
7521 // We need a GOT section:
7522 target
->got_section(symtab
, layout
);
7525 case elfcpp::R_ARM_GOT_BREL
:
7526 case elfcpp::R_ARM_GOT_PREL
:
7528 // The symbol requires a GOT entry.
7529 Arm_output_data_got
<big_endian
>* got
=
7530 target
->got_section(symtab
, layout
);
7531 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7532 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
7534 // If we are generating a shared object, we need to add a
7535 // dynamic RELATIVE relocation for this symbol's GOT entry.
7536 if (parameters
->options().output_is_position_independent())
7538 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7539 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7540 rel_dyn
->add_local_relative(
7541 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
7542 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
7548 case elfcpp::R_ARM_TARGET1
:
7549 case elfcpp::R_ARM_TARGET2
:
7550 // This should have been mapped to another type already.
7552 case elfcpp::R_ARM_COPY
:
7553 case elfcpp::R_ARM_GLOB_DAT
:
7554 case elfcpp::R_ARM_JUMP_SLOT
:
7555 case elfcpp::R_ARM_RELATIVE
:
7556 // These are relocations which should only be seen by the
7557 // dynamic linker, and should never be seen here.
7558 gold_error(_("%s: unexpected reloc %u in object file"),
7559 object
->name().c_str(), r_type
);
7563 // These are initial TLS relocs, which are expected when
7565 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7566 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7567 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7568 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7569 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7571 bool output_is_shared
= parameters
->options().shared();
7572 const tls::Tls_optimization optimized_type
7573 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
7577 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7578 if (optimized_type
== tls::TLSOPT_NONE
)
7580 // Create a pair of GOT entries for the module index and
7581 // dtv-relative offset.
7582 Arm_output_data_got
<big_endian
>* got
7583 = target
->got_section(symtab
, layout
);
7584 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7585 unsigned int shndx
= lsym
.get_st_shndx();
7587 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
7590 object
->error(_("local symbol %u has bad shndx %u"),
7595 if (!parameters
->doing_static_link())
7596 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
7598 target
->rel_dyn_section(layout
),
7599 elfcpp::R_ARM_TLS_DTPMOD32
, 0);
7601 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
7605 // FIXME: TLS optimization not supported yet.
7609 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7610 if (optimized_type
== tls::TLSOPT_NONE
)
7612 // Create a GOT entry for the module index.
7613 target
->got_mod_index_entry(symtab
, layout
, object
);
7616 // FIXME: TLS optimization not supported yet.
7620 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7623 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7624 layout
->set_has_static_tls();
7625 if (optimized_type
== tls::TLSOPT_NONE
)
7627 // Create a GOT entry for the tp-relative offset.
7628 Arm_output_data_got
<big_endian
>* got
7629 = target
->got_section(symtab
, layout
);
7630 unsigned int r_sym
=
7631 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7632 if (!parameters
->doing_static_link())
7633 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
7634 target
->rel_dyn_section(layout
),
7635 elfcpp::R_ARM_TLS_TPOFF32
);
7636 else if (!object
->local_has_got_offset(r_sym
,
7637 GOT_TYPE_TLS_OFFSET
))
7639 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
7640 unsigned int got_offset
=
7641 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
7642 got
->add_static_reloc(got_offset
,
7643 elfcpp::R_ARM_TLS_TPOFF32
, object
,
7648 // FIXME: TLS optimization not supported yet.
7652 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7653 layout
->set_has_static_tls();
7654 if (output_is_shared
)
7656 // We need to create a dynamic relocation.
7657 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
7658 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7659 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7660 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
7661 output_section
, data_shndx
,
7662 reloc
.get_r_offset());
7673 unsupported_reloc_local(object
, r_type
);
7678 // Report an unsupported relocation against a global symbol.
7680 template<bool big_endian
>
7682 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
7683 Sized_relobj
<32, big_endian
>* object
,
7684 unsigned int r_type
,
7687 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
7688 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
7691 // Scan a relocation for a global symbol.
7693 template<bool big_endian
>
7695 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
7698 Sized_relobj
<32, big_endian
>* object
,
7699 unsigned int data_shndx
,
7700 Output_section
* output_section
,
7701 const elfcpp::Rel
<32, big_endian
>& reloc
,
7702 unsigned int r_type
,
7705 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
7706 // section. We check here to avoid creating a dynamic reloc against
7707 // _GLOBAL_OFFSET_TABLE_.
7708 if (!target
->has_got_section()
7709 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
7710 target
->got_section(symtab
, layout
);
7712 r_type
= get_real_reloc_type(r_type
);
7715 case elfcpp::R_ARM_NONE
:
7716 case elfcpp::R_ARM_V4BX
:
7717 case elfcpp::R_ARM_GNU_VTENTRY
:
7718 case elfcpp::R_ARM_GNU_VTINHERIT
:
7721 case elfcpp::R_ARM_ABS32
:
7722 case elfcpp::R_ARM_ABS16
:
7723 case elfcpp::R_ARM_ABS12
:
7724 case elfcpp::R_ARM_THM_ABS5
:
7725 case elfcpp::R_ARM_ABS8
:
7726 case elfcpp::R_ARM_BASE_ABS
:
7727 case elfcpp::R_ARM_MOVW_ABS_NC
:
7728 case elfcpp::R_ARM_MOVT_ABS
:
7729 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7730 case elfcpp::R_ARM_THM_MOVT_ABS
:
7731 case elfcpp::R_ARM_ABS32_NOI
:
7732 // Absolute addressing relocations.
7734 // Make a PLT entry if necessary.
7735 if (this->symbol_needs_plt_entry(gsym
))
7737 target
->make_plt_entry(symtab
, layout
, gsym
);
7738 // Since this is not a PC-relative relocation, we may be
7739 // taking the address of a function. In that case we need to
7740 // set the entry in the dynamic symbol table to the address of
7742 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
7743 gsym
->set_needs_dynsym_value();
7745 // Make a dynamic relocation if necessary.
7746 if (gsym
->needs_dynamic_reloc(Symbol::ABSOLUTE_REF
))
7748 if (gsym
->may_need_copy_reloc())
7750 target
->copy_reloc(symtab
, layout
, object
,
7751 data_shndx
, output_section
, gsym
, reloc
);
7753 else if ((r_type
== elfcpp::R_ARM_ABS32
7754 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
7755 && gsym
->can_use_relative_reloc(false))
7757 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7758 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
7759 output_section
, object
,
7760 data_shndx
, reloc
.get_r_offset());
7764 check_non_pic(object
, r_type
);
7765 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7766 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
7767 data_shndx
, reloc
.get_r_offset());
7773 case elfcpp::R_ARM_GOTOFF32
:
7774 case elfcpp::R_ARM_GOTOFF12
:
7775 // We need a GOT section.
7776 target
->got_section(symtab
, layout
);
7779 case elfcpp::R_ARM_REL32
:
7780 case elfcpp::R_ARM_LDR_PC_G0
:
7781 case elfcpp::R_ARM_SBREL32
:
7782 case elfcpp::R_ARM_THM_PC8
:
7783 case elfcpp::R_ARM_BASE_PREL
:
7784 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
7785 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
7786 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
7787 case elfcpp::R_ARM_MOVW_PREL_NC
:
7788 case elfcpp::R_ARM_MOVT_PREL
:
7789 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7790 case elfcpp::R_ARM_THM_MOVT_PREL
:
7791 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7792 case elfcpp::R_ARM_THM_PC12
:
7793 case elfcpp::R_ARM_REL32_NOI
:
7794 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7795 case elfcpp::R_ARM_ALU_PC_G0
:
7796 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7797 case elfcpp::R_ARM_ALU_PC_G1
:
7798 case elfcpp::R_ARM_ALU_PC_G2
:
7799 case elfcpp::R_ARM_LDR_PC_G1
:
7800 case elfcpp::R_ARM_LDR_PC_G2
:
7801 case elfcpp::R_ARM_LDRS_PC_G0
:
7802 case elfcpp::R_ARM_LDRS_PC_G1
:
7803 case elfcpp::R_ARM_LDRS_PC_G2
:
7804 case elfcpp::R_ARM_LDC_PC_G0
:
7805 case elfcpp::R_ARM_LDC_PC_G1
:
7806 case elfcpp::R_ARM_LDC_PC_G2
:
7807 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7808 case elfcpp::R_ARM_ALU_SB_G0
:
7809 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7810 case elfcpp::R_ARM_ALU_SB_G1
:
7811 case elfcpp::R_ARM_ALU_SB_G2
:
7812 case elfcpp::R_ARM_LDR_SB_G0
:
7813 case elfcpp::R_ARM_LDR_SB_G1
:
7814 case elfcpp::R_ARM_LDR_SB_G2
:
7815 case elfcpp::R_ARM_LDRS_SB_G0
:
7816 case elfcpp::R_ARM_LDRS_SB_G1
:
7817 case elfcpp::R_ARM_LDRS_SB_G2
:
7818 case elfcpp::R_ARM_LDC_SB_G0
:
7819 case elfcpp::R_ARM_LDC_SB_G1
:
7820 case elfcpp::R_ARM_LDC_SB_G2
:
7821 case elfcpp::R_ARM_MOVW_BREL_NC
:
7822 case elfcpp::R_ARM_MOVT_BREL
:
7823 case elfcpp::R_ARM_MOVW_BREL
:
7824 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7825 case elfcpp::R_ARM_THM_MOVT_BREL
:
7826 case elfcpp::R_ARM_THM_MOVW_BREL
:
7827 // Relative addressing relocations.
7829 // Make a dynamic relocation if necessary.
7830 int flags
= Symbol::NON_PIC_REF
;
7831 if (gsym
->needs_dynamic_reloc(flags
))
7833 if (target
->may_need_copy_reloc(gsym
))
7835 target
->copy_reloc(symtab
, layout
, object
,
7836 data_shndx
, output_section
, gsym
, reloc
);
7840 check_non_pic(object
, r_type
);
7841 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7842 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
7843 data_shndx
, reloc
.get_r_offset());
7849 case elfcpp::R_ARM_PC24
:
7850 case elfcpp::R_ARM_THM_CALL
:
7851 case elfcpp::R_ARM_PLT32
:
7852 case elfcpp::R_ARM_CALL
:
7853 case elfcpp::R_ARM_JUMP24
:
7854 case elfcpp::R_ARM_THM_JUMP24
:
7855 case elfcpp::R_ARM_SBREL31
:
7856 case elfcpp::R_ARM_PREL31
:
7857 case elfcpp::R_ARM_THM_JUMP19
:
7858 case elfcpp::R_ARM_THM_JUMP6
:
7859 case elfcpp::R_ARM_THM_JUMP11
:
7860 case elfcpp::R_ARM_THM_JUMP8
:
7861 // All the relocation above are branches except for the PREL31 ones.
7862 // A PREL31 relocation can point to a personality function in a shared
7863 // library. In that case we want to use a PLT because we want to
7864 // call the personality routine and the dyanmic linkers we care about
7865 // do not support dynamic PREL31 relocations. An REL31 relocation may
7866 // point to a function whose unwinding behaviour is being described but
7867 // we will not mistakenly generate a PLT for that because we should use
7868 // a local section symbol.
7870 // If the symbol is fully resolved, this is just a relative
7871 // local reloc. Otherwise we need a PLT entry.
7872 if (gsym
->final_value_is_known())
7874 // If building a shared library, we can also skip the PLT entry
7875 // if the symbol is defined in the output file and is protected
7877 if (gsym
->is_defined()
7878 && !gsym
->is_from_dynobj()
7879 && !gsym
->is_preemptible())
7881 target
->make_plt_entry(symtab
, layout
, gsym
);
7884 case elfcpp::R_ARM_GOT_BREL
:
7885 case elfcpp::R_ARM_GOT_ABS
:
7886 case elfcpp::R_ARM_GOT_PREL
:
7888 // The symbol requires a GOT entry.
7889 Arm_output_data_got
<big_endian
>* got
=
7890 target
->got_section(symtab
, layout
);
7891 if (gsym
->final_value_is_known())
7892 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
7895 // If this symbol is not fully resolved, we need to add a
7896 // GOT entry with a dynamic relocation.
7897 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7898 if (gsym
->is_from_dynobj()
7899 || gsym
->is_undefined()
7900 || gsym
->is_preemptible())
7901 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
7902 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
7905 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
7906 rel_dyn
->add_global_relative(
7907 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
7908 gsym
->got_offset(GOT_TYPE_STANDARD
));
7914 case elfcpp::R_ARM_TARGET1
:
7915 case elfcpp::R_ARM_TARGET2
:
7916 // These should have been mapped to other types already.
7918 case elfcpp::R_ARM_COPY
:
7919 case elfcpp::R_ARM_GLOB_DAT
:
7920 case elfcpp::R_ARM_JUMP_SLOT
:
7921 case elfcpp::R_ARM_RELATIVE
:
7922 // These are relocations which should only be seen by the
7923 // dynamic linker, and should never be seen here.
7924 gold_error(_("%s: unexpected reloc %u in object file"),
7925 object
->name().c_str(), r_type
);
7928 // These are initial tls relocs, which are expected when
7930 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7931 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7932 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7933 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7934 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7936 const bool is_final
= gsym
->final_value_is_known();
7937 const tls::Tls_optimization optimized_type
7938 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
7941 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7942 if (optimized_type
== tls::TLSOPT_NONE
)
7944 // Create a pair of GOT entries for the module index and
7945 // dtv-relative offset.
7946 Arm_output_data_got
<big_endian
>* got
7947 = target
->got_section(symtab
, layout
);
7948 if (!parameters
->doing_static_link())
7949 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
7950 target
->rel_dyn_section(layout
),
7951 elfcpp::R_ARM_TLS_DTPMOD32
,
7952 elfcpp::R_ARM_TLS_DTPOFF32
);
7954 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
7957 // FIXME: TLS optimization not supported yet.
7961 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7962 if (optimized_type
== tls::TLSOPT_NONE
)
7964 // Create a GOT entry for the module index.
7965 target
->got_mod_index_entry(symtab
, layout
, object
);
7968 // FIXME: TLS optimization not supported yet.
7972 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7975 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7976 layout
->set_has_static_tls();
7977 if (optimized_type
== tls::TLSOPT_NONE
)
7979 // Create a GOT entry for the tp-relative offset.
7980 Arm_output_data_got
<big_endian
>* got
7981 = target
->got_section(symtab
, layout
);
7982 if (!parameters
->doing_static_link())
7983 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
7984 target
->rel_dyn_section(layout
),
7985 elfcpp::R_ARM_TLS_TPOFF32
);
7986 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
7988 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
7989 unsigned int got_offset
=
7990 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
7991 got
->add_static_reloc(got_offset
,
7992 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
7996 // FIXME: TLS optimization not supported yet.
8000 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8001 layout
->set_has_static_tls();
8002 if (parameters
->options().shared())
8004 // We need to create a dynamic relocation.
8005 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8006 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
8007 output_section
, object
,
8008 data_shndx
, reloc
.get_r_offset());
8019 unsupported_reloc_global(object
, r_type
, gsym
);
8024 // Process relocations for gc.
8026 template<bool big_endian
>
8028 Target_arm
<big_endian
>::gc_process_relocs(Symbol_table
* symtab
,
8030 Sized_relobj
<32, big_endian
>* object
,
8031 unsigned int data_shndx
,
8033 const unsigned char* prelocs
,
8035 Output_section
* output_section
,
8036 bool needs_special_offset_handling
,
8037 size_t local_symbol_count
,
8038 const unsigned char* plocal_symbols
)
8040 typedef Target_arm
<big_endian
> Arm
;
8041 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8043 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
>(
8052 needs_special_offset_handling
,
8057 // Scan relocations for a section.
8059 template<bool big_endian
>
8061 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
8063 Sized_relobj
<32, big_endian
>* object
,
8064 unsigned int data_shndx
,
8065 unsigned int sh_type
,
8066 const unsigned char* prelocs
,
8068 Output_section
* output_section
,
8069 bool needs_special_offset_handling
,
8070 size_t local_symbol_count
,
8071 const unsigned char* plocal_symbols
)
8073 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8074 if (sh_type
== elfcpp::SHT_RELA
)
8076 gold_error(_("%s: unsupported RELA reloc section"),
8077 object
->name().c_str());
8081 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
8090 needs_special_offset_handling
,
8095 // Finalize the sections.
8097 template<bool big_endian
>
8099 Target_arm
<big_endian
>::do_finalize_sections(
8101 const Input_objects
* input_objects
,
8102 Symbol_table
* symtab
)
8104 // Merge processor-specific flags.
8105 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
8106 p
!= input_objects
->relobj_end();
8109 Arm_relobj
<big_endian
>* arm_relobj
=
8110 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
8111 if (arm_relobj
->merge_flags_and_attributes())
8113 this->merge_processor_specific_flags(
8115 arm_relobj
->processor_specific_flags());
8116 this->merge_object_attributes(arm_relobj
->name().c_str(),
8117 arm_relobj
->attributes_section_data());
8121 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
8122 p
!= input_objects
->dynobj_end();
8125 Arm_dynobj
<big_endian
>* arm_dynobj
=
8126 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
8127 this->merge_processor_specific_flags(
8129 arm_dynobj
->processor_specific_flags());
8130 this->merge_object_attributes(arm_dynobj
->name().c_str(),
8131 arm_dynobj
->attributes_section_data());
8134 // Create an empty uninitialized attribute section if we still don't have it
8135 // at this moment. This happens if there is no attributes sections in all
8137 if (this->attributes_section_data_
== NULL
)
8138 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
8141 const Object_attribute
* cpu_arch_attr
=
8142 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
8143 if (cpu_arch_attr
->int_value() > elfcpp::TAG_CPU_ARCH_V4
)
8144 this->set_may_use_blx(true);
8146 // Check if we need to use Cortex-A8 workaround.
8147 if (parameters
->options().user_set_fix_cortex_a8())
8148 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
8151 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8152 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8154 const Object_attribute
* cpu_arch_profile_attr
=
8155 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
8156 this->fix_cortex_a8_
=
8157 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
8158 && (cpu_arch_profile_attr
->int_value() == 'A'
8159 || cpu_arch_profile_attr
->int_value() == 0));
8162 // Check if we can use V4BX interworking.
8163 // The V4BX interworking stub contains BX instruction,
8164 // which is not specified for some profiles.
8165 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8166 && !this->may_use_blx())
8167 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8168 "the target profile does not support BX instruction"));
8170 // Fill in some more dynamic tags.
8171 const Reloc_section
* rel_plt
= (this->plt_
== NULL
8173 : this->plt_
->rel_plt());
8174 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
8175 this->rel_dyn_
, true, false);
8177 // Emit any relocs we saved in an attempt to avoid generating COPY
8179 if (this->copy_relocs_
.any_saved_relocs())
8180 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
8182 // Handle the .ARM.exidx section.
8183 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
8184 if (exidx_section
!= NULL
8185 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
8186 && !parameters
->options().relocatable())
8188 // Create __exidx_start and __exdix_end symbols.
8189 symtab
->define_in_output_data("__exidx_start", NULL
,
8190 Symbol_table::PREDEFINED
,
8191 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
8192 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
8194 symtab
->define_in_output_data("__exidx_end", NULL
,
8195 Symbol_table::PREDEFINED
,
8196 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
8197 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
8200 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8201 // the .ARM.exidx section.
8202 if (!layout
->script_options()->saw_phdrs_clause())
8204 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0, 0)
8206 Output_segment
* exidx_segment
=
8207 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
8208 exidx_segment
->add_output_section(exidx_section
, elfcpp::PF_R
,
8213 // Create an .ARM.attributes section unless we have no regular input
8214 // object. In that case the output will be empty.
8215 if (input_objects
->number_of_relobjs() != 0)
8217 Output_attributes_section_data
* attributes_section
=
8218 new Output_attributes_section_data(*this->attributes_section_data_
);
8219 layout
->add_output_section_data(".ARM.attributes",
8220 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
8221 attributes_section
, false, false, false,
8226 // Return whether a direct absolute static relocation needs to be applied.
8227 // In cases where Scan::local() or Scan::global() has created
8228 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8229 // of the relocation is carried in the data, and we must not
8230 // apply the static relocation.
8232 template<bool big_endian
>
8234 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
8235 const Sized_symbol
<32>* gsym
,
8238 Output_section
* output_section
)
8240 // If the output section is not allocated, then we didn't call
8241 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8243 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
8246 // For local symbols, we will have created a non-RELATIVE dynamic
8247 // relocation only if (a) the output is position independent,
8248 // (b) the relocation is absolute (not pc- or segment-relative), and
8249 // (c) the relocation is not 32 bits wide.
8251 return !(parameters
->options().output_is_position_independent()
8252 && (ref_flags
& Symbol::ABSOLUTE_REF
)
8255 // For global symbols, we use the same helper routines used in the
8256 // scan pass. If we did not create a dynamic relocation, or if we
8257 // created a RELATIVE dynamic relocation, we should apply the static
8259 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
8260 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
8261 && gsym
->can_use_relative_reloc(ref_flags
8262 & Symbol::FUNCTION_CALL
);
8263 return !has_dyn
|| is_rel
;
8266 // Perform a relocation.
8268 template<bool big_endian
>
8270 Target_arm
<big_endian
>::Relocate::relocate(
8271 const Relocate_info
<32, big_endian
>* relinfo
,
8273 Output_section
*output_section
,
8275 const elfcpp::Rel
<32, big_endian
>& rel
,
8276 unsigned int r_type
,
8277 const Sized_symbol
<32>* gsym
,
8278 const Symbol_value
<32>* psymval
,
8279 unsigned char* view
,
8280 Arm_address address
,
8281 section_size_type view_size
)
8283 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
8285 r_type
= get_real_reloc_type(r_type
);
8286 const Arm_reloc_property
* reloc_property
=
8287 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8288 if (reloc_property
== NULL
)
8290 std::string reloc_name
=
8291 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
8292 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8293 _("cannot relocate %s in object file"),
8294 reloc_name
.c_str());
8298 const Arm_relobj
<big_endian
>* object
=
8299 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8301 // If the final branch target of a relocation is THUMB instruction, this
8302 // is 1. Otherwise it is 0.
8303 Arm_address thumb_bit
= 0;
8304 Symbol_value
<32> symval
;
8305 bool is_weakly_undefined_without_plt
= false;
8306 if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
8310 // This is a global symbol. Determine if we use PLT and if the
8311 // final target is THUMB.
8312 if (gsym
->use_plt_offset(reloc_is_non_pic(r_type
)))
8314 // This uses a PLT, change the symbol value.
8315 symval
.set_output_value(target
->plt_section()->address()
8316 + gsym
->plt_offset());
8319 else if (gsym
->is_weak_undefined())
8321 // This is a weakly undefined symbol and we do not use PLT
8322 // for this relocation. A branch targeting this symbol will
8323 // be converted into an NOP.
8324 is_weakly_undefined_without_plt
= true;
8328 // Set thumb bit if symbol:
8329 // -Has type STT_ARM_TFUNC or
8330 // -Has type STT_FUNC, is defined and with LSB in value set.
8332 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
8333 || (gsym
->type() == elfcpp::STT_FUNC
8334 && !gsym
->is_undefined()
8335 && ((psymval
->value(object
, 0) & 1) != 0)))
8342 // This is a local symbol. Determine if the final target is THUMB.
8343 // We saved this information when all the local symbols were read.
8344 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
8345 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
8346 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
8351 // This is a fake relocation synthesized for a stub. It does not have
8352 // a real symbol. We just look at the LSB of the symbol value to
8353 // determine if the target is THUMB or not.
8354 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
8357 // Strip LSB if this points to a THUMB target.
8359 && reloc_property
->uses_thumb_bit()
8360 && ((psymval
->value(object
, 0) & 1) != 0))
8362 Arm_address stripped_value
=
8363 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
8364 symval
.set_output_value(stripped_value
);
8368 // Get the GOT offset if needed.
8369 // The GOT pointer points to the end of the GOT section.
8370 // We need to subtract the size of the GOT section to get
8371 // the actual offset to use in the relocation.
8372 bool have_got_offset
= false;
8373 unsigned int got_offset
= 0;
8376 case elfcpp::R_ARM_GOT_BREL
:
8377 case elfcpp::R_ARM_GOT_PREL
:
8380 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
8381 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
8382 - target
->got_size());
8386 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8387 gold_assert(object
->local_has_got_offset(r_sym
, GOT_TYPE_STANDARD
));
8388 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
8389 - target
->got_size());
8391 have_got_offset
= true;
8398 // To look up relocation stubs, we need to pass the symbol table index of
8400 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8402 // Get the addressing origin of the output segment defining the
8403 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8404 Arm_address sym_origin
= 0;
8405 if (reloc_property
->uses_symbol_base())
8407 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
8408 // R_ARM_BASE_ABS with the NULL symbol will give the
8409 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8410 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8411 sym_origin
= target
->got_plt_section()->address();
8412 else if (gsym
== NULL
)
8414 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
8415 sym_origin
= gsym
->output_segment()->vaddr();
8416 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
8417 sym_origin
= gsym
->output_data()->address();
8419 // TODO: Assumes the segment base to be zero for the global symbols
8420 // till the proper support for the segment-base-relative addressing
8421 // will be implemented. This is consistent with GNU ld.
8424 // For relative addressing relocation, find out the relative address base.
8425 Arm_address relative_address_base
= 0;
8426 switch(reloc_property
->relative_address_base())
8428 case Arm_reloc_property::RAB_NONE
:
8429 // Relocations with relative address bases RAB_TLS and RAB_tp are
8430 // handled by relocate_tls. So we do not need to do anything here.
8431 case Arm_reloc_property::RAB_TLS
:
8432 case Arm_reloc_property::RAB_tp
:
8434 case Arm_reloc_property::RAB_B_S
:
8435 relative_address_base
= sym_origin
;
8437 case Arm_reloc_property::RAB_GOT_ORG
:
8438 relative_address_base
= target
->got_plt_section()->address();
8440 case Arm_reloc_property::RAB_P
:
8441 relative_address_base
= address
;
8443 case Arm_reloc_property::RAB_Pa
:
8444 relative_address_base
= address
& 0xfffffffcU
;
8450 typename
Arm_relocate_functions::Status reloc_status
=
8451 Arm_relocate_functions::STATUS_OKAY
;
8452 bool check_overflow
= reloc_property
->checks_overflow();
8455 case elfcpp::R_ARM_NONE
:
8458 case elfcpp::R_ARM_ABS8
:
8459 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8461 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
8464 case elfcpp::R_ARM_ABS12
:
8465 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8467 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
8470 case elfcpp::R_ARM_ABS16
:
8471 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8473 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
8476 case elfcpp::R_ARM_ABS32
:
8477 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
8479 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8483 case elfcpp::R_ARM_ABS32_NOI
:
8484 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
8486 // No thumb bit for this relocation: (S + A)
8487 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8491 case elfcpp::R_ARM_MOVW_ABS_NC
:
8492 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8494 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
8499 case elfcpp::R_ARM_MOVT_ABS
:
8500 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8502 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
8505 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8506 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8508 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
8509 0, thumb_bit
, false);
8512 case elfcpp::R_ARM_THM_MOVT_ABS
:
8513 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8515 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
8519 case elfcpp::R_ARM_MOVW_PREL_NC
:
8520 case elfcpp::R_ARM_MOVW_BREL_NC
:
8521 case elfcpp::R_ARM_MOVW_BREL
:
8523 Arm_relocate_functions::movw(view
, object
, psymval
,
8524 relative_address_base
, thumb_bit
,
8528 case elfcpp::R_ARM_MOVT_PREL
:
8529 case elfcpp::R_ARM_MOVT_BREL
:
8531 Arm_relocate_functions::movt(view
, object
, psymval
,
8532 relative_address_base
);
8535 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8536 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8537 case elfcpp::R_ARM_THM_MOVW_BREL
:
8539 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
8540 relative_address_base
,
8541 thumb_bit
, check_overflow
);
8544 case elfcpp::R_ARM_THM_MOVT_PREL
:
8545 case elfcpp::R_ARM_THM_MOVT_BREL
:
8547 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
8548 relative_address_base
);
8551 case elfcpp::R_ARM_REL32
:
8552 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
8553 address
, thumb_bit
);
8556 case elfcpp::R_ARM_THM_ABS5
:
8557 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8559 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
8562 // Thumb long branches.
8563 case elfcpp::R_ARM_THM_CALL
:
8564 case elfcpp::R_ARM_THM_XPC22
:
8565 case elfcpp::R_ARM_THM_JUMP24
:
8567 Arm_relocate_functions::thumb_branch_common(
8568 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
8569 thumb_bit
, is_weakly_undefined_without_plt
);
8572 case elfcpp::R_ARM_GOTOFF32
:
8574 Arm_address got_origin
;
8575 got_origin
= target
->got_plt_section()->address();
8576 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
8577 got_origin
, thumb_bit
);
8581 case elfcpp::R_ARM_BASE_PREL
:
8582 gold_assert(gsym
!= NULL
);
8584 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
8587 case elfcpp::R_ARM_BASE_ABS
:
8589 if (!should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
8593 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
8597 case elfcpp::R_ARM_GOT_BREL
:
8598 gold_assert(have_got_offset
);
8599 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
8602 case elfcpp::R_ARM_GOT_PREL
:
8603 gold_assert(have_got_offset
);
8604 // Get the address origin for GOT PLT, which is allocated right
8605 // after the GOT section, to calculate an absolute address of
8606 // the symbol GOT entry (got_origin + got_offset).
8607 Arm_address got_origin
;
8608 got_origin
= target
->got_plt_section()->address();
8609 reloc_status
= Arm_relocate_functions::got_prel(view
,
8610 got_origin
+ got_offset
,
8614 case elfcpp::R_ARM_PLT32
:
8615 case elfcpp::R_ARM_CALL
:
8616 case elfcpp::R_ARM_JUMP24
:
8617 case elfcpp::R_ARM_XPC25
:
8618 gold_assert(gsym
== NULL
8619 || gsym
->has_plt_offset()
8620 || gsym
->final_value_is_known()
8621 || (gsym
->is_defined()
8622 && !gsym
->is_from_dynobj()
8623 && !gsym
->is_preemptible()));
8625 Arm_relocate_functions::arm_branch_common(
8626 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
8627 thumb_bit
, is_weakly_undefined_without_plt
);
8630 case elfcpp::R_ARM_THM_JUMP19
:
8632 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
8636 case elfcpp::R_ARM_THM_JUMP6
:
8638 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
8641 case elfcpp::R_ARM_THM_JUMP8
:
8643 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
8646 case elfcpp::R_ARM_THM_JUMP11
:
8648 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
8651 case elfcpp::R_ARM_PREL31
:
8652 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
8653 address
, thumb_bit
);
8656 case elfcpp::R_ARM_V4BX
:
8657 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
8659 const bool is_v4bx_interworking
=
8660 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
8662 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
8663 is_v4bx_interworking
);
8667 case elfcpp::R_ARM_THM_PC8
:
8669 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
8672 case elfcpp::R_ARM_THM_PC12
:
8674 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
8677 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8679 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
8683 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8684 case elfcpp::R_ARM_ALU_PC_G0
:
8685 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8686 case elfcpp::R_ARM_ALU_PC_G1
:
8687 case elfcpp::R_ARM_ALU_PC_G2
:
8688 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8689 case elfcpp::R_ARM_ALU_SB_G0
:
8690 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8691 case elfcpp::R_ARM_ALU_SB_G1
:
8692 case elfcpp::R_ARM_ALU_SB_G2
:
8694 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
8695 reloc_property
->group_index(),
8696 relative_address_base
,
8697 thumb_bit
, check_overflow
);
8700 case elfcpp::R_ARM_LDR_PC_G0
:
8701 case elfcpp::R_ARM_LDR_PC_G1
:
8702 case elfcpp::R_ARM_LDR_PC_G2
:
8703 case elfcpp::R_ARM_LDR_SB_G0
:
8704 case elfcpp::R_ARM_LDR_SB_G1
:
8705 case elfcpp::R_ARM_LDR_SB_G2
:
8707 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
8708 reloc_property
->group_index(),
8709 relative_address_base
);
8712 case elfcpp::R_ARM_LDRS_PC_G0
:
8713 case elfcpp::R_ARM_LDRS_PC_G1
:
8714 case elfcpp::R_ARM_LDRS_PC_G2
:
8715 case elfcpp::R_ARM_LDRS_SB_G0
:
8716 case elfcpp::R_ARM_LDRS_SB_G1
:
8717 case elfcpp::R_ARM_LDRS_SB_G2
:
8719 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
8720 reloc_property
->group_index(),
8721 relative_address_base
);
8724 case elfcpp::R_ARM_LDC_PC_G0
:
8725 case elfcpp::R_ARM_LDC_PC_G1
:
8726 case elfcpp::R_ARM_LDC_PC_G2
:
8727 case elfcpp::R_ARM_LDC_SB_G0
:
8728 case elfcpp::R_ARM_LDC_SB_G1
:
8729 case elfcpp::R_ARM_LDC_SB_G2
:
8731 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
8732 reloc_property
->group_index(),
8733 relative_address_base
);
8736 // These are initial tls relocs, which are expected when
8738 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8739 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8740 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8741 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8742 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8744 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
8745 view
, address
, view_size
);
8752 // Report any errors.
8753 switch (reloc_status
)
8755 case Arm_relocate_functions::STATUS_OKAY
:
8757 case Arm_relocate_functions::STATUS_OVERFLOW
:
8758 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8759 _("relocation overflow in %s"),
8760 reloc_property
->name().c_str());
8762 case Arm_relocate_functions::STATUS_BAD_RELOC
:
8763 gold_error_at_location(
8767 _("unexpected opcode while processing relocation %s"),
8768 reloc_property
->name().c_str());
8777 // Perform a TLS relocation.
8779 template<bool big_endian
>
8780 inline typename Arm_relocate_functions
<big_endian
>::Status
8781 Target_arm
<big_endian
>::Relocate::relocate_tls(
8782 const Relocate_info
<32, big_endian
>* relinfo
,
8783 Target_arm
<big_endian
>* target
,
8785 const elfcpp::Rel
<32, big_endian
>& rel
,
8786 unsigned int r_type
,
8787 const Sized_symbol
<32>* gsym
,
8788 const Symbol_value
<32>* psymval
,
8789 unsigned char* view
,
8790 elfcpp::Elf_types
<32>::Elf_Addr address
,
8791 section_size_type
/*view_size*/ )
8793 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
8794 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
8795 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
8797 const Sized_relobj
<32, big_endian
>* object
= relinfo
->object
;
8799 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
8801 const bool is_final
= (gsym
== NULL
8802 ? !parameters
->options().shared()
8803 : gsym
->final_value_is_known());
8804 const tls::Tls_optimization optimized_type
8805 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
8808 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8810 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
8811 unsigned int got_offset
;
8814 gold_assert(gsym
->has_got_offset(got_type
));
8815 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
8819 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8820 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
8821 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
8822 - target
->got_size());
8824 if (optimized_type
== tls::TLSOPT_NONE
)
8826 Arm_address got_entry
=
8827 target
->got_plt_section()->address() + got_offset
;
8829 // Relocate the field with the PC relative offset of the pair of
8831 RelocFuncs::pcrel32(view
, got_entry
, address
);
8832 return ArmRelocFuncs::STATUS_OKAY
;
8837 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8838 if (optimized_type
== tls::TLSOPT_NONE
)
8840 // Relocate the field with the offset of the GOT entry for
8841 // the module index.
8842 unsigned int got_offset
;
8843 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
8844 - target
->got_size());
8845 Arm_address got_entry
=
8846 target
->got_plt_section()->address() + got_offset
;
8848 // Relocate the field with the PC relative offset of the pair of
8850 RelocFuncs::pcrel32(view
, got_entry
, address
);
8851 return ArmRelocFuncs::STATUS_OKAY
;
8855 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8856 RelocFuncs::rel32(view
, value
);
8857 return ArmRelocFuncs::STATUS_OKAY
;
8859 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8860 if (optimized_type
== tls::TLSOPT_NONE
)
8862 // Relocate the field with the offset of the GOT entry for
8863 // the tp-relative offset of the symbol.
8864 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
8865 unsigned int got_offset
;
8868 gold_assert(gsym
->has_got_offset(got_type
));
8869 got_offset
= gsym
->got_offset(got_type
);
8873 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8874 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
8875 got_offset
= object
->local_got_offset(r_sym
, got_type
);
8878 // All GOT offsets are relative to the end of the GOT.
8879 got_offset
-= target
->got_size();
8881 Arm_address got_entry
=
8882 target
->got_plt_section()->address() + got_offset
;
8884 // Relocate the field with the PC relative offset of the GOT entry.
8885 RelocFuncs::pcrel32(view
, got_entry
, address
);
8886 return ArmRelocFuncs::STATUS_OKAY
;
8890 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8891 // If we're creating a shared library, a dynamic relocation will
8892 // have been created for this location, so do not apply it now.
8893 if (!parameters
->options().shared())
8895 gold_assert(tls_segment
!= NULL
);
8897 // $tp points to the TCB, which is followed by the TLS, so we
8898 // need to add TCB size to the offset.
8899 Arm_address aligned_tcb_size
=
8900 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
8901 RelocFuncs::rel32(view
, value
+ aligned_tcb_size
);
8904 return ArmRelocFuncs::STATUS_OKAY
;
8910 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8911 _("unsupported reloc %u"),
8913 return ArmRelocFuncs::STATUS_BAD_RELOC
;
8916 // Relocate section data.
8918 template<bool big_endian
>
8920 Target_arm
<big_endian
>::relocate_section(
8921 const Relocate_info
<32, big_endian
>* relinfo
,
8922 unsigned int sh_type
,
8923 const unsigned char* prelocs
,
8925 Output_section
* output_section
,
8926 bool needs_special_offset_handling
,
8927 unsigned char* view
,
8928 Arm_address address
,
8929 section_size_type view_size
,
8930 const Reloc_symbol_changes
* reloc_symbol_changes
)
8932 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
8933 gold_assert(sh_type
== elfcpp::SHT_REL
);
8935 // See if we are relocating a relaxed input section. If so, the view
8936 // covers the whole output section and we need to adjust accordingly.
8937 if (needs_special_offset_handling
)
8939 const Output_relaxed_input_section
* poris
=
8940 output_section
->find_relaxed_input_section(relinfo
->object
,
8941 relinfo
->data_shndx
);
8944 Arm_address section_address
= poris
->address();
8945 section_size_type section_size
= poris
->data_size();
8947 gold_assert((section_address
>= address
)
8948 && ((section_address
+ section_size
)
8949 <= (address
+ view_size
)));
8951 off_t offset
= section_address
- address
;
8954 view_size
= section_size
;
8958 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
8965 needs_special_offset_handling
,
8969 reloc_symbol_changes
);
8972 // Return the size of a relocation while scanning during a relocatable
8975 template<bool big_endian
>
8977 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
8978 unsigned int r_type
,
8981 r_type
= get_real_reloc_type(r_type
);
8982 const Arm_reloc_property
* arp
=
8983 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8988 std::string reloc_name
=
8989 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
8990 gold_error(_("%s: unexpected %s in object file"),
8991 object
->name().c_str(), reloc_name
.c_str());
8996 // Scan the relocs during a relocatable link.
8998 template<bool big_endian
>
9000 Target_arm
<big_endian
>::scan_relocatable_relocs(
9001 Symbol_table
* symtab
,
9003 Sized_relobj
<32, big_endian
>* object
,
9004 unsigned int data_shndx
,
9005 unsigned int sh_type
,
9006 const unsigned char* prelocs
,
9008 Output_section
* output_section
,
9009 bool needs_special_offset_handling
,
9010 size_t local_symbol_count
,
9011 const unsigned char* plocal_symbols
,
9012 Relocatable_relocs
* rr
)
9014 gold_assert(sh_type
== elfcpp::SHT_REL
);
9016 typedef Arm_scan_relocatable_relocs
<big_endian
, elfcpp::SHT_REL
,
9017 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
9019 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
9020 Scan_relocatable_relocs
>(
9028 needs_special_offset_handling
,
9034 // Relocate a section during a relocatable link.
9036 template<bool big_endian
>
9038 Target_arm
<big_endian
>::relocate_for_relocatable(
9039 const Relocate_info
<32, big_endian
>* relinfo
,
9040 unsigned int sh_type
,
9041 const unsigned char* prelocs
,
9043 Output_section
* output_section
,
9044 off_t offset_in_output_section
,
9045 const Relocatable_relocs
* rr
,
9046 unsigned char* view
,
9047 Arm_address view_address
,
9048 section_size_type view_size
,
9049 unsigned char* reloc_view
,
9050 section_size_type reloc_view_size
)
9052 gold_assert(sh_type
== elfcpp::SHT_REL
);
9054 gold::relocate_for_relocatable
<32, big_endian
, elfcpp::SHT_REL
>(
9059 offset_in_output_section
,
9068 // Perform target-specific processing in a relocatable link. This is
9069 // only used if we use the relocation strategy RELOC_SPECIAL.
9071 template<bool big_endian
>
9073 Target_arm
<big_endian
>::relocate_special_relocatable(
9074 const Relocate_info
<32, big_endian
>* relinfo
,
9075 unsigned int sh_type
,
9076 const unsigned char* preloc_in
,
9078 Output_section
* output_section
,
9079 off_t offset_in_output_section
,
9080 unsigned char* view
,
9081 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9083 unsigned char* preloc_out
)
9085 // We can only handle REL type relocation sections.
9086 gold_assert(sh_type
== elfcpp::SHT_REL
);
9088 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
9089 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
9091 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
9093 const Arm_relobj
<big_endian
>* object
=
9094 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9095 const unsigned int local_count
= object
->local_symbol_count();
9097 Reltype
reloc(preloc_in
);
9098 Reltype_write
reloc_write(preloc_out
);
9100 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9101 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9102 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9104 const Arm_reloc_property
* arp
=
9105 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9106 gold_assert(arp
!= NULL
);
9108 // Get the new symbol index.
9109 // We only use RELOC_SPECIAL strategy in local relocations.
9110 gold_assert(r_sym
< local_count
);
9112 // We are adjusting a section symbol. We need to find
9113 // the symbol table index of the section symbol for
9114 // the output section corresponding to input section
9115 // in which this symbol is defined.
9117 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
9118 gold_assert(is_ordinary
);
9119 Output_section
* os
= object
->output_section(shndx
);
9120 gold_assert(os
!= NULL
);
9121 gold_assert(os
->needs_symtab_index());
9122 unsigned int new_symndx
= os
->symtab_index();
9124 // Get the new offset--the location in the output section where
9125 // this relocation should be applied.
9127 Arm_address offset
= reloc
.get_r_offset();
9128 Arm_address new_offset
;
9129 if (offset_in_output_section
!= invalid_address
)
9130 new_offset
= offset
+ offset_in_output_section
;
9133 section_offset_type sot_offset
=
9134 convert_types
<section_offset_type
, Arm_address
>(offset
);
9135 section_offset_type new_sot_offset
=
9136 output_section
->output_offset(object
, relinfo
->data_shndx
,
9138 gold_assert(new_sot_offset
!= -1);
9139 new_offset
= new_sot_offset
;
9142 // In an object file, r_offset is an offset within the section.
9143 // In an executable or dynamic object, generated by
9144 // --emit-relocs, r_offset is an absolute address.
9145 if (!parameters
->options().relocatable())
9147 new_offset
+= view_address
;
9148 if (offset_in_output_section
!= invalid_address
)
9149 new_offset
-= offset_in_output_section
;
9152 reloc_write
.put_r_offset(new_offset
);
9153 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
9155 // Handle the reloc addend.
9156 // The relocation uses a section symbol in the input file.
9157 // We are adjusting it to use a section symbol in the output
9158 // file. The input section symbol refers to some address in
9159 // the input section. We need the relocation in the output
9160 // file to refer to that same address. This adjustment to
9161 // the addend is the same calculation we use for a simple
9162 // absolute relocation for the input section symbol.
9164 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
9166 // Handle THUMB bit.
9167 Symbol_value
<32> symval
;
9168 Arm_address thumb_bit
=
9169 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9171 && arp
->uses_thumb_bit()
9172 && ((psymval
->value(object
, 0) & 1) != 0))
9174 Arm_address stripped_value
=
9175 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9176 symval
.set_output_value(stripped_value
);
9180 unsigned char* paddend
= view
+ offset
;
9181 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
9182 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
9185 case elfcpp::R_ARM_ABS8
:
9186 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
9190 case elfcpp::R_ARM_ABS12
:
9191 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
9195 case elfcpp::R_ARM_ABS16
:
9196 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
9200 case elfcpp::R_ARM_THM_ABS5
:
9201 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
9206 case elfcpp::R_ARM_MOVW_ABS_NC
:
9207 case elfcpp::R_ARM_MOVW_PREL_NC
:
9208 case elfcpp::R_ARM_MOVW_BREL_NC
:
9209 case elfcpp::R_ARM_MOVW_BREL
:
9210 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
9211 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9214 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9215 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9216 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9217 case elfcpp::R_ARM_THM_MOVW_BREL
:
9218 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
9219 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9222 case elfcpp::R_ARM_THM_CALL
:
9223 case elfcpp::R_ARM_THM_XPC22
:
9224 case elfcpp::R_ARM_THM_JUMP24
:
9226 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
9227 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9231 case elfcpp::R_ARM_PLT32
:
9232 case elfcpp::R_ARM_CALL
:
9233 case elfcpp::R_ARM_JUMP24
:
9234 case elfcpp::R_ARM_XPC25
:
9236 Arm_relocate_functions
<big_endian
>::arm_branch_common(
9237 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9241 case elfcpp::R_ARM_THM_JUMP19
:
9243 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
9244 psymval
, 0, thumb_bit
);
9247 case elfcpp::R_ARM_THM_JUMP6
:
9249 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
9253 case elfcpp::R_ARM_THM_JUMP8
:
9255 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
9259 case elfcpp::R_ARM_THM_JUMP11
:
9261 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
9265 case elfcpp::R_ARM_PREL31
:
9267 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
9271 case elfcpp::R_ARM_THM_PC8
:
9273 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
9277 case elfcpp::R_ARM_THM_PC12
:
9279 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
9283 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9285 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
9289 // These relocation truncate relocation results so we cannot handle them
9290 // in a relocatable link.
9291 case elfcpp::R_ARM_MOVT_ABS
:
9292 case elfcpp::R_ARM_THM_MOVT_ABS
:
9293 case elfcpp::R_ARM_MOVT_PREL
:
9294 case elfcpp::R_ARM_MOVT_BREL
:
9295 case elfcpp::R_ARM_THM_MOVT_PREL
:
9296 case elfcpp::R_ARM_THM_MOVT_BREL
:
9297 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9298 case elfcpp::R_ARM_ALU_PC_G0
:
9299 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9300 case elfcpp::R_ARM_ALU_PC_G1
:
9301 case elfcpp::R_ARM_ALU_PC_G2
:
9302 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9303 case elfcpp::R_ARM_ALU_SB_G0
:
9304 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9305 case elfcpp::R_ARM_ALU_SB_G1
:
9306 case elfcpp::R_ARM_ALU_SB_G2
:
9307 case elfcpp::R_ARM_LDR_PC_G0
:
9308 case elfcpp::R_ARM_LDR_PC_G1
:
9309 case elfcpp::R_ARM_LDR_PC_G2
:
9310 case elfcpp::R_ARM_LDR_SB_G0
:
9311 case elfcpp::R_ARM_LDR_SB_G1
:
9312 case elfcpp::R_ARM_LDR_SB_G2
:
9313 case elfcpp::R_ARM_LDRS_PC_G0
:
9314 case elfcpp::R_ARM_LDRS_PC_G1
:
9315 case elfcpp::R_ARM_LDRS_PC_G2
:
9316 case elfcpp::R_ARM_LDRS_SB_G0
:
9317 case elfcpp::R_ARM_LDRS_SB_G1
:
9318 case elfcpp::R_ARM_LDRS_SB_G2
:
9319 case elfcpp::R_ARM_LDC_PC_G0
:
9320 case elfcpp::R_ARM_LDC_PC_G1
:
9321 case elfcpp::R_ARM_LDC_PC_G2
:
9322 case elfcpp::R_ARM_LDC_SB_G0
:
9323 case elfcpp::R_ARM_LDC_SB_G1
:
9324 case elfcpp::R_ARM_LDC_SB_G2
:
9325 gold_error(_("cannot handle %s in a relocatable link"),
9326 arp
->name().c_str());
9333 // Report any errors.
9334 switch (reloc_status
)
9336 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
9338 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
9339 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9340 _("relocation overflow in %s"),
9341 arp
->name().c_str());
9343 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
9344 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9345 _("unexpected opcode while processing relocation %s"),
9346 arp
->name().c_str());
9353 // Return the value to use for a dynamic symbol which requires special
9354 // treatment. This is how we support equality comparisons of function
9355 // pointers across shared library boundaries, as described in the
9356 // processor specific ABI supplement.
9358 template<bool big_endian
>
9360 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
9362 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
9363 return this->plt_section()->address() + gsym
->plt_offset();
9366 // Map platform-specific relocs to real relocs
9368 template<bool big_endian
>
9370 Target_arm
<big_endian
>::get_real_reloc_type (unsigned int r_type
)
9374 case elfcpp::R_ARM_TARGET1
:
9375 // This is either R_ARM_ABS32 or R_ARM_REL32;
9376 return elfcpp::R_ARM_ABS32
;
9378 case elfcpp::R_ARM_TARGET2
:
9379 // This can be any reloc type but ususally is R_ARM_GOT_PREL
9380 return elfcpp::R_ARM_GOT_PREL
;
9387 // Whether if two EABI versions V1 and V2 are compatible.
9389 template<bool big_endian
>
9391 Target_arm
<big_endian
>::are_eabi_versions_compatible(
9392 elfcpp::Elf_Word v1
,
9393 elfcpp::Elf_Word v2
)
9395 // v4 and v5 are the same spec before and after it was released,
9396 // so allow mixing them.
9397 if ((v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
9398 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
9404 // Combine FLAGS from an input object called NAME and the processor-specific
9405 // flags in the ELF header of the output. Much of this is adapted from the
9406 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9407 // in bfd/elf32-arm.c.
9409 template<bool big_endian
>
9411 Target_arm
<big_endian
>::merge_processor_specific_flags(
9412 const std::string
& name
,
9413 elfcpp::Elf_Word flags
)
9415 if (this->are_processor_specific_flags_set())
9417 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
9419 // Nothing to merge if flags equal to those in output.
9420 if (flags
== out_flags
)
9423 // Complain about various flag mismatches.
9424 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
9425 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
9426 if (!this->are_eabi_versions_compatible(version1
, version2
)
9427 && parameters
->options().warn_mismatch())
9428 gold_error(_("Source object %s has EABI version %d but output has "
9429 "EABI version %d."),
9431 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
9432 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
9436 // If the input is the default architecture and had the default
9437 // flags then do not bother setting the flags for the output
9438 // architecture, instead allow future merges to do this. If no
9439 // future merges ever set these flags then they will retain their
9440 // uninitialised values, which surprise surprise, correspond
9441 // to the default values.
9445 // This is the first time, just copy the flags.
9446 // We only copy the EABI version for now.
9447 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
9451 // Adjust ELF file header.
9452 template<bool big_endian
>
9454 Target_arm
<big_endian
>::do_adjust_elf_header(
9455 unsigned char* view
,
9458 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
9460 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
9461 unsigned char e_ident
[elfcpp::EI_NIDENT
];
9462 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
9464 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
9465 == elfcpp::EF_ARM_EABI_UNKNOWN
)
9466 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
9468 e_ident
[elfcpp::EI_OSABI
] = 0;
9469 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
9471 // FIXME: Do EF_ARM_BE8 adjustment.
9473 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
9474 oehdr
.put_e_ident(e_ident
);
9477 // do_make_elf_object to override the same function in the base class.
9478 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
9479 // to store ARM specific information. Hence we need to have our own
9480 // ELF object creation.
9482 template<bool big_endian
>
9484 Target_arm
<big_endian
>::do_make_elf_object(
9485 const std::string
& name
,
9486 Input_file
* input_file
,
9487 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
9489 int et
= ehdr
.get_e_type();
9490 if (et
== elfcpp::ET_REL
)
9492 Arm_relobj
<big_endian
>* obj
=
9493 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
9497 else if (et
== elfcpp::ET_DYN
)
9499 Sized_dynobj
<32, big_endian
>* obj
=
9500 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
9506 gold_error(_("%s: unsupported ELF file type %d"),
9512 // Read the architecture from the Tag_also_compatible_with attribute, if any.
9513 // Returns -1 if no architecture could be read.
9514 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
9516 template<bool big_endian
>
9518 Target_arm
<big_endian
>::get_secondary_compatible_arch(
9519 const Attributes_section_data
* pasd
)
9521 const Object_attribute
*known_attributes
=
9522 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
9524 // Note: the tag and its argument below are uleb128 values, though
9525 // currently-defined values fit in one byte for each.
9526 const std::string
& sv
=
9527 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
9529 && sv
.data()[0] == elfcpp::Tag_CPU_arch
9530 && (sv
.data()[1] & 128) != 128)
9531 return sv
.data()[1];
9533 // This tag is "safely ignorable", so don't complain if it looks funny.
9537 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9538 // The tag is removed if ARCH is -1.
9539 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
9541 template<bool big_endian
>
9543 Target_arm
<big_endian
>::set_secondary_compatible_arch(
9544 Attributes_section_data
* pasd
,
9547 Object_attribute
*known_attributes
=
9548 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
9552 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
9556 // Note: the tag and its argument below are uleb128 values, though
9557 // currently-defined values fit in one byte for each.
9559 sv
[0] = elfcpp::Tag_CPU_arch
;
9560 gold_assert(arch
!= 0);
9564 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
9567 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9569 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
9571 template<bool big_endian
>
9573 Target_arm
<big_endian
>::tag_cpu_arch_combine(
9576 int* secondary_compat_out
,
9578 int secondary_compat
)
9580 #define T(X) elfcpp::TAG_CPU_ARCH_##X
9581 static const int v6t2
[] =
9593 static const int v6k
[] =
9606 static const int v7
[] =
9620 static const int v6_m
[] =
9635 static const int v6s_m
[] =
9651 static const int v7e_m
[] =
9668 static const int v4t_plus_v6_m
[] =
9684 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
9686 static const int *comb
[] =
9694 // Pseudo-architecture.
9698 // Check we've not got a higher architecture than we know about.
9700 if (oldtag
>= elfcpp::MAX_TAG_CPU_ARCH
|| newtag
>= elfcpp::MAX_TAG_CPU_ARCH
)
9702 gold_error(_("%s: unknown CPU architecture"), name
);
9706 // Override old tag if we have a Tag_also_compatible_with on the output.
9708 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
9709 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
9710 oldtag
= T(V4T_PLUS_V6_M
);
9712 // And override the new tag if we have a Tag_also_compatible_with on the
9715 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
9716 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
9717 newtag
= T(V4T_PLUS_V6_M
);
9719 // Architectures before V6KZ add features monotonically.
9720 int tagh
= std::max(oldtag
, newtag
);
9721 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
9724 int tagl
= std::min(oldtag
, newtag
);
9725 int result
= comb
[tagh
- T(V6T2
)][tagl
];
9727 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9728 // as the canonical version.
9729 if (result
== T(V4T_PLUS_V6_M
))
9732 *secondary_compat_out
= T(V6_M
);
9735 *secondary_compat_out
= -1;
9739 gold_error(_("%s: conflicting CPU architectures %d/%d"),
9740 name
, oldtag
, newtag
);
9748 // Helper to print AEABI enum tag value.
9750 template<bool big_endian
>
9752 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
9754 static const char *aeabi_enum_names
[] =
9755 { "", "variable-size", "32-bit", "" };
9756 const size_t aeabi_enum_names_size
=
9757 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
9759 if (value
< aeabi_enum_names_size
)
9760 return std::string(aeabi_enum_names
[value
]);
9764 sprintf(buffer
, "<unknown value %u>", value
);
9765 return std::string(buffer
);
9769 // Return the string value to store in TAG_CPU_name.
9771 template<bool big_endian
>
9773 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
9775 static const char *name_table
[] = {
9776 // These aren't real CPU names, but we can't guess
9777 // that from the architecture version alone.
9793 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
9795 if (value
< name_table_size
)
9796 return std::string(name_table
[value
]);
9800 sprintf(buffer
, "<unknown CPU value %u>", value
);
9801 return std::string(buffer
);
9805 // Merge object attributes from input file called NAME with those of the
9806 // output. The input object attributes are in the object pointed by PASD.
9808 template<bool big_endian
>
9810 Target_arm
<big_endian
>::merge_object_attributes(
9812 const Attributes_section_data
* pasd
)
9814 // Return if there is no attributes section data.
9818 // If output has no object attributes, just copy.
9819 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
9820 if (this->attributes_section_data_
== NULL
)
9822 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
9823 Object_attribute
* out_attr
=
9824 this->attributes_section_data_
->known_attributes(vendor
);
9826 // We do not output objects with Tag_MPextension_use_legacy - we move
9827 // the attribute's value to Tag_MPextension_use. */
9828 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
9830 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
9831 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
9832 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
9834 gold_error(_("%s has both the current and legacy "
9835 "Tag_MPextension_use attributes"),
9839 out_attr
[elfcpp::Tag_MPextension_use
] =
9840 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
9841 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
9842 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
9848 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
9849 Object_attribute
* out_attr
=
9850 this->attributes_section_data_
->known_attributes(vendor
);
9852 // This needs to happen before Tag_ABI_FP_number_model is merged. */
9853 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
9854 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
9856 // Ignore mismatches if the object doesn't use floating point. */
9857 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
9858 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
9859 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
9860 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0
9861 && parameters
->options().warn_mismatch())
9862 gold_error(_("%s uses VFP register arguments, output does not"),
9866 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
9868 // Merge this attribute with existing attributes.
9871 case elfcpp::Tag_CPU_raw_name
:
9872 case elfcpp::Tag_CPU_name
:
9873 // These are merged after Tag_CPU_arch.
9876 case elfcpp::Tag_ABI_optimization_goals
:
9877 case elfcpp::Tag_ABI_FP_optimization_goals
:
9878 // Use the first value seen.
9881 case elfcpp::Tag_CPU_arch
:
9883 unsigned int saved_out_attr
= out_attr
->int_value();
9884 // Merge Tag_CPU_arch and Tag_also_compatible_with.
9885 int secondary_compat
=
9886 this->get_secondary_compatible_arch(pasd
);
9887 int secondary_compat_out
=
9888 this->get_secondary_compatible_arch(
9889 this->attributes_section_data_
);
9890 out_attr
[i
].set_int_value(
9891 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
9892 &secondary_compat_out
,
9893 in_attr
[i
].int_value(),
9895 this->set_secondary_compatible_arch(this->attributes_section_data_
,
9896 secondary_compat_out
);
9898 // Merge Tag_CPU_name and Tag_CPU_raw_name.
9899 if (out_attr
[i
].int_value() == saved_out_attr
)
9900 ; // Leave the names alone.
9901 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
9903 // The output architecture has been changed to match the
9904 // input architecture. Use the input names.
9905 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
9906 in_attr
[elfcpp::Tag_CPU_name
].string_value());
9907 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
9908 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
9912 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
9913 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
9916 // If we still don't have a value for Tag_CPU_name,
9917 // make one up now. Tag_CPU_raw_name remains blank.
9918 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
9920 const std::string cpu_name
=
9921 this->tag_cpu_name_value(out_attr
[i
].int_value());
9922 // FIXME: If we see an unknown CPU, this will be set
9923 // to "<unknown CPU n>", where n is the attribute value.
9924 // This is different from BFD, which leaves the name alone.
9925 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
9930 case elfcpp::Tag_ARM_ISA_use
:
9931 case elfcpp::Tag_THUMB_ISA_use
:
9932 case elfcpp::Tag_WMMX_arch
:
9933 case elfcpp::Tag_Advanced_SIMD_arch
:
9934 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
9935 case elfcpp::Tag_ABI_FP_rounding
:
9936 case elfcpp::Tag_ABI_FP_exceptions
:
9937 case elfcpp::Tag_ABI_FP_user_exceptions
:
9938 case elfcpp::Tag_ABI_FP_number_model
:
9939 case elfcpp::Tag_VFP_HP_extension
:
9940 case elfcpp::Tag_CPU_unaligned_access
:
9941 case elfcpp::Tag_T2EE_use
:
9942 case elfcpp::Tag_Virtualization_use
:
9943 case elfcpp::Tag_MPextension_use
:
9944 // Use the largest value specified.
9945 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
9946 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
9949 case elfcpp::Tag_ABI_align8_preserved
:
9950 case elfcpp::Tag_ABI_PCS_RO_data
:
9951 // Use the smallest value specified.
9952 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
9953 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
9956 case elfcpp::Tag_ABI_align8_needed
:
9957 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
9958 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
9959 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
9962 // This error message should be enabled once all non-conformant
9963 // binaries in the toolchain have had the attributes set
9965 // gold_error(_("output 8-byte data alignment conflicts with %s"),
9969 case elfcpp::Tag_ABI_FP_denormal
:
9970 case elfcpp::Tag_ABI_PCS_GOT_use
:
9972 // These tags have 0 = don't care, 1 = strong requirement,
9973 // 2 = weak requirement.
9974 static const int order_021
[3] = {0, 2, 1};
9976 // Use the "greatest" from the sequence 0, 2, 1, or the largest
9977 // value if greater than 2 (for future-proofing).
9978 if ((in_attr
[i
].int_value() > 2
9979 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
9980 || (in_attr
[i
].int_value() <= 2
9981 && out_attr
[i
].int_value() <= 2
9982 && (order_021
[in_attr
[i
].int_value()]
9983 > order_021
[out_attr
[i
].int_value()])))
9984 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
9988 case elfcpp::Tag_CPU_arch_profile
:
9989 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
9991 // 0 will merge with anything.
9992 // 'A' and 'S' merge to 'A'.
9993 // 'R' and 'S' merge to 'R'.
9994 // 'M' and 'A|R|S' is an error.
9995 if (out_attr
[i
].int_value() == 0
9996 || (out_attr
[i
].int_value() == 'S'
9997 && (in_attr
[i
].int_value() == 'A'
9998 || in_attr
[i
].int_value() == 'R')))
9999 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10000 else if (in_attr
[i
].int_value() == 0
10001 || (in_attr
[i
].int_value() == 'S'
10002 && (out_attr
[i
].int_value() == 'A'
10003 || out_attr
[i
].int_value() == 'R')))
10005 else if (parameters
->options().warn_mismatch())
10008 (_("conflicting architecture profiles %c/%c"),
10009 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
10010 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
10014 case elfcpp::Tag_VFP_arch
:
10016 static const struct
10020 } vfp_versions
[7] =
10031 // Values greater than 6 aren't defined, so just pick the
10033 if (in_attr
[i
].int_value() > 6
10034 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10036 *out_attr
= *in_attr
;
10039 // The output uses the superset of input features
10040 // (ISA version) and registers.
10041 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
10042 vfp_versions
[out_attr
[i
].int_value()].ver
);
10043 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
10044 vfp_versions
[out_attr
[i
].int_value()].regs
);
10045 // This assumes all possible supersets are also a valid
10048 for (newval
= 6; newval
> 0; newval
--)
10050 if (regs
== vfp_versions
[newval
].regs
10051 && ver
== vfp_versions
[newval
].ver
)
10054 out_attr
[i
].set_int_value(newval
);
10057 case elfcpp::Tag_PCS_config
:
10058 if (out_attr
[i
].int_value() == 0)
10059 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10060 else if (in_attr
[i
].int_value() != 0
10061 && out_attr
[i
].int_value() != 0
10062 && parameters
->options().warn_mismatch())
10064 // It's sometimes ok to mix different configs, so this is only
10066 gold_warning(_("%s: conflicting platform configuration"), name
);
10069 case elfcpp::Tag_ABI_PCS_R9_use
:
10070 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10071 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10072 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10073 && parameters
->options().warn_mismatch())
10075 gold_error(_("%s: conflicting use of R9"), name
);
10077 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
10078 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10080 case elfcpp::Tag_ABI_PCS_RW_data
:
10081 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10082 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10083 != elfcpp::AEABI_R9_SB
)
10084 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10085 != elfcpp::AEABI_R9_unused
)
10086 && parameters
->options().warn_mismatch())
10088 gold_error(_("%s: SB relative addressing conflicts with use "
10092 // Use the smallest value specified.
10093 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10094 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10096 case elfcpp::Tag_ABI_PCS_wchar_t
:
10097 // FIXME: Make it possible to turn off this warning.
10098 if (out_attr
[i
].int_value()
10099 && in_attr
[i
].int_value()
10100 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10101 && parameters
->options().warn_mismatch())
10103 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10104 "use %u-byte wchar_t; use of wchar_t values "
10105 "across objects may fail"),
10106 name
, in_attr
[i
].int_value(),
10107 out_attr
[i
].int_value());
10109 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
10110 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10112 case elfcpp::Tag_ABI_enum_size
:
10113 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
10115 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
10116 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
10118 // The existing object is compatible with anything.
10119 // Use whatever requirements the new object has.
10120 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10122 // FIXME: Make it possible to turn off this warning.
10123 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
10124 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10125 && parameters
->options().warn_mismatch())
10127 unsigned int in_value
= in_attr
[i
].int_value();
10128 unsigned int out_value
= out_attr
[i
].int_value();
10129 gold_warning(_("%s uses %s enums yet the output is to use "
10130 "%s enums; use of enum values across objects "
10133 this->aeabi_enum_name(in_value
).c_str(),
10134 this->aeabi_enum_name(out_value
).c_str());
10138 case elfcpp::Tag_ABI_VFP_args
:
10141 case elfcpp::Tag_ABI_WMMX_args
:
10142 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10143 && parameters
->options().warn_mismatch())
10145 gold_error(_("%s uses iWMMXt register arguments, output does "
10150 case Object_attribute::Tag_compatibility
:
10151 // Merged in target-independent code.
10153 case elfcpp::Tag_ABI_HardFP_use
:
10154 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10155 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
10156 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
10157 out_attr
[i
].set_int_value(3);
10158 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10159 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10161 case elfcpp::Tag_ABI_FP_16bit_format
:
10162 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
10164 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10165 && parameters
->options().warn_mismatch())
10166 gold_error(_("fp16 format mismatch between %s and output"),
10169 if (in_attr
[i
].int_value() != 0)
10170 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10173 case elfcpp::Tag_DIV_use
:
10174 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10175 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10176 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10177 // CPU. We will merge as follows: If the input attribute's value
10178 // is one then the output attribute's value remains unchanged. If
10179 // the input attribute's value is zero or two then if the output
10180 // attribute's value is one the output value is set to the input
10181 // value, otherwise the output value must be the same as the
10183 if (in_attr
[i
].int_value() != 1 && out_attr
[i
].int_value() != 1)
10185 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
10187 gold_error(_("DIV usage mismatch between %s and output"),
10192 if (in_attr
[i
].int_value() != 1)
10193 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10197 case elfcpp::Tag_MPextension_use_legacy
:
10198 // We don't output objects with Tag_MPextension_use_legacy - we
10199 // move the value to Tag_MPextension_use.
10200 if (in_attr
[i
].int_value() != 0
10201 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
10203 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
10204 != in_attr
[i
].int_value())
10206 gold_error(_("%s has has both the current and legacy "
10207 "Tag_MPextension_use attributes"),
10212 if (in_attr
[i
].int_value()
10213 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10214 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
10218 case elfcpp::Tag_nodefaults
:
10219 // This tag is set if it exists, but the value is unused (and is
10220 // typically zero). We don't actually need to do anything here -
10221 // the merge happens automatically when the type flags are merged
10224 case elfcpp::Tag_also_compatible_with
:
10225 // Already done in Tag_CPU_arch.
10227 case elfcpp::Tag_conformance
:
10228 // Keep the attribute if it matches. Throw it away otherwise.
10229 // No attribute means no claim to conform.
10230 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
10231 out_attr
[i
].set_string_value("");
10236 const char* err_object
= NULL
;
10238 // The "known_obj_attributes" table does contain some undefined
10239 // attributes. Ensure that there are unused.
10240 if (out_attr
[i
].int_value() != 0
10241 || out_attr
[i
].string_value() != "")
10242 err_object
= "output";
10243 else if (in_attr
[i
].int_value() != 0
10244 || in_attr
[i
].string_value() != "")
10247 if (err_object
!= NULL
10248 && parameters
->options().warn_mismatch())
10250 // Attribute numbers >=64 (mod 128) can be safely ignored.
10251 if ((i
& 127) < 64)
10252 gold_error(_("%s: unknown mandatory EABI object attribute "
10256 gold_warning(_("%s: unknown EABI object attribute %d"),
10260 // Only pass on attributes that match in both inputs.
10261 if (!in_attr
[i
].matches(out_attr
[i
]))
10263 out_attr
[i
].set_int_value(0);
10264 out_attr
[i
].set_string_value("");
10269 // If out_attr was copied from in_attr then it won't have a type yet.
10270 if (in_attr
[i
].type() && !out_attr
[i
].type())
10271 out_attr
[i
].set_type(in_attr
[i
].type());
10274 // Merge Tag_compatibility attributes and any common GNU ones.
10275 this->attributes_section_data_
->merge(name
, pasd
);
10277 // Check for any attributes not known on ARM.
10278 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
10279 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
10280 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
10281 Other_attributes
* out_other_attributes
=
10282 this->attributes_section_data_
->other_attributes(vendor
);
10283 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
10285 while (in_iter
!= in_other_attributes
->end()
10286 || out_iter
!= out_other_attributes
->end())
10288 const char* err_object
= NULL
;
10291 // The tags for each list are in numerical order.
10292 // If the tags are equal, then merge.
10293 if (out_iter
!= out_other_attributes
->end()
10294 && (in_iter
== in_other_attributes
->end()
10295 || in_iter
->first
> out_iter
->first
))
10297 // This attribute only exists in output. We can't merge, and we
10298 // don't know what the tag means, so delete it.
10299 err_object
= "output";
10300 err_tag
= out_iter
->first
;
10301 int saved_tag
= out_iter
->first
;
10302 delete out_iter
->second
;
10303 out_other_attributes
->erase(out_iter
);
10304 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10306 else if (in_iter
!= in_other_attributes
->end()
10307 && (out_iter
!= out_other_attributes
->end()
10308 || in_iter
->first
< out_iter
->first
))
10310 // This attribute only exists in input. We can't merge, and we
10311 // don't know what the tag means, so ignore it.
10313 err_tag
= in_iter
->first
;
10316 else // The tags are equal.
10318 // As present, all attributes in the list are unknown, and
10319 // therefore can't be merged meaningfully.
10320 err_object
= "output";
10321 err_tag
= out_iter
->first
;
10323 // Only pass on attributes that match in both inputs.
10324 if (!in_iter
->second
->matches(*(out_iter
->second
)))
10326 // No match. Delete the attribute.
10327 int saved_tag
= out_iter
->first
;
10328 delete out_iter
->second
;
10329 out_other_attributes
->erase(out_iter
);
10330 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10334 // Matched. Keep the attribute and move to the next.
10340 if (err_object
&& parameters
->options().warn_mismatch())
10342 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10343 if ((err_tag
& 127) < 64)
10345 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10346 err_object
, err_tag
);
10350 gold_warning(_("%s: unknown EABI object attribute %d"),
10351 err_object
, err_tag
);
10357 // Stub-generation methods for Target_arm.
10359 // Make a new Arm_input_section object.
10361 template<bool big_endian
>
10362 Arm_input_section
<big_endian
>*
10363 Target_arm
<big_endian
>::new_arm_input_section(
10365 unsigned int shndx
)
10367 Section_id
sid(relobj
, shndx
);
10369 Arm_input_section
<big_endian
>* arm_input_section
=
10370 new Arm_input_section
<big_endian
>(relobj
, shndx
);
10371 arm_input_section
->init();
10373 // Register new Arm_input_section in map for look-up.
10374 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
10375 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
10377 // Make sure that it we have not created another Arm_input_section
10378 // for this input section already.
10379 gold_assert(ins
.second
);
10381 return arm_input_section
;
10384 // Find the Arm_input_section object corresponding to the SHNDX-th input
10385 // section of RELOBJ.
10387 template<bool big_endian
>
10388 Arm_input_section
<big_endian
>*
10389 Target_arm
<big_endian
>::find_arm_input_section(
10391 unsigned int shndx
) const
10393 Section_id
sid(relobj
, shndx
);
10394 typename
Arm_input_section_map::const_iterator p
=
10395 this->arm_input_section_map_
.find(sid
);
10396 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
10399 // Make a new stub table.
10401 template<bool big_endian
>
10402 Stub_table
<big_endian
>*
10403 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
10405 Stub_table
<big_endian
>* stub_table
=
10406 new Stub_table
<big_endian
>(owner
);
10407 this->stub_tables_
.push_back(stub_table
);
10409 stub_table
->set_address(owner
->address() + owner
->data_size());
10410 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
10411 stub_table
->finalize_data_size();
10416 // Scan a relocation for stub generation.
10418 template<bool big_endian
>
10420 Target_arm
<big_endian
>::scan_reloc_for_stub(
10421 const Relocate_info
<32, big_endian
>* relinfo
,
10422 unsigned int r_type
,
10423 const Sized_symbol
<32>* gsym
,
10424 unsigned int r_sym
,
10425 const Symbol_value
<32>* psymval
,
10426 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
10427 Arm_address address
)
10429 typedef typename Target_arm
<big_endian
>::Relocate Relocate
;
10431 const Arm_relobj
<big_endian
>* arm_relobj
=
10432 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10434 bool target_is_thumb
;
10435 Symbol_value
<32> symval
;
10438 // This is a global symbol. Determine if we use PLT and if the
10439 // final target is THUMB.
10440 if (gsym
->use_plt_offset(Relocate::reloc_is_non_pic(r_type
)))
10442 // This uses a PLT, change the symbol value.
10443 symval
.set_output_value(this->plt_section()->address()
10444 + gsym
->plt_offset());
10446 target_is_thumb
= false;
10448 else if (gsym
->is_undefined())
10449 // There is no need to generate a stub symbol is undefined.
10454 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
10455 || (gsym
->type() == elfcpp::STT_FUNC
10456 && !gsym
->is_undefined()
10457 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
10462 // This is a local symbol. Determine if the final target is THUMB.
10463 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
10466 // Strip LSB if this points to a THUMB target.
10467 const Arm_reloc_property
* reloc_property
=
10468 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10469 gold_assert(reloc_property
!= NULL
);
10470 if (target_is_thumb
10471 && reloc_property
->uses_thumb_bit()
10472 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
10474 Arm_address stripped_value
=
10475 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
10476 symval
.set_output_value(stripped_value
);
10480 // Get the symbol value.
10481 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
10483 // Owing to pipelining, the PC relative branches below actually skip
10484 // two instructions when the branch offset is 0.
10485 Arm_address destination
;
10488 case elfcpp::R_ARM_CALL
:
10489 case elfcpp::R_ARM_JUMP24
:
10490 case elfcpp::R_ARM_PLT32
:
10492 destination
= value
+ addend
+ 8;
10494 case elfcpp::R_ARM_THM_CALL
:
10495 case elfcpp::R_ARM_THM_XPC22
:
10496 case elfcpp::R_ARM_THM_JUMP24
:
10497 case elfcpp::R_ARM_THM_JUMP19
:
10499 destination
= value
+ addend
+ 4;
10502 gold_unreachable();
10505 Reloc_stub
* stub
= NULL
;
10506 Stub_type stub_type
=
10507 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
10509 if (stub_type
!= arm_stub_none
)
10511 // Try looking up an existing stub from a stub table.
10512 Stub_table
<big_endian
>* stub_table
=
10513 arm_relobj
->stub_table(relinfo
->data_shndx
);
10514 gold_assert(stub_table
!= NULL
);
10516 // Locate stub by destination.
10517 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
10519 // Create a stub if there is not one already
10520 stub
= stub_table
->find_reloc_stub(stub_key
);
10523 // create a new stub and add it to stub table.
10524 stub
= this->stub_factory().make_reloc_stub(stub_type
);
10525 stub_table
->add_reloc_stub(stub
, stub_key
);
10528 // Record the destination address.
10529 stub
->set_destination_address(destination
10530 | (target_is_thumb
? 1 : 0));
10533 // For Cortex-A8, we need to record a relocation at 4K page boundary.
10534 if (this->fix_cortex_a8_
10535 && (r_type
== elfcpp::R_ARM_THM_JUMP24
10536 || r_type
== elfcpp::R_ARM_THM_JUMP19
10537 || r_type
== elfcpp::R_ARM_THM_CALL
10538 || r_type
== elfcpp::R_ARM_THM_XPC22
)
10539 && (address
& 0xfffU
) == 0xffeU
)
10541 // Found a candidate. Note we haven't checked the destination is
10542 // within 4K here: if we do so (and don't create a record) we can't
10543 // tell that a branch should have been relocated when scanning later.
10544 this->cortex_a8_relocs_info_
[address
] =
10545 new Cortex_a8_reloc(stub
, r_type
,
10546 destination
| (target_is_thumb
? 1 : 0));
10550 // This function scans a relocation sections for stub generation.
10551 // The template parameter Relocate must be a class type which provides
10552 // a single function, relocate(), which implements the machine
10553 // specific part of a relocation.
10555 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
10556 // SHT_REL or SHT_RELA.
10558 // PRELOCS points to the relocation data. RELOC_COUNT is the number
10559 // of relocs. OUTPUT_SECTION is the output section.
10560 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
10561 // mapped to output offsets.
10563 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
10564 // VIEW_SIZE is the size. These refer to the input section, unless
10565 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
10566 // the output section.
10568 template<bool big_endian
>
10569 template<int sh_type
>
10571 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
10572 const Relocate_info
<32, big_endian
>* relinfo
,
10573 const unsigned char* prelocs
,
10574 size_t reloc_count
,
10575 Output_section
* output_section
,
10576 bool needs_special_offset_handling
,
10577 const unsigned char* view
,
10578 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
10581 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
10582 const int reloc_size
=
10583 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
10585 Arm_relobj
<big_endian
>* arm_object
=
10586 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10587 unsigned int local_count
= arm_object
->local_symbol_count();
10589 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
10591 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
10593 Reltype
reloc(prelocs
);
10595 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
10596 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
10597 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
10599 r_type
= this->get_real_reloc_type(r_type
);
10601 // Only a few relocation types need stubs.
10602 if ((r_type
!= elfcpp::R_ARM_CALL
)
10603 && (r_type
!= elfcpp::R_ARM_JUMP24
)
10604 && (r_type
!= elfcpp::R_ARM_PLT32
)
10605 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
10606 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
10607 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
10608 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
10609 && (r_type
!= elfcpp::R_ARM_V4BX
))
10612 section_offset_type offset
=
10613 convert_to_section_size_type(reloc
.get_r_offset());
10615 if (needs_special_offset_handling
)
10617 offset
= output_section
->output_offset(relinfo
->object
,
10618 relinfo
->data_shndx
,
10624 // Create a v4bx stub if --fix-v4bx-interworking is used.
10625 if (r_type
== elfcpp::R_ARM_V4BX
)
10627 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
10629 // Get the BX instruction.
10630 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
10631 const Valtype
* wv
=
10632 reinterpret_cast<const Valtype
*>(view
+ offset
);
10633 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
10634 elfcpp::Swap
<32, big_endian
>::readval(wv
);
10635 const uint32_t reg
= (insn
& 0xf);
10639 // Try looking up an existing stub from a stub table.
10640 Stub_table
<big_endian
>* stub_table
=
10641 arm_object
->stub_table(relinfo
->data_shndx
);
10642 gold_assert(stub_table
!= NULL
);
10644 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
10646 // create a new stub and add it to stub table.
10647 Arm_v4bx_stub
* stub
=
10648 this->stub_factory().make_arm_v4bx_stub(reg
);
10649 gold_assert(stub
!= NULL
);
10650 stub_table
->add_arm_v4bx_stub(stub
);
10658 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
10659 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
10660 stub_addend_reader(r_type
, view
+ offset
, reloc
);
10662 const Sized_symbol
<32>* sym
;
10664 Symbol_value
<32> symval
;
10665 const Symbol_value
<32> *psymval
;
10666 if (r_sym
< local_count
)
10669 psymval
= arm_object
->local_symbol(r_sym
);
10671 // If the local symbol belongs to a section we are discarding,
10672 // and that section is a debug section, try to find the
10673 // corresponding kept section and map this symbol to its
10674 // counterpart in the kept section. The symbol must not
10675 // correspond to a section we are folding.
10677 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
10679 && shndx
!= elfcpp::SHN_UNDEF
10680 && !arm_object
->is_section_included(shndx
)
10681 && !(relinfo
->symtab
->is_section_folded(arm_object
, shndx
)))
10683 if (comdat_behavior
== CB_UNDETERMINED
)
10686 arm_object
->section_name(relinfo
->data_shndx
);
10687 comdat_behavior
= get_comdat_behavior(name
.c_str());
10689 if (comdat_behavior
== CB_PRETEND
)
10692 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
10693 arm_object
->map_to_kept_section(shndx
, &found
);
10695 symval
.set_output_value(value
+ psymval
->input_value());
10697 symval
.set_output_value(0);
10701 symval
.set_output_value(0);
10703 symval
.set_no_output_symtab_entry();
10709 const Symbol
* gsym
= arm_object
->global_symbol(r_sym
);
10710 gold_assert(gsym
!= NULL
);
10711 if (gsym
->is_forwarder())
10712 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
10714 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
10715 if (sym
->has_symtab_index())
10716 symval
.set_output_symtab_index(sym
->symtab_index());
10718 symval
.set_no_output_symtab_entry();
10720 // We need to compute the would-be final value of this global
10722 const Symbol_table
* symtab
= relinfo
->symtab
;
10723 const Sized_symbol
<32>* sized_symbol
=
10724 symtab
->get_sized_symbol
<32>(gsym
);
10725 Symbol_table::Compute_final_value_status status
;
10726 Arm_address value
=
10727 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
10729 // Skip this if the symbol has not output section.
10730 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
10733 symval
.set_output_value(value
);
10737 // If symbol is a section symbol, we don't know the actual type of
10738 // destination. Give up.
10739 if (psymval
->is_section_symbol())
10742 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
10743 addend
, view_address
+ offset
);
10747 // Scan an input section for stub generation.
10749 template<bool big_endian
>
10751 Target_arm
<big_endian
>::scan_section_for_stubs(
10752 const Relocate_info
<32, big_endian
>* relinfo
,
10753 unsigned int sh_type
,
10754 const unsigned char* prelocs
,
10755 size_t reloc_count
,
10756 Output_section
* output_section
,
10757 bool needs_special_offset_handling
,
10758 const unsigned char* view
,
10759 Arm_address view_address
,
10760 section_size_type view_size
)
10762 if (sh_type
== elfcpp::SHT_REL
)
10763 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
10768 needs_special_offset_handling
,
10772 else if (sh_type
== elfcpp::SHT_RELA
)
10773 // We do not support RELA type relocations yet. This is provided for
10775 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
10780 needs_special_offset_handling
,
10785 gold_unreachable();
10788 // Group input sections for stub generation.
10790 // We goup input sections in an output sections so that the total size,
10791 // including any padding space due to alignment is smaller than GROUP_SIZE
10792 // unless the only input section in group is bigger than GROUP_SIZE already.
10793 // Then an ARM stub table is created to follow the last input section
10794 // in group. For each group an ARM stub table is created an is placed
10795 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
10796 // extend the group after the stub table.
10798 template<bool big_endian
>
10800 Target_arm
<big_endian
>::group_sections(
10802 section_size_type group_size
,
10803 bool stubs_always_after_branch
)
10805 // Group input sections and insert stub table
10806 Layout::Section_list section_list
;
10807 layout
->get_allocated_sections(§ion_list
);
10808 for (Layout::Section_list::const_iterator p
= section_list
.begin();
10809 p
!= section_list
.end();
10812 Arm_output_section
<big_endian
>* output_section
=
10813 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
10814 output_section
->group_sections(group_size
, stubs_always_after_branch
,
10819 // Relaxation hook. This is where we do stub generation.
10821 template<bool big_endian
>
10823 Target_arm
<big_endian
>::do_relax(
10825 const Input_objects
* input_objects
,
10826 Symbol_table
* symtab
,
10829 // No need to generate stubs if this is a relocatable link.
10830 gold_assert(!parameters
->options().relocatable());
10832 // If this is the first pass, we need to group input sections into
10834 bool done_exidx_fixup
= false;
10835 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
10838 // Determine the stub group size. The group size is the absolute
10839 // value of the parameter --stub-group-size. If --stub-group-size
10840 // is passed a negative value, we restict stubs to be always after
10841 // the stubbed branches.
10842 int32_t stub_group_size_param
=
10843 parameters
->options().stub_group_size();
10844 bool stubs_always_after_branch
= stub_group_size_param
< 0;
10845 section_size_type stub_group_size
= abs(stub_group_size_param
);
10847 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
10848 // page as the first half of a 32-bit branch straddling two 4K pages.
10849 // This is a crude way of enforcing that.
10850 if (this->fix_cortex_a8_
)
10851 stubs_always_after_branch
= true;
10853 if (stub_group_size
== 1)
10856 // Thumb branch range is +-4MB has to be used as the default
10857 // maximum size (a given section can contain both ARM and Thumb
10858 // code, so the worst case has to be taken into account). If we are
10859 // fixing cortex-a8 errata, the branch range has to be even smaller,
10860 // since wide conditional branch has a range of +-1MB only.
10862 // This value is 24K less than that, which allows for 2025
10863 // 12-byte stubs. If we exceed that, then we will fail to link.
10864 // The user will have to relink with an explicit group size
10866 if (this->fix_cortex_a8_
)
10867 stub_group_size
= 1024276;
10869 stub_group_size
= 4170000;
10872 group_sections(layout
, stub_group_size
, stubs_always_after_branch
);
10874 // Also fix .ARM.exidx section coverage.
10875 Output_section
* os
= layout
->find_output_section(".ARM.exidx");
10876 if (os
!= NULL
&& os
->type() == elfcpp::SHT_ARM_EXIDX
)
10878 Arm_output_section
<big_endian
>* exidx_output_section
=
10879 Arm_output_section
<big_endian
>::as_arm_output_section(os
);
10880 this->fix_exidx_coverage(layout
, exidx_output_section
, symtab
);
10881 done_exidx_fixup
= true;
10886 // If this is not the first pass, addresses and file offsets have
10887 // been reset at this point, set them here.
10888 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
10889 sp
!= this->stub_tables_
.end();
10892 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
10893 off_t off
= align_address(owner
->original_size(),
10894 (*sp
)->addralign());
10895 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
10896 owner
->offset() + off
);
10900 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
10901 // beginning of each relaxation pass, just blow away all the stubs.
10902 // Alternatively, we could selectively remove only the stubs and reloc
10903 // information for code sections that have moved since the last pass.
10904 // That would require more book-keeping.
10905 if (this->fix_cortex_a8_
)
10907 // Clear all Cortex-A8 reloc information.
10908 for (typename
Cortex_a8_relocs_info::const_iterator p
=
10909 this->cortex_a8_relocs_info_
.begin();
10910 p
!= this->cortex_a8_relocs_info_
.end();
10913 this->cortex_a8_relocs_info_
.clear();
10915 // Remove all Cortex-A8 stubs.
10916 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
10917 sp
!= this->stub_tables_
.end();
10919 (*sp
)->remove_all_cortex_a8_stubs();
10922 // Scan relocs for relocation stubs
10923 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
10924 op
!= input_objects
->relobj_end();
10927 Arm_relobj
<big_endian
>* arm_relobj
=
10928 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
10929 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
10932 // Check all stub tables to see if any of them have their data sizes
10933 // or addresses alignments changed. These are the only things that
10935 bool any_stub_table_changed
= false;
10936 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
10937 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
10938 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
10941 if ((*sp
)->update_data_size_and_addralign())
10943 // Update data size of stub table owner.
10944 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
10945 uint64_t address
= owner
->address();
10946 off_t offset
= owner
->offset();
10947 owner
->reset_address_and_file_offset();
10948 owner
->set_address_and_file_offset(address
, offset
);
10950 sections_needing_adjustment
.insert(owner
->output_section());
10951 any_stub_table_changed
= true;
10955 // Output_section_data::output_section() returns a const pointer but we
10956 // need to update output sections, so we record all output sections needing
10957 // update above and scan the sections here to find out what sections need
10959 for(Layout::Section_list::const_iterator p
= layout
->section_list().begin();
10960 p
!= layout
->section_list().end();
10963 if (sections_needing_adjustment
.find(*p
)
10964 != sections_needing_adjustment
.end())
10965 (*p
)->set_section_offsets_need_adjustment();
10968 // Stop relaxation if no EXIDX fix-up and no stub table change.
10969 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
10971 // Finalize the stubs in the last relaxation pass.
10972 if (!continue_relaxation
)
10974 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
10975 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
10977 (*sp
)->finalize_stubs();
10979 // Update output local symbol counts of objects if necessary.
10980 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
10981 op
!= input_objects
->relobj_end();
10984 Arm_relobj
<big_endian
>* arm_relobj
=
10985 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
10987 // Update output local symbol counts. We need to discard local
10988 // symbols defined in parts of input sections that are discarded by
10990 if (arm_relobj
->output_local_symbol_count_needs_update())
10991 arm_relobj
->update_output_local_symbol_count();
10995 return continue_relaxation
;
10998 // Relocate a stub.
11000 template<bool big_endian
>
11002 Target_arm
<big_endian
>::relocate_stub(
11004 const Relocate_info
<32, big_endian
>* relinfo
,
11005 Output_section
* output_section
,
11006 unsigned char* view
,
11007 Arm_address address
,
11008 section_size_type view_size
)
11011 const Stub_template
* stub_template
= stub
->stub_template();
11012 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
11014 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
11015 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
11017 unsigned int r_type
= insn
->r_type();
11018 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
11019 section_size_type reloc_size
= insn
->size();
11020 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
11022 // This is the address of the stub destination.
11023 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
11024 Symbol_value
<32> symval
;
11025 symval
.set_output_value(target
);
11027 // Synthesize a fake reloc just in case. We don't have a symbol so
11029 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
11030 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
11031 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
11032 reloc_write
.put_r_offset(reloc_offset
);
11033 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
11034 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
11036 relocate
.relocate(relinfo
, this, output_section
,
11037 this->fake_relnum_for_stubs
, rel
, r_type
,
11038 NULL
, &symval
, view
+ reloc_offset
,
11039 address
+ reloc_offset
, reloc_size
);
11043 // Determine whether an object attribute tag takes an integer, a
11046 template<bool big_endian
>
11048 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
11050 if (tag
== Object_attribute::Tag_compatibility
)
11051 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11052 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
11053 else if (tag
== elfcpp::Tag_nodefaults
)
11054 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11055 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
11056 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
11057 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
11059 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
11061 return ((tag
& 1) != 0
11062 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11063 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
11066 // Reorder attributes.
11068 // The ABI defines that Tag_conformance should be emitted first, and that
11069 // Tag_nodefaults should be second (if either is defined). This sets those
11070 // two positions, and bumps up the position of all the remaining tags to
11073 template<bool big_endian
>
11075 Target_arm
<big_endian
>::do_attributes_order(int num
) const
11077 // Reorder the known object attributes in output. We want to move
11078 // Tag_conformance to position 4 and Tag_conformance to position 5
11079 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
11081 return elfcpp::Tag_conformance
;
11083 return elfcpp::Tag_nodefaults
;
11084 if ((num
- 2) < elfcpp::Tag_nodefaults
)
11086 if ((num
- 1) < elfcpp::Tag_conformance
)
11091 // Scan a span of THUMB code for Cortex-A8 erratum.
11093 template<bool big_endian
>
11095 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
11096 Arm_relobj
<big_endian
>* arm_relobj
,
11097 unsigned int shndx
,
11098 section_size_type span_start
,
11099 section_size_type span_end
,
11100 const unsigned char* view
,
11101 Arm_address address
)
11103 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11105 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11106 // The branch target is in the same 4KB region as the
11107 // first half of the branch.
11108 // The instruction before the branch is a 32-bit
11109 // length non-branch instruction.
11110 section_size_type i
= span_start
;
11111 bool last_was_32bit
= false;
11112 bool last_was_branch
= false;
11113 while (i
< span_end
)
11115 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11116 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
11117 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11118 bool is_blx
= false, is_b
= false;
11119 bool is_bl
= false, is_bcc
= false;
11121 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
11124 // Load the rest of the insn (in manual-friendly order).
11125 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11127 // Encoding T4: B<c>.W.
11128 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
11129 // Encoding T1: BL<c>.W.
11130 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
11131 // Encoding T2: BLX<c>.W.
11132 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
11133 // Encoding T3: B<c>.W (not permitted in IT block).
11134 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
11135 && (insn
& 0x07f00000U
) != 0x03800000U
);
11138 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
11140 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11141 // page boundary and it follows 32-bit non-branch instruction,
11142 // we need to work around.
11143 if (is_32bit_branch
11144 && ((address
+ i
) & 0xfffU
) == 0xffeU
11146 && !last_was_branch
)
11148 // Check to see if there is a relocation stub for this branch.
11149 bool force_target_arm
= false;
11150 bool force_target_thumb
= false;
11151 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
11152 Cortex_a8_relocs_info::const_iterator p
=
11153 this->cortex_a8_relocs_info_
.find(address
+ i
);
11155 if (p
!= this->cortex_a8_relocs_info_
.end())
11157 cortex_a8_reloc
= p
->second
;
11158 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
11160 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11161 && !target_is_thumb
)
11162 force_target_arm
= true;
11163 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11164 && target_is_thumb
)
11165 force_target_thumb
= true;
11169 Stub_type stub_type
= arm_stub_none
;
11171 // Check if we have an offending branch instruction.
11172 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
11173 uint16_t lower_insn
= insn
& 0xffffU
;
11174 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11176 if (cortex_a8_reloc
!= NULL
11177 && cortex_a8_reloc
->reloc_stub() != NULL
)
11178 // We've already made a stub for this instruction, e.g.
11179 // it's a long branch or a Thumb->ARM stub. Assume that
11180 // stub will suffice to work around the A8 erratum (see
11181 // setting of always_after_branch above).
11185 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
11187 stub_type
= arm_stub_a8_veneer_b_cond
;
11189 else if (is_b
|| is_bl
|| is_blx
)
11191 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
11196 stub_type
= (is_blx
11197 ? arm_stub_a8_veneer_blx
11199 ? arm_stub_a8_veneer_bl
11200 : arm_stub_a8_veneer_b
));
11203 if (stub_type
!= arm_stub_none
)
11205 Arm_address pc_for_insn
= address
+ i
+ 4;
11207 // The original instruction is a BL, but the target is
11208 // an ARM instruction. If we were not making a stub,
11209 // the BL would have been converted to a BLX. Use the
11210 // BLX stub instead in that case.
11211 if (this->may_use_blx() && force_target_arm
11212 && stub_type
== arm_stub_a8_veneer_bl
)
11214 stub_type
= arm_stub_a8_veneer_blx
;
11218 // Conversely, if the original instruction was
11219 // BLX but the target is Thumb mode, use the BL stub.
11220 else if (force_target_thumb
11221 && stub_type
== arm_stub_a8_veneer_blx
)
11223 stub_type
= arm_stub_a8_veneer_bl
;
11231 // If we found a relocation, use the proper destination,
11232 // not the offset in the (unrelocated) instruction.
11233 // Note this is always done if we switched the stub type above.
11234 if (cortex_a8_reloc
!= NULL
)
11235 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
11237 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
11239 // Add a new stub if destination address in in the same page.
11240 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
11242 Cortex_a8_stub
* stub
=
11243 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
11247 Stub_table
<big_endian
>* stub_table
=
11248 arm_relobj
->stub_table(shndx
);
11249 gold_assert(stub_table
!= NULL
);
11250 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
11255 i
+= insn_32bit
? 4 : 2;
11256 last_was_32bit
= insn_32bit
;
11257 last_was_branch
= is_32bit_branch
;
11261 // Apply the Cortex-A8 workaround.
11263 template<bool big_endian
>
11265 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
11266 const Cortex_a8_stub
* stub
,
11267 Arm_address stub_address
,
11268 unsigned char* insn_view
,
11269 Arm_address insn_address
)
11271 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11272 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
11273 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11274 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11275 off_t branch_offset
= stub_address
- (insn_address
+ 4);
11277 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11278 switch (stub
->stub_template()->type())
11280 case arm_stub_a8_veneer_b_cond
:
11281 // For a conditional branch, we re-write it to be a uncondition
11282 // branch to the stub. We use the THUMB-2 encoding here.
11283 upper_insn
= 0xf000U
;
11284 lower_insn
= 0xb800U
;
11286 case arm_stub_a8_veneer_b
:
11287 case arm_stub_a8_veneer_bl
:
11288 case arm_stub_a8_veneer_blx
:
11289 if ((lower_insn
& 0x5000U
) == 0x4000U
)
11290 // For a BLX instruction, make sure that the relocation is
11291 // rounded up to a word boundary. This follows the semantics of
11292 // the instruction which specifies that bit 1 of the target
11293 // address will come from bit 1 of the base address.
11294 branch_offset
= (branch_offset
+ 2) & ~3;
11296 // Put BRANCH_OFFSET back into the insn.
11297 gold_assert(!utils::has_overflow
<25>(branch_offset
));
11298 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
11299 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
11303 gold_unreachable();
11306 // Put the relocated value back in the object file:
11307 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
11308 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
11311 template<bool big_endian
>
11312 class Target_selector_arm
: public Target_selector
11315 Target_selector_arm()
11316 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
11317 (big_endian
? "elf32-bigarm" : "elf32-littlearm"))
11321 do_instantiate_target()
11322 { return new Target_arm
<big_endian
>(); }
11325 // Fix .ARM.exidx section coverage.
11327 template<bool big_endian
>
11329 Target_arm
<big_endian
>::fix_exidx_coverage(
11331 Arm_output_section
<big_endian
>* exidx_section
,
11332 Symbol_table
* symtab
)
11334 // We need to look at all the input sections in output in ascending
11335 // order of of output address. We do that by building a sorted list
11336 // of output sections by addresses. Then we looks at the output sections
11337 // in order. The input sections in an output section are already sorted
11338 // by addresses within the output section.
11340 typedef std::set
<Output_section
*, output_section_address_less_than
>
11341 Sorted_output_section_list
;
11342 Sorted_output_section_list sorted_output_sections
;
11343 Layout::Section_list section_list
;
11344 layout
->get_allocated_sections(§ion_list
);
11345 for (Layout::Section_list::const_iterator p
= section_list
.begin();
11346 p
!= section_list
.end();
11349 // We only care about output sections that contain executable code.
11350 if (((*p
)->flags() & elfcpp::SHF_EXECINSTR
) != 0)
11351 sorted_output_sections
.insert(*p
);
11354 // Go over the output sections in ascending order of output addresses.
11355 typedef typename Arm_output_section
<big_endian
>::Text_section_list
11357 Text_section_list sorted_text_sections
;
11358 for(typename
Sorted_output_section_list::iterator p
=
11359 sorted_output_sections
.begin();
11360 p
!= sorted_output_sections
.end();
11363 Arm_output_section
<big_endian
>* arm_output_section
=
11364 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11365 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
11368 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
11369 merge_exidx_entries());
11372 Target_selector_arm
<false> target_selector_arm
;
11373 Target_selector_arm
<true> target_selector_armbe
;
11375 } // End anonymous namespace.