1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2016 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian
>
62 class Output_data_plt_arm
;
64 template<bool big_endian
>
65 class Output_data_plt_arm_short
;
67 template<bool big_endian
>
68 class Output_data_plt_arm_long
;
70 template<bool big_endian
>
73 template<bool big_endian
>
74 class Arm_input_section
;
76 class Arm_exidx_cantunwind
;
78 class Arm_exidx_merged_section
;
80 class Arm_exidx_fixup
;
82 template<bool big_endian
>
83 class Arm_output_section
;
85 class Arm_exidx_input_section
;
87 template<bool big_endian
>
90 template<bool big_endian
>
91 class Arm_relocate_functions
;
93 template<bool big_endian
>
94 class Arm_output_data_got
;
96 template<bool big_endian
>
100 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
102 // Maximum branch offsets for ARM, THUMB and THUMB2.
103 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
104 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
105 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
106 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
107 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
108 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
110 // Thread Control Block size.
111 const size_t ARM_TCB_SIZE
= 8;
113 // The arm target class.
115 // This is a very simple port of gold for ARM-EABI. It is intended for
116 // supporting Android only for the time being.
119 // - Implement all static relocation types documented in arm-reloc.def.
120 // - Make PLTs more flexible for different architecture features like
122 // There are probably a lot more.
124 // Ideally we would like to avoid using global variables but this is used
125 // very in many places and sometimes in loops. If we use a function
126 // returning a static instance of Arm_reloc_property_table, it will be very
127 // slow in an threaded environment since the static instance needs to be
128 // locked. The pointer is below initialized in the
129 // Target::do_select_as_default_target() hook so that we do not spend time
130 // building the table if we are not linking ARM objects.
132 // An alternative is to to process the information in arm-reloc.def in
133 // compilation time and generate a representation of it in PODs only. That
134 // way we can avoid initialization when the linker starts.
136 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
138 // Instruction template class. This class is similar to the insn_sequence
139 // struct in bfd/elf32-arm.c.
144 // Types of instruction templates.
148 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
149 // templates with class-specific semantics. Currently this is used
150 // only by the Cortex_a8_stub class for handling condition codes in
151 // conditional branches.
152 THUMB16_SPECIAL_TYPE
,
158 // Factory methods to create instruction templates in different formats.
160 static const Insn_template
161 thumb16_insn(uint32_t data
)
162 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
164 // A Thumb conditional branch, in which the proper condition is inserted
165 // when we build the stub.
166 static const Insn_template
167 thumb16_bcond_insn(uint32_t data
)
168 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
170 static const Insn_template
171 thumb32_insn(uint32_t data
)
172 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
174 static const Insn_template
175 thumb32_b_insn(uint32_t data
, int reloc_addend
)
177 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
181 static const Insn_template
182 arm_insn(uint32_t data
)
183 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
185 static const Insn_template
186 arm_rel_insn(unsigned data
, int reloc_addend
)
187 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
189 static const Insn_template
190 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
191 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
193 // Accessors. This class is used for read-only objects so no modifiers
198 { return this->data_
; }
200 // Return the instruction sequence type of this.
203 { return this->type_
; }
205 // Return the ARM relocation type of this.
208 { return this->r_type_
; }
212 { return this->reloc_addend_
; }
214 // Return size of instruction template in bytes.
218 // Return byte-alignment of instruction template.
223 // We make the constructor private to ensure that only the factory
226 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
227 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
230 // Instruction specific data. This is used to store information like
231 // some of the instruction bits.
233 // Instruction template type.
235 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
236 unsigned int r_type_
;
237 // Relocation addend.
238 int32_t reloc_addend_
;
241 // Macro for generating code to stub types. One entry per long/short
245 DEF_STUB(long_branch_any_any) \
246 DEF_STUB(long_branch_v4t_arm_thumb) \
247 DEF_STUB(long_branch_thumb_only) \
248 DEF_STUB(long_branch_v4t_thumb_thumb) \
249 DEF_STUB(long_branch_v4t_thumb_arm) \
250 DEF_STUB(short_branch_v4t_thumb_arm) \
251 DEF_STUB(long_branch_any_arm_pic) \
252 DEF_STUB(long_branch_any_thumb_pic) \
253 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
254 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
255 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
256 DEF_STUB(long_branch_thumb_only_pic) \
257 DEF_STUB(a8_veneer_b_cond) \
258 DEF_STUB(a8_veneer_b) \
259 DEF_STUB(a8_veneer_bl) \
260 DEF_STUB(a8_veneer_blx) \
261 DEF_STUB(v4_veneer_bx)
265 #define DEF_STUB(x) arm_stub_##x,
271 // First reloc stub type.
272 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
273 // Last reloc stub type.
274 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
276 // First Cortex-A8 stub type.
277 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
278 // Last Cortex-A8 stub type.
279 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
282 arm_stub_type_last
= arm_stub_v4_veneer_bx
286 // Stub template class. Templates are meant to be read-only objects.
287 // A stub template for a stub type contains all read-only attributes
288 // common to all stubs of the same type.
293 Stub_template(Stub_type
, const Insn_template
*, size_t);
301 { return this->type_
; }
303 // Return an array of instruction templates.
306 { return this->insns_
; }
308 // Return size of template in number of instructions.
311 { return this->insn_count_
; }
313 // Return size of template in bytes.
316 { return this->size_
; }
318 // Return alignment of the stub template.
321 { return this->alignment_
; }
323 // Return whether entry point is in thumb mode.
325 entry_in_thumb_mode() const
326 { return this->entry_in_thumb_mode_
; }
328 // Return number of relocations in this template.
331 { return this->relocs_
.size(); }
333 // Return index of the I-th instruction with relocation.
335 reloc_insn_index(size_t i
) const
337 gold_assert(i
< this->relocs_
.size());
338 return this->relocs_
[i
].first
;
341 // Return the offset of the I-th instruction with relocation from the
342 // beginning of the stub.
344 reloc_offset(size_t i
) const
346 gold_assert(i
< this->relocs_
.size());
347 return this->relocs_
[i
].second
;
351 // This contains information about an instruction template with a relocation
352 // and its offset from start of stub.
353 typedef std::pair
<size_t, section_size_type
> Reloc
;
355 // A Stub_template may not be copied. We want to share templates as much
357 Stub_template(const Stub_template
&);
358 Stub_template
& operator=(const Stub_template
&);
362 // Points to an array of Insn_templates.
363 const Insn_template
* insns_
;
364 // Number of Insn_templates in insns_[].
366 // Size of templated instructions in bytes.
368 // Alignment of templated instructions.
370 // Flag to indicate if entry is in thumb mode.
371 bool entry_in_thumb_mode_
;
372 // A table of reloc instruction indices and offsets. We can find these by
373 // looking at the instruction templates but we pre-compute and then stash
374 // them here for speed.
375 std::vector
<Reloc
> relocs_
;
379 // A class for code stubs. This is a base class for different type of
380 // stubs used in the ARM target.
386 static const section_offset_type invalid_offset
=
387 static_cast<section_offset_type
>(-1);
390 Stub(const Stub_template
* stub_template
)
391 : stub_template_(stub_template
), offset_(invalid_offset
)
398 // Return the stub template.
400 stub_template() const
401 { return this->stub_template_
; }
403 // Return offset of code stub from beginning of its containing stub table.
407 gold_assert(this->offset_
!= invalid_offset
);
408 return this->offset_
;
411 // Set offset of code stub from beginning of its containing stub table.
413 set_offset(section_offset_type offset
)
414 { this->offset_
= offset
; }
416 // Return the relocation target address of the i-th relocation in the
417 // stub. This must be defined in a child class.
419 reloc_target(size_t i
)
420 { return this->do_reloc_target(i
); }
422 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
424 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
425 { this->do_write(view
, view_size
, big_endian
); }
427 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
428 // for the i-th instruction.
430 thumb16_special(size_t i
)
431 { return this->do_thumb16_special(i
); }
434 // This must be defined in the child class.
436 do_reloc_target(size_t) = 0;
438 // This may be overridden in the child class.
440 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
443 this->do_fixed_endian_write
<true>(view
, view_size
);
445 this->do_fixed_endian_write
<false>(view
, view_size
);
448 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
449 // instruction template.
451 do_thumb16_special(size_t)
452 { gold_unreachable(); }
455 // A template to implement do_write.
456 template<bool big_endian
>
458 do_fixed_endian_write(unsigned char*, section_size_type
);
461 const Stub_template
* stub_template_
;
462 // Offset within the section of containing this stub.
463 section_offset_type offset_
;
466 // Reloc stub class. These are stubs we use to fix up relocation because
467 // of limited branch ranges.
469 class Reloc_stub
: public Stub
472 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
473 // We assume we never jump to this address.
474 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
476 // Return destination address.
478 destination_address() const
480 gold_assert(this->destination_address_
!= this->invalid_address
);
481 return this->destination_address_
;
484 // Set destination address.
486 set_destination_address(Arm_address address
)
488 gold_assert(address
!= this->invalid_address
);
489 this->destination_address_
= address
;
492 // Reset destination address.
494 reset_destination_address()
495 { this->destination_address_
= this->invalid_address
; }
497 // Determine stub type for a branch of a relocation of R_TYPE going
498 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
499 // the branch target is a thumb instruction. TARGET is used for look
500 // up ARM-specific linker settings.
502 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
503 Arm_address branch_target
, bool target_is_thumb
);
505 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
506 // and an addend. Since we treat global and local symbol differently, we
507 // use a Symbol object for a global symbol and a object-index pair for
512 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
513 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
514 // and R_SYM must not be invalid_index.
515 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
516 unsigned int r_sym
, int32_t addend
)
517 : stub_type_(stub_type
), addend_(addend
)
521 this->r_sym_
= Reloc_stub::invalid_index
;
522 this->u_
.symbol
= symbol
;
526 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
527 this->r_sym_
= r_sym
;
528 this->u_
.relobj
= relobj
;
535 // Accessors: Keys are meant to be read-only object so no modifiers are
541 { return this->stub_type_
; }
543 // Return the local symbol index or invalid_index.
546 { return this->r_sym_
; }
548 // Return the symbol if there is one.
551 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
553 // Return the relobj if there is one.
556 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
558 // Whether this equals to another key k.
560 eq(const Key
& k
) const
562 return ((this->stub_type_
== k
.stub_type_
)
563 && (this->r_sym_
== k
.r_sym_
)
564 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
565 ? (this->u_
.relobj
== k
.u_
.relobj
)
566 : (this->u_
.symbol
== k
.u_
.symbol
))
567 && (this->addend_
== k
.addend_
));
570 // Return a hash value.
574 return (this->stub_type_
576 ^ gold::string_hash
<char>(
577 (this->r_sym_
!= Reloc_stub::invalid_index
)
578 ? this->u_
.relobj
->name().c_str()
579 : this->u_
.symbol
->name())
583 // Functors for STL associative containers.
587 operator()(const Key
& k
) const
588 { return k
.hash_value(); }
594 operator()(const Key
& k1
, const Key
& k2
) const
595 { return k1
.eq(k2
); }
598 // Name of key. This is mainly for debugging.
600 name() const ATTRIBUTE_UNUSED
;
604 Stub_type stub_type_
;
605 // If this is a local symbol, this is the index in the defining object.
606 // Otherwise, it is invalid_index for a global symbol.
608 // If r_sym_ is an invalid index, this points to a global symbol.
609 // Otherwise, it points to a relobj. We used the unsized and target
610 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
611 // Arm_relobj, in order to avoid making the stub class a template
612 // as most of the stub machinery is endianness-neutral. However, it
613 // may require a bit of casting done by users of this class.
616 const Symbol
* symbol
;
617 const Relobj
* relobj
;
619 // Addend associated with a reloc.
624 // Reloc_stubs are created via a stub factory. So these are protected.
625 Reloc_stub(const Stub_template
* stub_template
)
626 : Stub(stub_template
), destination_address_(invalid_address
)
632 friend class Stub_factory
;
634 // Return the relocation target address of the i-th relocation in the
637 do_reloc_target(size_t i
)
639 // All reloc stub have only one relocation.
641 return this->destination_address_
;
645 // Address of destination.
646 Arm_address destination_address_
;
649 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
650 // THUMB branch that meets the following conditions:
652 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
653 // branch address is 0xffe.
654 // 2. The branch target address is in the same page as the first word of the
656 // 3. The branch follows a 32-bit instruction which is not a branch.
658 // To do the fix up, we need to store the address of the branch instruction
659 // and its target at least. We also need to store the original branch
660 // instruction bits for the condition code in a conditional branch. The
661 // condition code is used in a special instruction template. We also want
662 // to identify input sections needing Cortex-A8 workaround quickly. We store
663 // extra information about object and section index of the code section
664 // containing a branch being fixed up. The information is used to mark
665 // the code section when we finalize the Cortex-A8 stubs.
668 class Cortex_a8_stub
: public Stub
674 // Return the object of the code section containing the branch being fixed
678 { return this->relobj_
; }
680 // Return the section index of the code section containing the branch being
684 { return this->shndx_
; }
686 // Return the source address of stub. This is the address of the original
687 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
690 source_address() const
691 { return this->source_address_
; }
693 // Return the destination address of the stub. This is the branch taken
694 // address of the original branch instruction. LSB is 1 if it is a THUMB
695 // instruction address.
697 destination_address() const
698 { return this->destination_address_
; }
700 // Return the instruction being fixed up.
702 original_insn() const
703 { return this->original_insn_
; }
706 // Cortex_a8_stubs are created via a stub factory. So these are protected.
707 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
708 unsigned int shndx
, Arm_address source_address
,
709 Arm_address destination_address
, uint32_t original_insn
)
710 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
711 source_address_(source_address
| 1U),
712 destination_address_(destination_address
),
713 original_insn_(original_insn
)
716 friend class Stub_factory
;
718 // Return the relocation target address of the i-th relocation in the
721 do_reloc_target(size_t i
)
723 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
725 // The conditional branch veneer has two relocations.
727 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
731 // All other Cortex-A8 stubs have only one relocation.
733 return this->destination_address_
;
737 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
739 do_thumb16_special(size_t);
742 // Object of the code section containing the branch being fixed up.
744 // Section index of the code section containing the branch begin fixed up.
746 // Source address of original branch.
747 Arm_address source_address_
;
748 // Destination address of the original branch.
749 Arm_address destination_address_
;
750 // Original branch instruction. This is needed for copying the condition
751 // code from a condition branch to its stub.
752 uint32_t original_insn_
;
755 // ARMv4 BX Rx branch relocation stub class.
756 class Arm_v4bx_stub
: public Stub
762 // Return the associated register.
765 { return this->reg_
; }
768 // Arm V4BX stubs are created via a stub factory. So these are protected.
769 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
770 : Stub(stub_template
), reg_(reg
)
773 friend class Stub_factory
;
775 // Return the relocation target address of the i-th relocation in the
778 do_reloc_target(size_t)
779 { gold_unreachable(); }
781 // This may be overridden in the child class.
783 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
786 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
788 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
792 // A template to implement do_write.
793 template<bool big_endian
>
795 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
797 const Insn_template
* insns
= this->stub_template()->insns();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
800 + (this->reg_
<< 16)));
801 view
+= insns
[0].size();
802 elfcpp::Swap
<32, big_endian
>::writeval(view
,
803 (insns
[1].data() + this->reg_
));
804 view
+= insns
[1].size();
805 elfcpp::Swap
<32, big_endian
>::writeval(view
,
806 (insns
[2].data() + this->reg_
));
809 // A register index (r0-r14), which is associated with the stub.
813 // Stub factory class.
818 // Return the unique instance of this class.
819 static const Stub_factory
&
822 static Stub_factory singleton
;
826 // Make a relocation stub.
828 make_reloc_stub(Stub_type stub_type
) const
830 gold_assert(stub_type
>= arm_stub_reloc_first
831 && stub_type
<= arm_stub_reloc_last
);
832 return new Reloc_stub(this->stub_templates_
[stub_type
]);
835 // Make a Cortex-A8 stub.
837 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
838 Arm_address source
, Arm_address destination
,
839 uint32_t original_insn
) const
841 gold_assert(stub_type
>= arm_stub_cortex_a8_first
842 && stub_type
<= arm_stub_cortex_a8_last
);
843 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
844 source
, destination
, original_insn
);
847 // Make an ARM V4BX relocation stub.
848 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
850 make_arm_v4bx_stub(uint32_t reg
) const
852 gold_assert(reg
< 0xf);
853 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
858 // Constructor and destructor are protected since we only return a single
859 // instance created in Stub_factory::get_instance().
863 // A Stub_factory may not be copied since it is a singleton.
864 Stub_factory(const Stub_factory
&);
865 Stub_factory
& operator=(Stub_factory
&);
867 // Stub templates. These are initialized in the constructor.
868 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
871 // A class to hold stubs for the ARM target.
873 template<bool big_endian
>
874 class Stub_table
: public Output_data
877 Stub_table(Arm_input_section
<big_endian
>* owner
)
878 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
879 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
880 prev_data_size_(0), prev_addralign_(1)
886 // Owner of this stub table.
887 Arm_input_section
<big_endian
>*
889 { return this->owner_
; }
891 // Whether this stub table is empty.
895 return (this->reloc_stubs_
.empty()
896 && this->cortex_a8_stubs_
.empty()
897 && this->arm_v4bx_stubs_
.empty());
900 // Return the current data size.
902 current_data_size() const
903 { return this->current_data_size_for_child(); }
905 // Add a STUB using KEY. The caller is responsible for avoiding addition
906 // if a STUB with the same key has already been added.
908 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
910 const Stub_template
* stub_template
= stub
->stub_template();
911 gold_assert(stub_template
->type() == key
.stub_type());
912 this->reloc_stubs_
[key
] = stub
;
914 // Assign stub offset early. We can do this because we never remove
915 // reloc stubs and they are in the beginning of the stub table.
916 uint64_t align
= stub_template
->alignment();
917 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
918 stub
->set_offset(this->reloc_stubs_size_
);
919 this->reloc_stubs_size_
+= stub_template
->size();
920 this->reloc_stubs_addralign_
=
921 std::max(this->reloc_stubs_addralign_
, align
);
924 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
925 // The caller is responsible for avoiding addition if a STUB with the same
926 // address has already been added.
928 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
930 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
931 this->cortex_a8_stubs_
.insert(value
);
934 // Add an ARM V4BX relocation stub. A register index will be retrieved
937 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
939 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
940 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
943 // Remove all Cortex-A8 stubs.
945 remove_all_cortex_a8_stubs();
947 // Look up a relocation stub using KEY. Return NULL if there is none.
949 find_reloc_stub(const Reloc_stub::Key
& key
) const
951 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
952 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
955 // Look up an arm v4bx relocation stub using the register index.
956 // Return NULL if there is none.
958 find_arm_v4bx_stub(const uint32_t reg
) const
960 gold_assert(reg
< 0xf);
961 return this->arm_v4bx_stubs_
[reg
];
964 // Relocate stubs in this stub table.
966 relocate_stubs(const Relocate_info
<32, big_endian
>*,
967 Target_arm
<big_endian
>*, Output_section
*,
968 unsigned char*, Arm_address
, section_size_type
);
970 // Update data size and alignment at the end of a relaxation pass. Return
971 // true if either data size or alignment is different from that of the
972 // previous relaxation pass.
974 update_data_size_and_addralign();
976 // Finalize stubs. Set the offsets of all stubs and mark input sections
977 // needing the Cortex-A8 workaround.
981 // Apply Cortex-A8 workaround to an address range.
983 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
984 unsigned char*, Arm_address
,
988 // Write out section contents.
990 do_write(Output_file
*);
992 // Return the required alignment.
995 { return this->prev_addralign_
; }
997 // Reset address and file offset.
999 do_reset_address_and_file_offset()
1000 { this->set_current_data_size_for_child(this->prev_data_size_
); }
1002 // Set final data size.
1004 set_final_data_size()
1005 { this->set_data_size(this->current_data_size()); }
1008 // Relocate one stub.
1010 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1011 Target_arm
<big_endian
>*, Output_section
*,
1012 unsigned char*, Arm_address
, section_size_type
);
1014 // Unordered map of relocation stubs.
1016 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1017 Reloc_stub::Key::equal_to
>
1020 // List of Cortex-A8 stubs ordered by addresses of branches being
1021 // fixed up in output.
1022 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1023 // List of Arm V4BX relocation stubs ordered by associated registers.
1024 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1026 // Owner of this stub table.
1027 Arm_input_section
<big_endian
>* owner_
;
1028 // The relocation stubs.
1029 Reloc_stub_map reloc_stubs_
;
1030 // Size of reloc stubs.
1031 off_t reloc_stubs_size_
;
1032 // Maximum address alignment of reloc stubs.
1033 uint64_t reloc_stubs_addralign_
;
1034 // The cortex_a8_stubs.
1035 Cortex_a8_stub_list cortex_a8_stubs_
;
1036 // The Arm V4BX relocation stubs.
1037 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1038 // data size of this in the previous pass.
1039 off_t prev_data_size_
;
1040 // address alignment of this in the previous pass.
1041 uint64_t prev_addralign_
;
1044 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1045 // we add to the end of an EXIDX input section that goes into the output.
1047 class Arm_exidx_cantunwind
: public Output_section_data
1050 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1051 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1054 // Return the object containing the section pointed by this.
1057 { return this->relobj_
; }
1059 // Return the section index of the section pointed by this.
1062 { return this->shndx_
; }
1066 do_write(Output_file
* of
)
1068 if (parameters
->target().is_big_endian())
1069 this->do_fixed_endian_write
<true>(of
);
1071 this->do_fixed_endian_write
<false>(of
);
1074 // Write to a map file.
1076 do_print_to_mapfile(Mapfile
* mapfile
) const
1077 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1080 // Implement do_write for a given endianness.
1081 template<bool big_endian
>
1083 do_fixed_endian_write(Output_file
*);
1085 // The object containing the section pointed by this.
1087 // The section index of the section pointed by this.
1088 unsigned int shndx_
;
1091 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1092 // Offset map is used to map input section offset within the EXIDX section
1093 // to the output offset from the start of this EXIDX section.
1095 typedef std::map
<section_offset_type
, section_offset_type
>
1096 Arm_exidx_section_offset_map
;
1098 // Arm_exidx_merged_section class. This represents an EXIDX input section
1099 // with some of its entries merged.
1101 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1104 // Constructor for Arm_exidx_merged_section.
1105 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1106 // SECTION_OFFSET_MAP points to a section offset map describing how
1107 // parts of the input section are mapped to output. DELETED_BYTES is
1108 // the number of bytes deleted from the EXIDX input section.
1109 Arm_exidx_merged_section(
1110 const Arm_exidx_input_section
& exidx_input_section
,
1111 const Arm_exidx_section_offset_map
& section_offset_map
,
1112 uint32_t deleted_bytes
);
1114 // Build output contents.
1116 build_contents(const unsigned char*, section_size_type
);
1118 // Return the original EXIDX input section.
1119 const Arm_exidx_input_section
&
1120 exidx_input_section() const
1121 { return this->exidx_input_section_
; }
1123 // Return the section offset map.
1124 const Arm_exidx_section_offset_map
&
1125 section_offset_map() const
1126 { return this->section_offset_map_
; }
1129 // Write merged section into file OF.
1131 do_write(Output_file
* of
);
1134 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1135 section_offset_type
*) const;
1138 // Original EXIDX input section.
1139 const Arm_exidx_input_section
& exidx_input_section_
;
1140 // Section offset map.
1141 const Arm_exidx_section_offset_map
& section_offset_map_
;
1142 // Merged section contents. We need to keep build the merged section
1143 // and save it here to avoid accessing the original EXIDX section when
1144 // we cannot lock the sections' object.
1145 unsigned char* section_contents_
;
1148 // A class to wrap an ordinary input section containing executable code.
1150 template<bool big_endian
>
1151 class Arm_input_section
: public Output_relaxed_input_section
1154 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1155 : Output_relaxed_input_section(relobj
, shndx
, 1),
1156 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1157 original_contents_(NULL
)
1160 ~Arm_input_section()
1161 { delete[] this->original_contents_
; }
1167 // Whether this is a stub table owner.
1169 is_stub_table_owner() const
1170 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1172 // Return the stub table.
1173 Stub_table
<big_endian
>*
1175 { return this->stub_table_
; }
1177 // Set the stub_table.
1179 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1180 { this->stub_table_
= stub_table
; }
1182 // Downcast a base pointer to an Arm_input_section pointer. This is
1183 // not type-safe but we only use Arm_input_section not the base class.
1184 static Arm_input_section
<big_endian
>*
1185 as_arm_input_section(Output_relaxed_input_section
* poris
)
1186 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1188 // Return the original size of the section.
1190 original_size() const
1191 { return this->original_size_
; }
1194 // Write data to output file.
1196 do_write(Output_file
*);
1198 // Return required alignment of this.
1200 do_addralign() const
1202 if (this->is_stub_table_owner())
1203 return std::max(this->stub_table_
->addralign(),
1204 static_cast<uint64_t>(this->original_addralign_
));
1206 return this->original_addralign_
;
1209 // Finalize data size.
1211 set_final_data_size();
1213 // Reset address and file offset.
1215 do_reset_address_and_file_offset();
1219 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1220 section_offset_type offset
,
1221 section_offset_type
* poutput
) const
1223 if ((object
== this->relobj())
1224 && (shndx
== this->shndx())
1227 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1237 // Copying is not allowed.
1238 Arm_input_section(const Arm_input_section
&);
1239 Arm_input_section
& operator=(const Arm_input_section
&);
1241 // Address alignment of the original input section.
1242 uint32_t original_addralign_
;
1243 // Section size of the original input section.
1244 uint32_t original_size_
;
1246 Stub_table
<big_endian
>* stub_table_
;
1247 // Original section contents. We have to make a copy here since the file
1248 // containing the original section may not be locked when we need to access
1250 unsigned char* original_contents_
;
1253 // Arm_exidx_fixup class. This is used to define a number of methods
1254 // and keep states for fixing up EXIDX coverage.
1256 class Arm_exidx_fixup
1259 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1260 bool merge_exidx_entries
= true)
1261 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1262 last_inlined_entry_(0), last_input_section_(NULL
),
1263 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1264 merge_exidx_entries_(merge_exidx_entries
)
1268 { delete this->section_offset_map_
; }
1270 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1271 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1272 // number of bytes to be deleted in output. If parts of the input EXIDX
1273 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1274 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1275 // responsible for releasing it.
1276 template<bool big_endian
>
1278 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1279 const unsigned char* section_contents
,
1280 section_size_type section_size
,
1281 Arm_exidx_section_offset_map
** psection_offset_map
);
1283 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1284 // input section, if there is not one already.
1286 add_exidx_cantunwind_as_needed();
1288 // Return the output section for the text section which is linked to the
1289 // first exidx input in output.
1291 first_output_text_section() const
1292 { return this->first_output_text_section_
; }
1295 // Copying is not allowed.
1296 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1297 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1299 // Type of EXIDX unwind entry.
1304 // EXIDX_CANTUNWIND.
1305 UT_EXIDX_CANTUNWIND
,
1312 // Process an EXIDX entry. We only care about the second word of the
1313 // entry. Return true if the entry can be deleted.
1315 process_exidx_entry(uint32_t second_word
);
1317 // Update the current section offset map during EXIDX section fix-up.
1318 // If there is no map, create one. INPUT_OFFSET is the offset of a
1319 // reference point, DELETED_BYTES is the number of deleted by in the
1320 // section so far. If DELETE_ENTRY is true, the reference point and
1321 // all offsets after the previous reference point are discarded.
1323 update_offset_map(section_offset_type input_offset
,
1324 section_size_type deleted_bytes
, bool delete_entry
);
1326 // EXIDX output section.
1327 Output_section
* exidx_output_section_
;
1328 // Unwind type of the last EXIDX entry processed.
1329 Unwind_type last_unwind_type_
;
1330 // Last seen inlined EXIDX entry.
1331 uint32_t last_inlined_entry_
;
1332 // Last processed EXIDX input section.
1333 const Arm_exidx_input_section
* last_input_section_
;
1334 // Section offset map created in process_exidx_section.
1335 Arm_exidx_section_offset_map
* section_offset_map_
;
1336 // Output section for the text section which is linked to the first exidx
1338 Output_section
* first_output_text_section_
;
1340 bool merge_exidx_entries_
;
1343 // Arm output section class. This is defined mainly to add a number of
1344 // stub generation methods.
1346 template<bool big_endian
>
1347 class Arm_output_section
: public Output_section
1350 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1352 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1353 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1354 elfcpp::Elf_Xword flags
)
1355 : Output_section(name
, type
,
1356 (type
== elfcpp::SHT_ARM_EXIDX
1357 ? flags
| elfcpp::SHF_LINK_ORDER
1360 if (type
== elfcpp::SHT_ARM_EXIDX
)
1361 this->set_always_keeps_input_sections();
1364 ~Arm_output_section()
1367 // Group input sections for stub generation.
1369 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1371 // Downcast a base pointer to an Arm_output_section pointer. This is
1372 // not type-safe but we only use Arm_output_section not the base class.
1373 static Arm_output_section
<big_endian
>*
1374 as_arm_output_section(Output_section
* os
)
1375 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1377 // Append all input text sections in this into LIST.
1379 append_text_sections_to_list(Text_section_list
* list
);
1381 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1382 // is a list of text input sections sorted in ascending order of their
1383 // output addresses.
1385 fix_exidx_coverage(Layout
* layout
,
1386 const Text_section_list
& sorted_text_section
,
1387 Symbol_table
* symtab
,
1388 bool merge_exidx_entries
,
1391 // Link an EXIDX section into its corresponding text section.
1393 set_exidx_section_link();
1397 typedef Output_section::Input_section Input_section
;
1398 typedef Output_section::Input_section_list Input_section_list
;
1400 // Create a stub group.
1401 void create_stub_group(Input_section_list::const_iterator
,
1402 Input_section_list::const_iterator
,
1403 Input_section_list::const_iterator
,
1404 Target_arm
<big_endian
>*,
1405 std::vector
<Output_relaxed_input_section
*>*,
1409 // Arm_exidx_input_section class. This represents an EXIDX input section.
1411 class Arm_exidx_input_section
1414 static const section_offset_type invalid_offset
=
1415 static_cast<section_offset_type
>(-1);
1417 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1418 unsigned int link
, uint32_t size
,
1419 uint32_t addralign
, uint32_t text_size
)
1420 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1421 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1424 ~Arm_exidx_input_section()
1427 // Accessors: This is a read-only class.
1429 // Return the object containing this EXIDX input section.
1432 { return this->relobj_
; }
1434 // Return the section index of this EXIDX input section.
1437 { return this->shndx_
; }
1439 // Return the section index of linked text section in the same object.
1442 { return this->link_
; }
1444 // Return size of the EXIDX input section.
1447 { return this->size_
; }
1449 // Return address alignment of EXIDX input section.
1452 { return this->addralign_
; }
1454 // Return size of the associated text input section.
1457 { return this->text_size_
; }
1459 // Whether there are any errors in the EXIDX input section.
1462 { return this->has_errors_
; }
1464 // Set has-errors flag.
1467 { this->has_errors_
= true; }
1470 // Object containing this.
1472 // Section index of this.
1473 unsigned int shndx_
;
1474 // text section linked to this in the same object.
1476 // Size of this. For ARM 32-bit is sufficient.
1478 // Address alignment of this. For ARM 32-bit is sufficient.
1479 uint32_t addralign_
;
1480 // Size of associated text section.
1481 uint32_t text_size_
;
1482 // Whether this has any errors.
1486 // Arm_relobj class.
1488 template<bool big_endian
>
1489 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1492 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1494 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1495 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1496 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1497 stub_tables_(), local_symbol_is_thumb_function_(),
1498 attributes_section_data_(NULL
), mapping_symbols_info_(),
1499 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1500 output_local_symbol_count_needs_update_(false),
1501 merge_flags_and_attributes_(true)
1505 { delete this->attributes_section_data_
; }
1507 // Return the stub table of the SHNDX-th section if there is one.
1508 Stub_table
<big_endian
>*
1509 stub_table(unsigned int shndx
) const
1511 gold_assert(shndx
< this->stub_tables_
.size());
1512 return this->stub_tables_
[shndx
];
1515 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1517 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1519 gold_assert(shndx
< this->stub_tables_
.size());
1520 this->stub_tables_
[shndx
] = stub_table
;
1523 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1524 // index. This is only valid after do_count_local_symbol is called.
1526 local_symbol_is_thumb_function(unsigned int r_sym
) const
1528 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1529 return this->local_symbol_is_thumb_function_
[r_sym
];
1532 // Scan all relocation sections for stub generation.
1534 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1537 // Convert regular input section with index SHNDX to a relaxed section.
1539 convert_input_section_to_relaxed_section(unsigned shndx
)
1541 // The stubs have relocations and we need to process them after writing
1542 // out the stubs. So relocation now must follow section write.
1543 this->set_section_offset(shndx
, -1ULL);
1544 this->set_relocs_must_follow_section_writes();
1547 // Downcast a base pointer to an Arm_relobj pointer. This is
1548 // not type-safe but we only use Arm_relobj not the base class.
1549 static Arm_relobj
<big_endian
>*
1550 as_arm_relobj(Relobj
* relobj
)
1551 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1553 // Processor-specific flags in ELF file header. This is valid only after
1556 processor_specific_flags() const
1557 { return this->processor_specific_flags_
; }
1559 // Attribute section data This is the contents of the .ARM.attribute section
1561 const Attributes_section_data
*
1562 attributes_section_data() const
1563 { return this->attributes_section_data_
; }
1565 // Mapping symbol location.
1566 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1568 // Functor for STL container.
1569 struct Mapping_symbol_position_less
1572 operator()(const Mapping_symbol_position
& p1
,
1573 const Mapping_symbol_position
& p2
) const
1575 return (p1
.first
< p2
.first
1576 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1580 // We only care about the first character of a mapping symbol, so
1581 // we only store that instead of the whole symbol name.
1582 typedef std::map
<Mapping_symbol_position
, char,
1583 Mapping_symbol_position_less
> Mapping_symbols_info
;
1585 // Whether a section contains any Cortex-A8 workaround.
1587 section_has_cortex_a8_workaround(unsigned int shndx
) const
1589 return (this->section_has_cortex_a8_workaround_
!= NULL
1590 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1593 // Mark a section that has Cortex-A8 workaround.
1595 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1597 if (this->section_has_cortex_a8_workaround_
== NULL
)
1598 this->section_has_cortex_a8_workaround_
=
1599 new std::vector
<bool>(this->shnum(), false);
1600 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1603 // Return the EXIDX section of an text section with index SHNDX or NULL
1604 // if the text section has no associated EXIDX section.
1605 const Arm_exidx_input_section
*
1606 exidx_input_section_by_link(unsigned int shndx
) const
1608 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1609 return ((p
!= this->exidx_section_map_
.end()
1610 && p
->second
->link() == shndx
)
1615 // Return the EXIDX section with index SHNDX or NULL if there is none.
1616 const Arm_exidx_input_section
*
1617 exidx_input_section_by_shndx(unsigned shndx
) const
1619 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1620 return ((p
!= this->exidx_section_map_
.end()
1621 && p
->second
->shndx() == shndx
)
1626 // Whether output local symbol count needs updating.
1628 output_local_symbol_count_needs_update() const
1629 { return this->output_local_symbol_count_needs_update_
; }
1631 // Set output_local_symbol_count_needs_update flag to be true.
1633 set_output_local_symbol_count_needs_update()
1634 { this->output_local_symbol_count_needs_update_
= true; }
1636 // Update output local symbol count at the end of relaxation.
1638 update_output_local_symbol_count();
1640 // Whether we want to merge processor-specific flags and attributes.
1642 merge_flags_and_attributes() const
1643 { return this->merge_flags_and_attributes_
; }
1645 // Export list of EXIDX section indices.
1647 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1650 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1651 p
!= this->exidx_section_map_
.end();
1654 if (p
->second
->shndx() == p
->first
)
1655 list
->push_back(p
->first
);
1657 // Sort list to make result independent of implementation of map.
1658 std::sort(list
->begin(), list
->end());
1662 // Post constructor setup.
1666 // Call parent's setup method.
1667 Sized_relobj_file
<32, big_endian
>::do_setup();
1669 // Initialize look-up tables.
1670 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1671 this->stub_tables_
.swap(empty_stub_table_list
);
1674 // Count the local symbols.
1676 do_count_local_symbols(Stringpool_template
<char>*,
1677 Stringpool_template
<char>*);
1680 do_relocate_sections(
1681 const Symbol_table
* symtab
, const Layout
* layout
,
1682 const unsigned char* pshdrs
, Output_file
* of
,
1683 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1685 // Read the symbol information.
1687 do_read_symbols(Read_symbols_data
* sd
);
1689 // Process relocs for garbage collection.
1691 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1695 // Whether a section needs to be scanned for relocation stubs.
1697 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1698 const Relobj::Output_sections
&,
1699 const Symbol_table
*, const unsigned char*);
1701 // Whether a section is a scannable text section.
1703 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1704 const Output_section
*, const Symbol_table
*);
1706 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1708 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1709 unsigned int, Output_section
*,
1710 const Symbol_table
*);
1712 // Scan a section for the Cortex-A8 erratum.
1714 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1715 unsigned int, Output_section
*,
1716 Target_arm
<big_endian
>*);
1718 // Find the linked text section of an EXIDX section by looking at the
1719 // first relocation of the EXIDX section. PSHDR points to the section
1720 // headers of a relocation section and PSYMS points to the local symbols.
1721 // PSHNDX points to a location storing the text section index if found.
1722 // Return whether we can find the linked section.
1724 find_linked_text_section(const unsigned char* pshdr
,
1725 const unsigned char* psyms
, unsigned int* pshndx
);
1728 // Make a new Arm_exidx_input_section object for EXIDX section with
1729 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1730 // index of the linked text section.
1732 make_exidx_input_section(unsigned int shndx
,
1733 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1734 unsigned int text_shndx
,
1735 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1737 // Return the output address of either a plain input section or a
1738 // relaxed input section. SHNDX is the section index.
1740 simple_input_section_output_address(unsigned int, Output_section
*);
1742 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1743 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1746 // List of stub tables.
1747 Stub_table_list stub_tables_
;
1748 // Bit vector to tell if a local symbol is a thumb function or not.
1749 // This is only valid after do_count_local_symbol is called.
1750 std::vector
<bool> local_symbol_is_thumb_function_
;
1751 // processor-specific flags in ELF file header.
1752 elfcpp::Elf_Word processor_specific_flags_
;
1753 // Object attributes if there is an .ARM.attributes section or NULL.
1754 Attributes_section_data
* attributes_section_data_
;
1755 // Mapping symbols information.
1756 Mapping_symbols_info mapping_symbols_info_
;
1757 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1758 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1759 // Map a text section to its associated .ARM.exidx section, if there is one.
1760 Exidx_section_map exidx_section_map_
;
1761 // Whether output local symbol count needs updating.
1762 bool output_local_symbol_count_needs_update_
;
1763 // Whether we merge processor flags and attributes of this object to
1765 bool merge_flags_and_attributes_
;
1768 // Arm_dynobj class.
1770 template<bool big_endian
>
1771 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1774 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1775 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1776 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1777 processor_specific_flags_(0), attributes_section_data_(NULL
)
1781 { delete this->attributes_section_data_
; }
1783 // Downcast a base pointer to an Arm_relobj pointer. This is
1784 // not type-safe but we only use Arm_relobj not the base class.
1785 static Arm_dynobj
<big_endian
>*
1786 as_arm_dynobj(Dynobj
* dynobj
)
1787 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1789 // Processor-specific flags in ELF file header. This is valid only after
1792 processor_specific_flags() const
1793 { return this->processor_specific_flags_
; }
1795 // Attributes section data.
1796 const Attributes_section_data
*
1797 attributes_section_data() const
1798 { return this->attributes_section_data_
; }
1801 // Read the symbol information.
1803 do_read_symbols(Read_symbols_data
* sd
);
1806 // processor-specific flags in ELF file header.
1807 elfcpp::Elf_Word processor_specific_flags_
;
1808 // Object attributes if there is an .ARM.attributes section or NULL.
1809 Attributes_section_data
* attributes_section_data_
;
1812 // Functor to read reloc addends during stub generation.
1814 template<int sh_type
, bool big_endian
>
1815 struct Stub_addend_reader
1817 // Return the addend for a relocation of a particular type. Depending
1818 // on whether this is a REL or RELA relocation, read the addend from a
1819 // view or from a Reloc object.
1820 elfcpp::Elf_types
<32>::Elf_Swxword
1822 unsigned int /* r_type */,
1823 const unsigned char* /* view */,
1824 const typename Reloc_types
<sh_type
,
1825 32, big_endian
>::Reloc
& /* reloc */) const;
1828 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1830 template<bool big_endian
>
1831 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1833 elfcpp::Elf_types
<32>::Elf_Swxword
1836 const unsigned char*,
1837 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1840 // Specialized Stub_addend_reader for RELA type relocation sections.
1841 // We currently do not handle RELA type relocation sections but it is trivial
1842 // to implement the addend reader. This is provided for completeness and to
1843 // make it easier to add support for RELA relocation sections in the future.
1845 template<bool big_endian
>
1846 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1848 elfcpp::Elf_types
<32>::Elf_Swxword
1851 const unsigned char*,
1852 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1853 big_endian
>::Reloc
& reloc
) const
1854 { return reloc
.get_r_addend(); }
1857 // Cortex_a8_reloc class. We keep record of relocation that may need
1858 // the Cortex-A8 erratum workaround.
1860 class Cortex_a8_reloc
1863 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1864 Arm_address destination
)
1865 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1871 // Accessors: This is a read-only class.
1873 // Return the relocation stub associated with this relocation if there is
1877 { return this->reloc_stub_
; }
1879 // Return the relocation type.
1882 { return this->r_type_
; }
1884 // Return the destination address of the relocation. LSB stores the THUMB
1888 { return this->destination_
; }
1891 // Associated relocation stub if there is one, or NULL.
1892 const Reloc_stub
* reloc_stub_
;
1894 unsigned int r_type_
;
1895 // Destination address of this relocation. LSB is used to distinguish
1897 Arm_address destination_
;
1900 // Arm_output_data_got class. We derive this from Output_data_got to add
1901 // extra methods to handle TLS relocations in a static link.
1903 template<bool big_endian
>
1904 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1907 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1908 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1911 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1912 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1913 // applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1916 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1918 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1919 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1920 // relocation that needs to be applied in a static link.
1922 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1923 Sized_relobj_file
<32, big_endian
>* relobj
,
1926 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1930 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1931 // The first one is initialized to be 1, which is the module index for
1932 // the main executable and the second one 0. A reloc of the type
1933 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1934 // be applied by gold. GSYM is a global symbol.
1936 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1938 // Same as the above but for a local symbol in OBJECT with INDEX.
1940 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1941 Sized_relobj_file
<32, big_endian
>* object
,
1942 unsigned int index
);
1945 // Write out the GOT table.
1947 do_write(Output_file
*);
1950 // This class represent dynamic relocations that need to be applied by
1951 // gold because we are using TLS relocations in a static link.
1955 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1956 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1957 { this->u_
.global
.symbol
= gsym
; }
1959 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1960 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1961 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1963 this->u_
.local
.relobj
= relobj
;
1964 this->u_
.local
.index
= index
;
1967 // Return the GOT offset.
1970 { return this->got_offset_
; }
1975 { return this->r_type_
; }
1977 // Whether the symbol is global or not.
1979 symbol_is_global() const
1980 { return this->symbol_is_global_
; }
1982 // For a relocation against a global symbol, the global symbol.
1986 gold_assert(this->symbol_is_global_
);
1987 return this->u_
.global
.symbol
;
1990 // For a relocation against a local symbol, the defining object.
1991 Sized_relobj_file
<32, big_endian
>*
1994 gold_assert(!this->symbol_is_global_
);
1995 return this->u_
.local
.relobj
;
1998 // For a relocation against a local symbol, the local symbol index.
2002 gold_assert(!this->symbol_is_global_
);
2003 return this->u_
.local
.index
;
2007 // GOT offset of the entry to which this relocation is applied.
2008 unsigned int got_offset_
;
2009 // Type of relocation.
2010 unsigned int r_type_
;
2011 // Whether this relocation is against a global symbol.
2012 bool symbol_is_global_
;
2013 // A global or local symbol.
2018 // For a global symbol, the symbol itself.
2023 // For a local symbol, the object defining object.
2024 Sized_relobj_file
<32, big_endian
>* relobj
;
2025 // For a local symbol, the symbol index.
2031 // Symbol table of the output object.
2032 Symbol_table
* symbol_table_
;
2033 // Layout of the output object.
2035 // Static relocs to be applied to the GOT.
2036 std::vector
<Static_reloc
> static_relocs_
;
2039 // The ARM target has many relocation types with odd-sizes or noncontiguous
2040 // bits. The default handling of relocatable relocation cannot process these
2041 // relocations. So we have to extend the default code.
2043 template<bool big_endian
, typename Classify_reloc
>
2044 class Arm_scan_relocatable_relocs
:
2045 public Default_scan_relocatable_relocs
<Classify_reloc
>
2048 // Return the strategy to use for a local symbol which is a section
2049 // symbol, given the relocation type.
2050 inline Relocatable_relocs::Reloc_strategy
2051 local_section_strategy(unsigned int r_type
, Relobj
*)
2053 if (Classify_reloc::sh_type
== elfcpp::SHT_RELA
)
2054 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2057 if (r_type
== elfcpp::R_ARM_TARGET1
2058 || r_type
== elfcpp::R_ARM_TARGET2
)
2060 const Target_arm
<big_endian
>* arm_target
=
2061 Target_arm
<big_endian
>::default_target();
2062 r_type
= arm_target
->get_real_reloc_type(r_type
);
2067 // Relocations that write nothing. These exclude R_ARM_TARGET1
2068 // and R_ARM_TARGET2.
2069 case elfcpp::R_ARM_NONE
:
2070 case elfcpp::R_ARM_V4BX
:
2071 case elfcpp::R_ARM_TLS_GOTDESC
:
2072 case elfcpp::R_ARM_TLS_CALL
:
2073 case elfcpp::R_ARM_TLS_DESCSEQ
:
2074 case elfcpp::R_ARM_THM_TLS_CALL
:
2075 case elfcpp::R_ARM_GOTRELAX
:
2076 case elfcpp::R_ARM_GNU_VTENTRY
:
2077 case elfcpp::R_ARM_GNU_VTINHERIT
:
2078 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2079 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2080 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2081 // These should have been converted to something else above.
2082 case elfcpp::R_ARM_TARGET1
:
2083 case elfcpp::R_ARM_TARGET2
:
2085 // Relocations that write full 32 bits and
2086 // have alignment of 1.
2087 case elfcpp::R_ARM_ABS32
:
2088 case elfcpp::R_ARM_REL32
:
2089 case elfcpp::R_ARM_SBREL32
:
2090 case elfcpp::R_ARM_GOTOFF32
:
2091 case elfcpp::R_ARM_BASE_PREL
:
2092 case elfcpp::R_ARM_GOT_BREL
:
2093 case elfcpp::R_ARM_BASE_ABS
:
2094 case elfcpp::R_ARM_ABS32_NOI
:
2095 case elfcpp::R_ARM_REL32_NOI
:
2096 case elfcpp::R_ARM_PLT32_ABS
:
2097 case elfcpp::R_ARM_GOT_ABS
:
2098 case elfcpp::R_ARM_GOT_PREL
:
2099 case elfcpp::R_ARM_TLS_GD32
:
2100 case elfcpp::R_ARM_TLS_LDM32
:
2101 case elfcpp::R_ARM_TLS_LDO32
:
2102 case elfcpp::R_ARM_TLS_IE32
:
2103 case elfcpp::R_ARM_TLS_LE32
:
2104 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2106 // For all other static relocations, return RELOC_SPECIAL.
2107 return Relocatable_relocs::RELOC_SPECIAL
;
2113 template<bool big_endian
>
2114 class Target_arm
: public Sized_target
<32, big_endian
>
2117 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2120 // When were are relocating a stub, we pass this as the relocation number.
2121 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2123 Target_arm(const Target::Target_info
* info
= &arm_info
)
2124 : Sized_target
<32, big_endian
>(info
),
2125 got_(NULL
), plt_(NULL
), got_plt_(NULL
), got_irelative_(NULL
),
2126 rel_dyn_(NULL
), rel_irelative_(NULL
), copy_relocs_(elfcpp::R_ARM_COPY
),
2127 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2128 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2129 should_force_pic_veneer_(false),
2130 arm_input_section_map_(), attributes_section_data_(NULL
),
2131 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2134 // Whether we force PCI branch veneers.
2136 should_force_pic_veneer() const
2137 { return this->should_force_pic_veneer_
; }
2139 // Set PIC veneer flag.
2141 set_should_force_pic_veneer(bool value
)
2142 { this->should_force_pic_veneer_
= value
; }
2144 // Whether we use THUMB-2 instructions.
2146 using_thumb2() const
2148 Object_attribute
* attr
=
2149 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2150 int arch
= attr
->int_value();
2151 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2154 // Whether we use THUMB/THUMB-2 instructions only.
2156 using_thumb_only() const
2158 Object_attribute
* attr
=
2159 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2161 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2162 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2164 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2165 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2167 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2168 return attr
->int_value() == 'M';
2171 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2173 may_use_arm_nop() const
2175 Object_attribute
* attr
=
2176 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2177 int arch
= attr
->int_value();
2178 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2179 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2180 || arch
== elfcpp::TAG_CPU_ARCH_V7
2181 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2184 // Whether we have THUMB-2 NOP.W instruction.
2186 may_use_thumb2_nop() const
2188 Object_attribute
* attr
=
2189 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2190 int arch
= attr
->int_value();
2191 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2192 || arch
== elfcpp::TAG_CPU_ARCH_V7
2193 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2196 // Whether we have v4T interworking instructions available.
2198 may_use_v4t_interworking() const
2200 Object_attribute
* attr
=
2201 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2202 int arch
= attr
->int_value();
2203 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2204 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2207 // Whether we have v5T interworking instructions available.
2209 may_use_v5t_interworking() const
2211 Object_attribute
* attr
=
2212 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2213 int arch
= attr
->int_value();
2214 if (parameters
->options().fix_arm1176())
2215 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2216 || arch
== elfcpp::TAG_CPU_ARCH_V7
2217 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2218 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2219 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2221 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2222 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2223 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2226 // Process the relocations to determine unreferenced sections for
2227 // garbage collection.
2229 gc_process_relocs(Symbol_table
* symtab
,
2231 Sized_relobj_file
<32, big_endian
>* object
,
2232 unsigned int data_shndx
,
2233 unsigned int sh_type
,
2234 const unsigned char* prelocs
,
2236 Output_section
* output_section
,
2237 bool needs_special_offset_handling
,
2238 size_t local_symbol_count
,
2239 const unsigned char* plocal_symbols
);
2241 // Scan the relocations to look for symbol adjustments.
2243 scan_relocs(Symbol_table
* symtab
,
2245 Sized_relobj_file
<32, big_endian
>* object
,
2246 unsigned int data_shndx
,
2247 unsigned int sh_type
,
2248 const unsigned char* prelocs
,
2250 Output_section
* output_section
,
2251 bool needs_special_offset_handling
,
2252 size_t local_symbol_count
,
2253 const unsigned char* plocal_symbols
);
2255 // Finalize the sections.
2257 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2259 // Return the value to use for a dynamic symbol which requires special
2262 do_dynsym_value(const Symbol
*) const;
2264 // Return the plt address for globals. Since we have irelative plt entries,
2265 // address calculation is not as straightforward as plt_address + plt_offset.
2267 do_plt_address_for_global(const Symbol
* gsym
) const
2268 { return this->plt_section()->address_for_global(gsym
); }
2270 // Return the plt address for locals. Since we have irelative plt entries,
2271 // address calculation is not as straightforward as plt_address + plt_offset.
2273 do_plt_address_for_local(const Relobj
* relobj
, unsigned int symndx
) const
2274 { return this->plt_section()->address_for_local(relobj
, symndx
); }
2276 // Relocate a section.
2278 relocate_section(const Relocate_info
<32, big_endian
>*,
2279 unsigned int sh_type
,
2280 const unsigned char* prelocs
,
2282 Output_section
* output_section
,
2283 bool needs_special_offset_handling
,
2284 unsigned char* view
,
2285 Arm_address view_address
,
2286 section_size_type view_size
,
2287 const Reloc_symbol_changes
*);
2289 // Scan the relocs during a relocatable link.
2291 scan_relocatable_relocs(Symbol_table
* symtab
,
2293 Sized_relobj_file
<32, big_endian
>* object
,
2294 unsigned int data_shndx
,
2295 unsigned int sh_type
,
2296 const unsigned char* prelocs
,
2298 Output_section
* output_section
,
2299 bool needs_special_offset_handling
,
2300 size_t local_symbol_count
,
2301 const unsigned char* plocal_symbols
,
2302 Relocatable_relocs
*);
2304 // Scan the relocs for --emit-relocs.
2306 emit_relocs_scan(Symbol_table
* symtab
,
2308 Sized_relobj_file
<32, big_endian
>* object
,
2309 unsigned int data_shndx
,
2310 unsigned int sh_type
,
2311 const unsigned char* prelocs
,
2313 Output_section
* output_section
,
2314 bool needs_special_offset_handling
,
2315 size_t local_symbol_count
,
2316 const unsigned char* plocal_syms
,
2317 Relocatable_relocs
* rr
);
2319 // Emit relocations for a section.
2321 relocate_relocs(const Relocate_info
<32, big_endian
>*,
2322 unsigned int sh_type
,
2323 const unsigned char* prelocs
,
2325 Output_section
* output_section
,
2326 typename
elfcpp::Elf_types
<32>::Elf_Off
2327 offset_in_output_section
,
2328 unsigned char* view
,
2329 Arm_address view_address
,
2330 section_size_type view_size
,
2331 unsigned char* reloc_view
,
2332 section_size_type reloc_view_size
);
2334 // Perform target-specific processing in a relocatable link. This is
2335 // only used if we use the relocation strategy RELOC_SPECIAL.
2337 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2338 unsigned int sh_type
,
2339 const unsigned char* preloc_in
,
2341 Output_section
* output_section
,
2342 typename
elfcpp::Elf_types
<32>::Elf_Off
2343 offset_in_output_section
,
2344 unsigned char* view
,
2345 typename
elfcpp::Elf_types
<32>::Elf_Addr
2347 section_size_type view_size
,
2348 unsigned char* preloc_out
);
2350 // Return whether SYM is defined by the ABI.
2352 do_is_defined_by_abi(const Symbol
* sym
) const
2353 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2355 // Return whether there is a GOT section.
2357 has_got_section() const
2358 { return this->got_
!= NULL
; }
2360 // Return the size of the GOT section.
2364 gold_assert(this->got_
!= NULL
);
2365 return this->got_
->data_size();
2368 // Return the number of entries in the GOT.
2370 got_entry_count() const
2372 if (!this->has_got_section())
2374 return this->got_size() / 4;
2377 // Return the number of entries in the PLT.
2379 plt_entry_count() const;
2381 // Return the offset of the first non-reserved PLT entry.
2383 first_plt_entry_offset() const;
2385 // Return the size of each PLT entry.
2387 plt_entry_size() const;
2389 // Get the section to use for IRELATIVE relocations, create it if necessary.
2391 rel_irelative_section(Layout
*);
2393 // Map platform-specific reloc types
2395 get_real_reloc_type(unsigned int r_type
);
2398 // Methods to support stub-generations.
2401 // Return the stub factory
2403 stub_factory() const
2404 { return this->stub_factory_
; }
2406 // Make a new Arm_input_section object.
2407 Arm_input_section
<big_endian
>*
2408 new_arm_input_section(Relobj
*, unsigned int);
2410 // Find the Arm_input_section object corresponding to the SHNDX-th input
2411 // section of RELOBJ.
2412 Arm_input_section
<big_endian
>*
2413 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2415 // Make a new Stub_table
2416 Stub_table
<big_endian
>*
2417 new_stub_table(Arm_input_section
<big_endian
>*);
2419 // Scan a section for stub generation.
2421 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2422 const unsigned char*, size_t, Output_section
*,
2423 bool, const unsigned char*, Arm_address
,
2428 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2429 Output_section
*, unsigned char*, Arm_address
,
2432 // Get the default ARM target.
2433 static Target_arm
<big_endian
>*
2436 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2437 && parameters
->target().is_big_endian() == big_endian
);
2438 return static_cast<Target_arm
<big_endian
>*>(
2439 parameters
->sized_target
<32, big_endian
>());
2442 // Whether NAME belongs to a mapping symbol.
2444 is_mapping_symbol_name(const char* name
)
2448 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2449 && (name
[2] == '\0' || name
[2] == '.'));
2452 // Whether we work around the Cortex-A8 erratum.
2454 fix_cortex_a8() const
2455 { return this->fix_cortex_a8_
; }
2457 // Whether we merge exidx entries in debuginfo.
2459 merge_exidx_entries() const
2460 { return parameters
->options().merge_exidx_entries(); }
2462 // Whether we fix R_ARM_V4BX relocation.
2464 // 1 - replace with MOV instruction (armv4 target)
2465 // 2 - make interworking veneer (>= armv4t targets only)
2466 General_options::Fix_v4bx
2468 { return parameters
->options().fix_v4bx(); }
2470 // Scan a span of THUMB code section for Cortex-A8 erratum.
2472 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2473 section_size_type
, section_size_type
,
2474 const unsigned char*, Arm_address
);
2476 // Apply Cortex-A8 workaround to a branch.
2478 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2479 unsigned char*, Arm_address
);
2482 // Make the PLT-generator object.
2483 Output_data_plt_arm
<big_endian
>*
2484 make_data_plt(Layout
* layout
,
2485 Arm_output_data_got
<big_endian
>* got
,
2486 Output_data_space
* got_plt
,
2487 Output_data_space
* got_irelative
)
2488 { return this->do_make_data_plt(layout
, got
, got_plt
, got_irelative
); }
2490 // Make an ELF object.
2492 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2493 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2496 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2497 const elfcpp::Ehdr
<32, !big_endian
>&)
2498 { gold_unreachable(); }
2501 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2502 const elfcpp::Ehdr
<64, false>&)
2503 { gold_unreachable(); }
2506 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2507 const elfcpp::Ehdr
<64, true>&)
2508 { gold_unreachable(); }
2510 // Make an output section.
2512 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2513 elfcpp::Elf_Xword flags
)
2514 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2517 do_adjust_elf_header(unsigned char* view
, int len
);
2519 // We only need to generate stubs, and hence perform relaxation if we are
2520 // not doing relocatable linking.
2522 do_may_relax() const
2523 { return !parameters
->options().relocatable(); }
2526 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2528 // Determine whether an object attribute tag takes an integer, a
2531 do_attribute_arg_type(int tag
) const;
2533 // Reorder tags during output.
2535 do_attributes_order(int num
) const;
2537 // This is called when the target is selected as the default.
2539 do_select_as_default_target()
2541 // No locking is required since there should only be one default target.
2542 // We cannot have both the big-endian and little-endian ARM targets
2544 gold_assert(arm_reloc_property_table
== NULL
);
2545 arm_reloc_property_table
= new Arm_reloc_property_table();
2548 // Virtual function which is set to return true by a target if
2549 // it can use relocation types to determine if a function's
2550 // pointer is taken.
2552 do_can_check_for_function_pointers() const
2555 // Whether a section called SECTION_NAME may have function pointers to
2556 // sections not eligible for safe ICF folding.
2558 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2560 return (!is_prefix_of(".ARM.exidx", section_name
)
2561 && !is_prefix_of(".ARM.extab", section_name
)
2562 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2566 do_define_standard_symbols(Symbol_table
*, Layout
*);
2568 virtual Output_data_plt_arm
<big_endian
>*
2569 do_make_data_plt(Layout
* layout
,
2570 Arm_output_data_got
<big_endian
>* got
,
2571 Output_data_space
* got_plt
,
2572 Output_data_space
* got_irelative
)
2574 gold_assert(got_plt
!= NULL
&& got_irelative
!= NULL
);
2575 if (parameters
->options().long_plt())
2576 return new Output_data_plt_arm_long
<big_endian
>(
2577 layout
, got
, got_plt
, got_irelative
);
2579 return new Output_data_plt_arm_short
<big_endian
>(
2580 layout
, got
, got_plt
, got_irelative
);
2584 // The class which scans relocations.
2589 : issued_non_pic_error_(false)
2593 get_reference_flags(unsigned int r_type
);
2596 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2597 Sized_relobj_file
<32, big_endian
>* object
,
2598 unsigned int data_shndx
,
2599 Output_section
* output_section
,
2600 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2601 const elfcpp::Sym
<32, big_endian
>& lsym
,
2605 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2606 Sized_relobj_file
<32, big_endian
>* object
,
2607 unsigned int data_shndx
,
2608 Output_section
* output_section
,
2609 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2613 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2614 Sized_relobj_file
<32, big_endian
>* ,
2617 const elfcpp::Rel
<32, big_endian
>& ,
2619 const elfcpp::Sym
<32, big_endian
>&);
2622 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2623 Sized_relobj_file
<32, big_endian
>* ,
2626 const elfcpp::Rel
<32, big_endian
>& ,
2627 unsigned int , Symbol
*);
2631 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2632 unsigned int r_type
);
2635 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2636 unsigned int r_type
, Symbol
*);
2639 check_non_pic(Relobj
*, unsigned int r_type
);
2641 // Almost identical to Symbol::needs_plt_entry except that it also
2642 // handles STT_ARM_TFUNC.
2644 symbol_needs_plt_entry(const Symbol
* sym
)
2646 // An undefined symbol from an executable does not need a PLT entry.
2647 if (sym
->is_undefined() && !parameters
->options().shared())
2650 if (sym
->type() == elfcpp::STT_GNU_IFUNC
)
2653 return (!parameters
->doing_static_link()
2654 && (sym
->type() == elfcpp::STT_FUNC
2655 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2656 && (sym
->is_from_dynobj()
2657 || sym
->is_undefined()
2658 || sym
->is_preemptible()));
2662 possible_function_pointer_reloc(unsigned int r_type
);
2664 // Whether a plt entry is needed for ifunc.
2666 reloc_needs_plt_for_ifunc(Sized_relobj_file
<32, big_endian
>*,
2667 unsigned int r_type
);
2669 // Whether we have issued an error about a non-PIC compilation.
2670 bool issued_non_pic_error_
;
2673 // The class which implements relocation.
2683 // Return whether the static relocation needs to be applied.
2685 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2686 unsigned int r_type
,
2688 Output_section
* output_section
);
2690 // Do a relocation. Return false if the caller should not issue
2691 // any warnings about this relocation.
2693 relocate(const Relocate_info
<32, big_endian
>*, unsigned int,
2694 Target_arm
*, Output_section
*, size_t, const unsigned char*,
2695 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2696 unsigned char*, Arm_address
, section_size_type
);
2698 // Return whether we want to pass flag NON_PIC_REF for this
2699 // reloc. This means the relocation type accesses a symbol not via
2702 reloc_is_non_pic(unsigned int r_type
)
2706 // These relocation types reference GOT or PLT entries explicitly.
2707 case elfcpp::R_ARM_GOT_BREL
:
2708 case elfcpp::R_ARM_GOT_ABS
:
2709 case elfcpp::R_ARM_GOT_PREL
:
2710 case elfcpp::R_ARM_GOT_BREL12
:
2711 case elfcpp::R_ARM_PLT32_ABS
:
2712 case elfcpp::R_ARM_TLS_GD32
:
2713 case elfcpp::R_ARM_TLS_LDM32
:
2714 case elfcpp::R_ARM_TLS_IE32
:
2715 case elfcpp::R_ARM_TLS_IE12GP
:
2717 // These relocate types may use PLT entries.
2718 case elfcpp::R_ARM_CALL
:
2719 case elfcpp::R_ARM_THM_CALL
:
2720 case elfcpp::R_ARM_JUMP24
:
2721 case elfcpp::R_ARM_THM_JUMP24
:
2722 case elfcpp::R_ARM_THM_JUMP19
:
2723 case elfcpp::R_ARM_PLT32
:
2724 case elfcpp::R_ARM_THM_XPC22
:
2725 case elfcpp::R_ARM_PREL31
:
2726 case elfcpp::R_ARM_SBREL31
:
2735 // Do a TLS relocation.
2736 inline typename Arm_relocate_functions
<big_endian
>::Status
2737 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2738 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2739 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2740 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2745 // A class for inquiring about properties of a relocation,
2746 // used while scanning relocs during a relocatable link and
2747 // garbage collection.
2748 class Classify_reloc
:
2749 public gold::Default_classify_reloc
<elfcpp::SHT_REL
, 32, big_endian
>
2752 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
2755 // Return the explicit addend of the relocation (return 0 for SHT_REL).
2756 static typename
elfcpp::Elf_types
<32>::Elf_Swxword
2757 get_r_addend(const Reltype
*)
2760 // Return the size of the addend of the relocation (only used for SHT_REL).
2762 get_size_for_reloc(unsigned int, Relobj
*);
2765 // Adjust TLS relocation type based on the options and whether this
2766 // is a local symbol.
2767 static tls::Tls_optimization
2768 optimize_tls_reloc(bool is_final
, int r_type
);
2770 // Get the GOT section, creating it if necessary.
2771 Arm_output_data_got
<big_endian
>*
2772 got_section(Symbol_table
*, Layout
*);
2774 // Get the GOT PLT section.
2776 got_plt_section() const
2778 gold_assert(this->got_plt_
!= NULL
);
2779 return this->got_plt_
;
2782 // Create the PLT section.
2784 make_plt_section(Symbol_table
* symtab
, Layout
* layout
);
2786 // Create a PLT entry for a global symbol.
2788 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2790 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2792 make_local_ifunc_plt_entry(Symbol_table
*, Layout
*,
2793 Sized_relobj_file
<32, big_endian
>* relobj
,
2794 unsigned int local_sym_index
);
2796 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2798 define_tls_base_symbol(Symbol_table
*, Layout
*);
2800 // Create a GOT entry for the TLS module index.
2802 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2803 Sized_relobj_file
<32, big_endian
>* object
);
2805 // Get the PLT section.
2806 const Output_data_plt_arm
<big_endian
>*
2809 gold_assert(this->plt_
!= NULL
);
2813 // Get the dynamic reloc section, creating it if necessary.
2815 rel_dyn_section(Layout
*);
2817 // Get the section to use for TLS_DESC relocations.
2819 rel_tls_desc_section(Layout
*) const;
2821 // Return true if the symbol may need a COPY relocation.
2822 // References from an executable object to non-function symbols
2823 // defined in a dynamic object may need a COPY relocation.
2825 may_need_copy_reloc(Symbol
* gsym
)
2827 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2828 && gsym
->may_need_copy_reloc());
2831 // Add a potential copy relocation.
2833 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2834 Sized_relobj_file
<32, big_endian
>* object
,
2835 unsigned int shndx
, Output_section
* output_section
,
2836 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2838 unsigned int r_type
= elfcpp::elf_r_type
<32>(reloc
.get_r_info());
2839 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2840 symtab
->get_sized_symbol
<32>(sym
),
2841 object
, shndx
, output_section
,
2842 r_type
, reloc
.get_r_offset(), 0,
2843 this->rel_dyn_section(layout
));
2846 // Whether two EABI versions are compatible.
2848 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2850 // Merge processor-specific flags from input object and those in the ELF
2851 // header of the output.
2853 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2855 // Get the secondary compatible architecture.
2857 get_secondary_compatible_arch(const Attributes_section_data
*);
2859 // Set the secondary compatible architecture.
2861 set_secondary_compatible_arch(Attributes_section_data
*, int);
2864 tag_cpu_arch_combine(const char*, int, int*, int, int);
2866 // Helper to print AEABI enum tag value.
2868 aeabi_enum_name(unsigned int);
2870 // Return string value for TAG_CPU_name.
2872 tag_cpu_name_value(unsigned int);
2874 // Query attributes object to see if integer divide instructions may be
2875 // present in an object.
2877 attributes_accept_div(int arch
, int profile
,
2878 const Object_attribute
* div_attr
);
2880 // Query attributes object to see if integer divide instructions are
2881 // forbidden to be in the object. This is not the inverse of
2882 // attributes_accept_div.
2884 attributes_forbid_div(const Object_attribute
* div_attr
);
2886 // Merge object attributes from input object and those in the output.
2888 merge_object_attributes(const char*, const Attributes_section_data
*);
2890 // Helper to get an AEABI object attribute
2892 get_aeabi_object_attribute(int tag
) const
2894 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2895 gold_assert(pasd
!= NULL
);
2896 Object_attribute
* attr
=
2897 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2898 gold_assert(attr
!= NULL
);
2903 // Methods to support stub-generations.
2906 // Group input sections for stub generation.
2908 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2910 // Scan a relocation for stub generation.
2912 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2913 const Sized_symbol
<32>*, unsigned int,
2914 const Symbol_value
<32>*,
2915 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2917 // Scan a relocation section for stub.
2918 template<int sh_type
>
2920 scan_reloc_section_for_stubs(
2921 const Relocate_info
<32, big_endian
>* relinfo
,
2922 const unsigned char* prelocs
,
2924 Output_section
* output_section
,
2925 bool needs_special_offset_handling
,
2926 const unsigned char* view
,
2927 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2930 // Fix .ARM.exidx section coverage.
2932 fix_exidx_coverage(Layout
*, const Input_objects
*,
2933 Arm_output_section
<big_endian
>*, Symbol_table
*,
2936 // Functors for STL set.
2937 struct output_section_address_less_than
2940 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2941 { return s1
->address() < s2
->address(); }
2944 // Information about this specific target which we pass to the
2945 // general Target structure.
2946 static const Target::Target_info arm_info
;
2948 // The types of GOT entries needed for this platform.
2949 // These values are exposed to the ABI in an incremental link.
2950 // Do not renumber existing values without changing the version
2951 // number of the .gnu_incremental_inputs section.
2954 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2955 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2956 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2957 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2958 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2961 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2963 // Map input section to Arm_input_section.
2964 typedef Unordered_map
<Section_id
,
2965 Arm_input_section
<big_endian
>*,
2967 Arm_input_section_map
;
2969 // Map output addresses to relocs for Cortex-A8 erratum.
2970 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2971 Cortex_a8_relocs_info
;
2974 Arm_output_data_got
<big_endian
>* got_
;
2976 Output_data_plt_arm
<big_endian
>* plt_
;
2977 // The GOT PLT section.
2978 Output_data_space
* got_plt_
;
2979 // The GOT section for IRELATIVE relocations.
2980 Output_data_space
* got_irelative_
;
2981 // The dynamic reloc section.
2982 Reloc_section
* rel_dyn_
;
2983 // The section to use for IRELATIVE relocs.
2984 Reloc_section
* rel_irelative_
;
2985 // Relocs saved to avoid a COPY reloc.
2986 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2987 // Offset of the GOT entry for the TLS module index.
2988 unsigned int got_mod_index_offset_
;
2989 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2990 bool tls_base_symbol_defined_
;
2991 // Vector of Stub_tables created.
2992 Stub_table_list stub_tables_
;
2994 const Stub_factory
&stub_factory_
;
2995 // Whether we force PIC branch veneers.
2996 bool should_force_pic_veneer_
;
2997 // Map for locating Arm_input_sections.
2998 Arm_input_section_map arm_input_section_map_
;
2999 // Attributes section data in output.
3000 Attributes_section_data
* attributes_section_data_
;
3001 // Whether we want to fix code for Cortex-A8 erratum.
3002 bool fix_cortex_a8_
;
3003 // Map addresses to relocs for Cortex-A8 erratum.
3004 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
3007 template<bool big_endian
>
3008 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
3011 big_endian
, // is_big_endian
3012 elfcpp::EM_ARM
, // machine_code
3013 false, // has_make_symbol
3014 false, // has_resolve
3015 false, // has_code_fill
3016 true, // is_default_stack_executable
3017 false, // can_icf_inline_merge_sections
3019 "/usr/lib/libc.so.1", // dynamic_linker
3020 0x8000, // default_text_segment_address
3021 0x1000, // abi_pagesize (overridable by -z max-page-size)
3022 0x1000, // common_pagesize (overridable by -z common-page-size)
3023 false, // isolate_execinstr
3025 elfcpp::SHN_UNDEF
, // small_common_shndx
3026 elfcpp::SHN_UNDEF
, // large_common_shndx
3027 0, // small_common_section_flags
3028 0, // large_common_section_flags
3029 ".ARM.attributes", // attributes_section
3030 "aeabi", // attributes_vendor
3031 "_start", // entry_symbol_name
3032 32, // hash_entry_size
3035 // Arm relocate functions class
3038 template<bool big_endian
>
3039 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
3044 STATUS_OKAY
, // No error during relocation.
3045 STATUS_OVERFLOW
, // Relocation overflow.
3046 STATUS_BAD_RELOC
// Relocation cannot be applied.
3050 typedef Relocate_functions
<32, big_endian
> Base
;
3051 typedef Arm_relocate_functions
<big_endian
> This
;
3053 // Encoding of imm16 argument for movt and movw ARM instructions
3056 // imm16 := imm4 | imm12
3058 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3059 // +-------+---------------+-------+-------+-----------------------+
3060 // | | |imm4 | |imm12 |
3061 // +-------+---------------+-------+-------+-----------------------+
3063 // Extract the relocation addend from VAL based on the ARM
3064 // instruction encoding described above.
3065 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3066 extract_arm_movw_movt_addend(
3067 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3069 // According to the Elf ABI for ARM Architecture the immediate
3070 // field is sign-extended to form the addend.
3071 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
3074 // Insert X into VAL based on the ARM instruction encoding described
3076 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3077 insert_val_arm_movw_movt(
3078 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3079 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3083 val
|= (x
& 0xf000) << 4;
3087 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3090 // imm16 := imm4 | i | imm3 | imm8
3092 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3093 // +---------+-+-----------+-------++-+-----+-------+---------------+
3094 // | |i| |imm4 || |imm3 | |imm8 |
3095 // +---------+-+-----------+-------++-+-----+-------+---------------+
3097 // Extract the relocation addend from VAL based on the Thumb2
3098 // instruction encoding described above.
3099 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3100 extract_thumb_movw_movt_addend(
3101 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3103 // According to the Elf ABI for ARM Architecture the immediate
3104 // field is sign-extended to form the addend.
3105 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
3106 | ((val
>> 15) & 0x0800)
3107 | ((val
>> 4) & 0x0700)
3111 // Insert X into VAL based on the Thumb2 instruction encoding
3113 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3114 insert_val_thumb_movw_movt(
3115 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3116 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3119 val
|= (x
& 0xf000) << 4;
3120 val
|= (x
& 0x0800) << 15;
3121 val
|= (x
& 0x0700) << 4;
3122 val
|= (x
& 0x00ff);
3126 // Calculate the smallest constant Kn for the specified residual.
3127 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3129 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3135 // Determine the most significant bit in the residual and
3136 // align the resulting value to a 2-bit boundary.
3137 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3139 // The desired shift is now (msb - 6), or zero, whichever
3141 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3144 // Calculate the final residual for the specified group index.
3145 // If the passed group index is less than zero, the method will return
3146 // the value of the specified residual without any change.
3147 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3148 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3149 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3152 for (int n
= 0; n
<= group
; n
++)
3154 // Calculate which part of the value to mask.
3155 uint32_t shift
= calc_grp_kn(residual
);
3156 // Calculate the residual for the next time around.
3157 residual
&= ~(residual
& (0xff << shift
));
3163 // Calculate the value of Gn for the specified group index.
3164 // We return it in the form of an encoded constant-and-rotation.
3165 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3166 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3167 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3170 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3173 for (int n
= 0; n
<= group
; n
++)
3175 // Calculate which part of the value to mask.
3176 shift
= calc_grp_kn(residual
);
3177 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3178 gn
= residual
& (0xff << shift
);
3179 // Calculate the residual for the next time around.
3182 // Return Gn in the form of an encoded constant-and-rotation.
3183 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3187 // Handle ARM long branches.
3188 static typename
This::Status
3189 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3190 unsigned char*, const Sized_symbol
<32>*,
3191 const Arm_relobj
<big_endian
>*, unsigned int,
3192 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3194 // Handle THUMB long branches.
3195 static typename
This::Status
3196 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3197 unsigned char*, const Sized_symbol
<32>*,
3198 const Arm_relobj
<big_endian
>*, unsigned int,
3199 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3202 // Return the branch offset of a 32-bit THUMB branch.
3203 static inline int32_t
3204 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3206 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3207 // involving the J1 and J2 bits.
3208 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3209 uint32_t upper
= upper_insn
& 0x3ffU
;
3210 uint32_t lower
= lower_insn
& 0x7ffU
;
3211 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3212 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3213 uint32_t i1
= j1
^ s
? 0 : 1;
3214 uint32_t i2
= j2
^ s
? 0 : 1;
3216 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3217 | (upper
<< 12) | (lower
<< 1));
3220 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3221 // UPPER_INSN is the original upper instruction of the branch. Caller is
3222 // responsible for overflow checking and BLX offset adjustment.
3223 static inline uint16_t
3224 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3226 uint32_t s
= offset
< 0 ? 1 : 0;
3227 uint32_t bits
= static_cast<uint32_t>(offset
);
3228 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3231 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3232 // LOWER_INSN is the original lower instruction of the branch. Caller is
3233 // responsible for overflow checking and BLX offset adjustment.
3234 static inline uint16_t
3235 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3237 uint32_t s
= offset
< 0 ? 1 : 0;
3238 uint32_t bits
= static_cast<uint32_t>(offset
);
3239 return ((lower_insn
& ~0x2fffU
)
3240 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3241 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3242 | ((bits
>> 1) & 0x7ffU
));
3245 // Return the branch offset of a 32-bit THUMB conditional branch.
3246 static inline int32_t
3247 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3249 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3250 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3251 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3252 uint32_t lower
= (lower_insn
& 0x07ffU
);
3253 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3255 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3258 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3259 // instruction. UPPER_INSN is the original upper instruction of the branch.
3260 // Caller is responsible for overflow checking.
3261 static inline uint16_t
3262 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3264 uint32_t s
= offset
< 0 ? 1 : 0;
3265 uint32_t bits
= static_cast<uint32_t>(offset
);
3266 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3269 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3270 // instruction. LOWER_INSN is the original lower instruction of the branch.
3271 // The caller is responsible for overflow checking.
3272 static inline uint16_t
3273 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3275 uint32_t bits
= static_cast<uint32_t>(offset
);
3276 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3277 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3278 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3280 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3283 // R_ARM_ABS8: S + A
3284 static inline typename
This::Status
3285 abs8(unsigned char* view
,
3286 const Sized_relobj_file
<32, big_endian
>* object
,
3287 const Symbol_value
<32>* psymval
)
3289 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3290 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3291 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3292 int32_t addend
= Bits
<8>::sign_extend32(val
);
3293 Arm_address x
= psymval
->value(object
, addend
);
3294 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3295 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3297 // R_ARM_ABS8 permits signed or unsigned results.
3298 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3299 ? This::STATUS_OVERFLOW
3300 : This::STATUS_OKAY
);
3303 // R_ARM_THM_ABS5: S + A
3304 static inline typename
This::Status
3305 thm_abs5(unsigned char* view
,
3306 const Sized_relobj_file
<32, big_endian
>* object
,
3307 const Symbol_value
<32>* psymval
)
3309 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3310 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3311 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3312 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3313 Reltype addend
= (val
& 0x7e0U
) >> 6;
3314 Reltype x
= psymval
->value(object
, addend
);
3315 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3316 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3317 return (Bits
<5>::has_overflow32(x
)
3318 ? This::STATUS_OVERFLOW
3319 : This::STATUS_OKAY
);
3322 // R_ARM_ABS12: S + A
3323 static inline typename
This::Status
3324 abs12(unsigned char* view
,
3325 const Sized_relobj_file
<32, big_endian
>* object
,
3326 const Symbol_value
<32>* psymval
)
3328 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3329 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3330 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3331 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3332 Reltype addend
= val
& 0x0fffU
;
3333 Reltype x
= psymval
->value(object
, addend
);
3334 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3335 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3336 return (Bits
<12>::has_overflow32(x
)
3337 ? This::STATUS_OVERFLOW
3338 : This::STATUS_OKAY
);
3341 // R_ARM_ABS16: S + A
3342 static inline typename
This::Status
3343 abs16(unsigned char* view
,
3344 const Sized_relobj_file
<32, big_endian
>* object
,
3345 const Symbol_value
<32>* psymval
)
3347 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3348 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3349 int32_t addend
= Bits
<16>::sign_extend32(val
);
3350 Arm_address x
= psymval
->value(object
, addend
);
3351 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3352 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3354 // R_ARM_ABS16 permits signed or unsigned results.
3355 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3356 ? This::STATUS_OVERFLOW
3357 : This::STATUS_OKAY
);
3360 // R_ARM_ABS32: (S + A) | T
3361 static inline typename
This::Status
3362 abs32(unsigned char* view
,
3363 const Sized_relobj_file
<32, big_endian
>* object
,
3364 const Symbol_value
<32>* psymval
,
3365 Arm_address thumb_bit
)
3367 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3368 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3369 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3370 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3371 return This::STATUS_OKAY
;
3374 // R_ARM_REL32: (S + A) | T - P
3375 static inline typename
This::Status
3376 rel32(unsigned char* view
,
3377 const Sized_relobj_file
<32, big_endian
>* object
,
3378 const Symbol_value
<32>* psymval
,
3379 Arm_address address
,
3380 Arm_address thumb_bit
)
3382 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3383 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3384 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3385 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3386 return This::STATUS_OKAY
;
3389 // R_ARM_THM_JUMP24: (S + A) | T - P
3390 static typename
This::Status
3391 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3392 const Symbol_value
<32>* psymval
, Arm_address address
,
3393 Arm_address thumb_bit
);
3395 // R_ARM_THM_JUMP6: S + A – P
3396 static inline typename
This::Status
3397 thm_jump6(unsigned char* view
,
3398 const Sized_relobj_file
<32, big_endian
>* object
,
3399 const Symbol_value
<32>* psymval
,
3400 Arm_address address
)
3402 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3403 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3404 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3405 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3406 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3407 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3408 Reltype x
= (psymval
->value(object
, addend
) - address
);
3409 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3410 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3411 // CZB does only forward jumps.
3412 return ((x
> 0x007e)
3413 ? This::STATUS_OVERFLOW
3414 : This::STATUS_OKAY
);
3417 // R_ARM_THM_JUMP8: S + A – P
3418 static inline typename
This::Status
3419 thm_jump8(unsigned char* view
,
3420 const Sized_relobj_file
<32, big_endian
>* object
,
3421 const Symbol_value
<32>* psymval
,
3422 Arm_address address
)
3424 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3425 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3426 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3427 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3428 int32_t x
= (psymval
->value(object
, addend
) - address
);
3429 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3430 | ((x
& 0x01fe) >> 1)));
3431 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3432 return (Bits
<9>::has_overflow32(x
)
3433 ? This::STATUS_OVERFLOW
3434 : This::STATUS_OKAY
);
3437 // R_ARM_THM_JUMP11: S + A – P
3438 static inline typename
This::Status
3439 thm_jump11(unsigned char* view
,
3440 const Sized_relobj_file
<32, big_endian
>* object
,
3441 const Symbol_value
<32>* psymval
,
3442 Arm_address address
)
3444 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3445 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3446 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3447 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3448 int32_t x
= (psymval
->value(object
, addend
) - address
);
3449 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3450 | ((x
& 0x0ffe) >> 1)));
3451 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3452 return (Bits
<12>::has_overflow32(x
)
3453 ? This::STATUS_OVERFLOW
3454 : This::STATUS_OKAY
);
3457 // R_ARM_BASE_PREL: B(S) + A - P
3458 static inline typename
This::Status
3459 base_prel(unsigned char* view
,
3461 Arm_address address
)
3463 Base::rel32(view
, origin
- address
);
3467 // R_ARM_BASE_ABS: B(S) + A
3468 static inline typename
This::Status
3469 base_abs(unsigned char* view
,
3472 Base::rel32(view
, origin
);
3476 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3477 static inline typename
This::Status
3478 got_brel(unsigned char* view
,
3479 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3481 Base::rel32(view
, got_offset
);
3482 return This::STATUS_OKAY
;
3485 // R_ARM_GOT_PREL: GOT(S) + A - P
3486 static inline typename
This::Status
3487 got_prel(unsigned char* view
,
3488 Arm_address got_entry
,
3489 Arm_address address
)
3491 Base::rel32(view
, got_entry
- address
);
3492 return This::STATUS_OKAY
;
3495 // R_ARM_PREL: (S + A) | T - P
3496 static inline typename
This::Status
3497 prel31(unsigned char* view
,
3498 const Sized_relobj_file
<32, big_endian
>* object
,
3499 const Symbol_value
<32>* psymval
,
3500 Arm_address address
,
3501 Arm_address thumb_bit
)
3503 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3504 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3505 Valtype addend
= Bits
<31>::sign_extend32(val
);
3506 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3507 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3508 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3509 return (Bits
<31>::has_overflow32(x
)
3510 ? This::STATUS_OVERFLOW
3511 : This::STATUS_OKAY
);
3514 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3515 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3516 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3517 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3518 static inline typename
This::Status
3519 movw(unsigned char* view
,
3520 const Sized_relobj_file
<32, big_endian
>* object
,
3521 const Symbol_value
<32>* psymval
,
3522 Arm_address relative_address_base
,
3523 Arm_address thumb_bit
,
3524 bool check_overflow
)
3526 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3527 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3528 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3529 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3530 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3531 - relative_address_base
);
3532 val
= This::insert_val_arm_movw_movt(val
, x
);
3533 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3534 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3535 ? This::STATUS_OVERFLOW
3536 : This::STATUS_OKAY
);
3539 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3540 // R_ARM_MOVT_PREL: S + A - P
3541 // R_ARM_MOVT_BREL: S + A - B(S)
3542 static inline typename
This::Status
3543 movt(unsigned char* view
,
3544 const Sized_relobj_file
<32, big_endian
>* object
,
3545 const Symbol_value
<32>* psymval
,
3546 Arm_address relative_address_base
)
3548 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3549 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3550 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3551 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3552 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3553 val
= This::insert_val_arm_movw_movt(val
, x
);
3554 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3555 // FIXME: IHI0044D says that we should check for overflow.
3556 return This::STATUS_OKAY
;
3559 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3560 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3561 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3562 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3563 static inline typename
This::Status
3564 thm_movw(unsigned char* view
,
3565 const Sized_relobj_file
<32, big_endian
>* object
,
3566 const Symbol_value
<32>* psymval
,
3567 Arm_address relative_address_base
,
3568 Arm_address thumb_bit
,
3569 bool check_overflow
)
3571 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3572 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3573 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3574 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3575 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3576 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3578 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3579 val
= This::insert_val_thumb_movw_movt(val
, x
);
3580 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3581 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3582 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3583 ? This::STATUS_OVERFLOW
3584 : This::STATUS_OKAY
);
3587 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3588 // R_ARM_THM_MOVT_PREL: S + A - P
3589 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3590 static inline typename
This::Status
3591 thm_movt(unsigned char* view
,
3592 const Sized_relobj_file
<32, big_endian
>* object
,
3593 const Symbol_value
<32>* psymval
,
3594 Arm_address relative_address_base
)
3596 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3597 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3598 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3599 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3600 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3601 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3602 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3603 val
= This::insert_val_thumb_movw_movt(val
, x
);
3604 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3605 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3606 return This::STATUS_OKAY
;
3609 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3610 static inline typename
This::Status
3611 thm_alu11(unsigned char* view
,
3612 const Sized_relobj_file
<32, big_endian
>* object
,
3613 const Symbol_value
<32>* psymval
,
3614 Arm_address address
,
3615 Arm_address thumb_bit
)
3617 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3618 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3619 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3620 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3621 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3623 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3624 // -----------------------------------------------------------------------
3625 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3626 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3627 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3628 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3629 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3630 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3632 // Determine a sign for the addend.
3633 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3634 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3635 // Thumb2 addend encoding:
3636 // imm12 := i | imm3 | imm8
3637 int32_t addend
= (insn
& 0xff)
3638 | ((insn
& 0x00007000) >> 4)
3639 | ((insn
& 0x04000000) >> 15);
3640 // Apply a sign to the added.
3643 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3644 - (address
& 0xfffffffc);
3645 Reltype val
= abs(x
);
3646 // Mask out the value and a distinct part of the ADD/SUB opcode
3647 // (bits 7:5 of opword).
3648 insn
= (insn
& 0xfb0f8f00)
3650 | ((val
& 0x700) << 4)
3651 | ((val
& 0x800) << 15);
3652 // Set the opcode according to whether the value to go in the
3653 // place is negative.
3657 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3658 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3659 return ((val
> 0xfff) ?
3660 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3663 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3664 static inline typename
This::Status
3665 thm_pc8(unsigned char* view
,
3666 const Sized_relobj_file
<32, big_endian
>* object
,
3667 const Symbol_value
<32>* psymval
,
3668 Arm_address address
)
3670 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3671 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3672 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3673 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3674 Reltype addend
= ((insn
& 0x00ff) << 2);
3675 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3676 Reltype val
= abs(x
);
3677 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3679 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3680 return ((val
> 0x03fc)
3681 ? This::STATUS_OVERFLOW
3682 : This::STATUS_OKAY
);
3685 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3686 static inline typename
This::Status
3687 thm_pc12(unsigned char* view
,
3688 const Sized_relobj_file
<32, big_endian
>* object
,
3689 const Symbol_value
<32>* psymval
,
3690 Arm_address address
)
3692 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3693 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3694 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3695 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3696 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3697 // Determine a sign for the addend (positive if the U bit is 1).
3698 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3699 int32_t addend
= (insn
& 0xfff);
3700 // Apply a sign to the added.
3703 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3704 Reltype val
= abs(x
);
3705 // Mask out and apply the value and the U bit.
3706 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3707 // Set the U bit according to whether the value to go in the
3708 // place is positive.
3712 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3713 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3714 return ((val
> 0xfff) ?
3715 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3719 static inline typename
This::Status
3720 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3721 unsigned char* view
,
3722 const Arm_relobj
<big_endian
>* object
,
3723 const Arm_address address
,
3724 const bool is_interworking
)
3727 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3728 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3729 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3731 // Ensure that we have a BX instruction.
3732 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3733 const uint32_t reg
= (val
& 0xf);
3734 if (is_interworking
&& reg
!= 0xf)
3736 Stub_table
<big_endian
>* stub_table
=
3737 object
->stub_table(relinfo
->data_shndx
);
3738 gold_assert(stub_table
!= NULL
);
3740 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3741 gold_assert(stub
!= NULL
);
3743 int32_t veneer_address
=
3744 stub_table
->address() + stub
->offset() - 8 - address
;
3745 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3746 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3747 // Replace with a branch to veneer (B <addr>)
3748 val
= (val
& 0xf0000000) | 0x0a000000
3749 | ((veneer_address
>> 2) & 0x00ffffff);
3753 // Preserve Rm (lowest four bits) and the condition code
3754 // (highest four bits). Other bits encode MOV PC,Rm.
3755 val
= (val
& 0xf000000f) | 0x01a0f000;
3757 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3758 return This::STATUS_OKAY
;
3761 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3762 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3763 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3764 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3765 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3766 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3767 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3768 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3769 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3770 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3771 static inline typename
This::Status
3772 arm_grp_alu(unsigned char* view
,
3773 const Sized_relobj_file
<32, big_endian
>* object
,
3774 const Symbol_value
<32>* psymval
,
3776 Arm_address address
,
3777 Arm_address thumb_bit
,
3778 bool check_overflow
)
3780 gold_assert(group
>= 0 && group
< 3);
3781 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3782 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3783 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3785 // ALU group relocations are allowed only for the ADD/SUB instructions.
3786 // (0x00800000 - ADD, 0x00400000 - SUB)
3787 const Valtype opcode
= insn
& 0x01e00000;
3788 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3789 return This::STATUS_BAD_RELOC
;
3791 // Determine a sign for the addend.
3792 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3793 // shifter = rotate_imm * 2
3794 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3795 // Initial addend value.
3796 int32_t addend
= insn
& 0xff;
3797 // Rotate addend right by shifter.
3798 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3799 // Apply a sign to the added.
3802 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3803 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3804 // Check for overflow if required
3806 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3807 return This::STATUS_OVERFLOW
;
3809 // Mask out the value and the ADD/SUB part of the opcode; take care
3810 // not to destroy the S bit.
3812 // Set the opcode according to whether the value to go in the
3813 // place is negative.
3814 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3815 // Encode the offset (encoded Gn).
3818 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3819 return This::STATUS_OKAY
;
3822 // R_ARM_LDR_PC_G0: S + A - P
3823 // R_ARM_LDR_PC_G1: S + A - P
3824 // R_ARM_LDR_PC_G2: S + A - P
3825 // R_ARM_LDR_SB_G0: S + A - B(S)
3826 // R_ARM_LDR_SB_G1: S + A - B(S)
3827 // R_ARM_LDR_SB_G2: S + A - B(S)
3828 static inline typename
This::Status
3829 arm_grp_ldr(unsigned char* view
,
3830 const Sized_relobj_file
<32, big_endian
>* object
,
3831 const Symbol_value
<32>* psymval
,
3833 Arm_address address
)
3835 gold_assert(group
>= 0 && group
< 3);
3836 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3837 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3838 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3840 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3841 int32_t addend
= (insn
& 0xfff) * sign
;
3842 int32_t x
= (psymval
->value(object
, addend
) - address
);
3843 // Calculate the relevant G(n-1) value to obtain this stage residual.
3845 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3846 if (residual
>= 0x1000)
3847 return This::STATUS_OVERFLOW
;
3849 // Mask out the value and U bit.
3851 // Set the U bit for non-negative values.
3856 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3857 return This::STATUS_OKAY
;
3860 // R_ARM_LDRS_PC_G0: S + A - P
3861 // R_ARM_LDRS_PC_G1: S + A - P
3862 // R_ARM_LDRS_PC_G2: S + A - P
3863 // R_ARM_LDRS_SB_G0: S + A - B(S)
3864 // R_ARM_LDRS_SB_G1: S + A - B(S)
3865 // R_ARM_LDRS_SB_G2: S + A - B(S)
3866 static inline typename
This::Status
3867 arm_grp_ldrs(unsigned char* view
,
3868 const Sized_relobj_file
<32, big_endian
>* object
,
3869 const Symbol_value
<32>* psymval
,
3871 Arm_address address
)
3873 gold_assert(group
>= 0 && group
< 3);
3874 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3875 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3876 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3878 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3879 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3880 int32_t x
= (psymval
->value(object
, addend
) - address
);
3881 // Calculate the relevant G(n-1) value to obtain this stage residual.
3883 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3884 if (residual
>= 0x100)
3885 return This::STATUS_OVERFLOW
;
3887 // Mask out the value and U bit.
3889 // Set the U bit for non-negative values.
3892 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3894 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3895 return This::STATUS_OKAY
;
3898 // R_ARM_LDC_PC_G0: S + A - P
3899 // R_ARM_LDC_PC_G1: S + A - P
3900 // R_ARM_LDC_PC_G2: S + A - P
3901 // R_ARM_LDC_SB_G0: S + A - B(S)
3902 // R_ARM_LDC_SB_G1: S + A - B(S)
3903 // R_ARM_LDC_SB_G2: S + A - B(S)
3904 static inline typename
This::Status
3905 arm_grp_ldc(unsigned char* view
,
3906 const Sized_relobj_file
<32, big_endian
>* object
,
3907 const Symbol_value
<32>* psymval
,
3909 Arm_address address
)
3911 gold_assert(group
>= 0 && group
< 3);
3912 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3913 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3914 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3916 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3917 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3918 int32_t x
= (psymval
->value(object
, addend
) - address
);
3919 // Calculate the relevant G(n-1) value to obtain this stage residual.
3921 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3922 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3923 return This::STATUS_OVERFLOW
;
3925 // Mask out the value and U bit.
3927 // Set the U bit for non-negative values.
3930 insn
|= (residual
>> 2);
3932 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3933 return This::STATUS_OKAY
;
3937 // Relocate ARM long branches. This handles relocation types
3938 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3939 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3940 // undefined and we do not use PLT in this relocation. In such a case,
3941 // the branch is converted into an NOP.
3943 template<bool big_endian
>
3944 typename Arm_relocate_functions
<big_endian
>::Status
3945 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3946 unsigned int r_type
,
3947 const Relocate_info
<32, big_endian
>* relinfo
,
3948 unsigned char* view
,
3949 const Sized_symbol
<32>* gsym
,
3950 const Arm_relobj
<big_endian
>* object
,
3952 const Symbol_value
<32>* psymval
,
3953 Arm_address address
,
3954 Arm_address thumb_bit
,
3955 bool is_weakly_undefined_without_plt
)
3957 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3958 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3959 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3961 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3962 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3963 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3964 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3965 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3966 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3967 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3969 // Check that the instruction is valid.
3970 if (r_type
== elfcpp::R_ARM_CALL
)
3972 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3973 return This::STATUS_BAD_RELOC
;
3975 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3977 if (!insn_is_b
&& !insn_is_cond_bl
)
3978 return This::STATUS_BAD_RELOC
;
3980 else if (r_type
== elfcpp::R_ARM_PLT32
)
3982 if (!insn_is_any_branch
)
3983 return This::STATUS_BAD_RELOC
;
3985 else if (r_type
== elfcpp::R_ARM_XPC25
)
3987 // FIXME: AAELF document IH0044C does not say much about it other
3988 // than it being obsolete.
3989 if (!insn_is_any_branch
)
3990 return This::STATUS_BAD_RELOC
;
3995 // A branch to an undefined weak symbol is turned into a jump to
3996 // the next instruction unless a PLT entry will be created.
3997 // Do the same for local undefined symbols.
3998 // The jump to the next instruction is optimized as a NOP depending
3999 // on the architecture.
4000 const Target_arm
<big_endian
>* arm_target
=
4001 Target_arm
<big_endian
>::default_target();
4002 if (is_weakly_undefined_without_plt
)
4004 gold_assert(!parameters
->options().relocatable());
4005 Valtype cond
= val
& 0xf0000000U
;
4006 if (arm_target
->may_use_arm_nop())
4007 val
= cond
| 0x0320f000;
4009 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
4010 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4011 return This::STATUS_OKAY
;
4014 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
4015 Valtype branch_target
= psymval
->value(object
, addend
);
4016 int32_t branch_offset
= branch_target
- address
;
4018 // We need a stub if the branch offset is too large or if we need
4020 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4021 Reloc_stub
* stub
= NULL
;
4023 if (!parameters
->options().relocatable()
4024 && (Bits
<26>::has_overflow32(branch_offset
)
4025 || ((thumb_bit
!= 0)
4026 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
4028 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
4030 Stub_type stub_type
=
4031 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4032 unadjusted_branch_target
,
4034 if (stub_type
!= arm_stub_none
)
4036 Stub_table
<big_endian
>* stub_table
=
4037 object
->stub_table(relinfo
->data_shndx
);
4038 gold_assert(stub_table
!= NULL
);
4040 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4041 stub
= stub_table
->find_reloc_stub(stub_key
);
4042 gold_assert(stub
!= NULL
);
4043 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4044 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4045 branch_offset
= branch_target
- address
;
4046 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
4050 // At this point, if we still need to switch mode, the instruction
4051 // must either be a BLX or a BL that can be converted to a BLX.
4055 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
4056 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
4059 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
4060 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4061 return (Bits
<26>::has_overflow32(branch_offset
)
4062 ? This::STATUS_OVERFLOW
4063 : This::STATUS_OKAY
);
4066 // Relocate THUMB long branches. This handles relocation types
4067 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4068 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4069 // undefined and we do not use PLT in this relocation. In such a case,
4070 // the branch is converted into an NOP.
4072 template<bool big_endian
>
4073 typename Arm_relocate_functions
<big_endian
>::Status
4074 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
4075 unsigned int r_type
,
4076 const Relocate_info
<32, big_endian
>* relinfo
,
4077 unsigned char* view
,
4078 const Sized_symbol
<32>* gsym
,
4079 const Arm_relobj
<big_endian
>* object
,
4081 const Symbol_value
<32>* psymval
,
4082 Arm_address address
,
4083 Arm_address thumb_bit
,
4084 bool is_weakly_undefined_without_plt
)
4086 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4087 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4088 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4089 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4091 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4093 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
4094 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
4096 // Check that the instruction is valid.
4097 if (r_type
== elfcpp::R_ARM_THM_CALL
)
4099 if (!is_bl_insn
&& !is_blx_insn
)
4100 return This::STATUS_BAD_RELOC
;
4102 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
4104 // This cannot be a BLX.
4106 return This::STATUS_BAD_RELOC
;
4108 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4110 // Check for Thumb to Thumb call.
4112 return This::STATUS_BAD_RELOC
;
4115 gold_warning(_("%s: Thumb BLX instruction targets "
4116 "thumb function '%s'."),
4117 object
->name().c_str(),
4118 (gsym
? gsym
->name() : "(local)"));
4119 // Convert BLX to BL.
4120 lower_insn
|= 0x1000U
;
4126 // A branch to an undefined weak symbol is turned into a jump to
4127 // the next instruction unless a PLT entry will be created.
4128 // The jump to the next instruction is optimized as a NOP.W for
4129 // Thumb-2 enabled architectures.
4130 const Target_arm
<big_endian
>* arm_target
=
4131 Target_arm
<big_endian
>::default_target();
4132 if (is_weakly_undefined_without_plt
)
4134 gold_assert(!parameters
->options().relocatable());
4135 if (arm_target
->may_use_thumb2_nop())
4137 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4138 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4142 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4143 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4145 return This::STATUS_OKAY
;
4148 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4149 Arm_address branch_target
= psymval
->value(object
, addend
);
4151 // For BLX, bit 1 of target address comes from bit 1 of base address.
4152 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4153 if (thumb_bit
== 0 && may_use_blx
)
4154 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4156 int32_t branch_offset
= branch_target
- address
;
4158 // We need a stub if the branch offset is too large or if we need
4160 bool thumb2
= arm_target
->using_thumb2();
4161 if (!parameters
->options().relocatable()
4162 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4163 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4164 || ((thumb_bit
== 0)
4165 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4166 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4168 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4170 Stub_type stub_type
=
4171 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4172 unadjusted_branch_target
,
4175 if (stub_type
!= arm_stub_none
)
4177 Stub_table
<big_endian
>* stub_table
=
4178 object
->stub_table(relinfo
->data_shndx
);
4179 gold_assert(stub_table
!= NULL
);
4181 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4182 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4183 gold_assert(stub
!= NULL
);
4184 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4185 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4186 if (thumb_bit
== 0 && may_use_blx
)
4187 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4188 branch_offset
= branch_target
- address
;
4192 // At this point, if we still need to switch mode, the instruction
4193 // must either be a BLX or a BL that can be converted to a BLX.
4196 gold_assert(may_use_blx
4197 && (r_type
== elfcpp::R_ARM_THM_CALL
4198 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4199 // Make sure this is a BLX.
4200 lower_insn
&= ~0x1000U
;
4204 // Make sure this is a BL.
4205 lower_insn
|= 0x1000U
;
4208 // For a BLX instruction, make sure that the relocation is rounded up
4209 // to a word boundary. This follows the semantics of the instruction
4210 // which specifies that bit 1 of the target address will come from bit
4211 // 1 of the base address.
4212 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4213 gold_assert((branch_offset
& 3) == 0);
4215 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4216 // We use the Thumb-2 encoding, which is safe even if dealing with
4217 // a Thumb-1 instruction by virtue of our overflow check above. */
4218 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4219 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4221 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4222 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4224 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4227 ? Bits
<25>::has_overflow32(branch_offset
)
4228 : Bits
<23>::has_overflow32(branch_offset
))
4229 ? This::STATUS_OVERFLOW
4230 : This::STATUS_OKAY
);
4233 // Relocate THUMB-2 long conditional branches.
4234 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4235 // undefined and we do not use PLT in this relocation. In such a case,
4236 // the branch is converted into an NOP.
4238 template<bool big_endian
>
4239 typename Arm_relocate_functions
<big_endian
>::Status
4240 Arm_relocate_functions
<big_endian
>::thm_jump19(
4241 unsigned char* view
,
4242 const Arm_relobj
<big_endian
>* object
,
4243 const Symbol_value
<32>* psymval
,
4244 Arm_address address
,
4245 Arm_address thumb_bit
)
4247 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4248 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4249 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4250 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4251 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4253 Arm_address branch_target
= psymval
->value(object
, addend
);
4254 int32_t branch_offset
= branch_target
- address
;
4256 // ??? Should handle interworking? GCC might someday try to
4257 // use this for tail calls.
4258 // FIXME: We do support thumb entry to PLT yet.
4261 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4262 return This::STATUS_BAD_RELOC
;
4265 // Put RELOCATION back into the insn.
4266 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4267 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4269 // Put the relocated value back in the object file:
4270 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4271 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4273 return (Bits
<21>::has_overflow32(branch_offset
)
4274 ? This::STATUS_OVERFLOW
4275 : This::STATUS_OKAY
);
4278 // Get the GOT section, creating it if necessary.
4280 template<bool big_endian
>
4281 Arm_output_data_got
<big_endian
>*
4282 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4284 if (this->got_
== NULL
)
4286 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4288 // When using -z now, we can treat .got as a relro section.
4289 // Without -z now, it is modified after program startup by lazy
4291 bool is_got_relro
= parameters
->options().now();
4292 Output_section_order got_order
= (is_got_relro
4296 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4297 // .got.plt sections in output. The output .got section contains both
4298 // PLT and non-PLT GOT entries.
4299 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4301 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4302 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4303 this->got_
, got_order
, is_got_relro
);
4305 // The old GNU linker creates a .got.plt section. We just
4306 // create another set of data in the .got section. Note that we
4307 // always create a PLT if we create a GOT, although the PLT
4309 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4310 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4311 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4312 this->got_plt_
, got_order
, is_got_relro
);
4314 // The first three entries are reserved.
4315 this->got_plt_
->set_current_data_size(3 * 4);
4317 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4318 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4319 Symbol_table::PREDEFINED
,
4321 0, 0, elfcpp::STT_OBJECT
,
4323 elfcpp::STV_HIDDEN
, 0,
4326 // If there are any IRELATIVE relocations, they get GOT entries
4327 // in .got.plt after the jump slot entries.
4328 this->got_irelative_
= new Output_data_space(4, "** GOT IRELATIVE PLT");
4329 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4330 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4331 this->got_irelative_
,
4332 got_order
, is_got_relro
);
4338 // Get the dynamic reloc section, creating it if necessary.
4340 template<bool big_endian
>
4341 typename Target_arm
<big_endian
>::Reloc_section
*
4342 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4344 if (this->rel_dyn_
== NULL
)
4346 gold_assert(layout
!= NULL
);
4347 // Create both relocation sections in the same place, so as to ensure
4348 // their relative order in the output section.
4349 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4350 this->rel_irelative_
= new Reloc_section(false);
4351 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4352 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4353 ORDER_DYNAMIC_RELOCS
, false);
4354 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4355 elfcpp::SHF_ALLOC
, this->rel_irelative_
,
4356 ORDER_DYNAMIC_RELOCS
, false);
4358 return this->rel_dyn_
;
4362 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4363 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4364 // follow the other dynamic relocations so that they can refer to global
4365 // variables initialized by those relocs.
4367 template<bool big_endian
>
4368 typename Target_arm
<big_endian
>::Reloc_section
*
4369 Target_arm
<big_endian
>::rel_irelative_section(Layout
* layout
)
4371 if (this->rel_irelative_
== NULL
)
4373 // Delegate the creation to rel_dyn_section so as to ensure their order in
4374 // the output section.
4375 this->rel_dyn_section(layout
);
4376 gold_assert(this->rel_irelative_
!= NULL
4377 && (this->rel_dyn_
->output_section()
4378 == this->rel_irelative_
->output_section()));
4380 return this->rel_irelative_
;
4384 // Insn_template methods.
4386 // Return byte size of an instruction template.
4389 Insn_template::size() const
4391 switch (this->type())
4394 case THUMB16_SPECIAL_TYPE
:
4405 // Return alignment of an instruction template.
4408 Insn_template::alignment() const
4410 switch (this->type())
4413 case THUMB16_SPECIAL_TYPE
:
4424 // Stub_template methods.
4426 Stub_template::Stub_template(
4427 Stub_type type
, const Insn_template
* insns
,
4429 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4430 entry_in_thumb_mode_(false), relocs_()
4434 // Compute byte size and alignment of stub template.
4435 for (size_t i
= 0; i
< insn_count
; i
++)
4437 unsigned insn_alignment
= insns
[i
].alignment();
4438 size_t insn_size
= insns
[i
].size();
4439 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4440 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4441 switch (insns
[i
].type())
4443 case Insn_template::THUMB16_TYPE
:
4444 case Insn_template::THUMB16_SPECIAL_TYPE
:
4446 this->entry_in_thumb_mode_
= true;
4449 case Insn_template::THUMB32_TYPE
:
4450 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4451 this->relocs_
.push_back(Reloc(i
, offset
));
4453 this->entry_in_thumb_mode_
= true;
4456 case Insn_template::ARM_TYPE
:
4457 // Handle cases where the target is encoded within the
4459 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4460 this->relocs_
.push_back(Reloc(i
, offset
));
4463 case Insn_template::DATA_TYPE
:
4464 // Entry point cannot be data.
4465 gold_assert(i
!= 0);
4466 this->relocs_
.push_back(Reloc(i
, offset
));
4472 offset
+= insn_size
;
4474 this->size_
= offset
;
4479 // Template to implement do_write for a specific target endianness.
4481 template<bool big_endian
>
4483 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4485 const Stub_template
* stub_template
= this->stub_template();
4486 const Insn_template
* insns
= stub_template
->insns();
4488 // FIXME: We do not handle BE8 encoding yet.
4489 unsigned char* pov
= view
;
4490 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4492 switch (insns
[i
].type())
4494 case Insn_template::THUMB16_TYPE
:
4495 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4497 case Insn_template::THUMB16_SPECIAL_TYPE
:
4498 elfcpp::Swap
<16, big_endian
>::writeval(
4500 this->thumb16_special(i
));
4502 case Insn_template::THUMB32_TYPE
:
4504 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4505 uint32_t lo
= insns
[i
].data() & 0xffff;
4506 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4507 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4510 case Insn_template::ARM_TYPE
:
4511 case Insn_template::DATA_TYPE
:
4512 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4517 pov
+= insns
[i
].size();
4519 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4522 // Reloc_stub::Key methods.
4524 // Dump a Key as a string for debugging.
4527 Reloc_stub::Key::name() const
4529 if (this->r_sym_
== invalid_index
)
4531 // Global symbol key name
4532 // <stub-type>:<symbol name>:<addend>.
4533 const std::string sym_name
= this->u_
.symbol
->name();
4534 // We need to print two hex number and two colons. So just add 100 bytes
4535 // to the symbol name size.
4536 size_t len
= sym_name
.size() + 100;
4537 char* buffer
= new char[len
];
4538 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4539 sym_name
.c_str(), this->addend_
);
4540 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4542 return std::string(buffer
);
4546 // local symbol key name
4547 // <stub-type>:<object>:<r_sym>:<addend>.
4548 const size_t len
= 200;
4550 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4551 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4552 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4553 return std::string(buffer
);
4557 // Reloc_stub methods.
4559 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4560 // LOCATION to DESTINATION.
4561 // This code is based on the arm_type_of_stub function in
4562 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4566 Reloc_stub::stub_type_for_reloc(
4567 unsigned int r_type
,
4568 Arm_address location
,
4569 Arm_address destination
,
4570 bool target_is_thumb
)
4572 Stub_type stub_type
= arm_stub_none
;
4574 // This is a bit ugly but we want to avoid using a templated class for
4575 // big and little endianities.
4577 bool should_force_pic_veneer
= parameters
->options().pic_veneer();
4580 if (parameters
->target().is_big_endian())
4582 const Target_arm
<true>* big_endian_target
=
4583 Target_arm
<true>::default_target();
4584 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4585 should_force_pic_veneer
|= big_endian_target
->should_force_pic_veneer();
4586 thumb2
= big_endian_target
->using_thumb2();
4587 thumb_only
= big_endian_target
->using_thumb_only();
4591 const Target_arm
<false>* little_endian_target
=
4592 Target_arm
<false>::default_target();
4593 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4594 should_force_pic_veneer
|=
4595 little_endian_target
->should_force_pic_veneer();
4596 thumb2
= little_endian_target
->using_thumb2();
4597 thumb_only
= little_endian_target
->using_thumb_only();
4600 int64_t branch_offset
;
4601 bool output_is_position_independent
=
4602 parameters
->options().output_is_position_independent();
4603 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4605 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4606 // base address (instruction address + 4).
4607 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4608 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4609 branch_offset
= static_cast<int64_t>(destination
) - location
;
4611 // Handle cases where:
4612 // - this call goes too far (different Thumb/Thumb2 max
4614 // - it's a Thumb->Arm call and blx is not available, or it's a
4615 // Thumb->Arm branch (not bl). A stub is needed in this case.
4617 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4618 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4620 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4621 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4622 || ((!target_is_thumb
)
4623 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4624 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4626 if (target_is_thumb
)
4631 stub_type
= (output_is_position_independent
4632 || should_force_pic_veneer
)
4635 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4636 // V5T and above. Stub starts with ARM code, so
4637 // we must be able to switch mode before
4638 // reaching it, which is only possible for 'bl'
4639 // (ie R_ARM_THM_CALL relocation).
4640 ? arm_stub_long_branch_any_thumb_pic
4641 // On V4T, use Thumb code only.
4642 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4646 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4647 ? arm_stub_long_branch_any_any
// V5T and above.
4648 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4652 stub_type
= (output_is_position_independent
4653 || should_force_pic_veneer
)
4654 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4655 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4662 // FIXME: We should check that the input section is from an
4663 // object that has interwork enabled.
4665 stub_type
= (output_is_position_independent
4666 || should_force_pic_veneer
)
4669 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4670 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4671 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4675 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4676 ? arm_stub_long_branch_any_any
// V5T and above.
4677 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4679 // Handle v4t short branches.
4680 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4681 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4682 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4683 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4687 else if (r_type
== elfcpp::R_ARM_CALL
4688 || r_type
== elfcpp::R_ARM_JUMP24
4689 || r_type
== elfcpp::R_ARM_PLT32
)
4691 branch_offset
= static_cast<int64_t>(destination
) - location
;
4692 if (target_is_thumb
)
4696 // FIXME: We should check that the input section is from an
4697 // object that has interwork enabled.
4699 // We have an extra 2-bytes reach because of
4700 // the mode change (bit 24 (H) of BLX encoding).
4701 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4702 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4703 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4704 || (r_type
== elfcpp::R_ARM_JUMP24
)
4705 || (r_type
== elfcpp::R_ARM_PLT32
))
4707 stub_type
= (output_is_position_independent
4708 || should_force_pic_veneer
)
4711 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4712 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4716 ? arm_stub_long_branch_any_any
// V5T and above.
4717 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4723 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4724 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4726 stub_type
= (output_is_position_independent
4727 || should_force_pic_veneer
)
4728 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4729 : arm_stub_long_branch_any_any
; /// non-PIC.
4737 // Cortex_a8_stub methods.
4739 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4740 // I is the position of the instruction template in the stub template.
4743 Cortex_a8_stub::do_thumb16_special(size_t i
)
4745 // The only use of this is to copy condition code from a conditional
4746 // branch being worked around to the corresponding conditional branch in
4748 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4750 uint16_t data
= this->stub_template()->insns()[i
].data();
4751 gold_assert((data
& 0xff00U
) == 0xd000U
);
4752 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4756 // Stub_factory methods.
4758 Stub_factory::Stub_factory()
4760 // The instruction template sequences are declared as static
4761 // objects and initialized first time the constructor runs.
4763 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4764 // to reach the stub if necessary.
4765 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4767 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4768 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4769 // dcd R_ARM_ABS32(X)
4772 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4774 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4776 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4777 Insn_template::arm_insn(0xe12fff1c), // bx ip
4778 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4779 // dcd R_ARM_ABS32(X)
4782 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4783 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4785 Insn_template::thumb16_insn(0xb401), // push {r0}
4786 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4787 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4788 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4789 Insn_template::thumb16_insn(0x4760), // bx ip
4790 Insn_template::thumb16_insn(0xbf00), // nop
4791 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4792 // dcd R_ARM_ABS32(X)
4795 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4797 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4799 Insn_template::thumb16_insn(0x4778), // bx pc
4800 Insn_template::thumb16_insn(0x46c0), // nop
4801 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4802 Insn_template::arm_insn(0xe12fff1c), // bx ip
4803 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4804 // dcd R_ARM_ABS32(X)
4807 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4809 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4811 Insn_template::thumb16_insn(0x4778), // bx pc
4812 Insn_template::thumb16_insn(0x46c0), // nop
4813 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4814 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4815 // dcd R_ARM_ABS32(X)
4818 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4819 // one, when the destination is close enough.
4820 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4822 Insn_template::thumb16_insn(0x4778), // bx pc
4823 Insn_template::thumb16_insn(0x46c0), // nop
4824 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4827 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4828 // blx to reach the stub if necessary.
4829 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4831 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4832 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4833 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4834 // dcd R_ARM_REL32(X-4)
4837 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4838 // blx to reach the stub if necessary. We can not add into pc;
4839 // it is not guaranteed to mode switch (different in ARMv6 and
4841 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4843 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4844 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4845 Insn_template::arm_insn(0xe12fff1c), // bx ip
4846 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4847 // dcd R_ARM_REL32(X)
4850 // V4T ARM -> ARM long branch stub, PIC.
4851 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4853 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4854 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4855 Insn_template::arm_insn(0xe12fff1c), // bx ip
4856 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4857 // dcd R_ARM_REL32(X)
4860 // V4T Thumb -> ARM long branch stub, PIC.
4861 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4863 Insn_template::thumb16_insn(0x4778), // bx pc
4864 Insn_template::thumb16_insn(0x46c0), // nop
4865 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4866 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4867 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4868 // dcd R_ARM_REL32(X)
4871 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4873 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4875 Insn_template::thumb16_insn(0xb401), // push {r0}
4876 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4877 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4878 Insn_template::thumb16_insn(0x4484), // add ip, r0
4879 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4880 Insn_template::thumb16_insn(0x4760), // bx ip
4881 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4882 // dcd R_ARM_REL32(X)
4885 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4887 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4889 Insn_template::thumb16_insn(0x4778), // bx pc
4890 Insn_template::thumb16_insn(0x46c0), // nop
4891 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4892 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4893 Insn_template::arm_insn(0xe12fff1c), // bx ip
4894 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4895 // dcd R_ARM_REL32(X)
4898 // Cortex-A8 erratum-workaround stubs.
4900 // Stub used for conditional branches (which may be beyond +/-1MB away,
4901 // so we can't use a conditional branch to reach this stub).
4908 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4910 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4911 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4912 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4916 // Stub used for b.w and bl.w instructions.
4918 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4920 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4923 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4925 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4928 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4929 // instruction (which switches to ARM mode) to point to this stub. Jump to
4930 // the real destination using an ARM-mode branch.
4931 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4933 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4936 // Stub used to provide an interworking for R_ARM_V4BX relocation
4937 // (bx r[n] instruction).
4938 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4940 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4941 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4942 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4945 // Fill in the stub template look-up table. Stub templates are constructed
4946 // per instance of Stub_factory for fast look-up without locking
4947 // in a thread-enabled environment.
4949 this->stub_templates_
[arm_stub_none
] =
4950 new Stub_template(arm_stub_none
, NULL
, 0);
4952 #define DEF_STUB(x) \
4956 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4957 Stub_type type = arm_stub_##x; \
4958 this->stub_templates_[type] = \
4959 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4967 // Stub_table methods.
4969 // Remove all Cortex-A8 stub.
4971 template<bool big_endian
>
4973 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4975 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4976 p
!= this->cortex_a8_stubs_
.end();
4979 this->cortex_a8_stubs_
.clear();
4982 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4984 template<bool big_endian
>
4986 Stub_table
<big_endian
>::relocate_stub(
4988 const Relocate_info
<32, big_endian
>* relinfo
,
4989 Target_arm
<big_endian
>* arm_target
,
4990 Output_section
* output_section
,
4991 unsigned char* view
,
4992 Arm_address address
,
4993 section_size_type view_size
)
4995 const Stub_template
* stub_template
= stub
->stub_template();
4996 if (stub_template
->reloc_count() != 0)
4998 // Adjust view to cover the stub only.
4999 section_size_type offset
= stub
->offset();
5000 section_size_type stub_size
= stub_template
->size();
5001 gold_assert(offset
+ stub_size
<= view_size
);
5003 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
5004 address
+ offset
, stub_size
);
5008 // Relocate all stubs in this stub table.
5010 template<bool big_endian
>
5012 Stub_table
<big_endian
>::relocate_stubs(
5013 const Relocate_info
<32, big_endian
>* relinfo
,
5014 Target_arm
<big_endian
>* arm_target
,
5015 Output_section
* output_section
,
5016 unsigned char* view
,
5017 Arm_address address
,
5018 section_size_type view_size
)
5020 // If we are passed a view bigger than the stub table's. we need to
5022 gold_assert(address
== this->address()
5024 == static_cast<section_size_type
>(this->data_size())));
5026 // Relocate all relocation stubs.
5027 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5028 p
!= this->reloc_stubs_
.end();
5030 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5031 address
, view_size
);
5033 // Relocate all Cortex-A8 stubs.
5034 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
5035 p
!= this->cortex_a8_stubs_
.end();
5037 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5038 address
, view_size
);
5040 // Relocate all ARM V4BX stubs.
5041 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
5042 p
!= this->arm_v4bx_stubs_
.end();
5046 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
5047 address
, view_size
);
5051 // Write out the stubs to file.
5053 template<bool big_endian
>
5055 Stub_table
<big_endian
>::do_write(Output_file
* of
)
5057 off_t offset
= this->offset();
5058 const section_size_type oview_size
=
5059 convert_to_section_size_type(this->data_size());
5060 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5062 // Write relocation stubs.
5063 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5064 p
!= this->reloc_stubs_
.end();
5067 Reloc_stub
* stub
= p
->second
;
5068 Arm_address address
= this->address() + stub
->offset();
5070 == align_address(address
,
5071 stub
->stub_template()->alignment()));
5072 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5076 // Write Cortex-A8 stubs.
5077 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5078 p
!= this->cortex_a8_stubs_
.end();
5081 Cortex_a8_stub
* stub
= p
->second
;
5082 Arm_address address
= this->address() + stub
->offset();
5084 == align_address(address
,
5085 stub
->stub_template()->alignment()));
5086 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5090 // Write ARM V4BX relocation stubs.
5091 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5092 p
!= this->arm_v4bx_stubs_
.end();
5098 Arm_address address
= this->address() + (*p
)->offset();
5100 == align_address(address
,
5101 (*p
)->stub_template()->alignment()));
5102 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
5106 of
->write_output_view(this->offset(), oview_size
, oview
);
5109 // Update the data size and address alignment of the stub table at the end
5110 // of a relaxation pass. Return true if either the data size or the
5111 // alignment changed in this relaxation pass.
5113 template<bool big_endian
>
5115 Stub_table
<big_endian
>::update_data_size_and_addralign()
5117 // Go over all stubs in table to compute data size and address alignment.
5118 off_t size
= this->reloc_stubs_size_
;
5119 unsigned addralign
= this->reloc_stubs_addralign_
;
5121 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5122 p
!= this->cortex_a8_stubs_
.end();
5125 const Stub_template
* stub_template
= p
->second
->stub_template();
5126 addralign
= std::max(addralign
, stub_template
->alignment());
5127 size
= (align_address(size
, stub_template
->alignment())
5128 + stub_template
->size());
5131 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5132 p
!= this->arm_v4bx_stubs_
.end();
5138 const Stub_template
* stub_template
= (*p
)->stub_template();
5139 addralign
= std::max(addralign
, stub_template
->alignment());
5140 size
= (align_address(size
, stub_template
->alignment())
5141 + stub_template
->size());
5144 // Check if either data size or alignment changed in this pass.
5145 // Update prev_data_size_ and prev_addralign_. These will be used
5146 // as the current data size and address alignment for the next pass.
5147 bool changed
= size
!= this->prev_data_size_
;
5148 this->prev_data_size_
= size
;
5150 if (addralign
!= this->prev_addralign_
)
5152 this->prev_addralign_
= addralign
;
5157 // Finalize the stubs. This sets the offsets of the stubs within the stub
5158 // table. It also marks all input sections needing Cortex-A8 workaround.
5160 template<bool big_endian
>
5162 Stub_table
<big_endian
>::finalize_stubs()
5164 off_t off
= this->reloc_stubs_size_
;
5165 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5166 p
!= this->cortex_a8_stubs_
.end();
5169 Cortex_a8_stub
* stub
= p
->second
;
5170 const Stub_template
* stub_template
= stub
->stub_template();
5171 uint64_t stub_addralign
= stub_template
->alignment();
5172 off
= align_address(off
, stub_addralign
);
5173 stub
->set_offset(off
);
5174 off
+= stub_template
->size();
5176 // Mark input section so that we can determine later if a code section
5177 // needs the Cortex-A8 workaround quickly.
5178 Arm_relobj
<big_endian
>* arm_relobj
=
5179 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5180 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5183 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5184 p
!= this->arm_v4bx_stubs_
.end();
5190 const Stub_template
* stub_template
= (*p
)->stub_template();
5191 uint64_t stub_addralign
= stub_template
->alignment();
5192 off
= align_address(off
, stub_addralign
);
5193 (*p
)->set_offset(off
);
5194 off
+= stub_template
->size();
5197 gold_assert(off
<= this->prev_data_size_
);
5200 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5201 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5202 // of the address range seen by the linker.
5204 template<bool big_endian
>
5206 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5207 Target_arm
<big_endian
>* arm_target
,
5208 unsigned char* view
,
5209 Arm_address view_address
,
5210 section_size_type view_size
)
5212 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5213 for (Cortex_a8_stub_list::const_iterator p
=
5214 this->cortex_a8_stubs_
.lower_bound(view_address
);
5215 ((p
!= this->cortex_a8_stubs_
.end())
5216 && (p
->first
< (view_address
+ view_size
)));
5219 // We do not store the THUMB bit in the LSB of either the branch address
5220 // or the stub offset. There is no need to strip the LSB.
5221 Arm_address branch_address
= p
->first
;
5222 const Cortex_a8_stub
* stub
= p
->second
;
5223 Arm_address stub_address
= this->address() + stub
->offset();
5225 // Offset of the branch instruction relative to this view.
5226 section_size_type offset
=
5227 convert_to_section_size_type(branch_address
- view_address
);
5228 gold_assert((offset
+ 4) <= view_size
);
5230 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5231 view
+ offset
, branch_address
);
5235 // Arm_input_section methods.
5237 // Initialize an Arm_input_section.
5239 template<bool big_endian
>
5241 Arm_input_section
<big_endian
>::init()
5243 Relobj
* relobj
= this->relobj();
5244 unsigned int shndx
= this->shndx();
5246 // We have to cache original size, alignment and contents to avoid locking
5247 // the original file.
5248 this->original_addralign_
=
5249 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5251 // This is not efficient but we expect only a small number of relaxed
5252 // input sections for stubs.
5253 section_size_type section_size
;
5254 const unsigned char* section_contents
=
5255 relobj
->section_contents(shndx
, §ion_size
, false);
5256 this->original_size_
=
5257 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5259 gold_assert(this->original_contents_
== NULL
);
5260 this->original_contents_
= new unsigned char[section_size
];
5261 memcpy(this->original_contents_
, section_contents
, section_size
);
5263 // We want to make this look like the original input section after
5264 // output sections are finalized.
5265 Output_section
* os
= relobj
->output_section(shndx
);
5266 off_t offset
= relobj
->output_section_offset(shndx
);
5267 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5268 this->set_address(os
->address() + offset
);
5269 this->set_file_offset(os
->offset() + offset
);
5271 this->set_current_data_size(this->original_size_
);
5272 this->finalize_data_size();
5275 template<bool big_endian
>
5277 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5279 // We have to write out the original section content.
5280 gold_assert(this->original_contents_
!= NULL
);
5281 of
->write(this->offset(), this->original_contents_
,
5282 this->original_size_
);
5284 // If this owns a stub table and it is not empty, write it.
5285 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5286 this->stub_table_
->write(of
);
5289 // Finalize data size.
5291 template<bool big_endian
>
5293 Arm_input_section
<big_endian
>::set_final_data_size()
5295 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5297 if (this->is_stub_table_owner())
5299 this->stub_table_
->finalize_data_size();
5300 off
= align_address(off
, this->stub_table_
->addralign());
5301 off
+= this->stub_table_
->data_size();
5303 this->set_data_size(off
);
5306 // Reset address and file offset.
5308 template<bool big_endian
>
5310 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5312 // Size of the original input section contents.
5313 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5315 // If this is a stub table owner, account for the stub table size.
5316 if (this->is_stub_table_owner())
5318 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5320 // Reset the stub table's address and file offset. The
5321 // current data size for child will be updated after that.
5322 stub_table_
->reset_address_and_file_offset();
5323 off
= align_address(off
, stub_table_
->addralign());
5324 off
+= stub_table
->current_data_size();
5327 this->set_current_data_size(off
);
5330 // Arm_exidx_cantunwind methods.
5332 // Write this to Output file OF for a fixed endianness.
5334 template<bool big_endian
>
5336 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5338 off_t offset
= this->offset();
5339 const section_size_type oview_size
= 8;
5340 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5342 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5343 gold_assert(os
!= NULL
);
5345 Arm_relobj
<big_endian
>* arm_relobj
=
5346 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5347 Arm_address output_offset
=
5348 arm_relobj
->get_output_section_offset(this->shndx_
);
5349 Arm_address section_start
;
5350 section_size_type section_size
;
5352 // Find out the end of the text section referred by this.
5353 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5355 section_start
= os
->address() + output_offset
;
5356 const Arm_exidx_input_section
* exidx_input_section
=
5357 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5358 gold_assert(exidx_input_section
!= NULL
);
5360 convert_to_section_size_type(exidx_input_section
->text_size());
5364 // Currently this only happens for a relaxed section.
5365 const Output_relaxed_input_section
* poris
=
5366 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5367 gold_assert(poris
!= NULL
);
5368 section_start
= poris
->address();
5369 section_size
= convert_to_section_size_type(poris
->data_size());
5372 // We always append this to the end of an EXIDX section.
5373 Arm_address output_address
= section_start
+ section_size
;
5375 // Write out the entry. The first word either points to the beginning
5376 // or after the end of a text section. The second word is the special
5377 // EXIDX_CANTUNWIND value.
5378 uint32_t prel31_offset
= output_address
- this->address();
5379 if (Bits
<31>::has_overflow32(offset
))
5380 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5381 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5382 prel31_offset
& 0x7fffffffU
);
5383 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5384 elfcpp::EXIDX_CANTUNWIND
);
5386 of
->write_output_view(this->offset(), oview_size
, oview
);
5389 // Arm_exidx_merged_section methods.
5391 // Constructor for Arm_exidx_merged_section.
5392 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5393 // SECTION_OFFSET_MAP points to a section offset map describing how
5394 // parts of the input section are mapped to output. DELETED_BYTES is
5395 // the number of bytes deleted from the EXIDX input section.
5397 Arm_exidx_merged_section::Arm_exidx_merged_section(
5398 const Arm_exidx_input_section
& exidx_input_section
,
5399 const Arm_exidx_section_offset_map
& section_offset_map
,
5400 uint32_t deleted_bytes
)
5401 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5402 exidx_input_section
.shndx(),
5403 exidx_input_section
.addralign()),
5404 exidx_input_section_(exidx_input_section
),
5405 section_offset_map_(section_offset_map
)
5407 // If we retain or discard the whole EXIDX input section, we would
5409 gold_assert(deleted_bytes
!= 0
5410 && deleted_bytes
!= this->exidx_input_section_
.size());
5412 // Fix size here so that we do not need to implement set_final_data_size.
5413 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5414 this->set_data_size(size
);
5415 this->fix_data_size();
5417 // Allocate buffer for section contents and build contents.
5418 this->section_contents_
= new unsigned char[size
];
5421 // Build the contents of a merged EXIDX output section.
5424 Arm_exidx_merged_section::build_contents(
5425 const unsigned char* original_contents
,
5426 section_size_type original_size
)
5428 // Go over spans of input offsets and write only those that are not
5430 section_offset_type in_start
= 0;
5431 section_offset_type out_start
= 0;
5432 section_offset_type in_max
=
5433 convert_types
<section_offset_type
>(original_size
);
5434 section_offset_type out_max
=
5435 convert_types
<section_offset_type
>(this->data_size());
5436 for (Arm_exidx_section_offset_map::const_iterator p
=
5437 this->section_offset_map_
.begin();
5438 p
!= this->section_offset_map_
.end();
5441 section_offset_type in_end
= p
->first
;
5442 gold_assert(in_end
>= in_start
);
5443 section_offset_type out_end
= p
->second
;
5444 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5447 size_t out_chunk_size
=
5448 convert_types
<size_t>(out_end
- out_start
+ 1);
5450 gold_assert(out_chunk_size
== in_chunk_size
5451 && in_end
< in_max
&& out_end
< out_max
);
5453 memcpy(this->section_contents_
+ out_start
,
5454 original_contents
+ in_start
,
5456 out_start
+= out_chunk_size
;
5458 in_start
+= in_chunk_size
;
5462 // Given an input OBJECT, an input section index SHNDX within that
5463 // object, and an OFFSET relative to the start of that input
5464 // section, return whether or not the corresponding offset within
5465 // the output section is known. If this function returns true, it
5466 // sets *POUTPUT to the output offset. The value -1 indicates that
5467 // this input offset is being discarded.
5470 Arm_exidx_merged_section::do_output_offset(
5471 const Relobj
* relobj
,
5473 section_offset_type offset
,
5474 section_offset_type
* poutput
) const
5476 // We only handle offsets for the original EXIDX input section.
5477 if (relobj
!= this->exidx_input_section_
.relobj()
5478 || shndx
!= this->exidx_input_section_
.shndx())
5481 section_offset_type section_size
=
5482 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5483 if (offset
< 0 || offset
>= section_size
)
5484 // Input offset is out of valid range.
5488 // We need to look up the section offset map to determine the output
5489 // offset. Find the reference point in map that is first offset
5490 // bigger than or equal to this offset.
5491 Arm_exidx_section_offset_map::const_iterator p
=
5492 this->section_offset_map_
.lower_bound(offset
);
5494 // The section offset maps are build such that this should not happen if
5495 // input offset is in the valid range.
5496 gold_assert(p
!= this->section_offset_map_
.end());
5498 // We need to check if this is dropped.
5499 section_offset_type ref
= p
->first
;
5500 section_offset_type mapped_ref
= p
->second
;
5502 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5503 // Offset is present in output.
5504 *poutput
= mapped_ref
+ (offset
- ref
);
5506 // Offset is discarded owing to EXIDX entry merging.
5513 // Write this to output file OF.
5516 Arm_exidx_merged_section::do_write(Output_file
* of
)
5518 off_t offset
= this->offset();
5519 const section_size_type oview_size
= this->data_size();
5520 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5522 Output_section
* os
= this->relobj()->output_section(this->shndx());
5523 gold_assert(os
!= NULL
);
5525 memcpy(oview
, this->section_contents_
, oview_size
);
5526 of
->write_output_view(this->offset(), oview_size
, oview
);
5529 // Arm_exidx_fixup methods.
5531 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5532 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5533 // points to the end of the last seen EXIDX section.
5536 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5538 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5539 && this->last_input_section_
!= NULL
)
5541 Relobj
* relobj
= this->last_input_section_
->relobj();
5542 unsigned int text_shndx
= this->last_input_section_
->link();
5543 Arm_exidx_cantunwind
* cantunwind
=
5544 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5545 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5546 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5550 // Process an EXIDX section entry in input. Return whether this entry
5551 // can be deleted in the output. SECOND_WORD in the second word of the
5555 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5558 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5560 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5561 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5562 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5564 else if ((second_word
& 0x80000000) != 0)
5566 // Inlined unwinding data. Merge if equal to previous.
5567 delete_entry
= (merge_exidx_entries_
5568 && this->last_unwind_type_
== UT_INLINED_ENTRY
5569 && this->last_inlined_entry_
== second_word
);
5570 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5571 this->last_inlined_entry_
= second_word
;
5575 // Normal table entry. In theory we could merge these too,
5576 // but duplicate entries are likely to be much less common.
5577 delete_entry
= false;
5578 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5580 return delete_entry
;
5583 // Update the current section offset map during EXIDX section fix-up.
5584 // If there is no map, create one. INPUT_OFFSET is the offset of a
5585 // reference point, DELETED_BYTES is the number of deleted by in the
5586 // section so far. If DELETE_ENTRY is true, the reference point and
5587 // all offsets after the previous reference point are discarded.
5590 Arm_exidx_fixup::update_offset_map(
5591 section_offset_type input_offset
,
5592 section_size_type deleted_bytes
,
5595 if (this->section_offset_map_
== NULL
)
5596 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5597 section_offset_type output_offset
;
5599 output_offset
= Arm_exidx_input_section::invalid_offset
;
5601 output_offset
= input_offset
- deleted_bytes
;
5602 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5605 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5606 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5607 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5608 // If some entries are merged, also store a pointer to a newly created
5609 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5610 // owns the map and is responsible for releasing it after use.
5612 template<bool big_endian
>
5614 Arm_exidx_fixup::process_exidx_section(
5615 const Arm_exidx_input_section
* exidx_input_section
,
5616 const unsigned char* section_contents
,
5617 section_size_type section_size
,
5618 Arm_exidx_section_offset_map
** psection_offset_map
)
5620 Relobj
* relobj
= exidx_input_section
->relobj();
5621 unsigned shndx
= exidx_input_section
->shndx();
5623 if ((section_size
% 8) != 0)
5625 // Something is wrong with this section. Better not touch it.
5626 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5627 relobj
->name().c_str(), shndx
);
5628 this->last_input_section_
= exidx_input_section
;
5629 this->last_unwind_type_
= UT_NONE
;
5633 uint32_t deleted_bytes
= 0;
5634 bool prev_delete_entry
= false;
5635 gold_assert(this->section_offset_map_
== NULL
);
5637 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5639 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5641 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5642 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5644 bool delete_entry
= this->process_exidx_entry(second_word
);
5646 // Entry deletion causes changes in output offsets. We use a std::map
5647 // to record these. And entry (x, y) means input offset x
5648 // is mapped to output offset y. If y is invalid_offset, then x is
5649 // dropped in the output. Because of the way std::map::lower_bound
5650 // works, we record the last offset in a region w.r.t to keeping or
5651 // dropping. If there is no entry (x0, y0) for an input offset x0,
5652 // the output offset y0 of it is determined by the output offset y1 of
5653 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5654 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5656 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5657 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5659 // Update total deleted bytes for this entry.
5663 prev_delete_entry
= delete_entry
;
5666 // If section offset map is not NULL, make an entry for the end of
5668 if (this->section_offset_map_
!= NULL
)
5669 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5671 *psection_offset_map
= this->section_offset_map_
;
5672 this->section_offset_map_
= NULL
;
5673 this->last_input_section_
= exidx_input_section
;
5675 // Set the first output text section so that we can link the EXIDX output
5676 // section to it. Ignore any EXIDX input section that is completely merged.
5677 if (this->first_output_text_section_
== NULL
5678 && deleted_bytes
!= section_size
)
5680 unsigned int link
= exidx_input_section
->link();
5681 Output_section
* os
= relobj
->output_section(link
);
5682 gold_assert(os
!= NULL
);
5683 this->first_output_text_section_
= os
;
5686 return deleted_bytes
;
5689 // Arm_output_section methods.
5691 // Create a stub group for input sections from BEGIN to END. OWNER
5692 // points to the input section to be the owner a new stub table.
5694 template<bool big_endian
>
5696 Arm_output_section
<big_endian
>::create_stub_group(
5697 Input_section_list::const_iterator begin
,
5698 Input_section_list::const_iterator end
,
5699 Input_section_list::const_iterator owner
,
5700 Target_arm
<big_endian
>* target
,
5701 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5704 // We use a different kind of relaxed section in an EXIDX section.
5705 // The static casting from Output_relaxed_input_section to
5706 // Arm_input_section is invalid in an EXIDX section. We are okay
5707 // because we should not be calling this for an EXIDX section.
5708 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5710 // Currently we convert ordinary input sections into relaxed sections only
5711 // at this point but we may want to support creating relaxed input section
5712 // very early. So we check here to see if owner is already a relaxed
5715 Arm_input_section
<big_endian
>* arm_input_section
;
5716 if (owner
->is_relaxed_input_section())
5719 Arm_input_section
<big_endian
>::as_arm_input_section(
5720 owner
->relaxed_input_section());
5724 gold_assert(owner
->is_input_section());
5725 // Create a new relaxed input section. We need to lock the original
5727 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5729 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5730 new_relaxed_sections
->push_back(arm_input_section
);
5733 // Create a stub table.
5734 Stub_table
<big_endian
>* stub_table
=
5735 target
->new_stub_table(arm_input_section
);
5737 arm_input_section
->set_stub_table(stub_table
);
5739 Input_section_list::const_iterator p
= begin
;
5740 Input_section_list::const_iterator prev_p
;
5742 // Look for input sections or relaxed input sections in [begin ... end].
5745 if (p
->is_input_section() || p
->is_relaxed_input_section())
5747 // The stub table information for input sections live
5748 // in their objects.
5749 Arm_relobj
<big_endian
>* arm_relobj
=
5750 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5751 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5755 while (prev_p
!= end
);
5758 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5759 // of stub groups. We grow a stub group by adding input section until the
5760 // size is just below GROUP_SIZE. The last input section will be converted
5761 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5762 // input section after the stub table, effectively double the group size.
5764 // This is similar to the group_sections() function in elf32-arm.c but is
5765 // implemented differently.
5767 template<bool big_endian
>
5769 Arm_output_section
<big_endian
>::group_sections(
5770 section_size_type group_size
,
5771 bool stubs_always_after_branch
,
5772 Target_arm
<big_endian
>* target
,
5775 // States for grouping.
5778 // No group is being built.
5780 // A group is being built but the stub table is not found yet.
5781 // We keep group a stub group until the size is just under GROUP_SIZE.
5782 // The last input section in the group will be used as the stub table.
5783 FINDING_STUB_SECTION
,
5784 // A group is being built and we have already found a stub table.
5785 // We enter this state to grow a stub group by adding input section
5786 // after the stub table. This effectively doubles the group size.
5790 // Any newly created relaxed sections are stored here.
5791 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5793 State state
= NO_GROUP
;
5794 section_size_type off
= 0;
5795 section_size_type group_begin_offset
= 0;
5796 section_size_type group_end_offset
= 0;
5797 section_size_type stub_table_end_offset
= 0;
5798 Input_section_list::const_iterator group_begin
=
5799 this->input_sections().end();
5800 Input_section_list::const_iterator stub_table
=
5801 this->input_sections().end();
5802 Input_section_list::const_iterator group_end
= this->input_sections().end();
5803 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5804 p
!= this->input_sections().end();
5807 section_size_type section_begin_offset
=
5808 align_address(off
, p
->addralign());
5809 section_size_type section_end_offset
=
5810 section_begin_offset
+ p
->data_size();
5812 // Check to see if we should group the previously seen sections.
5818 case FINDING_STUB_SECTION
:
5819 // Adding this section makes the group larger than GROUP_SIZE.
5820 if (section_end_offset
- group_begin_offset
>= group_size
)
5822 if (stubs_always_after_branch
)
5824 gold_assert(group_end
!= this->input_sections().end());
5825 this->create_stub_group(group_begin
, group_end
, group_end
,
5826 target
, &new_relaxed_sections
,
5832 // But wait, there's more! Input sections up to
5833 // stub_group_size bytes after the stub table can be
5834 // handled by it too.
5835 state
= HAS_STUB_SECTION
;
5836 stub_table
= group_end
;
5837 stub_table_end_offset
= group_end_offset
;
5842 case HAS_STUB_SECTION
:
5843 // Adding this section makes the post stub-section group larger
5845 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5847 gold_assert(group_end
!= this->input_sections().end());
5848 this->create_stub_group(group_begin
, group_end
, stub_table
,
5849 target
, &new_relaxed_sections
, task
);
5858 // If we see an input section and currently there is no group, start
5859 // a new one. Skip any empty sections. We look at the data size
5860 // instead of calling p->relobj()->section_size() to avoid locking.
5861 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5862 && (p
->data_size() != 0))
5864 if (state
== NO_GROUP
)
5866 state
= FINDING_STUB_SECTION
;
5868 group_begin_offset
= section_begin_offset
;
5871 // Keep track of the last input section seen.
5873 group_end_offset
= section_end_offset
;
5876 off
= section_end_offset
;
5879 // Create a stub group for any ungrouped sections.
5880 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5882 gold_assert(group_end
!= this->input_sections().end());
5883 this->create_stub_group(group_begin
, group_end
,
5884 (state
== FINDING_STUB_SECTION
5887 target
, &new_relaxed_sections
, task
);
5890 // Convert input section into relaxed input section in a batch.
5891 if (!new_relaxed_sections
.empty())
5892 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5894 // Update the section offsets
5895 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5897 Arm_relobj
<big_endian
>* arm_relobj
=
5898 Arm_relobj
<big_endian
>::as_arm_relobj(
5899 new_relaxed_sections
[i
]->relobj());
5900 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5901 // Tell Arm_relobj that this input section is converted.
5902 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5906 // Append non empty text sections in this to LIST in ascending
5907 // order of their position in this.
5909 template<bool big_endian
>
5911 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5912 Text_section_list
* list
)
5914 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5916 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5917 p
!= this->input_sections().end();
5920 // We only care about plain or relaxed input sections. We also
5921 // ignore any merged sections.
5922 if (p
->is_input_section() || p
->is_relaxed_input_section())
5923 list
->push_back(Text_section_list::value_type(p
->relobj(),
5928 template<bool big_endian
>
5930 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5932 const Text_section_list
& sorted_text_sections
,
5933 Symbol_table
* symtab
,
5934 bool merge_exidx_entries
,
5937 // We should only do this for the EXIDX output section.
5938 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5940 // We don't want the relaxation loop to undo these changes, so we discard
5941 // the current saved states and take another one after the fix-up.
5942 this->discard_states();
5944 // Remove all input sections.
5945 uint64_t address
= this->address();
5946 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5947 Input_section_list input_sections
;
5948 this->reset_address_and_file_offset();
5949 this->get_input_sections(address
, std::string(""), &input_sections
);
5951 if (!this->input_sections().empty())
5952 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5954 // Go through all the known input sections and record them.
5955 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5956 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5957 Section_id_hash
> Text_to_exidx_map
;
5958 Text_to_exidx_map text_to_exidx_map
;
5959 for (Input_section_list::const_iterator p
= input_sections
.begin();
5960 p
!= input_sections
.end();
5963 // This should never happen. At this point, we should only see
5964 // plain EXIDX input sections.
5965 gold_assert(!p
->is_relaxed_input_section());
5966 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5969 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5971 // Go over the sorted text sections.
5972 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5973 Section_id_set processed_input_sections
;
5974 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5975 p
!= sorted_text_sections
.end();
5978 Relobj
* relobj
= p
->first
;
5979 unsigned int shndx
= p
->second
;
5981 Arm_relobj
<big_endian
>* arm_relobj
=
5982 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5983 const Arm_exidx_input_section
* exidx_input_section
=
5984 arm_relobj
->exidx_input_section_by_link(shndx
);
5986 // If this text section has no EXIDX section or if the EXIDX section
5987 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5988 // of the last seen EXIDX section.
5989 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5991 exidx_fixup
.add_exidx_cantunwind_as_needed();
5995 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5996 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5997 Section_id
sid(exidx_relobj
, exidx_shndx
);
5998 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5999 if (iter
== text_to_exidx_map
.end())
6001 // This is odd. We have not seen this EXIDX input section before.
6002 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
6003 // issue a warning instead. We assume the user knows what he
6004 // or she is doing. Otherwise, this is an error.
6005 if (layout
->script_options()->saw_sections_clause())
6006 gold_warning(_("unwinding may not work because EXIDX input section"
6007 " %u of %s is not in EXIDX output section"),
6008 exidx_shndx
, exidx_relobj
->name().c_str());
6010 gold_error(_("unwinding may not work because EXIDX input section"
6011 " %u of %s is not in EXIDX output section"),
6012 exidx_shndx
, exidx_relobj
->name().c_str());
6014 exidx_fixup
.add_exidx_cantunwind_as_needed();
6018 // We need to access the contents of the EXIDX section, lock the
6020 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
6021 section_size_type exidx_size
;
6022 const unsigned char* exidx_contents
=
6023 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
6025 // Fix up coverage and append input section to output data list.
6026 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
6027 uint32_t deleted_bytes
=
6028 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
6031 §ion_offset_map
);
6033 if (deleted_bytes
== exidx_input_section
->size())
6035 // The whole EXIDX section got merged. Remove it from output.
6036 gold_assert(section_offset_map
== NULL
);
6037 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
6039 // All local symbols defined in this input section will be dropped.
6040 // We need to adjust output local symbol count.
6041 arm_relobj
->set_output_local_symbol_count_needs_update();
6043 else if (deleted_bytes
> 0)
6045 // Some entries are merged. We need to convert this EXIDX input
6046 // section into a relaxed section.
6047 gold_assert(section_offset_map
!= NULL
);
6049 Arm_exidx_merged_section
* merged_section
=
6050 new Arm_exidx_merged_section(*exidx_input_section
,
6051 *section_offset_map
, deleted_bytes
);
6052 merged_section
->build_contents(exidx_contents
, exidx_size
);
6054 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
6055 this->add_relaxed_input_section(layout
, merged_section
, secname
);
6056 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
6058 // All local symbols defined in discarded portions of this input
6059 // section will be dropped. We need to adjust output local symbol
6061 arm_relobj
->set_output_local_symbol_count_needs_update();
6065 // Just add back the EXIDX input section.
6066 gold_assert(section_offset_map
== NULL
);
6067 const Output_section::Input_section
* pis
= iter
->second
;
6068 gold_assert(pis
->is_input_section());
6069 this->add_script_input_section(*pis
);
6072 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
6075 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6076 exidx_fixup
.add_exidx_cantunwind_as_needed();
6078 // Remove any known EXIDX input sections that are not processed.
6079 for (Input_section_list::const_iterator p
= input_sections
.begin();
6080 p
!= input_sections
.end();
6083 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
6084 == processed_input_sections
.end())
6086 // We discard a known EXIDX section because its linked
6087 // text section has been folded by ICF. We also discard an
6088 // EXIDX section with error, the output does not matter in this
6089 // case. We do this to avoid triggering asserts.
6090 Arm_relobj
<big_endian
>* arm_relobj
=
6091 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6092 const Arm_exidx_input_section
* exidx_input_section
=
6093 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
6094 gold_assert(exidx_input_section
!= NULL
);
6095 if (!exidx_input_section
->has_errors())
6097 unsigned int text_shndx
= exidx_input_section
->link();
6098 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
6101 // Remove this from link. We also need to recount the
6103 p
->relobj()->set_output_section(p
->shndx(), NULL
);
6104 arm_relobj
->set_output_local_symbol_count_needs_update();
6108 // Link exidx output section to the first seen output section and
6109 // set correct entry size.
6110 this->set_link_section(exidx_fixup
.first_output_text_section());
6111 this->set_entsize(8);
6113 // Make changes permanent.
6114 this->save_states();
6115 this->set_section_offsets_need_adjustment();
6118 // Link EXIDX output sections to text output sections.
6120 template<bool big_endian
>
6122 Arm_output_section
<big_endian
>::set_exidx_section_link()
6124 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
6125 if (!this->input_sections().empty())
6127 Input_section_list::const_iterator p
= this->input_sections().begin();
6128 Arm_relobj
<big_endian
>* arm_relobj
=
6129 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6130 unsigned exidx_shndx
= p
->shndx();
6131 const Arm_exidx_input_section
* exidx_input_section
=
6132 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
6133 gold_assert(exidx_input_section
!= NULL
);
6134 unsigned int text_shndx
= exidx_input_section
->link();
6135 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
6136 this->set_link_section(os
);
6140 // Arm_relobj methods.
6142 // Determine if an input section is scannable for stub processing. SHDR is
6143 // the header of the section and SHNDX is the section index. OS is the output
6144 // section for the input section and SYMTAB is the global symbol table used to
6145 // look up ICF information.
6147 template<bool big_endian
>
6149 Arm_relobj
<big_endian
>::section_is_scannable(
6150 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6152 const Output_section
* os
,
6153 const Symbol_table
* symtab
)
6155 // Skip any empty sections, unallocated sections or sections whose
6156 // type are not SHT_PROGBITS.
6157 if (shdr
.get_sh_size() == 0
6158 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6159 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6162 // Skip any discarded or ICF'ed sections.
6163 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6166 // If this requires special offset handling, check to see if it is
6167 // a relaxed section. If this is not, then it is a merged section that
6168 // we cannot handle.
6169 if (this->is_output_section_offset_invalid(shndx
))
6171 const Output_relaxed_input_section
* poris
=
6172 os
->find_relaxed_input_section(this, shndx
);
6180 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6181 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6183 template<bool big_endian
>
6185 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6186 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6187 const Relobj::Output_sections
& out_sections
,
6188 const Symbol_table
* symtab
,
6189 const unsigned char* pshdrs
)
6191 unsigned int sh_type
= shdr
.get_sh_type();
6192 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6195 // Ignore empty section.
6196 off_t sh_size
= shdr
.get_sh_size();
6200 // Ignore reloc section with unexpected symbol table. The
6201 // error will be reported in the final link.
6202 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6205 unsigned int reloc_size
;
6206 if (sh_type
== elfcpp::SHT_REL
)
6207 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6209 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6211 // Ignore reloc section with unexpected entsize or uneven size.
6212 // The error will be reported in the final link.
6213 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6216 // Ignore reloc section with bad info. This error will be
6217 // reported in the final link.
6218 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6219 if (index
>= this->shnum())
6222 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6223 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6224 return this->section_is_scannable(text_shdr
, index
,
6225 out_sections
[index
], symtab
);
6228 // Return the output address of either a plain input section or a relaxed
6229 // input section. SHNDX is the section index. We define and use this
6230 // instead of calling Output_section::output_address because that is slow
6231 // for large output.
6233 template<bool big_endian
>
6235 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6239 if (this->is_output_section_offset_invalid(shndx
))
6241 const Output_relaxed_input_section
* poris
=
6242 os
->find_relaxed_input_section(this, shndx
);
6243 // We do not handle merged sections here.
6244 gold_assert(poris
!= NULL
);
6245 return poris
->address();
6248 return os
->address() + this->get_output_section_offset(shndx
);
6251 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6252 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6254 template<bool big_endian
>
6256 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6257 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6260 const Symbol_table
* symtab
)
6262 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6265 // If the section does not cross any 4K-boundaries, it does not need to
6267 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6268 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6274 // Scan a section for Cortex-A8 workaround.
6276 template<bool big_endian
>
6278 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6279 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6282 Target_arm
<big_endian
>* arm_target
)
6284 // Look for the first mapping symbol in this section. It should be
6286 Mapping_symbol_position
section_start(shndx
, 0);
6287 typename
Mapping_symbols_info::const_iterator p
=
6288 this->mapping_symbols_info_
.lower_bound(section_start
);
6290 // There are no mapping symbols for this section. Treat it as a data-only
6292 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6295 Arm_address output_address
=
6296 this->simple_input_section_output_address(shndx
, os
);
6298 // Get the section contents.
6299 section_size_type input_view_size
= 0;
6300 const unsigned char* input_view
=
6301 this->section_contents(shndx
, &input_view_size
, false);
6303 // We need to go through the mapping symbols to determine what to
6304 // scan. There are two reasons. First, we should look at THUMB code and
6305 // THUMB code only. Second, we only want to look at the 4K-page boundary
6306 // to speed up the scanning.
6308 while (p
!= this->mapping_symbols_info_
.end()
6309 && p
->first
.first
== shndx
)
6311 typename
Mapping_symbols_info::const_iterator next
=
6312 this->mapping_symbols_info_
.upper_bound(p
->first
);
6314 // Only scan part of a section with THUMB code.
6315 if (p
->second
== 't')
6317 // Determine the end of this range.
6318 section_size_type span_start
=
6319 convert_to_section_size_type(p
->first
.second
);
6320 section_size_type span_end
;
6321 if (next
!= this->mapping_symbols_info_
.end()
6322 && next
->first
.first
== shndx
)
6323 span_end
= convert_to_section_size_type(next
->first
.second
);
6325 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6327 if (((span_start
+ output_address
) & ~0xfffUL
)
6328 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6330 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6331 span_start
, span_end
,
6341 // Scan relocations for stub generation.
6343 template<bool big_endian
>
6345 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6346 Target_arm
<big_endian
>* arm_target
,
6347 const Symbol_table
* symtab
,
6348 const Layout
* layout
)
6350 unsigned int shnum
= this->shnum();
6351 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6353 // Read the section headers.
6354 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6358 // To speed up processing, we set up hash tables for fast lookup of
6359 // input offsets to output addresses.
6360 this->initialize_input_to_output_maps();
6362 const Relobj::Output_sections
& out_sections(this->output_sections());
6364 Relocate_info
<32, big_endian
> relinfo
;
6365 relinfo
.symtab
= symtab
;
6366 relinfo
.layout
= layout
;
6367 relinfo
.object
= this;
6369 // Do relocation stubs scanning.
6370 const unsigned char* p
= pshdrs
+ shdr_size
;
6371 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6373 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6374 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6377 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6378 Arm_address output_offset
= this->get_output_section_offset(index
);
6379 Arm_address output_address
;
6380 if (output_offset
!= invalid_address
)
6381 output_address
= out_sections
[index
]->address() + output_offset
;
6384 // Currently this only happens for a relaxed section.
6385 const Output_relaxed_input_section
* poris
=
6386 out_sections
[index
]->find_relaxed_input_section(this, index
);
6387 gold_assert(poris
!= NULL
);
6388 output_address
= poris
->address();
6391 // Get the relocations.
6392 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6396 // Get the section contents. This does work for the case in which
6397 // we modify the contents of an input section. We need to pass the
6398 // output view under such circumstances.
6399 section_size_type input_view_size
= 0;
6400 const unsigned char* input_view
=
6401 this->section_contents(index
, &input_view_size
, false);
6403 relinfo
.reloc_shndx
= i
;
6404 relinfo
.data_shndx
= index
;
6405 unsigned int sh_type
= shdr
.get_sh_type();
6406 unsigned int reloc_size
;
6407 if (sh_type
== elfcpp::SHT_REL
)
6408 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6410 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6412 Output_section
* os
= out_sections
[index
];
6413 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6414 shdr
.get_sh_size() / reloc_size
,
6416 output_offset
== invalid_address
,
6417 input_view
, output_address
,
6422 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6423 // after its relocation section, if there is one, is processed for
6424 // relocation stubs. Merging this loop with the one above would have been
6425 // complicated since we would have had to make sure that relocation stub
6426 // scanning is done first.
6427 if (arm_target
->fix_cortex_a8())
6429 const unsigned char* p
= pshdrs
+ shdr_size
;
6430 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6432 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6433 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6436 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6441 // After we've done the relocations, we release the hash tables,
6442 // since we no longer need them.
6443 this->free_input_to_output_maps();
6446 // Count the local symbols. The ARM backend needs to know if a symbol
6447 // is a THUMB function or not. For global symbols, it is easy because
6448 // the Symbol object keeps the ELF symbol type. For local symbol it is
6449 // harder because we cannot access this information. So we override the
6450 // do_count_local_symbol in parent and scan local symbols to mark
6451 // THUMB functions. This is not the most efficient way but I do not want to
6452 // slow down other ports by calling a per symbol target hook inside
6453 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6455 template<bool big_endian
>
6457 Arm_relobj
<big_endian
>::do_count_local_symbols(
6458 Stringpool_template
<char>* pool
,
6459 Stringpool_template
<char>* dynpool
)
6461 // We need to fix-up the values of any local symbols whose type are
6464 // Ask parent to count the local symbols.
6465 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6466 const unsigned int loccount
= this->local_symbol_count();
6470 // Initialize the thumb function bit-vector.
6471 std::vector
<bool> empty_vector(loccount
, false);
6472 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6474 // Read the symbol table section header.
6475 const unsigned int symtab_shndx
= this->symtab_shndx();
6476 elfcpp::Shdr
<32, big_endian
>
6477 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6478 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6480 // Read the local symbols.
6481 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6482 gold_assert(loccount
== symtabshdr
.get_sh_info());
6483 off_t locsize
= loccount
* sym_size
;
6484 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6485 locsize
, true, true);
6487 // For mapping symbol processing, we need to read the symbol names.
6488 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6489 if (strtab_shndx
>= this->shnum())
6491 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6495 elfcpp::Shdr
<32, big_endian
>
6496 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6497 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6499 this->error(_("symbol table name section has wrong type: %u"),
6500 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6503 const char* pnames
=
6504 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6505 strtabshdr
.get_sh_size(),
6508 // Loop over the local symbols and mark any local symbols pointing
6509 // to THUMB functions.
6511 // Skip the first dummy symbol.
6513 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6514 this->local_values();
6515 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6517 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6518 elfcpp::STT st_type
= sym
.get_st_type();
6519 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6520 Arm_address input_value
= lv
.input_value();
6522 // Check to see if this is a mapping symbol.
6523 const char* sym_name
= pnames
+ sym
.get_st_name();
6524 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6527 unsigned int input_shndx
=
6528 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6529 gold_assert(is_ordinary
);
6531 // Strip of LSB in case this is a THUMB symbol.
6532 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6533 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6536 if (st_type
== elfcpp::STT_ARM_TFUNC
6537 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6539 // This is a THUMB function. Mark this and canonicalize the
6540 // symbol value by setting LSB.
6541 this->local_symbol_is_thumb_function_
[i
] = true;
6542 if ((input_value
& 1) == 0)
6543 lv
.set_input_value(input_value
| 1);
6548 // Relocate sections.
6549 template<bool big_endian
>
6551 Arm_relobj
<big_endian
>::do_relocate_sections(
6552 const Symbol_table
* symtab
,
6553 const Layout
* layout
,
6554 const unsigned char* pshdrs
,
6556 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6558 // Call parent to relocate sections.
6559 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6560 pshdrs
, of
, pviews
);
6562 // We do not generate stubs if doing a relocatable link.
6563 if (parameters
->options().relocatable())
6566 // Relocate stub tables.
6567 unsigned int shnum
= this->shnum();
6569 Target_arm
<big_endian
>* arm_target
=
6570 Target_arm
<big_endian
>::default_target();
6572 Relocate_info
<32, big_endian
> relinfo
;
6573 relinfo
.symtab
= symtab
;
6574 relinfo
.layout
= layout
;
6575 relinfo
.object
= this;
6577 for (unsigned int i
= 1; i
< shnum
; ++i
)
6579 Arm_input_section
<big_endian
>* arm_input_section
=
6580 arm_target
->find_arm_input_section(this, i
);
6582 if (arm_input_section
!= NULL
6583 && arm_input_section
->is_stub_table_owner()
6584 && !arm_input_section
->stub_table()->empty())
6586 // We cannot discard a section if it owns a stub table.
6587 Output_section
* os
= this->output_section(i
);
6588 gold_assert(os
!= NULL
);
6590 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6591 relinfo
.reloc_shdr
= NULL
;
6592 relinfo
.data_shndx
= i
;
6593 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6595 gold_assert((*pviews
)[i
].view
!= NULL
);
6597 // We are passed the output section view. Adjust it to cover the
6599 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6600 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6601 && ((stub_table
->address() + stub_table
->data_size())
6602 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6604 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6605 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6606 Arm_address address
= stub_table
->address();
6607 section_size_type view_size
= stub_table
->data_size();
6609 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6613 // Apply Cortex A8 workaround if applicable.
6614 if (this->section_has_cortex_a8_workaround(i
))
6616 unsigned char* view
= (*pviews
)[i
].view
;
6617 Arm_address view_address
= (*pviews
)[i
].address
;
6618 section_size_type view_size
= (*pviews
)[i
].view_size
;
6619 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6621 // Adjust view to cover section.
6622 Output_section
* os
= this->output_section(i
);
6623 gold_assert(os
!= NULL
);
6624 Arm_address section_address
=
6625 this->simple_input_section_output_address(i
, os
);
6626 uint64_t section_size
= this->section_size(i
);
6628 gold_assert(section_address
>= view_address
6629 && ((section_address
+ section_size
)
6630 <= (view_address
+ view_size
)));
6632 unsigned char* section_view
= view
+ (section_address
- view_address
);
6634 // Apply the Cortex-A8 workaround to the output address range
6635 // corresponding to this input section.
6636 stub_table
->apply_cortex_a8_workaround_to_address_range(
6643 if (parameters
->options().be8())
6645 section_size_type span_start
, span_end
;
6646 elfcpp::Shdr
<32, big_endian
>
6647 shdr(pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
);
6648 Mapping_symbol_position
section_start(i
, 0);
6649 typename
Mapping_symbols_info::const_iterator p
=
6650 this->mapping_symbols_info_
.lower_bound(section_start
);
6651 unsigned char* view
= (*pviews
)[i
].view
;
6652 Arm_address view_address
= (*pviews
)[i
].address
;
6653 section_size_type view_size
= (*pviews
)[i
].view_size
;
6654 while (p
!= this->mapping_symbols_info_
.end()
6655 && p
->first
.first
== i
)
6657 typename
Mapping_symbols_info::const_iterator next
=
6658 this->mapping_symbols_info_
.upper_bound(p
->first
);
6660 // Only swap arm or thumb code.
6661 if ((p
->second
== 'a') || (p
->second
== 't'))
6663 Output_section
* os
= this->output_section(i
);
6664 gold_assert(os
!= NULL
);
6665 Arm_address section_address
=
6666 this->simple_input_section_output_address(i
, os
);
6667 span_start
= convert_to_section_size_type(p
->first
.second
);
6668 if (next
!= this->mapping_symbols_info_
.end()
6669 && next
->first
.first
== i
)
6671 convert_to_section_size_type(next
->first
.second
);
6674 convert_to_section_size_type(shdr
.get_sh_size());
6675 unsigned char* section_view
=
6676 view
+ (section_address
- view_address
);
6677 uint64_t section_size
= this->section_size(i
);
6679 gold_assert(section_address
>= view_address
6680 && ((section_address
+ section_size
)
6681 <= (view_address
+ view_size
)));
6683 // Set Output view for swapping
6684 unsigned char *oview
= section_view
+ span_start
;
6685 unsigned int index
= 0;
6686 if (p
->second
== 'a')
6688 while (index
+ 3 < (span_end
- span_start
))
6690 typedef typename
elfcpp::Swap
<32, big_endian
>
6693 reinterpret_cast<Valtype
*>(oview
+index
);
6694 uint32_t val
= elfcpp::Swap
<32, false>::readval(wv
);
6695 elfcpp::Swap
<32, true>::writeval(wv
, val
);
6699 else if (p
->second
== 't')
6701 while (index
+ 1 < (span_end
- span_start
))
6703 typedef typename
elfcpp::Swap
<16, big_endian
>
6706 reinterpret_cast<Valtype
*>(oview
+index
);
6707 uint16_t val
= elfcpp::Swap
<16, false>::readval(wv
);
6708 elfcpp::Swap
<16, true>::writeval(wv
, val
);
6719 // Find the linked text section of an EXIDX section by looking at the first
6720 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6721 // must be linked to its associated code section via the sh_link field of
6722 // its section header. However, some tools are broken and the link is not
6723 // always set. LD just drops such an EXIDX section silently, causing the
6724 // associated code not unwindabled. Here we try a little bit harder to
6725 // discover the linked code section.
6727 // PSHDR points to the section header of a relocation section of an EXIDX
6728 // section. If we can find a linked text section, return true and
6729 // store the text section index in the location PSHNDX. Otherwise
6732 template<bool big_endian
>
6734 Arm_relobj
<big_endian
>::find_linked_text_section(
6735 const unsigned char* pshdr
,
6736 const unsigned char* psyms
,
6737 unsigned int* pshndx
)
6739 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6741 // If there is no relocation, we cannot find the linked text section.
6743 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6744 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6746 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6747 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6749 // Get the relocations.
6750 const unsigned char* prelocs
=
6751 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6753 // Find the REL31 relocation for the first word of the first EXIDX entry.
6754 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6756 Arm_address r_offset
;
6757 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6758 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6760 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6761 r_info
= reloc
.get_r_info();
6762 r_offset
= reloc
.get_r_offset();
6766 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6767 r_info
= reloc
.get_r_info();
6768 r_offset
= reloc
.get_r_offset();
6771 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6772 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6775 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6777 || r_sym
>= this->local_symbol_count()
6781 // This is the relocation for the first word of the first EXIDX entry.
6782 // We expect to see a local section symbol.
6783 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6784 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6785 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6789 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6790 gold_assert(is_ordinary
);
6800 // Make an EXIDX input section object for an EXIDX section whose index is
6801 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6802 // is the section index of the linked text section.
6804 template<bool big_endian
>
6806 Arm_relobj
<big_endian
>::make_exidx_input_section(
6808 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6809 unsigned int text_shndx
,
6810 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6812 // Create an Arm_exidx_input_section object for this EXIDX section.
6813 Arm_exidx_input_section
* exidx_input_section
=
6814 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6815 shdr
.get_sh_addralign(),
6816 text_shdr
.get_sh_size());
6818 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6819 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6821 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6823 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6824 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6825 this->name().c_str());
6826 exidx_input_section
->set_has_errors();
6828 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6830 unsigned other_exidx_shndx
=
6831 this->exidx_section_map_
[text_shndx
]->shndx();
6832 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6834 this->section_name(shndx
).c_str(), shndx
,
6835 this->section_name(other_exidx_shndx
).c_str(),
6836 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6837 text_shndx
, this->name().c_str());
6838 exidx_input_section
->set_has_errors();
6841 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6843 // Check section flags of text section.
6844 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6846 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6848 this->section_name(shndx
).c_str(), shndx
,
6849 this->section_name(text_shndx
).c_str(), text_shndx
,
6850 this->name().c_str());
6851 exidx_input_section
->set_has_errors();
6853 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6854 // I would like to make this an error but currently ld just ignores
6856 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6858 this->section_name(shndx
).c_str(), shndx
,
6859 this->section_name(text_shndx
).c_str(), text_shndx
,
6860 this->name().c_str());
6863 // Read the symbol information.
6865 template<bool big_endian
>
6867 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6869 // Call parent class to read symbol information.
6870 this->base_read_symbols(sd
);
6872 // If this input file is a binary file, it has no processor
6873 // specific flags and attributes section.
6874 Input_file::Format format
= this->input_file()->format();
6875 if (format
!= Input_file::FORMAT_ELF
)
6877 gold_assert(format
== Input_file::FORMAT_BINARY
);
6878 this->merge_flags_and_attributes_
= false;
6882 // Read processor-specific flags in ELF file header.
6883 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6884 elfcpp::Elf_sizes
<32>::ehdr_size
,
6886 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6887 this->processor_specific_flags_
= ehdr
.get_e_flags();
6889 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6891 std::vector
<unsigned int> deferred_exidx_sections
;
6892 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6893 const unsigned char* pshdrs
= sd
->section_headers
->data();
6894 const unsigned char* ps
= pshdrs
+ shdr_size
;
6895 bool must_merge_flags_and_attributes
= false;
6896 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6898 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6900 // Sometimes an object has no contents except the section name string
6901 // table and an empty symbol table with the undefined symbol. We
6902 // don't want to merge processor-specific flags from such an object.
6903 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6905 // Symbol table is not empty.
6906 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6907 elfcpp::Elf_sizes
<32>::sym_size
;
6908 if (shdr
.get_sh_size() > sym_size
)
6909 must_merge_flags_and_attributes
= true;
6911 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6912 // If this is neither an empty symbol table nor a string table,
6914 must_merge_flags_and_attributes
= true;
6916 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6918 gold_assert(this->attributes_section_data_
== NULL
);
6919 section_offset_type section_offset
= shdr
.get_sh_offset();
6920 section_size_type section_size
=
6921 convert_to_section_size_type(shdr
.get_sh_size());
6922 const unsigned char* view
=
6923 this->get_view(section_offset
, section_size
, true, false);
6924 this->attributes_section_data_
=
6925 new Attributes_section_data(view
, section_size
);
6927 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6929 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6930 if (text_shndx
== elfcpp::SHN_UNDEF
)
6931 deferred_exidx_sections
.push_back(i
);
6934 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6935 + text_shndx
* shdr_size
);
6936 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6938 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6939 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6940 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6941 this->section_name(i
).c_str(), this->name().c_str());
6946 if (!must_merge_flags_and_attributes
)
6948 gold_assert(deferred_exidx_sections
.empty());
6949 this->merge_flags_and_attributes_
= false;
6953 // Some tools are broken and they do not set the link of EXIDX sections.
6954 // We look at the first relocation to figure out the linked sections.
6955 if (!deferred_exidx_sections
.empty())
6957 // We need to go over the section headers again to find the mapping
6958 // from sections being relocated to their relocation sections. This is
6959 // a bit inefficient as we could do that in the loop above. However,
6960 // we do not expect any deferred EXIDX sections normally. So we do not
6961 // want to slow down the most common path.
6962 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6963 Reloc_map reloc_map
;
6964 ps
= pshdrs
+ shdr_size
;
6965 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6967 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6968 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6969 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6971 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6972 if (info_shndx
>= this->shnum())
6973 gold_error(_("relocation section %u has invalid info %u"),
6975 Reloc_map::value_type
value(info_shndx
, i
);
6976 std::pair
<Reloc_map::iterator
, bool> result
=
6977 reloc_map
.insert(value
);
6979 gold_error(_("section %u has multiple relocation sections "
6981 info_shndx
, i
, reloc_map
[info_shndx
]);
6985 // Read the symbol table section header.
6986 const unsigned int symtab_shndx
= this->symtab_shndx();
6987 elfcpp::Shdr
<32, big_endian
>
6988 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6989 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6991 // Read the local symbols.
6992 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6993 const unsigned int loccount
= this->local_symbol_count();
6994 gold_assert(loccount
== symtabshdr
.get_sh_info());
6995 off_t locsize
= loccount
* sym_size
;
6996 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6997 locsize
, true, true);
6999 // Process the deferred EXIDX sections.
7000 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
7002 unsigned int shndx
= deferred_exidx_sections
[i
];
7003 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
7004 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
7005 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
7006 if (it
!= reloc_map
.end())
7007 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
7008 psyms
, &text_shndx
);
7009 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
7010 + text_shndx
* shdr_size
);
7011 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
7016 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
7017 // sections for unwinding. These sections are referenced implicitly by
7018 // text sections linked in the section headers. If we ignore these implicit
7019 // references, the .ARM.exidx sections and any .ARM.extab sections they use
7020 // will be garbage-collected incorrectly. Hence we override the same function
7021 // in the base class to handle these implicit references.
7023 template<bool big_endian
>
7025 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
7027 Read_relocs_data
* rd
)
7029 // First, call base class method to process relocations in this object.
7030 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
7032 // If --gc-sections is not specified, there is nothing more to do.
7033 // This happens when --icf is used but --gc-sections is not.
7034 if (!parameters
->options().gc_sections())
7037 unsigned int shnum
= this->shnum();
7038 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
7039 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
7043 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
7044 // to these from the linked text sections.
7045 const unsigned char* ps
= pshdrs
+ shdr_size
;
7046 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
7048 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7049 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
7051 // Found an .ARM.exidx section, add it to the set of reachable
7052 // sections from its linked text section.
7053 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
7054 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
7059 // Update output local symbol count. Owing to EXIDX entry merging, some local
7060 // symbols will be removed in output. Adjust output local symbol count
7061 // accordingly. We can only changed the static output local symbol count. It
7062 // is too late to change the dynamic symbols.
7064 template<bool big_endian
>
7066 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
7068 // Caller should check that this needs updating. We want caller checking
7069 // because output_local_symbol_count_needs_update() is most likely inlined.
7070 gold_assert(this->output_local_symbol_count_needs_update_
);
7072 gold_assert(this->symtab_shndx() != -1U);
7073 if (this->symtab_shndx() == 0)
7075 // This object has no symbols. Weird but legal.
7079 // Read the symbol table section header.
7080 const unsigned int symtab_shndx
= this->symtab_shndx();
7081 elfcpp::Shdr
<32, big_endian
>
7082 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
7083 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
7085 // Read the local symbols.
7086 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
7087 const unsigned int loccount
= this->local_symbol_count();
7088 gold_assert(loccount
== symtabshdr
.get_sh_info());
7089 off_t locsize
= loccount
* sym_size
;
7090 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
7091 locsize
, true, true);
7093 // Loop over the local symbols.
7095 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
7097 const Output_sections
& out_sections(this->output_sections());
7098 unsigned int shnum
= this->shnum();
7099 unsigned int count
= 0;
7100 // Skip the first, dummy, symbol.
7102 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
7104 elfcpp::Sym
<32, big_endian
> sym(psyms
);
7106 Symbol_value
<32>& lv((*this->local_values())[i
]);
7108 // This local symbol was already discarded by do_count_local_symbols.
7109 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
7113 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
7118 Output_section
* os
= out_sections
[shndx
];
7120 // This local symbol no longer has an output section. Discard it.
7123 lv
.set_no_output_symtab_entry();
7127 // Currently we only discard parts of EXIDX input sections.
7128 // We explicitly check for a merged EXIDX input section to avoid
7129 // calling Output_section_data::output_offset unless necessary.
7130 if ((this->get_output_section_offset(shndx
) == invalid_address
)
7131 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
7133 section_offset_type output_offset
=
7134 os
->output_offset(this, shndx
, lv
.input_value());
7135 if (output_offset
== -1)
7137 // This symbol is defined in a part of an EXIDX input section
7138 // that is discarded due to entry merging.
7139 lv
.set_no_output_symtab_entry();
7148 this->set_output_local_symbol_count(count
);
7149 this->output_local_symbol_count_needs_update_
= false;
7152 // Arm_dynobj methods.
7154 // Read the symbol information.
7156 template<bool big_endian
>
7158 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
7160 // Call parent class to read symbol information.
7161 this->base_read_symbols(sd
);
7163 // Read processor-specific flags in ELF file header.
7164 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
7165 elfcpp::Elf_sizes
<32>::ehdr_size
,
7167 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
7168 this->processor_specific_flags_
= ehdr
.get_e_flags();
7170 // Read the attributes section if there is one.
7171 // We read from the end because gas seems to put it near the end of
7172 // the section headers.
7173 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
7174 const unsigned char* ps
=
7175 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
7176 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
7178 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7179 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
7181 section_offset_type section_offset
= shdr
.get_sh_offset();
7182 section_size_type section_size
=
7183 convert_to_section_size_type(shdr
.get_sh_size());
7184 const unsigned char* view
=
7185 this->get_view(section_offset
, section_size
, true, false);
7186 this->attributes_section_data_
=
7187 new Attributes_section_data(view
, section_size
);
7193 // Stub_addend_reader methods.
7195 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7197 template<bool big_endian
>
7198 elfcpp::Elf_types
<32>::Elf_Swxword
7199 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
7200 unsigned int r_type
,
7201 const unsigned char* view
,
7202 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
7204 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
7208 case elfcpp::R_ARM_CALL
:
7209 case elfcpp::R_ARM_JUMP24
:
7210 case elfcpp::R_ARM_PLT32
:
7212 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7213 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7214 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7215 return Bits
<26>::sign_extend32(val
<< 2);
7218 case elfcpp::R_ARM_THM_CALL
:
7219 case elfcpp::R_ARM_THM_JUMP24
:
7220 case elfcpp::R_ARM_THM_XPC22
:
7222 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7223 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7224 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7225 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7226 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7229 case elfcpp::R_ARM_THM_JUMP19
:
7231 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7232 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7233 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7234 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7235 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7243 // Arm_output_data_got methods.
7245 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7246 // The first one is initialized to be 1, which is the module index for
7247 // the main executable and the second one 0. A reloc of the type
7248 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7249 // be applied by gold. GSYM is a global symbol.
7251 template<bool big_endian
>
7253 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7254 unsigned int got_type
,
7257 if (gsym
->has_got_offset(got_type
))
7260 // We are doing a static link. Just mark it as belong to module 1,
7262 unsigned int got_offset
= this->add_constant(1);
7263 gsym
->set_got_offset(got_type
, got_offset
);
7264 got_offset
= this->add_constant(0);
7265 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7266 elfcpp::R_ARM_TLS_DTPOFF32
,
7270 // Same as the above but for a local symbol.
7272 template<bool big_endian
>
7274 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7275 unsigned int got_type
,
7276 Sized_relobj_file
<32, big_endian
>* object
,
7279 if (object
->local_has_got_offset(index
, got_type
))
7282 // We are doing a static link. Just mark it as belong to module 1,
7284 unsigned int got_offset
= this->add_constant(1);
7285 object
->set_local_got_offset(index
, got_type
, got_offset
);
7286 got_offset
= this->add_constant(0);
7287 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7288 elfcpp::R_ARM_TLS_DTPOFF32
,
7292 template<bool big_endian
>
7294 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7296 // Call parent to write out GOT.
7297 Output_data_got
<32, big_endian
>::do_write(of
);
7299 // We are done if there is no fix up.
7300 if (this->static_relocs_
.empty())
7303 gold_assert(parameters
->doing_static_link());
7305 const off_t offset
= this->offset();
7306 const section_size_type oview_size
=
7307 convert_to_section_size_type(this->data_size());
7308 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7310 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7311 gold_assert(tls_segment
!= NULL
);
7313 // The thread pointer $tp points to the TCB, which is followed by the
7314 // TLS. So we need to adjust $tp relative addressing by this amount.
7315 Arm_address aligned_tcb_size
=
7316 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7318 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7320 Static_reloc
& reloc(this->static_relocs_
[i
]);
7323 if (!reloc
.symbol_is_global())
7325 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7326 const Symbol_value
<32>* psymval
=
7327 reloc
.relobj()->local_symbol(reloc
.index());
7329 // We are doing static linking. Issue an error and skip this
7330 // relocation if the symbol is undefined or in a discarded_section.
7332 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7333 if ((shndx
== elfcpp::SHN_UNDEF
)
7335 && shndx
!= elfcpp::SHN_UNDEF
7336 && !object
->is_section_included(shndx
)
7337 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7339 gold_error(_("undefined or discarded local symbol %u from "
7340 " object %s in GOT"),
7341 reloc
.index(), reloc
.relobj()->name().c_str());
7345 value
= psymval
->value(object
, 0);
7349 const Symbol
* gsym
= reloc
.symbol();
7350 gold_assert(gsym
!= NULL
);
7351 if (gsym
->is_forwarder())
7352 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7354 // We are doing static linking. Issue an error and skip this
7355 // relocation if the symbol is undefined or in a discarded_section
7356 // unless it is a weakly_undefined symbol.
7357 if ((gsym
->is_defined_in_discarded_section()
7358 || gsym
->is_undefined())
7359 && !gsym
->is_weak_undefined())
7361 gold_error(_("undefined or discarded symbol %s in GOT"),
7366 if (!gsym
->is_weak_undefined())
7368 const Sized_symbol
<32>* sym
=
7369 static_cast<const Sized_symbol
<32>*>(gsym
);
7370 value
= sym
->value();
7376 unsigned got_offset
= reloc
.got_offset();
7377 gold_assert(got_offset
< oview_size
);
7379 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7380 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7382 switch (reloc
.r_type())
7384 case elfcpp::R_ARM_TLS_DTPOFF32
:
7387 case elfcpp::R_ARM_TLS_TPOFF32
:
7388 x
= value
+ aligned_tcb_size
;
7393 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7396 of
->write_output_view(offset
, oview_size
, oview
);
7399 // A class to handle the PLT data.
7400 // This is an abstract base class that handles most of the linker details
7401 // but does not know the actual contents of PLT entries. The derived
7402 // classes below fill in those details.
7404 template<bool big_endian
>
7405 class Output_data_plt_arm
: public Output_section_data
7408 // Unlike aarch64, which records symbol value in "addend" field of relocations
7409 // and could be done at the same time an IRelative reloc is created for the
7410 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7411 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7412 // to keep necessary symbol information for later use in do_write. We usually
7413 // have only a very limited number of ifuncs, so the extra data required here
7416 struct IRelative_data
7418 IRelative_data(Sized_symbol
<32>* sized_symbol
)
7419 : symbol_is_global_(true)
7421 u_
.global
= sized_symbol
;
7424 IRelative_data(Sized_relobj_file
<32, big_endian
>* relobj
,
7426 : symbol_is_global_(false)
7428 u_
.local
.relobj
= relobj
;
7429 u_
.local
.index
= index
;
7434 Sized_symbol
<32>* global
;
7438 Sized_relobj_file
<32, big_endian
>* relobj
;
7443 bool symbol_is_global_
;
7446 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7449 Output_data_plt_arm(Layout
* layout
, uint64_t addralign
,
7450 Arm_output_data_got
<big_endian
>* got
,
7451 Output_data_space
* got_plt
,
7452 Output_data_space
* got_irelative
);
7454 // Add an entry to the PLT.
7456 add_entry(Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
);
7458 // Add the relocation for a plt entry.
7460 add_relocation(Symbol_table
* symtab
, Layout
* layout
,
7461 Symbol
* gsym
, unsigned int got_offset
);
7463 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7465 add_local_ifunc_entry(Symbol_table
* symtab
, Layout
*,
7466 Sized_relobj_file
<32, big_endian
>* relobj
,
7467 unsigned int local_sym_index
);
7469 // Return the .rel.plt section data.
7470 const Reloc_section
*
7472 { return this->rel_
; }
7474 // Return the PLT relocation container for IRELATIVE.
7476 rel_irelative(Symbol_table
*, Layout
*);
7478 // Return the number of PLT entries.
7481 { return this->count_
+ this->irelative_count_
; }
7483 // Return the offset of the first non-reserved PLT entry.
7485 first_plt_entry_offset() const
7486 { return this->do_first_plt_entry_offset(); }
7488 // Return the size of a PLT entry.
7490 get_plt_entry_size() const
7491 { return this->do_get_plt_entry_size(); }
7493 // Return the PLT address for globals.
7495 address_for_global(const Symbol
*) const;
7497 // Return the PLT address for locals.
7499 address_for_local(const Relobj
*, unsigned int symndx
) const;
7502 // Fill in the first PLT entry.
7504 fill_first_plt_entry(unsigned char* pov
,
7505 Arm_address got_address
,
7506 Arm_address plt_address
)
7507 { this->do_fill_first_plt_entry(pov
, got_address
, plt_address
); }
7510 fill_plt_entry(unsigned char* pov
,
7511 Arm_address got_address
,
7512 Arm_address plt_address
,
7513 unsigned int got_offset
,
7514 unsigned int plt_offset
)
7515 { do_fill_plt_entry(pov
, got_address
, plt_address
, got_offset
, plt_offset
); }
7517 virtual unsigned int
7518 do_first_plt_entry_offset() const = 0;
7520 virtual unsigned int
7521 do_get_plt_entry_size() const = 0;
7524 do_fill_first_plt_entry(unsigned char* pov
,
7525 Arm_address got_address
,
7526 Arm_address plt_address
) = 0;
7529 do_fill_plt_entry(unsigned char* pov
,
7530 Arm_address got_address
,
7531 Arm_address plt_address
,
7532 unsigned int got_offset
,
7533 unsigned int plt_offset
) = 0;
7536 do_adjust_output_section(Output_section
* os
);
7538 // Write to a map file.
7540 do_print_to_mapfile(Mapfile
* mapfile
) const
7541 { mapfile
->print_output_data(this, _("** PLT")); }
7544 // Set the final size.
7546 set_final_data_size()
7548 this->set_data_size(this->first_plt_entry_offset()
7549 + ((this->count_
+ this->irelative_count_
)
7550 * this->get_plt_entry_size()));
7553 // Write out the PLT data.
7555 do_write(Output_file
*);
7557 // Record irelative symbol data.
7558 void insert_irelative_data(const IRelative_data
& idata
)
7559 { irelative_data_vec_
.push_back(idata
); }
7561 // The reloc section.
7562 Reloc_section
* rel_
;
7563 // The IRELATIVE relocs, if necessary. These must follow the
7564 // regular PLT relocations.
7565 Reloc_section
* irelative_rel_
;
7566 // The .got section.
7567 Arm_output_data_got
<big_endian
>* got_
;
7568 // The .got.plt section.
7569 Output_data_space
* got_plt_
;
7570 // The part of the .got.plt section used for IRELATIVE relocs.
7571 Output_data_space
* got_irelative_
;
7572 // The number of PLT entries.
7573 unsigned int count_
;
7574 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7575 // follow the regular PLT entries.
7576 unsigned int irelative_count_
;
7577 // Vector for irelative data.
7578 typedef std::vector
<IRelative_data
> IRelative_data_vec
;
7579 IRelative_data_vec irelative_data_vec_
;
7582 // Create the PLT section. The ordinary .got section is an argument,
7583 // since we need to refer to the start. We also create our own .got
7584 // section just for PLT entries.
7586 template<bool big_endian
>
7587 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(
7588 Layout
* layout
, uint64_t addralign
,
7589 Arm_output_data_got
<big_endian
>* got
,
7590 Output_data_space
* got_plt
,
7591 Output_data_space
* got_irelative
)
7592 : Output_section_data(addralign
), irelative_rel_(NULL
),
7593 got_(got
), got_plt_(got_plt
), got_irelative_(got_irelative
),
7594 count_(0), irelative_count_(0)
7596 this->rel_
= new Reloc_section(false);
7597 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7598 elfcpp::SHF_ALLOC
, this->rel_
,
7599 ORDER_DYNAMIC_PLT_RELOCS
, false);
7602 template<bool big_endian
>
7604 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7609 // Add an entry to the PLT.
7611 template<bool big_endian
>
7613 Output_data_plt_arm
<big_endian
>::add_entry(Symbol_table
* symtab
,
7617 gold_assert(!gsym
->has_plt_offset());
7619 unsigned int* entry_count
;
7620 Output_section_data_build
* got
;
7622 // We have 2 different types of plt entry here, normal and ifunc.
7624 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7625 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7627 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7628 // second 12, third 24 ... etc.
7630 // IFunc plt entries *always* come after *normal* plt entries.
7632 // Notice, when computing the plt address of a certain symbol, "plt_address +
7633 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7634 // target->plt_address_for_local() instead.
7636 int begin_offset
= 0;
7637 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7638 && gsym
->can_use_relative_reloc(false))
7640 entry_count
= &this->irelative_count_
;
7641 got
= this->got_irelative_
;
7642 // For irelative plt entries, offset is relative to the end of normal plt
7643 // entries, so it starts from 0.
7645 // Record symbol information.
7646 this->insert_irelative_data(
7647 IRelative_data(symtab
->get_sized_symbol
<32>(gsym
)));
7651 entry_count
= &this->count_
;
7652 got
= this->got_plt_
;
7653 // Note that for normal plt entries, when setting the PLT offset we skip
7654 // the initial reserved PLT entry.
7655 begin_offset
= this->first_plt_entry_offset();
7658 gsym
->set_plt_offset(begin_offset
7659 + (*entry_count
) * this->get_plt_entry_size());
7663 section_offset_type got_offset
= got
->current_data_size();
7665 // Every PLT entry needs a GOT entry which points back to the PLT
7666 // entry (this will be changed by the dynamic linker, normally
7667 // lazily when the function is called).
7668 got
->set_current_data_size(got_offset
+ 4);
7670 // Every PLT entry needs a reloc.
7671 this->add_relocation(symtab
, layout
, gsym
, got_offset
);
7673 // Note that we don't need to save the symbol. The contents of the
7674 // PLT are independent of which symbols are used. The symbols only
7675 // appear in the relocations.
7678 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7681 template<bool big_endian
>
7683 Output_data_plt_arm
<big_endian
>::add_local_ifunc_entry(
7684 Symbol_table
* symtab
,
7686 Sized_relobj_file
<32, big_endian
>* relobj
,
7687 unsigned int local_sym_index
)
7689 this->insert_irelative_data(IRelative_data(relobj
, local_sym_index
));
7691 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7692 // no longer correct. Use target->plt_address_for_local() instead.
7693 unsigned int plt_offset
= this->irelative_count_
* this->get_plt_entry_size();
7694 ++this->irelative_count_
;
7696 section_offset_type got_offset
= this->got_irelative_
->current_data_size();
7698 // Every PLT entry needs a GOT entry which points back to the PLT
7700 this->got_irelative_
->set_current_data_size(got_offset
+ 4);
7703 // Every PLT entry needs a reloc.
7704 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7705 rel
->add_symbolless_local_addend(relobj
, local_sym_index
,
7706 elfcpp::R_ARM_IRELATIVE
,
7707 this->got_irelative_
, got_offset
);
7712 // Add the relocation for a PLT entry.
7714 template<bool big_endian
>
7716 Output_data_plt_arm
<big_endian
>::add_relocation(
7717 Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
, unsigned int got_offset
)
7719 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7720 && gsym
->can_use_relative_reloc(false))
7722 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7723 rel
->add_symbolless_global_addend(gsym
, elfcpp::R_ARM_IRELATIVE
,
7724 this->got_irelative_
, got_offset
);
7728 gsym
->set_needs_dynsym_entry();
7729 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7735 // Create the irelative relocation data.
7737 template<bool big_endian
>
7738 typename Output_data_plt_arm
<big_endian
>::Reloc_section
*
7739 Output_data_plt_arm
<big_endian
>::rel_irelative(Symbol_table
* symtab
,
7742 if (this->irelative_rel_
== NULL
)
7744 // Since irelative relocations goes into 'rel.dyn', we delegate the
7745 // creation of irelative_rel_ to where rel_dyn section gets created.
7746 Target_arm
<big_endian
>* arm_target
=
7747 Target_arm
<big_endian
>::default_target();
7748 this->irelative_rel_
= arm_target
->rel_irelative_section(layout
);
7750 // Make sure we have a place for the TLSDESC relocations, in
7751 // case we see any later on.
7752 // this->rel_tlsdesc(layout);
7753 if (parameters
->doing_static_link())
7755 // A statically linked executable will only have a .rel.plt section to
7756 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7757 // will use these symbols to locate the IRELATIVE relocs at program
7759 symtab
->define_in_output_data("__rel_iplt_start", NULL
,
7760 Symbol_table::PREDEFINED
,
7761 this->irelative_rel_
, 0, 0,
7762 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7763 elfcpp::STV_HIDDEN
, 0, false, true);
7764 symtab
->define_in_output_data("__rel_iplt_end", NULL
,
7765 Symbol_table::PREDEFINED
,
7766 this->irelative_rel_
, 0, 0,
7767 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7768 elfcpp::STV_HIDDEN
, 0, true, true);
7771 return this->irelative_rel_
;
7775 // Return the PLT address for a global symbol.
7777 template<bool big_endian
>
7779 Output_data_plt_arm
<big_endian
>::address_for_global(const Symbol
* gsym
) const
7781 uint64_t begin_offset
= 0;
7782 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7783 && gsym
->can_use_relative_reloc(false))
7785 begin_offset
= (this->first_plt_entry_offset() +
7786 this->count_
* this->get_plt_entry_size());
7788 return this->address() + begin_offset
+ gsym
->plt_offset();
7792 // Return the PLT address for a local symbol. These are always
7793 // IRELATIVE relocs.
7795 template<bool big_endian
>
7797 Output_data_plt_arm
<big_endian
>::address_for_local(
7798 const Relobj
* object
,
7799 unsigned int r_sym
) const
7801 return (this->address()
7802 + this->first_plt_entry_offset()
7803 + this->count_
* this->get_plt_entry_size()
7804 + object
->local_plt_offset(r_sym
));
7808 template<bool big_endian
>
7809 class Output_data_plt_arm_standard
: public Output_data_plt_arm
<big_endian
>
7812 Output_data_plt_arm_standard(Layout
* layout
,
7813 Arm_output_data_got
<big_endian
>* got
,
7814 Output_data_space
* got_plt
,
7815 Output_data_space
* got_irelative
)
7816 : Output_data_plt_arm
<big_endian
>(layout
, 4, got
, got_plt
, got_irelative
)
7820 // Return the offset of the first non-reserved PLT entry.
7821 virtual unsigned int
7822 do_first_plt_entry_offset() const
7823 { return sizeof(first_plt_entry
); }
7826 do_fill_first_plt_entry(unsigned char* pov
,
7827 Arm_address got_address
,
7828 Arm_address plt_address
);
7831 // Template for the first PLT entry.
7832 static const uint32_t first_plt_entry
[5];
7836 // FIXME: This is not very flexible. Right now this has only been tested
7837 // on armv5te. If we are to support additional architecture features like
7838 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7840 // The first entry in the PLT.
7841 template<bool big_endian
>
7842 const uint32_t Output_data_plt_arm_standard
<big_endian
>::first_plt_entry
[5] =
7844 0xe52de004, // str lr, [sp, #-4]!
7845 0xe59fe004, // ldr lr, [pc, #4]
7846 0xe08fe00e, // add lr, pc, lr
7847 0xe5bef008, // ldr pc, [lr, #8]!
7848 0x00000000, // &GOT[0] - .
7851 template<bool big_endian
>
7853 Output_data_plt_arm_standard
<big_endian
>::do_fill_first_plt_entry(
7855 Arm_address got_address
,
7856 Arm_address plt_address
)
7858 // Write first PLT entry. All but the last word are constants.
7859 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7860 / sizeof(first_plt_entry
[0]));
7861 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7863 if (parameters
->options().be8())
7865 elfcpp::Swap
<32, false>::writeval(pov
+ i
* 4,
7866 first_plt_entry
[i
]);
7870 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4,
7871 first_plt_entry
[i
]);
7874 // Last word in first PLT entry is &GOT[0] - .
7875 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7876 got_address
- (plt_address
+ 16));
7879 // Subsequent entries in the PLT.
7880 // This class generates short (12-byte) entries, for displacements up to 2^28.
7882 template<bool big_endian
>
7883 class Output_data_plt_arm_short
: public Output_data_plt_arm_standard
<big_endian
>
7886 Output_data_plt_arm_short(Layout
* layout
,
7887 Arm_output_data_got
<big_endian
>* got
,
7888 Output_data_space
* got_plt
,
7889 Output_data_space
* got_irelative
)
7890 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7894 // Return the size of a PLT entry.
7895 virtual unsigned int
7896 do_get_plt_entry_size() const
7897 { return sizeof(plt_entry
); }
7900 do_fill_plt_entry(unsigned char* pov
,
7901 Arm_address got_address
,
7902 Arm_address plt_address
,
7903 unsigned int got_offset
,
7904 unsigned int plt_offset
);
7907 // Template for subsequent PLT entries.
7908 static const uint32_t plt_entry
[3];
7911 template<bool big_endian
>
7912 const uint32_t Output_data_plt_arm_short
<big_endian
>::plt_entry
[3] =
7914 0xe28fc600, // add ip, pc, #0xNN00000
7915 0xe28cca00, // add ip, ip, #0xNN000
7916 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7919 template<bool big_endian
>
7921 Output_data_plt_arm_short
<big_endian
>::do_fill_plt_entry(
7923 Arm_address got_address
,
7924 Arm_address plt_address
,
7925 unsigned int got_offset
,
7926 unsigned int plt_offset
)
7928 int32_t offset
= ((got_address
+ got_offset
)
7929 - (plt_address
+ plt_offset
+ 8));
7930 if (offset
< 0 || offset
> 0x0fffffff)
7931 gold_error(_("PLT offset too large, try linking with --long-plt"));
7933 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7934 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7935 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7937 if (parameters
->options().be8())
7939 elfcpp::Swap
<32, false>::writeval(pov
, plt_insn0
);
7940 elfcpp::Swap
<32, false>::writeval(pov
+ 4, plt_insn1
);
7941 elfcpp::Swap
<32, false>::writeval(pov
+ 8, plt_insn2
);
7945 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7946 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7947 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7951 // This class generates long (16-byte) entries, for arbitrary displacements.
7953 template<bool big_endian
>
7954 class Output_data_plt_arm_long
: public Output_data_plt_arm_standard
<big_endian
>
7957 Output_data_plt_arm_long(Layout
* layout
,
7958 Arm_output_data_got
<big_endian
>* got
,
7959 Output_data_space
* got_plt
,
7960 Output_data_space
* got_irelative
)
7961 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7965 // Return the size of a PLT entry.
7966 virtual unsigned int
7967 do_get_plt_entry_size() const
7968 { return sizeof(plt_entry
); }
7971 do_fill_plt_entry(unsigned char* pov
,
7972 Arm_address got_address
,
7973 Arm_address plt_address
,
7974 unsigned int got_offset
,
7975 unsigned int plt_offset
);
7978 // Template for subsequent PLT entries.
7979 static const uint32_t plt_entry
[4];
7982 template<bool big_endian
>
7983 const uint32_t Output_data_plt_arm_long
<big_endian
>::plt_entry
[4] =
7985 0xe28fc200, // add ip, pc, #0xN0000000
7986 0xe28cc600, // add ip, ip, #0xNN00000
7987 0xe28cca00, // add ip, ip, #0xNN000
7988 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7991 template<bool big_endian
>
7993 Output_data_plt_arm_long
<big_endian
>::do_fill_plt_entry(
7995 Arm_address got_address
,
7996 Arm_address plt_address
,
7997 unsigned int got_offset
,
7998 unsigned int plt_offset
)
8000 int32_t offset
= ((got_address
+ got_offset
)
8001 - (plt_address
+ plt_offset
+ 8));
8003 uint32_t plt_insn0
= plt_entry
[0] | (offset
>> 28);
8004 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 20) & 0xff);
8005 uint32_t plt_insn2
= plt_entry
[2] | ((offset
>> 12) & 0xff);
8006 uint32_t plt_insn3
= plt_entry
[3] | (offset
& 0xfff);
8008 if (parameters
->options().be8())
8010 elfcpp::Swap
<32, false>::writeval(pov
, plt_insn0
);
8011 elfcpp::Swap
<32, false>::writeval(pov
+ 4, plt_insn1
);
8012 elfcpp::Swap
<32, false>::writeval(pov
+ 8, plt_insn2
);
8013 elfcpp::Swap
<32, false>::writeval(pov
+ 12, plt_insn3
);
8017 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
8018 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
8019 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
8020 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 12, plt_insn3
);
8024 // Write out the PLT. This uses the hand-coded instructions above,
8025 // and adjusts them as needed. This is all specified by the arm ELF
8026 // Processor Supplement.
8028 template<bool big_endian
>
8030 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
8032 const off_t offset
= this->offset();
8033 const section_size_type oview_size
=
8034 convert_to_section_size_type(this->data_size());
8035 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
8037 const off_t got_file_offset
= this->got_plt_
->offset();
8038 gold_assert(got_file_offset
+ this->got_plt_
->data_size()
8039 == this->got_irelative_
->offset());
8040 const section_size_type got_size
=
8041 convert_to_section_size_type(this->got_plt_
->data_size()
8042 + this->got_irelative_
->data_size());
8043 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
8045 unsigned char* pov
= oview
;
8047 Arm_address plt_address
= this->address();
8048 Arm_address got_address
= this->got_plt_
->address();
8050 // Write first PLT entry.
8051 this->fill_first_plt_entry(pov
, got_address
, plt_address
);
8052 pov
+= this->first_plt_entry_offset();
8054 unsigned char* got_pov
= got_view
;
8056 memset(got_pov
, 0, 12);
8059 unsigned int plt_offset
= this->first_plt_entry_offset();
8060 unsigned int got_offset
= 12;
8061 const unsigned int count
= this->count_
+ this->irelative_count_
;
8062 gold_assert(this->irelative_count_
== this->irelative_data_vec_
.size());
8063 for (unsigned int i
= 0;
8066 pov
+= this->get_plt_entry_size(),
8068 plt_offset
+= this->get_plt_entry_size(),
8071 // Set and adjust the PLT entry itself.
8072 this->fill_plt_entry(pov
, got_address
, plt_address
,
8073 got_offset
, plt_offset
);
8076 if (i
< this->count_
)
8078 // For non-irelative got entries, the value is the beginning of plt.
8079 value
= plt_address
;
8083 // For irelative got entries, the value is the (global/local) symbol
8085 const IRelative_data
& idata
=
8086 this->irelative_data_vec_
[i
- this->count_
];
8087 if (idata
.symbol_is_global_
)
8089 // Set the entry in the GOT for irelative symbols. The content is
8090 // the address of the ifunc, not the address of plt start.
8091 const Sized_symbol
<32>* sized_symbol
= idata
.u_
.global
;
8092 gold_assert(sized_symbol
->type() == elfcpp::STT_GNU_IFUNC
);
8093 value
= sized_symbol
->value();
8097 value
= idata
.u_
.local
.relobj
->local_symbol_value(
8098 idata
.u_
.local
.index
, 0);
8101 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, value
);
8104 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
8105 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
8107 of
->write_output_view(offset
, oview_size
, oview
);
8108 of
->write_output_view(got_file_offset
, got_size
, got_view
);
8112 // Create a PLT entry for a global symbol.
8114 template<bool big_endian
>
8116 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
8119 if (gsym
->has_plt_offset())
8122 if (this->plt_
== NULL
)
8123 this->make_plt_section(symtab
, layout
);
8125 this->plt_
->add_entry(symtab
, layout
, gsym
);
8129 // Create the PLT section.
8130 template<bool big_endian
>
8132 Target_arm
<big_endian
>::make_plt_section(
8133 Symbol_table
* symtab
, Layout
* layout
)
8135 if (this->plt_
== NULL
)
8137 // Create the GOT section first.
8138 this->got_section(symtab
, layout
);
8140 // GOT for irelatives is create along with got.plt.
8141 gold_assert(this->got_
!= NULL
8142 && this->got_plt_
!= NULL
8143 && this->got_irelative_
!= NULL
);
8144 this->plt_
= this->make_data_plt(layout
, this->got_
, this->got_plt_
,
8145 this->got_irelative_
);
8147 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
8149 | elfcpp::SHF_EXECINSTR
),
8150 this->plt_
, ORDER_PLT
, false);
8151 symtab
->define_in_output_data("$a", NULL
,
8152 Symbol_table::PREDEFINED
,
8154 0, 0, elfcpp::STT_NOTYPE
,
8156 elfcpp::STV_DEFAULT
, 0,
8162 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
8164 template<bool big_endian
>
8166 Target_arm
<big_endian
>::make_local_ifunc_plt_entry(
8167 Symbol_table
* symtab
, Layout
* layout
,
8168 Sized_relobj_file
<32, big_endian
>* relobj
,
8169 unsigned int local_sym_index
)
8171 if (relobj
->local_has_plt_offset(local_sym_index
))
8173 if (this->plt_
== NULL
)
8174 this->make_plt_section(symtab
, layout
);
8175 unsigned int plt_offset
= this->plt_
->add_local_ifunc_entry(symtab
, layout
,
8178 relobj
->set_local_plt_offset(local_sym_index
, plt_offset
);
8182 // Return the number of entries in the PLT.
8184 template<bool big_endian
>
8186 Target_arm
<big_endian
>::plt_entry_count() const
8188 if (this->plt_
== NULL
)
8190 return this->plt_
->entry_count();
8193 // Return the offset of the first non-reserved PLT entry.
8195 template<bool big_endian
>
8197 Target_arm
<big_endian
>::first_plt_entry_offset() const
8199 return this->plt_
->first_plt_entry_offset();
8202 // Return the size of each PLT entry.
8204 template<bool big_endian
>
8206 Target_arm
<big_endian
>::plt_entry_size() const
8208 return this->plt_
->get_plt_entry_size();
8211 // Get the section to use for TLS_DESC relocations.
8213 template<bool big_endian
>
8214 typename Target_arm
<big_endian
>::Reloc_section
*
8215 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
8217 return this->plt_section()->rel_tls_desc(layout
);
8220 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8222 template<bool big_endian
>
8224 Target_arm
<big_endian
>::define_tls_base_symbol(
8225 Symbol_table
* symtab
,
8228 if (this->tls_base_symbol_defined_
)
8231 Output_segment
* tls_segment
= layout
->tls_segment();
8232 if (tls_segment
!= NULL
)
8234 bool is_exec
= parameters
->options().output_is_executable();
8235 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
8236 Symbol_table::PREDEFINED
,
8240 elfcpp::STV_HIDDEN
, 0,
8242 ? Symbol::SEGMENT_END
8243 : Symbol::SEGMENT_START
),
8246 this->tls_base_symbol_defined_
= true;
8249 // Create a GOT entry for the TLS module index.
8251 template<bool big_endian
>
8253 Target_arm
<big_endian
>::got_mod_index_entry(
8254 Symbol_table
* symtab
,
8256 Sized_relobj_file
<32, big_endian
>* object
)
8258 if (this->got_mod_index_offset_
== -1U)
8260 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
8261 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
8262 unsigned int got_offset
;
8263 if (!parameters
->doing_static_link())
8265 got_offset
= got
->add_constant(0);
8266 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
8267 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
8272 // We are doing a static link. Just mark it as belong to module 1,
8274 got_offset
= got
->add_constant(1);
8277 got
->add_constant(0);
8278 this->got_mod_index_offset_
= got_offset
;
8280 return this->got_mod_index_offset_
;
8283 // Optimize the TLS relocation type based on what we know about the
8284 // symbol. IS_FINAL is true if the final address of this symbol is
8285 // known at link time.
8287 template<bool big_endian
>
8288 tls::Tls_optimization
8289 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
8291 // FIXME: Currently we do not do any TLS optimization.
8292 return tls::TLSOPT_NONE
;
8295 // Get the Reference_flags for a particular relocation.
8297 template<bool big_endian
>
8299 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
8303 case elfcpp::R_ARM_NONE
:
8304 case elfcpp::R_ARM_V4BX
:
8305 case elfcpp::R_ARM_GNU_VTENTRY
:
8306 case elfcpp::R_ARM_GNU_VTINHERIT
:
8307 // No symbol reference.
8310 case elfcpp::R_ARM_ABS32
:
8311 case elfcpp::R_ARM_ABS16
:
8312 case elfcpp::R_ARM_ABS12
:
8313 case elfcpp::R_ARM_THM_ABS5
:
8314 case elfcpp::R_ARM_ABS8
:
8315 case elfcpp::R_ARM_BASE_ABS
:
8316 case elfcpp::R_ARM_MOVW_ABS_NC
:
8317 case elfcpp::R_ARM_MOVT_ABS
:
8318 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8319 case elfcpp::R_ARM_THM_MOVT_ABS
:
8320 case elfcpp::R_ARM_ABS32_NOI
:
8321 return Symbol::ABSOLUTE_REF
;
8323 case elfcpp::R_ARM_REL32
:
8324 case elfcpp::R_ARM_LDR_PC_G0
:
8325 case elfcpp::R_ARM_SBREL32
:
8326 case elfcpp::R_ARM_THM_PC8
:
8327 case elfcpp::R_ARM_BASE_PREL
:
8328 case elfcpp::R_ARM_MOVW_PREL_NC
:
8329 case elfcpp::R_ARM_MOVT_PREL
:
8330 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8331 case elfcpp::R_ARM_THM_MOVT_PREL
:
8332 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8333 case elfcpp::R_ARM_THM_PC12
:
8334 case elfcpp::R_ARM_REL32_NOI
:
8335 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8336 case elfcpp::R_ARM_ALU_PC_G0
:
8337 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8338 case elfcpp::R_ARM_ALU_PC_G1
:
8339 case elfcpp::R_ARM_ALU_PC_G2
:
8340 case elfcpp::R_ARM_LDR_PC_G1
:
8341 case elfcpp::R_ARM_LDR_PC_G2
:
8342 case elfcpp::R_ARM_LDRS_PC_G0
:
8343 case elfcpp::R_ARM_LDRS_PC_G1
:
8344 case elfcpp::R_ARM_LDRS_PC_G2
:
8345 case elfcpp::R_ARM_LDC_PC_G0
:
8346 case elfcpp::R_ARM_LDC_PC_G1
:
8347 case elfcpp::R_ARM_LDC_PC_G2
:
8348 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8349 case elfcpp::R_ARM_ALU_SB_G0
:
8350 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8351 case elfcpp::R_ARM_ALU_SB_G1
:
8352 case elfcpp::R_ARM_ALU_SB_G2
:
8353 case elfcpp::R_ARM_LDR_SB_G0
:
8354 case elfcpp::R_ARM_LDR_SB_G1
:
8355 case elfcpp::R_ARM_LDR_SB_G2
:
8356 case elfcpp::R_ARM_LDRS_SB_G0
:
8357 case elfcpp::R_ARM_LDRS_SB_G1
:
8358 case elfcpp::R_ARM_LDRS_SB_G2
:
8359 case elfcpp::R_ARM_LDC_SB_G0
:
8360 case elfcpp::R_ARM_LDC_SB_G1
:
8361 case elfcpp::R_ARM_LDC_SB_G2
:
8362 case elfcpp::R_ARM_MOVW_BREL_NC
:
8363 case elfcpp::R_ARM_MOVT_BREL
:
8364 case elfcpp::R_ARM_MOVW_BREL
:
8365 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8366 case elfcpp::R_ARM_THM_MOVT_BREL
:
8367 case elfcpp::R_ARM_THM_MOVW_BREL
:
8368 case elfcpp::R_ARM_GOTOFF32
:
8369 case elfcpp::R_ARM_GOTOFF12
:
8370 case elfcpp::R_ARM_SBREL31
:
8371 return Symbol::RELATIVE_REF
;
8373 case elfcpp::R_ARM_PLT32
:
8374 case elfcpp::R_ARM_CALL
:
8375 case elfcpp::R_ARM_JUMP24
:
8376 case elfcpp::R_ARM_THM_CALL
:
8377 case elfcpp::R_ARM_THM_JUMP24
:
8378 case elfcpp::R_ARM_THM_JUMP19
:
8379 case elfcpp::R_ARM_THM_JUMP6
:
8380 case elfcpp::R_ARM_THM_JUMP11
:
8381 case elfcpp::R_ARM_THM_JUMP8
:
8382 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8383 // in unwind tables. It may point to functions via PLTs.
8384 // So we treat it like call/jump relocations above.
8385 case elfcpp::R_ARM_PREL31
:
8386 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
8388 case elfcpp::R_ARM_GOT_BREL
:
8389 case elfcpp::R_ARM_GOT_ABS
:
8390 case elfcpp::R_ARM_GOT_PREL
:
8392 return Symbol::ABSOLUTE_REF
;
8394 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8395 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8396 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8397 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8398 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8399 return Symbol::TLS_REF
;
8401 case elfcpp::R_ARM_TARGET1
:
8402 case elfcpp::R_ARM_TARGET2
:
8403 case elfcpp::R_ARM_COPY
:
8404 case elfcpp::R_ARM_GLOB_DAT
:
8405 case elfcpp::R_ARM_JUMP_SLOT
:
8406 case elfcpp::R_ARM_RELATIVE
:
8407 case elfcpp::R_ARM_PC24
:
8408 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8409 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8410 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8412 // Not expected. We will give an error later.
8417 // Report an unsupported relocation against a local symbol.
8419 template<bool big_endian
>
8421 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
8422 Sized_relobj_file
<32, big_endian
>* object
,
8423 unsigned int r_type
)
8425 gold_error(_("%s: unsupported reloc %u against local symbol"),
8426 object
->name().c_str(), r_type
);
8429 // We are about to emit a dynamic relocation of type R_TYPE. If the
8430 // dynamic linker does not support it, issue an error. The GNU linker
8431 // only issues a non-PIC error for an allocated read-only section.
8432 // Here we know the section is allocated, but we don't know that it is
8433 // read-only. But we check for all the relocation types which the
8434 // glibc dynamic linker supports, so it seems appropriate to issue an
8435 // error even if the section is not read-only.
8437 template<bool big_endian
>
8439 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
8440 unsigned int r_type
)
8444 // These are the relocation types supported by glibc for ARM.
8445 case elfcpp::R_ARM_RELATIVE
:
8446 case elfcpp::R_ARM_COPY
:
8447 case elfcpp::R_ARM_GLOB_DAT
:
8448 case elfcpp::R_ARM_JUMP_SLOT
:
8449 case elfcpp::R_ARM_ABS32
:
8450 case elfcpp::R_ARM_ABS32_NOI
:
8451 case elfcpp::R_ARM_IRELATIVE
:
8452 case elfcpp::R_ARM_PC24
:
8453 // FIXME: The following 3 types are not supported by Android's dynamic
8455 case elfcpp::R_ARM_TLS_DTPMOD32
:
8456 case elfcpp::R_ARM_TLS_DTPOFF32
:
8457 case elfcpp::R_ARM_TLS_TPOFF32
:
8462 // This prevents us from issuing more than one error per reloc
8463 // section. But we can still wind up issuing more than one
8464 // error per object file.
8465 if (this->issued_non_pic_error_
)
8467 const Arm_reloc_property
* reloc_property
=
8468 arm_reloc_property_table
->get_reloc_property(r_type
);
8469 gold_assert(reloc_property
!= NULL
);
8470 object
->error(_("requires unsupported dynamic reloc %s; "
8471 "recompile with -fPIC"),
8472 reloc_property
->name().c_str());
8473 this->issued_non_pic_error_
= true;
8477 case elfcpp::R_ARM_NONE
:
8483 // Return whether we need to make a PLT entry for a relocation of the
8484 // given type against a STT_GNU_IFUNC symbol.
8486 template<bool big_endian
>
8488 Target_arm
<big_endian
>::Scan::reloc_needs_plt_for_ifunc(
8489 Sized_relobj_file
<32, big_endian
>* object
,
8490 unsigned int r_type
)
8492 int flags
= Scan::get_reference_flags(r_type
);
8493 if (flags
& Symbol::TLS_REF
)
8495 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8496 object
->name().c_str(), r_type
);
8503 // Scan a relocation for a local symbol.
8504 // FIXME: This only handles a subset of relocation types used by Android
8505 // on ARM v5te devices.
8507 template<bool big_endian
>
8509 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
8512 Sized_relobj_file
<32, big_endian
>* object
,
8513 unsigned int data_shndx
,
8514 Output_section
* output_section
,
8515 const elfcpp::Rel
<32, big_endian
>& reloc
,
8516 unsigned int r_type
,
8517 const elfcpp::Sym
<32, big_endian
>& lsym
,
8523 r_type
= get_real_reloc_type(r_type
);
8525 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8526 bool is_ifunc
= lsym
.get_st_type() == elfcpp::STT_GNU_IFUNC
;
8527 if (is_ifunc
&& this->reloc_needs_plt_for_ifunc(object
, r_type
))
8529 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8530 target
->make_local_ifunc_plt_entry(symtab
, layout
, object
, r_sym
);
8535 case elfcpp::R_ARM_NONE
:
8536 case elfcpp::R_ARM_V4BX
:
8537 case elfcpp::R_ARM_GNU_VTENTRY
:
8538 case elfcpp::R_ARM_GNU_VTINHERIT
:
8541 case elfcpp::R_ARM_ABS32
:
8542 case elfcpp::R_ARM_ABS32_NOI
:
8543 // If building a shared library (or a position-independent
8544 // executable), we need to create a dynamic relocation for
8545 // this location. The relocation applied at link time will
8546 // apply the link-time value, so we flag the location with
8547 // an R_ARM_RELATIVE relocation so the dynamic loader can
8548 // relocate it easily.
8549 if (parameters
->options().output_is_position_independent())
8551 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8552 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8553 // If we are to add more other reloc types than R_ARM_ABS32,
8554 // we need to add check_non_pic(object, r_type) here.
8555 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
8556 output_section
, data_shndx
,
8557 reloc
.get_r_offset(), is_ifunc
);
8561 case elfcpp::R_ARM_ABS16
:
8562 case elfcpp::R_ARM_ABS12
:
8563 case elfcpp::R_ARM_THM_ABS5
:
8564 case elfcpp::R_ARM_ABS8
:
8565 case elfcpp::R_ARM_BASE_ABS
:
8566 case elfcpp::R_ARM_MOVW_ABS_NC
:
8567 case elfcpp::R_ARM_MOVT_ABS
:
8568 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8569 case elfcpp::R_ARM_THM_MOVT_ABS
:
8570 // If building a shared library (or a position-independent
8571 // executable), we need to create a dynamic relocation for
8572 // this location. Because the addend needs to remain in the
8573 // data section, we need to be careful not to apply this
8574 // relocation statically.
8575 if (parameters
->options().output_is_position_independent())
8577 check_non_pic(object
, r_type
);
8578 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8579 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8580 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
8581 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
8582 data_shndx
, reloc
.get_r_offset());
8585 gold_assert(lsym
.get_st_value() == 0);
8586 unsigned int shndx
= lsym
.get_st_shndx();
8588 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
8591 object
->error(_("section symbol %u has bad shndx %u"),
8594 rel_dyn
->add_local_section(object
, shndx
,
8595 r_type
, output_section
,
8596 data_shndx
, reloc
.get_r_offset());
8601 case elfcpp::R_ARM_REL32
:
8602 case elfcpp::R_ARM_LDR_PC_G0
:
8603 case elfcpp::R_ARM_SBREL32
:
8604 case elfcpp::R_ARM_THM_CALL
:
8605 case elfcpp::R_ARM_THM_PC8
:
8606 case elfcpp::R_ARM_BASE_PREL
:
8607 case elfcpp::R_ARM_PLT32
:
8608 case elfcpp::R_ARM_CALL
:
8609 case elfcpp::R_ARM_JUMP24
:
8610 case elfcpp::R_ARM_THM_JUMP24
:
8611 case elfcpp::R_ARM_SBREL31
:
8612 case elfcpp::R_ARM_PREL31
:
8613 case elfcpp::R_ARM_MOVW_PREL_NC
:
8614 case elfcpp::R_ARM_MOVT_PREL
:
8615 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8616 case elfcpp::R_ARM_THM_MOVT_PREL
:
8617 case elfcpp::R_ARM_THM_JUMP19
:
8618 case elfcpp::R_ARM_THM_JUMP6
:
8619 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8620 case elfcpp::R_ARM_THM_PC12
:
8621 case elfcpp::R_ARM_REL32_NOI
:
8622 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8623 case elfcpp::R_ARM_ALU_PC_G0
:
8624 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8625 case elfcpp::R_ARM_ALU_PC_G1
:
8626 case elfcpp::R_ARM_ALU_PC_G2
:
8627 case elfcpp::R_ARM_LDR_PC_G1
:
8628 case elfcpp::R_ARM_LDR_PC_G2
:
8629 case elfcpp::R_ARM_LDRS_PC_G0
:
8630 case elfcpp::R_ARM_LDRS_PC_G1
:
8631 case elfcpp::R_ARM_LDRS_PC_G2
:
8632 case elfcpp::R_ARM_LDC_PC_G0
:
8633 case elfcpp::R_ARM_LDC_PC_G1
:
8634 case elfcpp::R_ARM_LDC_PC_G2
:
8635 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8636 case elfcpp::R_ARM_ALU_SB_G0
:
8637 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8638 case elfcpp::R_ARM_ALU_SB_G1
:
8639 case elfcpp::R_ARM_ALU_SB_G2
:
8640 case elfcpp::R_ARM_LDR_SB_G0
:
8641 case elfcpp::R_ARM_LDR_SB_G1
:
8642 case elfcpp::R_ARM_LDR_SB_G2
:
8643 case elfcpp::R_ARM_LDRS_SB_G0
:
8644 case elfcpp::R_ARM_LDRS_SB_G1
:
8645 case elfcpp::R_ARM_LDRS_SB_G2
:
8646 case elfcpp::R_ARM_LDC_SB_G0
:
8647 case elfcpp::R_ARM_LDC_SB_G1
:
8648 case elfcpp::R_ARM_LDC_SB_G2
:
8649 case elfcpp::R_ARM_MOVW_BREL_NC
:
8650 case elfcpp::R_ARM_MOVT_BREL
:
8651 case elfcpp::R_ARM_MOVW_BREL
:
8652 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8653 case elfcpp::R_ARM_THM_MOVT_BREL
:
8654 case elfcpp::R_ARM_THM_MOVW_BREL
:
8655 case elfcpp::R_ARM_THM_JUMP11
:
8656 case elfcpp::R_ARM_THM_JUMP8
:
8657 // We don't need to do anything for a relative addressing relocation
8658 // against a local symbol if it does not reference the GOT.
8661 case elfcpp::R_ARM_GOTOFF32
:
8662 case elfcpp::R_ARM_GOTOFF12
:
8663 // We need a GOT section:
8664 target
->got_section(symtab
, layout
);
8667 case elfcpp::R_ARM_GOT_BREL
:
8668 case elfcpp::R_ARM_GOT_PREL
:
8670 // The symbol requires a GOT entry.
8671 Arm_output_data_got
<big_endian
>* got
=
8672 target
->got_section(symtab
, layout
);
8673 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8674 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
8676 // If we are generating a shared object, we need to add a
8677 // dynamic RELATIVE relocation for this symbol's GOT entry.
8678 if (parameters
->options().output_is_position_independent())
8680 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8681 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8682 rel_dyn
->add_local_relative(
8683 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
8684 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
8690 case elfcpp::R_ARM_TARGET1
:
8691 case elfcpp::R_ARM_TARGET2
:
8692 // This should have been mapped to another type already.
8694 case elfcpp::R_ARM_COPY
:
8695 case elfcpp::R_ARM_GLOB_DAT
:
8696 case elfcpp::R_ARM_JUMP_SLOT
:
8697 case elfcpp::R_ARM_RELATIVE
:
8698 // These are relocations which should only be seen by the
8699 // dynamic linker, and should never be seen here.
8700 gold_error(_("%s: unexpected reloc %u in object file"),
8701 object
->name().c_str(), r_type
);
8705 // These are initial TLS relocs, which are expected when
8707 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8708 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8709 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8710 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8711 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8713 bool output_is_shared
= parameters
->options().shared();
8714 const tls::Tls_optimization optimized_type
8715 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
8719 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8720 if (optimized_type
== tls::TLSOPT_NONE
)
8722 // Create a pair of GOT entries for the module index and
8723 // dtv-relative offset.
8724 Arm_output_data_got
<big_endian
>* got
8725 = target
->got_section(symtab
, layout
);
8726 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8727 unsigned int shndx
= lsym
.get_st_shndx();
8729 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
8732 object
->error(_("local symbol %u has bad shndx %u"),
8737 if (!parameters
->doing_static_link())
8738 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
8740 target
->rel_dyn_section(layout
),
8741 elfcpp::R_ARM_TLS_DTPMOD32
);
8743 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
8747 // FIXME: TLS optimization not supported yet.
8751 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8752 if (optimized_type
== tls::TLSOPT_NONE
)
8754 // Create a GOT entry for the module index.
8755 target
->got_mod_index_entry(symtab
, layout
, object
);
8758 // FIXME: TLS optimization not supported yet.
8762 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8765 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8766 layout
->set_has_static_tls();
8767 if (optimized_type
== tls::TLSOPT_NONE
)
8769 // Create a GOT entry for the tp-relative offset.
8770 Arm_output_data_got
<big_endian
>* got
8771 = target
->got_section(symtab
, layout
);
8772 unsigned int r_sym
=
8773 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8774 if (!parameters
->doing_static_link())
8775 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8776 target
->rel_dyn_section(layout
),
8777 elfcpp::R_ARM_TLS_TPOFF32
);
8778 else if (!object
->local_has_got_offset(r_sym
,
8779 GOT_TYPE_TLS_OFFSET
))
8781 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8782 unsigned int got_offset
=
8783 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8784 got
->add_static_reloc(got_offset
,
8785 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8790 // FIXME: TLS optimization not supported yet.
8794 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8795 layout
->set_has_static_tls();
8796 if (output_is_shared
)
8798 // We need to create a dynamic relocation.
8799 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8800 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8801 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8802 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8803 output_section
, data_shndx
,
8804 reloc
.get_r_offset());
8814 case elfcpp::R_ARM_PC24
:
8815 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8816 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8817 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8819 unsupported_reloc_local(object
, r_type
);
8824 // Report an unsupported relocation against a global symbol.
8826 template<bool big_endian
>
8828 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8829 Sized_relobj_file
<32, big_endian
>* object
,
8830 unsigned int r_type
,
8833 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8834 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8837 template<bool big_endian
>
8839 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8840 unsigned int r_type
)
8844 case elfcpp::R_ARM_PC24
:
8845 case elfcpp::R_ARM_THM_CALL
:
8846 case elfcpp::R_ARM_PLT32
:
8847 case elfcpp::R_ARM_CALL
:
8848 case elfcpp::R_ARM_JUMP24
:
8849 case elfcpp::R_ARM_THM_JUMP24
:
8850 case elfcpp::R_ARM_SBREL31
:
8851 case elfcpp::R_ARM_PREL31
:
8852 case elfcpp::R_ARM_THM_JUMP19
:
8853 case elfcpp::R_ARM_THM_JUMP6
:
8854 case elfcpp::R_ARM_THM_JUMP11
:
8855 case elfcpp::R_ARM_THM_JUMP8
:
8856 // All the relocations above are branches except SBREL31 and PREL31.
8860 // Be conservative and assume this is a function pointer.
8865 template<bool big_endian
>
8867 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8870 Target_arm
<big_endian
>* target
,
8871 Sized_relobj_file
<32, big_endian
>*,
8874 const elfcpp::Rel
<32, big_endian
>&,
8875 unsigned int r_type
,
8876 const elfcpp::Sym
<32, big_endian
>&)
8878 r_type
= target
->get_real_reloc_type(r_type
);
8879 return possible_function_pointer_reloc(r_type
);
8882 template<bool big_endian
>
8884 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8887 Target_arm
<big_endian
>* target
,
8888 Sized_relobj_file
<32, big_endian
>*,
8891 const elfcpp::Rel
<32, big_endian
>&,
8892 unsigned int r_type
,
8895 // GOT is not a function.
8896 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8899 r_type
= target
->get_real_reloc_type(r_type
);
8900 return possible_function_pointer_reloc(r_type
);
8903 // Scan a relocation for a global symbol.
8905 template<bool big_endian
>
8907 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8910 Sized_relobj_file
<32, big_endian
>* object
,
8911 unsigned int data_shndx
,
8912 Output_section
* output_section
,
8913 const elfcpp::Rel
<32, big_endian
>& reloc
,
8914 unsigned int r_type
,
8917 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8918 // section. We check here to avoid creating a dynamic reloc against
8919 // _GLOBAL_OFFSET_TABLE_.
8920 if (!target
->has_got_section()
8921 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8922 target
->got_section(symtab
, layout
);
8924 // A STT_GNU_IFUNC symbol may require a PLT entry.
8925 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
8926 && this->reloc_needs_plt_for_ifunc(object
, r_type
))
8927 target
->make_plt_entry(symtab
, layout
, gsym
);
8929 r_type
= get_real_reloc_type(r_type
);
8932 case elfcpp::R_ARM_NONE
:
8933 case elfcpp::R_ARM_V4BX
:
8934 case elfcpp::R_ARM_GNU_VTENTRY
:
8935 case elfcpp::R_ARM_GNU_VTINHERIT
:
8938 case elfcpp::R_ARM_ABS32
:
8939 case elfcpp::R_ARM_ABS16
:
8940 case elfcpp::R_ARM_ABS12
:
8941 case elfcpp::R_ARM_THM_ABS5
:
8942 case elfcpp::R_ARM_ABS8
:
8943 case elfcpp::R_ARM_BASE_ABS
:
8944 case elfcpp::R_ARM_MOVW_ABS_NC
:
8945 case elfcpp::R_ARM_MOVT_ABS
:
8946 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8947 case elfcpp::R_ARM_THM_MOVT_ABS
:
8948 case elfcpp::R_ARM_ABS32_NOI
:
8949 // Absolute addressing relocations.
8951 // Make a PLT entry if necessary.
8952 if (this->symbol_needs_plt_entry(gsym
))
8954 target
->make_plt_entry(symtab
, layout
, gsym
);
8955 // Since this is not a PC-relative relocation, we may be
8956 // taking the address of a function. In that case we need to
8957 // set the entry in the dynamic symbol table to the address of
8959 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8960 gsym
->set_needs_dynsym_value();
8962 // Make a dynamic relocation if necessary.
8963 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8965 if (!parameters
->options().output_is_position_independent()
8966 && gsym
->may_need_copy_reloc())
8968 target
->copy_reloc(symtab
, layout
, object
,
8969 data_shndx
, output_section
, gsym
, reloc
);
8971 else if ((r_type
== elfcpp::R_ARM_ABS32
8972 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8973 && gsym
->type() == elfcpp::STT_GNU_IFUNC
8974 && gsym
->can_use_relative_reloc(false)
8975 && !gsym
->is_from_dynobj()
8976 && !gsym
->is_undefined()
8977 && !gsym
->is_preemptible())
8979 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
8980 // symbol. This makes a function address in a PIE executable
8981 // match the address in a shared library that it links against.
8982 Reloc_section
* rel_irelative
=
8983 target
->rel_irelative_section(layout
);
8984 unsigned int r_type
= elfcpp::R_ARM_IRELATIVE
;
8985 rel_irelative
->add_symbolless_global_addend(
8986 gsym
, r_type
, output_section
, object
,
8987 data_shndx
, reloc
.get_r_offset());
8989 else if ((r_type
== elfcpp::R_ARM_ABS32
8990 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8991 && gsym
->can_use_relative_reloc(false))
8993 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8994 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8995 output_section
, object
,
8996 data_shndx
, reloc
.get_r_offset());
9000 check_non_pic(object
, r_type
);
9001 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9002 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
9003 data_shndx
, reloc
.get_r_offset());
9009 case elfcpp::R_ARM_GOTOFF32
:
9010 case elfcpp::R_ARM_GOTOFF12
:
9011 // We need a GOT section.
9012 target
->got_section(symtab
, layout
);
9015 case elfcpp::R_ARM_REL32
:
9016 case elfcpp::R_ARM_LDR_PC_G0
:
9017 case elfcpp::R_ARM_SBREL32
:
9018 case elfcpp::R_ARM_THM_PC8
:
9019 case elfcpp::R_ARM_BASE_PREL
:
9020 case elfcpp::R_ARM_MOVW_PREL_NC
:
9021 case elfcpp::R_ARM_MOVT_PREL
:
9022 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9023 case elfcpp::R_ARM_THM_MOVT_PREL
:
9024 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9025 case elfcpp::R_ARM_THM_PC12
:
9026 case elfcpp::R_ARM_REL32_NOI
:
9027 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9028 case elfcpp::R_ARM_ALU_PC_G0
:
9029 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9030 case elfcpp::R_ARM_ALU_PC_G1
:
9031 case elfcpp::R_ARM_ALU_PC_G2
:
9032 case elfcpp::R_ARM_LDR_PC_G1
:
9033 case elfcpp::R_ARM_LDR_PC_G2
:
9034 case elfcpp::R_ARM_LDRS_PC_G0
:
9035 case elfcpp::R_ARM_LDRS_PC_G1
:
9036 case elfcpp::R_ARM_LDRS_PC_G2
:
9037 case elfcpp::R_ARM_LDC_PC_G0
:
9038 case elfcpp::R_ARM_LDC_PC_G1
:
9039 case elfcpp::R_ARM_LDC_PC_G2
:
9040 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9041 case elfcpp::R_ARM_ALU_SB_G0
:
9042 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9043 case elfcpp::R_ARM_ALU_SB_G1
:
9044 case elfcpp::R_ARM_ALU_SB_G2
:
9045 case elfcpp::R_ARM_LDR_SB_G0
:
9046 case elfcpp::R_ARM_LDR_SB_G1
:
9047 case elfcpp::R_ARM_LDR_SB_G2
:
9048 case elfcpp::R_ARM_LDRS_SB_G0
:
9049 case elfcpp::R_ARM_LDRS_SB_G1
:
9050 case elfcpp::R_ARM_LDRS_SB_G2
:
9051 case elfcpp::R_ARM_LDC_SB_G0
:
9052 case elfcpp::R_ARM_LDC_SB_G1
:
9053 case elfcpp::R_ARM_LDC_SB_G2
:
9054 case elfcpp::R_ARM_MOVW_BREL_NC
:
9055 case elfcpp::R_ARM_MOVT_BREL
:
9056 case elfcpp::R_ARM_MOVW_BREL
:
9057 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9058 case elfcpp::R_ARM_THM_MOVT_BREL
:
9059 case elfcpp::R_ARM_THM_MOVW_BREL
:
9060 // Relative addressing relocations.
9062 // Make a dynamic relocation if necessary.
9063 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
9065 if (parameters
->options().output_is_executable()
9066 && target
->may_need_copy_reloc(gsym
))
9068 target
->copy_reloc(symtab
, layout
, object
,
9069 data_shndx
, output_section
, gsym
, reloc
);
9073 check_non_pic(object
, r_type
);
9074 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9075 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
9076 data_shndx
, reloc
.get_r_offset());
9082 case elfcpp::R_ARM_THM_CALL
:
9083 case elfcpp::R_ARM_PLT32
:
9084 case elfcpp::R_ARM_CALL
:
9085 case elfcpp::R_ARM_JUMP24
:
9086 case elfcpp::R_ARM_THM_JUMP24
:
9087 case elfcpp::R_ARM_SBREL31
:
9088 case elfcpp::R_ARM_PREL31
:
9089 case elfcpp::R_ARM_THM_JUMP19
:
9090 case elfcpp::R_ARM_THM_JUMP6
:
9091 case elfcpp::R_ARM_THM_JUMP11
:
9092 case elfcpp::R_ARM_THM_JUMP8
:
9093 // All the relocation above are branches except for the PREL31 ones.
9094 // A PREL31 relocation can point to a personality function in a shared
9095 // library. In that case we want to use a PLT because we want to
9096 // call the personality routine and the dynamic linkers we care about
9097 // do not support dynamic PREL31 relocations. An REL31 relocation may
9098 // point to a function whose unwinding behaviour is being described but
9099 // we will not mistakenly generate a PLT for that because we should use
9100 // a local section symbol.
9102 // If the symbol is fully resolved, this is just a relative
9103 // local reloc. Otherwise we need a PLT entry.
9104 if (gsym
->final_value_is_known())
9106 // If building a shared library, we can also skip the PLT entry
9107 // if the symbol is defined in the output file and is protected
9109 if (gsym
->is_defined()
9110 && !gsym
->is_from_dynobj()
9111 && !gsym
->is_preemptible())
9113 target
->make_plt_entry(symtab
, layout
, gsym
);
9116 case elfcpp::R_ARM_GOT_BREL
:
9117 case elfcpp::R_ARM_GOT_ABS
:
9118 case elfcpp::R_ARM_GOT_PREL
:
9120 // The symbol requires a GOT entry.
9121 Arm_output_data_got
<big_endian
>* got
=
9122 target
->got_section(symtab
, layout
);
9123 if (gsym
->final_value_is_known())
9125 // For a STT_GNU_IFUNC symbol we want the PLT address.
9126 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
9127 got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9129 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9133 // If this symbol is not fully resolved, we need to add a
9134 // GOT entry with a dynamic relocation.
9135 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9136 if (gsym
->is_from_dynobj()
9137 || gsym
->is_undefined()
9138 || gsym
->is_preemptible()
9139 || (gsym
->visibility() == elfcpp::STV_PROTECTED
9140 && parameters
->options().shared())
9141 || (gsym
->type() == elfcpp::STT_GNU_IFUNC
9142 && parameters
->options().output_is_position_independent()))
9143 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
9144 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
9147 // For a STT_GNU_IFUNC symbol we want to write the PLT
9148 // offset into the GOT, so that function pointer
9149 // comparisons work correctly.
9151 if (gsym
->type() != elfcpp::STT_GNU_IFUNC
)
9152 is_new
= got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9155 is_new
= got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9156 // Tell the dynamic linker to use the PLT address
9157 // when resolving relocations.
9158 if (gsym
->is_from_dynobj()
9159 && !parameters
->options().shared())
9160 gsym
->set_needs_dynsym_value();
9163 rel_dyn
->add_global_relative(
9164 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
9165 gsym
->got_offset(GOT_TYPE_STANDARD
));
9171 case elfcpp::R_ARM_TARGET1
:
9172 case elfcpp::R_ARM_TARGET2
:
9173 // These should have been mapped to other types already.
9175 case elfcpp::R_ARM_COPY
:
9176 case elfcpp::R_ARM_GLOB_DAT
:
9177 case elfcpp::R_ARM_JUMP_SLOT
:
9178 case elfcpp::R_ARM_RELATIVE
:
9179 // These are relocations which should only be seen by the
9180 // dynamic linker, and should never be seen here.
9181 gold_error(_("%s: unexpected reloc %u in object file"),
9182 object
->name().c_str(), r_type
);
9185 // These are initial tls relocs, which are expected when
9187 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9188 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9189 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9190 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9191 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9193 const bool is_final
= gsym
->final_value_is_known();
9194 const tls::Tls_optimization optimized_type
9195 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9198 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9199 if (optimized_type
== tls::TLSOPT_NONE
)
9201 // Create a pair of GOT entries for the module index and
9202 // dtv-relative offset.
9203 Arm_output_data_got
<big_endian
>* got
9204 = target
->got_section(symtab
, layout
);
9205 if (!parameters
->doing_static_link())
9206 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
9207 target
->rel_dyn_section(layout
),
9208 elfcpp::R_ARM_TLS_DTPMOD32
,
9209 elfcpp::R_ARM_TLS_DTPOFF32
);
9211 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
9214 // FIXME: TLS optimization not supported yet.
9218 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9219 if (optimized_type
== tls::TLSOPT_NONE
)
9221 // Create a GOT entry for the module index.
9222 target
->got_mod_index_entry(symtab
, layout
, object
);
9225 // FIXME: TLS optimization not supported yet.
9229 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9232 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9233 layout
->set_has_static_tls();
9234 if (optimized_type
== tls::TLSOPT_NONE
)
9236 // Create a GOT entry for the tp-relative offset.
9237 Arm_output_data_got
<big_endian
>* got
9238 = target
->got_section(symtab
, layout
);
9239 if (!parameters
->doing_static_link())
9240 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
9241 target
->rel_dyn_section(layout
),
9242 elfcpp::R_ARM_TLS_TPOFF32
);
9243 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
9245 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
9246 unsigned int got_offset
=
9247 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
9248 got
->add_static_reloc(got_offset
,
9249 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
9253 // FIXME: TLS optimization not supported yet.
9257 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9258 layout
->set_has_static_tls();
9259 if (parameters
->options().shared())
9261 // We need to create a dynamic relocation.
9262 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9263 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
9264 output_section
, object
,
9265 data_shndx
, reloc
.get_r_offset());
9275 case elfcpp::R_ARM_PC24
:
9276 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9277 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9278 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9280 unsupported_reloc_global(object
, r_type
, gsym
);
9285 // Process relocations for gc.
9287 template<bool big_endian
>
9289 Target_arm
<big_endian
>::gc_process_relocs(
9290 Symbol_table
* symtab
,
9292 Sized_relobj_file
<32, big_endian
>* object
,
9293 unsigned int data_shndx
,
9295 const unsigned char* prelocs
,
9297 Output_section
* output_section
,
9298 bool needs_special_offset_handling
,
9299 size_t local_symbol_count
,
9300 const unsigned char* plocal_symbols
)
9302 typedef Target_arm
<big_endian
> Arm
;
9303 typedef typename Target_arm
<big_endian
>::Scan Scan
;
9305 gold::gc_process_relocs
<32, big_endian
, Arm
, Scan
, Classify_reloc
>(
9314 needs_special_offset_handling
,
9319 // Scan relocations for a section.
9321 template<bool big_endian
>
9323 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
9325 Sized_relobj_file
<32, big_endian
>* object
,
9326 unsigned int data_shndx
,
9327 unsigned int sh_type
,
9328 const unsigned char* prelocs
,
9330 Output_section
* output_section
,
9331 bool needs_special_offset_handling
,
9332 size_t local_symbol_count
,
9333 const unsigned char* plocal_symbols
)
9335 if (sh_type
== elfcpp::SHT_RELA
)
9337 gold_error(_("%s: unsupported RELA reloc section"),
9338 object
->name().c_str());
9342 gold::scan_relocs
<32, big_endian
, Target_arm
, Scan
, Classify_reloc
>(
9351 needs_special_offset_handling
,
9356 // Finalize the sections.
9358 template<bool big_endian
>
9360 Target_arm
<big_endian
>::do_finalize_sections(
9362 const Input_objects
* input_objects
,
9365 bool merged_any_attributes
= false;
9366 // Merge processor-specific flags.
9367 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
9368 p
!= input_objects
->relobj_end();
9371 Arm_relobj
<big_endian
>* arm_relobj
=
9372 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
9373 if (arm_relobj
->merge_flags_and_attributes())
9375 this->merge_processor_specific_flags(
9377 arm_relobj
->processor_specific_flags());
9378 this->merge_object_attributes(arm_relobj
->name().c_str(),
9379 arm_relobj
->attributes_section_data());
9380 merged_any_attributes
= true;
9384 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
9385 p
!= input_objects
->dynobj_end();
9388 Arm_dynobj
<big_endian
>* arm_dynobj
=
9389 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
9390 this->merge_processor_specific_flags(
9392 arm_dynobj
->processor_specific_flags());
9393 this->merge_object_attributes(arm_dynobj
->name().c_str(),
9394 arm_dynobj
->attributes_section_data());
9395 merged_any_attributes
= true;
9398 // Create an empty uninitialized attribute section if we still don't have it
9399 // at this moment. This happens if there is no attributes sections in all
9401 if (this->attributes_section_data_
== NULL
)
9402 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
9404 const Object_attribute
* cpu_arch_attr
=
9405 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
9406 // Check if we need to use Cortex-A8 workaround.
9407 if (parameters
->options().user_set_fix_cortex_a8())
9408 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
9411 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9412 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9414 const Object_attribute
* cpu_arch_profile_attr
=
9415 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
9416 this->fix_cortex_a8_
=
9417 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
9418 && (cpu_arch_profile_attr
->int_value() == 'A'
9419 || cpu_arch_profile_attr
->int_value() == 0));
9422 // Check if we can use V4BX interworking.
9423 // The V4BX interworking stub contains BX instruction,
9424 // which is not specified for some profiles.
9425 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9426 && !this->may_use_v4t_interworking())
9427 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9428 "the target profile does not support BX instruction"));
9430 // Fill in some more dynamic tags.
9431 const Reloc_section
* rel_plt
= (this->plt_
== NULL
9433 : this->plt_
->rel_plt());
9434 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
9435 this->rel_dyn_
, true, false);
9437 // Emit any relocs we saved in an attempt to avoid generating COPY
9439 if (this->copy_relocs_
.any_saved_relocs())
9440 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
9442 // Handle the .ARM.exidx section.
9443 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
9445 if (!parameters
->options().relocatable())
9447 if (exidx_section
!= NULL
9448 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
9450 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9451 // the .ARM.exidx section.
9452 if (!layout
->script_options()->saw_phdrs_clause())
9454 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
9457 Output_segment
* exidx_segment
=
9458 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
9459 exidx_segment
->add_output_section_to_nonload(exidx_section
,
9465 // Create an .ARM.attributes section if we have merged any attributes
9467 if (merged_any_attributes
)
9469 Output_attributes_section_data
* attributes_section
=
9470 new Output_attributes_section_data(*this->attributes_section_data_
);
9471 layout
->add_output_section_data(".ARM.attributes",
9472 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
9473 attributes_section
, ORDER_INVALID
,
9477 // Fix up links in section EXIDX headers.
9478 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
9479 p
!= layout
->section_list().end();
9481 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
9483 Arm_output_section
<big_endian
>* os
=
9484 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9485 os
->set_exidx_section_link();
9489 // Return whether a direct absolute static relocation needs to be applied.
9490 // In cases where Scan::local() or Scan::global() has created
9491 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9492 // of the relocation is carried in the data, and we must not
9493 // apply the static relocation.
9495 template<bool big_endian
>
9497 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
9498 const Sized_symbol
<32>* gsym
,
9499 unsigned int r_type
,
9501 Output_section
* output_section
)
9503 // If the output section is not allocated, then we didn't call
9504 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9506 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
9509 int ref_flags
= Scan::get_reference_flags(r_type
);
9511 // For local symbols, we will have created a non-RELATIVE dynamic
9512 // relocation only if (a) the output is position independent,
9513 // (b) the relocation is absolute (not pc- or segment-relative), and
9514 // (c) the relocation is not 32 bits wide.
9516 return !(parameters
->options().output_is_position_independent()
9517 && (ref_flags
& Symbol::ABSOLUTE_REF
)
9520 // For global symbols, we use the same helper routines used in the
9521 // scan pass. If we did not create a dynamic relocation, or if we
9522 // created a RELATIVE dynamic relocation, we should apply the static
9524 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
9525 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
9526 && gsym
->can_use_relative_reloc(ref_flags
9527 & Symbol::FUNCTION_CALL
);
9528 return !has_dyn
|| is_rel
;
9531 // Perform a relocation.
9533 template<bool big_endian
>
9535 Target_arm
<big_endian
>::Relocate::relocate(
9536 const Relocate_info
<32, big_endian
>* relinfo
,
9539 Output_section
* output_section
,
9541 const unsigned char* preloc
,
9542 const Sized_symbol
<32>* gsym
,
9543 const Symbol_value
<32>* psymval
,
9544 unsigned char* view
,
9545 Arm_address address
,
9546 section_size_type view_size
)
9551 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
9553 const elfcpp::Rel
<32, big_endian
> rel(preloc
);
9554 unsigned int r_type
= elfcpp::elf_r_type
<32>(rel
.get_r_info());
9555 r_type
= get_real_reloc_type(r_type
);
9556 const Arm_reloc_property
* reloc_property
=
9557 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9558 if (reloc_property
== NULL
)
9560 std::string reloc_name
=
9561 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9562 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9563 _("cannot relocate %s in object file"),
9564 reloc_name
.c_str());
9568 const Arm_relobj
<big_endian
>* object
=
9569 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9571 // If the final branch target of a relocation is THUMB instruction, this
9572 // is 1. Otherwise it is 0.
9573 Arm_address thumb_bit
= 0;
9574 Symbol_value
<32> symval
;
9575 bool is_weakly_undefined_without_plt
= false;
9576 bool have_got_offset
= false;
9577 unsigned int got_offset
= 0;
9579 // If the relocation uses the GOT entry of a symbol instead of the symbol
9580 // itself, we don't care about whether the symbol is defined or what kind
9582 if (reloc_property
->uses_got_entry())
9584 // Get the GOT offset.
9585 // The GOT pointer points to the end of the GOT section.
9586 // We need to subtract the size of the GOT section to get
9587 // the actual offset to use in the relocation.
9588 // TODO: We should move GOT offset computing code in TLS relocations
9592 case elfcpp::R_ARM_GOT_BREL
:
9593 case elfcpp::R_ARM_GOT_PREL
:
9596 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
9597 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
9598 - target
->got_size());
9602 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9603 gold_assert(object
->local_has_got_offset(r_sym
,
9604 GOT_TYPE_STANDARD
));
9605 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
9606 - target
->got_size());
9608 have_got_offset
= true;
9615 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
9619 // This is a global symbol. Determine if we use PLT and if the
9620 // final target is THUMB.
9621 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
9623 // This uses a PLT, change the symbol value.
9624 symval
.set_output_value(target
->plt_address_for_global(gsym
));
9627 else if (gsym
->is_weak_undefined())
9629 // This is a weakly undefined symbol and we do not use PLT
9630 // for this relocation. A branch targeting this symbol will
9631 // be converted into an NOP.
9632 is_weakly_undefined_without_plt
= true;
9634 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
9636 // This relocation uses the symbol value but the symbol is
9637 // undefined. Exit early and have the caller reporting an
9643 // Set thumb bit if symbol:
9644 // -Has type STT_ARM_TFUNC or
9645 // -Has type STT_FUNC, is defined and with LSB in value set.
9647 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
9648 || (gsym
->type() == elfcpp::STT_FUNC
9649 && !gsym
->is_undefined()
9650 && ((psymval
->value(object
, 0) & 1) != 0)))
9657 // This is a local symbol. Determine if the final target is THUMB.
9658 // We saved this information when all the local symbols were read.
9659 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
9660 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9661 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9663 if (psymval
->is_ifunc_symbol() && object
->local_has_plt_offset(r_sym
))
9665 symval
.set_output_value(
9666 target
->plt_address_for_local(object
, r_sym
));
9673 // This is a fake relocation synthesized for a stub. It does not have
9674 // a real symbol. We just look at the LSB of the symbol value to
9675 // determine if the target is THUMB or not.
9676 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
9679 // Strip LSB if this points to a THUMB target.
9681 && reloc_property
->uses_thumb_bit()
9682 && ((psymval
->value(object
, 0) & 1) != 0))
9684 Arm_address stripped_value
=
9685 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9686 symval
.set_output_value(stripped_value
);
9690 // To look up relocation stubs, we need to pass the symbol table index of
9692 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9694 // Get the addressing origin of the output segment defining the
9695 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9696 Arm_address sym_origin
= 0;
9697 if (reloc_property
->uses_symbol_base())
9699 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
9700 // R_ARM_BASE_ABS with the NULL symbol will give the
9701 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9702 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9703 sym_origin
= target
->got_plt_section()->address();
9704 else if (gsym
== NULL
)
9706 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
9707 sym_origin
= gsym
->output_segment()->vaddr();
9708 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
9709 sym_origin
= gsym
->output_data()->address();
9711 // TODO: Assumes the segment base to be zero for the global symbols
9712 // till the proper support for the segment-base-relative addressing
9713 // will be implemented. This is consistent with GNU ld.
9716 // For relative addressing relocation, find out the relative address base.
9717 Arm_address relative_address_base
= 0;
9718 switch(reloc_property
->relative_address_base())
9720 case Arm_reloc_property::RAB_NONE
:
9721 // Relocations with relative address bases RAB_TLS and RAB_tp are
9722 // handled by relocate_tls. So we do not need to do anything here.
9723 case Arm_reloc_property::RAB_TLS
:
9724 case Arm_reloc_property::RAB_tp
:
9726 case Arm_reloc_property::RAB_B_S
:
9727 relative_address_base
= sym_origin
;
9729 case Arm_reloc_property::RAB_GOT_ORG
:
9730 relative_address_base
= target
->got_plt_section()->address();
9732 case Arm_reloc_property::RAB_P
:
9733 relative_address_base
= address
;
9735 case Arm_reloc_property::RAB_Pa
:
9736 relative_address_base
= address
& 0xfffffffcU
;
9742 typename
Arm_relocate_functions::Status reloc_status
=
9743 Arm_relocate_functions::STATUS_OKAY
;
9744 bool check_overflow
= reloc_property
->checks_overflow();
9747 case elfcpp::R_ARM_NONE
:
9750 case elfcpp::R_ARM_ABS8
:
9751 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9752 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
9755 case elfcpp::R_ARM_ABS12
:
9756 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9757 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
9760 case elfcpp::R_ARM_ABS16
:
9761 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9762 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
9765 case elfcpp::R_ARM_ABS32
:
9766 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9767 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9771 case elfcpp::R_ARM_ABS32_NOI
:
9772 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9773 // No thumb bit for this relocation: (S + A)
9774 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9778 case elfcpp::R_ARM_MOVW_ABS_NC
:
9779 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9780 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
9785 case elfcpp::R_ARM_MOVT_ABS
:
9786 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9787 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
9790 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9791 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9792 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9793 0, thumb_bit
, false);
9796 case elfcpp::R_ARM_THM_MOVT_ABS
:
9797 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9798 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
9802 case elfcpp::R_ARM_MOVW_PREL_NC
:
9803 case elfcpp::R_ARM_MOVW_BREL_NC
:
9804 case elfcpp::R_ARM_MOVW_BREL
:
9806 Arm_relocate_functions::movw(view
, object
, psymval
,
9807 relative_address_base
, thumb_bit
,
9811 case elfcpp::R_ARM_MOVT_PREL
:
9812 case elfcpp::R_ARM_MOVT_BREL
:
9814 Arm_relocate_functions::movt(view
, object
, psymval
,
9815 relative_address_base
);
9818 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9819 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9820 case elfcpp::R_ARM_THM_MOVW_BREL
:
9822 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9823 relative_address_base
,
9824 thumb_bit
, check_overflow
);
9827 case elfcpp::R_ARM_THM_MOVT_PREL
:
9828 case elfcpp::R_ARM_THM_MOVT_BREL
:
9830 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9831 relative_address_base
);
9834 case elfcpp::R_ARM_REL32
:
9835 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9836 address
, thumb_bit
);
9839 case elfcpp::R_ARM_THM_ABS5
:
9840 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9841 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9844 // Thumb long branches.
9845 case elfcpp::R_ARM_THM_CALL
:
9846 case elfcpp::R_ARM_THM_XPC22
:
9847 case elfcpp::R_ARM_THM_JUMP24
:
9849 Arm_relocate_functions::thumb_branch_common(
9850 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9851 thumb_bit
, is_weakly_undefined_without_plt
);
9854 case elfcpp::R_ARM_GOTOFF32
:
9856 Arm_address got_origin
;
9857 got_origin
= target
->got_plt_section()->address();
9858 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9859 got_origin
, thumb_bit
);
9863 case elfcpp::R_ARM_BASE_PREL
:
9864 gold_assert(gsym
!= NULL
);
9866 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9869 case elfcpp::R_ARM_BASE_ABS
:
9870 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9871 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9874 case elfcpp::R_ARM_GOT_BREL
:
9875 gold_assert(have_got_offset
);
9876 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9879 case elfcpp::R_ARM_GOT_PREL
:
9880 gold_assert(have_got_offset
);
9881 // Get the address origin for GOT PLT, which is allocated right
9882 // after the GOT section, to calculate an absolute address of
9883 // the symbol GOT entry (got_origin + got_offset).
9884 Arm_address got_origin
;
9885 got_origin
= target
->got_plt_section()->address();
9886 reloc_status
= Arm_relocate_functions::got_prel(view
,
9887 got_origin
+ got_offset
,
9891 case elfcpp::R_ARM_PLT32
:
9892 case elfcpp::R_ARM_CALL
:
9893 case elfcpp::R_ARM_JUMP24
:
9894 case elfcpp::R_ARM_XPC25
:
9895 gold_assert(gsym
== NULL
9896 || gsym
->has_plt_offset()
9897 || gsym
->final_value_is_known()
9898 || (gsym
->is_defined()
9899 && !gsym
->is_from_dynobj()
9900 && !gsym
->is_preemptible()));
9902 Arm_relocate_functions::arm_branch_common(
9903 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9904 thumb_bit
, is_weakly_undefined_without_plt
);
9907 case elfcpp::R_ARM_THM_JUMP19
:
9909 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9913 case elfcpp::R_ARM_THM_JUMP6
:
9915 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9918 case elfcpp::R_ARM_THM_JUMP8
:
9920 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9923 case elfcpp::R_ARM_THM_JUMP11
:
9925 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9928 case elfcpp::R_ARM_PREL31
:
9929 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9930 address
, thumb_bit
);
9933 case elfcpp::R_ARM_V4BX
:
9934 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9936 const bool is_v4bx_interworking
=
9937 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9939 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9940 is_v4bx_interworking
);
9944 case elfcpp::R_ARM_THM_PC8
:
9946 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9949 case elfcpp::R_ARM_THM_PC12
:
9951 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9954 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9956 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9960 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9961 case elfcpp::R_ARM_ALU_PC_G0
:
9962 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9963 case elfcpp::R_ARM_ALU_PC_G1
:
9964 case elfcpp::R_ARM_ALU_PC_G2
:
9965 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9966 case elfcpp::R_ARM_ALU_SB_G0
:
9967 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9968 case elfcpp::R_ARM_ALU_SB_G1
:
9969 case elfcpp::R_ARM_ALU_SB_G2
:
9971 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9972 reloc_property
->group_index(),
9973 relative_address_base
,
9974 thumb_bit
, check_overflow
);
9977 case elfcpp::R_ARM_LDR_PC_G0
:
9978 case elfcpp::R_ARM_LDR_PC_G1
:
9979 case elfcpp::R_ARM_LDR_PC_G2
:
9980 case elfcpp::R_ARM_LDR_SB_G0
:
9981 case elfcpp::R_ARM_LDR_SB_G1
:
9982 case elfcpp::R_ARM_LDR_SB_G2
:
9984 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9985 reloc_property
->group_index(),
9986 relative_address_base
);
9989 case elfcpp::R_ARM_LDRS_PC_G0
:
9990 case elfcpp::R_ARM_LDRS_PC_G1
:
9991 case elfcpp::R_ARM_LDRS_PC_G2
:
9992 case elfcpp::R_ARM_LDRS_SB_G0
:
9993 case elfcpp::R_ARM_LDRS_SB_G1
:
9994 case elfcpp::R_ARM_LDRS_SB_G2
:
9996 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9997 reloc_property
->group_index(),
9998 relative_address_base
);
10001 case elfcpp::R_ARM_LDC_PC_G0
:
10002 case elfcpp::R_ARM_LDC_PC_G1
:
10003 case elfcpp::R_ARM_LDC_PC_G2
:
10004 case elfcpp::R_ARM_LDC_SB_G0
:
10005 case elfcpp::R_ARM_LDC_SB_G1
:
10006 case elfcpp::R_ARM_LDC_SB_G2
:
10008 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
10009 reloc_property
->group_index(),
10010 relative_address_base
);
10013 // These are initial tls relocs, which are expected when
10015 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
10016 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
10017 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
10018 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
10019 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
10021 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
10022 view
, address
, view_size
);
10025 // The known and unknown unsupported and/or deprecated relocations.
10026 case elfcpp::R_ARM_PC24
:
10027 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
10028 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
10029 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
10031 // Just silently leave the method. We should get an appropriate error
10032 // message in the scan methods.
10036 // Report any errors.
10037 switch (reloc_status
)
10039 case Arm_relocate_functions::STATUS_OKAY
:
10041 case Arm_relocate_functions::STATUS_OVERFLOW
:
10042 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
10043 _("relocation overflow in %s"),
10044 reloc_property
->name().c_str());
10046 case Arm_relocate_functions::STATUS_BAD_RELOC
:
10047 gold_error_at_location(
10050 rel
.get_r_offset(),
10051 _("unexpected opcode while processing relocation %s"),
10052 reloc_property
->name().c_str());
10055 gold_unreachable();
10061 // Perform a TLS relocation.
10063 template<bool big_endian
>
10064 inline typename Arm_relocate_functions
<big_endian
>::Status
10065 Target_arm
<big_endian
>::Relocate::relocate_tls(
10066 const Relocate_info
<32, big_endian
>* relinfo
,
10067 Target_arm
<big_endian
>* target
,
10069 const elfcpp::Rel
<32, big_endian
>& rel
,
10070 unsigned int r_type
,
10071 const Sized_symbol
<32>* gsym
,
10072 const Symbol_value
<32>* psymval
,
10073 unsigned char* view
,
10074 elfcpp::Elf_types
<32>::Elf_Addr address
,
10075 section_size_type
/*view_size*/ )
10077 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
10078 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
10079 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
10081 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
10083 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
10085 const bool is_final
= (gsym
== NULL
10086 ? !parameters
->options().shared()
10087 : gsym
->final_value_is_known());
10088 const tls::Tls_optimization optimized_type
10089 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
10092 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
10094 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
10095 unsigned int got_offset
;
10098 gold_assert(gsym
->has_got_offset(got_type
));
10099 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
10103 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
10104 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
10105 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
10106 - target
->got_size());
10108 if (optimized_type
== tls::TLSOPT_NONE
)
10110 Arm_address got_entry
=
10111 target
->got_plt_section()->address() + got_offset
;
10113 // Relocate the field with the PC relative offset of the pair of
10115 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10116 return ArmRelocFuncs::STATUS_OKAY
;
10121 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
10122 if (optimized_type
== tls::TLSOPT_NONE
)
10124 // Relocate the field with the offset of the GOT entry for
10125 // the module index.
10126 unsigned int got_offset
;
10127 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
10128 - target
->got_size());
10129 Arm_address got_entry
=
10130 target
->got_plt_section()->address() + got_offset
;
10132 // Relocate the field with the PC relative offset of the pair of
10134 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10135 return ArmRelocFuncs::STATUS_OKAY
;
10139 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
10140 RelocFuncs::rel32_unaligned(view
, value
);
10141 return ArmRelocFuncs::STATUS_OKAY
;
10143 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
10144 if (optimized_type
== tls::TLSOPT_NONE
)
10146 // Relocate the field with the offset of the GOT entry for
10147 // the tp-relative offset of the symbol.
10148 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
10149 unsigned int got_offset
;
10152 gold_assert(gsym
->has_got_offset(got_type
));
10153 got_offset
= gsym
->got_offset(got_type
);
10157 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
10158 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
10159 got_offset
= object
->local_got_offset(r_sym
, got_type
);
10162 // All GOT offsets are relative to the end of the GOT.
10163 got_offset
-= target
->got_size();
10165 Arm_address got_entry
=
10166 target
->got_plt_section()->address() + got_offset
;
10168 // Relocate the field with the PC relative offset of the GOT entry.
10169 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10170 return ArmRelocFuncs::STATUS_OKAY
;
10174 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
10175 // If we're creating a shared library, a dynamic relocation will
10176 // have been created for this location, so do not apply it now.
10177 if (!parameters
->options().shared())
10179 gold_assert(tls_segment
!= NULL
);
10181 // $tp points to the TCB, which is followed by the TLS, so we
10182 // need to add TCB size to the offset.
10183 Arm_address aligned_tcb_size
=
10184 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
10185 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
10188 return ArmRelocFuncs::STATUS_OKAY
;
10191 gold_unreachable();
10194 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
10195 _("unsupported reloc %u"),
10197 return ArmRelocFuncs::STATUS_BAD_RELOC
;
10200 // Relocate section data.
10202 template<bool big_endian
>
10204 Target_arm
<big_endian
>::relocate_section(
10205 const Relocate_info
<32, big_endian
>* relinfo
,
10206 unsigned int sh_type
,
10207 const unsigned char* prelocs
,
10208 size_t reloc_count
,
10209 Output_section
* output_section
,
10210 bool needs_special_offset_handling
,
10211 unsigned char* view
,
10212 Arm_address address
,
10213 section_size_type view_size
,
10214 const Reloc_symbol_changes
* reloc_symbol_changes
)
10216 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
10217 gold_assert(sh_type
== elfcpp::SHT_REL
);
10219 // See if we are relocating a relaxed input section. If so, the view
10220 // covers the whole output section and we need to adjust accordingly.
10221 if (needs_special_offset_handling
)
10223 const Output_relaxed_input_section
* poris
=
10224 output_section
->find_relaxed_input_section(relinfo
->object
,
10225 relinfo
->data_shndx
);
10228 Arm_address section_address
= poris
->address();
10229 section_size_type section_size
= poris
->data_size();
10231 gold_assert((section_address
>= address
)
10232 && ((section_address
+ section_size
)
10233 <= (address
+ view_size
)));
10235 off_t offset
= section_address
- address
;
10238 view_size
= section_size
;
10242 gold::relocate_section
<32, big_endian
, Target_arm
, Arm_relocate
,
10243 gold::Default_comdat_behavior
, Classify_reloc
>(
10249 needs_special_offset_handling
,
10253 reloc_symbol_changes
);
10256 // Return the size of a relocation while scanning during a relocatable
10259 template<bool big_endian
>
10261 Target_arm
<big_endian
>::Classify_reloc::get_size_for_reloc(
10262 unsigned int r_type
,
10265 r_type
= get_real_reloc_type(r_type
);
10266 const Arm_reloc_property
* arp
=
10267 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10269 return arp
->size();
10272 std::string reloc_name
=
10273 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
10274 gold_error(_("%s: unexpected %s in object file"),
10275 object
->name().c_str(), reloc_name
.c_str());
10280 // Scan the relocs during a relocatable link.
10282 template<bool big_endian
>
10284 Target_arm
<big_endian
>::scan_relocatable_relocs(
10285 Symbol_table
* symtab
,
10287 Sized_relobj_file
<32, big_endian
>* object
,
10288 unsigned int data_shndx
,
10289 unsigned int sh_type
,
10290 const unsigned char* prelocs
,
10291 size_t reloc_count
,
10292 Output_section
* output_section
,
10293 bool needs_special_offset_handling
,
10294 size_t local_symbol_count
,
10295 const unsigned char* plocal_symbols
,
10296 Relocatable_relocs
* rr
)
10298 typedef Arm_scan_relocatable_relocs
<big_endian
, Classify_reloc
>
10299 Scan_relocatable_relocs
;
10301 gold_assert(sh_type
== elfcpp::SHT_REL
);
10303 gold::scan_relocatable_relocs
<32, big_endian
, Scan_relocatable_relocs
>(
10311 needs_special_offset_handling
,
10312 local_symbol_count
,
10317 // Scan the relocs for --emit-relocs.
10319 template<bool big_endian
>
10321 Target_arm
<big_endian
>::emit_relocs_scan(Symbol_table
* symtab
,
10323 Sized_relobj_file
<32, big_endian
>* object
,
10324 unsigned int data_shndx
,
10325 unsigned int sh_type
,
10326 const unsigned char* prelocs
,
10327 size_t reloc_count
,
10328 Output_section
* output_section
,
10329 bool needs_special_offset_handling
,
10330 size_t local_symbol_count
,
10331 const unsigned char* plocal_syms
,
10332 Relocatable_relocs
* rr
)
10334 typedef gold::Default_classify_reloc
<elfcpp::SHT_REL
, 32, big_endian
>
10336 typedef gold::Default_emit_relocs_strategy
<Classify_reloc
>
10337 Emit_relocs_strategy
;
10339 gold_assert(sh_type
== elfcpp::SHT_REL
);
10341 gold::scan_relocatable_relocs
<32, big_endian
, Emit_relocs_strategy
>(
10349 needs_special_offset_handling
,
10350 local_symbol_count
,
10355 // Emit relocations for a section.
10357 template<bool big_endian
>
10359 Target_arm
<big_endian
>::relocate_relocs(
10360 const Relocate_info
<32, big_endian
>* relinfo
,
10361 unsigned int sh_type
,
10362 const unsigned char* prelocs
,
10363 size_t reloc_count
,
10364 Output_section
* output_section
,
10365 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10366 unsigned char* view
,
10367 Arm_address view_address
,
10368 section_size_type view_size
,
10369 unsigned char* reloc_view
,
10370 section_size_type reloc_view_size
)
10372 gold_assert(sh_type
== elfcpp::SHT_REL
);
10374 gold::relocate_relocs
<32, big_endian
, Classify_reloc
>(
10379 offset_in_output_section
,
10387 // Perform target-specific processing in a relocatable link. This is
10388 // only used if we use the relocation strategy RELOC_SPECIAL.
10390 template<bool big_endian
>
10392 Target_arm
<big_endian
>::relocate_special_relocatable(
10393 const Relocate_info
<32, big_endian
>* relinfo
,
10394 unsigned int sh_type
,
10395 const unsigned char* preloc_in
,
10397 Output_section
* output_section
,
10398 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10399 unsigned char* view
,
10400 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
10402 unsigned char* preloc_out
)
10404 // We can only handle REL type relocation sections.
10405 gold_assert(sh_type
== elfcpp::SHT_REL
);
10407 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
10408 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
10410 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
10412 const Arm_relobj
<big_endian
>* object
=
10413 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10414 const unsigned int local_count
= object
->local_symbol_count();
10416 Reltype
reloc(preloc_in
);
10417 Reltype_write
reloc_write(preloc_out
);
10419 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
10420 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
10421 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
10423 const Arm_reloc_property
* arp
=
10424 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10425 gold_assert(arp
!= NULL
);
10427 // Get the new symbol index.
10428 // We only use RELOC_SPECIAL strategy in local relocations.
10429 gold_assert(r_sym
< local_count
);
10431 // We are adjusting a section symbol. We need to find
10432 // the symbol table index of the section symbol for
10433 // the output section corresponding to input section
10434 // in which this symbol is defined.
10436 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
10437 gold_assert(is_ordinary
);
10438 Output_section
* os
= object
->output_section(shndx
);
10439 gold_assert(os
!= NULL
);
10440 gold_assert(os
->needs_symtab_index());
10441 unsigned int new_symndx
= os
->symtab_index();
10443 // Get the new offset--the location in the output section where
10444 // this relocation should be applied.
10446 Arm_address offset
= reloc
.get_r_offset();
10447 Arm_address new_offset
;
10448 if (offset_in_output_section
!= invalid_address
)
10449 new_offset
= offset
+ offset_in_output_section
;
10452 section_offset_type sot_offset
=
10453 convert_types
<section_offset_type
, Arm_address
>(offset
);
10454 section_offset_type new_sot_offset
=
10455 output_section
->output_offset(object
, relinfo
->data_shndx
,
10457 gold_assert(new_sot_offset
!= -1);
10458 new_offset
= new_sot_offset
;
10461 // In an object file, r_offset is an offset within the section.
10462 // In an executable or dynamic object, generated by
10463 // --emit-relocs, r_offset is an absolute address.
10464 if (!parameters
->options().relocatable())
10466 new_offset
+= view_address
;
10467 if (offset_in_output_section
!= invalid_address
)
10468 new_offset
-= offset_in_output_section
;
10471 reloc_write
.put_r_offset(new_offset
);
10472 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
10474 // Handle the reloc addend.
10475 // The relocation uses a section symbol in the input file.
10476 // We are adjusting it to use a section symbol in the output
10477 // file. The input section symbol refers to some address in
10478 // the input section. We need the relocation in the output
10479 // file to refer to that same address. This adjustment to
10480 // the addend is the same calculation we use for a simple
10481 // absolute relocation for the input section symbol.
10483 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
10485 // Handle THUMB bit.
10486 Symbol_value
<32> symval
;
10487 Arm_address thumb_bit
=
10488 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
10490 && arp
->uses_thumb_bit()
10491 && ((psymval
->value(object
, 0) & 1) != 0))
10493 Arm_address stripped_value
=
10494 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
10495 symval
.set_output_value(stripped_value
);
10499 unsigned char* paddend
= view
+ offset
;
10500 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
10501 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
10504 case elfcpp::R_ARM_ABS8
:
10505 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
10509 case elfcpp::R_ARM_ABS12
:
10510 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
10514 case elfcpp::R_ARM_ABS16
:
10515 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
10519 case elfcpp::R_ARM_THM_ABS5
:
10520 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
10525 case elfcpp::R_ARM_MOVW_ABS_NC
:
10526 case elfcpp::R_ARM_MOVW_PREL_NC
:
10527 case elfcpp::R_ARM_MOVW_BREL_NC
:
10528 case elfcpp::R_ARM_MOVW_BREL
:
10529 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
10530 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10533 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
10534 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
10535 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
10536 case elfcpp::R_ARM_THM_MOVW_BREL
:
10537 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
10538 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10541 case elfcpp::R_ARM_THM_CALL
:
10542 case elfcpp::R_ARM_THM_XPC22
:
10543 case elfcpp::R_ARM_THM_JUMP24
:
10545 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
10546 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10550 case elfcpp::R_ARM_PLT32
:
10551 case elfcpp::R_ARM_CALL
:
10552 case elfcpp::R_ARM_JUMP24
:
10553 case elfcpp::R_ARM_XPC25
:
10555 Arm_relocate_functions
<big_endian
>::arm_branch_common(
10556 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10560 case elfcpp::R_ARM_THM_JUMP19
:
10562 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
10563 psymval
, 0, thumb_bit
);
10566 case elfcpp::R_ARM_THM_JUMP6
:
10568 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
10572 case elfcpp::R_ARM_THM_JUMP8
:
10574 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
10578 case elfcpp::R_ARM_THM_JUMP11
:
10580 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
10584 case elfcpp::R_ARM_PREL31
:
10586 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
10590 case elfcpp::R_ARM_THM_PC8
:
10592 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
10596 case elfcpp::R_ARM_THM_PC12
:
10598 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
10602 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
10604 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
10608 // These relocation truncate relocation results so we cannot handle them
10609 // in a relocatable link.
10610 case elfcpp::R_ARM_MOVT_ABS
:
10611 case elfcpp::R_ARM_THM_MOVT_ABS
:
10612 case elfcpp::R_ARM_MOVT_PREL
:
10613 case elfcpp::R_ARM_MOVT_BREL
:
10614 case elfcpp::R_ARM_THM_MOVT_PREL
:
10615 case elfcpp::R_ARM_THM_MOVT_BREL
:
10616 case elfcpp::R_ARM_ALU_PC_G0_NC
:
10617 case elfcpp::R_ARM_ALU_PC_G0
:
10618 case elfcpp::R_ARM_ALU_PC_G1_NC
:
10619 case elfcpp::R_ARM_ALU_PC_G1
:
10620 case elfcpp::R_ARM_ALU_PC_G2
:
10621 case elfcpp::R_ARM_ALU_SB_G0_NC
:
10622 case elfcpp::R_ARM_ALU_SB_G0
:
10623 case elfcpp::R_ARM_ALU_SB_G1_NC
:
10624 case elfcpp::R_ARM_ALU_SB_G1
:
10625 case elfcpp::R_ARM_ALU_SB_G2
:
10626 case elfcpp::R_ARM_LDR_PC_G0
:
10627 case elfcpp::R_ARM_LDR_PC_G1
:
10628 case elfcpp::R_ARM_LDR_PC_G2
:
10629 case elfcpp::R_ARM_LDR_SB_G0
:
10630 case elfcpp::R_ARM_LDR_SB_G1
:
10631 case elfcpp::R_ARM_LDR_SB_G2
:
10632 case elfcpp::R_ARM_LDRS_PC_G0
:
10633 case elfcpp::R_ARM_LDRS_PC_G1
:
10634 case elfcpp::R_ARM_LDRS_PC_G2
:
10635 case elfcpp::R_ARM_LDRS_SB_G0
:
10636 case elfcpp::R_ARM_LDRS_SB_G1
:
10637 case elfcpp::R_ARM_LDRS_SB_G2
:
10638 case elfcpp::R_ARM_LDC_PC_G0
:
10639 case elfcpp::R_ARM_LDC_PC_G1
:
10640 case elfcpp::R_ARM_LDC_PC_G2
:
10641 case elfcpp::R_ARM_LDC_SB_G0
:
10642 case elfcpp::R_ARM_LDC_SB_G1
:
10643 case elfcpp::R_ARM_LDC_SB_G2
:
10644 gold_error(_("cannot handle %s in a relocatable link"),
10645 arp
->name().c_str());
10649 gold_unreachable();
10652 // Report any errors.
10653 switch (reloc_status
)
10655 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
10657 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
10658 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10659 _("relocation overflow in %s"),
10660 arp
->name().c_str());
10662 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
10663 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10664 _("unexpected opcode while processing relocation %s"),
10665 arp
->name().c_str());
10668 gold_unreachable();
10672 // Return the value to use for a dynamic symbol which requires special
10673 // treatment. This is how we support equality comparisons of function
10674 // pointers across shared library boundaries, as described in the
10675 // processor specific ABI supplement.
10677 template<bool big_endian
>
10679 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
10681 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
10682 return this->plt_address_for_global(gsym
);
10685 // Map platform-specific relocs to real relocs
10687 template<bool big_endian
>
10689 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
10693 case elfcpp::R_ARM_TARGET1
:
10694 // This is either R_ARM_ABS32 or R_ARM_REL32;
10695 return elfcpp::R_ARM_ABS32
;
10697 case elfcpp::R_ARM_TARGET2
:
10698 // This can be any reloc type but usually is R_ARM_GOT_PREL
10699 return elfcpp::R_ARM_GOT_PREL
;
10706 // Whether if two EABI versions V1 and V2 are compatible.
10708 template<bool big_endian
>
10710 Target_arm
<big_endian
>::are_eabi_versions_compatible(
10711 elfcpp::Elf_Word v1
,
10712 elfcpp::Elf_Word v2
)
10714 // v4 and v5 are the same spec before and after it was released,
10715 // so allow mixing them.
10716 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
10717 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
10718 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
10724 // Combine FLAGS from an input object called NAME and the processor-specific
10725 // flags in the ELF header of the output. Much of this is adapted from the
10726 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10727 // in bfd/elf32-arm.c.
10729 template<bool big_endian
>
10731 Target_arm
<big_endian
>::merge_processor_specific_flags(
10732 const std::string
& name
,
10733 elfcpp::Elf_Word flags
)
10735 if (this->are_processor_specific_flags_set())
10737 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
10739 // Nothing to merge if flags equal to those in output.
10740 if (flags
== out_flags
)
10743 // Complain about various flag mismatches.
10744 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
10745 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
10746 if (!this->are_eabi_versions_compatible(version1
, version2
)
10747 && parameters
->options().warn_mismatch())
10748 gold_error(_("Source object %s has EABI version %d but output has "
10749 "EABI version %d."),
10751 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
10752 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
10756 // If the input is the default architecture and had the default
10757 // flags then do not bother setting the flags for the output
10758 // architecture, instead allow future merges to do this. If no
10759 // future merges ever set these flags then they will retain their
10760 // uninitialised values, which surprise surprise, correspond
10761 // to the default values.
10765 // This is the first time, just copy the flags.
10766 // We only copy the EABI version for now.
10767 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
10771 // Adjust ELF file header.
10772 template<bool big_endian
>
10774 Target_arm
<big_endian
>::do_adjust_elf_header(
10775 unsigned char* view
,
10778 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
10780 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
10781 elfcpp::Elf_Word flags
= this->processor_specific_flags();
10782 unsigned char e_ident
[elfcpp::EI_NIDENT
];
10783 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
10785 if (elfcpp::arm_eabi_version(flags
)
10786 == elfcpp::EF_ARM_EABI_UNKNOWN
)
10787 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
10789 e_ident
[elfcpp::EI_OSABI
] = 0;
10790 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
10792 // Do EF_ARM_BE8 adjustment.
10793 if (parameters
->options().be8() && !big_endian
)
10794 gold_error("BE8 images only valid in big-endian mode.");
10795 if (parameters
->options().be8())
10797 flags
|= elfcpp::EF_ARM_BE8
;
10798 this->set_processor_specific_flags(flags
);
10801 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10803 if (elfcpp::arm_eabi_version(flags
) == elfcpp::EF_ARM_EABI_VER5
)
10805 elfcpp::Elf_Half type
= ehdr
.get_e_type();
10806 if (type
== elfcpp::ET_EXEC
|| type
== elfcpp::ET_DYN
)
10808 Object_attribute
* attr
= this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args
);
10809 if (attr
->int_value() == elfcpp::AEABI_VFP_args_vfp
)
10810 flags
|= elfcpp::EF_ARM_ABI_FLOAT_HARD
;
10812 flags
|= elfcpp::EF_ARM_ABI_FLOAT_SOFT
;
10813 this->set_processor_specific_flags(flags
);
10816 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
10817 oehdr
.put_e_ident(e_ident
);
10818 oehdr
.put_e_flags(this->processor_specific_flags());
10821 // do_make_elf_object to override the same function in the base class.
10822 // We need to use a target-specific sub-class of
10823 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10824 // Hence we need to have our own ELF object creation.
10826 template<bool big_endian
>
10828 Target_arm
<big_endian
>::do_make_elf_object(
10829 const std::string
& name
,
10830 Input_file
* input_file
,
10831 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
10833 int et
= ehdr
.get_e_type();
10834 // ET_EXEC files are valid input for --just-symbols/-R,
10835 // and we treat them as relocatable objects.
10836 if (et
== elfcpp::ET_REL
10837 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
10839 Arm_relobj
<big_endian
>* obj
=
10840 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10844 else if (et
== elfcpp::ET_DYN
)
10846 Sized_dynobj
<32, big_endian
>* obj
=
10847 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10853 gold_error(_("%s: unsupported ELF file type %d"),
10859 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10860 // Returns -1 if no architecture could be read.
10861 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10863 template<bool big_endian
>
10865 Target_arm
<big_endian
>::get_secondary_compatible_arch(
10866 const Attributes_section_data
* pasd
)
10868 const Object_attribute
* known_attributes
=
10869 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10871 // Note: the tag and its argument below are uleb128 values, though
10872 // currently-defined values fit in one byte for each.
10873 const std::string
& sv
=
10874 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10876 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10877 && (sv
.data()[1] & 128) != 128)
10878 return sv
.data()[1];
10880 // This tag is "safely ignorable", so don't complain if it looks funny.
10884 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10885 // The tag is removed if ARCH is -1.
10886 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10888 template<bool big_endian
>
10890 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10891 Attributes_section_data
* pasd
,
10894 Object_attribute
* known_attributes
=
10895 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10899 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10903 // Note: the tag and its argument below are uleb128 values, though
10904 // currently-defined values fit in one byte for each.
10906 sv
[0] = elfcpp::Tag_CPU_arch
;
10907 gold_assert(arch
!= 0);
10911 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10914 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10916 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10918 template<bool big_endian
>
10920 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10923 int* secondary_compat_out
,
10925 int secondary_compat
)
10927 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10928 static const int v6t2
[] =
10930 T(V6T2
), // PRE_V4.
10940 static const int v6k
[] =
10953 static const int v7
[] =
10967 static const int v6_m
[] =
10982 static const int v6s_m
[] =
10998 static const int v7e_m
[] =
11005 T(V7E_M
), // V5TEJ.
11012 T(V7E_M
), // V6S_M.
11015 static const int v8
[] =
11033 static const int v4t_plus_v6_m
[] =
11040 T(V5TEJ
), // V5TEJ.
11047 T(V6S_M
), // V6S_M.
11048 T(V7E_M
), // V7E_M.
11050 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
11052 static const int* comb
[] =
11061 // Pseudo-architecture.
11065 // Check we've not got a higher architecture than we know about.
11067 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
11069 gold_error(_("%s: unknown CPU architecture"), name
);
11073 // Override old tag if we have a Tag_also_compatible_with on the output.
11075 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
11076 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
11077 oldtag
= T(V4T_PLUS_V6_M
);
11079 // And override the new tag if we have a Tag_also_compatible_with on the
11082 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
11083 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
11084 newtag
= T(V4T_PLUS_V6_M
);
11086 // Architectures before V6KZ add features monotonically.
11087 int tagh
= std::max(oldtag
, newtag
);
11088 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
11091 int tagl
= std::min(oldtag
, newtag
);
11092 int result
= comb
[tagh
- T(V6T2
)][tagl
];
11094 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11095 // as the canonical version.
11096 if (result
== T(V4T_PLUS_V6_M
))
11099 *secondary_compat_out
= T(V6_M
);
11102 *secondary_compat_out
= -1;
11106 gold_error(_("%s: conflicting CPU architectures %d/%d"),
11107 name
, oldtag
, newtag
);
11115 // Helper to print AEABI enum tag value.
11117 template<bool big_endian
>
11119 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
11121 static const char* aeabi_enum_names
[] =
11122 { "", "variable-size", "32-bit", "" };
11123 const size_t aeabi_enum_names_size
=
11124 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
11126 if (value
< aeabi_enum_names_size
)
11127 return std::string(aeabi_enum_names
[value
]);
11131 sprintf(buffer
, "<unknown value %u>", value
);
11132 return std::string(buffer
);
11136 // Return the string value to store in TAG_CPU_name.
11138 template<bool big_endian
>
11140 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
11142 static const char* name_table
[] = {
11143 // These aren't real CPU names, but we can't guess
11144 // that from the architecture version alone.
11161 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
11163 if (value
< name_table_size
)
11164 return std::string(name_table
[value
]);
11168 sprintf(buffer
, "<unknown CPU value %u>", value
);
11169 return std::string(buffer
);
11173 // Query attributes object to see if integer divide instructions may be
11174 // present in an object.
11176 template<bool big_endian
>
11178 Target_arm
<big_endian
>::attributes_accept_div(int arch
, int profile
,
11179 const Object_attribute
* div_attr
)
11181 switch (div_attr
->int_value())
11184 // Integer divide allowed if instruction contained in
11186 if (arch
== elfcpp::TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
11188 else if (arch
>= elfcpp::TAG_CPU_ARCH_V7E_M
)
11194 // Integer divide explicitly prohibited.
11198 // Unrecognised case - treat as allowing divide everywhere.
11200 // Integer divide allowed in ARM state.
11205 // Query attributes object to see if integer divide instructions are
11206 // forbidden to be in the object. This is not the inverse of
11207 // attributes_accept_div.
11209 template<bool big_endian
>
11211 Target_arm
<big_endian
>::attributes_forbid_div(const Object_attribute
* div_attr
)
11213 return div_attr
->int_value() == 1;
11216 // Merge object attributes from input file called NAME with those of the
11217 // output. The input object attributes are in the object pointed by PASD.
11219 template<bool big_endian
>
11221 Target_arm
<big_endian
>::merge_object_attributes(
11223 const Attributes_section_data
* pasd
)
11225 // Return if there is no attributes section data.
11229 // If output has no object attributes, just copy.
11230 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
11231 if (this->attributes_section_data_
== NULL
)
11233 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
11234 Object_attribute
* out_attr
=
11235 this->attributes_section_data_
->known_attributes(vendor
);
11237 // We do not output objects with Tag_MPextension_use_legacy - we move
11238 // the attribute's value to Tag_MPextension_use. */
11239 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
11241 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
11242 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
11243 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11245 gold_error(_("%s has both the current and legacy "
11246 "Tag_MPextension_use attributes"),
11250 out_attr
[elfcpp::Tag_MPextension_use
] =
11251 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
11252 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
11253 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
11259 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
11260 Object_attribute
* out_attr
=
11261 this->attributes_section_data_
->known_attributes(vendor
);
11263 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11264 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11265 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
11267 // Ignore mismatches if the object doesn't use floating point. */
11268 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11269 == elfcpp::AEABI_FP_number_model_none
11270 || (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11271 != elfcpp::AEABI_FP_number_model_none
11272 && out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11273 == elfcpp::AEABI_VFP_args_compatible
))
11274 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
11275 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
11276 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11277 != elfcpp::AEABI_FP_number_model_none
11278 && in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11279 != elfcpp::AEABI_VFP_args_compatible
11280 && parameters
->options().warn_mismatch())
11281 gold_error(_("%s uses VFP register arguments, output does not"),
11285 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
11287 // Merge this attribute with existing attributes.
11290 case elfcpp::Tag_CPU_raw_name
:
11291 case elfcpp::Tag_CPU_name
:
11292 // These are merged after Tag_CPU_arch.
11295 case elfcpp::Tag_ABI_optimization_goals
:
11296 case elfcpp::Tag_ABI_FP_optimization_goals
:
11297 // Use the first value seen.
11300 case elfcpp::Tag_CPU_arch
:
11302 unsigned int saved_out_attr
= out_attr
->int_value();
11303 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11304 int secondary_compat
=
11305 this->get_secondary_compatible_arch(pasd
);
11306 int secondary_compat_out
=
11307 this->get_secondary_compatible_arch(
11308 this->attributes_section_data_
);
11309 out_attr
[i
].set_int_value(
11310 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
11311 &secondary_compat_out
,
11312 in_attr
[i
].int_value(),
11313 secondary_compat
));
11314 this->set_secondary_compatible_arch(this->attributes_section_data_
,
11315 secondary_compat_out
);
11317 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11318 if (out_attr
[i
].int_value() == saved_out_attr
)
11319 ; // Leave the names alone.
11320 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
11322 // The output architecture has been changed to match the
11323 // input architecture. Use the input names.
11324 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
11325 in_attr
[elfcpp::Tag_CPU_name
].string_value());
11326 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
11327 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
11331 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
11332 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
11335 // If we still don't have a value for Tag_CPU_name,
11336 // make one up now. Tag_CPU_raw_name remains blank.
11337 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
11339 const std::string cpu_name
=
11340 this->tag_cpu_name_value(out_attr
[i
].int_value());
11341 // FIXME: If we see an unknown CPU, this will be set
11342 // to "<unknown CPU n>", where n is the attribute value.
11343 // This is different from BFD, which leaves the name alone.
11344 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
11349 case elfcpp::Tag_ARM_ISA_use
:
11350 case elfcpp::Tag_THUMB_ISA_use
:
11351 case elfcpp::Tag_WMMX_arch
:
11352 case elfcpp::Tag_Advanced_SIMD_arch
:
11353 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11354 case elfcpp::Tag_ABI_FP_rounding
:
11355 case elfcpp::Tag_ABI_FP_exceptions
:
11356 case elfcpp::Tag_ABI_FP_user_exceptions
:
11357 case elfcpp::Tag_ABI_FP_number_model
:
11358 case elfcpp::Tag_VFP_HP_extension
:
11359 case elfcpp::Tag_CPU_unaligned_access
:
11360 case elfcpp::Tag_T2EE_use
:
11361 case elfcpp::Tag_Virtualization_use
:
11362 case elfcpp::Tag_MPextension_use
:
11363 // Use the largest value specified.
11364 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11365 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11368 case elfcpp::Tag_ABI_align8_preserved
:
11369 case elfcpp::Tag_ABI_PCS_RO_data
:
11370 // Use the smallest value specified.
11371 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11372 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11375 case elfcpp::Tag_ABI_align8_needed
:
11376 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
11377 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
11378 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
11381 // This error message should be enabled once all non-conforming
11382 // binaries in the toolchain have had the attributes set
11384 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11388 case elfcpp::Tag_ABI_FP_denormal
:
11389 case elfcpp::Tag_ABI_PCS_GOT_use
:
11391 // These tags have 0 = don't care, 1 = strong requirement,
11392 // 2 = weak requirement.
11393 static const int order_021
[3] = {0, 2, 1};
11395 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11396 // value if greater than 2 (for future-proofing).
11397 if ((in_attr
[i
].int_value() > 2
11398 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11399 || (in_attr
[i
].int_value() <= 2
11400 && out_attr
[i
].int_value() <= 2
11401 && (order_021
[in_attr
[i
].int_value()]
11402 > order_021
[out_attr
[i
].int_value()])))
11403 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11407 case elfcpp::Tag_CPU_arch_profile
:
11408 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
11410 // 0 will merge with anything.
11411 // 'A' and 'S' merge to 'A'.
11412 // 'R' and 'S' merge to 'R'.
11413 // 'M' and 'A|R|S' is an error.
11414 if (out_attr
[i
].int_value() == 0
11415 || (out_attr
[i
].int_value() == 'S'
11416 && (in_attr
[i
].int_value() == 'A'
11417 || in_attr
[i
].int_value() == 'R')))
11418 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11419 else if (in_attr
[i
].int_value() == 0
11420 || (in_attr
[i
].int_value() == 'S'
11421 && (out_attr
[i
].int_value() == 'A'
11422 || out_attr
[i
].int_value() == 'R')))
11424 else if (parameters
->options().warn_mismatch())
11427 (_("conflicting architecture profiles %c/%c"),
11428 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
11429 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
11433 case elfcpp::Tag_VFP_arch
:
11435 static const struct
11439 } vfp_versions
[7] =
11450 // Values greater than 6 aren't defined, so just pick the
11452 if (in_attr
[i
].int_value() > 6
11453 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11455 *out_attr
= *in_attr
;
11458 // The output uses the superset of input features
11459 // (ISA version) and registers.
11460 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
11461 vfp_versions
[out_attr
[i
].int_value()].ver
);
11462 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
11463 vfp_versions
[out_attr
[i
].int_value()].regs
);
11464 // This assumes all possible supersets are also a valid
11467 for (newval
= 6; newval
> 0; newval
--)
11469 if (regs
== vfp_versions
[newval
].regs
11470 && ver
== vfp_versions
[newval
].ver
)
11473 out_attr
[i
].set_int_value(newval
);
11476 case elfcpp::Tag_PCS_config
:
11477 if (out_attr
[i
].int_value() == 0)
11478 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11479 else if (in_attr
[i
].int_value() != 0
11480 && out_attr
[i
].int_value() != 0
11481 && parameters
->options().warn_mismatch())
11483 // It's sometimes ok to mix different configs, so this is only
11485 gold_warning(_("%s: conflicting platform configuration"), name
);
11488 case elfcpp::Tag_ABI_PCS_R9_use
:
11489 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11490 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11491 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11492 && parameters
->options().warn_mismatch())
11494 gold_error(_("%s: conflicting use of R9"), name
);
11496 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
11497 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11499 case elfcpp::Tag_ABI_PCS_RW_data
:
11500 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11501 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11502 != elfcpp::AEABI_R9_SB
)
11503 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11504 != elfcpp::AEABI_R9_unused
)
11505 && parameters
->options().warn_mismatch())
11507 gold_error(_("%s: SB relative addressing conflicts with use "
11511 // Use the smallest value specified.
11512 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11513 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11515 case elfcpp::Tag_ABI_PCS_wchar_t
:
11516 if (out_attr
[i
].int_value()
11517 && in_attr
[i
].int_value()
11518 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11519 && parameters
->options().warn_mismatch()
11520 && parameters
->options().wchar_size_warning())
11522 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11523 "use %u-byte wchar_t; use of wchar_t values "
11524 "across objects may fail"),
11525 name
, in_attr
[i
].int_value(),
11526 out_attr
[i
].int_value());
11528 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
11529 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11531 case elfcpp::Tag_ABI_enum_size
:
11532 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
11534 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
11535 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
11537 // The existing object is compatible with anything.
11538 // Use whatever requirements the new object has.
11539 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11541 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
11542 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11543 && parameters
->options().warn_mismatch()
11544 && parameters
->options().enum_size_warning())
11546 unsigned int in_value
= in_attr
[i
].int_value();
11547 unsigned int out_value
= out_attr
[i
].int_value();
11548 gold_warning(_("%s uses %s enums yet the output is to use "
11549 "%s enums; use of enum values across objects "
11552 this->aeabi_enum_name(in_value
).c_str(),
11553 this->aeabi_enum_name(out_value
).c_str());
11557 case elfcpp::Tag_ABI_VFP_args
:
11560 case elfcpp::Tag_ABI_WMMX_args
:
11561 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11562 && parameters
->options().warn_mismatch())
11564 gold_error(_("%s uses iWMMXt register arguments, output does "
11569 case Object_attribute::Tag_compatibility
:
11570 // Merged in target-independent code.
11572 case elfcpp::Tag_ABI_HardFP_use
:
11573 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11574 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
11575 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
11576 out_attr
[i
].set_int_value(3);
11577 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11578 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11580 case elfcpp::Tag_ABI_FP_16bit_format
:
11581 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
11583 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11584 && parameters
->options().warn_mismatch())
11585 gold_error(_("fp16 format mismatch between %s and output"),
11588 if (in_attr
[i
].int_value() != 0)
11589 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11592 case elfcpp::Tag_DIV_use
:
11594 // A value of zero on input means that the divide
11595 // instruction may be used if available in the base
11596 // architecture as specified via Tag_CPU_arch and
11597 // Tag_CPU_arch_profile. A value of 1 means that the user
11598 // did not want divide instructions. A value of 2
11599 // explicitly means that divide instructions were allowed
11600 // in ARM and Thumb state.
11602 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
)->
11604 int profile
= this->
11605 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
)->
11607 if (in_attr
[i
].int_value() == out_attr
[i
].int_value())
11611 else if (attributes_forbid_div(&in_attr
[i
])
11612 && !attributes_accept_div(arch
, profile
, &out_attr
[i
]))
11613 out_attr
[i
].set_int_value(1);
11614 else if (attributes_forbid_div(&out_attr
[i
])
11615 && attributes_accept_div(arch
, profile
, &in_attr
[i
]))
11616 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11617 else if (in_attr
[i
].int_value() == 2)
11618 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11622 case elfcpp::Tag_MPextension_use_legacy
:
11623 // We don't output objects with Tag_MPextension_use_legacy - we
11624 // move the value to Tag_MPextension_use.
11625 if (in_attr
[i
].int_value() != 0
11626 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
11628 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
11629 != in_attr
[i
].int_value())
11631 gold_error(_("%s has has both the current and legacy "
11632 "Tag_MPextension_use attributes"),
11637 if (in_attr
[i
].int_value()
11638 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11639 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
11643 case elfcpp::Tag_nodefaults
:
11644 // This tag is set if it exists, but the value is unused (and is
11645 // typically zero). We don't actually need to do anything here -
11646 // the merge happens automatically when the type flags are merged
11649 case elfcpp::Tag_also_compatible_with
:
11650 // Already done in Tag_CPU_arch.
11652 case elfcpp::Tag_conformance
:
11653 // Keep the attribute if it matches. Throw it away otherwise.
11654 // No attribute means no claim to conform.
11655 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
11656 out_attr
[i
].set_string_value("");
11661 const char* err_object
= NULL
;
11663 // The "known_obj_attributes" table does contain some undefined
11664 // attributes. Ensure that there are unused.
11665 if (out_attr
[i
].int_value() != 0
11666 || out_attr
[i
].string_value() != "")
11667 err_object
= "output";
11668 else if (in_attr
[i
].int_value() != 0
11669 || in_attr
[i
].string_value() != "")
11672 if (err_object
!= NULL
11673 && parameters
->options().warn_mismatch())
11675 // Attribute numbers >=64 (mod 128) can be safely ignored.
11676 if ((i
& 127) < 64)
11677 gold_error(_("%s: unknown mandatory EABI object attribute "
11681 gold_warning(_("%s: unknown EABI object attribute %d"),
11685 // Only pass on attributes that match in both inputs.
11686 if (!in_attr
[i
].matches(out_attr
[i
]))
11688 out_attr
[i
].set_int_value(0);
11689 out_attr
[i
].set_string_value("");
11694 // If out_attr was copied from in_attr then it won't have a type yet.
11695 if (in_attr
[i
].type() && !out_attr
[i
].type())
11696 out_attr
[i
].set_type(in_attr
[i
].type());
11699 // Merge Tag_compatibility attributes and any common GNU ones.
11700 this->attributes_section_data_
->merge(name
, pasd
);
11702 // Check for any attributes not known on ARM.
11703 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
11704 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
11705 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
11706 Other_attributes
* out_other_attributes
=
11707 this->attributes_section_data_
->other_attributes(vendor
);
11708 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
11710 while (in_iter
!= in_other_attributes
->end()
11711 || out_iter
!= out_other_attributes
->end())
11713 const char* err_object
= NULL
;
11716 // The tags for each list are in numerical order.
11717 // If the tags are equal, then merge.
11718 if (out_iter
!= out_other_attributes
->end()
11719 && (in_iter
== in_other_attributes
->end()
11720 || in_iter
->first
> out_iter
->first
))
11722 // This attribute only exists in output. We can't merge, and we
11723 // don't know what the tag means, so delete it.
11724 err_object
= "output";
11725 err_tag
= out_iter
->first
;
11726 int saved_tag
= out_iter
->first
;
11727 delete out_iter
->second
;
11728 out_other_attributes
->erase(out_iter
);
11729 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11731 else if (in_iter
!= in_other_attributes
->end()
11732 && (out_iter
!= out_other_attributes
->end()
11733 || in_iter
->first
< out_iter
->first
))
11735 // This attribute only exists in input. We can't merge, and we
11736 // don't know what the tag means, so ignore it.
11738 err_tag
= in_iter
->first
;
11741 else // The tags are equal.
11743 // As present, all attributes in the list are unknown, and
11744 // therefore can't be merged meaningfully.
11745 err_object
= "output";
11746 err_tag
= out_iter
->first
;
11748 // Only pass on attributes that match in both inputs.
11749 if (!in_iter
->second
->matches(*(out_iter
->second
)))
11751 // No match. Delete the attribute.
11752 int saved_tag
= out_iter
->first
;
11753 delete out_iter
->second
;
11754 out_other_attributes
->erase(out_iter
);
11755 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11759 // Matched. Keep the attribute and move to the next.
11765 if (err_object
&& parameters
->options().warn_mismatch())
11767 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11768 if ((err_tag
& 127) < 64)
11770 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11771 err_object
, err_tag
);
11775 gold_warning(_("%s: unknown EABI object attribute %d"),
11776 err_object
, err_tag
);
11782 // Stub-generation methods for Target_arm.
11784 // Make a new Arm_input_section object.
11786 template<bool big_endian
>
11787 Arm_input_section
<big_endian
>*
11788 Target_arm
<big_endian
>::new_arm_input_section(
11790 unsigned int shndx
)
11792 Section_id
sid(relobj
, shndx
);
11794 Arm_input_section
<big_endian
>* arm_input_section
=
11795 new Arm_input_section
<big_endian
>(relobj
, shndx
);
11796 arm_input_section
->init();
11798 // Register new Arm_input_section in map for look-up.
11799 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
11800 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
11802 // Make sure that it we have not created another Arm_input_section
11803 // for this input section already.
11804 gold_assert(ins
.second
);
11806 return arm_input_section
;
11809 // Find the Arm_input_section object corresponding to the SHNDX-th input
11810 // section of RELOBJ.
11812 template<bool big_endian
>
11813 Arm_input_section
<big_endian
>*
11814 Target_arm
<big_endian
>::find_arm_input_section(
11816 unsigned int shndx
) const
11818 Section_id
sid(relobj
, shndx
);
11819 typename
Arm_input_section_map::const_iterator p
=
11820 this->arm_input_section_map_
.find(sid
);
11821 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
11824 // Make a new stub table.
11826 template<bool big_endian
>
11827 Stub_table
<big_endian
>*
11828 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
11830 Stub_table
<big_endian
>* stub_table
=
11831 new Stub_table
<big_endian
>(owner
);
11832 this->stub_tables_
.push_back(stub_table
);
11834 stub_table
->set_address(owner
->address() + owner
->data_size());
11835 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
11836 stub_table
->finalize_data_size();
11841 // Scan a relocation for stub generation.
11843 template<bool big_endian
>
11845 Target_arm
<big_endian
>::scan_reloc_for_stub(
11846 const Relocate_info
<32, big_endian
>* relinfo
,
11847 unsigned int r_type
,
11848 const Sized_symbol
<32>* gsym
,
11849 unsigned int r_sym
,
11850 const Symbol_value
<32>* psymval
,
11851 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
11852 Arm_address address
)
11854 const Arm_relobj
<big_endian
>* arm_relobj
=
11855 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11857 bool target_is_thumb
;
11858 Symbol_value
<32> symval
;
11861 // This is a global symbol. Determine if we use PLT and if the
11862 // final target is THUMB.
11863 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
11865 // This uses a PLT, change the symbol value.
11866 symval
.set_output_value(this->plt_address_for_global(gsym
));
11868 target_is_thumb
= false;
11870 else if (gsym
->is_undefined())
11871 // There is no need to generate a stub symbol is undefined.
11876 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
11877 || (gsym
->type() == elfcpp::STT_FUNC
11878 && !gsym
->is_undefined()
11879 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
11884 // This is a local symbol. Determine if the final target is THUMB.
11885 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
11888 // Strip LSB if this points to a THUMB target.
11889 const Arm_reloc_property
* reloc_property
=
11890 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
11891 gold_assert(reloc_property
!= NULL
);
11892 if (target_is_thumb
11893 && reloc_property
->uses_thumb_bit()
11894 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
11896 Arm_address stripped_value
=
11897 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
11898 symval
.set_output_value(stripped_value
);
11902 // Get the symbol value.
11903 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
11905 // Owing to pipelining, the PC relative branches below actually skip
11906 // two instructions when the branch offset is 0.
11907 Arm_address destination
;
11910 case elfcpp::R_ARM_CALL
:
11911 case elfcpp::R_ARM_JUMP24
:
11912 case elfcpp::R_ARM_PLT32
:
11914 destination
= value
+ addend
+ 8;
11916 case elfcpp::R_ARM_THM_CALL
:
11917 case elfcpp::R_ARM_THM_XPC22
:
11918 case elfcpp::R_ARM_THM_JUMP24
:
11919 case elfcpp::R_ARM_THM_JUMP19
:
11921 destination
= value
+ addend
+ 4;
11924 gold_unreachable();
11927 Reloc_stub
* stub
= NULL
;
11928 Stub_type stub_type
=
11929 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
11931 if (stub_type
!= arm_stub_none
)
11933 // Try looking up an existing stub from a stub table.
11934 Stub_table
<big_endian
>* stub_table
=
11935 arm_relobj
->stub_table(relinfo
->data_shndx
);
11936 gold_assert(stub_table
!= NULL
);
11938 // Locate stub by destination.
11939 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
11941 // Create a stub if there is not one already
11942 stub
= stub_table
->find_reloc_stub(stub_key
);
11945 // create a new stub and add it to stub table.
11946 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11947 stub_table
->add_reloc_stub(stub
, stub_key
);
11950 // Record the destination address.
11951 stub
->set_destination_address(destination
11952 | (target_is_thumb
? 1 : 0));
11955 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11956 if (this->fix_cortex_a8_
11957 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11958 || r_type
== elfcpp::R_ARM_THM_JUMP19
11959 || r_type
== elfcpp::R_ARM_THM_CALL
11960 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11961 && (address
& 0xfffU
) == 0xffeU
)
11963 // Found a candidate. Note we haven't checked the destination is
11964 // within 4K here: if we do so (and don't create a record) we can't
11965 // tell that a branch should have been relocated when scanning later.
11966 this->cortex_a8_relocs_info_
[address
] =
11967 new Cortex_a8_reloc(stub
, r_type
,
11968 destination
| (target_is_thumb
? 1 : 0));
11972 // This function scans a relocation sections for stub generation.
11973 // The template parameter Relocate must be a class type which provides
11974 // a single function, relocate(), which implements the machine
11975 // specific part of a relocation.
11977 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11978 // SHT_REL or SHT_RELA.
11980 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11981 // of relocs. OUTPUT_SECTION is the output section.
11982 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11983 // mapped to output offsets.
11985 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11986 // VIEW_SIZE is the size. These refer to the input section, unless
11987 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11988 // the output section.
11990 template<bool big_endian
>
11991 template<int sh_type
>
11993 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11994 const Relocate_info
<32, big_endian
>* relinfo
,
11995 const unsigned char* prelocs
,
11996 size_t reloc_count
,
11997 Output_section
* output_section
,
11998 bool needs_special_offset_handling
,
11999 const unsigned char* view
,
12000 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
12003 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
12004 const int reloc_size
=
12005 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
12007 Arm_relobj
<big_endian
>* arm_object
=
12008 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
12009 unsigned int local_count
= arm_object
->local_symbol_count();
12011 gold::Default_comdat_behavior default_comdat_behavior
;
12012 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
12014 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
12016 Reltype
reloc(prelocs
);
12018 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
12019 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
12020 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
12022 r_type
= this->get_real_reloc_type(r_type
);
12024 // Only a few relocation types need stubs.
12025 if ((r_type
!= elfcpp::R_ARM_CALL
)
12026 && (r_type
!= elfcpp::R_ARM_JUMP24
)
12027 && (r_type
!= elfcpp::R_ARM_PLT32
)
12028 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
12029 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
12030 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
12031 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
12032 && (r_type
!= elfcpp::R_ARM_V4BX
))
12035 section_offset_type offset
=
12036 convert_to_section_size_type(reloc
.get_r_offset());
12038 if (needs_special_offset_handling
)
12040 offset
= output_section
->output_offset(relinfo
->object
,
12041 relinfo
->data_shndx
,
12047 // Create a v4bx stub if --fix-v4bx-interworking is used.
12048 if (r_type
== elfcpp::R_ARM_V4BX
)
12050 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
12052 // Get the BX instruction.
12053 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
12054 const Valtype
* wv
=
12055 reinterpret_cast<const Valtype
*>(view
+ offset
);
12056 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
12057 elfcpp::Swap
<32, big_endian
>::readval(wv
);
12058 const uint32_t reg
= (insn
& 0xf);
12062 // Try looking up an existing stub from a stub table.
12063 Stub_table
<big_endian
>* stub_table
=
12064 arm_object
->stub_table(relinfo
->data_shndx
);
12065 gold_assert(stub_table
!= NULL
);
12067 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
12069 // create a new stub and add it to stub table.
12070 Arm_v4bx_stub
* stub
=
12071 this->stub_factory().make_arm_v4bx_stub(reg
);
12072 gold_assert(stub
!= NULL
);
12073 stub_table
->add_arm_v4bx_stub(stub
);
12081 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
12082 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
12083 stub_addend_reader(r_type
, view
+ offset
, reloc
);
12085 const Sized_symbol
<32>* sym
;
12087 Symbol_value
<32> symval
;
12088 const Symbol_value
<32> *psymval
;
12089 bool is_defined_in_discarded_section
;
12090 unsigned int shndx
;
12091 if (r_sym
< local_count
)
12094 psymval
= arm_object
->local_symbol(r_sym
);
12096 // If the local symbol belongs to a section we are discarding,
12097 // and that section is a debug section, try to find the
12098 // corresponding kept section and map this symbol to its
12099 // counterpart in the kept section. The symbol must not
12100 // correspond to a section we are folding.
12102 shndx
= psymval
->input_shndx(&is_ordinary
);
12103 is_defined_in_discarded_section
=
12105 && shndx
!= elfcpp::SHN_UNDEF
12106 && !arm_object
->is_section_included(shndx
)
12107 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
12109 // We need to compute the would-be final value of this local
12111 if (!is_defined_in_discarded_section
)
12113 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
12114 typename
ObjType::Compute_final_local_value_status status
=
12115 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
12117 if (status
== ObjType::CFLV_OK
)
12119 // Currently we cannot handle a branch to a target in
12120 // a merged section. If this is the case, issue an error
12121 // and also free the merge symbol value.
12122 if (!symval
.has_output_value())
12124 const std::string
& section_name
=
12125 arm_object
->section_name(shndx
);
12126 arm_object
->error(_("cannot handle branch to local %u "
12127 "in a merged section %s"),
12128 r_sym
, section_name
.c_str());
12134 // We cannot determine the final value.
12141 const Symbol
* gsym
;
12142 gsym
= arm_object
->global_symbol(r_sym
);
12143 gold_assert(gsym
!= NULL
);
12144 if (gsym
->is_forwarder())
12145 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
12147 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
12148 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
12149 symval
.set_output_symtab_index(sym
->symtab_index());
12151 symval
.set_no_output_symtab_entry();
12153 // We need to compute the would-be final value of this global
12155 const Symbol_table
* symtab
= relinfo
->symtab
;
12156 const Sized_symbol
<32>* sized_symbol
=
12157 symtab
->get_sized_symbol
<32>(gsym
);
12158 Symbol_table::Compute_final_value_status status
;
12159 Arm_address value
=
12160 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
12162 // Skip this if the symbol has not output section.
12163 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
12165 symval
.set_output_value(value
);
12167 if (gsym
->type() == elfcpp::STT_TLS
)
12168 symval
.set_is_tls_symbol();
12169 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
12170 symval
.set_is_ifunc_symbol();
12173 is_defined_in_discarded_section
=
12174 (gsym
->is_defined_in_discarded_section()
12175 && gsym
->is_undefined());
12179 Symbol_value
<32> symval2
;
12180 if (is_defined_in_discarded_section
)
12182 if (comdat_behavior
== CB_UNDETERMINED
)
12184 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
12185 comdat_behavior
= default_comdat_behavior
.get(name
.c_str());
12187 if (comdat_behavior
== CB_PRETEND
)
12189 // FIXME: This case does not work for global symbols.
12190 // We have no place to store the original section index.
12191 // Fortunately this does not matter for comdat sections,
12192 // only for sections explicitly discarded by a linker
12195 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
12196 arm_object
->map_to_kept_section(shndx
, &found
);
12198 symval2
.set_output_value(value
+ psymval
->input_value());
12200 symval2
.set_output_value(0);
12204 if (comdat_behavior
== CB_WARNING
)
12205 gold_warning_at_location(relinfo
, i
, offset
,
12206 _("relocation refers to discarded "
12208 symval2
.set_output_value(0);
12210 symval2
.set_no_output_symtab_entry();
12211 psymval
= &symval2
;
12214 // If symbol is a section symbol, we don't know the actual type of
12215 // destination. Give up.
12216 if (psymval
->is_section_symbol())
12219 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
12220 addend
, view_address
+ offset
);
12224 // Scan an input section for stub generation.
12226 template<bool big_endian
>
12228 Target_arm
<big_endian
>::scan_section_for_stubs(
12229 const Relocate_info
<32, big_endian
>* relinfo
,
12230 unsigned int sh_type
,
12231 const unsigned char* prelocs
,
12232 size_t reloc_count
,
12233 Output_section
* output_section
,
12234 bool needs_special_offset_handling
,
12235 const unsigned char* view
,
12236 Arm_address view_address
,
12237 section_size_type view_size
)
12239 if (sh_type
== elfcpp::SHT_REL
)
12240 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
12245 needs_special_offset_handling
,
12249 else if (sh_type
== elfcpp::SHT_RELA
)
12250 // We do not support RELA type relocations yet. This is provided for
12252 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
12257 needs_special_offset_handling
,
12262 gold_unreachable();
12265 // Group input sections for stub generation.
12267 // We group input sections in an output section so that the total size,
12268 // including any padding space due to alignment is smaller than GROUP_SIZE
12269 // unless the only input section in group is bigger than GROUP_SIZE already.
12270 // Then an ARM stub table is created to follow the last input section
12271 // in group. For each group an ARM stub table is created an is placed
12272 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12273 // extend the group after the stub table.
12275 template<bool big_endian
>
12277 Target_arm
<big_endian
>::group_sections(
12279 section_size_type group_size
,
12280 bool stubs_always_after_branch
,
12283 // Group input sections and insert stub table
12284 Layout::Section_list section_list
;
12285 layout
->get_executable_sections(§ion_list
);
12286 for (Layout::Section_list::const_iterator p
= section_list
.begin();
12287 p
!= section_list
.end();
12290 Arm_output_section
<big_endian
>* output_section
=
12291 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12292 output_section
->group_sections(group_size
, stubs_always_after_branch
,
12297 // Relaxation hook. This is where we do stub generation.
12299 template<bool big_endian
>
12301 Target_arm
<big_endian
>::do_relax(
12303 const Input_objects
* input_objects
,
12304 Symbol_table
* symtab
,
12308 // No need to generate stubs if this is a relocatable link.
12309 gold_assert(!parameters
->options().relocatable());
12311 // If this is the first pass, we need to group input sections into
12313 bool done_exidx_fixup
= false;
12314 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
12317 // Determine the stub group size. The group size is the absolute
12318 // value of the parameter --stub-group-size. If --stub-group-size
12319 // is passed a negative value, we restrict stubs to be always after
12320 // the stubbed branches.
12321 int32_t stub_group_size_param
=
12322 parameters
->options().stub_group_size();
12323 bool stubs_always_after_branch
= stub_group_size_param
< 0;
12324 section_size_type stub_group_size
= abs(stub_group_size_param
);
12326 if (stub_group_size
== 1)
12329 // Thumb branch range is +-4MB has to be used as the default
12330 // maximum size (a given section can contain both ARM and Thumb
12331 // code, so the worst case has to be taken into account). If we are
12332 // fixing cortex-a8 errata, the branch range has to be even smaller,
12333 // since wide conditional branch has a range of +-1MB only.
12335 // This value is 48K less than that, which allows for 4096
12336 // 12-byte stubs. If we exceed that, then we will fail to link.
12337 // The user will have to relink with an explicit group size
12339 stub_group_size
= 4145152;
12342 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12343 // page as the first half of a 32-bit branch straddling two 4K pages.
12344 // This is a crude way of enforcing that. In addition, long conditional
12345 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12346 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12347 // cortex-A8 stubs from long conditional branches.
12348 if (this->fix_cortex_a8_
)
12350 stubs_always_after_branch
= true;
12351 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
12352 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
12355 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
12357 // Also fix .ARM.exidx section coverage.
12358 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
12359 for (Layout::Section_list::const_iterator p
=
12360 layout
->section_list().begin();
12361 p
!= layout
->section_list().end();
12363 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
12365 if (exidx_output_section
== NULL
)
12366 exidx_output_section
=
12367 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12369 // We cannot handle this now.
12370 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12371 "non-relocatable link"),
12372 exidx_output_section
->name(),
12376 if (exidx_output_section
!= NULL
)
12378 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
12380 done_exidx_fixup
= true;
12385 // If this is not the first pass, addresses and file offsets have
12386 // been reset at this point, set them here.
12387 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12388 sp
!= this->stub_tables_
.end();
12391 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12392 off_t off
= align_address(owner
->original_size(),
12393 (*sp
)->addralign());
12394 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
12395 owner
->offset() + off
);
12399 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12400 // beginning of each relaxation pass, just blow away all the stubs.
12401 // Alternatively, we could selectively remove only the stubs and reloc
12402 // information for code sections that have moved since the last pass.
12403 // That would require more book-keeping.
12404 if (this->fix_cortex_a8_
)
12406 // Clear all Cortex-A8 reloc information.
12407 for (typename
Cortex_a8_relocs_info::const_iterator p
=
12408 this->cortex_a8_relocs_info_
.begin();
12409 p
!= this->cortex_a8_relocs_info_
.end();
12412 this->cortex_a8_relocs_info_
.clear();
12414 // Remove all Cortex-A8 stubs.
12415 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12416 sp
!= this->stub_tables_
.end();
12418 (*sp
)->remove_all_cortex_a8_stubs();
12421 // Scan relocs for relocation stubs
12422 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12423 op
!= input_objects
->relobj_end();
12426 Arm_relobj
<big_endian
>* arm_relobj
=
12427 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12428 // Lock the object so we can read from it. This is only called
12429 // single-threaded from Layout::finalize, so it is OK to lock.
12430 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12431 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
12434 // Check all stub tables to see if any of them have their data sizes
12435 // or addresses alignments changed. These are the only things that
12437 bool any_stub_table_changed
= false;
12438 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
12439 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12440 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12443 if ((*sp
)->update_data_size_and_addralign())
12445 // Update data size of stub table owner.
12446 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12447 uint64_t address
= owner
->address();
12448 off_t offset
= owner
->offset();
12449 owner
->reset_address_and_file_offset();
12450 owner
->set_address_and_file_offset(address
, offset
);
12452 sections_needing_adjustment
.insert(owner
->output_section());
12453 any_stub_table_changed
= true;
12457 // Output_section_data::output_section() returns a const pointer but we
12458 // need to update output sections, so we record all output sections needing
12459 // update above and scan the sections here to find out what sections need
12461 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
12462 p
!= layout
->section_list().end();
12465 if (sections_needing_adjustment
.find(*p
)
12466 != sections_needing_adjustment
.end())
12467 (*p
)->set_section_offsets_need_adjustment();
12470 // Stop relaxation if no EXIDX fix-up and no stub table change.
12471 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
12473 // Finalize the stubs in the last relaxation pass.
12474 if (!continue_relaxation
)
12476 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12477 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12479 (*sp
)->finalize_stubs();
12481 // Update output local symbol counts of objects if necessary.
12482 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12483 op
!= input_objects
->relobj_end();
12486 Arm_relobj
<big_endian
>* arm_relobj
=
12487 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12489 // Update output local symbol counts. We need to discard local
12490 // symbols defined in parts of input sections that are discarded by
12492 if (arm_relobj
->output_local_symbol_count_needs_update())
12494 // We need to lock the object's file to update it.
12495 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12496 arm_relobj
->update_output_local_symbol_count();
12501 return continue_relaxation
;
12504 // Relocate a stub.
12506 template<bool big_endian
>
12508 Target_arm
<big_endian
>::relocate_stub(
12510 const Relocate_info
<32, big_endian
>* relinfo
,
12511 Output_section
* output_section
,
12512 unsigned char* view
,
12513 Arm_address address
,
12514 section_size_type view_size
)
12517 const Stub_template
* stub_template
= stub
->stub_template();
12518 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
12520 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
12521 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
12523 unsigned int r_type
= insn
->r_type();
12524 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
12525 section_size_type reloc_size
= insn
->size();
12526 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
12528 // This is the address of the stub destination.
12529 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
12530 Symbol_value
<32> symval
;
12531 symval
.set_output_value(target
);
12533 // Synthesize a fake reloc just in case. We don't have a symbol so
12535 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
12536 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
12537 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
12538 reloc_write
.put_r_offset(reloc_offset
);
12539 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
12541 relocate
.relocate(relinfo
, elfcpp::SHT_REL
, this, output_section
,
12542 this->fake_relnum_for_stubs
, reloc_buffer
,
12543 NULL
, &symval
, view
+ reloc_offset
,
12544 address
+ reloc_offset
, reloc_size
);
12548 // Determine whether an object attribute tag takes an integer, a
12551 template<bool big_endian
>
12553 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
12555 if (tag
== Object_attribute::Tag_compatibility
)
12556 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12557 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
12558 else if (tag
== elfcpp::Tag_nodefaults
)
12559 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12560 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
12561 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
12562 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
12564 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
12566 return ((tag
& 1) != 0
12567 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12568 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
12571 // Reorder attributes.
12573 // The ABI defines that Tag_conformance should be emitted first, and that
12574 // Tag_nodefaults should be second (if either is defined). This sets those
12575 // two positions, and bumps up the position of all the remaining tags to
12578 template<bool big_endian
>
12580 Target_arm
<big_endian
>::do_attributes_order(int num
) const
12582 // Reorder the known object attributes in output. We want to move
12583 // Tag_conformance to position 4 and Tag_conformance to position 5
12584 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12586 return elfcpp::Tag_conformance
;
12588 return elfcpp::Tag_nodefaults
;
12589 if ((num
- 2) < elfcpp::Tag_nodefaults
)
12591 if ((num
- 1) < elfcpp::Tag_conformance
)
12596 // Scan a span of THUMB code for Cortex-A8 erratum.
12598 template<bool big_endian
>
12600 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
12601 Arm_relobj
<big_endian
>* arm_relobj
,
12602 unsigned int shndx
,
12603 section_size_type span_start
,
12604 section_size_type span_end
,
12605 const unsigned char* view
,
12606 Arm_address address
)
12608 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12610 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12611 // The branch target is in the same 4KB region as the
12612 // first half of the branch.
12613 // The instruction before the branch is a 32-bit
12614 // length non-branch instruction.
12615 section_size_type i
= span_start
;
12616 bool last_was_32bit
= false;
12617 bool last_was_branch
= false;
12618 while (i
< span_end
)
12620 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12621 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
12622 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12623 bool is_blx
= false, is_b
= false;
12624 bool is_bl
= false, is_bcc
= false;
12626 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
12629 // Load the rest of the insn (in manual-friendly order).
12630 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12632 // Encoding T4: B<c>.W.
12633 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
12634 // Encoding T1: BL<c>.W.
12635 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
12636 // Encoding T2: BLX<c>.W.
12637 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
12638 // Encoding T3: B<c>.W (not permitted in IT block).
12639 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
12640 && (insn
& 0x07f00000U
) != 0x03800000U
);
12643 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
12645 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12646 // page boundary and it follows 32-bit non-branch instruction,
12647 // we need to work around.
12648 if (is_32bit_branch
12649 && ((address
+ i
) & 0xfffU
) == 0xffeU
12651 && !last_was_branch
)
12653 // Check to see if there is a relocation stub for this branch.
12654 bool force_target_arm
= false;
12655 bool force_target_thumb
= false;
12656 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
12657 Cortex_a8_relocs_info::const_iterator p
=
12658 this->cortex_a8_relocs_info_
.find(address
+ i
);
12660 if (p
!= this->cortex_a8_relocs_info_
.end())
12662 cortex_a8_reloc
= p
->second
;
12663 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
12665 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12666 && !target_is_thumb
)
12667 force_target_arm
= true;
12668 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12669 && target_is_thumb
)
12670 force_target_thumb
= true;
12674 Stub_type stub_type
= arm_stub_none
;
12676 // Check if we have an offending branch instruction.
12677 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
12678 uint16_t lower_insn
= insn
& 0xffffU
;
12679 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12681 if (cortex_a8_reloc
!= NULL
12682 && cortex_a8_reloc
->reloc_stub() != NULL
)
12683 // We've already made a stub for this instruction, e.g.
12684 // it's a long branch or a Thumb->ARM stub. Assume that
12685 // stub will suffice to work around the A8 erratum (see
12686 // setting of always_after_branch above).
12690 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
12692 stub_type
= arm_stub_a8_veneer_b_cond
;
12694 else if (is_b
|| is_bl
|| is_blx
)
12696 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
12701 stub_type
= (is_blx
12702 ? arm_stub_a8_veneer_blx
12704 ? arm_stub_a8_veneer_bl
12705 : arm_stub_a8_veneer_b
));
12708 if (stub_type
!= arm_stub_none
)
12710 Arm_address pc_for_insn
= address
+ i
+ 4;
12712 // The original instruction is a BL, but the target is
12713 // an ARM instruction. If we were not making a stub,
12714 // the BL would have been converted to a BLX. Use the
12715 // BLX stub instead in that case.
12716 if (this->may_use_v5t_interworking() && force_target_arm
12717 && stub_type
== arm_stub_a8_veneer_bl
)
12719 stub_type
= arm_stub_a8_veneer_blx
;
12723 // Conversely, if the original instruction was
12724 // BLX but the target is Thumb mode, use the BL stub.
12725 else if (force_target_thumb
12726 && stub_type
== arm_stub_a8_veneer_blx
)
12728 stub_type
= arm_stub_a8_veneer_bl
;
12736 // If we found a relocation, use the proper destination,
12737 // not the offset in the (unrelocated) instruction.
12738 // Note this is always done if we switched the stub type above.
12739 if (cortex_a8_reloc
!= NULL
)
12740 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
12742 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
12744 // Add a new stub if destination address in in the same page.
12745 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
12747 Cortex_a8_stub
* stub
=
12748 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
12752 Stub_table
<big_endian
>* stub_table
=
12753 arm_relobj
->stub_table(shndx
);
12754 gold_assert(stub_table
!= NULL
);
12755 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
12760 i
+= insn_32bit
? 4 : 2;
12761 last_was_32bit
= insn_32bit
;
12762 last_was_branch
= is_32bit_branch
;
12766 // Apply the Cortex-A8 workaround.
12768 template<bool big_endian
>
12770 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
12771 const Cortex_a8_stub
* stub
,
12772 Arm_address stub_address
,
12773 unsigned char* insn_view
,
12774 Arm_address insn_address
)
12776 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12777 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
12778 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12779 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12780 off_t branch_offset
= stub_address
- (insn_address
+ 4);
12782 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12783 switch (stub
->stub_template()->type())
12785 case arm_stub_a8_veneer_b_cond
:
12786 // For a conditional branch, we re-write it to be an unconditional
12787 // branch to the stub. We use the THUMB-2 encoding here.
12788 upper_insn
= 0xf000U
;
12789 lower_insn
= 0xb800U
;
12791 case arm_stub_a8_veneer_b
:
12792 case arm_stub_a8_veneer_bl
:
12793 case arm_stub_a8_veneer_blx
:
12794 if ((lower_insn
& 0x5000U
) == 0x4000U
)
12795 // For a BLX instruction, make sure that the relocation is
12796 // rounded up to a word boundary. This follows the semantics of
12797 // the instruction which specifies that bit 1 of the target
12798 // address will come from bit 1 of the base address.
12799 branch_offset
= (branch_offset
+ 2) & ~3;
12801 // Put BRANCH_OFFSET back into the insn.
12802 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
12803 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
12804 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
12808 gold_unreachable();
12811 // Put the relocated value back in the object file:
12812 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
12813 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
12816 // Target selector for ARM. Note this is never instantiated directly.
12817 // It's only used in Target_selector_arm_nacl, below.
12819 template<bool big_endian
>
12820 class Target_selector_arm
: public Target_selector
12823 Target_selector_arm()
12824 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
12825 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
12826 (big_endian
? "armelfb" : "armelf"))
12830 do_instantiate_target()
12831 { return new Target_arm
<big_endian
>(); }
12834 // Fix .ARM.exidx section coverage.
12836 template<bool big_endian
>
12838 Target_arm
<big_endian
>::fix_exidx_coverage(
12840 const Input_objects
* input_objects
,
12841 Arm_output_section
<big_endian
>* exidx_section
,
12842 Symbol_table
* symtab
,
12845 // We need to look at all the input sections in output in ascending
12846 // order of of output address. We do that by building a sorted list
12847 // of output sections by addresses. Then we looks at the output sections
12848 // in order. The input sections in an output section are already sorted
12849 // by addresses within the output section.
12851 typedef std::set
<Output_section
*, output_section_address_less_than
>
12852 Sorted_output_section_list
;
12853 Sorted_output_section_list sorted_output_sections
;
12855 // Find out all the output sections of input sections pointed by
12856 // EXIDX input sections.
12857 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
12858 p
!= input_objects
->relobj_end();
12861 Arm_relobj
<big_endian
>* arm_relobj
=
12862 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
12863 std::vector
<unsigned int> shndx_list
;
12864 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
12865 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
12867 const Arm_exidx_input_section
* exidx_input_section
=
12868 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
12869 gold_assert(exidx_input_section
!= NULL
);
12870 if (!exidx_input_section
->has_errors())
12872 unsigned int text_shndx
= exidx_input_section
->link();
12873 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
12874 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
12875 sorted_output_sections
.insert(os
);
12880 // Go over the output sections in ascending order of output addresses.
12881 typedef typename Arm_output_section
<big_endian
>::Text_section_list
12883 Text_section_list sorted_text_sections
;
12884 for (typename
Sorted_output_section_list::iterator p
=
12885 sorted_output_sections
.begin();
12886 p
!= sorted_output_sections
.end();
12889 Arm_output_section
<big_endian
>* arm_output_section
=
12890 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12891 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
12894 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
12895 merge_exidx_entries(), task
);
12898 template<bool big_endian
>
12900 Target_arm
<big_endian
>::do_define_standard_symbols(
12901 Symbol_table
* symtab
,
12904 // Handle the .ARM.exidx section.
12905 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
12907 if (exidx_section
!= NULL
)
12909 // Create __exidx_start and __exidx_end symbols.
12910 symtab
->define_in_output_data("__exidx_start",
12912 Symbol_table::PREDEFINED
,
12916 elfcpp::STT_NOTYPE
,
12917 elfcpp::STB_GLOBAL
,
12918 elfcpp::STV_HIDDEN
,
12920 false, // offset_is_from_end
12921 true); // only_if_ref
12923 symtab
->define_in_output_data("__exidx_end",
12925 Symbol_table::PREDEFINED
,
12929 elfcpp::STT_NOTYPE
,
12930 elfcpp::STB_GLOBAL
,
12931 elfcpp::STV_HIDDEN
,
12933 true, // offset_is_from_end
12934 true); // only_if_ref
12938 // Define __exidx_start and __exidx_end even when .ARM.exidx
12939 // section is missing to match ld's behaviour.
12940 symtab
->define_as_constant("__exidx_start", NULL
,
12941 Symbol_table::PREDEFINED
,
12942 0, 0, elfcpp::STT_OBJECT
,
12943 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12945 symtab
->define_as_constant("__exidx_end", NULL
,
12946 Symbol_table::PREDEFINED
,
12947 0, 0, elfcpp::STT_OBJECT
,
12948 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12953 // NaCl variant. It uses different PLT contents.
12955 template<bool big_endian
>
12956 class Output_data_plt_arm_nacl
;
12958 template<bool big_endian
>
12959 class Target_arm_nacl
: public Target_arm
<big_endian
>
12963 : Target_arm
<big_endian
>(&arm_nacl_info
)
12967 virtual Output_data_plt_arm
<big_endian
>*
12970 Arm_output_data_got
<big_endian
>* got
,
12971 Output_data_space
* got_plt
,
12972 Output_data_space
* got_irelative
)
12973 { return new Output_data_plt_arm_nacl
<big_endian
>(
12974 layout
, got
, got_plt
, got_irelative
); }
12977 static const Target::Target_info arm_nacl_info
;
12980 template<bool big_endian
>
12981 const Target::Target_info Target_arm_nacl
<big_endian
>::arm_nacl_info
=
12984 big_endian
, // is_big_endian
12985 elfcpp::EM_ARM
, // machine_code
12986 false, // has_make_symbol
12987 false, // has_resolve
12988 false, // has_code_fill
12989 true, // is_default_stack_executable
12990 false, // can_icf_inline_merge_sections
12992 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12993 0x20000, // default_text_segment_address
12994 0x10000, // abi_pagesize (overridable by -z max-page-size)
12995 0x10000, // common_pagesize (overridable by -z common-page-size)
12996 true, // isolate_execinstr
12997 0x10000000, // rosegment_gap
12998 elfcpp::SHN_UNDEF
, // small_common_shndx
12999 elfcpp::SHN_UNDEF
, // large_common_shndx
13000 0, // small_common_section_flags
13001 0, // large_common_section_flags
13002 ".ARM.attributes", // attributes_section
13003 "aeabi", // attributes_vendor
13004 "_start", // entry_symbol_name
13005 32, // hash_entry_size
13008 template<bool big_endian
>
13009 class Output_data_plt_arm_nacl
: public Output_data_plt_arm
<big_endian
>
13012 Output_data_plt_arm_nacl(
13014 Arm_output_data_got
<big_endian
>* got
,
13015 Output_data_space
* got_plt
,
13016 Output_data_space
* got_irelative
)
13017 : Output_data_plt_arm
<big_endian
>(layout
, 16, got
, got_plt
, got_irelative
)
13021 // Return the offset of the first non-reserved PLT entry.
13022 virtual unsigned int
13023 do_first_plt_entry_offset() const
13024 { return sizeof(first_plt_entry
); }
13026 // Return the size of a PLT entry.
13027 virtual unsigned int
13028 do_get_plt_entry_size() const
13029 { return sizeof(plt_entry
); }
13032 do_fill_first_plt_entry(unsigned char* pov
,
13033 Arm_address got_address
,
13034 Arm_address plt_address
);
13037 do_fill_plt_entry(unsigned char* pov
,
13038 Arm_address got_address
,
13039 Arm_address plt_address
,
13040 unsigned int got_offset
,
13041 unsigned int plt_offset
);
13044 inline uint32_t arm_movw_immediate(uint32_t value
)
13046 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
13049 inline uint32_t arm_movt_immediate(uint32_t value
)
13051 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
13054 // Template for the first PLT entry.
13055 static const uint32_t first_plt_entry
[16];
13057 // Template for subsequent PLT entries.
13058 static const uint32_t plt_entry
[4];
13061 // The first entry in the PLT.
13062 template<bool big_endian
>
13063 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::first_plt_entry
[16] =
13066 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
13067 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
13068 0xe08cc00f, // add ip, ip, pc
13069 0xe52dc008, // str ip, [sp, #-8]!
13071 0xe3ccc103, // bic ip, ip, #0xc0000000
13072 0xe59cc000, // ldr ip, [ip]
13073 0xe3ccc13f, // bic ip, ip, #0xc000000f
13074 0xe12fff1c, // bx ip
13080 0xe50dc004, // str ip, [sp, #-4]
13082 0xe3ccc103, // bic ip, ip, #0xc0000000
13083 0xe59cc000, // ldr ip, [ip]
13084 0xe3ccc13f, // bic ip, ip, #0xc000000f
13085 0xe12fff1c, // bx ip
13088 template<bool big_endian
>
13090 Output_data_plt_arm_nacl
<big_endian
>::do_fill_first_plt_entry(
13091 unsigned char* pov
,
13092 Arm_address got_address
,
13093 Arm_address plt_address
)
13095 // Write first PLT entry. All but first two words are constants.
13096 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
13097 / sizeof(first_plt_entry
[0]));
13099 int32_t got_displacement
= got_address
+ 8 - (plt_address
+ 16);
13101 elfcpp::Swap
<32, big_endian
>::writeval
13102 (pov
+ 0, first_plt_entry
[0] | arm_movw_immediate (got_displacement
));
13103 elfcpp::Swap
<32, big_endian
>::writeval
13104 (pov
+ 4, first_plt_entry
[1] | arm_movt_immediate (got_displacement
));
13106 for (size_t i
= 2; i
< num_first_plt_words
; ++i
)
13107 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
13110 // Subsequent entries in the PLT.
13112 template<bool big_endian
>
13113 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::plt_entry
[4] =
13115 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
13116 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
13117 0xe08cc00f, // add ip, ip, pc
13118 0xea000000, // b .Lplt_tail
13121 template<bool big_endian
>
13123 Output_data_plt_arm_nacl
<big_endian
>::do_fill_plt_entry(
13124 unsigned char* pov
,
13125 Arm_address got_address
,
13126 Arm_address plt_address
,
13127 unsigned int got_offset
,
13128 unsigned int plt_offset
)
13130 // Calculate the displacement between the PLT slot and the
13131 // common tail that's part of the special initial PLT slot.
13132 int32_t tail_displacement
= (plt_address
+ (11 * sizeof(uint32_t))
13133 - (plt_address
+ plt_offset
13134 + sizeof(plt_entry
) + sizeof(uint32_t)));
13135 gold_assert((tail_displacement
& 3) == 0);
13136 tail_displacement
>>= 2;
13138 gold_assert ((tail_displacement
& 0xff000000) == 0
13139 || (-tail_displacement
& 0xff000000) == 0);
13141 // Calculate the displacement between the PLT slot and the entry
13142 // in the GOT. The offset accounts for the value produced by
13143 // adding to pc in the penultimate instruction of the PLT stub.
13144 const int32_t got_displacement
= (got_address
+ got_offset
13145 - (plt_address
+ sizeof(plt_entry
)));
13147 elfcpp::Swap
<32, big_endian
>::writeval
13148 (pov
+ 0, plt_entry
[0] | arm_movw_immediate (got_displacement
));
13149 elfcpp::Swap
<32, big_endian
>::writeval
13150 (pov
+ 4, plt_entry
[1] | arm_movt_immediate (got_displacement
));
13151 elfcpp::Swap
<32, big_endian
>::writeval
13152 (pov
+ 8, plt_entry
[2]);
13153 elfcpp::Swap
<32, big_endian
>::writeval
13154 (pov
+ 12, plt_entry
[3] | (tail_displacement
& 0x00ffffff));
13157 // Target selectors.
13159 template<bool big_endian
>
13160 class Target_selector_arm_nacl
13161 : public Target_selector_nacl
<Target_selector_arm
<big_endian
>,
13162 Target_arm_nacl
<big_endian
> >
13165 Target_selector_arm_nacl()
13166 : Target_selector_nacl
<Target_selector_arm
<big_endian
>,
13167 Target_arm_nacl
<big_endian
> >(
13169 big_endian
? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
13170 big_endian
? "armelfb_nacl" : "armelf_nacl")
13174 Target_selector_arm_nacl
<false> target_selector_arm
;
13175 Target_selector_arm_nacl
<true> target_selector_armbe
;
13177 } // End anonymous namespace.