[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2018-10-09 Sudakshina Das <sudi.das@arm.com>
2
3 * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
4
5 2018-10-09 Sudakshina Das <sudi.das@arm.com>
6
7 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
8 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
9 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
10 (aarch64_sys_regs_sr): Declare new table.
11
12 2018-10-09 Sudakshina Das <sudi.das@arm.com>
13
14 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
15 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
16
17 2018-10-09 Sudakshina Das <sudi.das@arm.com>
18
19 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
20 (AARCH64_FEATURE_FRINTTS): New.
21 (AARCH64_ARCH_V8_5): Add both by default.
22
23 2018-10-09 Sudakshina Das <sudi.das@arm.com>
24
25 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
26 (AARCH64_ARCH_V8_5): New.
27
28 2018-10-08 Alan Modra <amodra@gmail.com>
29
30 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
31
32 2018-10-05 Sudakshina Das <sudi.das@arm.com>
33
34 * opcode/arm.h (ARM_EXT2_PREDRES): New.
35 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
36
37 2018-10-05 Sudakshina Das <sudi.das@arm.com>
38
39 * opcode/arm.h (ARM_EXT2_SB): New.
40 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
41
42 2018-10-05 Sudakshina Das <sudi.das@arm.com>
43
44 * opcode/arm.h (ARM_EXT2_V8_5A): New.
45 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
46
47 2018-10-05 Richard Henderson <rth@twiddle.net>
48
49 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
50 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
51 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
52 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
53 R_OR1K_SLO13, R_OR1K_PLTA26.
54
55 2018-10-05 Richard Henderson <rth@twiddle.net>
56
57 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
58 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
59 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
60
61 2018-10-03 Tamar Christina <tamar.christina@arm.com>
62
63 * opcode/aarch64.h (aarch64_inst): Remove.
64 (enum err_type): Add ERR_VFI.
65 (aarch64_is_destructive_by_operands): New.
66 (init_insn_sequence): New.
67 (aarch64_decode_insn): Remove param name.
68
69 2018-10-03 Tamar Christina <tamar.christina@arm.com>
70
71 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
72 more arguments.
73
74 2018-10-03 Tamar Christina <tamar.christina@arm.com>
75
76 * opcode/aarch64.h (enum err_type): New.
77 (aarch64_decode_insn): Use it.
78
79 2018-10-03 Tamar Christina <tamar.christina@arm.com>
80
81 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
82 (aarch64_opcode_encode): Use it.
83
84 2018-10-03 Tamar Christina <tamar.christina@arm.com>
85
86 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
87 extend flags field size.
88 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
89
90 2018-10-03 John Darrington <john@darrington.wattle.id.au>
91
92 * dis-asm.h (print_insn_s12z): New declaration.
93
94 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
95
96 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
97 (MASK_FENCE_TSO): Likewise.
98
99 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
100
101 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
102
103 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
104
105 PR binutils/23694
106 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
107 include zero size sections at start of PT_NOTE segment.
108
109 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
110
111 * elf/nds32.h: Remove the unused target features.
112 * dis-asm.h (disassemble_init_nds32): Declared.
113 * elf/nds32.h (E_NDS32_NULL): Removed.
114 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
115 * opcode/nds32.h: Ident.
116 (N32_SUB6, INSN_LW): New macros.
117 (enum n32_opcodes): Updated.
118 * elf/nds32.h: Doc fixes.
119 * elf/nds32.h: Add R_NDS32_LSI.
120 * elf/nds32.h: Add new relocations for TLS.
121
122 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
123
124 * elf/common.h (AT_SUN_HWCAP): Rename to ...
125 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
126 compatibility.
127 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
128 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
129
130 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
131
132 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
133
134 2018-08-31 Alan Modra <amodra@gmail.com>
135
136 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
137 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
138 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
139 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
140
141 2018-08-30 Kito Cheng <kito@andestech.com>
142
143 * opcode/riscv.h (MAX_SUBSET_NUM): New.
144 (riscv_opcode): Add xlen_requirement field and change type of
145 subset.
146
147 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
148
149 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
150 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
151
152 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
153
154 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
155 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
156
157 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
158
159 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
160 E_MIPS_MACH_GS464.
161 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
162 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
163 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
164 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
165
166 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
167
168 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
169 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
170 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
171
172 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
173
174 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
175 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
176 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
177
178 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
179
180 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
181 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
182 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
183
184 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
185
186 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
187 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
188 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
189 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
190 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
191 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
192 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
193 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
194 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
195 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
196 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
197 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
198 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
199 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
200 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
201 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
202 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
203 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
204 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
205 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
206 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
207 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
208 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
209 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
210 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
211 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
212 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
213 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
214 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
215 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
216 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
217 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
218 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
219 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
220 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
221 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
222 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
223 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
224 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
225 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
226 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
227 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
228 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
229 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
230 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
231 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
232 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
233 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
234 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
235 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
236 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
237 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
238 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
239 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
240 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
241 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
242
243 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
244
245 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
246
247 2018-08-21 John Darrington <john@darrington.wattle.id.au>
248
249 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
250
251 2018-08-21 Alan Modra <amodra@gmail.com>
252
253 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
254 Mention use of "extract" function to provide default value.
255 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
256 (ppc_optional_operand_value): Rewrite to use extract function.
257
258 2018-08-18 John Darrington <john@darrington.wattle.id.au>
259
260 * opcode/s12z.h: New file.
261
262 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
263
264 * elf/arm.h: Updated comments for e_flags definitions.
265
266 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
267
268 * elf/arc.h (Tag_ARC_ATR_version): New tag.
269
270 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
271
272 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
273
274 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
275
276 Copy over from GCC
277 2018-07-26 Martin Liska <mliska@suse.cz>
278
279 PR lto/86548
280 * libiberty.h (make_temp_file_with_prefix): New function.
281
282 2018-07-30 Jim Wilson <jimw@sifive.com>
283
284 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
285 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
286 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
287
288 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
289
290 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
291 * elf/csky.h: New file.
292
293 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
294 Maciej W. Rozycki <macro@linux-mips.org>
295
296 * elf/mips.h (AFL_ASE_MASK): Correct typo.
297
298 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
299
300 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
301
302 2018-07-26 Alan Modra <amodra@gmail.com>
303
304 * elf/ppc64.h: Specify byte offset to local entry for values
305 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
306 value for such functions when entering via global entry point.
307 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
308
309 2018-07-24 Alan Modra <amodra@gmail.com>
310
311 PR 23430
312 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
313
314 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
315 Maciej W. Rozycki <macro@mips.com>
316
317 * elf/mips.h (AFL_ASE_MMI): New macro.
318 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
319 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
320
321 2018-07-17 Maciej W. Rozycki <macro@mips.com>
322
323 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
324
325 2018-07-06 Alan Modra <amodra@gmail.com>
326
327 * diagnostics.h: Comment on macro usage.
328
329 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
330
331 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
332 Define for clang.
333
334 2018-07-02 Maciej W. Rozycki <macro@mips.com>
335
336 PR tdep/8282
337 * dis-asm.h (disasm_option_arg_t): New typedef.
338 (disasm_options_and_args_t): Likewise.
339 (disasm_options_t): Add `arg' member, document members.
340 (disassembler_options_mips): New prototype.
341 (disassembler_options_arm, disassembler_options_powerpc)
342 (disassembler_options_s390): Update prototypes.
343
344 2018-06-29 Tamar Christina <tamar.christina@arm.com>
345
346 PR binutils/23192
347 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
348
349 2018-06-26 Alan Modra <amodra@gmail.com>
350
351 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
352
353 2018-06-24 Nick Clifton <nickc@redhat.com>
354
355 2.31 branch created.
356
357 2018-06-21 Alan Hayward <alan.hayward@arm.com>
358
359 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
360 for non SHT_NOBITS.
361
362 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
363
364 Sync with GCC
365
366 2018-05-24 Tom Rix <trix@juniper.net>
367
368 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
369
370 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
371
372 * longlong.h [__riscv] (__umulsidi3): Define.
373 [__riscv] (umul_ppmm): Likewise.
374 [__riscv] (__muluw3): Likewise.
375
376 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
377
378 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
379 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
380 * opcode/mips.h: Document "+\" operand format.
381 (ASE_GINV): New macro.
382
383 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
384 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
385
386 * elf/mips.h (AFL_ASE_CRC): New macro.
387 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
388 * opcode/mips.h (ASE_CRC): New macro.
389 * opcode/mips.h (ASE_CRC64): Likewise.
390
391 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
392
393 * elf/xtensa.h (xtensa_read_table_entries)
394 (xtensa_compute_fill_extra_space): New declarations.
395
396 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
397
398 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
399 define for GCC.
400
401 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
402
403 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
404 (DIAGNOSTIC_STRINGIFY): Likewise.
405 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
406 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
407 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
408 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
409 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
410 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
411
412 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
413
414 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
415
416 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
417
418 * splay-tree.h (splay_tree_compare_strings,
419 splay_tree_delete_pointers): Declare new utility functions.
420
421 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
422
423 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
424
425 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
426
427 * elf/riscv.h (EF_RISCV_RVE): New define.
428
429 2018-05-18 John Darrington <john@darrington.wattle.id.au>
430
431 * elf/s12z.h: New header.
432
433 2018-05-15 Tamar Christina <tamar.christina@arm.com>
434
435 PR binutils/21446
436 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
437
438 2018-05-15 Tamar Christina <tamar.christina@arm.com>
439
440 PR binutils/21446
441 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
442 (aarch64_print_operand): Support notes.
443
444 2018-05-15 Tamar Christina <tamar.christina@arm.com>
445
446 PR binutils/21446
447 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
448 (aarch64_decode_insn): Accept error struct.
449
450 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
451
452 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
453
454 2018-05-10 John Darrington <john@darrington.wattle.id.au>
455
456 * elf/common.h (EM_S12Z): New macro.
457
458 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
459
460 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
461 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
462 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
463 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
464
465 2018-05-08 Jim Wilson <jimw@sifive.com>
466
467 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
468 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
469 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
470
471 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
472
473 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
474 (vle_num_opcodes): Likewise.
475 (spe2_num_opcodes): Likewise.
476
477 2018-05-04 Alan Modra <amodra@gmail.com>
478
479 * ansidecl.h: Import from gcc.
480 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
481 to s_name.
482 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
483
484 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
485
486 * dis-asm.h: Added print_nfp_disassembler_options prototype.
487 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
488 Generic System V Application Binary Interface.
489 * elf/nfp.h: New, for NFP support.
490 * opcode/nfp.h: New, for NFP support.
491
492 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
493 Mickaël Guêné <mickael.guene@st.com>
494
495 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
496 R_ARM_TLS_IE32_FDPIC.
497
498 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
499 Mickaël Guêné <mickael.guene@st.com>
500
501 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
502 (R_ARM_FUNCDESC)
503 (R_ARM_FUNCDESC_VALUE): Define new relocations.
504
505 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
506 Mickaël Guêné <mickael.guene@st.com>
507
508 * elf/arm.h (EF_ARM_FDPIC): New.
509
510 2018-04-18 Alan Modra <amodra@gmail.com>
511
512 * coff/mipspe.h: Delete.
513
514 2018-04-18 Alan Modra <amodra@gmail.com>
515
516 * aout/dynix3.h: Delete.
517
518 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
519
520 Microblaze Target: PIC data text relative
521
522 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
523 * elf/microblaze.h (Add 3 new relocations):
524 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
525 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
526
527 2018-04-17 Alan Modra <amodra@gmail.com>
528
529 * elf/i370.h: Revert removal.
530 * elf/i860.h: Likewise.
531 * elf/i960.h: Likewise.
532
533 2018-04-16 Alan Modra <amodra@gmail.com>
534
535 * coff/sparc.h: Delete.
536
537 2018-04-16 Alan Modra <amodra@gmail.com>
538
539 * aout/host.h: Remove m68k-aout and m68k-coff support.
540 * aout/hp300hpux.h: Delete.
541 * coff/apollo.h: Delete.
542 * coff/aux-coff.h: Delete.
543 * coff/m68k.h: Delete.
544
545 2018-04-16 Alan Modra <amodra@gmail.com>
546
547 * dis-asm.h: Remove sh5 and sh64 support.
548
549 2018-04-16 Alan Modra <amodra@gmail.com>
550
551 * coff/internal.h: Remove w65 support.
552 * coff/w65.h: Delete.
553
554 2018-04-16 Alan Modra <amodra@gmail.com>
555
556 * coff/we32k.h: Delete.
557
558 2018-04-16 Alan Modra <amodra@gmail.com>
559
560 * coff/internal.h: Remove m88k support.
561 * coff/m88k.h: Delete.
562 * opcode/m88k.h: Delete.
563
564 2018-04-16 Alan Modra <amodra@gmail.com>
565
566 * elf/i370.h: Delete.
567 * opcode/i370.h: Delete.
568
569 2018-04-16 Alan Modra <amodra@gmail.com>
570
571 * coff/h8500.h: Delete.
572 * coff/internal.h: Remove h8500 support.
573
574 2018-04-16 Alan Modra <amodra@gmail.com>
575
576 * coff/h8300.h: Delete.
577
578 2018-04-16 Alan Modra <amodra@gmail.com>
579
580 * ieee.h: Delete.
581
582 2018-04-16 Alan Modra <amodra@gmail.com>
583
584 * aout/host.h: Remove newsos3 support.
585
586 2018-04-16 Alan Modra <amodra@gmail.com>
587
588 * nlm/ChangeLog-9315: Delete.
589 * nlm/alpha-ext.h: Delete.
590 * nlm/common.h: Delete.
591 * nlm/external.h: Delete.
592 * nlm/i386-ext.h: Delete.
593 * nlm/internal.h: Delete.
594 * nlm/ppc-ext.h: Delete.
595 * nlm/sparc32-ext.h: Delete.
596
597 2018-04-16 Alan Modra <amodra@gmail.com>
598
599 * opcode/tahoe.h: Delete.
600
601 2018-04-11 Alan Modra <amodra@gmail.com>
602
603 * aout/adobe.h: Delete.
604 * aout/reloc.h: Delete.
605 * coff/i860.h: Delete.
606 * coff/i960.h: Delete.
607 * elf/i860.h: Delete.
608 * elf/i960.h: Delete.
609 * opcode/i860.h: Delete.
610 * opcode/i960.h: Delete.
611 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
612 * aout/ar.h (ARMAGB): Remove.
613 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
614 union internal_auxent): Remove i960 support.
615
616 2018-04-09 Alan Modra <amodra@gmail.com>
617
618 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
619 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
620
621 2018-03-28 Renlin Li <renlin.li@arm.com>
622
623 PR ld/22970
624 * elf/aarch64.h: Add relocation number for
625 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
626 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
627 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
628 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
629 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
630 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
631 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
632 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
633
634 2018-03-28 Nick Clifton <nickc@redhat.com>
635
636 PR 22988
637 * opcode/aarch64.h (enum aarch64_opnd): Add
638 AARCH64_OPND_SVE_ADDR_R.
639
640 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
641
642 * elf/common.h (DF_1_KMOD): New.
643 (DF_1_WEAKFILTER): Likewise.
644 (DF_1_NOCOMMON): Likewise.
645
646 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
647
648 * opcode/riscv.h (OP_MASK_FUNCT3): New.
649 (OP_SH_FUNCT3): Likewise.
650 (OP_MASK_FUNCT7): Likewise.
651 (OP_SH_FUNCT7): Likewise.
652 (OP_MASK_OP2): Likewise.
653 (OP_SH_OP2): Likewise.
654 (OP_MASK_CFUNCT4): Likewise.
655 (OP_SH_CFUNCT4): Likewise.
656 (OP_MASK_CFUNCT3): Likewise.
657 (OP_SH_CFUNCT3): Likewise.
658 (riscv_insn_types): Likewise.
659
660 2018-03-13 Nick Clifton <nickc@redhat.com>
661
662 PR 22113
663 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
664 field.
665
666 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
667
668 * opcode/i386 (OLDGCC_COMPAT): Removed.
669
670 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
671
672 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
673
674 2018-02-20 Maciej W. Rozycki <macro@mips.com>
675
676 * opcode/mips.h: Remove `M' operand code.
677
678 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
679
680 * coff/msdos.h: New header.
681 * coff/pe.h: Move common defines to msdos.h.
682 * coff/powerpc.h: Likewise.
683
684 2018-01-13 Nick Clifton <nickc@redhat.com>
685
686 2.30 branch created.
687
688 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
689
690 PR ld/22393
691 * bfdlink.h (bfd_link_info): Add separate_code.
692
693 2018-01-04 Jim Wilson <jimw@sifive.com>
694
695 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
696 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
697 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
698 Add alias to map mbadaddr to CSR_MTVAL.
699
700 2018-01-03 Alan Modra <amodra@gmail.com>
701
702 Update year range in copyright notice of all files.
703
704 For older changes see ChangeLog-2017
705 \f
706 Copyright (C) 2018 Free Software Foundation, Inc.
707
708 Copying and distribution of this file, with or without modification,
709 are permitted in any medium without royalty provided the copyright
710 notice and this notice are preserved.
711
712 Local Variables:
713 mode: change-log
714 left-margin: 8
715 fill-column: 74
716 version-control: never
717 End:
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