[Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2018-10-05 Sudakshina Das <sudi.das@arm.com>
2
3 * opcode/arm.h (ARM_EXT2_V8_5A): New.
4 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
5
6 2018-10-05 Richard Henderson <rth@twiddle.net>
7
8 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
9 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
10 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
11 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
12 R_OR1K_SLO13, R_OR1K_PLTA26.
13
14 2018-10-05 Richard Henderson <rth@twiddle.net>
15
16 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
17 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
18 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
19
20 2018-10-03 Tamar Christina <tamar.christina@arm.com>
21
22 * opcode/aarch64.h (aarch64_inst): Remove.
23 (enum err_type): Add ERR_VFI.
24 (aarch64_is_destructive_by_operands): New.
25 (init_insn_sequence): New.
26 (aarch64_decode_insn): Remove param name.
27
28 2018-10-03 Tamar Christina <tamar.christina@arm.com>
29
30 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
31 more arguments.
32
33 2018-10-03 Tamar Christina <tamar.christina@arm.com>
34
35 * opcode/aarch64.h (enum err_type): New.
36 (aarch64_decode_insn): Use it.
37
38 2018-10-03 Tamar Christina <tamar.christina@arm.com>
39
40 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
41 (aarch64_opcode_encode): Use it.
42
43 2018-10-03 Tamar Christina <tamar.christina@arm.com>
44
45 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
46 extend flags field size.
47 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
48
49 2018-10-03 John Darrington <john@darrington.wattle.id.au>
50
51 * dis-asm.h (print_insn_s12z): New declaration.
52
53 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
54
55 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
56 (MASK_FENCE_TSO): Likewise.
57
58 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
59
60 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
61
62 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
63
64 PR binutils/23694
65 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
66 include zero size sections at start of PT_NOTE segment.
67
68 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
69
70 * elf/nds32.h: Remove the unused target features.
71 * dis-asm.h (disassemble_init_nds32): Declared.
72 * elf/nds32.h (E_NDS32_NULL): Removed.
73 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
74 * opcode/nds32.h: Ident.
75 (N32_SUB6, INSN_LW): New macros.
76 (enum n32_opcodes): Updated.
77 * elf/nds32.h: Doc fixes.
78 * elf/nds32.h: Add R_NDS32_LSI.
79 * elf/nds32.h: Add new relocations for TLS.
80
81 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
82
83 * elf/common.h (AT_SUN_HWCAP): Rename to ...
84 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
85 compatibility.
86 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
87 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
88
89 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
90
91 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
92
93 2018-08-31 Alan Modra <amodra@gmail.com>
94
95 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
96 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
97 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
98 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
99
100 2018-08-30 Kito Cheng <kito@andestech.com>
101
102 * opcode/riscv.h (MAX_SUBSET_NUM): New.
103 (riscv_opcode): Add xlen_requirement field and change type of
104 subset.
105
106 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
107
108 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
109 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
110
111 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
112
113 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
114 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
115
116 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
117
118 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
119 E_MIPS_MACH_GS464.
120 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
121 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
122 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
123 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
124
125 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
126
127 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
128 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
129 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
130
131 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
132
133 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
134 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
135 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
136
137 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
138
139 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
140 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
141 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
142
143 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
144
145 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
146 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
147 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
148 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
149 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
150 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
151 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
152 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
153 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
154 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
155 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
156 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
157 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
158 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
159 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
160 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
161 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
162 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
163 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
164 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
165 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
166 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
167 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
168 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
169 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
170 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
171 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
172 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
173 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
174 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
175 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
176 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
177 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
178 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
179 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
180 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
181 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
182 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
183 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
184 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
185 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
186 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
187 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
188 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
189 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
190 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
191 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
192 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
193 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
194 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
195 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
196 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
197 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
198 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
199 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
200 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
201
202 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
203
204 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
205
206 2018-08-21 John Darrington <john@darrington.wattle.id.au>
207
208 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
209
210 2018-08-21 Alan Modra <amodra@gmail.com>
211
212 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
213 Mention use of "extract" function to provide default value.
214 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
215 (ppc_optional_operand_value): Rewrite to use extract function.
216
217 2018-08-18 John Darrington <john@darrington.wattle.id.au>
218
219 * opcode/s12z.h: New file.
220
221 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
222
223 * elf/arm.h: Updated comments for e_flags definitions.
224
225 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
226
227 * elf/arc.h (Tag_ARC_ATR_version): New tag.
228
229 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
230
231 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
232
233 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
234
235 Copy over from GCC
236 2018-07-26 Martin Liska <mliska@suse.cz>
237
238 PR lto/86548
239 * libiberty.h (make_temp_file_with_prefix): New function.
240
241 2018-07-30 Jim Wilson <jimw@sifive.com>
242
243 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
244 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
245 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
246
247 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
248
249 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
250 * elf/csky.h: New file.
251
252 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
253 Maciej W. Rozycki <macro@linux-mips.org>
254
255 * elf/mips.h (AFL_ASE_MASK): Correct typo.
256
257 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
258
259 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
260
261 2018-07-26 Alan Modra <amodra@gmail.com>
262
263 * elf/ppc64.h: Specify byte offset to local entry for values
264 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
265 value for such functions when entering via global entry point.
266 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
267
268 2018-07-24 Alan Modra <amodra@gmail.com>
269
270 PR 23430
271 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
272
273 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
274 Maciej W. Rozycki <macro@mips.com>
275
276 * elf/mips.h (AFL_ASE_MMI): New macro.
277 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
278 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
279
280 2018-07-17 Maciej W. Rozycki <macro@mips.com>
281
282 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
283
284 2018-07-06 Alan Modra <amodra@gmail.com>
285
286 * diagnostics.h: Comment on macro usage.
287
288 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
289
290 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
291 Define for clang.
292
293 2018-07-02 Maciej W. Rozycki <macro@mips.com>
294
295 PR tdep/8282
296 * dis-asm.h (disasm_option_arg_t): New typedef.
297 (disasm_options_and_args_t): Likewise.
298 (disasm_options_t): Add `arg' member, document members.
299 (disassembler_options_mips): New prototype.
300 (disassembler_options_arm, disassembler_options_powerpc)
301 (disassembler_options_s390): Update prototypes.
302
303 2018-06-29 Tamar Christina <tamar.christina@arm.com>
304
305 PR binutils/23192
306 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
307
308 2018-06-26 Alan Modra <amodra@gmail.com>
309
310 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
311
312 2018-06-24 Nick Clifton <nickc@redhat.com>
313
314 2.31 branch created.
315
316 2018-06-21 Alan Hayward <alan.hayward@arm.com>
317
318 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
319 for non SHT_NOBITS.
320
321 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
322
323 Sync with GCC
324
325 2018-05-24 Tom Rix <trix@juniper.net>
326
327 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
328
329 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
330
331 * longlong.h [__riscv] (__umulsidi3): Define.
332 [__riscv] (umul_ppmm): Likewise.
333 [__riscv] (__muluw3): Likewise.
334
335 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
336
337 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
338 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
339 * opcode/mips.h: Document "+\" operand format.
340 (ASE_GINV): New macro.
341
342 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
343 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
344
345 * elf/mips.h (AFL_ASE_CRC): New macro.
346 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
347 * opcode/mips.h (ASE_CRC): New macro.
348 * opcode/mips.h (ASE_CRC64): Likewise.
349
350 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
351
352 * elf/xtensa.h (xtensa_read_table_entries)
353 (xtensa_compute_fill_extra_space): New declarations.
354
355 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
356
357 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
358 define for GCC.
359
360 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
361
362 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
363 (DIAGNOSTIC_STRINGIFY): Likewise.
364 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
365 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
366 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
367 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
368 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
369 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
370
371 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
372
373 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
374
375 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
376
377 * splay-tree.h (splay_tree_compare_strings,
378 splay_tree_delete_pointers): Declare new utility functions.
379
380 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
381
382 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
383
384 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
385
386 * elf/riscv.h (EF_RISCV_RVE): New define.
387
388 2018-05-18 John Darrington <john@darrington.wattle.id.au>
389
390 * elf/s12z.h: New header.
391
392 2018-05-15 Tamar Christina <tamar.christina@arm.com>
393
394 PR binutils/21446
395 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
396
397 2018-05-15 Tamar Christina <tamar.christina@arm.com>
398
399 PR binutils/21446
400 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
401 (aarch64_print_operand): Support notes.
402
403 2018-05-15 Tamar Christina <tamar.christina@arm.com>
404
405 PR binutils/21446
406 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
407 (aarch64_decode_insn): Accept error struct.
408
409 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
410
411 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
412
413 2018-05-10 John Darrington <john@darrington.wattle.id.au>
414
415 * elf/common.h (EM_S12Z): New macro.
416
417 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
418
419 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
420 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
421 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
422 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
423
424 2018-05-08 Jim Wilson <jimw@sifive.com>
425
426 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
427 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
428 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
429
430 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
431
432 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
433 (vle_num_opcodes): Likewise.
434 (spe2_num_opcodes): Likewise.
435
436 2018-05-04 Alan Modra <amodra@gmail.com>
437
438 * ansidecl.h: Import from gcc.
439 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
440 to s_name.
441 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
442
443 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
444
445 * dis-asm.h: Added print_nfp_disassembler_options prototype.
446 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
447 Generic System V Application Binary Interface.
448 * elf/nfp.h: New, for NFP support.
449 * opcode/nfp.h: New, for NFP support.
450
451 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
452 Mickaël Guêné <mickael.guene@st.com>
453
454 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
455 R_ARM_TLS_IE32_FDPIC.
456
457 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
458 Mickaël Guêné <mickael.guene@st.com>
459
460 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
461 (R_ARM_FUNCDESC)
462 (R_ARM_FUNCDESC_VALUE): Define new relocations.
463
464 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
465 Mickaël Guêné <mickael.guene@st.com>
466
467 * elf/arm.h (EF_ARM_FDPIC): New.
468
469 2018-04-18 Alan Modra <amodra@gmail.com>
470
471 * coff/mipspe.h: Delete.
472
473 2018-04-18 Alan Modra <amodra@gmail.com>
474
475 * aout/dynix3.h: Delete.
476
477 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
478
479 Microblaze Target: PIC data text relative
480
481 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
482 * elf/microblaze.h (Add 3 new relocations):
483 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
484 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
485
486 2018-04-17 Alan Modra <amodra@gmail.com>
487
488 * elf/i370.h: Revert removal.
489 * elf/i860.h: Likewise.
490 * elf/i960.h: Likewise.
491
492 2018-04-16 Alan Modra <amodra@gmail.com>
493
494 * coff/sparc.h: Delete.
495
496 2018-04-16 Alan Modra <amodra@gmail.com>
497
498 * aout/host.h: Remove m68k-aout and m68k-coff support.
499 * aout/hp300hpux.h: Delete.
500 * coff/apollo.h: Delete.
501 * coff/aux-coff.h: Delete.
502 * coff/m68k.h: Delete.
503
504 2018-04-16 Alan Modra <amodra@gmail.com>
505
506 * dis-asm.h: Remove sh5 and sh64 support.
507
508 2018-04-16 Alan Modra <amodra@gmail.com>
509
510 * coff/internal.h: Remove w65 support.
511 * coff/w65.h: Delete.
512
513 2018-04-16 Alan Modra <amodra@gmail.com>
514
515 * coff/we32k.h: Delete.
516
517 2018-04-16 Alan Modra <amodra@gmail.com>
518
519 * coff/internal.h: Remove m88k support.
520 * coff/m88k.h: Delete.
521 * opcode/m88k.h: Delete.
522
523 2018-04-16 Alan Modra <amodra@gmail.com>
524
525 * elf/i370.h: Delete.
526 * opcode/i370.h: Delete.
527
528 2018-04-16 Alan Modra <amodra@gmail.com>
529
530 * coff/h8500.h: Delete.
531 * coff/internal.h: Remove h8500 support.
532
533 2018-04-16 Alan Modra <amodra@gmail.com>
534
535 * coff/h8300.h: Delete.
536
537 2018-04-16 Alan Modra <amodra@gmail.com>
538
539 * ieee.h: Delete.
540
541 2018-04-16 Alan Modra <amodra@gmail.com>
542
543 * aout/host.h: Remove newsos3 support.
544
545 2018-04-16 Alan Modra <amodra@gmail.com>
546
547 * nlm/ChangeLog-9315: Delete.
548 * nlm/alpha-ext.h: Delete.
549 * nlm/common.h: Delete.
550 * nlm/external.h: Delete.
551 * nlm/i386-ext.h: Delete.
552 * nlm/internal.h: Delete.
553 * nlm/ppc-ext.h: Delete.
554 * nlm/sparc32-ext.h: Delete.
555
556 2018-04-16 Alan Modra <amodra@gmail.com>
557
558 * opcode/tahoe.h: Delete.
559
560 2018-04-11 Alan Modra <amodra@gmail.com>
561
562 * aout/adobe.h: Delete.
563 * aout/reloc.h: Delete.
564 * coff/i860.h: Delete.
565 * coff/i960.h: Delete.
566 * elf/i860.h: Delete.
567 * elf/i960.h: Delete.
568 * opcode/i860.h: Delete.
569 * opcode/i960.h: Delete.
570 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
571 * aout/ar.h (ARMAGB): Remove.
572 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
573 union internal_auxent): Remove i960 support.
574
575 2018-04-09 Alan Modra <amodra@gmail.com>
576
577 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
578 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
579
580 2018-03-28 Renlin Li <renlin.li@arm.com>
581
582 PR ld/22970
583 * elf/aarch64.h: Add relocation number for
584 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
585 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
586 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
587 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
588 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
589 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
590 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
591 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
592
593 2018-03-28 Nick Clifton <nickc@redhat.com>
594
595 PR 22988
596 * opcode/aarch64.h (enum aarch64_opnd): Add
597 AARCH64_OPND_SVE_ADDR_R.
598
599 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
600
601 * elf/common.h (DF_1_KMOD): New.
602 (DF_1_WEAKFILTER): Likewise.
603 (DF_1_NOCOMMON): Likewise.
604
605 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
606
607 * opcode/riscv.h (OP_MASK_FUNCT3): New.
608 (OP_SH_FUNCT3): Likewise.
609 (OP_MASK_FUNCT7): Likewise.
610 (OP_SH_FUNCT7): Likewise.
611 (OP_MASK_OP2): Likewise.
612 (OP_SH_OP2): Likewise.
613 (OP_MASK_CFUNCT4): Likewise.
614 (OP_SH_CFUNCT4): Likewise.
615 (OP_MASK_CFUNCT3): Likewise.
616 (OP_SH_CFUNCT3): Likewise.
617 (riscv_insn_types): Likewise.
618
619 2018-03-13 Nick Clifton <nickc@redhat.com>
620
621 PR 22113
622 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
623 field.
624
625 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
626
627 * opcode/i386 (OLDGCC_COMPAT): Removed.
628
629 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
630
631 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
632
633 2018-02-20 Maciej W. Rozycki <macro@mips.com>
634
635 * opcode/mips.h: Remove `M' operand code.
636
637 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
638
639 * coff/msdos.h: New header.
640 * coff/pe.h: Move common defines to msdos.h.
641 * coff/powerpc.h: Likewise.
642
643 2018-01-13 Nick Clifton <nickc@redhat.com>
644
645 2.30 branch created.
646
647 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
648
649 PR ld/22393
650 * bfdlink.h (bfd_link_info): Add separate_code.
651
652 2018-01-04 Jim Wilson <jimw@sifive.com>
653
654 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
655 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
656 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
657 Add alias to map mbadaddr to CSR_MTVAL.
658
659 2018-01-03 Alan Modra <amodra@gmail.com>
660
661 Update year range in copyright notice of all files.
662
663 For older changes see ChangeLog-2017
664 \f
665 Copyright (C) 2018 Free Software Foundation, Inc.
666
667 Copying and distribution of this file, with or without modification,
668 are permitted in any medium without royalty provided the copyright
669 notice and this notice are preserved.
670
671 Local Variables:
672 mode: change-log
673 left-margin: 8
674 fill-column: 74
675 version-control: never
676 End:
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