1 2018-11-27 Jim Wilson <jimw@sifive.com>
3 * opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
4 (OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
6 2018-11-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
8 * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
9 (ARM_ARCH_V6M_ONLY): Remove.
10 (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
11 ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
12 ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
13 ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
14 ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
15 ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
16 ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
17 ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
18 ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
19 ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
20 ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
21 ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
22 FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
23 FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
24 FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
25 FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
26 FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
27 FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
28 ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
29 ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
30 ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
31 ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
32 ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
33 ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
34 ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
35 ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
36 ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
37 ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
38 ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
39 ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
40 ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
41 FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
42 FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
43 FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
44 FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
45 FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
46 FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
47 FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
48 FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
49 FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
50 FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
51 FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
52 FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
53 FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
54 ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
55 ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
56 ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
57 ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
58 ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
59 ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
60 ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
61 ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
62 ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
63 ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
65 2018-11-12 Sudakshina Das <sudi.das@arm.com>
67 * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
68 (aarch64_insn_class): Add ldstgv_indexed.
70 2018-11-12 Sudakshina Das <sudi.das@arm.com>
72 * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
73 and AARCH64_OPND_ADDR_SIMM13.
74 (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
76 2018-11-12 Sudakshina Das <sudi.das@arm.com>
78 * opcode/aarch64.h (aarch64_opnd): Add
79 AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
81 2018-11-12 Sudakshina Das <sudi.das@arm.com>
83 * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
85 2018-11-07 Roman Bolshakov <r.bolshakov@yadro.com>
86 Saagar Jha <saagar@saagarjha.com>
88 * mach-o/external.h (mach_o_nversion_min_command_external): Rename
90 (mach_o_note_command_external): New.
91 (mach_o_build_version_command_external): New.
92 * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
93 (BFD_MACH_O_LC_NOTE): Define.
95 2018-11-06 Romain Margheriti <lilrom13@gmail.com>
98 * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
100 2018-11-06 Sudakshina Das <sudi.das@arm.com>
102 * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
104 (ARM_AEXT2_V8_5A): Here.
106 2018-10-26 John Baldwin <jhb@FreeBSD.org>
108 * elf/common.h (AT_FREEBSD_HWCAP2): Define.
110 2018-10-09 Sudakshina Das <sudi.das@arm.com>
112 * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
113 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
115 2018-10-09 Sudakshina Das <sudi.das@arm.com>
117 * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
118 (AARCH64_FEATURE_ID_PFR2): New.
119 (AARCH64_ARCH_V8_5): Add both by default.
121 2018-10-09 Sudakshina Das <sudi.das@arm.com>
123 * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
124 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
125 (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
126 (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
127 define HINT #imm values.
128 (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
130 2018-10-09 Sudakshina Das <sudi.das@arm.com>
132 * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
134 2018-10-09 Sudakshina Das <sudi.das@arm.com>
136 * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
138 2018-10-09 Sudakshina Das <sudi.das@arm.com>
140 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
141 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
142 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
143 (aarch64_sys_regs_sr): Declare new table.
145 2018-10-09 Sudakshina Das <sudi.das@arm.com>
147 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
148 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
150 2018-10-09 Sudakshina Das <sudi.das@arm.com>
152 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
153 (AARCH64_FEATURE_FRINTTS): New.
154 (AARCH64_ARCH_V8_5): Add both by default.
156 2018-10-09 Sudakshina Das <sudi.das@arm.com>
158 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
159 (AARCH64_ARCH_V8_5): New.
161 2018-10-08 Alan Modra <amodra@gmail.com>
163 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
165 2018-10-05 Sudakshina Das <sudi.das@arm.com>
167 * opcode/arm.h (ARM_EXT2_PREDRES): New.
168 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
170 2018-10-05 Sudakshina Das <sudi.das@arm.com>
172 * opcode/arm.h (ARM_EXT2_SB): New.
173 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
175 2018-10-05 Sudakshina Das <sudi.das@arm.com>
177 * opcode/arm.h (ARM_EXT2_V8_5A): New.
178 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
180 2018-10-05 Richard Henderson <rth@twiddle.net>
182 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
183 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
184 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
185 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
186 R_OR1K_SLO13, R_OR1K_PLTA26.
188 2018-10-05 Richard Henderson <rth@twiddle.net>
190 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
191 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
192 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
194 2018-10-03 Tamar Christina <tamar.christina@arm.com>
196 * opcode/aarch64.h (aarch64_inst): Remove.
197 (enum err_type): Add ERR_VFI.
198 (aarch64_is_destructive_by_operands): New.
199 (init_insn_sequence): New.
200 (aarch64_decode_insn): Remove param name.
202 2018-10-03 Tamar Christina <tamar.christina@arm.com>
204 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
207 2018-10-03 Tamar Christina <tamar.christina@arm.com>
209 * opcode/aarch64.h (enum err_type): New.
210 (aarch64_decode_insn): Use it.
212 2018-10-03 Tamar Christina <tamar.christina@arm.com>
214 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
215 (aarch64_opcode_encode): Use it.
217 2018-10-03 Tamar Christina <tamar.christina@arm.com>
219 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
220 extend flags field size.
221 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
223 2018-10-03 John Darrington <john@darrington.wattle.id.au>
225 * dis-asm.h (print_insn_s12z): New declaration.
227 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
229 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
230 (MASK_FENCE_TSO): Likewise.
232 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
234 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
236 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
239 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
240 include zero size sections at start of PT_NOTE segment.
242 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
244 * elf/nds32.h: Remove the unused target features.
245 * dis-asm.h (disassemble_init_nds32): Declared.
246 * elf/nds32.h (E_NDS32_NULL): Removed.
247 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
248 * opcode/nds32.h: Ident.
249 (N32_SUB6, INSN_LW): New macros.
250 (enum n32_opcodes): Updated.
251 * elf/nds32.h: Doc fixes.
252 * elf/nds32.h: Add R_NDS32_LSI.
253 * elf/nds32.h: Add new relocations for TLS.
255 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
257 * elf/common.h (AT_SUN_HWCAP): Rename to ...
258 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
260 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
261 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
263 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
265 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
267 2018-08-31 Alan Modra <amodra@gmail.com>
269 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
270 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
271 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
272 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
274 2018-08-30 Kito Cheng <kito@andestech.com>
276 * opcode/riscv.h (MAX_SUBSET_NUM): New.
277 (riscv_opcode): Add xlen_requirement field and change type of
280 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
282 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
283 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
285 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
287 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
288 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
290 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
292 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
294 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
295 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
296 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
297 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
299 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
301 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
302 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
303 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
305 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
307 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
308 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
309 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
311 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
313 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
314 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
315 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
317 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
319 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
320 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
321 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
322 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
323 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
324 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
325 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
326 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
327 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
328 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
329 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
330 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
331 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
332 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
333 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
334 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
335 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
336 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
337 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
338 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
339 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
340 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
341 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
342 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
343 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
344 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
345 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
346 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
347 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
348 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
349 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
350 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
351 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
352 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
353 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
354 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
355 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
356 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
357 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
358 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
359 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
360 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
361 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
362 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
363 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
364 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
365 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
366 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
367 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
368 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
369 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
370 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
371 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
372 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
373 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
374 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
376 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
378 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
380 2018-08-21 John Darrington <john@darrington.wattle.id.au>
382 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
384 2018-08-21 Alan Modra <amodra@gmail.com>
386 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
387 Mention use of "extract" function to provide default value.
388 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
389 (ppc_optional_operand_value): Rewrite to use extract function.
391 2018-08-18 John Darrington <john@darrington.wattle.id.au>
393 * opcode/s12z.h: New file.
395 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
397 * elf/arm.h: Updated comments for e_flags definitions.
399 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
401 * elf/arc.h (Tag_ARC_ATR_version): New tag.
403 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
405 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
407 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
410 2018-07-26 Martin Liska <mliska@suse.cz>
413 * libiberty.h (make_temp_file_with_prefix): New function.
415 2018-07-30 Jim Wilson <jimw@sifive.com>
417 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
418 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
419 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
421 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
423 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
424 * elf/csky.h: New file.
426 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
427 Maciej W. Rozycki <macro@linux-mips.org>
429 * elf/mips.h (AFL_ASE_MASK): Correct typo.
431 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
433 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
435 2018-07-26 Alan Modra <amodra@gmail.com>
437 * elf/ppc64.h: Specify byte offset to local entry for values
438 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
439 value for such functions when entering via global entry point.
440 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
442 2018-07-24 Alan Modra <amodra@gmail.com>
445 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
447 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
448 Maciej W. Rozycki <macro@mips.com>
450 * elf/mips.h (AFL_ASE_MMI): New macro.
451 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
452 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
454 2018-07-17 Maciej W. Rozycki <macro@mips.com>
456 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
458 2018-07-06 Alan Modra <amodra@gmail.com>
460 * diagnostics.h: Comment on macro usage.
462 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
464 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
467 2018-07-02 Maciej W. Rozycki <macro@mips.com>
470 * dis-asm.h (disasm_option_arg_t): New typedef.
471 (disasm_options_and_args_t): Likewise.
472 (disasm_options_t): Add `arg' member, document members.
473 (disassembler_options_mips): New prototype.
474 (disassembler_options_arm, disassembler_options_powerpc)
475 (disassembler_options_s390): Update prototypes.
477 2018-06-29 Tamar Christina <tamar.christina@arm.com>
480 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
482 2018-06-26 Alan Modra <amodra@gmail.com>
484 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
486 2018-06-24 Nick Clifton <nickc@redhat.com>
490 2018-06-21 Alan Hayward <alan.hayward@arm.com>
492 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
495 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
499 2018-05-24 Tom Rix <trix@juniper.net>
501 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
503 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
505 * longlong.h [__riscv] (__umulsidi3): Define.
506 [__riscv] (umul_ppmm): Likewise.
507 [__riscv] (__muluw3): Likewise.
509 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
511 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
512 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
513 * opcode/mips.h: Document "+\" operand format.
514 (ASE_GINV): New macro.
516 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
517 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
519 * elf/mips.h (AFL_ASE_CRC): New macro.
520 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
521 * opcode/mips.h (ASE_CRC): New macro.
522 * opcode/mips.h (ASE_CRC64): Likewise.
524 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
526 * elf/xtensa.h (xtensa_read_table_entries)
527 (xtensa_compute_fill_extra_space): New declarations.
529 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
531 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
534 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
536 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
537 (DIAGNOSTIC_STRINGIFY): Likewise.
538 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
539 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
540 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
541 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
542 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
543 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
545 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
547 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
549 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
551 * splay-tree.h (splay_tree_compare_strings,
552 splay_tree_delete_pointers): Declare new utility functions.
554 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
556 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
558 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
560 * elf/riscv.h (EF_RISCV_RVE): New define.
562 2018-05-18 John Darrington <john@darrington.wattle.id.au>
564 * elf/s12z.h: New header.
566 2018-05-15 Tamar Christina <tamar.christina@arm.com>
569 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
571 2018-05-15 Tamar Christina <tamar.christina@arm.com>
574 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
575 (aarch64_print_operand): Support notes.
577 2018-05-15 Tamar Christina <tamar.christina@arm.com>
580 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
581 (aarch64_decode_insn): Accept error struct.
583 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
585 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
587 2018-05-10 John Darrington <john@darrington.wattle.id.au>
589 * elf/common.h (EM_S12Z): New macro.
591 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
593 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
594 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
595 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
596 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
598 2018-05-08 Jim Wilson <jimw@sifive.com>
600 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
601 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
602 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
604 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
606 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
607 (vle_num_opcodes): Likewise.
608 (spe2_num_opcodes): Likewise.
610 2018-05-04 Alan Modra <amodra@gmail.com>
612 * ansidecl.h: Import from gcc.
613 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
615 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
617 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
619 * dis-asm.h: Added print_nfp_disassembler_options prototype.
620 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
621 Generic System V Application Binary Interface.
622 * elf/nfp.h: New, for NFP support.
623 * opcode/nfp.h: New, for NFP support.
625 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
626 Mickaël Guêné <mickael.guene@st.com>
628 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
629 R_ARM_TLS_IE32_FDPIC.
631 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
632 Mickaël Guêné <mickael.guene@st.com>
634 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
636 (R_ARM_FUNCDESC_VALUE): Define new relocations.
638 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
639 Mickaël Guêné <mickael.guene@st.com>
641 * elf/arm.h (EF_ARM_FDPIC): New.
643 2018-04-18 Alan Modra <amodra@gmail.com>
645 * coff/mipspe.h: Delete.
647 2018-04-18 Alan Modra <amodra@gmail.com>
649 * aout/dynix3.h: Delete.
651 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
653 Microblaze Target: PIC data text relative
655 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
656 * elf/microblaze.h (Add 3 new relocations):
657 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
658 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
660 2018-04-17 Alan Modra <amodra@gmail.com>
662 * elf/i370.h: Revert removal.
663 * elf/i860.h: Likewise.
664 * elf/i960.h: Likewise.
666 2018-04-16 Alan Modra <amodra@gmail.com>
668 * coff/sparc.h: Delete.
670 2018-04-16 Alan Modra <amodra@gmail.com>
672 * aout/host.h: Remove m68k-aout and m68k-coff support.
673 * aout/hp300hpux.h: Delete.
674 * coff/apollo.h: Delete.
675 * coff/aux-coff.h: Delete.
676 * coff/m68k.h: Delete.
678 2018-04-16 Alan Modra <amodra@gmail.com>
680 * dis-asm.h: Remove sh5 and sh64 support.
682 2018-04-16 Alan Modra <amodra@gmail.com>
684 * coff/internal.h: Remove w65 support.
685 * coff/w65.h: Delete.
687 2018-04-16 Alan Modra <amodra@gmail.com>
689 * coff/we32k.h: Delete.
691 2018-04-16 Alan Modra <amodra@gmail.com>
693 * coff/internal.h: Remove m88k support.
694 * coff/m88k.h: Delete.
695 * opcode/m88k.h: Delete.
697 2018-04-16 Alan Modra <amodra@gmail.com>
699 * elf/i370.h: Delete.
700 * opcode/i370.h: Delete.
702 2018-04-16 Alan Modra <amodra@gmail.com>
704 * coff/h8500.h: Delete.
705 * coff/internal.h: Remove h8500 support.
707 2018-04-16 Alan Modra <amodra@gmail.com>
709 * coff/h8300.h: Delete.
711 2018-04-16 Alan Modra <amodra@gmail.com>
715 2018-04-16 Alan Modra <amodra@gmail.com>
717 * aout/host.h: Remove newsos3 support.
719 2018-04-16 Alan Modra <amodra@gmail.com>
721 * nlm/ChangeLog-9315: Delete.
722 * nlm/alpha-ext.h: Delete.
723 * nlm/common.h: Delete.
724 * nlm/external.h: Delete.
725 * nlm/i386-ext.h: Delete.
726 * nlm/internal.h: Delete.
727 * nlm/ppc-ext.h: Delete.
728 * nlm/sparc32-ext.h: Delete.
730 2018-04-16 Alan Modra <amodra@gmail.com>
732 * opcode/tahoe.h: Delete.
734 2018-04-11 Alan Modra <amodra@gmail.com>
736 * aout/adobe.h: Delete.
737 * aout/reloc.h: Delete.
738 * coff/i860.h: Delete.
739 * coff/i960.h: Delete.
740 * elf/i860.h: Delete.
741 * elf/i960.h: Delete.
742 * opcode/i860.h: Delete.
743 * opcode/i960.h: Delete.
744 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
745 * aout/ar.h (ARMAGB): Remove.
746 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
747 union internal_auxent): Remove i960 support.
749 2018-04-09 Alan Modra <amodra@gmail.com>
751 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
752 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
754 2018-03-28 Renlin Li <renlin.li@arm.com>
757 * elf/aarch64.h: Add relocation number for
758 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
759 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
760 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
761 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
762 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
763 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
764 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
765 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
767 2018-03-28 Nick Clifton <nickc@redhat.com>
770 * opcode/aarch64.h (enum aarch64_opnd): Add
771 AARCH64_OPND_SVE_ADDR_R.
773 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
775 * elf/common.h (DF_1_KMOD): New.
776 (DF_1_WEAKFILTER): Likewise.
777 (DF_1_NOCOMMON): Likewise.
779 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
781 * opcode/riscv.h (OP_MASK_FUNCT3): New.
782 (OP_SH_FUNCT3): Likewise.
783 (OP_MASK_FUNCT7): Likewise.
784 (OP_SH_FUNCT7): Likewise.
785 (OP_MASK_OP2): Likewise.
786 (OP_SH_OP2): Likewise.
787 (OP_MASK_CFUNCT4): Likewise.
788 (OP_SH_CFUNCT4): Likewise.
789 (OP_MASK_CFUNCT3): Likewise.
790 (OP_SH_CFUNCT3): Likewise.
791 (riscv_insn_types): Likewise.
793 2018-03-13 Nick Clifton <nickc@redhat.com>
796 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
799 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
801 * opcode/i386 (OLDGCC_COMPAT): Removed.
803 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
805 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
807 2018-02-20 Maciej W. Rozycki <macro@mips.com>
809 * opcode/mips.h: Remove `M' operand code.
811 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
813 * coff/msdos.h: New header.
814 * coff/pe.h: Move common defines to msdos.h.
815 * coff/powerpc.h: Likewise.
817 2018-01-13 Nick Clifton <nickc@redhat.com>
821 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
824 * bfdlink.h (bfd_link_info): Add separate_code.
826 2018-01-04 Jim Wilson <jimw@sifive.com>
828 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
829 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
830 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
831 Add alias to map mbadaddr to CSR_MTVAL.
833 2018-01-03 Alan Modra <amodra@gmail.com>
835 Update year range in copyright notice of all files.
837 For older changes see ChangeLog-2017
839 Copyright (C) 2018 Free Software Foundation, Inc.
841 Copying and distribution of this file, with or without modification,
842 are permitted in any medium without royalty provided the copyright
843 notice and this notice are preserved.
849 version-control: never