[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2018-10-09 Sudakshina Das <sudi.das@arm.com>
2
3 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
4 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
5
6 2018-10-09 Sudakshina Das <sudi.das@arm.com>
7
8 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
9 (AARCH64_FEATURE_FRINTTS): New.
10 (AARCH64_ARCH_V8_5): Add both by default.
11
12 2018-10-09 Sudakshina Das <sudi.das@arm.com>
13
14 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
15 (AARCH64_ARCH_V8_5): New.
16
17 2018-10-08 Alan Modra <amodra@gmail.com>
18
19 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
20
21 2018-10-05 Sudakshina Das <sudi.das@arm.com>
22
23 * opcode/arm.h (ARM_EXT2_PREDRES): New.
24 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
25
26 2018-10-05 Sudakshina Das <sudi.das@arm.com>
27
28 * opcode/arm.h (ARM_EXT2_SB): New.
29 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
30
31 2018-10-05 Sudakshina Das <sudi.das@arm.com>
32
33 * opcode/arm.h (ARM_EXT2_V8_5A): New.
34 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
35
36 2018-10-05 Richard Henderson <rth@twiddle.net>
37
38 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
39 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
40 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
41 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
42 R_OR1K_SLO13, R_OR1K_PLTA26.
43
44 2018-10-05 Richard Henderson <rth@twiddle.net>
45
46 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
47 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
48 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
49
50 2018-10-03 Tamar Christina <tamar.christina@arm.com>
51
52 * opcode/aarch64.h (aarch64_inst): Remove.
53 (enum err_type): Add ERR_VFI.
54 (aarch64_is_destructive_by_operands): New.
55 (init_insn_sequence): New.
56 (aarch64_decode_insn): Remove param name.
57
58 2018-10-03 Tamar Christina <tamar.christina@arm.com>
59
60 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
61 more arguments.
62
63 2018-10-03 Tamar Christina <tamar.christina@arm.com>
64
65 * opcode/aarch64.h (enum err_type): New.
66 (aarch64_decode_insn): Use it.
67
68 2018-10-03 Tamar Christina <tamar.christina@arm.com>
69
70 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
71 (aarch64_opcode_encode): Use it.
72
73 2018-10-03 Tamar Christina <tamar.christina@arm.com>
74
75 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
76 extend flags field size.
77 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
78
79 2018-10-03 John Darrington <john@darrington.wattle.id.au>
80
81 * dis-asm.h (print_insn_s12z): New declaration.
82
83 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
84
85 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
86 (MASK_FENCE_TSO): Likewise.
87
88 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
89
90 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
91
92 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
93
94 PR binutils/23694
95 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
96 include zero size sections at start of PT_NOTE segment.
97
98 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
99
100 * elf/nds32.h: Remove the unused target features.
101 * dis-asm.h (disassemble_init_nds32): Declared.
102 * elf/nds32.h (E_NDS32_NULL): Removed.
103 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
104 * opcode/nds32.h: Ident.
105 (N32_SUB6, INSN_LW): New macros.
106 (enum n32_opcodes): Updated.
107 * elf/nds32.h: Doc fixes.
108 * elf/nds32.h: Add R_NDS32_LSI.
109 * elf/nds32.h: Add new relocations for TLS.
110
111 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
112
113 * elf/common.h (AT_SUN_HWCAP): Rename to ...
114 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
115 compatibility.
116 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
117 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
118
119 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
120
121 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
122
123 2018-08-31 Alan Modra <amodra@gmail.com>
124
125 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
126 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
127 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
128 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
129
130 2018-08-30 Kito Cheng <kito@andestech.com>
131
132 * opcode/riscv.h (MAX_SUBSET_NUM): New.
133 (riscv_opcode): Add xlen_requirement field and change type of
134 subset.
135
136 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
137
138 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
139 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
140
141 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
142
143 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
144 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
145
146 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
147
148 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
149 E_MIPS_MACH_GS464.
150 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
151 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
152 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
153 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
154
155 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
156
157 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
158 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
159 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
160
161 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
162
163 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
164 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
165 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
166
167 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
168
169 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
170 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
171 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
172
173 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
174
175 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
176 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
177 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
178 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
179 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
180 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
181 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
182 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
183 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
184 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
185 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
186 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
187 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
188 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
189 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
190 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
191 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
192 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
193 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
194 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
195 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
196 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
197 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
198 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
199 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
200 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
201 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
202 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
203 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
204 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
205 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
206 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
207 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
208 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
209 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
210 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
211 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
212 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
213 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
214 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
215 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
216 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
217 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
218 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
219 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
220 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
221 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
222 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
223 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
224 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
225 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
226 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
227 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
228 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
229 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
230 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
231
232 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
233
234 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
235
236 2018-08-21 John Darrington <john@darrington.wattle.id.au>
237
238 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
239
240 2018-08-21 Alan Modra <amodra@gmail.com>
241
242 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
243 Mention use of "extract" function to provide default value.
244 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
245 (ppc_optional_operand_value): Rewrite to use extract function.
246
247 2018-08-18 John Darrington <john@darrington.wattle.id.au>
248
249 * opcode/s12z.h: New file.
250
251 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
252
253 * elf/arm.h: Updated comments for e_flags definitions.
254
255 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
256
257 * elf/arc.h (Tag_ARC_ATR_version): New tag.
258
259 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
260
261 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
262
263 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
264
265 Copy over from GCC
266 2018-07-26 Martin Liska <mliska@suse.cz>
267
268 PR lto/86548
269 * libiberty.h (make_temp_file_with_prefix): New function.
270
271 2018-07-30 Jim Wilson <jimw@sifive.com>
272
273 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
274 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
275 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
276
277 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
278
279 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
280 * elf/csky.h: New file.
281
282 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
283 Maciej W. Rozycki <macro@linux-mips.org>
284
285 * elf/mips.h (AFL_ASE_MASK): Correct typo.
286
287 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
288
289 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
290
291 2018-07-26 Alan Modra <amodra@gmail.com>
292
293 * elf/ppc64.h: Specify byte offset to local entry for values
294 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
295 value for such functions when entering via global entry point.
296 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
297
298 2018-07-24 Alan Modra <amodra@gmail.com>
299
300 PR 23430
301 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
302
303 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
304 Maciej W. Rozycki <macro@mips.com>
305
306 * elf/mips.h (AFL_ASE_MMI): New macro.
307 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
308 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
309
310 2018-07-17 Maciej W. Rozycki <macro@mips.com>
311
312 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
313
314 2018-07-06 Alan Modra <amodra@gmail.com>
315
316 * diagnostics.h: Comment on macro usage.
317
318 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
319
320 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
321 Define for clang.
322
323 2018-07-02 Maciej W. Rozycki <macro@mips.com>
324
325 PR tdep/8282
326 * dis-asm.h (disasm_option_arg_t): New typedef.
327 (disasm_options_and_args_t): Likewise.
328 (disasm_options_t): Add `arg' member, document members.
329 (disassembler_options_mips): New prototype.
330 (disassembler_options_arm, disassembler_options_powerpc)
331 (disassembler_options_s390): Update prototypes.
332
333 2018-06-29 Tamar Christina <tamar.christina@arm.com>
334
335 PR binutils/23192
336 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
337
338 2018-06-26 Alan Modra <amodra@gmail.com>
339
340 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
341
342 2018-06-24 Nick Clifton <nickc@redhat.com>
343
344 2.31 branch created.
345
346 2018-06-21 Alan Hayward <alan.hayward@arm.com>
347
348 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
349 for non SHT_NOBITS.
350
351 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
352
353 Sync with GCC
354
355 2018-05-24 Tom Rix <trix@juniper.net>
356
357 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
358
359 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
360
361 * longlong.h [__riscv] (__umulsidi3): Define.
362 [__riscv] (umul_ppmm): Likewise.
363 [__riscv] (__muluw3): Likewise.
364
365 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
366
367 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
368 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
369 * opcode/mips.h: Document "+\" operand format.
370 (ASE_GINV): New macro.
371
372 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
373 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
374
375 * elf/mips.h (AFL_ASE_CRC): New macro.
376 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
377 * opcode/mips.h (ASE_CRC): New macro.
378 * opcode/mips.h (ASE_CRC64): Likewise.
379
380 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
381
382 * elf/xtensa.h (xtensa_read_table_entries)
383 (xtensa_compute_fill_extra_space): New declarations.
384
385 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
386
387 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
388 define for GCC.
389
390 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
391
392 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
393 (DIAGNOSTIC_STRINGIFY): Likewise.
394 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
395 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
396 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
397 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
398 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
399 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
400
401 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
402
403 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
404
405 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
406
407 * splay-tree.h (splay_tree_compare_strings,
408 splay_tree_delete_pointers): Declare new utility functions.
409
410 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
411
412 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
413
414 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
415
416 * elf/riscv.h (EF_RISCV_RVE): New define.
417
418 2018-05-18 John Darrington <john@darrington.wattle.id.au>
419
420 * elf/s12z.h: New header.
421
422 2018-05-15 Tamar Christina <tamar.christina@arm.com>
423
424 PR binutils/21446
425 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
426
427 2018-05-15 Tamar Christina <tamar.christina@arm.com>
428
429 PR binutils/21446
430 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
431 (aarch64_print_operand): Support notes.
432
433 2018-05-15 Tamar Christina <tamar.christina@arm.com>
434
435 PR binutils/21446
436 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
437 (aarch64_decode_insn): Accept error struct.
438
439 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
440
441 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
442
443 2018-05-10 John Darrington <john@darrington.wattle.id.au>
444
445 * elf/common.h (EM_S12Z): New macro.
446
447 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
448
449 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
450 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
451 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
452 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
453
454 2018-05-08 Jim Wilson <jimw@sifive.com>
455
456 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
457 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
458 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
459
460 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
461
462 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
463 (vle_num_opcodes): Likewise.
464 (spe2_num_opcodes): Likewise.
465
466 2018-05-04 Alan Modra <amodra@gmail.com>
467
468 * ansidecl.h: Import from gcc.
469 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
470 to s_name.
471 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
472
473 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
474
475 * dis-asm.h: Added print_nfp_disassembler_options prototype.
476 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
477 Generic System V Application Binary Interface.
478 * elf/nfp.h: New, for NFP support.
479 * opcode/nfp.h: New, for NFP support.
480
481 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
482 Mickaël Guêné <mickael.guene@st.com>
483
484 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
485 R_ARM_TLS_IE32_FDPIC.
486
487 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
488 Mickaël Guêné <mickael.guene@st.com>
489
490 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
491 (R_ARM_FUNCDESC)
492 (R_ARM_FUNCDESC_VALUE): Define new relocations.
493
494 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
495 Mickaël Guêné <mickael.guene@st.com>
496
497 * elf/arm.h (EF_ARM_FDPIC): New.
498
499 2018-04-18 Alan Modra <amodra@gmail.com>
500
501 * coff/mipspe.h: Delete.
502
503 2018-04-18 Alan Modra <amodra@gmail.com>
504
505 * aout/dynix3.h: Delete.
506
507 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
508
509 Microblaze Target: PIC data text relative
510
511 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
512 * elf/microblaze.h (Add 3 new relocations):
513 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
514 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
515
516 2018-04-17 Alan Modra <amodra@gmail.com>
517
518 * elf/i370.h: Revert removal.
519 * elf/i860.h: Likewise.
520 * elf/i960.h: Likewise.
521
522 2018-04-16 Alan Modra <amodra@gmail.com>
523
524 * coff/sparc.h: Delete.
525
526 2018-04-16 Alan Modra <amodra@gmail.com>
527
528 * aout/host.h: Remove m68k-aout and m68k-coff support.
529 * aout/hp300hpux.h: Delete.
530 * coff/apollo.h: Delete.
531 * coff/aux-coff.h: Delete.
532 * coff/m68k.h: Delete.
533
534 2018-04-16 Alan Modra <amodra@gmail.com>
535
536 * dis-asm.h: Remove sh5 and sh64 support.
537
538 2018-04-16 Alan Modra <amodra@gmail.com>
539
540 * coff/internal.h: Remove w65 support.
541 * coff/w65.h: Delete.
542
543 2018-04-16 Alan Modra <amodra@gmail.com>
544
545 * coff/we32k.h: Delete.
546
547 2018-04-16 Alan Modra <amodra@gmail.com>
548
549 * coff/internal.h: Remove m88k support.
550 * coff/m88k.h: Delete.
551 * opcode/m88k.h: Delete.
552
553 2018-04-16 Alan Modra <amodra@gmail.com>
554
555 * elf/i370.h: Delete.
556 * opcode/i370.h: Delete.
557
558 2018-04-16 Alan Modra <amodra@gmail.com>
559
560 * coff/h8500.h: Delete.
561 * coff/internal.h: Remove h8500 support.
562
563 2018-04-16 Alan Modra <amodra@gmail.com>
564
565 * coff/h8300.h: Delete.
566
567 2018-04-16 Alan Modra <amodra@gmail.com>
568
569 * ieee.h: Delete.
570
571 2018-04-16 Alan Modra <amodra@gmail.com>
572
573 * aout/host.h: Remove newsos3 support.
574
575 2018-04-16 Alan Modra <amodra@gmail.com>
576
577 * nlm/ChangeLog-9315: Delete.
578 * nlm/alpha-ext.h: Delete.
579 * nlm/common.h: Delete.
580 * nlm/external.h: Delete.
581 * nlm/i386-ext.h: Delete.
582 * nlm/internal.h: Delete.
583 * nlm/ppc-ext.h: Delete.
584 * nlm/sparc32-ext.h: Delete.
585
586 2018-04-16 Alan Modra <amodra@gmail.com>
587
588 * opcode/tahoe.h: Delete.
589
590 2018-04-11 Alan Modra <amodra@gmail.com>
591
592 * aout/adobe.h: Delete.
593 * aout/reloc.h: Delete.
594 * coff/i860.h: Delete.
595 * coff/i960.h: Delete.
596 * elf/i860.h: Delete.
597 * elf/i960.h: Delete.
598 * opcode/i860.h: Delete.
599 * opcode/i960.h: Delete.
600 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
601 * aout/ar.h (ARMAGB): Remove.
602 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
603 union internal_auxent): Remove i960 support.
604
605 2018-04-09 Alan Modra <amodra@gmail.com>
606
607 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
608 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
609
610 2018-03-28 Renlin Li <renlin.li@arm.com>
611
612 PR ld/22970
613 * elf/aarch64.h: Add relocation number for
614 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
615 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
616 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
617 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
618 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
619 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
620 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
621 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
622
623 2018-03-28 Nick Clifton <nickc@redhat.com>
624
625 PR 22988
626 * opcode/aarch64.h (enum aarch64_opnd): Add
627 AARCH64_OPND_SVE_ADDR_R.
628
629 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
630
631 * elf/common.h (DF_1_KMOD): New.
632 (DF_1_WEAKFILTER): Likewise.
633 (DF_1_NOCOMMON): Likewise.
634
635 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
636
637 * opcode/riscv.h (OP_MASK_FUNCT3): New.
638 (OP_SH_FUNCT3): Likewise.
639 (OP_MASK_FUNCT7): Likewise.
640 (OP_SH_FUNCT7): Likewise.
641 (OP_MASK_OP2): Likewise.
642 (OP_SH_OP2): Likewise.
643 (OP_MASK_CFUNCT4): Likewise.
644 (OP_SH_CFUNCT4): Likewise.
645 (OP_MASK_CFUNCT3): Likewise.
646 (OP_SH_CFUNCT3): Likewise.
647 (riscv_insn_types): Likewise.
648
649 2018-03-13 Nick Clifton <nickc@redhat.com>
650
651 PR 22113
652 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
653 field.
654
655 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
656
657 * opcode/i386 (OLDGCC_COMPAT): Removed.
658
659 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
660
661 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
662
663 2018-02-20 Maciej W. Rozycki <macro@mips.com>
664
665 * opcode/mips.h: Remove `M' operand code.
666
667 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
668
669 * coff/msdos.h: New header.
670 * coff/pe.h: Move common defines to msdos.h.
671 * coff/powerpc.h: Likewise.
672
673 2018-01-13 Nick Clifton <nickc@redhat.com>
674
675 2.30 branch created.
676
677 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
678
679 PR ld/22393
680 * bfdlink.h (bfd_link_info): Add separate_code.
681
682 2018-01-04 Jim Wilson <jimw@sifive.com>
683
684 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
685 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
686 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
687 Add alias to map mbadaddr to CSR_MTVAL.
688
689 2018-01-03 Alan Modra <amodra@gmail.com>
690
691 Update year range in copyright notice of all files.
692
693 For older changes see ChangeLog-2017
694 \f
695 Copyright (C) 2018 Free Software Foundation, Inc.
696
697 Copying and distribution of this file, with or without modification,
698 are permitted in any medium without royalty provided the copyright
699 notice and this notice are preserved.
700
701 Local Variables:
702 mode: change-log
703 left-margin: 8
704 fill-column: 74
705 version-control: never
706 End:
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