include/ChangeLog

   1 2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
   2
   3         * elf/arm.h (Tag_MVE_arch): Define new enum value.
   4         * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
   5
   6 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
   7
   8         * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
   9         operand.
  10
  11 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  12
  13         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
  14         iclass.
  15
  16 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  17
  18         * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
  19
  20 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  21
  22         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
  23         iclass.
  24
  25 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  26
  27         * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
  28         operand.
  29         (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
  30
  31 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  32
  33         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
  34
  35 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  36
  37         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
  38
  39 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  40
  41         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
  42
  43 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  44
  45         * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
  46
  47 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  48
  49         * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
  50
  51 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  52
  53         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
  54
  55 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  56
  57         * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
  58
  59 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  60
  61         * opcode/aarch64.h (AARCH64_FEATURE_SVE2
  62         AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
  63         AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
  64         feature macros.
  65
  66 2019-05-06  Andrew Bennett  <andrew.bennett@imgtec.com>
  67             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  68
  69         * opcode/mips.h (ASE_EVA_R6): New macro.
  70         (M_LLWPE_AB, M_SCWPE_AB): New enum values.
  71
  72 2019-05-01  Sudakshina Das  <sudi.das@arm.com>
  73
  74         * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
  75         (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
  76
  77 2019-04-26  Andrew Bennett  <andrew.bennett@imgtec.com>
  78             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  79
  80         * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
  81         (M_SCWP_AB, M_SCDP_AB): Likewise.
  82
  83 2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
  84
  85         * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
  86
  87 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  88
  89         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
  90
  91 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  92
  93         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
  94
  95 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  96
  97         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
  98
  99 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 100
 101         * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
 102         (MAX_TAG_CPU_ARCH): Set value to above macro.
 103         * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
 104         (ARM_AEXT_V8_1M_MAIN): Likewise.
 105         (ARM_AEXT2_V8_1M_MAIN): Likewise.
 106         (ARM_ARCH_V8_1M_MAIN): Likewise.
 107
 108 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
 109
 110         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
 111
 112 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
 113
 114         * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
 115
 116 2019-04-07  Alan Modra  <amodra@gmail.com>
 117
 118         Merge from gcc.
 119         2019-04-03  Vineet Gupta  <vgupta@synopsys.com>
 120         PR89877
 121         * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
 122         (sub_ddmmss): Likewise.
 123
 124 2019-04-06  H.J. Lu  <hongjiu.lu@intel.com>
 125
 126         * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
 127
 128 2019-04-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 129
 130         * opcode/arm.h (FPU_NEON_ARMV8_1): New.
 131         (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
 132         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
 133         (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
 134         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
 135         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
 136         (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
 137         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
 138
 139 2019-03-28  Alan Modra  <amodra@gmail.com>
 140
 141         PR 24390
 142         * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
 143
 144 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 145
 146         * dis-asm.h (struct disassemble_info): Add stop_offset.
 147
 148 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 149
 150         * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
 151
 152 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 153             Szabolcs Nagy  <szabolcs.nagy@arm.com>
 154
 155         * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
 156
 157 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 158
 159         * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
 160         (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
 161         (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
 162
 163 2019-02-20  Alan Hayward  <alan.hayward@arm.com>
 164
 165         * elf/common.h (NT_ARM_PAC_MASK): Add define.
 166
 167 2019-02-15  Saagar Jha  <saagar@saagarjha.com>
 168
 169         * mach-o/loader.h: Use new OS names in comments.
 170
 171 2019-02-11  Philippe Waroquiers  <philippe.waroquiers@skynet.be>
 172
 173         * splay-tree.h (splay_tree_delete_key_fn): Update comment.
 174         (splay_tree_delete_value_fn): Likewise.
 175
 176 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 177
 178         * opcode/s390.h (enum s390_opcode_cpu_val): Add
 179         S390_OPCODE_ARCH13.
 180
 181 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 182             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 183
 184         * opcode/aarch64.h (enum aarch64_opnd): Remove
 185         AARCH64_OPND_ADDR_SIMPLE_2.
 186         (enum aarch64_insn_class): Remove ldstgv_indexed.
 187
 188 2019-01-22  Tom Tromey  <tom@tromey.com>
 189
 190         * coff/ecoff.h: Include coff/sym.h.
 191
 192 2018-06-24  Nick Clifton  <nickc@redhat.com>
 193
 194         2.32 branch created.
 195
 196 2019-01-16  Kito Cheng  <kito@andestech.com>
 197
 198         * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
 199         (Tag_RISCV_arch): Likewise.
 200         (Tag_RISCV_priv_spec): Likewise.
 201         (Tag_RISCV_priv_spec_minor): Likewise.
 202         (Tag_RISCV_priv_spec_revision): Likewise.
 203         (Tag_RISCV_unaligned_access): Likewise.
 204         (Tag_RISCV_stack_align): Likewise.
 205
 206 2019-01-14  Pavel I. Kryukov  <kryukov@frtk.ru>
 207
 208         * dis-asm.h: include <string.h>
 209
 210 2019-01-10  Nick Clifton  <nickc@redhat.com>
 211
 212         * Merge from GCC:
 213         2018-12-22  Jason Merrill  <jason@redhat.com>
 214
 215         * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
 216         ARM, HP, and EDG demangling styles.
 217
 218 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
 219
 220         Merge from GCC:
 221         PR other/16615
 222
 223         * libiberty.h: Mechanically replace "can not" with "cannot".
 224         * plugin-api.h: Likewise.
 225
 226 2018-12-25  Yoshinori Sato <ysato@users.sourceforge.jp>
 227
 228         * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
 229         (E_FLAG_RX_V3): New RXv3 type.
 230         * opcode/rx.h (RX_Size): Add double size.
 231         (RX_Operand_Type): Add double FPU registers.
 232         (RX_Opcode_ID): Add new instuctions.
 233
 234 2019-01-01  Alan Modra  <amodra@gmail.com>
 235
 236         Update year range in copyright notice of all files.
 237
 238 For older changes see ChangeLog-2018
 239 \f
 240 Copyright (C) 2019 Free Software Foundation, Inc.
 241
 242 Copying and distribution of this file, with or without modification,
 243 are permitted in any medium without royalty provided the copyright
 244 notice and this notice are preserved.
 245
 246 Local Variables:
 247 mode: change-log
 248 left-margin: 8
 249 fill-column: 74
 250 version-control: never
 251 End: