include/ChangeLog

   1 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
   2
   3         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
   4         fields.
   5         (struct arc_long_opcode): Delete.
   6         (struct arc_operand): Change types for insert and extract
   7         handlers.
   8
   9 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  10
  11         * opcode/arc.h: Make macros 64-bit safe.
  12
  13 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  14
  15         * opcode/arc.h (arc_opcode_len): Declare.
  16         (ARC_SHORT): Delete.
  17
  18 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
  19             Andrew Waterman <andrew@sifive.com>
  20
  21         Add support for RISC-V architecture.
  22         * dis-asm.h: Add prototypes for print_insn_riscv and
  23         print_riscv_disassembler_options.
  24         * elf/riscv.h: New file.
  25         * opcode/riscv-opc.h: New file.
  26         * opcode/riscv.h: New file.
  27
  28 2016-10-17  Nick Clifton  <nickc@redhat.com>
  29
  30         * elf/common.h (DT_SYMTAB_SHNDX): Define.
  31         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
  32         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
  33         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
  34         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
  35         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
  36         (ELFOSABI_OPENVOS): Define.
  37         (GRP_MASKOS, GRP_MASKPROC): Define.
  38
  39 2016-10-14  Pedro Alves  <palves@redhat.com>
  40
  41         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
  42         OVERRIDE): Define as empty.
  43         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
  44         __final.
  45         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
  46         empty.
  47
  48 2016-10-14  Pedro Alves  <palves@redhat.com>
  49
  50         * ansidecl.h (GCC_FINAL): Delete.
  51         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
  52
  53 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
  54
  55         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
  56
  57 2016-09-29  Alan Modra  <amodra@gmail.com>
  58
  59         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
  60
  61 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
  62
  63         * opcode/arc.h (insn_class_t): Add two new classes.
  64
  65 2016-09-26  Alan Modra  <amodra@gmail.com>
  66
  67         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
  68
  69 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  70
  71         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
  72
  73 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  74
  75         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
  76         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
  77         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
  78         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
  79
  80 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  81
  82         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
  83         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
  84         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
  85         aarch64_insn_classes.
  86
  87 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  88
  89         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
  90         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
  91         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
  92
  93 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  94
  95         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
  96         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
  97         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
  98
  99 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 100
 101         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 102         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 103         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 104         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 105         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 106         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 107         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 108         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 109         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 110         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 111         (aarch64_sve_dupm_mov_immediate_p): Declare.
 112
 113 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 114
 115         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 116         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 117         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 118         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 119         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 120
 121 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 122
 123         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 124         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 125         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 126         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 127         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 128         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 129         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 130         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 131         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 132         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 133         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 134         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 135         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 136         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 137         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 138         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 139         Likewise.
 140
 141 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 142
 143         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 144         aarch64_opnd.
 145         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 146         (aarch64_opnd_info): Make shifter.amount an int64_t and
 147         rearrange the fields.
 148
 149 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 150
 151         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 152         (AARCH64_OPND_SVE_PRFOP): Likewise.
 153         (aarch64_sve_pattern_array): Declare.
 154         (aarch64_sve_prfop_array): Likewise.
 155
 156 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 157
 158         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 159         (AARCH64_OPND_QLF_P_M): Likewise.
 160
 161 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 162
 163         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 164         aarch64_operand_class.
 165         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 166         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 167         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 168         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 169         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 170         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 171         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 172         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 173
 174 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 175
 176         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 177         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 178
 179 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 180
 181         * opcode/aarch64.h (F_STRICT): New flag.
 182
 183 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 184
 185         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 186
 187 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 188         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 189         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 190         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 191         relocation.
 192
 193 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 194
 195         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 196         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 197
 198 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 199
 200         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 201
 202 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 203
 204         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 205
 206 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 207
 208         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 209         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 210         ARC_NUM_ADDRTYPES.
 211         * opcode/arc.h: Add BMU to insn_class_t enum.
 212         * opcode/arc.h: Add PMU to insn_class_t enum.
 213
 214 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 215
 216         * dis-asm.h: Declare print_arc_disassembler_options.
 217
 218 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 219
 220         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 221         out_implib_bfd fields.
 222
 223 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 224
 225         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 226
 227 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 228
 229         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 230         (SHF_ARM_PURECODE): ... this.
 231
 232 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 233
 234         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 235         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 236         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 237         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 238
 239 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 240
 241         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 242         of enabled FPU features.
 243
 244 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 245
 246         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 247         SPARC_OPCODE_ARCH_MAX into the enum.
 248
 249 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 250
 251         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 252
 253 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 254
 255         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 256
 257 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 258
 259         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 260
 261 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 262
 263         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 264         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 265         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 266         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 267
 268 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 269
 270         * opcode/arc.h: Make insn_class_t alphabetical again.
 271
 272 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 273
 274         * elf/dlx.h: Wrap in extern C.
 275         * elf/xtensa.h: Likewise.
 276         * opcode/arc.h: Likewise.
 277
 278 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 279
 280         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 281         tilegx_pipeline.
 282
 283 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 284
 285         * opcode/arc.h: Add nps400 extension and instruction
 286         subclass.
 287         Remove ARC_OPCODE_NPS400
 288         * elf/arc.h: Remove E_ARC_MACH_NPS400
 289
 290 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 291
 292         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 293         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 294         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 295         SPARC_OPCODE_ARCH_V9M.
 296
 297 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 298
 299         * opcode/msp430-decode.h (MSP430_Size): Remove.
 300         (Msp430_Opcode_Decoded): Change type of size to int.
 301
 302 2016-06-11  Alan Modra  <amodra@gmail.com>
 303
 304         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 305
 306 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 307
 308         * opcode/sparc.h: Add missing documentation for hyperprivileged
 309         registers in rd (%) and rs1 ($).
 310
 311 2016-06-07  Alan Modra  <amodra@gmail.com>
 312
 313         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 314         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 315         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 316         PPC_APUINFO_VLE: Define.
 317
 318 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 319
 320         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 321         entries.
 322         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 323
 324 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 325
 326         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 327         (struct arc_long_opcode): New structure.
 328         (arc_long_opcodes): Declare.
 329         (arc_num_long_opcodes): Declare.
 330
 331 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 332
 333         * elf/mips.h: Add extern "C".
 334         * elf/sh.h: Likewise.
 335         * opcode/d10v.h: Likewise.
 336         * opcode/d30v.h: Likewise.
 337         * opcode/ia64.h: Likewise.
 338         * opcode/mips.h: Likewise.
 339         * opcode/ppc.h: Likewise.
 340         * opcode/sparc.h: Likewise.
 341         * opcode/tic6x.h: Likewise.
 342         * opcode/v850.h: Likewise.
 343
 344 2016-05-28  Alan Modra  <amodra@gmail.com>
 345
 346         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 347         Return void from multiple_definition, multiple_common,
 348         add_to_set, constructor, warning, undefined_symbol,
 349         reloc_overflow, reloc_dangerous and unattached_reloc.
 350
 351 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 352
 353         * opcode/metag.h: wrap declarations in extern "C".
 354
 355 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 356
 357         * opcode/arc.h (insn_subclass_t): Add COND.
 358         (flag_class_t): Add F_CLASS_EXTEND.
 359
 360 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 361
 362         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 363         insn_class.
 364         (struct arc_flag_class): Renamed attribute class to flag_class.
 365
 366 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 367
 368         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 369         plain symbol.
 370
 371 2016-04-29  Tom Tromey  <tom@tromey.com>
 372
 373         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 374         DW_LANG_Rust_old>: New constants.
 375
 376 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 377
 378         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 379         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 380         * opcode/mips.h (ASE_DSPR3): New macro.
 381
 382 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 383             Nick Clifton  <nickc@redhat.com>
 384
 385         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 386         enumerator.
 387         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 388         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 389         (ARM_SYM_BRANCH_TYPE): Replace by ...
 390         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 391         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 392         BFD_ASSERT is defined or not.
 393
 394 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 395
 396         * elf/arm.h (Tag_DSP_extension): Define.
 397
 398 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 399
 400         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 401
 402 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 403
 404         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 405         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 406         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 407         for the high core bits.
 408
 409 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 410
 411         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 412         (ARC_SYNTAX_NOP): Likewsie.
 413         (ARC_OP1_MUST_BE_IMM): Update defined value.
 414         (ARC_OP1_IMM_IMPLIED): Likewise.
 415         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 416
 417 2016-04-28  Nick Clifton  <nickc@redhat.com>
 418
 419         PR target/19722
 420         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 421
 422 2016-04-27  Alan Modra  <amodra@gmail.com>
 423
 424         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 425         undef.  Formatting.
 426
 427 2016-04-21  Nick Clifton  <nickc@redhat.com>
 428
 429         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 430
 431 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 432
 433         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 434
 435 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 436
 437         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 438
 439 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 440
 441         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 442
 443 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 444
 445         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 446
 447 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 448
 449         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 450         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 451
 452 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 453
 454         * opcode/arc.h (flag_class_t): Update.
 455         (ARC_OPCODE_NONE): Define.
 456         (ARC_OPCODE_ARCALL): Likewise.
 457         (ARC_OPCODE_ARCFPX): Likewise.
 458         (ARC_REGISTER_READONLY): Likewise.
 459         (ARC_REGISTER_WRITEONLY): Likewise.
 460         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 461         (arc_aux_reg): Add cpu.
 462
 463 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 464
 465         * opcode/arc.h (arc_num_opcodes): Remove.
 466         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 467         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 468         (ARC_SUFFIX_FLAG): Define.
 469         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 470         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 471         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 472         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 473         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 474         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 475         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 476         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 477         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 478         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 479
 480 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 481
 482         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 483         (ARC_FPUDA): Define.
 484         (arc_aux_reg): Add new field.
 485
 486 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 487
 488         * opcode/arc-func.h (replace_bits24): Changed.
 489         (replace_bits24_be): Created.
 490
 491 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 492
 493         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 494         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 495         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 496         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 497         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 498         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 499         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 500         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 501         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 502         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 503         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 504         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 505         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 506         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 507
 508 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 509
 510         * opcode/i960.h: Add const qualifiers.
 511         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 512
 513 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 514
 515         * opcodes/arc.h (insn_class_t): Add BITOP type.
 516
 517 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 518
 519         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 520         new classes instead.
 521
 522 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 523
 524         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 525         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 526
 527 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 528
 529         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 530
 531 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 532
 533         * elf/arc.h (EF_ARC_MACH): Delete.
 534         (EF_ARC_MACH_MSK): Remove out of date comment.
 535
 536 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 537
 538         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 539
 540 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 541
 542         PR ld/19807
 543         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 544
 545 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 546             Andrew Burgess  <andrew.burgess@embecosm.com>
 547
 548         * elf/arc-reloc.def: Add a call to ME within the formula for each
 549         relocation that requires middle-endian correction.
 550
 551 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 552
 553         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 554         * opcode/h8300.h (struct h8_opcode): Likewise.
 555         * opcode/hppa.h (struct pa_opcode): Likewise.
 556         * opcode/msp430.h: Likewise.
 557         * opcode/spu.h (struct spu_opcode): Likewise.
 558         * opcode/tic30.h (struct _register): Likewise.
 559         * opcode/tic4x.h (struct tic4x_register): Likewise.
 560         (struct tic4x_cond): Likewise.
 561         (struct tic4x_indirect): Likewise.
 562         (struct tic4x_inst): Likewise.
 563         * opcode/visium.h (struct reg_entry): Likewise.
 564
 565 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 566
 567         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 568         (ARM_CPU_HAS_FEATURE): Add comment.
 569
 570 2016-03-03  Than McIntosh <thanm@google.com>
 571
 572         * plugin-api.h: Add new hooks to the plugin transfer vector to
 573         to support querying section alignment and section size.
 574         (ld_plugin_get_input_section_alignment): New hook.
 575         (ld_plugin_get_input_section_size): New hook.
 576         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 577         and LDPT_GET_INPUT_SECTION_SIZE.
 578         (ld_plugin_tv): Add tv_get_input_section_alignment and
 579         tv_get_input_section_size.
 580
 581 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 582
 583         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 584
 585 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 586
 587         PR ld/19645
 588         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 589         (bfd_link_info): Add elf_stt_common.
 590
 591 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 592
 593         PR ld/19636
 594         PR ld/19704
 595         PR ld/19719
 596         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 597
 598 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 599             Jiong Wang  <jiong.wang@arm.com>
 600
 601         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 602
 603 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 604             Janek van Oirschot  <jvanoirs@synopsys.com>
 605
 606         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 607         (arc_num_relax_opcodes): Declare.
 608
 609 2016-02-09  Nick Clifton  <nickc@redhat.com>
 610
 611         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 612         * opcode/nds32.h (nds32_r45map): Likewise.
 613         (nds32_r54map): Likewise.
 614         * opcode/visium.h (gen_reg_table): Likewise.
 615         (fp_reg_table, cc_table, opcode_table): Likewise.
 616
 617 2016-02-09  Alan Modra  <amodra@gmail.com>
 618
 619         PR 16583
 620         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 621
 622 2016-02-04  Nick Clifton  <nickc@redhat.com>
 623
 624         PR target/19561
 625         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 626         (RRUX): Synthesise using case 2 rather than 7.
 627
 628 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 629
 630         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 631         (NT_FREEBSD_PROCSTAT_PROC): Define.
 632         (NT_FREEBSD_PROCSTAT_FILES): Define.
 633         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 634         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 635         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 636         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 637         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 638         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 639         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 640
 641 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 642             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 643
 644         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 645         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 646         (ARC_TLS_LE_32): Fixed formula.
 647         (ARC_TLS_GD_LD): Use new special function.
 648         * opcode/arc-func.h: Changed all the replacement
 649         functions to clear the patching bits before doing an or it with the value
 650         argument.
 651
 652 2016-01-18  Nick Clifton  <nickc@redhat.com>
 653
 654         PR ld/19440
 655         * coff/internal.h (internal_syment): Use int to hold section
 656         number.
 657         (N_UNDEF): Cast to int not short.
 658         (N_ABS): Likewise.
 659         (N_DEBUG): Likewise.
 660         (N_TV): Likewise.
 661         (P_TV): Likewise.
 662
 663 2016-01-11  Nick Clifton  <nickc@redhat.com>
 664
 665         Import this change from GCC mainline:
 666
 667         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 668
 669         * longlong.h: Change !__SHMEDIA__ to
 670         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 671         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 672
 673 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 674
 675         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 676
 677 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 678
 679         * libiberty.h (dupargv): Change arg to char * const *.
 680         (writeargv, countargv): Likewise.
 681
 682 2016-01-01  Alan Modra  <amodra@gmail.com>
 683
 684         Update year range in copyright notice of all files.
 685
 686 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 687 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 688 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 689 som/ChangeLog-1015, and vms/ChangeLog-1015
 690 \f
 691 Copyright (C) 2016 Free Software Foundation, Inc.
 692
 693 Copying and distribution of this file, with or without modification,
 694 are permitted in any medium without royalty provided the copyright
 695 notice and this notice are preserved.
 696
 697 Local Variables:
 698 mode: change-log
 699 left-margin: 8
 700 fill-column: 74
 701 version-control: never
 702 End: