c11f1c417b176dd9aecdb8349786b0acd21d58b9
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2018-10-05 Richard Henderson <rth@twiddle.net>
2
3 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
4 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
5 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
6 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
7 R_OR1K_SLO13, R_OR1K_PLTA26.
8
9 2018-10-05 Richard Henderson <rth@twiddle.net>
10
11 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
12 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
13 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
14
15 2018-10-03 Tamar Christina <tamar.christina@arm.com>
16
17 * opcode/aarch64.h (aarch64_inst): Remove.
18 (enum err_type): Add ERR_VFI.
19 (aarch64_is_destructive_by_operands): New.
20 (init_insn_sequence): New.
21 (aarch64_decode_insn): Remove param name.
22
23 2018-10-03 Tamar Christina <tamar.christina@arm.com>
24
25 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
26 more arguments.
27
28 2018-10-03 Tamar Christina <tamar.christina@arm.com>
29
30 * opcode/aarch64.h (enum err_type): New.
31 (aarch64_decode_insn): Use it.
32
33 2018-10-03 Tamar Christina <tamar.christina@arm.com>
34
35 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
36 (aarch64_opcode_encode): Use it.
37
38 2018-10-03 Tamar Christina <tamar.christina@arm.com>
39
40 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
41 extend flags field size.
42 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
43
44 2018-10-03 John Darrington <john@darrington.wattle.id.au>
45
46 * dis-asm.h (print_insn_s12z): New declaration.
47
48 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
49
50 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
51 (MASK_FENCE_TSO): Likewise.
52
53 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
54
55 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
56
57 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
58
59 PR binutils/23694
60 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
61 include zero size sections at start of PT_NOTE segment.
62
63 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
64
65 * elf/nds32.h: Remove the unused target features.
66 * dis-asm.h (disassemble_init_nds32): Declared.
67 * elf/nds32.h (E_NDS32_NULL): Removed.
68 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
69 * opcode/nds32.h: Ident.
70 (N32_SUB6, INSN_LW): New macros.
71 (enum n32_opcodes): Updated.
72 * elf/nds32.h: Doc fixes.
73 * elf/nds32.h: Add R_NDS32_LSI.
74 * elf/nds32.h: Add new relocations for TLS.
75
76 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
77
78 * elf/common.h (AT_SUN_HWCAP): Rename to ...
79 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
80 compatibility.
81 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
82 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
83
84 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
85
86 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
87
88 2018-08-31 Alan Modra <amodra@gmail.com>
89
90 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
91 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
92 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
93 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
94
95 2018-08-30 Kito Cheng <kito@andestech.com>
96
97 * opcode/riscv.h (MAX_SUBSET_NUM): New.
98 (riscv_opcode): Add xlen_requirement field and change type of
99 subset.
100
101 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
102
103 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
104 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
105
106 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
107
108 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
109 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
110
111 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
112
113 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
114 E_MIPS_MACH_GS464.
115 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
116 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
117 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
118 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
119
120 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
121
122 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
123 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
124 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
125
126 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
127
128 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
129 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
130 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
131
132 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
133
134 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
135 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
136 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
137
138 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
139
140 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
141 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
142 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
143 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
144 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
145 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
146 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
147 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
148 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
149 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
150 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
151 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
152 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
153 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
154 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
155 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
156 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
157 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
158 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
159 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
160 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
161 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
162 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
163 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
164 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
165 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
166 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
167 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
168 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
169 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
170 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
171 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
172 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
173 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
174 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
175 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
176 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
177 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
178 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
179 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
180 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
181 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
182 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
183 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
184 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
185 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
186 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
187 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
188 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
189 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
190 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
191 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
192 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
193 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
194 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
195 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
196
197 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
198
199 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
200
201 2018-08-21 John Darrington <john@darrington.wattle.id.au>
202
203 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
204
205 2018-08-21 Alan Modra <amodra@gmail.com>
206
207 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
208 Mention use of "extract" function to provide default value.
209 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
210 (ppc_optional_operand_value): Rewrite to use extract function.
211
212 2018-08-18 John Darrington <john@darrington.wattle.id.au>
213
214 * opcode/s12z.h: New file.
215
216 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
217
218 * elf/arm.h: Updated comments for e_flags definitions.
219
220 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
221
222 * elf/arc.h (Tag_ARC_ATR_version): New tag.
223
224 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
225
226 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
227
228 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
229
230 Copy over from GCC
231 2018-07-26 Martin Liska <mliska@suse.cz>
232
233 PR lto/86548
234 * libiberty.h (make_temp_file_with_prefix): New function.
235
236 2018-07-30 Jim Wilson <jimw@sifive.com>
237
238 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
239 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
240 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
241
242 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
243
244 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
245 * elf/csky.h: New file.
246
247 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
248 Maciej W. Rozycki <macro@linux-mips.org>
249
250 * elf/mips.h (AFL_ASE_MASK): Correct typo.
251
252 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
253
254 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
255
256 2018-07-26 Alan Modra <amodra@gmail.com>
257
258 * elf/ppc64.h: Specify byte offset to local entry for values
259 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
260 value for such functions when entering via global entry point.
261 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
262
263 2018-07-24 Alan Modra <amodra@gmail.com>
264
265 PR 23430
266 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
267
268 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
269 Maciej W. Rozycki <macro@mips.com>
270
271 * elf/mips.h (AFL_ASE_MMI): New macro.
272 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
273 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
274
275 2018-07-17 Maciej W. Rozycki <macro@mips.com>
276
277 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
278
279 2018-07-06 Alan Modra <amodra@gmail.com>
280
281 * diagnostics.h: Comment on macro usage.
282
283 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
284
285 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
286 Define for clang.
287
288 2018-07-02 Maciej W. Rozycki <macro@mips.com>
289
290 PR tdep/8282
291 * dis-asm.h (disasm_option_arg_t): New typedef.
292 (disasm_options_and_args_t): Likewise.
293 (disasm_options_t): Add `arg' member, document members.
294 (disassembler_options_mips): New prototype.
295 (disassembler_options_arm, disassembler_options_powerpc)
296 (disassembler_options_s390): Update prototypes.
297
298 2018-06-29 Tamar Christina <tamar.christina@arm.com>
299
300 PR binutils/23192
301 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
302
303 2018-06-26 Alan Modra <amodra@gmail.com>
304
305 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
306
307 2018-06-24 Nick Clifton <nickc@redhat.com>
308
309 2.31 branch created.
310
311 2018-06-21 Alan Hayward <alan.hayward@arm.com>
312
313 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
314 for non SHT_NOBITS.
315
316 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
317
318 Sync with GCC
319
320 2018-05-24 Tom Rix <trix@juniper.net>
321
322 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
323
324 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
325
326 * longlong.h [__riscv] (__umulsidi3): Define.
327 [__riscv] (umul_ppmm): Likewise.
328 [__riscv] (__muluw3): Likewise.
329
330 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
331
332 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
333 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
334 * opcode/mips.h: Document "+\" operand format.
335 (ASE_GINV): New macro.
336
337 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
338 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
339
340 * elf/mips.h (AFL_ASE_CRC): New macro.
341 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
342 * opcode/mips.h (ASE_CRC): New macro.
343 * opcode/mips.h (ASE_CRC64): Likewise.
344
345 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
346
347 * elf/xtensa.h (xtensa_read_table_entries)
348 (xtensa_compute_fill_extra_space): New declarations.
349
350 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
351
352 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
353 define for GCC.
354
355 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
356
357 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
358 (DIAGNOSTIC_STRINGIFY): Likewise.
359 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
360 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
361 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
362 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
363 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
364 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
365
366 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
367
368 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
369
370 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
371
372 * splay-tree.h (splay_tree_compare_strings,
373 splay_tree_delete_pointers): Declare new utility functions.
374
375 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
376
377 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
378
379 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
380
381 * elf/riscv.h (EF_RISCV_RVE): New define.
382
383 2018-05-18 John Darrington <john@darrington.wattle.id.au>
384
385 * elf/s12z.h: New header.
386
387 2018-05-15 Tamar Christina <tamar.christina@arm.com>
388
389 PR binutils/21446
390 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
391
392 2018-05-15 Tamar Christina <tamar.christina@arm.com>
393
394 PR binutils/21446
395 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
396 (aarch64_print_operand): Support notes.
397
398 2018-05-15 Tamar Christina <tamar.christina@arm.com>
399
400 PR binutils/21446
401 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
402 (aarch64_decode_insn): Accept error struct.
403
404 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
405
406 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
407
408 2018-05-10 John Darrington <john@darrington.wattle.id.au>
409
410 * elf/common.h (EM_S12Z): New macro.
411
412 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
413
414 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
415 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
416 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
417 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
418
419 2018-05-08 Jim Wilson <jimw@sifive.com>
420
421 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
422 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
423 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
424
425 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
426
427 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
428 (vle_num_opcodes): Likewise.
429 (spe2_num_opcodes): Likewise.
430
431 2018-05-04 Alan Modra <amodra@gmail.com>
432
433 * ansidecl.h: Import from gcc.
434 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
435 to s_name.
436 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
437
438 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
439
440 * dis-asm.h: Added print_nfp_disassembler_options prototype.
441 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
442 Generic System V Application Binary Interface.
443 * elf/nfp.h: New, for NFP support.
444 * opcode/nfp.h: New, for NFP support.
445
446 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
447 Mickaël Guêné <mickael.guene@st.com>
448
449 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
450 R_ARM_TLS_IE32_FDPIC.
451
452 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
453 Mickaël Guêné <mickael.guene@st.com>
454
455 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
456 (R_ARM_FUNCDESC)
457 (R_ARM_FUNCDESC_VALUE): Define new relocations.
458
459 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
460 Mickaël Guêné <mickael.guene@st.com>
461
462 * elf/arm.h (EF_ARM_FDPIC): New.
463
464 2018-04-18 Alan Modra <amodra@gmail.com>
465
466 * coff/mipspe.h: Delete.
467
468 2018-04-18 Alan Modra <amodra@gmail.com>
469
470 * aout/dynix3.h: Delete.
471
472 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
473
474 Microblaze Target: PIC data text relative
475
476 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
477 * elf/microblaze.h (Add 3 new relocations):
478 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
479 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
480
481 2018-04-17 Alan Modra <amodra@gmail.com>
482
483 * elf/i370.h: Revert removal.
484 * elf/i860.h: Likewise.
485 * elf/i960.h: Likewise.
486
487 2018-04-16 Alan Modra <amodra@gmail.com>
488
489 * coff/sparc.h: Delete.
490
491 2018-04-16 Alan Modra <amodra@gmail.com>
492
493 * aout/host.h: Remove m68k-aout and m68k-coff support.
494 * aout/hp300hpux.h: Delete.
495 * coff/apollo.h: Delete.
496 * coff/aux-coff.h: Delete.
497 * coff/m68k.h: Delete.
498
499 2018-04-16 Alan Modra <amodra@gmail.com>
500
501 * dis-asm.h: Remove sh5 and sh64 support.
502
503 2018-04-16 Alan Modra <amodra@gmail.com>
504
505 * coff/internal.h: Remove w65 support.
506 * coff/w65.h: Delete.
507
508 2018-04-16 Alan Modra <amodra@gmail.com>
509
510 * coff/we32k.h: Delete.
511
512 2018-04-16 Alan Modra <amodra@gmail.com>
513
514 * coff/internal.h: Remove m88k support.
515 * coff/m88k.h: Delete.
516 * opcode/m88k.h: Delete.
517
518 2018-04-16 Alan Modra <amodra@gmail.com>
519
520 * elf/i370.h: Delete.
521 * opcode/i370.h: Delete.
522
523 2018-04-16 Alan Modra <amodra@gmail.com>
524
525 * coff/h8500.h: Delete.
526 * coff/internal.h: Remove h8500 support.
527
528 2018-04-16 Alan Modra <amodra@gmail.com>
529
530 * coff/h8300.h: Delete.
531
532 2018-04-16 Alan Modra <amodra@gmail.com>
533
534 * ieee.h: Delete.
535
536 2018-04-16 Alan Modra <amodra@gmail.com>
537
538 * aout/host.h: Remove newsos3 support.
539
540 2018-04-16 Alan Modra <amodra@gmail.com>
541
542 * nlm/ChangeLog-9315: Delete.
543 * nlm/alpha-ext.h: Delete.
544 * nlm/common.h: Delete.
545 * nlm/external.h: Delete.
546 * nlm/i386-ext.h: Delete.
547 * nlm/internal.h: Delete.
548 * nlm/ppc-ext.h: Delete.
549 * nlm/sparc32-ext.h: Delete.
550
551 2018-04-16 Alan Modra <amodra@gmail.com>
552
553 * opcode/tahoe.h: Delete.
554
555 2018-04-11 Alan Modra <amodra@gmail.com>
556
557 * aout/adobe.h: Delete.
558 * aout/reloc.h: Delete.
559 * coff/i860.h: Delete.
560 * coff/i960.h: Delete.
561 * elf/i860.h: Delete.
562 * elf/i960.h: Delete.
563 * opcode/i860.h: Delete.
564 * opcode/i960.h: Delete.
565 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
566 * aout/ar.h (ARMAGB): Remove.
567 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
568 union internal_auxent): Remove i960 support.
569
570 2018-04-09 Alan Modra <amodra@gmail.com>
571
572 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
573 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
574
575 2018-03-28 Renlin Li <renlin.li@arm.com>
576
577 PR ld/22970
578 * elf/aarch64.h: Add relocation number for
579 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
580 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
581 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
582 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
583 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
584 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
585 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
586 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
587
588 2018-03-28 Nick Clifton <nickc@redhat.com>
589
590 PR 22988
591 * opcode/aarch64.h (enum aarch64_opnd): Add
592 AARCH64_OPND_SVE_ADDR_R.
593
594 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
595
596 * elf/common.h (DF_1_KMOD): New.
597 (DF_1_WEAKFILTER): Likewise.
598 (DF_1_NOCOMMON): Likewise.
599
600 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
601
602 * opcode/riscv.h (OP_MASK_FUNCT3): New.
603 (OP_SH_FUNCT3): Likewise.
604 (OP_MASK_FUNCT7): Likewise.
605 (OP_SH_FUNCT7): Likewise.
606 (OP_MASK_OP2): Likewise.
607 (OP_SH_OP2): Likewise.
608 (OP_MASK_CFUNCT4): Likewise.
609 (OP_SH_CFUNCT4): Likewise.
610 (OP_MASK_CFUNCT3): Likewise.
611 (OP_SH_CFUNCT3): Likewise.
612 (riscv_insn_types): Likewise.
613
614 2018-03-13 Nick Clifton <nickc@redhat.com>
615
616 PR 22113
617 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
618 field.
619
620 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
621
622 * opcode/i386 (OLDGCC_COMPAT): Removed.
623
624 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
625
626 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
627
628 2018-02-20 Maciej W. Rozycki <macro@mips.com>
629
630 * opcode/mips.h: Remove `M' operand code.
631
632 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
633
634 * coff/msdos.h: New header.
635 * coff/pe.h: Move common defines to msdos.h.
636 * coff/powerpc.h: Likewise.
637
638 2018-01-13 Nick Clifton <nickc@redhat.com>
639
640 2.30 branch created.
641
642 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
643
644 PR ld/22393
645 * bfdlink.h (bfd_link_info): Add separate_code.
646
647 2018-01-04 Jim Wilson <jimw@sifive.com>
648
649 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
650 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
651 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
652 Add alias to map mbadaddr to CSR_MTVAL.
653
654 2018-01-03 Alan Modra <amodra@gmail.com>
655
656 Update year range in copyright notice of all files.
657
658 For older changes see ChangeLog-2017
659 \f
660 Copyright (C) 2018 Free Software Foundation, Inc.
661
662 Copying and distribution of this file, with or without modification,
663 are permitted in any medium without royalty provided the copyright
664 notice and this notice are preserved.
665
666 Local Variables:
667 mode: change-log
668 left-margin: 8
669 fill-column: 74
670 version-control: never
671 End:
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