include/ChangeLog

   1 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
   2
   3         * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
   4
   5 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
   6
   7         * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
   8
   9 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  10
  11         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
  12
  13 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  14
  15         * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
  16
  17 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  18
  19         * opcode/aarch64.h (AARCH64_FEATURE_SVE2
  20         AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
  21         AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
  22         feature macros.
  23
  24 2019-05-06  Andrew Bennett  <andrew.bennett@imgtec.com>
  25             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  26
  27         * opcode/mips.h (ASE_EVA_R6): New macro.
  28         (M_LLWPE_AB, M_SCWPE_AB): New enum values.
  29
  30 2019-05-01  Sudakshina Das  <sudi.das@arm.com>
  31
  32         * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
  33         (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
  34
  35 2019-04-26  Andrew Bennett  <andrew.bennett@imgtec.com>
  36             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  37
  38         * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
  39         (M_SCWP_AB, M_SCDP_AB): Likewise.
  40
  41 2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
  42
  43         * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
  44
  45 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  46
  47         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
  48
  49 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  50
  51         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
  52
  53 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  54
  55         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
  56
  57 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  58
  59         * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
  60         (MAX_TAG_CPU_ARCH): Set value to above macro.
  61         * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
  62         (ARM_AEXT_V8_1M_MAIN): Likewise.
  63         (ARM_AEXT2_V8_1M_MAIN): Likewise.
  64         (ARM_ARCH_V8_1M_MAIN): Likewise.
  65
  66 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  67
  68         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
  69
  70 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
  71
  72         * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
  73
  74 2019-04-07  Alan Modra  <amodra@gmail.com>
  75
  76         Merge from gcc.
  77         2019-04-03  Vineet Gupta  <vgupta@synopsys.com>
  78         PR89877
  79         * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
  80         (sub_ddmmss): Likewise.
  81
  82 2019-04-06  H.J. Lu  <hongjiu.lu@intel.com>
  83
  84         * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
  85
  86 2019-04-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  87
  88         * opcode/arm.h (FPU_NEON_ARMV8_1): New.
  89         (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
  90         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
  91         (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
  92         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
  93         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
  94         (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
  95         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
  96
  97 2019-03-28  Alan Modra  <amodra@gmail.com>
  98
  99         PR 24390
 100         * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
 101
 102 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 103
 104         * dis-asm.h (struct disassemble_info): Add stop_offset.
 105
 106 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 107
 108         * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
 109
 110 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 111             Szabolcs Nagy  <szabolcs.nagy@arm.com>
 112
 113         * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
 114
 115 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 116
 117         * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
 118         (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
 119         (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
 120
 121 2019-02-20  Alan Hayward  <alan.hayward@arm.com>
 122
 123         * elf/common.h (NT_ARM_PAC_MASK): Add define.
 124
 125 2019-02-15  Saagar Jha  <saagar@saagarjha.com>
 126
 127         * mach-o/loader.h: Use new OS names in comments.
 128
 129 2019-02-11  Philippe Waroquiers  <philippe.waroquiers@skynet.be>
 130
 131         * splay-tree.h (splay_tree_delete_key_fn): Update comment.
 132         (splay_tree_delete_value_fn): Likewise.
 133
 134 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 135
 136         * opcode/s390.h (enum s390_opcode_cpu_val): Add
 137         S390_OPCODE_ARCH13.
 138
 139 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 140             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 141
 142         * opcode/aarch64.h (enum aarch64_opnd): Remove
 143         AARCH64_OPND_ADDR_SIMPLE_2.
 144         (enum aarch64_insn_class): Remove ldstgv_indexed.
 145
 146 2019-01-22  Tom Tromey  <tom@tromey.com>
 147
 148         * coff/ecoff.h: Include coff/sym.h.
 149
 150 2018-06-24  Nick Clifton  <nickc@redhat.com>
 151
 152         2.32 branch created.
 153
 154 2019-01-16  Kito Cheng  <kito@andestech.com>
 155
 156         * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
 157         (Tag_RISCV_arch): Likewise.
 158         (Tag_RISCV_priv_spec): Likewise.
 159         (Tag_RISCV_priv_spec_minor): Likewise.
 160         (Tag_RISCV_priv_spec_revision): Likewise.
 161         (Tag_RISCV_unaligned_access): Likewise.
 162         (Tag_RISCV_stack_align): Likewise.
 163
 164 2019-01-14  Pavel I. Kryukov  <kryukov@frtk.ru>
 165
 166         * dis-asm.h: include <string.h>
 167
 168 2019-01-10  Nick Clifton  <nickc@redhat.com>
 169
 170         * Merge from GCC:
 171         2018-12-22  Jason Merrill  <jason@redhat.com>
 172
 173         * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
 174         ARM, HP, and EDG demangling styles.
 175
 176 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
 177
 178         Merge from GCC:
 179         PR other/16615
 180
 181         * libiberty.h: Mechanically replace "can not" with "cannot".
 182         * plugin-api.h: Likewise.
 183
 184 2018-12-25  Yoshinori Sato <ysato@users.sourceforge.jp>
 185
 186         * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
 187         (E_FLAG_RX_V3): New RXv3 type.
 188         * opcode/rx.h (RX_Size): Add double size.
 189         (RX_Operand_Type): Add double FPU registers.
 190         (RX_Opcode_ID): Add new instuctions.
 191
 192 2019-01-01  Alan Modra  <amodra@gmail.com>
 193
 194         Update year range in copyright notice of all files.
 195
 196 For older changes see ChangeLog-2018
 197 \f
 198 Copyright (C) 2019 Free Software Foundation, Inc.
 199
 200 Copying and distribution of this file, with or without modification,
 201 are permitted in any medium without royalty provided the copyright
 202 notice and this notice are preserved.
 203
 204 Local Variables:
 205 mode: change-log
 206 left-margin: 8
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 208 version-control: never
 209 End: