1 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
3 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
5 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
7 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
9 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
11 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
13 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
15 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
16 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
17 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
20 2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
21 Faraz Shahbazker <fshahbazker@wavecomp.com>
23 * opcode/mips.h (ASE_EVA_R6): New macro.
24 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
26 2019-05-01 Sudakshina Das <sudi.das@arm.com>
28 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
29 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
31 2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
32 Faraz Shahbazker <fshahbazker@wavecomp.com>
34 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
35 (M_SCWP_AB, M_SCDP_AB): Likewise.
37 2019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
39 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
41 2019-04-15 Sudakshina Das <sudi.das@arm.com>
43 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
45 2019-04-15 Sudakshina Das <sudi.das@arm.com>
47 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
49 2019-04-15 Sudakshina Das <sudi.das@arm.com>
51 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
53 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
55 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
56 (MAX_TAG_CPU_ARCH): Set value to above macro.
57 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
58 (ARM_AEXT_V8_1M_MAIN): Likewise.
59 (ARM_AEXT2_V8_1M_MAIN): Likewise.
60 (ARM_ARCH_V8_1M_MAIN): Likewise.
62 2019-04-11 Sudakshina Das <sudi.das@arm.com>
64 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
66 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
68 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
70 2019-04-07 Alan Modra <amodra@gmail.com>
73 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
75 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
76 (sub_ddmmss): Likewise.
78 2019-04-06 H.J. Lu <hongjiu.lu@intel.com>
80 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
82 2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
84 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
85 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
86 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
87 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
88 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
89 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
90 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
91 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
93 2019-03-28 Alan Modra <amodra@gmail.com>
96 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
98 2019-03-25 Tamar Christina <tamar.christina@arm.com>
100 * dis-asm.h (struct disassemble_info): Add stop_offset.
102 2019-03-13 Sudakshina Das <sudi.das@arm.com>
104 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
106 2019-03-13 Sudakshina Das <sudi.das@arm.com>
107 Szabolcs Nagy <szabolcs.nagy@arm.com>
109 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
111 2019-03-13 Sudakshina Das <sudi.das@arm.com>
113 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
114 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
115 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
117 2019-02-20 Alan Hayward <alan.hayward@arm.com>
119 * elf/common.h (NT_ARM_PAC_MASK): Add define.
121 2019-02-15 Saagar Jha <saagar@saagarjha.com>
123 * mach-o/loader.h: Use new OS names in comments.
125 2019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
127 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
128 (splay_tree_delete_value_fn): Likewise.
130 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
132 * opcode/s390.h (enum s390_opcode_cpu_val): Add
135 2019-01-25 Sudakshina Das <sudi.das@arm.com>
136 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
138 * opcode/aarch64.h (enum aarch64_opnd): Remove
139 AARCH64_OPND_ADDR_SIMPLE_2.
140 (enum aarch64_insn_class): Remove ldstgv_indexed.
142 2019-01-22 Tom Tromey <tom@tromey.com>
144 * coff/ecoff.h: Include coff/sym.h.
146 2018-06-24 Nick Clifton <nickc@redhat.com>
150 2019-01-16 Kito Cheng <kito@andestech.com>
152 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
153 (Tag_RISCV_arch): Likewise.
154 (Tag_RISCV_priv_spec): Likewise.
155 (Tag_RISCV_priv_spec_minor): Likewise.
156 (Tag_RISCV_priv_spec_revision): Likewise.
157 (Tag_RISCV_unaligned_access): Likewise.
158 (Tag_RISCV_stack_align): Likewise.
160 2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
162 * dis-asm.h: include <string.h>
164 2019-01-10 Nick Clifton <nickc@redhat.com>
167 2018-12-22 Jason Merrill <jason@redhat.com>
169 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
170 ARM, HP, and EDG demangling styles.
172 2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
177 * libiberty.h: Mechanically replace "can not" with "cannot".
178 * plugin-api.h: Likewise.
180 2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
182 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
183 (E_FLAG_RX_V3): New RXv3 type.
184 * opcode/rx.h (RX_Size): Add double size.
185 (RX_Operand_Type): Add double FPU registers.
186 (RX_Opcode_ID): Add new instuctions.
188 2019-01-01 Alan Modra <amodra@gmail.com>
190 Update year range in copyright notice of all files.
192 For older changes see ChangeLog-2018
194 Copyright (C) 2019 Free Software Foundation, Inc.
196 Copying and distribution of this file, with or without modification,
197 are permitted in any medium without royalty provided the copyright
198 notice and this notice are preserved.
204 version-control: never