[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2018-10-09 Sudakshina Das <sudi.das@arm.com>
2
3 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
4 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
5 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
6 (aarch64_sys_regs_sr): Declare new table.
7
8 2018-10-09 Sudakshina Das <sudi.das@arm.com>
9
10 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
11 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
12
13 2018-10-09 Sudakshina Das <sudi.das@arm.com>
14
15 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
16 (AARCH64_FEATURE_FRINTTS): New.
17 (AARCH64_ARCH_V8_5): Add both by default.
18
19 2018-10-09 Sudakshina Das <sudi.das@arm.com>
20
21 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
22 (AARCH64_ARCH_V8_5): New.
23
24 2018-10-08 Alan Modra <amodra@gmail.com>
25
26 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
27
28 2018-10-05 Sudakshina Das <sudi.das@arm.com>
29
30 * opcode/arm.h (ARM_EXT2_PREDRES): New.
31 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
32
33 2018-10-05 Sudakshina Das <sudi.das@arm.com>
34
35 * opcode/arm.h (ARM_EXT2_SB): New.
36 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
37
38 2018-10-05 Sudakshina Das <sudi.das@arm.com>
39
40 * opcode/arm.h (ARM_EXT2_V8_5A): New.
41 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
42
43 2018-10-05 Richard Henderson <rth@twiddle.net>
44
45 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
46 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
47 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
48 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
49 R_OR1K_SLO13, R_OR1K_PLTA26.
50
51 2018-10-05 Richard Henderson <rth@twiddle.net>
52
53 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
54 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
55 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
56
57 2018-10-03 Tamar Christina <tamar.christina@arm.com>
58
59 * opcode/aarch64.h (aarch64_inst): Remove.
60 (enum err_type): Add ERR_VFI.
61 (aarch64_is_destructive_by_operands): New.
62 (init_insn_sequence): New.
63 (aarch64_decode_insn): Remove param name.
64
65 2018-10-03 Tamar Christina <tamar.christina@arm.com>
66
67 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
68 more arguments.
69
70 2018-10-03 Tamar Christina <tamar.christina@arm.com>
71
72 * opcode/aarch64.h (enum err_type): New.
73 (aarch64_decode_insn): Use it.
74
75 2018-10-03 Tamar Christina <tamar.christina@arm.com>
76
77 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
78 (aarch64_opcode_encode): Use it.
79
80 2018-10-03 Tamar Christina <tamar.christina@arm.com>
81
82 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
83 extend flags field size.
84 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
85
86 2018-10-03 John Darrington <john@darrington.wattle.id.au>
87
88 * dis-asm.h (print_insn_s12z): New declaration.
89
90 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
91
92 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
93 (MASK_FENCE_TSO): Likewise.
94
95 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
96
97 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
98
99 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
100
101 PR binutils/23694
102 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
103 include zero size sections at start of PT_NOTE segment.
104
105 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
106
107 * elf/nds32.h: Remove the unused target features.
108 * dis-asm.h (disassemble_init_nds32): Declared.
109 * elf/nds32.h (E_NDS32_NULL): Removed.
110 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
111 * opcode/nds32.h: Ident.
112 (N32_SUB6, INSN_LW): New macros.
113 (enum n32_opcodes): Updated.
114 * elf/nds32.h: Doc fixes.
115 * elf/nds32.h: Add R_NDS32_LSI.
116 * elf/nds32.h: Add new relocations for TLS.
117
118 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
119
120 * elf/common.h (AT_SUN_HWCAP): Rename to ...
121 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
122 compatibility.
123 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
124 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
125
126 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
127
128 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
129
130 2018-08-31 Alan Modra <amodra@gmail.com>
131
132 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
133 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
134 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
135 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
136
137 2018-08-30 Kito Cheng <kito@andestech.com>
138
139 * opcode/riscv.h (MAX_SUBSET_NUM): New.
140 (riscv_opcode): Add xlen_requirement field and change type of
141 subset.
142
143 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
144
145 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
146 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
147
148 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
149
150 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
151 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
152
153 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
154
155 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
156 E_MIPS_MACH_GS464.
157 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
158 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
159 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
160 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
161
162 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
163
164 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
165 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
166 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
167
168 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
169
170 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
171 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
172 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
173
174 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
175
176 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
177 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
178 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
179
180 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
181
182 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
183 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
184 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
185 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
186 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
187 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
188 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
189 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
190 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
191 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
192 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
193 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
194 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
195 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
196 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
197 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
198 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
199 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
200 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
201 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
202 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
203 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
204 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
205 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
206 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
207 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
208 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
209 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
210 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
211 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
212 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
213 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
214 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
215 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
216 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
217 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
218 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
219 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
220 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
221 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
222 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
223 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
224 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
225 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
226 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
227 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
228 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
229 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
230 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
231 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
232 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
233 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
234 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
235 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
236 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
237 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
238
239 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
240
241 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
242
243 2018-08-21 John Darrington <john@darrington.wattle.id.au>
244
245 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
246
247 2018-08-21 Alan Modra <amodra@gmail.com>
248
249 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
250 Mention use of "extract" function to provide default value.
251 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
252 (ppc_optional_operand_value): Rewrite to use extract function.
253
254 2018-08-18 John Darrington <john@darrington.wattle.id.au>
255
256 * opcode/s12z.h: New file.
257
258 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
259
260 * elf/arm.h: Updated comments for e_flags definitions.
261
262 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
263
264 * elf/arc.h (Tag_ARC_ATR_version): New tag.
265
266 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
267
268 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
269
270 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
271
272 Copy over from GCC
273 2018-07-26 Martin Liska <mliska@suse.cz>
274
275 PR lto/86548
276 * libiberty.h (make_temp_file_with_prefix): New function.
277
278 2018-07-30 Jim Wilson <jimw@sifive.com>
279
280 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
281 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
282 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
283
284 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
285
286 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
287 * elf/csky.h: New file.
288
289 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
290 Maciej W. Rozycki <macro@linux-mips.org>
291
292 * elf/mips.h (AFL_ASE_MASK): Correct typo.
293
294 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
295
296 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
297
298 2018-07-26 Alan Modra <amodra@gmail.com>
299
300 * elf/ppc64.h: Specify byte offset to local entry for values
301 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
302 value for such functions when entering via global entry point.
303 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
304
305 2018-07-24 Alan Modra <amodra@gmail.com>
306
307 PR 23430
308 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
309
310 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
311 Maciej W. Rozycki <macro@mips.com>
312
313 * elf/mips.h (AFL_ASE_MMI): New macro.
314 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
315 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
316
317 2018-07-17 Maciej W. Rozycki <macro@mips.com>
318
319 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
320
321 2018-07-06 Alan Modra <amodra@gmail.com>
322
323 * diagnostics.h: Comment on macro usage.
324
325 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
326
327 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
328 Define for clang.
329
330 2018-07-02 Maciej W. Rozycki <macro@mips.com>
331
332 PR tdep/8282
333 * dis-asm.h (disasm_option_arg_t): New typedef.
334 (disasm_options_and_args_t): Likewise.
335 (disasm_options_t): Add `arg' member, document members.
336 (disassembler_options_mips): New prototype.
337 (disassembler_options_arm, disassembler_options_powerpc)
338 (disassembler_options_s390): Update prototypes.
339
340 2018-06-29 Tamar Christina <tamar.christina@arm.com>
341
342 PR binutils/23192
343 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
344
345 2018-06-26 Alan Modra <amodra@gmail.com>
346
347 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
348
349 2018-06-24 Nick Clifton <nickc@redhat.com>
350
351 2.31 branch created.
352
353 2018-06-21 Alan Hayward <alan.hayward@arm.com>
354
355 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
356 for non SHT_NOBITS.
357
358 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
359
360 Sync with GCC
361
362 2018-05-24 Tom Rix <trix@juniper.net>
363
364 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
365
366 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
367
368 * longlong.h [__riscv] (__umulsidi3): Define.
369 [__riscv] (umul_ppmm): Likewise.
370 [__riscv] (__muluw3): Likewise.
371
372 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
373
374 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
375 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
376 * opcode/mips.h: Document "+\" operand format.
377 (ASE_GINV): New macro.
378
379 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
380 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
381
382 * elf/mips.h (AFL_ASE_CRC): New macro.
383 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
384 * opcode/mips.h (ASE_CRC): New macro.
385 * opcode/mips.h (ASE_CRC64): Likewise.
386
387 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
388
389 * elf/xtensa.h (xtensa_read_table_entries)
390 (xtensa_compute_fill_extra_space): New declarations.
391
392 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
393
394 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
395 define for GCC.
396
397 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
398
399 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
400 (DIAGNOSTIC_STRINGIFY): Likewise.
401 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
402 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
403 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
404 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
405 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
406 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
407
408 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
409
410 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
411
412 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
413
414 * splay-tree.h (splay_tree_compare_strings,
415 splay_tree_delete_pointers): Declare new utility functions.
416
417 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
418
419 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
420
421 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
422
423 * elf/riscv.h (EF_RISCV_RVE): New define.
424
425 2018-05-18 John Darrington <john@darrington.wattle.id.au>
426
427 * elf/s12z.h: New header.
428
429 2018-05-15 Tamar Christina <tamar.christina@arm.com>
430
431 PR binutils/21446
432 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
433
434 2018-05-15 Tamar Christina <tamar.christina@arm.com>
435
436 PR binutils/21446
437 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
438 (aarch64_print_operand): Support notes.
439
440 2018-05-15 Tamar Christina <tamar.christina@arm.com>
441
442 PR binutils/21446
443 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
444 (aarch64_decode_insn): Accept error struct.
445
446 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
447
448 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
449
450 2018-05-10 John Darrington <john@darrington.wattle.id.au>
451
452 * elf/common.h (EM_S12Z): New macro.
453
454 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
455
456 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
457 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
458 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
459 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
460
461 2018-05-08 Jim Wilson <jimw@sifive.com>
462
463 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
464 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
465 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
466
467 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
468
469 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
470 (vle_num_opcodes): Likewise.
471 (spe2_num_opcodes): Likewise.
472
473 2018-05-04 Alan Modra <amodra@gmail.com>
474
475 * ansidecl.h: Import from gcc.
476 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
477 to s_name.
478 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
479
480 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
481
482 * dis-asm.h: Added print_nfp_disassembler_options prototype.
483 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
484 Generic System V Application Binary Interface.
485 * elf/nfp.h: New, for NFP support.
486 * opcode/nfp.h: New, for NFP support.
487
488 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
489 Mickaël Guêné <mickael.guene@st.com>
490
491 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
492 R_ARM_TLS_IE32_FDPIC.
493
494 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
495 Mickaël Guêné <mickael.guene@st.com>
496
497 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
498 (R_ARM_FUNCDESC)
499 (R_ARM_FUNCDESC_VALUE): Define new relocations.
500
501 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
502 Mickaël Guêné <mickael.guene@st.com>
503
504 * elf/arm.h (EF_ARM_FDPIC): New.
505
506 2018-04-18 Alan Modra <amodra@gmail.com>
507
508 * coff/mipspe.h: Delete.
509
510 2018-04-18 Alan Modra <amodra@gmail.com>
511
512 * aout/dynix3.h: Delete.
513
514 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
515
516 Microblaze Target: PIC data text relative
517
518 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
519 * elf/microblaze.h (Add 3 new relocations):
520 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
521 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
522
523 2018-04-17 Alan Modra <amodra@gmail.com>
524
525 * elf/i370.h: Revert removal.
526 * elf/i860.h: Likewise.
527 * elf/i960.h: Likewise.
528
529 2018-04-16 Alan Modra <amodra@gmail.com>
530
531 * coff/sparc.h: Delete.
532
533 2018-04-16 Alan Modra <amodra@gmail.com>
534
535 * aout/host.h: Remove m68k-aout and m68k-coff support.
536 * aout/hp300hpux.h: Delete.
537 * coff/apollo.h: Delete.
538 * coff/aux-coff.h: Delete.
539 * coff/m68k.h: Delete.
540
541 2018-04-16 Alan Modra <amodra@gmail.com>
542
543 * dis-asm.h: Remove sh5 and sh64 support.
544
545 2018-04-16 Alan Modra <amodra@gmail.com>
546
547 * coff/internal.h: Remove w65 support.
548 * coff/w65.h: Delete.
549
550 2018-04-16 Alan Modra <amodra@gmail.com>
551
552 * coff/we32k.h: Delete.
553
554 2018-04-16 Alan Modra <amodra@gmail.com>
555
556 * coff/internal.h: Remove m88k support.
557 * coff/m88k.h: Delete.
558 * opcode/m88k.h: Delete.
559
560 2018-04-16 Alan Modra <amodra@gmail.com>
561
562 * elf/i370.h: Delete.
563 * opcode/i370.h: Delete.
564
565 2018-04-16 Alan Modra <amodra@gmail.com>
566
567 * coff/h8500.h: Delete.
568 * coff/internal.h: Remove h8500 support.
569
570 2018-04-16 Alan Modra <amodra@gmail.com>
571
572 * coff/h8300.h: Delete.
573
574 2018-04-16 Alan Modra <amodra@gmail.com>
575
576 * ieee.h: Delete.
577
578 2018-04-16 Alan Modra <amodra@gmail.com>
579
580 * aout/host.h: Remove newsos3 support.
581
582 2018-04-16 Alan Modra <amodra@gmail.com>
583
584 * nlm/ChangeLog-9315: Delete.
585 * nlm/alpha-ext.h: Delete.
586 * nlm/common.h: Delete.
587 * nlm/external.h: Delete.
588 * nlm/i386-ext.h: Delete.
589 * nlm/internal.h: Delete.
590 * nlm/ppc-ext.h: Delete.
591 * nlm/sparc32-ext.h: Delete.
592
593 2018-04-16 Alan Modra <amodra@gmail.com>
594
595 * opcode/tahoe.h: Delete.
596
597 2018-04-11 Alan Modra <amodra@gmail.com>
598
599 * aout/adobe.h: Delete.
600 * aout/reloc.h: Delete.
601 * coff/i860.h: Delete.
602 * coff/i960.h: Delete.
603 * elf/i860.h: Delete.
604 * elf/i960.h: Delete.
605 * opcode/i860.h: Delete.
606 * opcode/i960.h: Delete.
607 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
608 * aout/ar.h (ARMAGB): Remove.
609 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
610 union internal_auxent): Remove i960 support.
611
612 2018-04-09 Alan Modra <amodra@gmail.com>
613
614 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
615 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
616
617 2018-03-28 Renlin Li <renlin.li@arm.com>
618
619 PR ld/22970
620 * elf/aarch64.h: Add relocation number for
621 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
622 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
623 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
624 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
625 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
626 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
627 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
628 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
629
630 2018-03-28 Nick Clifton <nickc@redhat.com>
631
632 PR 22988
633 * opcode/aarch64.h (enum aarch64_opnd): Add
634 AARCH64_OPND_SVE_ADDR_R.
635
636 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
637
638 * elf/common.h (DF_1_KMOD): New.
639 (DF_1_WEAKFILTER): Likewise.
640 (DF_1_NOCOMMON): Likewise.
641
642 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
643
644 * opcode/riscv.h (OP_MASK_FUNCT3): New.
645 (OP_SH_FUNCT3): Likewise.
646 (OP_MASK_FUNCT7): Likewise.
647 (OP_SH_FUNCT7): Likewise.
648 (OP_MASK_OP2): Likewise.
649 (OP_SH_OP2): Likewise.
650 (OP_MASK_CFUNCT4): Likewise.
651 (OP_SH_CFUNCT4): Likewise.
652 (OP_MASK_CFUNCT3): Likewise.
653 (OP_SH_CFUNCT3): Likewise.
654 (riscv_insn_types): Likewise.
655
656 2018-03-13 Nick Clifton <nickc@redhat.com>
657
658 PR 22113
659 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
660 field.
661
662 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
663
664 * opcode/i386 (OLDGCC_COMPAT): Removed.
665
666 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
667
668 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
669
670 2018-02-20 Maciej W. Rozycki <macro@mips.com>
671
672 * opcode/mips.h: Remove `M' operand code.
673
674 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
675
676 * coff/msdos.h: New header.
677 * coff/pe.h: Move common defines to msdos.h.
678 * coff/powerpc.h: Likewise.
679
680 2018-01-13 Nick Clifton <nickc@redhat.com>
681
682 2.30 branch created.
683
684 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
685
686 PR ld/22393
687 * bfdlink.h (bfd_link_info): Add separate_code.
688
689 2018-01-04 Jim Wilson <jimw@sifive.com>
690
691 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
692 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
693 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
694 Add alias to map mbadaddr to CSR_MTVAL.
695
696 2018-01-03 Alan Modra <amodra@gmail.com>
697
698 Update year range in copyright notice of all files.
699
700 For older changes see ChangeLog-2017
701 \f
702 Copyright (C) 2018 Free Software Foundation, Inc.
703
704 Copying and distribution of this file, with or without modification,
705 are permitted in any medium without royalty provided the copyright
706 notice and this notice are preserved.
707
708 Local Variables:
709 mode: change-log
710 left-margin: 8
711 fill-column: 74
712 version-control: never
713 End:
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