[binutils][aarch64] New SVE_Zm4_11_INDEX operand.
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
2
3 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
4
5 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
6
7 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
8 iclass.
9
10 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
11
12 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
13 operand.
14 (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
15
16 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
17
18 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
19
20 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
21
22 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
23
24 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
25
26 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
27
28 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
29
30 * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
31
32 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
33
34 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
35
36 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
37
38 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
39
40 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
41
42 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
43
44 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
45
46 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
47 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
48 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
49 feature macros.
50
51 2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
52 Faraz Shahbazker <fshahbazker@wavecomp.com>
53
54 * opcode/mips.h (ASE_EVA_R6): New macro.
55 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
56
57 2019-05-01 Sudakshina Das <sudi.das@arm.com>
58
59 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
60 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
61
62 2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
63 Faraz Shahbazker <fshahbazker@wavecomp.com>
64
65 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
66 (M_SCWP_AB, M_SCDP_AB): Likewise.
67
68 2019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
69
70 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
71
72 2019-04-15 Sudakshina Das <sudi.das@arm.com>
73
74 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
75
76 2019-04-15 Sudakshina Das <sudi.das@arm.com>
77
78 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
79
80 2019-04-15 Sudakshina Das <sudi.das@arm.com>
81
82 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
83
84 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
85
86 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
87 (MAX_TAG_CPU_ARCH): Set value to above macro.
88 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
89 (ARM_AEXT_V8_1M_MAIN): Likewise.
90 (ARM_AEXT2_V8_1M_MAIN): Likewise.
91 (ARM_ARCH_V8_1M_MAIN): Likewise.
92
93 2019-04-11 Sudakshina Das <sudi.das@arm.com>
94
95 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
96
97 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
98
99 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
100
101 2019-04-07 Alan Modra <amodra@gmail.com>
102
103 Merge from gcc.
104 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
105 PR89877
106 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
107 (sub_ddmmss): Likewise.
108
109 2019-04-06 H.J. Lu <hongjiu.lu@intel.com>
110
111 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
112
113 2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
114
115 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
116 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
117 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
118 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
119 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
120 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
121 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
122 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
123
124 2019-03-28 Alan Modra <amodra@gmail.com>
125
126 PR 24390
127 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
128
129 2019-03-25 Tamar Christina <tamar.christina@arm.com>
130
131 * dis-asm.h (struct disassemble_info): Add stop_offset.
132
133 2019-03-13 Sudakshina Das <sudi.das@arm.com>
134
135 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
136
137 2019-03-13 Sudakshina Das <sudi.das@arm.com>
138 Szabolcs Nagy <szabolcs.nagy@arm.com>
139
140 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
141
142 2019-03-13 Sudakshina Das <sudi.das@arm.com>
143
144 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
145 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
146 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
147
148 2019-02-20 Alan Hayward <alan.hayward@arm.com>
149
150 * elf/common.h (NT_ARM_PAC_MASK): Add define.
151
152 2019-02-15 Saagar Jha <saagar@saagarjha.com>
153
154 * mach-o/loader.h: Use new OS names in comments.
155
156 2019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
157
158 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
159 (splay_tree_delete_value_fn): Likewise.
160
161 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
162
163 * opcode/s390.h (enum s390_opcode_cpu_val): Add
164 S390_OPCODE_ARCH13.
165
166 2019-01-25 Sudakshina Das <sudi.das@arm.com>
167 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
168
169 * opcode/aarch64.h (enum aarch64_opnd): Remove
170 AARCH64_OPND_ADDR_SIMPLE_2.
171 (enum aarch64_insn_class): Remove ldstgv_indexed.
172
173 2019-01-22 Tom Tromey <tom@tromey.com>
174
175 * coff/ecoff.h: Include coff/sym.h.
176
177 2018-06-24 Nick Clifton <nickc@redhat.com>
178
179 2.32 branch created.
180
181 2019-01-16 Kito Cheng <kito@andestech.com>
182
183 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
184 (Tag_RISCV_arch): Likewise.
185 (Tag_RISCV_priv_spec): Likewise.
186 (Tag_RISCV_priv_spec_minor): Likewise.
187 (Tag_RISCV_priv_spec_revision): Likewise.
188 (Tag_RISCV_unaligned_access): Likewise.
189 (Tag_RISCV_stack_align): Likewise.
190
191 2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
192
193 * dis-asm.h: include <string.h>
194
195 2019-01-10 Nick Clifton <nickc@redhat.com>
196
197 * Merge from GCC:
198 2018-12-22 Jason Merrill <jason@redhat.com>
199
200 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
201 ARM, HP, and EDG demangling styles.
202
203 2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
204
205 Merge from GCC:
206 PR other/16615
207
208 * libiberty.h: Mechanically replace "can not" with "cannot".
209 * plugin-api.h: Likewise.
210
211 2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
212
213 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
214 (E_FLAG_RX_V3): New RXv3 type.
215 * opcode/rx.h (RX_Size): Add double size.
216 (RX_Operand_Type): Add double FPU registers.
217 (RX_Opcode_ID): Add new instuctions.
218
219 2019-01-01 Alan Modra <amodra@gmail.com>
220
221 Update year range in copyright notice of all files.
222
223 For older changes see ChangeLog-2018
224 \f
225 Copyright (C) 2019 Free Software Foundation, Inc.
226
227 Copying and distribution of this file, with or without modification,
228 are permitted in any medium without royalty provided the copyright
229 notice and this notice are preserved.
230
231 Local Variables:
232 mode: change-log
233 left-margin: 8
234 fill-column: 74
235 version-control: never
236 End:
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