1 2016-12-20 Andrew Waterman <andrew@sifive.com>
2 Kuan-Lin Chen <kuanlinchentw@gmail.com>
4 * elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
6 2016-12-16 fincs <fincs.alt1@gmail.com>
8 * bfdlink.h (struct bfd_link_info): Add gc_keep_exported.
10 2016-12-14 Maciej W. Rozycki <macro@imgtec.com>
12 * elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
13 typedef as `elf_internal_abiflags_v0'.
15 2016-12-13 Renlin Li <renlin.li@arm.com>
17 * opcode/aarch64.h (aarch64_operand_class): Remove
18 AARCH64_OPND_CLASS_CP_REG.
19 (enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
20 AARCH64_OPND_Cm to AARCH64_OPND_CRm.
21 (aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.
23 2016-12-09 Maciej W. Rozycki <macro@imgtec.com>
25 * opcode/mips.h: Remove references to `>' operand code.
27 2016-12-07 Maciej W. Rozycki <macro@imgtec.com>
29 * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
31 2016-12-07 Maciej W. Rozycki <macro@imgtec.com>
33 * opcode/mips.h (ASE_DSPR3): Add a comment.
35 2016-12-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
37 * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
38 (ARM_ARCH_V8_3A): New.
40 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com>
42 * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
45 2016-11-22 Jose E. Marchesi <jose.marchesi@oracle.com>
47 * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
50 2016-11-22 Alan Modra <amodra@gmail.com>
53 * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
55 2016-11-03 David Tolnay <dtolnay@gmail.com>
56 Mark Wielaard <mark@klomp.org>
58 * demangle.h (DMGL_RUST): New macro.
59 (DMGL_STYLE_MASK): Add DMGL_RUST.
60 (demangling_styles): Add dlang_rust.
61 (RUST_DEMANGLING_STYLE_STRING): New macro.
62 (RUST_DEMANGLING): New macro.
63 (rust_demangle): New prototype.
64 (rust_is_mangled): Likewise.
65 (rust_demangle_sym): Likewise.
67 2016-11-07 Jason Merrill <jason@redhat.com>
69 * demangle.h (enum demangle_component_type): Add
70 DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
72 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
74 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
75 AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
76 (enum aarch64_op): Add OP_FCMLA_ELEM.
78 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
80 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
81 (enum aarch64_insn_class): Add ldst_imm10.
83 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
85 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
87 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
89 * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
90 (AARCH64_ARCH_V8_3): Define.
91 (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
93 2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
95 * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
96 (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
97 (ARM_ARCH_V8M_MAIN_DSP): Likewise.
99 2016-11-03 Graham Markall <graham.markall@embecosm.com>
101 * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
103 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
105 * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
107 (struct arc_long_opcode): Delete.
108 (struct arc_operand): Change types for insert and extract
111 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
113 * opcode/arc.h: Make macros 64-bit safe.
115 2016-11-03 Graham Markall <graham.markall@embecosm.com>
117 * opcode/arc.h (arc_opcode_len): Declare.
120 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
121 Andrew Waterman <andrew@sifive.com>
123 Add support for RISC-V architecture.
124 * dis-asm.h: Add prototypes for print_insn_riscv and
125 print_riscv_disassembler_options.
126 * elf/riscv.h: New file.
127 * opcode/riscv-opc.h: New file.
128 * opcode/riscv.h: New file.
130 2016-10-17 Nick Clifton <nickc@redhat.com>
132 * elf/common.h (DT_SYMTAB_SHNDX): Define.
133 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
134 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
135 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
136 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
137 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
138 (ELFOSABI_OPENVOS): Define.
139 (GRP_MASKOS, GRP_MASKPROC): Define.
141 2016-10-14 Pedro Alves <palves@redhat.com>
143 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
144 OVERRIDE): Define as empty.
145 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
147 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
150 2016-10-14 Pedro Alves <palves@redhat.com>
152 * ansidecl.h (GCC_FINAL): Delete.
153 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
155 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
157 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
159 2016-09-29 Alan Modra <amodra@gmail.com>
161 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
163 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
165 * opcode/arc.h (insn_class_t): Add two new classes.
167 2016-09-26 Alan Modra <amodra@gmail.com>
169 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
171 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
173 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
175 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
177 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
178 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
179 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
180 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
182 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
184 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
185 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
186 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
187 aarch64_insn_classes.
189 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
191 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
192 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
193 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
195 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
197 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
198 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
199 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
201 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
203 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
204 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
205 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
206 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
207 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
208 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
209 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
210 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
211 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
212 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
213 (aarch64_sve_dupm_mov_immediate_p): Declare.
215 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
217 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
218 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
219 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
220 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
221 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
223 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
225 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
226 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
227 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
228 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
229 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
230 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
231 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
232 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
233 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
234 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
235 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
236 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
237 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
238 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
239 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
240 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
243 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
245 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
247 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
248 (aarch64_opnd_info): Make shifter.amount an int64_t and
249 rearrange the fields.
251 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
253 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
254 (AARCH64_OPND_SVE_PRFOP): Likewise.
255 (aarch64_sve_pattern_array): Declare.
256 (aarch64_sve_prfop_array): Likewise.
258 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
260 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
261 (AARCH64_OPND_QLF_P_M): Likewise.
263 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
265 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
266 aarch64_operand_class.
267 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
268 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
269 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
270 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
271 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
272 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
273 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
274 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
276 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
278 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
279 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
281 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
283 * opcode/aarch64.h (F_STRICT): New flag.
285 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
287 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
289 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
290 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
291 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
292 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
295 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
297 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
298 (ARM_SET_SYM_CMSE_SPCL): Likewise.
300 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
302 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
304 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
306 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
308 2016-07-27 Graham Markall <graham.markall@embecosm.com>
310 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
311 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
313 * opcode/arc.h: Add BMU to insn_class_t enum.
314 * opcode/arc.h: Add PMU to insn_class_t enum.
316 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
318 * dis-asm.h: Declare print_arc_disassembler_options.
320 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
322 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
323 out_implib_bfd fields.
325 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
327 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
329 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
331 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
332 (SHF_ARM_PURECODE): ... this.
334 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
336 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
337 (AARCH64_CPU_HAS_ANY_FEATURES): New.
338 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
339 (AARCH64_OPCODE_HAS_FEATURE): Remove.
341 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
343 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
344 of enabled FPU features.
346 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
348 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
349 SPARC_OPCODE_ARCH_MAX into the enum.
351 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
353 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
355 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
357 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
359 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
361 * elf/xtensa.h (xtensa_make_property_section): New prototype.
363 2016-06-24 John Baldwin <jhb@FreeBSD.org>
365 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
366 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
367 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
368 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
370 2016-06-23 Graham Markall <graham.markall@embecosm.com>
372 * opcode/arc.h: Make insn_class_t alphabetical again.
374 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
376 * elf/dlx.h: Wrap in extern C.
377 * elf/xtensa.h: Likewise.
378 * opcode/arc.h: Likewise.
380 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
382 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
385 2016-06-21 Graham Markall <graham.markall@embecosm.com>
387 * opcode/arc.h: Add nps400 extension and instruction
389 Remove ARC_OPCODE_NPS400
390 * elf/arc.h: Remove E_ARC_MACH_NPS400
392 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
394 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
395 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
396 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
397 SPARC_OPCODE_ARCH_V9M.
399 2016-06-14 John Baldwin <jhb@FreeBSD.org>
401 * opcode/msp430-decode.h (MSP430_Size): Remove.
402 (Msp430_Opcode_Decoded): Change type of size to int.
404 2016-06-11 Alan Modra <amodra@gmail.com>
406 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
408 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
410 * opcode/sparc.h: Add missing documentation for hyperprivileged
411 registers in rd (%) and rs1 ($).
413 2016-06-07 Alan Modra <amodra@gmail.com>
415 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
416 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
417 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
418 PPC_APUINFO_VLE: Define.
420 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
422 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
424 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
426 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
428 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
429 (struct arc_long_opcode): New structure.
430 (arc_long_opcodes): Declare.
431 (arc_num_long_opcodes): Declare.
433 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
435 * elf/mips.h: Add extern "C".
436 * elf/sh.h: Likewise.
437 * opcode/d10v.h: Likewise.
438 * opcode/d30v.h: Likewise.
439 * opcode/ia64.h: Likewise.
440 * opcode/mips.h: Likewise.
441 * opcode/ppc.h: Likewise.
442 * opcode/sparc.h: Likewise.
443 * opcode/tic6x.h: Likewise.
444 * opcode/v850.h: Likewise.
446 2016-05-28 Alan Modra <amodra@gmail.com>
448 * bfdlink.h (struct bfd_link_callbacks): Update comments.
449 Return void from multiple_definition, multiple_common,
450 add_to_set, constructor, warning, undefined_symbol,
451 reloc_overflow, reloc_dangerous and unattached_reloc.
453 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
455 * opcode/metag.h: wrap declarations in extern "C".
457 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
459 * opcode/arc.h (insn_subclass_t): Add COND.
460 (flag_class_t): Add F_CLASS_EXTEND.
462 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
464 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
466 (struct arc_flag_class): Renamed attribute class to flag_class.
468 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
470 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
473 2016-04-29 Tom Tromey <tom@tromey.com>
475 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
476 DW_LANG_Rust_old>: New constants.
478 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
480 * elf/mips.h (AFL_ASE_DSPR3): New macro.
481 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
482 * opcode/mips.h (ASE_DSPR3): New macro.
484 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
485 Nick Clifton <nickc@redhat.com>
487 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
489 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
490 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
491 (ARM_SYM_BRANCH_TYPE): Replace by ...
492 (ARM_GET_SYM_BRANCH_TYPE): This and ...
493 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
494 BFD_ASSERT is defined or not.
496 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
498 * elf/arm.h (Tag_DSP_extension): Define.
500 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
502 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
504 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
506 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
507 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
508 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
509 for the high core bits.
511 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
513 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
514 (ARC_SYNTAX_NOP): Likewsie.
515 (ARC_OP1_MUST_BE_IMM): Update defined value.
516 (ARC_OP1_IMM_IMPLIED): Likewise.
517 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
519 2016-04-28 Nick Clifton <nickc@redhat.com>
522 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
524 2016-04-27 Alan Modra <amodra@gmail.com>
526 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
529 2016-04-21 Nick Clifton <nickc@redhat.com>
531 * bfdlink.h: Add prototype for bfd_link_check_relocs.
533 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
535 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
537 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
539 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
541 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
543 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
545 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
547 * opcode/arc.h (insn_class_t): Add NET and ACL class.
549 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
551 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
552 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
554 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
556 * opcode/arc.h (flag_class_t): Update.
557 (ARC_OPCODE_NONE): Define.
558 (ARC_OPCODE_ARCALL): Likewise.
559 (ARC_OPCODE_ARCFPX): Likewise.
560 (ARC_REGISTER_READONLY): Likewise.
561 (ARC_REGISTER_WRITEONLY): Likewise.
562 (ARC_REGISTER_NOSHORT_CUT): Likewise.
563 (arc_aux_reg): Add cpu.
565 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
567 * opcode/arc.h (arc_num_opcodes): Remove.
568 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
569 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
570 (ARC_SUFFIX_FLAG): Define.
571 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
572 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
573 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
574 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
575 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
576 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
577 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
578 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
579 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
580 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
582 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
584 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
586 (arc_aux_reg): Add new field.
588 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
590 * opcode/arc-func.h (replace_bits24): Changed.
591 (replace_bits24_be): Created.
593 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
595 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
596 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
597 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
598 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
599 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
600 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
601 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
602 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
603 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
604 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
605 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
606 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
607 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
608 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
610 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
612 * opcode/i960.h: Add const qualifiers.
613 * opcode/tic4x.h (struct tic4x_inst): Likewise.
615 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
617 * opcodes/arc.h (insn_class_t): Add BITOP type.
619 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
621 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
624 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
626 * elf/arc.h (E_ARC_MACH_NPS400): Define.
627 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
629 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
631 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
633 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
635 * elf/arc.h (EF_ARC_MACH): Delete.
636 (EF_ARC_MACH_MSK): Remove out of date comment.
638 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
640 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
642 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
645 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
647 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
648 Andrew Burgess <andrew.burgess@embecosm.com>
650 * elf/arc-reloc.def: Add a call to ME within the formula for each
651 relocation that requires middle-endian correction.
653 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
655 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
656 * opcode/h8300.h (struct h8_opcode): Likewise.
657 * opcode/hppa.h (struct pa_opcode): Likewise.
658 * opcode/msp430.h: Likewise.
659 * opcode/spu.h (struct spu_opcode): Likewise.
660 * opcode/tic30.h (struct _register): Likewise.
661 * opcode/tic4x.h (struct tic4x_register): Likewise.
662 (struct tic4x_cond): Likewise.
663 (struct tic4x_indirect): Likewise.
664 (struct tic4x_inst): Likewise.
665 * opcode/visium.h (struct reg_entry): Likewise.
667 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
669 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
670 (ARM_CPU_HAS_FEATURE): Add comment.
672 2016-03-03 Than McIntosh <thanm@google.com>
674 * plugin-api.h: Add new hooks to the plugin transfer vector to
675 to support querying section alignment and section size.
676 (ld_plugin_get_input_section_alignment): New hook.
677 (ld_plugin_get_input_section_size): New hook.
678 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
679 and LDPT_GET_INPUT_SECTION_SIZE.
680 (ld_plugin_tv): Add tv_get_input_section_alignment and
681 tv_get_input_section_size.
683 2016-03-03 Evgenii Stepanov <eugenis@google.com>
685 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
687 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
690 * bfdlink.h (bfd_link_elf_stt_common): New enum.
691 (bfd_link_info): Add elf_stt_common.
693 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
698 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
700 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
701 Jiong Wang <jiong.wang@arm.com>
703 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
705 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
706 Janek van Oirschot <jvanoirs@synopsys.com>
708 * opcode/arc.h (arc_opcode arc_relax_opcodes)
709 (arc_num_relax_opcodes): Declare.
711 2016-02-09 Nick Clifton <nickc@redhat.com>
713 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
714 * opcode/nds32.h (nds32_r45map): Likewise.
715 (nds32_r54map): Likewise.
716 * opcode/visium.h (gen_reg_table): Likewise.
717 (fp_reg_table, cc_table, opcode_table): Likewise.
719 2016-02-09 Alan Modra <amodra@gmail.com>
722 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
724 2016-02-04 Nick Clifton <nickc@redhat.com>
727 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
728 (RRUX): Synthesise using case 2 rather than 7.
730 2016-01-19 John Baldwin <jhb@FreeBSD.org>
732 * elf/common.h (NT_FREEBSD_THRMISC): Define.
733 (NT_FREEBSD_PROCSTAT_PROC): Define.
734 (NT_FREEBSD_PROCSTAT_FILES): Define.
735 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
736 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
737 (NT_FREEBSD_PROCSTAT_UMASK): Define.
738 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
739 (NT_FREEBSD_PROCSTAT_OSREL): Define.
740 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
741 (NT_FREEBSD_PROCSTAT_AUXV): Define.
743 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
744 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
746 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
747 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
748 (ARC_TLS_LE_32): Fixed formula.
749 (ARC_TLS_GD_LD): Use new special function.
750 * opcode/arc-func.h: Changed all the replacement
751 functions to clear the patching bits before doing an or it with the value
754 2016-01-18 Nick Clifton <nickc@redhat.com>
757 * coff/internal.h (internal_syment): Use int to hold section
759 (N_UNDEF): Cast to int not short.
765 2016-01-11 Nick Clifton <nickc@redhat.com>
767 Import this change from GCC mainline:
769 2016-01-07 Mike Frysinger <vapier@gentoo.org>
771 * longlong.h: Change !__SHMEDIA__ to
772 (!defined (__SHMEDIA__) || !__SHMEDIA__).
773 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
775 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
777 * opcode/mips.h: Add a summary of MIPS16 operand codes.
779 2016-01-05 Mike Frysinger <vapier@gentoo.org>
781 * libiberty.h (dupargv): Change arg to char * const *.
782 (writeargv, countargv): Likewise.
784 2016-01-01 Alan Modra <amodra@gmail.com>
786 Update year range in copyright notice of all files.
788 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
789 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
790 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
791 som/ChangeLog-1015, and vms/ChangeLog-1015
793 Copyright (C) 2016 Free Software Foundation, Inc.
795 Copying and distribution of this file, with or without modification,
796 are permitted in any medium without royalty provided the copyright
797 notice and this notice are preserved.
803 version-control: never