libiberty: Add Rust symbol demangling.
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2016-11-03 David Tolnay <dtolnay@gmail.com>
2 Mark Wielaard <mark@klomp.org>
3
4 * demangle.h (DMGL_RUST): New macro.
5 (DMGL_STYLE_MASK): Add DMGL_RUST.
6 (demangling_styles): Add dlang_rust.
7 (RUST_DEMANGLING_STYLE_STRING): New macro.
8 (RUST_DEMANGLING): New macro.
9 (rust_demangle): New prototype.
10 (rust_is_mangled): Likewise.
11 (rust_demangle_sym): Likewise.
12
13 2016-11-07 Jason Merrill <jason@redhat.com>
14
15 * demangle.h (enum demangle_component_type): Add
16 DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
17
18 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
19
20 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
21 AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
22 (enum aarch64_op): Add OP_FCMLA_ELEM.
23
24 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
25
26 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
27 (enum aarch64_insn_class): Add ldst_imm10.
28
29 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
30
31 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
32
33 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
34
35 * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
36 (AARCH64_ARCH_V8_3): Define.
37 (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
38
39 2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
40
41 * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
42 (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
43 (ARM_ARCH_V8M_MAIN_DSP): Likewise.
44
45 2016-11-03 Graham Markall <graham.markall@embecosm.com>
46
47 * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
48
49 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
50
51 * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
52 fields.
53 (struct arc_long_opcode): Delete.
54 (struct arc_operand): Change types for insert and extract
55 handlers.
56
57 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
58
59 * opcode/arc.h: Make macros 64-bit safe.
60
61 2016-11-03 Graham Markall <graham.markall@embecosm.com>
62
63 * opcode/arc.h (arc_opcode_len): Declare.
64 (ARC_SHORT): Delete.
65
66 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
67 Andrew Waterman <andrew@sifive.com>
68
69 Add support for RISC-V architecture.
70 * dis-asm.h: Add prototypes for print_insn_riscv and
71 print_riscv_disassembler_options.
72 * elf/riscv.h: New file.
73 * opcode/riscv-opc.h: New file.
74 * opcode/riscv.h: New file.
75
76 2016-10-17 Nick Clifton <nickc@redhat.com>
77
78 * elf/common.h (DT_SYMTAB_SHNDX): Define.
79 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
80 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
81 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
82 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
83 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
84 (ELFOSABI_OPENVOS): Define.
85 (GRP_MASKOS, GRP_MASKPROC): Define.
86
87 2016-10-14 Pedro Alves <palves@redhat.com>
88
89 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
90 OVERRIDE): Define as empty.
91 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
92 __final.
93 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
94 empty.
95
96 2016-10-14 Pedro Alves <palves@redhat.com>
97
98 * ansidecl.h (GCC_FINAL): Delete.
99 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
100
101 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
102
103 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
104
105 2016-09-29 Alan Modra <amodra@gmail.com>
106
107 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
108
109 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
110
111 * opcode/arc.h (insn_class_t): Add two new classes.
112
113 2016-09-26 Alan Modra <amodra@gmail.com>
114
115 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
116
117 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
118
119 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
120
121 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
122
123 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
124 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
125 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
126 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
127
128 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
129
130 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
131 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
132 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
133 aarch64_insn_classes.
134
135 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
136
137 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
138 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
139 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
140
141 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
142
143 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
144 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
145 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
146
147 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
148
149 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
150 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
151 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
152 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
153 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
154 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
155 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
156 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
157 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
158 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
159 (aarch64_sve_dupm_mov_immediate_p): Declare.
160
161 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
162
163 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
164 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
165 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
166 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
167 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
168
169 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
170
171 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
172 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
173 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
174 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
175 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
176 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
177 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
178 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
179 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
180 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
181 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
182 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
183 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
184 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
185 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
186 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
187 Likewise.
188
189 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
190
191 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
192 aarch64_opnd.
193 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
194 (aarch64_opnd_info): Make shifter.amount an int64_t and
195 rearrange the fields.
196
197 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
198
199 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
200 (AARCH64_OPND_SVE_PRFOP): Likewise.
201 (aarch64_sve_pattern_array): Declare.
202 (aarch64_sve_prfop_array): Likewise.
203
204 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
205
206 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
207 (AARCH64_OPND_QLF_P_M): Likewise.
208
209 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
210
211 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
212 aarch64_operand_class.
213 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
214 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
215 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
216 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
217 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
218 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
219 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
220 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
221
222 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
223
224 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
225 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
226
227 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
228
229 * opcode/aarch64.h (F_STRICT): New flag.
230
231 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
232
233 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
234
235 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
236 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
237 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
238 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
239 relocation.
240
241 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
242
243 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
244 (ARM_SET_SYM_CMSE_SPCL): Likewise.
245
246 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
247
248 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
249
250 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
251
252 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
253
254 2016-07-27 Graham Markall <graham.markall@embecosm.com>
255
256 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
257 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
258 ARC_NUM_ADDRTYPES.
259 * opcode/arc.h: Add BMU to insn_class_t enum.
260 * opcode/arc.h: Add PMU to insn_class_t enum.
261
262 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
263
264 * dis-asm.h: Declare print_arc_disassembler_options.
265
266 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
267
268 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
269 out_implib_bfd fields.
270
271 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
272
273 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
274
275 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
276
277 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
278 (SHF_ARM_PURECODE): ... this.
279
280 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
281
282 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
283 (AARCH64_CPU_HAS_ANY_FEATURES): New.
284 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
285 (AARCH64_OPCODE_HAS_FEATURE): Remove.
286
287 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
288
289 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
290 of enabled FPU features.
291
292 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
293
294 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
295 SPARC_OPCODE_ARCH_MAX into the enum.
296
297 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
298
299 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
300
301 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
302
303 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
304
305 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
306
307 * elf/xtensa.h (xtensa_make_property_section): New prototype.
308
309 2016-06-24 John Baldwin <jhb@FreeBSD.org>
310
311 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
312 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
313 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
314 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
315
316 2016-06-23 Graham Markall <graham.markall@embecosm.com>
317
318 * opcode/arc.h: Make insn_class_t alphabetical again.
319
320 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
321
322 * elf/dlx.h: Wrap in extern C.
323 * elf/xtensa.h: Likewise.
324 * opcode/arc.h: Likewise.
325
326 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
327
328 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
329 tilegx_pipeline.
330
331 2016-06-21 Graham Markall <graham.markall@embecosm.com>
332
333 * opcode/arc.h: Add nps400 extension and instruction
334 subclass.
335 Remove ARC_OPCODE_NPS400
336 * elf/arc.h: Remove E_ARC_MACH_NPS400
337
338 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
339
340 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
341 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
342 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
343 SPARC_OPCODE_ARCH_V9M.
344
345 2016-06-14 John Baldwin <jhb@FreeBSD.org>
346
347 * opcode/msp430-decode.h (MSP430_Size): Remove.
348 (Msp430_Opcode_Decoded): Change type of size to int.
349
350 2016-06-11 Alan Modra <amodra@gmail.com>
351
352 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
353
354 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
355
356 * opcode/sparc.h: Add missing documentation for hyperprivileged
357 registers in rd (%) and rs1 ($).
358
359 2016-06-07 Alan Modra <amodra@gmail.com>
360
361 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
362 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
363 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
364 PPC_APUINFO_VLE: Define.
365
366 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
367
368 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
369 entries.
370 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
371
372 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
373
374 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
375 (struct arc_long_opcode): New structure.
376 (arc_long_opcodes): Declare.
377 (arc_num_long_opcodes): Declare.
378
379 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
380
381 * elf/mips.h: Add extern "C".
382 * elf/sh.h: Likewise.
383 * opcode/d10v.h: Likewise.
384 * opcode/d30v.h: Likewise.
385 * opcode/ia64.h: Likewise.
386 * opcode/mips.h: Likewise.
387 * opcode/ppc.h: Likewise.
388 * opcode/sparc.h: Likewise.
389 * opcode/tic6x.h: Likewise.
390 * opcode/v850.h: Likewise.
391
392 2016-05-28 Alan Modra <amodra@gmail.com>
393
394 * bfdlink.h (struct bfd_link_callbacks): Update comments.
395 Return void from multiple_definition, multiple_common,
396 add_to_set, constructor, warning, undefined_symbol,
397 reloc_overflow, reloc_dangerous and unattached_reloc.
398
399 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
400
401 * opcode/metag.h: wrap declarations in extern "C".
402
403 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
404
405 * opcode/arc.h (insn_subclass_t): Add COND.
406 (flag_class_t): Add F_CLASS_EXTEND.
407
408 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
409
410 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
411 insn_class.
412 (struct arc_flag_class): Renamed attribute class to flag_class.
413
414 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
415
416 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
417 plain symbol.
418
419 2016-04-29 Tom Tromey <tom@tromey.com>
420
421 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
422 DW_LANG_Rust_old>: New constants.
423
424 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
425
426 * elf/mips.h (AFL_ASE_DSPR3): New macro.
427 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
428 * opcode/mips.h (ASE_DSPR3): New macro.
429
430 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
431 Nick Clifton <nickc@redhat.com>
432
433 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
434 enumerator.
435 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
436 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
437 (ARM_SYM_BRANCH_TYPE): Replace by ...
438 (ARM_GET_SYM_BRANCH_TYPE): This and ...
439 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
440 BFD_ASSERT is defined or not.
441
442 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
443
444 * elf/arm.h (Tag_DSP_extension): Define.
445
446 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
447
448 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
449
450 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
451
452 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
453 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
454 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
455 for the high core bits.
456
457 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
458
459 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
460 (ARC_SYNTAX_NOP): Likewsie.
461 (ARC_OP1_MUST_BE_IMM): Update defined value.
462 (ARC_OP1_IMM_IMPLIED): Likewise.
463 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
464
465 2016-04-28 Nick Clifton <nickc@redhat.com>
466
467 PR target/19722
468 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
469
470 2016-04-27 Alan Modra <amodra@gmail.com>
471
472 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
473 undef. Formatting.
474
475 2016-04-21 Nick Clifton <nickc@redhat.com>
476
477 * bfdlink.h: Add prototype for bfd_link_check_relocs.
478
479 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
480
481 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
482
483 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
484
485 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
486
487 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
488
489 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
490
491 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
492
493 * opcode/arc.h (insn_class_t): Add NET and ACL class.
494
495 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
496
497 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
498 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
499
500 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
501
502 * opcode/arc.h (flag_class_t): Update.
503 (ARC_OPCODE_NONE): Define.
504 (ARC_OPCODE_ARCALL): Likewise.
505 (ARC_OPCODE_ARCFPX): Likewise.
506 (ARC_REGISTER_READONLY): Likewise.
507 (ARC_REGISTER_WRITEONLY): Likewise.
508 (ARC_REGISTER_NOSHORT_CUT): Likewise.
509 (arc_aux_reg): Add cpu.
510
511 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
512
513 * opcode/arc.h (arc_num_opcodes): Remove.
514 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
515 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
516 (ARC_SUFFIX_FLAG): Define.
517 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
518 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
519 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
520 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
521 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
522 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
523 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
524 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
525 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
526 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
527
528 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
529
530 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
531 (ARC_FPUDA): Define.
532 (arc_aux_reg): Add new field.
533
534 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
535
536 * opcode/arc-func.h (replace_bits24): Changed.
537 (replace_bits24_be): Created.
538
539 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
540
541 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
542 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
543 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
544 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
545 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
546 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
547 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
548 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
549 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
550 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
551 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
552 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
553 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
554 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
555
556 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
557
558 * opcode/i960.h: Add const qualifiers.
559 * opcode/tic4x.h (struct tic4x_inst): Likewise.
560
561 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
562
563 * opcodes/arc.h (insn_class_t): Add BITOP type.
564
565 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
566
567 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
568 new classes instead.
569
570 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
571
572 * elf/arc.h (E_ARC_MACH_NPS400): Define.
573 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
574
575 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
576
577 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
578
579 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
580
581 * elf/arc.h (EF_ARC_MACH): Delete.
582 (EF_ARC_MACH_MSK): Remove out of date comment.
583
584 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
585
586 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
587
588 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
589
590 PR ld/19807
591 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
592
593 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
594 Andrew Burgess <andrew.burgess@embecosm.com>
595
596 * elf/arc-reloc.def: Add a call to ME within the formula for each
597 relocation that requires middle-endian correction.
598
599 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
600
601 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
602 * opcode/h8300.h (struct h8_opcode): Likewise.
603 * opcode/hppa.h (struct pa_opcode): Likewise.
604 * opcode/msp430.h: Likewise.
605 * opcode/spu.h (struct spu_opcode): Likewise.
606 * opcode/tic30.h (struct _register): Likewise.
607 * opcode/tic4x.h (struct tic4x_register): Likewise.
608 (struct tic4x_cond): Likewise.
609 (struct tic4x_indirect): Likewise.
610 (struct tic4x_inst): Likewise.
611 * opcode/visium.h (struct reg_entry): Likewise.
612
613 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
614
615 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
616 (ARM_CPU_HAS_FEATURE): Add comment.
617
618 2016-03-03 Than McIntosh <thanm@google.com>
619
620 * plugin-api.h: Add new hooks to the plugin transfer vector to
621 to support querying section alignment and section size.
622 (ld_plugin_get_input_section_alignment): New hook.
623 (ld_plugin_get_input_section_size): New hook.
624 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
625 and LDPT_GET_INPUT_SECTION_SIZE.
626 (ld_plugin_tv): Add tv_get_input_section_alignment and
627 tv_get_input_section_size.
628
629 2016-03-03 Evgenii Stepanov <eugenis@google.com>
630
631 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
632
633 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
634
635 PR ld/19645
636 * bfdlink.h (bfd_link_elf_stt_common): New enum.
637 (bfd_link_info): Add elf_stt_common.
638
639 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
640
641 PR ld/19636
642 PR ld/19704
643 PR ld/19719
644 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
645
646 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
647 Jiong Wang <jiong.wang@arm.com>
648
649 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
650
651 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
652 Janek van Oirschot <jvanoirs@synopsys.com>
653
654 * opcode/arc.h (arc_opcode arc_relax_opcodes)
655 (arc_num_relax_opcodes): Declare.
656
657 2016-02-09 Nick Clifton <nickc@redhat.com>
658
659 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
660 * opcode/nds32.h (nds32_r45map): Likewise.
661 (nds32_r54map): Likewise.
662 * opcode/visium.h (gen_reg_table): Likewise.
663 (fp_reg_table, cc_table, opcode_table): Likewise.
664
665 2016-02-09 Alan Modra <amodra@gmail.com>
666
667 PR 16583
668 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
669
670 2016-02-04 Nick Clifton <nickc@redhat.com>
671
672 PR target/19561
673 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
674 (RRUX): Synthesise using case 2 rather than 7.
675
676 2016-01-19 John Baldwin <jhb@FreeBSD.org>
677
678 * elf/common.h (NT_FREEBSD_THRMISC): Define.
679 (NT_FREEBSD_PROCSTAT_PROC): Define.
680 (NT_FREEBSD_PROCSTAT_FILES): Define.
681 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
682 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
683 (NT_FREEBSD_PROCSTAT_UMASK): Define.
684 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
685 (NT_FREEBSD_PROCSTAT_OSREL): Define.
686 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
687 (NT_FREEBSD_PROCSTAT_AUXV): Define.
688
689 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
690 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
691
692 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
693 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
694 (ARC_TLS_LE_32): Fixed formula.
695 (ARC_TLS_GD_LD): Use new special function.
696 * opcode/arc-func.h: Changed all the replacement
697 functions to clear the patching bits before doing an or it with the value
698 argument.
699
700 2016-01-18 Nick Clifton <nickc@redhat.com>
701
702 PR ld/19440
703 * coff/internal.h (internal_syment): Use int to hold section
704 number.
705 (N_UNDEF): Cast to int not short.
706 (N_ABS): Likewise.
707 (N_DEBUG): Likewise.
708 (N_TV): Likewise.
709 (P_TV): Likewise.
710
711 2016-01-11 Nick Clifton <nickc@redhat.com>
712
713 Import this change from GCC mainline:
714
715 2016-01-07 Mike Frysinger <vapier@gentoo.org>
716
717 * longlong.h: Change !__SHMEDIA__ to
718 (!defined (__SHMEDIA__) || !__SHMEDIA__).
719 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
720
721 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
722
723 * opcode/mips.h: Add a summary of MIPS16 operand codes.
724
725 2016-01-05 Mike Frysinger <vapier@gentoo.org>
726
727 * libiberty.h (dupargv): Change arg to char * const *.
728 (writeargv, countargv): Likewise.
729
730 2016-01-01 Alan Modra <amodra@gmail.com>
731
732 Update year range in copyright notice of all files.
733
734 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
735 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
736 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
737 som/ChangeLog-1015, and vms/ChangeLog-1015
738 \f
739 Copyright (C) 2016 Free Software Foundation, Inc.
740
741 Copying and distribution of this file, with or without modification,
742 are permitted in any medium without royalty provided the copyright
743 notice and this notice are preserved.
744
745 Local Variables:
746 mode: change-log
747 left-margin: 8
748 fill-column: 74
749 version-control: never
750 End:
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